1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 21da177e4SLinus Torvaldsconfig MIPS 31da177e4SLinus Torvalds bool 41da177e4SLinus Torvalds default y 512597988SMatt Redfearn select ARCH_BINFMT_ELF_STATE 612597988SMatt Redfearn select ARCH_CLOCKSOURCE_DATA 712597988SMatt Redfearn select ARCH_DISCARD_MEMBLOCK 812597988SMatt Redfearn select ARCH_HAS_ELF_RANDOMIZE 912597988SMatt Redfearn select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 1012597988SMatt Redfearn select ARCH_SUPPORTS_UPROBES 111ee3630aSRalf Baechle select ARCH_USE_BUILTIN_BSWAP 1212597988SMatt Redfearn select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 1325da4e9dSPaul Burton select ARCH_USE_QUEUED_RWLOCKS 140b17c967SPaul Burton select ARCH_USE_QUEUED_SPINLOCKS 1512597988SMatt Redfearn select ARCH_WANT_IPC_PARSE_VERSION 1612597988SMatt Redfearn select BUILDTIME_EXTABLE_SORT 1712597988SMatt Redfearn select CLONE_BACKWARDS 1812597988SMatt Redfearn select CPU_PM if CPU_IDLE 19dffbfde7SChristoph Hellwig select DMA_DIRECT_OPS 2012597988SMatt Redfearn select GENERIC_ATOMIC64 if !64BIT 2112597988SMatt Redfearn select GENERIC_CLOCKEVENTS 2212597988SMatt Redfearn select GENERIC_CMOS_UPDATE 2312597988SMatt Redfearn select GENERIC_CPU_AUTOPROBE 24*b962aeb0SPaul Burton select GENERIC_IOMAP 2512597988SMatt Redfearn select GENERIC_IRQ_PROBE 2612597988SMatt Redfearn select GENERIC_IRQ_SHOW 27740129b3SAntony Pavlov select GENERIC_LIB_ASHLDI3 28740129b3SAntony Pavlov select GENERIC_LIB_ASHRDI3 29740129b3SAntony Pavlov select GENERIC_LIB_CMPDI2 30740129b3SAntony Pavlov select GENERIC_LIB_LSHRDI3 31740129b3SAntony Pavlov select GENERIC_LIB_UCMPDI2 3212597988SMatt Redfearn select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 3312597988SMatt Redfearn select GENERIC_SMP_IDLE_THREAD 3412597988SMatt Redfearn select GENERIC_TIME_VSYSCALL 3512597988SMatt Redfearn select HANDLE_DOMAIN_IRQ 36906d441fSPaul Burton select HAVE_ARCH_COMPILER_H 3712597988SMatt Redfearn select HAVE_ARCH_JUMP_LABEL 3888547001SJason Wessel select HAVE_ARCH_KGDB 39109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_BITS if MMU 40109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 41490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 42c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 4312597988SMatt Redfearn select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 44f381bf6dSDavid Daney select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS) 45f381bf6dSDavid Daney select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS) 4612597988SMatt Redfearn select HAVE_CONTEXT_TRACKING 4712597988SMatt Redfearn select HAVE_COPY_THREAD_TLS 4864575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 4912597988SMatt Redfearn select HAVE_DEBUG_KMEMLEAK 5012597988SMatt Redfearn select HAVE_DEBUG_STACKOVERFLOW 5112597988SMatt Redfearn select HAVE_DMA_CONTIGUOUS 5212597988SMatt Redfearn select HAVE_DYNAMIC_FTRACE 5312597988SMatt Redfearn select HAVE_EXIT_THREAD 5412597988SMatt Redfearn select HAVE_FTRACE_MCOUNT_RECORD 5529c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 5612597988SMatt Redfearn select HAVE_FUNCTION_TRACER 5712597988SMatt Redfearn select HAVE_GENERIC_DMA_COHERENT 5812597988SMatt Redfearn select HAVE_IDE 5912597988SMatt Redfearn select HAVE_IRQ_EXIT_ON_IRQ_STACK 6012597988SMatt Redfearn select HAVE_IRQ_TIME_ACCOUNTING 61c1bf207dSDavid Daney select HAVE_KPROBES 62c1bf207dSDavid Daney select HAVE_KRETPROBES 639d15ffc8STejun Heo select HAVE_MEMBLOCK 649d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 65786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 6642a0bb3fSPetr Mladek select HAVE_NMI 6712597988SMatt Redfearn select HAVE_OPROFILE 6812597988SMatt Redfearn select HAVE_PERF_EVENTS 6908bccf43SMarcin Nowakowski select HAVE_REGS_AND_STACK_ACCESS_API 709ea141adSPaul Burton select HAVE_RSEQ 71d148eac0SMasahiro Yamada select HAVE_STACKPROTECTOR 7212597988SMatt Redfearn select HAVE_SYSCALL_TRACEPOINTS 73a3f14310SBen Hutchings select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP 7412597988SMatt Redfearn select IRQ_FORCED_THREADING 7512597988SMatt Redfearn select MODULES_USE_ELF_RELA if MODULES && 64BIT 7612597988SMatt Redfearn select MODULES_USE_ELF_REL if MODULES 7712597988SMatt Redfearn select PERF_USE_VMALLOC 7812597988SMatt Redfearn select RTC_LIB if !MACH_LOONGSON64 7912597988SMatt Redfearn select SYSCTL_EXCEPTION_TRACE 8012597988SMatt Redfearn select VIRT_TO_BUS 811da177e4SLinus Torvalds 821da177e4SLinus Torvaldsmenu "Machine selection" 831da177e4SLinus Torvalds 845e83d430SRalf Baechlechoice 855e83d430SRalf Baechle prompt "System type" 86d41e6858SMatt Redfearn default MIPS_GENERIC 871da177e4SLinus Torvalds 88eed0eabdSPaul Burtonconfig MIPS_GENERIC 89eed0eabdSPaul Burton bool "Generic board-agnostic MIPS kernel" 90eed0eabdSPaul Burton select BOOT_RAW 91eed0eabdSPaul Burton select BUILTIN_DTB 92eed0eabdSPaul Burton select CEVT_R4K 93eed0eabdSPaul Burton select CLKSRC_MIPS_GIC 94eed0eabdSPaul Burton select COMMON_CLK 95eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_VI 96eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_EI 97eed0eabdSPaul Burton select CSRC_R4K 98eed0eabdSPaul Burton select DMA_PERDEV_COHERENT 99eed0eabdSPaul Burton select HW_HAS_PCI 100eed0eabdSPaul Burton select IRQ_MIPS_CPU 101eed0eabdSPaul Burton select LIBFDT 1020211d49eSPaul Burton select MIPS_AUTO_PFN_OFFSET 103eed0eabdSPaul Burton select MIPS_CPU_SCACHE 104eed0eabdSPaul Burton select MIPS_GIC 105eed0eabdSPaul Burton select MIPS_L1_CACHE_SHIFT_7 106eed0eabdSPaul Burton select NO_EXCEPT_FILL 107eed0eabdSPaul Burton select PCI_DRIVERS_GENERIC 108eed0eabdSPaul Burton select PINCTRL 109eed0eabdSPaul Burton select SMP_UP if SMP 110a3078e59SMatt Redfearn select SWAP_IO_SPACE 111eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R1 112eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R2 113eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R6 114eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R1 115eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R2 116eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R6 117eed0eabdSPaul Burton select SYS_SUPPORTS_32BIT_KERNEL 118eed0eabdSPaul Burton select SYS_SUPPORTS_64BIT_KERNEL 119eed0eabdSPaul Burton select SYS_SUPPORTS_BIG_ENDIAN 120eed0eabdSPaul Burton select SYS_SUPPORTS_HIGHMEM 121eed0eabdSPaul Burton select SYS_SUPPORTS_LITTLE_ENDIAN 122eed0eabdSPaul Burton select SYS_SUPPORTS_MICROMIPS 123eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS_CPS 124eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS16 125eed0eabdSPaul Burton select SYS_SUPPORTS_MULTITHREADING 126eed0eabdSPaul Burton select SYS_SUPPORTS_RELOCATABLE 127eed0eabdSPaul Burton select SYS_SUPPORTS_SMARTMIPS 1282e6522c5SCorentin Labbe select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1292e6522c5SCorentin Labbe select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1302e6522c5SCorentin Labbe select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1312e6522c5SCorentin Labbe select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1322e6522c5SCorentin Labbe select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1332e6522c5SCorentin Labbe select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 134eed0eabdSPaul Burton select USE_OF 135eed0eabdSPaul Burton help 136eed0eabdSPaul Burton Select this to build a kernel which aims to support multiple boards, 137eed0eabdSPaul Burton generally using a flattened device tree passed from the bootloader 138eed0eabdSPaul Burton using the boot protocol defined in the UHI (Unified Hosting 139eed0eabdSPaul Burton Interface) specification. 140eed0eabdSPaul Burton 14142a4f17dSManuel Laussconfig MIPS_ALCHEMY 142c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 143d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 144f772cdb2SRalf Baechle select CEVT_R4K 145d7ea335cSSteven J. Hill select CSRC_R4K 14667e38cf2SRalf Baechle select IRQ_MIPS_CPU 14788e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 14842a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 14942a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 15042a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 151d30a2b47SLinus Walleij select GPIOLIB 1521b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 15347440229SManuel Lauss select COMMON_CLK 1541da177e4SLinus Torvalds 1557ca5dc14SFlorian Fainelliconfig AR7 1567ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 1577ca5dc14SFlorian Fainelli select BOOT_ELF32 1587ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 1597ca5dc14SFlorian Fainelli select CEVT_R4K 1607ca5dc14SFlorian Fainelli select CSRC_R4K 16167e38cf2SRalf Baechle select IRQ_MIPS_CPU 1627ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 1637ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 1647ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 1657ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 1667ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 1677ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 168377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1691b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 170d30a2b47SLinus Walleij select GPIOLIB 1717ca5dc14SFlorian Fainelli select VLYNQ 1728551fb64SYoichi Yuasa select HAVE_CLK 1737ca5dc14SFlorian Fainelli help 1747ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1757ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1767ca5dc14SFlorian Fainelli 17743cc739fSSergey Ryazanovconfig ATH25 17843cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 17943cc739fSSergey Ryazanov select CEVT_R4K 18043cc739fSSergey Ryazanov select CSRC_R4K 18143cc739fSSergey Ryazanov select DMA_NONCOHERENT 18267e38cf2SRalf Baechle select IRQ_MIPS_CPU 1831753e74eSSergey Ryazanov select IRQ_DOMAIN 18443cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 18543cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 18643cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1878aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 18843cc739fSSergey Ryazanov help 18943cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 19043cc739fSSergey Ryazanov 191d4a67d9dSGabor Juhosconfig ATH79 192d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 193ff591a91SAlban Bedel select ARCH_HAS_RESET_CONTROLLER 194d4a67d9dSGabor Juhos select BOOT_RAW 195d4a67d9dSGabor Juhos select CEVT_R4K 196d4a67d9dSGabor Juhos select CSRC_R4K 197d4a67d9dSGabor Juhos select DMA_NONCOHERENT 198d30a2b47SLinus Walleij select GPIOLIB 199a08227a2SJohn Crispin select PINCTRL 20094638067SGabor Juhos select HAVE_CLK 201411520afSAlban Bedel select COMMON_CLK 2022c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 20367e38cf2SRalf Baechle select IRQ_MIPS_CPU 2040aabf1a4SGabor Juhos select MIPS_MACHINE 205d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 206d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 207d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 208d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 209377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 210b3f0a250SAlban Bedel select SYS_SUPPORTS_ZBOOT_UART_PROM 21103c8c407SAlban Bedel select USE_OF 21253d473fcSAlban Bedel select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM 213d4a67d9dSGabor Juhos help 214d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 215d4a67d9dSGabor Juhos 2165f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 2175f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 218d59098a0SChristoph Hellwig select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL 219d59098a0SChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 220d666cd02SKevin Cernekee select BOOT_RAW 221d666cd02SKevin Cernekee select NO_EXCEPT_FILL 222d666cd02SKevin Cernekee select USE_OF 223d666cd02SKevin Cernekee select CEVT_R4K 224d666cd02SKevin Cernekee select CSRC_R4K 225d666cd02SKevin Cernekee select SYNC_R4K 226d666cd02SKevin Cernekee select COMMON_CLK 227c7c42ec2SSimon Arlott select BCM6345_L1_IRQ 22860b858f2SKevin Cernekee select BCM7038_L1_IRQ 22960b858f2SKevin Cernekee select BCM7120_L2_IRQ 23060b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 23167e38cf2SRalf Baechle select IRQ_MIPS_CPU 23260b858f2SKevin Cernekee select DMA_NONCOHERENT 233d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 23460b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 235d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 236d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 23760b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 23860b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 23960b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 240d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 241d666cd02SKevin Cernekee select SWAP_IO_SPACE 24260b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 24360b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 24460b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 24560b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 2464dc4704cSJustin Chen select HARDIRQS_SW_RESEND 247d666cd02SKevin Cernekee help 2485f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 2495f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 2505f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 2515f2d4459SKevin Cernekee must be set appropriately for your board. 252d666cd02SKevin Cernekee 2531c0c13ebSAurelien Jarnoconfig BCM47XX 254c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 255fe08f8c2SHauke Mehrtens select BOOT_RAW 25642f77542SRalf Baechle select CEVT_R4K 257940f6b48SRalf Baechle select CSRC_R4K 2581c0c13ebSAurelien Jarno select DMA_NONCOHERENT 2591c0c13ebSAurelien Jarno select HW_HAS_PCI 26067e38cf2SRalf Baechle select IRQ_MIPS_CPU 261314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 262dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 2631c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 2641c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 265377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 2666507831fSAaro Koskinen select SYS_SUPPORTS_ZBOOT 26725e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 268e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 269c949c0bcSRafał Miłecki select GPIOLIB 270c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 271f6e734a8SRafał Miłecki select BCM47XX_NVRAM 2722ab71a02SRafał Miłecki select BCM47XX_SPROM 273dfe00495SMatt Redfearn select BCM47XX_SSB if !BCM47XX_BCMA 2741c0c13ebSAurelien Jarno help 2751c0c13ebSAurelien Jarno Support for BCM47XX based boards 2761c0c13ebSAurelien Jarno 277e7300d04SMaxime Bizonconfig BCM63XX 278e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 279ae8de61cSFlorian Fainelli select BOOT_RAW 280e7300d04SMaxime Bizon select CEVT_R4K 281e7300d04SMaxime Bizon select CSRC_R4K 282fc264022SJonas Gorski select SYNC_R4K 283e7300d04SMaxime Bizon select DMA_NONCOHERENT 28467e38cf2SRalf Baechle select IRQ_MIPS_CPU 285e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 286e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 287e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 288e7300d04SMaxime Bizon select SWAP_IO_SPACE 289d30a2b47SLinus Walleij select GPIOLIB 2903e82eeebSYoichi Yuasa select HAVE_CLK 291af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 292c5af3c2dSJonas Gorski select CLKDEV_LOOKUP 293e7300d04SMaxime Bizon help 294e7300d04SMaxime Bizon Support for BCM63XX based boards 295e7300d04SMaxime Bizon 2961da177e4SLinus Torvaldsconfig MIPS_COBALT 2973fa986faSMartin Michlmayr bool "Cobalt Server" 29842f77542SRalf Baechle select CEVT_R4K 299940f6b48SRalf Baechle select CSRC_R4K 3001097c6acSYoichi Yuasa select CEVT_GT641XX 3011da177e4SLinus Torvalds select DMA_NONCOHERENT 3021da177e4SLinus Torvalds select HW_HAS_PCI 303d865bea4SRalf Baechle select I8253 3041da177e4SLinus Torvalds select I8259 30567e38cf2SRalf Baechle select IRQ_MIPS_CPU 306d5ab1a69SYoichi Yuasa select IRQ_GT641XX 307252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 308e25bfc92SYoichi Yuasa select PCI 3097cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3100a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 311ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3120e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 3135e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 314e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 3151da177e4SLinus Torvalds 3161da177e4SLinus Torvaldsconfig MACH_DECSTATION 3173fa986faSMartin Michlmayr bool "DECstations" 3181da177e4SLinus Torvalds select BOOT_ELF32 3196457d9fcSYoichi Yuasa select CEVT_DS1287 32081d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 3214247417dSYoichi Yuasa select CSRC_IOASIC 32281d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 32320d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 32420d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 32520d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 3261da177e4SLinus Torvalds select DMA_NONCOHERENT 327ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 32867e38cf2SRalf Baechle select IRQ_MIPS_CPU 3297cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 3307cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 331ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3327d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3335e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3341723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 3351723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 3361723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 337930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 3385e83d430SRalf Baechle help 3391da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 3401da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 3411da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 3421da177e4SLinus Torvalds 3431da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 3441da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 3451da177e4SLinus Torvalds 3461da177e4SLinus Torvalds DECstation 5000/50 3471da177e4SLinus Torvalds DECstation 5000/150 3481da177e4SLinus Torvalds DECstation 5000/260 3491da177e4SLinus Torvalds DECsystem 5900/260 3501da177e4SLinus Torvalds 3511da177e4SLinus Torvalds otherwise choose R3000. 3521da177e4SLinus Torvalds 3535e83d430SRalf Baechleconfig MACH_JAZZ 3543fa986faSMartin Michlmayr bool "Jazz family of machines" 355a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 3567a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 3570e2794b0SRalf Baechle select FW_ARC 3580e2794b0SRalf Baechle select FW_ARC32 3595e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 36042f77542SRalf Baechle select CEVT_R4K 361940f6b48SRalf Baechle select CSRC_R4K 362e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 3635e83d430SRalf Baechle select GENERIC_ISA_DMA 3648a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 36567e38cf2SRalf Baechle select IRQ_MIPS_CPU 366d865bea4SRalf Baechle select I8253 3675e83d430SRalf Baechle select I8259 3685e83d430SRalf Baechle select ISA 3697cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 3705e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 3717d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3721723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 3731da177e4SLinus Torvalds help 3745e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 3755e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 376692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 3775e83d430SRalf Baechle Olivetti M700-10 workstations. 3785e83d430SRalf Baechle 379de361e8bSPaul Burtonconfig MACH_INGENIC 380de361e8bSPaul Burton bool "Ingenic SoC based machines" 3815ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 3825ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 383f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 3845ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 38567e38cf2SRalf Baechle select IRQ_MIPS_CPU 38637b4c3caSPaul Cercueil select PINCTRL 387d30a2b47SLinus Walleij select GPIOLIB 388ff1930c6SPaul Burton select COMMON_CLK 38983bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 390ffb1843dSPaul Burton select BUILTIN_DTB 391ffb1843dSPaul Burton select USE_OF 3926ec127fbSPaul Burton select LIBFDT 3935ebabe59SLars-Peter Clausen 394171bb2f1SJohn Crispinconfig LANTIQ 395171bb2f1SJohn Crispin bool "Lantiq based platforms" 396171bb2f1SJohn Crispin select DMA_NONCOHERENT 39767e38cf2SRalf Baechle select IRQ_MIPS_CPU 398171bb2f1SJohn Crispin select CEVT_R4K 399171bb2f1SJohn Crispin select CSRC_R4K 400171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 401171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 402171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 403171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 404377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 405171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 406f35764e7SJames Hogan select SYS_SUPPORTS_VPE_LOADER 407171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 408d30a2b47SLinus Walleij select GPIOLIB 409171bb2f1SJohn Crispin select SWAP_IO_SPACE 410171bb2f1SJohn Crispin select BOOT_RAW 411287e3f3fSJohn Crispin select CLKDEV_LOOKUP 412a0392222SJohn Crispin select USE_OF 4133f8c50c9SJohn Crispin select PINCTRL 4143f8c50c9SJohn Crispin select PINCTRL_LANTIQ 415c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 416c530781cSJohn Crispin select RESET_CONTROLLER 417171bb2f1SJohn Crispin 4181f21d2bdSBrian Murphyconfig LASAT 4191f21d2bdSBrian Murphy bool "LASAT Networks platforms" 42042f77542SRalf Baechle select CEVT_R4K 42116f0bbbcSRalf Baechle select CRC32 422940f6b48SRalf Baechle select CSRC_R4K 4231f21d2bdSBrian Murphy select DMA_NONCOHERENT 4241f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 4251f21d2bdSBrian Murphy select HW_HAS_PCI 42667e38cf2SRalf Baechle select IRQ_MIPS_CPU 4271f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 4281f21d2bdSBrian Murphy select MIPS_NILE4 4291f21d2bdSBrian Murphy select R5000_CPU_SCACHE 4301f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 4311f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 4321f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 4331f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 4341f21d2bdSBrian Murphy 43530ad29bbSHuacai Chenconfig MACH_LOONGSON32 43630ad29bbSHuacai Chen bool "Loongson-1 family of machines" 437c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 438ade299d8SYoichi Yuasa help 43930ad29bbSHuacai Chen This enables support for the Loongson-1 family of machines. 44085749d24SWu Zhangjin 44130ad29bbSHuacai Chen Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 44230ad29bbSHuacai Chen the Institute of Computing Technology (ICT), Chinese Academy of 44330ad29bbSHuacai Chen Sciences (CAS). 444ade299d8SYoichi Yuasa 44530ad29bbSHuacai Chenconfig MACH_LOONGSON64 44630ad29bbSHuacai Chen bool "Loongson-2/3 family of machines" 447ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 448ca585cf9SKelvin Cheung help 44930ad29bbSHuacai Chen This enables the support of Loongson-2/3 family of machines. 450ca585cf9SKelvin Cheung 45130ad29bbSHuacai Chen Loongson-2 is a family of single-core CPUs and Loongson-3 is a 45230ad29bbSHuacai Chen family of multi-core CPUs. They are both 64-bit general-purpose 45330ad29bbSHuacai Chen MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute 45430ad29bbSHuacai Chen of Computing Technology (ICT), Chinese Academy of Sciences (CAS) 45530ad29bbSHuacai Chen in the People's Republic of China. The chief architect is Professor 45630ad29bbSHuacai Chen Weiwu Hu. 457ca585cf9SKelvin Cheung 4586a438309SAndrew Brestickerconfig MACH_PISTACHIO 4596a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 4606a438309SAndrew Bresticker select BOOT_ELF32 4616a438309SAndrew Bresticker select BOOT_RAW 4626a438309SAndrew Bresticker select CEVT_R4K 4636a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 4646a438309SAndrew Bresticker select COMMON_CLK 4656a438309SAndrew Bresticker select CSRC_R4K 466645c7827SZubair Lutfullah Kakakhel select DMA_NONCOHERENT 467d30a2b47SLinus Walleij select GPIOLIB 46867e38cf2SRalf Baechle select IRQ_MIPS_CPU 4696a438309SAndrew Bresticker select LIBFDT 4706a438309SAndrew Bresticker select MFD_SYSCON 4716a438309SAndrew Bresticker select MIPS_CPU_SCACHE 4726a438309SAndrew Bresticker select MIPS_GIC 4736a438309SAndrew Bresticker select PINCTRL 4746a438309SAndrew Bresticker select REGULATOR 4756a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 4766a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 4776a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 4786a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 4796a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 48041cc07beSMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 4816a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 482018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 483018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 4846a438309SAndrew Bresticker select USE_OF 4856a438309SAndrew Bresticker help 4866a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 4876a438309SAndrew Bresticker 4881da177e4SLinus Torvaldsconfig MIPS_MALTA 4893fa986faSMartin Michlmayr bool "MIPS Malta board" 49061ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 491a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 4927a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 4931da177e4SLinus Torvalds select BOOT_ELF32 494fa71c960SRalf Baechle select BOOT_RAW 495e8823d26SPaul Burton select BUILTIN_DTB 49642f77542SRalf Baechle select CEVT_R4K 497940f6b48SRalf Baechle select CSRC_R4K 498fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 49942b002abSGuenter Roeck select COMMON_CLK 500885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 5011da177e4SLinus Torvalds select GENERIC_ISA_DMA 5028a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 50367e38cf2SRalf Baechle select IRQ_MIPS_CPU 5048a19b8f1SAndrew Bresticker select MIPS_GIC 5051da177e4SLinus Torvalds select HW_HAS_PCI 506d865bea4SRalf Baechle select I8253 5071da177e4SLinus Torvalds select I8259 5085e83d430SRalf Baechle select MIPS_BONITO64 5099318c51aSChris Dearman select MIPS_CPU_SCACHE 510a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 511252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 5125e83d430SRalf Baechle select MIPS_MSC 513ecafe3e9SPaul Burton select SMP_UP if SMP 5141da177e4SLinus Torvalds select SWAP_IO_SPACE 5157cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 5167cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 517bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 518c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 519575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 5207cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 5215d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 522575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 5237cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 5247cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 525ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 526ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5275e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 528c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 5295e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 530424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 5310365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 532e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 533377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 534f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 5359693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 536f35764e7SJames Hogan select SYS_SUPPORTS_VPE_LOADER 5371b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 5388c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 539e8823d26SPaul Burton select USE_OF 54038ec82feSPaul Burton select LIBFDT 541abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 542e81a8c7dSPaul Burton select BUILTIN_DTB 543e81a8c7dSPaul Burton select LIBFDT 5441da177e4SLinus Torvalds help 545f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 5461da177e4SLinus Torvalds board. 5471da177e4SLinus Torvalds 5482572f00dSJoshua Hendersonconfig MACH_PIC32 5492572f00dSJoshua Henderson bool "Microchip PIC32 Family" 5502572f00dSJoshua Henderson help 5512572f00dSJoshua Henderson This enables support for the Microchip PIC32 family of platforms. 5522572f00dSJoshua Henderson 5532572f00dSJoshua Henderson Microchip PIC32 is a family of general-purpose 32 bit MIPS core 5542572f00dSJoshua Henderson microcontrollers. 5552572f00dSJoshua Henderson 556a83860c2SRalf Baechleconfig NEC_MARKEINS 557a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 558a83860c2SRalf Baechle select SOC_EMMA2RH 559a83860c2SRalf Baechle select HW_HAS_PCI 560a83860c2SRalf Baechle help 561a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 562ade299d8SYoichi Yuasa 5635e83d430SRalf Baechleconfig MACH_VR41XX 56474142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 56542f77542SRalf Baechle select CEVT_R4K 566940f6b48SRalf Baechle select CSRC_R4K 5677cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 568377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 569d30a2b47SLinus Walleij select GPIOLIB 5705e83d430SRalf Baechle 571edb6310aSDaniel Lairdconfig NXP_STB220 572edb6310aSDaniel Laird bool "NXP STB220 board" 573edb6310aSDaniel Laird select SOC_PNX833X 574edb6310aSDaniel Laird help 575edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 576edb6310aSDaniel Laird 577edb6310aSDaniel Lairdconfig NXP_STB225 578edb6310aSDaniel Laird bool "NXP 225 board" 579edb6310aSDaniel Laird select SOC_PNX833X 580edb6310aSDaniel Laird select SOC_PNX8335 581edb6310aSDaniel Laird help 582edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 583edb6310aSDaniel Laird 5849267a30dSMarc St-Jeanconfig PMC_MSP 5859267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 58639d30c13SAnoop P A select CEVT_R4K 58739d30c13SAnoop P A select CSRC_R4K 5889267a30dSMarc St-Jean select DMA_NONCOHERENT 5899267a30dSMarc St-Jean select SWAP_IO_SPACE 5909267a30dSMarc St-Jean select NO_EXCEPT_FILL 5919267a30dSMarc St-Jean select BOOT_RAW 5929267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 5939267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 5949267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 5959267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 596377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 59767e38cf2SRalf Baechle select IRQ_MIPS_CPU 5989267a30dSMarc St-Jean select SERIAL_8250 5999267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 6009296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 6019296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 6029267a30dSMarc St-Jean help 6039267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 6049267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 6059267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 6069267a30dSMarc St-Jean a variety of MIPS cores. 6079267a30dSMarc St-Jean 608ae2b5bb6SJohn Crispinconfig RALINK 609ae2b5bb6SJohn Crispin bool "Ralink based machines" 610ae2b5bb6SJohn Crispin select CEVT_R4K 611ae2b5bb6SJohn Crispin select CSRC_R4K 612ae2b5bb6SJohn Crispin select BOOT_RAW 613ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 61467e38cf2SRalf Baechle select IRQ_MIPS_CPU 615ae2b5bb6SJohn Crispin select USE_OF 616ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 617ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 618ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 619ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 620377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 621ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 622ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 6232a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 6242a153f1cSJohn Crispin select RESET_CONTROLLER 625ae2b5bb6SJohn Crispin 6261da177e4SLinus Torvaldsconfig SGI_IP22 6273fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 6280e2794b0SRalf Baechle select FW_ARC 6290e2794b0SRalf Baechle select FW_ARC32 6307a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 6311da177e4SLinus Torvalds select BOOT_ELF32 63242f77542SRalf Baechle select CEVT_R4K 633940f6b48SRalf Baechle select CSRC_R4K 634e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 6351da177e4SLinus Torvalds select DMA_NONCOHERENT 6365e83d430SRalf Baechle select HW_HAS_EISA 637d865bea4SRalf Baechle select I8253 63868de4803SThomas Bogendoerfer select I8259 6391da177e4SLinus Torvalds select IP22_CPU_SCACHE 64067e38cf2SRalf Baechle select IRQ_MIPS_CPU 641aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 642e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 643e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 64436e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 645e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 646e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 647e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 6481da177e4SLinus Torvalds select SWAP_IO_SPACE 6497cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6507cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6512b5e63f6SMartin Michlmayr # 6522b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6532b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6542b5e63f6SMartin Michlmayr # 6552b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6562b5e63f6SMartin Michlmayr # for a more details discussion 6572b5e63f6SMartin Michlmayr # 6582b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 659ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 660ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6615e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 662930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6631da177e4SLinus Torvalds help 6641da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 6651da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 6661da177e4SLinus Torvalds that runs on these, say Y here. 6671da177e4SLinus Torvalds 6681da177e4SLinus Torvaldsconfig SGI_IP27 6693fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 67054aed4ddSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 6710e2794b0SRalf Baechle select FW_ARC 6720e2794b0SRalf Baechle select FW_ARC64 6735e83d430SRalf Baechle select BOOT_ELF64 674e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 67536a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 6761da177e4SLinus Torvalds select HW_HAS_PCI 677130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 6787cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 679ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6805e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 681d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 6821a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 683930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6841da177e4SLinus Torvalds help 6851da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 6861da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 6871da177e4SLinus Torvalds here. 6881da177e4SLinus Torvalds 689e2defae5SThomas Bogendoerferconfig SGI_IP28 6907d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 6910e2794b0SRalf Baechle select FW_ARC 6920e2794b0SRalf Baechle select FW_ARC64 6937a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 694e2defae5SThomas Bogendoerfer select BOOT_ELF64 695e2defae5SThomas Bogendoerfer select CEVT_R4K 696e2defae5SThomas Bogendoerfer select CSRC_R4K 697e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 698e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 699e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 70067e38cf2SRalf Baechle select IRQ_MIPS_CPU 701e2defae5SThomas Bogendoerfer select HW_HAS_EISA 702e2defae5SThomas Bogendoerfer select I8253 703e2defae5SThomas Bogendoerfer select I8259 704e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 705e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 7065b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 707e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 708e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 709e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 710e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 711e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 7122b5e63f6SMartin Michlmayr # 7132b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 7142b5e63f6SMartin Michlmayr # memory during early boot on some machines. 7152b5e63f6SMartin Michlmayr # 7162b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 7172b5e63f6SMartin Michlmayr # for a more details discussion 7182b5e63f6SMartin Michlmayr # 7192b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 720e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 721e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 722dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 723e2defae5SThomas Bogendoerfer help 724e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 725e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 726e2defae5SThomas Bogendoerfer 7271da177e4SLinus Torvaldsconfig SGI_IP32 728cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 72903df8229SChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 7300e2794b0SRalf Baechle select FW_ARC 7310e2794b0SRalf Baechle select FW_ARC32 7321da177e4SLinus Torvalds select BOOT_ELF32 73342f77542SRalf Baechle select CEVT_R4K 734940f6b48SRalf Baechle select CSRC_R4K 7351da177e4SLinus Torvalds select DMA_NONCOHERENT 7361da177e4SLinus Torvalds select HW_HAS_PCI 73767e38cf2SRalf Baechle select IRQ_MIPS_CPU 7381da177e4SLinus Torvalds select R5000_CPU_SCACHE 7391da177e4SLinus Torvalds select RM7000_CPU_SCACHE 7407cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 7417cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 7427cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 743dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 744ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 7455e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7461da177e4SLinus Torvalds help 7471da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 7481da177e4SLinus Torvalds 749ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 750ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 7515e83d430SRalf Baechle select BOOT_ELF32 7525e83d430SRalf Baechle select SIBYTE_BCM1120 7535e83d430SRalf Baechle select SWAP_IO_SPACE 7547cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7555e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7565e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7575e83d430SRalf Baechle 758ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 759ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 7605e83d430SRalf Baechle select BOOT_ELF32 7615e83d430SRalf Baechle select SIBYTE_BCM1120 7625e83d430SRalf Baechle select SWAP_IO_SPACE 7637cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7645e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7655e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7665e83d430SRalf Baechle 7675e83d430SRalf Baechleconfig SIBYTE_CRHONE 7683fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 7695e83d430SRalf Baechle select BOOT_ELF32 7705e83d430SRalf Baechle select SIBYTE_BCM1125 7715e83d430SRalf Baechle select SWAP_IO_SPACE 7727cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7735e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7745e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7755e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7765e83d430SRalf Baechle 777ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 778ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 779ade299d8SYoichi Yuasa select BOOT_ELF32 780ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 781ade299d8SYoichi Yuasa select SWAP_IO_SPACE 782ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 783ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 784ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 785ade299d8SYoichi Yuasa 786ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 787ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 788ade299d8SYoichi Yuasa select BOOT_ELF32 789fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 790ade299d8SYoichi Yuasa select SIBYTE_SB1250 791ade299d8SYoichi Yuasa select SWAP_IO_SPACE 792ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 793ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 794ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 795ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 796cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 797ade299d8SYoichi Yuasa 798ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 799ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 800ade299d8SYoichi Yuasa select BOOT_ELF32 801fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 802ade299d8SYoichi Yuasa select SIBYTE_SB1250 803ade299d8SYoichi Yuasa select SWAP_IO_SPACE 804ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 805ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 806ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 807ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 808ade299d8SYoichi Yuasa 809ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 810ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 811ade299d8SYoichi Yuasa select BOOT_ELF32 812ade299d8SYoichi Yuasa select SIBYTE_SB1250 813ade299d8SYoichi Yuasa select SWAP_IO_SPACE 814ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 815ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 816ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 817ade299d8SYoichi Yuasa 818ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 819ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 820ade299d8SYoichi Yuasa select BOOT_ELF32 821ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 822ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 823ade299d8SYoichi Yuasa select SWAP_IO_SPACE 824ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 825ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 826651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 827ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 828cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 829ade299d8SYoichi Yuasa 83014b36af4SThomas Bogendoerferconfig SNI_RM 83114b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 8320e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 8330e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 834aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 8355e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 836a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 8377a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 8385e83d430SRalf Baechle select BOOT_ELF32 83942f77542SRalf Baechle select CEVT_R4K 840940f6b48SRalf Baechle select CSRC_R4K 841e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 8425e83d430SRalf Baechle select DMA_NONCOHERENT 8435e83d430SRalf Baechle select GENERIC_ISA_DMA 8448a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 8455e83d430SRalf Baechle select HW_HAS_EISA 8465e83d430SRalf Baechle select HW_HAS_PCI 84767e38cf2SRalf Baechle select IRQ_MIPS_CPU 848d865bea4SRalf Baechle select I8253 8495e83d430SRalf Baechle select I8259 8505e83d430SRalf Baechle select ISA 8514a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 8527cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 8534a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 854c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 8554a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 85636a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 857ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 8587d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 8594a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 8605e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 8615e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8621da177e4SLinus Torvalds help 86314b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 86414b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 8655e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 8665e83d430SRalf Baechle support this machine type. 8671da177e4SLinus Torvalds 868edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 869edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 8705e83d430SRalf Baechle 871edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 872edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 87323fbee9dSRalf Baechle 87473b4390fSRalf Baechleconfig MIKROTIK_RB532 87573b4390fSRalf Baechle bool "Mikrotik RB532 boards" 87673b4390fSRalf Baechle select CEVT_R4K 87773b4390fSRalf Baechle select CSRC_R4K 87873b4390fSRalf Baechle select DMA_NONCOHERENT 87973b4390fSRalf Baechle select HW_HAS_PCI 88067e38cf2SRalf Baechle select IRQ_MIPS_CPU 88173b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 88273b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 88373b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 88473b4390fSRalf Baechle select SWAP_IO_SPACE 88573b4390fSRalf Baechle select BOOT_RAW 886d30a2b47SLinus Walleij select GPIOLIB 887930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 88873b4390fSRalf Baechle help 88973b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 89073b4390fSRalf Baechle based on the IDT RC32434 SoC. 89173b4390fSRalf Baechle 8929ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 8939ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 894a86c7f72SDavid Daney select CEVT_R4K 895ea8c64acSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 896491ec155SAlexander Sverdlin select HAS_RAPIDIO 897d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 898a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 899a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 900f65aad41SRalf Baechle select EDAC_SUPPORT 901b01aec9bSBorislav Petkov select EDAC_ATOMIC_SCRUB 90273569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 90373569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 904a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 9055e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 906e8635b48SDavid Daney select HW_HAS_PCI 907f00e001eSDavid Daney select ZONE_DMA32 908465aaed0SDavid Daney select HOLES_IN_ZONE 909d30a2b47SLinus Walleij select GPIOLIB 9106e511163SDavid Daney select LIBFDT 9116e511163SDavid Daney select USE_OF 9126e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 9136e511163SDavid Daney select SYS_SUPPORTS_SMP 9147820b84bSDavid Daney select NR_CPUS_DEFAULT_64 9157820b84bSDavid Daney select MIPS_NR_CPU_NR_MAP_1024 916e326479fSAndrew Bresticker select BUILTIN_DTB 9178c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 91809230cbcSChristoph Hellwig select SWIOTLB 9193ff72be4SSteven J. Hill select SYS_SUPPORTS_RELOCATABLE 920a86c7f72SDavid Daney help 921a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 922a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 923a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 924a86c7f72SDavid Daney Some of the supported boards are: 925a86c7f72SDavid Daney EBT3000 926a86c7f72SDavid Daney EBH3000 927a86c7f72SDavid Daney EBH3100 928a86c7f72SDavid Daney Thunder 929a86c7f72SDavid Daney Kodama 930a86c7f72SDavid Daney Hikari 931a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 932a86c7f72SDavid Daney 9337f058e85SJayachandran Cconfig NLM_XLR_BOARD 9347f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 9357f058e85SJayachandran C select BOOT_ELF32 9367f058e85SJayachandran C select NLM_COMMON 9377f058e85SJayachandran C select SYS_HAS_CPU_XLR 9387f058e85SJayachandran C select SYS_SUPPORTS_SMP 9397f058e85SJayachandran C select HW_HAS_PCI 9407f058e85SJayachandran C select SWAP_IO_SPACE 9417f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9427f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 943d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 9447f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9457f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 9467f058e85SJayachandran C select NR_CPUS_DEFAULT_32 9477f058e85SJayachandran C select CEVT_R4K 9487f058e85SJayachandran C select CSRC_R4K 94967e38cf2SRalf Baechle select IRQ_MIPS_CPU 950b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9517f058e85SJayachandran C select SYNC_R4K 9527f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 9538f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9548f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9557f058e85SJayachandran C help 9567f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 9577f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 9587f058e85SJayachandran C 9591c773ea4SJayachandran Cconfig NLM_XLP_BOARD 9601c773ea4SJayachandran C bool "Netlogic XLP based systems" 9611c773ea4SJayachandran C select BOOT_ELF32 9621c773ea4SJayachandran C select NLM_COMMON 9631c773ea4SJayachandran C select SYS_HAS_CPU_XLP 9641c773ea4SJayachandran C select SYS_SUPPORTS_SMP 9651c773ea4SJayachandran C select HW_HAS_PCI 9661c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9671c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 968d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 969d30a2b47SLinus Walleij select GPIOLIB 9701c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9711c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 9721c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 9731c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 9741c773ea4SJayachandran C select CEVT_R4K 9751c773ea4SJayachandran C select CSRC_R4K 97667e38cf2SRalf Baechle select IRQ_MIPS_CPU 977b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9781c773ea4SJayachandran C select SYNC_R4K 9791c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 9802f6528e1SJayachandran C select USE_OF 9818f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9828f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9831c773ea4SJayachandran C help 9841c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 9851c773ea4SJayachandran C Say Y here if you have a XLP based board. 9861c773ea4SJayachandran C 9879bc463beSDavid Daneyconfig MIPS_PARAVIRT 9889bc463beSDavid Daney bool "Para-Virtualized guest system" 9899bc463beSDavid Daney select CEVT_R4K 9909bc463beSDavid Daney select CSRC_R4K 9919bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 9929bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 9939bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 9949bc463beSDavid Daney select SYS_SUPPORTS_SMP 9959bc463beSDavid Daney select NR_CPUS_DEFAULT_4 9969bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 9979bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 9989bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 9999bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 10009bc463beSDavid Daney select HW_HAS_PCI 10019bc463beSDavid Daney select SWAP_IO_SPACE 10029bc463beSDavid Daney help 10039bc463beSDavid Daney This option supports guest running under ???? 10049bc463beSDavid Daney 10051da177e4SLinus Torvaldsendchoice 10061da177e4SLinus Torvalds 1007e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 10083b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 1009d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 1010a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 1011e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 10128945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 1013eed0eabdSPaul Burtonsource "arch/mips/generic/Kconfig" 10145e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 10155ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 10168ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 10171f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 10182572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig" 1019af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig" 10200f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 1021ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 102229c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 102338b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 102422b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 10255e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 1026a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 102730ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig" 102830ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig" 10297f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 1030ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 103138b18f72SRalf Baechle 10325e83d430SRalf Baechleendmenu 10335e83d430SRalf Baechle 10341da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 10351da177e4SLinus Torvalds bool 10361da177e4SLinus Torvalds default y 10371da177e4SLinus Torvalds 10381da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 10391da177e4SLinus Torvalds bool 10401da177e4SLinus Torvalds 10413c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 10423c9ee7efSAkinobu Mita bool 10433c9ee7efSAkinobu Mita default y 10443c9ee7efSAkinobu Mita 10451da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 10461da177e4SLinus Torvalds bool 10471da177e4SLinus Torvalds default y 10481da177e4SLinus Torvalds 1049ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 10501cc89038SAtsushi Nemoto bool 10511cc89038SAtsushi Nemoto default y 10521cc89038SAtsushi Nemoto 10531da177e4SLinus Torvalds# 10541da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 10551da177e4SLinus Torvalds# 10560e2794b0SRalf Baechleconfig FW_ARC 10571da177e4SLinus Torvalds bool 10581da177e4SLinus Torvalds 105961ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 106061ed242dSRalf Baechle bool 106161ed242dSRalf Baechle 10629267a30dSMarc St-Jeanconfig BOOT_RAW 10639267a30dSMarc St-Jean bool 10649267a30dSMarc St-Jean 1065217dd11eSRalf Baechleconfig CEVT_BCM1480 1066217dd11eSRalf Baechle bool 1067217dd11eSRalf Baechle 10686457d9fcSYoichi Yuasaconfig CEVT_DS1287 10696457d9fcSYoichi Yuasa bool 10706457d9fcSYoichi Yuasa 10711097c6acSYoichi Yuasaconfig CEVT_GT641XX 10721097c6acSYoichi Yuasa bool 10731097c6acSYoichi Yuasa 107442f77542SRalf Baechleconfig CEVT_R4K 107542f77542SRalf Baechle bool 107642f77542SRalf Baechle 1077217dd11eSRalf Baechleconfig CEVT_SB1250 1078217dd11eSRalf Baechle bool 1079217dd11eSRalf Baechle 1080229f773eSAtsushi Nemotoconfig CEVT_TXX9 1081229f773eSAtsushi Nemoto bool 1082229f773eSAtsushi Nemoto 1083217dd11eSRalf Baechleconfig CSRC_BCM1480 1084217dd11eSRalf Baechle bool 1085217dd11eSRalf Baechle 10864247417dSYoichi Yuasaconfig CSRC_IOASIC 10874247417dSYoichi Yuasa bool 10884247417dSYoichi Yuasa 1089940f6b48SRalf Baechleconfig CSRC_R4K 1090940f6b48SRalf Baechle bool 1091940f6b48SRalf Baechle 1092217dd11eSRalf Baechleconfig CSRC_SB1250 1093217dd11eSRalf Baechle bool 1094217dd11eSRalf Baechle 1095a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL 1096a7f4df4eSAlex Smith def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1097a7f4df4eSAlex Smith 1098a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 1099d30a2b47SLinus Walleij select GPIOLIB 1100a9aec7feSAtsushi Nemoto bool 1101a9aec7feSAtsushi Nemoto 11020e2794b0SRalf Baechleconfig FW_CFE 1103df78b5c8SAurelien Jarno bool 1104df78b5c8SAurelien Jarno 110540e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES 110640e084a5SRalf Baechle bool 110740e084a5SRalf Baechle 1108885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1109885014bcSFelix Fietkau select DMA_NONCOHERENT 1110885014bcSFelix Fietkau bool 1111885014bcSFelix Fietkau 111220d33064SPaul Burtonconfig DMA_PERDEV_COHERENT 111320d33064SPaul Burton bool 111420d33064SPaul Burton select DMA_MAYBE_COHERENT 111520d33064SPaul Burton 11161da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 11171da177e4SLinus Torvalds bool 1118f8c55dc6SChristoph Hellwig select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1119f8c55dc6SChristoph Hellwig select ARCH_HAS_SYNC_DMA_FOR_CPU 1120e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 1121f8c55dc6SChristoph Hellwig select DMA_NONCOHERENT_MMAP 1122f8c55dc6SChristoph Hellwig select DMA_NONCOHERENT_CACHE_SYNC 112328f512d9SChristoph Hellwig select DMA_NONCOHERENT_OPS 11244ce588cdSRalf Baechle 112536a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 11261da177e4SLinus Torvalds bool 11271da177e4SLinus Torvalds 11281b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1129dbb74540SRalf Baechle bool 1130dbb74540SRalf Baechle 11311da177e4SLinus Torvaldsconfig MIPS_BONITO64 11321da177e4SLinus Torvalds bool 11331da177e4SLinus Torvalds 11341da177e4SLinus Torvaldsconfig MIPS_MSC 11351da177e4SLinus Torvalds bool 11361da177e4SLinus Torvalds 11371f21d2bdSBrian Murphyconfig MIPS_NILE4 11381f21d2bdSBrian Murphy bool 11391f21d2bdSBrian Murphy 114039b8d525SRalf Baechleconfig SYNC_R4K 114139b8d525SRalf Baechle bool 114239b8d525SRalf Baechle 1143487d70d0SGabor Juhosconfig MIPS_MACHINE 1144487d70d0SGabor Juhos def_bool n 1145487d70d0SGabor Juhos 1146ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1147d388d685SMaciej W. Rozycki def_bool n 1148d388d685SMaciej W. Rozycki 11494e0748f5SMarkos Chandrasconfig GENERIC_CSUM 11504e0748f5SMarkos Chandras bool 11514e0748f5SMarkos Chandras 11528313da30SRalf Baechleconfig GENERIC_ISA_DMA 11538313da30SRalf Baechle bool 11548313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1155a35bee8aSNamhyung Kim select ISA_DMA_API 11568313da30SRalf Baechle 1157aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1158aa414dffSRalf Baechle bool 11598313da30SRalf Baechle select GENERIC_ISA_DMA 1160aa414dffSRalf Baechle 1161a35bee8aSNamhyung Kimconfig ISA_DMA_API 1162a35bee8aSNamhyung Kim bool 1163a35bee8aSNamhyung Kim 1164465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1165465aaed0SDavid Daney bool 1166465aaed0SDavid Daney 11678c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE 11688c530ea3SMatt Redfearn bool 11698c530ea3SMatt Redfearn help 11708c530ea3SMatt Redfearn Selected if the platform supports relocating the kernel. 11718c530ea3SMatt Redfearn The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF 11728c530ea3SMatt Redfearn to allow access to command line and entropy sources. 11738c530ea3SMatt Redfearn 1174f381bf6dSDavid Daneyconfig MIPS_CBPF_JIT 1175f381bf6dSDavid Daney def_bool y 1176f381bf6dSDavid Daney depends on BPF_JIT && HAVE_CBPF_JIT 1177f381bf6dSDavid Daney 1178f381bf6dSDavid Daneyconfig MIPS_EBPF_JIT 1179f381bf6dSDavid Daney def_bool y 1180f381bf6dSDavid Daney depends on BPF_JIT && HAVE_EBPF_JIT 1181f381bf6dSDavid Daney 1182f381bf6dSDavid Daney 11835e83d430SRalf Baechle# 11846b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 11855e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 11865e83d430SRalf Baechle# choice statement should be more obvious to the user. 11875e83d430SRalf Baechle# 11885e83d430SRalf Baechlechoice 11896b2aac42SMasanari Iida prompt "Endianness selection" 11901da177e4SLinus Torvalds help 11911da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 11925e83d430SRalf Baechle byte order. These modes require different kernels and a different 11933cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 11945e83d430SRalf Baechle particular system but some systems are just as commonly used in the 11953dde6ad8SDavid Sterba one or the other endianness. 11965e83d430SRalf Baechle 11975e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 11985e83d430SRalf Baechle bool "Big endian" 11995e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 12005e83d430SRalf Baechle 12015e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 12025e83d430SRalf Baechle bool "Little endian" 12035e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 12045e83d430SRalf Baechle 12055e83d430SRalf Baechleendchoice 12065e83d430SRalf Baechle 120722b0763aSDavid Daneyconfig EXPORT_UASM 120822b0763aSDavid Daney bool 120922b0763aSDavid Daney 12102116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 12112116245eSRalf Baechle bool 12122116245eSRalf Baechle 12135e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 12145e83d430SRalf Baechle bool 12155e83d430SRalf Baechle 12165e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 12175e83d430SRalf Baechle bool 12181da177e4SLinus Torvalds 12199cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 12209cffd154SDavid Daney bool 12219cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 12229cffd154SDavid Daney default y 12239cffd154SDavid Daney 1224aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1225aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1226aa1762f4SDavid Daney 12271da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 12281da177e4SLinus Torvalds bool 12291da177e4SLinus Torvalds 12309267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 12319267a30dSMarc St-Jean bool 12329267a30dSMarc St-Jean 12339267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 12349267a30dSMarc St-Jean bool 12359267a30dSMarc St-Jean 12368420fd00SAtsushi Nemotoconfig IRQ_TXX9 12378420fd00SAtsushi Nemoto bool 12388420fd00SAtsushi Nemoto 1239d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1240d5ab1a69SYoichi Yuasa bool 1241d5ab1a69SYoichi Yuasa 1242252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 12431da177e4SLinus Torvalds bool 12441da177e4SLinus Torvalds 12459267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 12469267a30dSMarc St-Jean bool 12479267a30dSMarc St-Jean 1248a83860c2SRalf Baechleconfig SOC_EMMA2RH 1249a83860c2SRalf Baechle bool 1250a83860c2SRalf Baechle select CEVT_R4K 1251a83860c2SRalf Baechle select CSRC_R4K 1252a83860c2SRalf Baechle select DMA_NONCOHERENT 125367e38cf2SRalf Baechle select IRQ_MIPS_CPU 1254a83860c2SRalf Baechle select SWAP_IO_SPACE 1255a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1256a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1257a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1258a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1259a83860c2SRalf Baechle 1260edb6310aSDaniel Lairdconfig SOC_PNX833X 1261edb6310aSDaniel Laird bool 1262edb6310aSDaniel Laird select CEVT_R4K 1263edb6310aSDaniel Laird select CSRC_R4K 126467e38cf2SRalf Baechle select IRQ_MIPS_CPU 1265edb6310aSDaniel Laird select DMA_NONCOHERENT 1266edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1267edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1268edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1269edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1270377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1271edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1272edb6310aSDaniel Laird 1273edb6310aSDaniel Lairdconfig SOC_PNX8335 1274edb6310aSDaniel Laird bool 1275edb6310aSDaniel Laird select SOC_PNX833X 1276edb6310aSDaniel Laird 1277a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1278a7e07b1aSMarkos Chandras bool 1279a7e07b1aSMarkos Chandras 12801da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 12811da177e4SLinus Torvalds bool 12821da177e4SLinus Torvalds 1283e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1284e2defae5SThomas Bogendoerfer bool 1285e2defae5SThomas Bogendoerfer 12865b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 12875b438c44SThomas Bogendoerfer bool 12885b438c44SThomas Bogendoerfer 1289e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1290e2defae5SThomas Bogendoerfer bool 1291e2defae5SThomas Bogendoerfer 1292e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1293e2defae5SThomas Bogendoerfer bool 1294e2defae5SThomas Bogendoerfer 1295e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1296e2defae5SThomas Bogendoerfer bool 1297e2defae5SThomas Bogendoerfer 1298e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1299e2defae5SThomas Bogendoerfer bool 1300e2defae5SThomas Bogendoerfer 1301e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1302e2defae5SThomas Bogendoerfer bool 1303e2defae5SThomas Bogendoerfer 13040e2794b0SRalf Baechleconfig FW_ARC32 13055e83d430SRalf Baechle bool 13065e83d430SRalf Baechle 1307aaa9fad3SPaul Bolleconfig FW_SNIPROM 1308231a35d3SThomas Bogendoerfer bool 1309231a35d3SThomas Bogendoerfer 13101da177e4SLinus Torvaldsconfig BOOT_ELF32 13111da177e4SLinus Torvalds bool 13121da177e4SLinus Torvalds 1313930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1314930beb5aSFlorian Fainelli bool 1315930beb5aSFlorian Fainelli 1316930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1317930beb5aSFlorian Fainelli bool 1318930beb5aSFlorian Fainelli 1319930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1320930beb5aSFlorian Fainelli bool 1321930beb5aSFlorian Fainelli 1322930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1323930beb5aSFlorian Fainelli bool 1324930beb5aSFlorian Fainelli 13251da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 13261da177e4SLinus Torvalds int 1327a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 13285432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 13295432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 13305432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 13311da177e4SLinus Torvalds default "5" 13321da177e4SLinus Torvalds 13331da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 13341da177e4SLinus Torvalds bool 13351da177e4SLinus Torvalds 13361da177e4SLinus Torvaldsconfig ARC_CONSOLE 13371da177e4SLinus Torvalds bool "ARC console support" 1338e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 13391da177e4SLinus Torvalds 13401da177e4SLinus Torvaldsconfig ARC_MEMORY 13411da177e4SLinus Torvalds bool 134214b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 13431da177e4SLinus Torvalds default y 13441da177e4SLinus Torvalds 13451da177e4SLinus Torvaldsconfig ARC_PROMLIB 13461da177e4SLinus Torvalds bool 1347e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 13481da177e4SLinus Torvalds default y 13491da177e4SLinus Torvalds 13500e2794b0SRalf Baechleconfig FW_ARC64 13511da177e4SLinus Torvalds bool 13521da177e4SLinus Torvalds 13531da177e4SLinus Torvaldsconfig BOOT_ELF64 13541da177e4SLinus Torvalds bool 13551da177e4SLinus Torvalds 13561da177e4SLinus Torvaldsmenu "CPU selection" 13571da177e4SLinus Torvalds 13581da177e4SLinus Torvaldschoice 13591da177e4SLinus Torvalds prompt "CPU type" 13601da177e4SLinus Torvalds default CPU_R4X00 13611da177e4SLinus Torvalds 13620e476d91SHuacai Chenconfig CPU_LOONGSON3 13630e476d91SHuacai Chen bool "Loongson 3 CPU" 13640e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 1365d3bc81beSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 13660e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 13670e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 13680e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 13690e476d91SHuacai Chen select WEAK_ORDERING 13700e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 1371b2edcfc8SHuacai Chen select MIPS_PGD_C0_CONTEXT 137217c99d94SHuacai Chen select MIPS_L1_CACHE_SHIFT_6 1373d30a2b47SLinus Walleij select GPIOLIB 137409230cbcSChristoph Hellwig select SWIOTLB 13750e476d91SHuacai Chen help 13760e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 13770e476d91SHuacai Chen set with many extensions. 13780e476d91SHuacai Chen 13791e820da3SHuacai Chenconfig LOONGSON3_ENHANCEMENT 13801e820da3SHuacai Chen bool "New Loongson 3 CPU Enhancements" 13811e820da3SHuacai Chen default n 13821e820da3SHuacai Chen select CPU_MIPSR2 13831e820da3SHuacai Chen select CPU_HAS_PREFETCH 13841e820da3SHuacai Chen depends on CPU_LOONGSON3 13851e820da3SHuacai Chen help 13861e820da3SHuacai Chen New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A 13871e820da3SHuacai Chen R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as 13881e820da3SHuacai Chen FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User 13891e820da3SHuacai Chen Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), 13901e820da3SHuacai Chen Fast TLB refill support, etc. 13911e820da3SHuacai Chen 13921e820da3SHuacai Chen This option enable those enhancements which are not probed at run 13931e820da3SHuacai Chen time. If you want a generic kernel to run on all Loongson 3 machines, 13941e820da3SHuacai Chen please say 'N' here. If you want a high-performance kernel to run on 13951e820da3SHuacai Chen new Loongson 3 machines only, please say 'Y' here. 13961e820da3SHuacai Chen 13973702bba5SWu Zhangjinconfig CPU_LOONGSON2E 13983702bba5SWu Zhangjin bool "Loongson 2E" 13993702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 14003702bba5SWu Zhangjin select CPU_LOONGSON2 14012a21c730SFuxin Zhang help 14022a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 14032a21c730SFuxin Zhang with many extensions. 14042a21c730SFuxin Zhang 140525985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 14066f7a251aSWu Zhangjin bonito64. 14076f7a251aSWu Zhangjin 14086f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 14096f7a251aSWu Zhangjin bool "Loongson 2F" 14106f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 14116f7a251aSWu Zhangjin select CPU_LOONGSON2 1412d30a2b47SLinus Walleij select GPIOLIB 14136f7a251aSWu Zhangjin help 14146f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 14156f7a251aSWu Zhangjin with many extensions. 14166f7a251aSWu Zhangjin 14176f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 14186f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 14196f7a251aSWu Zhangjin Loongson2E. 14206f7a251aSWu Zhangjin 1421ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1422ca585cf9SKelvin Cheung bool "Loongson 1B" 1423ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1424ca585cf9SKelvin Cheung select CPU_LOONGSON1 14259ec88b60SKelvin Cheung select LEDS_GPIO_REGISTER 1426ca585cf9SKelvin Cheung help 1427ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1428968dc5a0S谢致邦 (XIE Zhibang) Release 1 instruction set and part of the MIPS32 Release 2 1429968dc5a0S谢致邦 (XIE Zhibang) instruction set. 1430ca585cf9SKelvin Cheung 143112e3280bSYang Lingconfig CPU_LOONGSON1C 143212e3280bSYang Ling bool "Loongson 1C" 143312e3280bSYang Ling depends on SYS_HAS_CPU_LOONGSON1C 143412e3280bSYang Ling select CPU_LOONGSON1 143512e3280bSYang Ling select LEDS_GPIO_REGISTER 143612e3280bSYang Ling help 143712e3280bSYang Ling The Loongson 1C is a 32-bit SoC, which implements the MIPS32 1438968dc5a0S谢致邦 (XIE Zhibang) Release 1 instruction set and part of the MIPS32 Release 2 1439968dc5a0S谢致邦 (XIE Zhibang) instruction set. 144012e3280bSYang Ling 14416e760c8dSRalf Baechleconfig CPU_MIPS32_R1 14426e760c8dSRalf Baechle bool "MIPS32 Release 1" 14437cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 14446e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1445797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1446ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14476e760c8dSRalf Baechle help 14485e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 14491e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14501e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14511e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14521e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14531e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 14541e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 14551e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 14561e5f1caaSRalf Baechle performance. 14571e5f1caaSRalf Baechle 14581e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 14591e5f1caaSRalf Baechle bool "MIPS32 Release 2" 14607cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 14611e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1462797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1463ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1464a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14652235a54dSSanjay Lal select HAVE_KVM 14661e5f1caaSRalf Baechle help 14675e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 14686e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14696e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14706e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14716e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14721da177e4SLinus Torvalds 14737fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 1474674d10e2SMarkos Chandras bool "MIPS32 Release 6" 14757fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 14767fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14777fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14787fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14797fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14804e0748f5SMarkos Chandras select GENERIC_CSUM 14817fd08ca5SLeonid Yegoshin select HAVE_KVM 14827fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 14837fd08ca5SLeonid Yegoshin help 14847fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14857fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 14867fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 14877fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 14887fd08ca5SLeonid Yegoshin 14896e760c8dSRalf Baechleconfig CPU_MIPS64_R1 14906e760c8dSRalf Baechle bool "MIPS64 Release 1" 14917cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1492797798c1SRalf Baechle select CPU_HAS_PREFETCH 1493ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1494ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1495ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14969cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14976e760c8dSRalf Baechle help 14986e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 14996e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 15006e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 15016e760c8dSRalf Baechle specific type of processor in your system, choose those that one 15026e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 15031e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 15041e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 15051e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 15061e5f1caaSRalf Baechle performance. 15071e5f1caaSRalf Baechle 15081e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 15091e5f1caaSRalf Baechle bool "MIPS64 Release 2" 15107cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1511797798c1SRalf Baechle select CPU_HAS_PREFETCH 15121e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 15131e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1514ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15159cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1516a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 151740a2df49SJames Hogan select HAVE_KVM 15181e5f1caaSRalf Baechle help 15191e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 15201e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 15211e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 15221e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 15231e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 15241da177e4SLinus Torvalds 15257fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 1526674d10e2SMarkos Chandras bool "MIPS64 Release 6" 15277fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 15287fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 15297fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 15307fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 15317fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 15327fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 15334e0748f5SMarkos Chandras select GENERIC_CSUM 15342e6c7747SJames Hogan select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 153540a2df49SJames Hogan select HAVE_KVM 15367fd08ca5SLeonid Yegoshin help 15377fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 15387fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 15397fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 15407fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 15417fd08ca5SLeonid Yegoshin 15421da177e4SLinus Torvaldsconfig CPU_R3000 15431da177e4SLinus Torvalds bool "R3000" 15447cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1545f7062ddbSRalf Baechle select CPU_HAS_WB 1546ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1547797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15481da177e4SLinus Torvalds help 15491da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 15501da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 15511da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 15521da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 15531da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 15541da177e4SLinus Torvalds try to recompile with R3000. 15551da177e4SLinus Torvalds 15561da177e4SLinus Torvaldsconfig CPU_TX39XX 15571da177e4SLinus Torvalds bool "R39XX" 15587cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1559ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15601da177e4SLinus Torvalds 15611da177e4SLinus Torvaldsconfig CPU_VR41XX 15621da177e4SLinus Torvalds bool "R41xx" 15637cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1564ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1565ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15661da177e4SLinus Torvalds help 15675e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 15681da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 15691da177e4SLinus Torvalds kernel built with this option will not run on any other type of 15701da177e4SLinus Torvalds processor or vice versa. 15711da177e4SLinus Torvalds 15721da177e4SLinus Torvaldsconfig CPU_R4300 15731da177e4SLinus Torvalds bool "R4300" 15747cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1575ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1576ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15771da177e4SLinus Torvalds help 15781da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 15791da177e4SLinus Torvalds 15801da177e4SLinus Torvaldsconfig CPU_R4X00 15811da177e4SLinus Torvalds bool "R4x00" 15827cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1583ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1584ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1585970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15861da177e4SLinus Torvalds help 15871da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 15881da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 15891da177e4SLinus Torvalds 15901da177e4SLinus Torvaldsconfig CPU_TX49XX 15911da177e4SLinus Torvalds bool "R49XX" 15927cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1593de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1594ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1595ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1596970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15971da177e4SLinus Torvalds 15981da177e4SLinus Torvaldsconfig CPU_R5000 15991da177e4SLinus Torvalds bool "R5000" 16007cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1601ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1602ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1603970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16041da177e4SLinus Torvalds help 16051da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 16061da177e4SLinus Torvalds 16071da177e4SLinus Torvaldsconfig CPU_R5432 16081da177e4SLinus Torvalds bool "R5432" 16097cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 16105e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 16115e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1612970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16131da177e4SLinus Torvalds 1614542c1020SShinya Kuribayashiconfig CPU_R5500 1615542c1020SShinya Kuribayashi bool "R5500" 1616542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1617542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1618542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 16199cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1620542c1020SShinya Kuribayashi help 1621542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1622542c1020SShinya Kuribayashi instruction set. 1623542c1020SShinya Kuribayashi 16241da177e4SLinus Torvaldsconfig CPU_NEVADA 16251da177e4SLinus Torvalds bool "RM52xx" 16267cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1627ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1628ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1629970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16301da177e4SLinus Torvalds help 16311da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 16321da177e4SLinus Torvalds 16331da177e4SLinus Torvaldsconfig CPU_R8000 16341da177e4SLinus Torvalds bool "R8000" 16357cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 16365e83d430SRalf Baechle select CPU_HAS_PREFETCH 1637ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 16381da177e4SLinus Torvalds help 16391da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 16401da177e4SLinus Torvalds uncommon and the support for them is incomplete. 16411da177e4SLinus Torvalds 16421da177e4SLinus Torvaldsconfig CPU_R10000 16431da177e4SLinus Torvalds bool "R10000" 16447cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 16455e83d430SRalf Baechle select CPU_HAS_PREFETCH 1646ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1647ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1648797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1649970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16501da177e4SLinus Torvalds help 16511da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 16521da177e4SLinus Torvalds 16531da177e4SLinus Torvaldsconfig CPU_RM7000 16541da177e4SLinus Torvalds bool "RM7000" 16557cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 16565e83d430SRalf Baechle select CPU_HAS_PREFETCH 1657ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1658ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1659797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1660970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16611da177e4SLinus Torvalds 16621da177e4SLinus Torvaldsconfig CPU_SB1 16631da177e4SLinus Torvalds bool "SB1" 16647cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1665ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1666ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1667797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1668970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16690004a9dfSRalf Baechle select WEAK_ORDERING 16701da177e4SLinus Torvalds 1671a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1672a86c7f72SDavid Daney bool "Cavium Octeon processor" 16735e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1674a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1675a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1676a86c7f72SDavid Daney select WEAK_ORDERING 1677a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 16789cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1679df115f3eSBen Hutchings select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1680df115f3eSBen Hutchings select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1681930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 16820ae3abcdSJames Hogan select HAVE_KVM 1683a86c7f72SDavid Daney help 1684a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1685a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1686a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1687a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1688a86c7f72SDavid Daney 1689cd746249SJonas Gorskiconfig CPU_BMIPS 1690cd746249SJonas Gorski bool "Broadcom BMIPS" 1691cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1692cd746249SJonas Gorski select CPU_MIPS32 1693fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1694cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1695cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1696cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1697cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1698cd746249SJonas Gorski select DMA_NONCOHERENT 169967e38cf2SRalf Baechle select IRQ_MIPS_CPU 1700cd746249SJonas Gorski select SWAP_IO_SPACE 1701cd746249SJonas Gorski select WEAK_ORDERING 1702c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 170369aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1704a8d709b0SMarkus Mayer select CPU_SUPPORTS_CPUFREQ 1705a8d709b0SMarkus Mayer select MIPS_EXTERNAL_TIMER 1706c1c0c461SKevin Cernekee help 1707fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1708c1c0c461SKevin Cernekee 17097f058e85SJayachandran Cconfig CPU_XLR 17107f058e85SJayachandran C bool "Netlogic XLR SoC" 17117f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 17127f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17137f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17147f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1715970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17167f058e85SJayachandran C select WEAK_ORDERING 17177f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17187f058e85SJayachandran C help 17197f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 17201c773ea4SJayachandran C 17211c773ea4SJayachandran Cconfig CPU_XLP 17221c773ea4SJayachandran C bool "Netlogic XLP SoC" 17231c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 17241c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17251c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17261c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 17271c773ea4SJayachandran C select WEAK_ORDERING 17281c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17291c773ea4SJayachandran C select CPU_HAS_PREFETCH 1730d6504846SJayachandran C select CPU_MIPSR2 1731ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 17322db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 17331c773ea4SJayachandran C help 17341c773ea4SJayachandran C Netlogic Microsystems XLP processors. 17351da177e4SLinus Torvaldsendchoice 17361da177e4SLinus Torvalds 1737a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1738a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1739a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 17407fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1741a6e18781SLeonid Yegoshin help 1742a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1743a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1744a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1745a6e18781SLeonid Yegoshin 1746a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1747a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1748a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1749a6e18781SLeonid Yegoshin select EVA 1750a6e18781SLeonid Yegoshin default y 1751a6e18781SLeonid Yegoshin help 1752a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1753a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1754a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1755a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1756a6e18781SLeonid Yegoshin 1757c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1758c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1759c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1760c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1761c5b36783SSteven J. Hill help 1762c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1763c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1764c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1765c5b36783SSteven J. Hill 1766c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1767c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1768c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1769c5b36783SSteven J. Hill depends on !EVA 1770c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1771c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1772c5b36783SSteven J. Hill select XPA 1773c5b36783SSteven J. Hill select HIGHMEM 1774d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 1775c5b36783SSteven J. Hill default n 1776c5b36783SSteven J. Hill help 1777c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1778c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1779c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1780c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1781c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1782c5b36783SSteven J. Hill If unsure, say 'N' here. 1783c5b36783SSteven J. Hill 1784622844bfSWu Zhangjinif CPU_LOONGSON2F 1785622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1786622844bfSWu Zhangjin bool 1787622844bfSWu Zhangjin 1788622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1789622844bfSWu Zhangjin bool 1790622844bfSWu Zhangjin 1791622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1792622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1793622844bfSWu Zhangjin default y 1794622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1795622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1796622844bfSWu Zhangjin help 1797622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1798622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1799622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1800622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1801622844bfSWu Zhangjin 1802622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1803622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1804622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1805622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1806622844bfSWu Zhangjin systems. 1807622844bfSWu Zhangjin 1808622844bfSWu Zhangjin If unsure, please say Y. 1809622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1810622844bfSWu Zhangjin 18111b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 18121b93b3c3SWu Zhangjin bool 18131b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 18141b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 181531c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 18161b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1817fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 18184e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 18191b93b3c3SWu Zhangjin 18201b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 18211b93b3c3SWu Zhangjin bool 18221b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 18231b93b3c3SWu Zhangjin 1824dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM 1825dbb98314SAlban Bedel bool 1826dbb98314SAlban Bedel select SYS_SUPPORTS_ZBOOT 1827dbb98314SAlban Bedel 18283702bba5SWu Zhangjinconfig CPU_LOONGSON2 18293702bba5SWu Zhangjin bool 18303702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 18313702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 18323702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1833970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 1834e905086eSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 18353702bba5SWu Zhangjin 1836ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1837ca585cf9SKelvin Cheung bool 1838ca585cf9SKelvin Cheung select CPU_MIPS32 1839968dc5a0S谢致邦 (XIE Zhibang) select CPU_MIPSR1 1840ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1841ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1842ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1843f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1844ca585cf9SKelvin Cheung 1845fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 184604fa8bf7SJonas Gorski select SMP_UP if SMP 18471bbb6c1bSKevin Cernekee bool 1848cd746249SJonas Gorski 1849cd746249SJonas Gorskiconfig CPU_BMIPS4350 1850cd746249SJonas Gorski bool 1851cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1852cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1853cd746249SJonas Gorski 1854cd746249SJonas Gorskiconfig CPU_BMIPS4380 1855cd746249SJonas Gorski bool 1856bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1857cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1858cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1859b4720809SFlorian Fainelli select CPU_HAS_RIXI 1860cd746249SJonas Gorski 1861cd746249SJonas Gorskiconfig CPU_BMIPS5000 1862cd746249SJonas Gorski bool 1863cd746249SJonas Gorski select MIPS_CPU_SCACHE 1864bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1865cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1866cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1867b4720809SFlorian Fainelli select CPU_HAS_RIXI 18681bbb6c1bSKevin Cernekee 18690e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 18700e476d91SHuacai Chen bool 18710e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 1872b2edcfc8SHuacai Chen select CPU_HAS_RIXI 18730e476d91SHuacai Chen 18743702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 18752a21c730SFuxin Zhang bool 18762a21c730SFuxin Zhang 18776f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 18786f7a251aSWu Zhangjin bool 187955045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 188055045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 188122f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 18826f7a251aSWu Zhangjin 1883ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1884ca585cf9SKelvin Cheung bool 1885ca585cf9SKelvin Cheung 188612e3280bSYang Lingconfig SYS_HAS_CPU_LOONGSON1C 188712e3280bSYang Ling bool 188812e3280bSYang Ling 18897cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 18907cf8053bSRalf Baechle bool 18917cf8053bSRalf Baechle 18927cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 18937cf8053bSRalf Baechle bool 18947cf8053bSRalf Baechle 1895a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1896a6e18781SLeonid Yegoshin bool 1897a6e18781SLeonid Yegoshin 1898c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1899c5b36783SSteven J. Hill bool 1900c5b36783SSteven J. Hill 19017fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 19027fd08ca5SLeonid Yegoshin bool 19037fd08ca5SLeonid Yegoshin 19047cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 19057cf8053bSRalf Baechle bool 19067cf8053bSRalf Baechle 19077cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 19087cf8053bSRalf Baechle bool 19097cf8053bSRalf Baechle 19107fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 19117fd08ca5SLeonid Yegoshin bool 19127fd08ca5SLeonid Yegoshin 19137cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 19147cf8053bSRalf Baechle bool 19157cf8053bSRalf Baechle 19167cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 19177cf8053bSRalf Baechle bool 19187cf8053bSRalf Baechle 19197cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 19207cf8053bSRalf Baechle bool 19217cf8053bSRalf Baechle 19227cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 19237cf8053bSRalf Baechle bool 19247cf8053bSRalf Baechle 19257cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 19267cf8053bSRalf Baechle bool 19277cf8053bSRalf Baechle 19287cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 19297cf8053bSRalf Baechle bool 19307cf8053bSRalf Baechle 19317cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 19327cf8053bSRalf Baechle bool 19337cf8053bSRalf Baechle 19347cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 19357cf8053bSRalf Baechle bool 19367cf8053bSRalf Baechle 1937542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1938542c1020SShinya Kuribayashi bool 1939542c1020SShinya Kuribayashi 19407cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 19417cf8053bSRalf Baechle bool 19427cf8053bSRalf Baechle 19437cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 19447cf8053bSRalf Baechle bool 19457cf8053bSRalf Baechle 19467cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 19477cf8053bSRalf Baechle bool 19487cf8053bSRalf Baechle 19497cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 19507cf8053bSRalf Baechle bool 19517cf8053bSRalf Baechle 19527cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 19537cf8053bSRalf Baechle bool 19547cf8053bSRalf Baechle 19555e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 19565e683389SDavid Daney bool 19575e683389SDavid Daney 1958cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1959c1c0c461SKevin Cernekee bool 1960c1c0c461SKevin Cernekee 1961fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1962c1c0c461SKevin Cernekee bool 1963cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1964c1c0c461SKevin Cernekee 1965c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1966c1c0c461SKevin Cernekee bool 1967cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1968c1c0c461SKevin Cernekee 1969c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1970c1c0c461SKevin Cernekee bool 1971cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1972c1c0c461SKevin Cernekee 1973c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1974c1c0c461SKevin Cernekee bool 1975cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1976c1c0c461SKevin Cernekee 19777f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 19787f058e85SJayachandran C bool 19797f058e85SJayachandran C 19801c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 19811c773ea4SJayachandran C bool 19821c773ea4SJayachandran C 198317099b11SRalf Baechle# 198417099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 198517099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 198617099b11SRalf Baechle# 19870004a9dfSRalf Baechleconfig WEAK_ORDERING 19880004a9dfSRalf Baechle bool 198917099b11SRalf Baechle 199017099b11SRalf Baechle# 199117099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 199217099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 199317099b11SRalf Baechle# 199417099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 199517099b11SRalf Baechle bool 19965e83d430SRalf Baechleendmenu 19975e83d430SRalf Baechle 19985e83d430SRalf Baechle# 19995e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 20005e83d430SRalf Baechle# 20015e83d430SRalf Baechleconfig CPU_MIPS32 20025e83d430SRalf Baechle bool 20037fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 20045e83d430SRalf Baechle 20055e83d430SRalf Baechleconfig CPU_MIPS64 20065e83d430SRalf Baechle bool 20077fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 20085e83d430SRalf Baechle 20095e83d430SRalf Baechle# 2010c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 20115e83d430SRalf Baechle# 20125e83d430SRalf Baechleconfig CPU_MIPSR1 20135e83d430SRalf Baechle bool 20145e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 20155e83d430SRalf Baechle 20165e83d430SRalf Baechleconfig CPU_MIPSR2 20175e83d430SRalf Baechle bool 2018a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 20198256b17eSFlorian Fainelli select CPU_HAS_RIXI 2020a7e07b1aSMarkos Chandras select MIPS_SPRAM 20215e83d430SRalf Baechle 20227fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 20237fd08ca5SLeonid Yegoshin bool 20247fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 20258256b17eSFlorian Fainelli select CPU_HAS_RIXI 202687321fddSPaul Burton select HAVE_ARCH_BITREVERSE 20272db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 20284a5dc51eSMarcin Nowakowski select MIPS_CRC_SUPPORT 2029a7e07b1aSMarkos Chandras select MIPS_SPRAM 20305e83d430SRalf Baechle 2031a6e18781SLeonid Yegoshinconfig EVA 2032a6e18781SLeonid Yegoshin bool 2033a6e18781SLeonid Yegoshin 2034c5b36783SSteven J. Hillconfig XPA 2035c5b36783SSteven J. Hill bool 2036c5b36783SSteven J. Hill 20375e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 20385e83d430SRalf Baechle bool 20395e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 20405e83d430SRalf Baechle bool 20415e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 20425e83d430SRalf Baechle bool 20435e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 20445e83d430SRalf Baechle bool 204555045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 204655045ff5SWu Zhangjin bool 204755045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 204855045ff5SWu Zhangjin bool 20499cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 20509cffd154SDavid Daney bool 205122f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 205222f1fdfdSWu Zhangjin bool 205382622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 205482622284SDavid Daney bool 2055cebf8c0fSPaul Burton default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP 20565e83d430SRalf Baechle 20578192c9eaSDavid Daney# 20588192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 20598192c9eaSDavid Daney# 20608192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 20618192c9eaSDavid Daney bool 2062679eb637SJames Hogan default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 20638192c9eaSDavid Daney 20645e83d430SRalf Baechlemenu "Kernel type" 20655e83d430SRalf Baechle 20665e83d430SRalf Baechlechoice 20675e83d430SRalf Baechle prompt "Kernel code model" 20685e83d430SRalf Baechle help 20695e83d430SRalf Baechle You should only select this option if you have a workload that 20705e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 20715e83d430SRalf Baechle large memory. You will only be presented a single option in this 20725e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 20735e83d430SRalf Baechle 20745e83d430SRalf Baechleconfig 32BIT 20755e83d430SRalf Baechle bool "32-bit kernel" 20765e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 20775e83d430SRalf Baechle select TRAD_SIGNALS 20785e83d430SRalf Baechle help 20795e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 2080f17c4ca3SRalf Baechle 20815e83d430SRalf Baechleconfig 64BIT 20825e83d430SRalf Baechle bool "64-bit kernel" 20835e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 20845e83d430SRalf Baechle help 20855e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 20865e83d430SRalf Baechle 20875e83d430SRalf Baechleendchoice 20885e83d430SRalf Baechle 20892235a54dSSanjay Lalconfig KVM_GUEST 20902235a54dSSanjay Lal bool "KVM Guest Kernel" 2091f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 20922235a54dSSanjay Lal help 2093caa1faa7SJames Hogan Select this option if building a guest kernel for KVM (Trap & Emulate) 2094caa1faa7SJames Hogan mode. 20952235a54dSSanjay Lal 2096eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 2097eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 20982235a54dSSanjay Lal depends on KVM_GUEST 2099eda3d33cSJames Hogan default 100 21002235a54dSSanjay Lal help 2101eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 2102eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 2103eda3d33cSJames Hogan timer frequency is specified directly. 21042235a54dSSanjay Lal 21051e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48 21061e321fa9SLeonid Yegoshin bool "48 bits virtual memory" 21071e321fa9SLeonid Yegoshin depends on 64BIT 21081e321fa9SLeonid Yegoshin help 21093377e227SAlex Belits Support a maximum at least 48 bits of application virtual 21103377e227SAlex Belits memory. Default is 40 bits or less, depending on the CPU. 21113377e227SAlex Belits For page sizes 16k and above, this option results in a small 21123377e227SAlex Belits memory overhead for page tables. For 4k page size, a fourth 21133377e227SAlex Belits level of page tables is added which imposes both a memory 21143377e227SAlex Belits overhead as well as slower TLB fault handling. 21153377e227SAlex Belits 21161e321fa9SLeonid Yegoshin If unsure, say N. 21171e321fa9SLeonid Yegoshin 21181da177e4SLinus Torvaldschoice 21191da177e4SLinus Torvalds prompt "Kernel page size" 21201da177e4SLinus Torvalds default PAGE_SIZE_4KB 21211da177e4SLinus Torvalds 21221da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 21231da177e4SLinus Torvalds bool "4kB" 21240e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 21251da177e4SLinus Torvalds help 21261da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 21271da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 21281da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 21291da177e4SLinus Torvalds recommended for low memory systems. 21301da177e4SLinus Torvalds 21311da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 21321da177e4SLinus Torvalds bool "8kB" 21337d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 21341e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 21351da177e4SLinus Torvalds help 21361da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 21371da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2138c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 2139c52399beSRalf Baechle suitable Linux distribution to support this. 21401da177e4SLinus Torvalds 21411da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 21421da177e4SLinus Torvalds bool "16kB" 2143714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 21441da177e4SLinus Torvalds help 21451da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 21461da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2147714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2148714bfad6SRalf Baechle Linux distribution to support this. 21491da177e4SLinus Torvalds 2150c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2151c52399beSRalf Baechle bool "32kB" 2152c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 21531e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 2154c52399beSRalf Baechle help 2155c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2156c52399beSRalf Baechle the price of higher memory consumption. This option is available 2157c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2158c52399beSRalf Baechle distribution to support this. 2159c52399beSRalf Baechle 21601da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 21611da177e4SLinus Torvalds bool "64kB" 21623b2db173SPaul Burton depends on !CPU_R3000 && !CPU_TX39XX 21631da177e4SLinus Torvalds help 21641da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 21651da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 21661da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2167714bfad6SRalf Baechle writing this option is still high experimental. 21681da177e4SLinus Torvalds 21691da177e4SLinus Torvaldsendchoice 21701da177e4SLinus Torvalds 2171c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2172c9bace7cSDavid Daney int "Maximum zone order" 2173e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2174e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2175e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2176e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2177e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2178e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2179c9bace7cSDavid Daney range 11 64 2180c9bace7cSDavid Daney default "11" 2181c9bace7cSDavid Daney help 2182c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2183c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2184c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2185c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2186c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2187c9bace7cSDavid Daney increase this value. 2188c9bace7cSDavid Daney 2189c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2190c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2191c9bace7cSDavid Daney 2192c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2193c9bace7cSDavid Daney when choosing a value for this option. 2194c9bace7cSDavid Daney 21951da177e4SLinus Torvaldsconfig BOARD_SCACHE 21961da177e4SLinus Torvalds bool 21971da177e4SLinus Torvalds 21981da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 21991da177e4SLinus Torvalds bool 22001da177e4SLinus Torvalds select BOARD_SCACHE 22011da177e4SLinus Torvalds 22029318c51aSChris Dearman# 22039318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 22049318c51aSChris Dearman# 22059318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 22069318c51aSChris Dearman bool 22079318c51aSChris Dearman select BOARD_SCACHE 22089318c51aSChris Dearman 22091da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 22101da177e4SLinus Torvalds bool 22111da177e4SLinus Torvalds select BOARD_SCACHE 22121da177e4SLinus Torvalds 22131da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 22141da177e4SLinus Torvalds bool 22151da177e4SLinus Torvalds select BOARD_SCACHE 22161da177e4SLinus Torvalds 22171da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 22181da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 22191da177e4SLinus Torvalds depends on CPU_SB1 22201da177e4SLinus Torvalds help 22211da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 22221da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 22231da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 22241da177e4SLinus Torvalds 22251da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2226c8094b53SRalf Baechle bool 22271da177e4SLinus Torvalds 22283165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 22293165c846SFlorian Fainelli bool 22303b2db173SPaul Burton default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX) 22313165c846SFlorian Fainelli 223291405eb6SFlorian Fainelliconfig CPU_R4K_FPU 223391405eb6SFlorian Fainelli bool 2234a2aea699SPaul Burton default y if !(CPU_R3000 || CPU_TX39XX) 223591405eb6SFlorian Fainelli 223662cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 223762cedc4fSFlorian Fainelli bool 223862cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 223962cedc4fSFlorian Fainelli 224059d6ab86SRalf Baechleconfig MIPS_MT_SMP 2241a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 22425cbf9688SPaul Burton default y 2243527f1028SPaul Burton depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS 224459d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2245d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2246c080faa5SSteven J. Hill select SYNC_R4K 224759d6ab86SRalf Baechle select MIPS_MT 224859d6ab86SRalf Baechle select SMP 224987353d8aSRalf Baechle select SMP_UP 2250c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2251c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2252399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 225359d6ab86SRalf Baechle help 2254c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2255c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2256c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2257c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2258c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 225959d6ab86SRalf Baechle 2260f41ae0b2SRalf Baechleconfig MIPS_MT 2261f41ae0b2SRalf Baechle bool 2262f41ae0b2SRalf Baechle 22630ab7aefcSRalf Baechleconfig SCHED_SMT 22640ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 22650ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 22660ab7aefcSRalf Baechle default n 22670ab7aefcSRalf Baechle help 22680ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 22690ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 22700ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 22710ab7aefcSRalf Baechle 22720ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 22730ab7aefcSRalf Baechle bool 22740ab7aefcSRalf Baechle 2275f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2276f41ae0b2SRalf Baechle bool 2277f41ae0b2SRalf Baechle 2278f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2279f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2280f088fc84SRalf Baechle default y 2281b633648cSRalf Baechle depends on MIPS_MT_SMP 228207cc0c9eSRalf Baechle 2283b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2284b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 22859eaa9a82SPaul Burton depends on CPU_MIPSR6 2286b0a668fbSLeonid Yegoshin default y 2287b0a668fbSLeonid Yegoshin help 2288b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2289b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 229007edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2291b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2292b0a668fbSLeonid Yegoshin final kernel image. 2293b0a668fbSLeonid Yegoshin 2294f35764e7SJames Hoganconfig SYS_SUPPORTS_VPE_LOADER 2295f35764e7SJames Hogan bool 2296f35764e7SJames Hogan depends on SYS_SUPPORTS_MULTITHREADING 2297f35764e7SJames Hogan help 2298f35764e7SJames Hogan Indicates that the platform supports the VPE loader, and provides 2299f35764e7SJames Hogan physical_memsize. 2300f35764e7SJames Hogan 230107cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 230207cc0c9eSRalf Baechle bool "VPE loader support." 2303f35764e7SJames Hogan depends on SYS_SUPPORTS_VPE_LOADER && MODULES 230407cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 230507cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 230607cc0c9eSRalf Baechle select MIPS_MT 230707cc0c9eSRalf Baechle help 230807cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 230907cc0c9eSRalf Baechle onto another VPE and running it. 2310f088fc84SRalf Baechle 231117a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 231217a1d523SDeng-Cheng Zhu bool 231317a1d523SDeng-Cheng Zhu default "y" 231417a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 231517a1d523SDeng-Cheng Zhu 23161a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 23171a2a6d7eSDeng-Cheng Zhu bool 23181a2a6d7eSDeng-Cheng Zhu default "y" 23191a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 23201a2a6d7eSDeng-Cheng Zhu 2321e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2322e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2323e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2324e01402b1SRalf Baechle default y 2325e01402b1SRalf Baechle help 2326e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2327e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2328e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2329e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2330e01402b1SRalf Baechle 2331e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2332e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2333e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2334e01402b1SRalf Baechle 2335da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2336da615cf6SDeng-Cheng Zhu bool 2337da615cf6SDeng-Cheng Zhu default "y" 2338da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2339da615cf6SDeng-Cheng Zhu 23402c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 23412c973ef0SDeng-Cheng Zhu bool 23422c973ef0SDeng-Cheng Zhu default "y" 23432c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 23442c973ef0SDeng-Cheng Zhu 23454a16ff4cSRalf Baechleconfig MIPS_CMP 23465cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 23475676319cSMarkos Chandras depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 2348b10b43baSMarkos Chandras select SMP 2349eb9b5141STim Anderson select SYNC_R4K 2350b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 23514a16ff4cSRalf Baechle select WEAK_ORDERING 23524a16ff4cSRalf Baechle default n 23534a16ff4cSRalf Baechle help 2354044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2355044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2356044505c7SPaul Burton its ability to start secondary CPUs. 23574a16ff4cSRalf Baechle 23585cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 23595cac93b3SPaul Burton instead of this. 23605cac93b3SPaul Burton 23610ee958e1SPaul Burtonconfig MIPS_CPS 23620ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 23635a3e7c02SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 23640ee958e1SPaul Burton select MIPS_CM 23651d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 23660ee958e1SPaul Burton select SMP 23670ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 23681d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 2369c8b7712cSPaul Burton select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 23700ee958e1SPaul Burton select SYS_SUPPORTS_SMP 23710ee958e1SPaul Burton select WEAK_ORDERING 23720ee958e1SPaul Burton help 23730ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 23740ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 23750ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 23760ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 23770ee958e1SPaul Burton support is unavailable. 23780ee958e1SPaul Burton 23793179d37eSPaul Burtonconfig MIPS_CPS_PM 238039a59593SMarkos Chandras depends on MIPS_CPS 23813179d37eSPaul Burton bool 23823179d37eSPaul Burton 23839f98f3ddSPaul Burtonconfig MIPS_CM 23849f98f3ddSPaul Burton bool 23853c9b4166SPaul Burton select MIPS_CPC 23869f98f3ddSPaul Burton 23879c38cf44SPaul Burtonconfig MIPS_CPC 23889c38cf44SPaul Burton bool 23892600990eSRalf Baechle 23901da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 23911da177e4SLinus Torvalds bool 23921da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 23931da177e4SLinus Torvalds default y 23941da177e4SLinus Torvalds 23951da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 23961da177e4SLinus Torvalds bool 23971da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 23981da177e4SLinus Torvalds default y 23991da177e4SLinus Torvalds 24002235a54dSSanjay Lal 24019e2b5372SMarkos Chandraschoice 24029e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 24039e2b5372SMarkos Chandras 24049e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 24059e2b5372SMarkos Chandras bool "None" 24069e2b5372SMarkos Chandras help 24079e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 24089e2b5372SMarkos Chandras 24099693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 24109693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 24119e2b5372SMarkos Chandras bool "SmartMIPS" 24129693a853SFranck Bui-Huu help 24139693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 24149693a853SFranck Bui-Huu increased security at both hardware and software level for 24159693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 24169693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 24179693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 24189693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 24199693a853SFranck Bui-Huu here. 24209693a853SFranck Bui-Huu 2421bce86083SSteven J. Hillconfig CPU_MICROMIPS 24227fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 24239e2b5372SMarkos Chandras bool "microMIPS" 2424bce86083SSteven J. Hill help 2425bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2426bce86083SSteven J. Hill microMIPS ISA 2427bce86083SSteven J. Hill 24289e2b5372SMarkos Chandrasendchoice 24299e2b5372SMarkos Chandras 2430a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 24310ce3417eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2432a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 24332a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2434a5e9a69eSPaul Burton help 2435a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2436a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 24371db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 24381db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 24391db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 24401db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 24411db1af84SPaul Burton the size & complexity of your kernel. 2442a5e9a69eSPaul Burton 2443a5e9a69eSPaul Burton If unsure, say Y. 2444a5e9a69eSPaul Burton 24451da177e4SLinus Torvaldsconfig CPU_HAS_WB 2446f7062ddbSRalf Baechle bool 2447e01402b1SRalf Baechle 2448df0ac8a4SKevin Cernekeeconfig XKS01 2449df0ac8a4SKevin Cernekee bool 2450df0ac8a4SKevin Cernekee 24518256b17eSFlorian Fainelliconfig CPU_HAS_RIXI 24528256b17eSFlorian Fainelli bool 24538256b17eSFlorian Fainelli 2454f41ae0b2SRalf Baechle# 2455f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2456f41ae0b2SRalf Baechle# 2457e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2458f41ae0b2SRalf Baechle bool 2459e01402b1SRalf Baechle 2460f41ae0b2SRalf Baechle# 2461f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2462f41ae0b2SRalf Baechle# 2463e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2464f41ae0b2SRalf Baechle bool 2465e01402b1SRalf Baechle 24661da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 24671da177e4SLinus Torvalds bool 24681da177e4SLinus Torvalds depends on !CPU_R3000 24691da177e4SLinus Torvalds default y 24701da177e4SLinus Torvalds 24711da177e4SLinus Torvalds# 247220d60d99SMaciej W. Rozycki# CPU non-features 247320d60d99SMaciej W. Rozycki# 247420d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 247520d60d99SMaciej W. Rozycki bool 247620d60d99SMaciej W. Rozycki 247720d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 247820d60d99SMaciej W. Rozycki bool 247920d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 248020d60d99SMaciej W. Rozycki 248120d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 248220d60d99SMaciej W. Rozycki bool 248320d60d99SMaciej W. Rozycki 24844edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT 24854edf00a4SPaul Burton int 24864edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24874edf00a4SPaul Burton default 4 if CPU_R8000 24884edf00a4SPaul Burton default 0 24894edf00a4SPaul Burton 24904edf00a4SPaul Burtonconfig MIPS_ASID_BITS 24914edf00a4SPaul Burton int 24922db003a5SPaul Burton default 0 if MIPS_ASID_BITS_VARIABLE 24934edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24944edf00a4SPaul Burton default 8 24954edf00a4SPaul Burton 24962db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE 24972db003a5SPaul Burton bool 24982db003a5SPaul Burton 24994a5dc51eSMarcin Nowakowskiconfig MIPS_CRC_SUPPORT 25004a5dc51eSMarcin Nowakowski bool 25014a5dc51eSMarcin Nowakowski 250220d60d99SMaciej W. Rozycki# 25031da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 25041da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 25051da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 25061da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 25071da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 25081da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 25091da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 25101da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2511797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2512797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2513797798c1SRalf Baechle# support. 25141da177e4SLinus Torvalds# 25151da177e4SLinus Torvaldsconfig HIGHMEM 25161da177e4SLinus Torvalds bool "High Memory Support" 2517a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2518797798c1SRalf Baechle 2519797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2520797798c1SRalf Baechle bool 2521797798c1SRalf Baechle 2522797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2523797798c1SRalf Baechle bool 25241da177e4SLinus Torvalds 25259693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 25269693a853SFranck Bui-Huu bool 25279693a853SFranck Bui-Huu 2528a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2529a6a4834cSSteven J. Hill bool 2530a6a4834cSSteven J. Hill 2531377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2532377cb1b6SRalf Baechle bool 2533377cb1b6SRalf Baechle help 2534377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2535377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2536377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2537377cb1b6SRalf Baechle 2538a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2539a5e9a69eSPaul Burton bool 2540a5e9a69eSPaul Burton 2541b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2542b4819b59SYoichi Yuasa def_bool y 2543f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2544b4819b59SYoichi Yuasa 2545d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2546d8cb4e11SRalf Baechle bool 2547d8cb4e11SRalf Baechle default y if SGI_IP27 2548d8cb4e11SRalf Baechle help 25493dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2550d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2551d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2552ad56b738SMike Rapoport See <file:Documentation/vm/numa.rst> for more. 2553d8cb4e11SRalf Baechle 2554b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2555b1c6cd42SAtsushi Nemoto bool 25567de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 255731473747SAtsushi Nemoto 2558d8cb4e11SRalf Baechleconfig NUMA 2559d8cb4e11SRalf Baechle bool "NUMA Support" 2560d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2561d8cb4e11SRalf Baechle help 2562d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2563d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2564d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2565d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2566d8cb4e11SRalf Baechle disabled. 2567d8cb4e11SRalf Baechle 2568d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2569d8cb4e11SRalf Baechle bool 2570d8cb4e11SRalf Baechle 25718c530ea3SMatt Redfearnconfig RELOCATABLE 25728c530ea3SMatt Redfearn bool "Relocatable kernel" 25733ff72be4SSteven J. Hill depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) 25748c530ea3SMatt Redfearn help 25758c530ea3SMatt Redfearn This builds a kernel image that retains relocation information 25768c530ea3SMatt Redfearn so it can be loaded someplace besides the default 1MB. 25778c530ea3SMatt Redfearn The relocations make the kernel binary about 15% larger, 25788c530ea3SMatt Redfearn but are discarded at runtime 25798c530ea3SMatt Redfearn 2580069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE 2581069fd766SMatt Redfearn hex "Relocation table size" 2582069fd766SMatt Redfearn depends on RELOCATABLE 2583069fd766SMatt Redfearn range 0x0 0x01000000 2584069fd766SMatt Redfearn default "0x00100000" 2585069fd766SMatt Redfearn ---help--- 2586069fd766SMatt Redfearn A table of relocation data will be appended to the kernel binary 2587069fd766SMatt Redfearn and parsed at boot to fix up the relocated kernel. 2588069fd766SMatt Redfearn 2589069fd766SMatt Redfearn This option allows the amount of space reserved for the table to be 2590069fd766SMatt Redfearn adjusted, although the default of 1Mb should be ok in most cases. 2591069fd766SMatt Redfearn 2592069fd766SMatt Redfearn The build will fail and a valid size suggested if this is too small. 2593069fd766SMatt Redfearn 2594069fd766SMatt Redfearn If unsure, leave at the default value. 2595069fd766SMatt Redfearn 2596405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE 2597405bc8fdSMatt Redfearn bool "Randomize the address of the kernel image" 2598405bc8fdSMatt Redfearn depends on RELOCATABLE 2599405bc8fdSMatt Redfearn ---help--- 2600405bc8fdSMatt Redfearn Randomizes the physical and virtual address at which the 2601405bc8fdSMatt Redfearn kernel image is loaded, as a security feature that 2602405bc8fdSMatt Redfearn deters exploit attempts relying on knowledge of the location 2603405bc8fdSMatt Redfearn of kernel internals. 2604405bc8fdSMatt Redfearn 2605405bc8fdSMatt Redfearn Entropy is generated using any coprocessor 0 registers available. 2606405bc8fdSMatt Redfearn 2607405bc8fdSMatt Redfearn The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2608405bc8fdSMatt Redfearn 2609405bc8fdSMatt Redfearn If unsure, say N. 2610405bc8fdSMatt Redfearn 2611405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET 2612405bc8fdSMatt Redfearn hex "Maximum kASLR offset" if EXPERT 2613405bc8fdSMatt Redfearn depends on RANDOMIZE_BASE 2614405bc8fdSMatt Redfearn range 0x0 0x40000000 if EVA || 64BIT 2615405bc8fdSMatt Redfearn range 0x0 0x08000000 2616405bc8fdSMatt Redfearn default "0x01000000" 2617405bc8fdSMatt Redfearn ---help--- 2618405bc8fdSMatt Redfearn When kASLR is active, this provides the maximum offset that will 2619405bc8fdSMatt Redfearn be applied to the kernel image. It should be set according to the 2620405bc8fdSMatt Redfearn amount of physical RAM available in the target system minus 2621405bc8fdSMatt Redfearn PHYSICAL_START and must be a power of 2. 2622405bc8fdSMatt Redfearn 2623405bc8fdSMatt Redfearn This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2624405bc8fdSMatt Redfearn EVA or 64-bit. The default is 16Mb. 2625405bc8fdSMatt Redfearn 2626c80d79d7SYasunori Gotoconfig NODES_SHIFT 2627c80d79d7SYasunori Goto int 2628c80d79d7SYasunori Goto default "6" 2629c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2630c80d79d7SYasunori Goto 263114f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 263214f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 263323021b2bSYang Shi depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) 263414f70012SDeng-Cheng Zhu default y 263514f70012SDeng-Cheng Zhu help 263614f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 263714f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 263814f70012SDeng-Cheng Zhu 26391da177e4SLinus Torvaldsconfig SMP 26401da177e4SLinus Torvalds bool "Multi-Processing support" 2641e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2642e73ea273SRalf Baechle help 26431da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 26444a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 26454a474157SRobert Graffham than one CPU, say Y. 26461da177e4SLinus Torvalds 26474a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 26481da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 26491da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 26504a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 26511da177e4SLinus Torvalds will run faster if you say N here. 26521da177e4SLinus Torvalds 26531da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 26541da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 26551da177e4SLinus Torvalds 265603502faaSAdrian Bunk See also the SMP-HOWTO available at 265703502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 26581da177e4SLinus Torvalds 26591da177e4SLinus Torvalds If you don't know what to do here, say N. 26601da177e4SLinus Torvalds 26617840d618SMatt Redfearnconfig HOTPLUG_CPU 26627840d618SMatt Redfearn bool "Support for hot-pluggable CPUs" 26637840d618SMatt Redfearn depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 26647840d618SMatt Redfearn help 26657840d618SMatt Redfearn Say Y here to allow turning CPUs off and on. CPUs can be 26667840d618SMatt Redfearn controlled through /sys/devices/system/cpu. 26677840d618SMatt Redfearn (Note: power management support will enable this option 26687840d618SMatt Redfearn automatically on SMP systems. ) 26697840d618SMatt Redfearn Say N if you want to disable CPU hotplug. 26707840d618SMatt Redfearn 267187353d8aSRalf Baechleconfig SMP_UP 267287353d8aSRalf Baechle bool 267387353d8aSRalf Baechle 26744a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 26754a16ff4cSRalf Baechle bool 26764a16ff4cSRalf Baechle 26770ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 26780ee958e1SPaul Burton bool 26790ee958e1SPaul Burton 2680e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2681e73ea273SRalf Baechle bool 2682e73ea273SRalf Baechle 2683130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2684130e2fb7SRalf Baechle bool 2685130e2fb7SRalf Baechle 2686130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2687130e2fb7SRalf Baechle bool 2688130e2fb7SRalf Baechle 2689130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2690130e2fb7SRalf Baechle bool 2691130e2fb7SRalf Baechle 2692130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2693130e2fb7SRalf Baechle bool 2694130e2fb7SRalf Baechle 2695130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2696130e2fb7SRalf Baechle bool 2697130e2fb7SRalf Baechle 26981da177e4SLinus Torvaldsconfig NR_CPUS 2699a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2700a91796a9SJayachandran C range 2 256 27011da177e4SLinus Torvalds depends on SMP 2702130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2703130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2704130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2705130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2706130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 27071da177e4SLinus Torvalds help 27081da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 27091da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 27101da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 271172ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 271272ede9b1SAtsushi Nemoto and 2 for all others. 27131da177e4SLinus Torvalds 27141da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 271572ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 271672ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 271772ede9b1SAtsushi Nemoto power of two. 27181da177e4SLinus Torvalds 2719399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2720399aaa25SAl Cooper bool 2721399aaa25SAl Cooper 27227820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP_1024 27237820b84bSDavid Daney bool 27247820b84bSDavid Daney 27257820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP 27267820b84bSDavid Daney int 27277820b84bSDavid Daney depends on SMP 27287820b84bSDavid Daney default 1024 if MIPS_NR_CPU_NR_MAP_1024 27297820b84bSDavid Daney default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 27307820b84bSDavid Daney 27311723b4a3SAtsushi Nemoto# 27321723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 27331723b4a3SAtsushi Nemoto# 27341723b4a3SAtsushi Nemoto 27351723b4a3SAtsushi Nemotochoice 27361723b4a3SAtsushi Nemoto prompt "Timer frequency" 27371723b4a3SAtsushi Nemoto default HZ_250 27381723b4a3SAtsushi Nemoto help 27391723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 27401723b4a3SAtsushi Nemoto 274167596573SPaul Burton config HZ_24 274267596573SPaul Burton bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 274367596573SPaul Burton 27441723b4a3SAtsushi Nemoto config HZ_48 27450f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 27461723b4a3SAtsushi Nemoto 27471723b4a3SAtsushi Nemoto config HZ_100 27481723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 27491723b4a3SAtsushi Nemoto 27501723b4a3SAtsushi Nemoto config HZ_128 27511723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 27521723b4a3SAtsushi Nemoto 27531723b4a3SAtsushi Nemoto config HZ_250 27541723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 27551723b4a3SAtsushi Nemoto 27561723b4a3SAtsushi Nemoto config HZ_256 27571723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 27581723b4a3SAtsushi Nemoto 27591723b4a3SAtsushi Nemoto config HZ_1000 27601723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 27611723b4a3SAtsushi Nemoto 27621723b4a3SAtsushi Nemoto config HZ_1024 27631723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 27641723b4a3SAtsushi Nemoto 27651723b4a3SAtsushi Nemotoendchoice 27661723b4a3SAtsushi Nemoto 276767596573SPaul Burtonconfig SYS_SUPPORTS_24HZ 276867596573SPaul Burton bool 276967596573SPaul Burton 27701723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 27711723b4a3SAtsushi Nemoto bool 27721723b4a3SAtsushi Nemoto 27731723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 27741723b4a3SAtsushi Nemoto bool 27751723b4a3SAtsushi Nemoto 27761723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 27771723b4a3SAtsushi Nemoto bool 27781723b4a3SAtsushi Nemoto 27791723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 27801723b4a3SAtsushi Nemoto bool 27811723b4a3SAtsushi Nemoto 27821723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 27831723b4a3SAtsushi Nemoto bool 27841723b4a3SAtsushi Nemoto 27851723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 27861723b4a3SAtsushi Nemoto bool 27871723b4a3SAtsushi Nemoto 27881723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 27891723b4a3SAtsushi Nemoto bool 27901723b4a3SAtsushi Nemoto 27911723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 27921723b4a3SAtsushi Nemoto bool 279367596573SPaul Burton default y if !SYS_SUPPORTS_24HZ && \ 279467596573SPaul Burton !SYS_SUPPORTS_48HZ && \ 279567596573SPaul Burton !SYS_SUPPORTS_100HZ && \ 279667596573SPaul Burton !SYS_SUPPORTS_128HZ && \ 279767596573SPaul Burton !SYS_SUPPORTS_250HZ && \ 279867596573SPaul Burton !SYS_SUPPORTS_256HZ && \ 279967596573SPaul Burton !SYS_SUPPORTS_1000HZ && \ 28001723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 28011723b4a3SAtsushi Nemoto 28021723b4a3SAtsushi Nemotoconfig HZ 28031723b4a3SAtsushi Nemoto int 280467596573SPaul Burton default 24 if HZ_24 28051723b4a3SAtsushi Nemoto default 48 if HZ_48 28061723b4a3SAtsushi Nemoto default 100 if HZ_100 28071723b4a3SAtsushi Nemoto default 128 if HZ_128 28081723b4a3SAtsushi Nemoto default 250 if HZ_250 28091723b4a3SAtsushi Nemoto default 256 if HZ_256 28101723b4a3SAtsushi Nemoto default 1000 if HZ_1000 28111723b4a3SAtsushi Nemoto default 1024 if HZ_1024 28121723b4a3SAtsushi Nemoto 281396685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 281496685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 281596685b17SDeng-Cheng Zhu 2816ea6e942bSAtsushi Nemotoconfig KEXEC 28177d60717eSKees Cook bool "Kexec system call" 28182965faa5SDave Young select KEXEC_CORE 2819ea6e942bSAtsushi Nemoto help 2820ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2821ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 28223dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2823ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2824ea6e942bSAtsushi Nemoto 282501dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2826ea6e942bSAtsushi Nemoto 2827ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2828ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2829bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2830bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2831bf220695SGeert Uytterhoeven made. 2832ea6e942bSAtsushi Nemoto 28337aa1c8f4SRalf Baechleconfig CRASH_DUMP 28347aa1c8f4SRalf Baechle bool "Kernel crash dumps" 28357aa1c8f4SRalf Baechle help 28367aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 28377aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 28387aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 28397aa1c8f4SRalf Baechle a specially reserved region and then later executed after 28407aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 28417aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 28427aa1c8f4SRalf Baechle PHYSICAL_START. 28437aa1c8f4SRalf Baechle 28447aa1c8f4SRalf Baechleconfig PHYSICAL_START 28457aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 28468bda3e26SMaciej W. Rozycki default "0xffffffff84000000" 28477aa1c8f4SRalf Baechle depends on CRASH_DUMP 28487aa1c8f4SRalf Baechle help 28497aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 28507aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 28517aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 28527aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 28537aa1c8f4SRalf Baechle passed to the panic-ed kernel). 28547aa1c8f4SRalf Baechle 2855ea6e942bSAtsushi Nemotoconfig SECCOMP 2856ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2857293c5bd1SRalf Baechle depends on PROC_FS 2858ea6e942bSAtsushi Nemoto default y 2859ea6e942bSAtsushi Nemoto help 2860ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2861ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2862ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2863ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2864ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2865ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2866ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2867ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2868ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2869ea6e942bSAtsushi Nemoto 2870ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2871ea6e942bSAtsushi Nemoto 2872597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 28730ce3417eSPaul Burton bool "Support for O32 binaries using 64-bit FP" 2874597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2875597ce172SPaul Burton help 2876597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2877597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2878597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2879597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2880597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2881597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2882597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2883597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2884597ce172SPaul Burton saying N here. 2885597ce172SPaul Burton 288606e2e882SPaul Burton Although binutils currently supports use of this flag the details 288706e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 288806e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 288906e2e882SPaul Burton behaviour before the details have been finalised, this option should 289006e2e882SPaul Burton be considered experimental and only enabled by those working upon 289106e2e882SPaul Burton said details. 289206e2e882SPaul Burton 289306e2e882SPaul Burton If unsure, say N. 2894597ce172SPaul Burton 2895f2ffa5abSDezhong Diaoconfig USE_OF 28960b3e06fdSJonas Gorski bool 2897f2ffa5abSDezhong Diao select OF 2898e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2899abd2363fSGrant Likely select IRQ_DOMAIN 2900f2ffa5abSDezhong Diao 29017fafb068SAndrew Brestickerconfig BUILTIN_DTB 29027fafb068SAndrew Bresticker bool 29037fafb068SAndrew Bresticker 29041da8f179SJonas Gorskichoice 29055b24d52cSJonas Gorski prompt "Kernel appended dtb support" if USE_OF 29061da8f179SJonas Gorski default MIPS_NO_APPENDED_DTB 29071da8f179SJonas Gorski 29081da8f179SJonas Gorski config MIPS_NO_APPENDED_DTB 29091da8f179SJonas Gorski bool "None" 29101da8f179SJonas Gorski help 29111da8f179SJonas Gorski Do not enable appended dtb support. 29121da8f179SJonas Gorski 291387db537dSAaro Koskinen config MIPS_ELF_APPENDED_DTB 291487db537dSAaro Koskinen bool "vmlinux" 291587db537dSAaro Koskinen help 291687db537dSAaro Koskinen With this option, the boot code will look for a device tree binary 291787db537dSAaro Koskinen DTB) included in the vmlinux ELF section .appended_dtb. By default 291887db537dSAaro Koskinen it is empty and the DTB can be appended using binutils command 291987db537dSAaro Koskinen objcopy: 292087db537dSAaro Koskinen 292187db537dSAaro Koskinen objcopy --update-section .appended_dtb=<filename>.dtb vmlinux 292287db537dSAaro Koskinen 292387db537dSAaro Koskinen This is meant as a backward compatiblity convenience for those 292487db537dSAaro Koskinen systems with a bootloader that can't be upgraded to accommodate 292587db537dSAaro Koskinen the documented boot protocol using a device tree. 292687db537dSAaro Koskinen 29271da8f179SJonas Gorski config MIPS_RAW_APPENDED_DTB 2928b8f54f2cSJonas Gorski bool "vmlinux.bin or vmlinuz.bin" 29291da8f179SJonas Gorski help 29301da8f179SJonas Gorski With this option, the boot code will look for a device tree binary 2931b8f54f2cSJonas Gorski DTB) appended to raw vmlinux.bin or vmlinuz.bin. 29321da8f179SJonas Gorski (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 29331da8f179SJonas Gorski 29341da8f179SJonas Gorski This is meant as a backward compatibility convenience for those 29351da8f179SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 29361da8f179SJonas Gorski the documented boot protocol using a device tree. 29371da8f179SJonas Gorski 29381da8f179SJonas Gorski Beware that there is very little in terms of protection against 29391da8f179SJonas Gorski this option being confused by leftover garbage in memory that might 29401da8f179SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 29411da8f179SJonas Gorski to vmlinux.bin. Do not leave this option active in a production kernel 29421da8f179SJonas Gorski if you don't intend to always append a DTB. 29431da8f179SJonas Gorskiendchoice 29441da8f179SJonas Gorski 29452024972eSJonas Gorskichoice 29462024972eSJonas Gorski prompt "Kernel command line type" if !CMDLINE_OVERRIDE 29472bcef9b4SJonas Gorski default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 29483f5f0a44SPaul Burton !MIPS_MALTA && \ 29492bcef9b4SJonas Gorski !CAVIUM_OCTEON_SOC 29502024972eSJonas Gorski default MIPS_CMDLINE_FROM_BOOTLOADER 29512024972eSJonas Gorski 29522024972eSJonas Gorski config MIPS_CMDLINE_FROM_DTB 29532024972eSJonas Gorski depends on USE_OF 29542024972eSJonas Gorski bool "Dtb kernel arguments if available" 29552024972eSJonas Gorski 29562024972eSJonas Gorski config MIPS_CMDLINE_DTB_EXTEND 29572024972eSJonas Gorski depends on USE_OF 29582024972eSJonas Gorski bool "Extend dtb kernel arguments with bootloader arguments" 29592024972eSJonas Gorski 29602024972eSJonas Gorski config MIPS_CMDLINE_FROM_BOOTLOADER 29612024972eSJonas Gorski bool "Bootloader kernel arguments if available" 2962ed47e153SRabin Vincent 2963ed47e153SRabin Vincent config MIPS_CMDLINE_BUILTIN_EXTEND 2964ed47e153SRabin Vincent depends on CMDLINE_BOOL 2965ed47e153SRabin Vincent bool "Extend builtin kernel arguments with bootloader arguments" 29662024972eSJonas Gorskiendchoice 29672024972eSJonas Gorski 29685e83d430SRalf Baechleendmenu 29695e83d430SRalf Baechle 29701df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 29711df0f0ffSAtsushi Nemoto bool 29721df0f0ffSAtsushi Nemoto default y 29731df0f0ffSAtsushi Nemoto 29741df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 29751df0f0ffSAtsushi Nemoto bool 29761df0f0ffSAtsushi Nemoto default y 29771df0f0ffSAtsushi Nemoto 2978e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT 2979e1e16115SAaro Koskinen bool 2980e1e16115SAaro Koskinen default y 2981e1e16115SAaro Koskinen 2982a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 2983a728ab52SKirill A. Shutemov int 29843377e227SAlex Belits default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 2985a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 2986a728ab52SKirill A. Shutemov default 2 2987a728ab52SKirill A. Shutemov 29886c359eb1SPaul Burtonconfig MIPS_AUTO_PFN_OFFSET 29896c359eb1SPaul Burton bool 29906c359eb1SPaul Burton 29911da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 29921da177e4SLinus Torvalds 29935e83d430SRalf Baechleconfig HW_HAS_EISA 29945e83d430SRalf Baechle bool 29951da177e4SLinus Torvaldsconfig HW_HAS_PCI 29961da177e4SLinus Torvalds bool 29971da177e4SLinus Torvalds 29981da177e4SLinus Torvaldsconfig PCI 29991da177e4SLinus Torvalds bool "Support for PCI controller" 30001da177e4SLinus Torvalds depends on HW_HAS_PCI 3001abb4ae46SRalf Baechle select PCI_DOMAINS 30021da177e4SLinus Torvalds help 30031da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 30041da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 30051da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 30061da177e4SLinus Torvalds say Y, otherwise N. 30071da177e4SLinus Torvalds 30080e476d91SHuacai Chenconfig HT_PCI 30090e476d91SHuacai Chen bool "Support for HT-linked PCI" 30100e476d91SHuacai Chen default y 30110e476d91SHuacai Chen depends on CPU_LOONGSON3 30120e476d91SHuacai Chen select PCI 30130e476d91SHuacai Chen select PCI_DOMAINS 30140e476d91SHuacai Chen help 30150e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 30160e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 30170e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 30180e476d91SHuacai Chen 30191da177e4SLinus Torvaldsconfig PCI_DOMAINS 30201da177e4SLinus Torvalds bool 30211da177e4SLinus Torvalds 302288555b48SPaul Burtonconfig PCI_DOMAINS_GENERIC 302388555b48SPaul Burton bool 302488555b48SPaul Burton 3025c5611df9SPaul Burtonconfig PCI_DRIVERS_GENERIC 302687dd9a4dSPaul Burton select PCI_DOMAINS_GENERIC if PCI_DOMAINS 3027c5611df9SPaul Burton bool 3028c5611df9SPaul Burton 3029c5611df9SPaul Burtonconfig PCI_DRIVERS_LEGACY 3030c5611df9SPaul Burton def_bool !PCI_DRIVERS_GENERIC 3031c5611df9SPaul Burton select NO_GENERIC_PCI_IOPORT_MAP 3032c5611df9SPaul Burton 30331da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 30341da177e4SLinus Torvalds 30351da177e4SLinus Torvalds# 30361da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 30371da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 30381da177e4SLinus Torvalds# users to choose the right thing ... 30391da177e4SLinus Torvalds# 30401da177e4SLinus Torvaldsconfig ISA 30411da177e4SLinus Torvalds bool 30421da177e4SLinus Torvalds 30431da177e4SLinus Torvaldsconfig EISA 30441da177e4SLinus Torvalds bool "EISA support" 30455e83d430SRalf Baechle depends on HW_HAS_EISA 30461da177e4SLinus Torvalds select ISA 3047aa414dffSRalf Baechle select GENERIC_ISA_DMA 30481da177e4SLinus Torvalds ---help--- 30491da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 30501da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 30511da177e4SLinus Torvalds 30521da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 30531da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 30541da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 30551da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 30561da177e4SLinus Torvalds 30571da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 30581da177e4SLinus Torvalds 30591da177e4SLinus Torvalds Otherwise, say N. 30601da177e4SLinus Torvalds 30611da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 30621da177e4SLinus Torvalds 30631da177e4SLinus Torvaldsconfig TC 30641da177e4SLinus Torvalds bool "TURBOchannel support" 30651da177e4SLinus Torvalds depends on MACH_DECSTATION 30661da177e4SLinus Torvalds help 306750a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 306850a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 306950a23e6eSJustin P. Mattock at: 307050a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 307150a23e6eSJustin P. Mattock and: 307250a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 307350a23e6eSJustin P. Mattock Linux driver support status is documented at: 307450a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 30751da177e4SLinus Torvalds 30761da177e4SLinus Torvaldsconfig MMU 30771da177e4SLinus Torvalds bool 30781da177e4SLinus Torvalds default y 30791da177e4SLinus Torvalds 3080109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MIN 3081109c32ffSMatt Redfearn default 12 if 64BIT 3082109c32ffSMatt Redfearn default 8 3083109c32ffSMatt Redfearn 3084109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MAX 3085109c32ffSMatt Redfearn default 18 if 64BIT 3086109c32ffSMatt Redfearn default 15 3087109c32ffSMatt Redfearn 3088109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3089109c32ffSMatt Redfearn default 8 3090109c32ffSMatt Redfearn 3091109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3092109c32ffSMatt Redfearn default 15 3093109c32ffSMatt Redfearn 3094d865bea4SRalf Baechleconfig I8253 3095d865bea4SRalf Baechle bool 3096798778b8SRussell King select CLKSRC_I8253 30972d02612fSThomas Gleixner select CLKEVT_I8253 30989726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 3099d865bea4SRalf Baechle 3100e05eb3f8SRalf Baechleconfig ZONE_DMA 3101e05eb3f8SRalf Baechle bool 3102e05eb3f8SRalf Baechle 3103cce335aeSRalf Baechleconfig ZONE_DMA32 3104cce335aeSRalf Baechle bool 3105cce335aeSRalf Baechle 31061da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 31071da177e4SLinus Torvalds 3108fc5d9888SAlexander Sverdlinconfig HAS_RAPIDIO 3109fc5d9888SAlexander Sverdlin bool 3110fc5d9888SAlexander Sverdlin default n 3111fc5d9888SAlexander Sverdlin 3112388b78adSAlexandre Bounineconfig RAPIDIO 311356abde72SAlexandre Bounine tristate "RapidIO support" 3114fc5d9888SAlexander Sverdlin depends on HAS_RAPIDIO || PCI 3115388b78adSAlexandre Bounine help 3116388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 3117388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 3118388b78adSAlexandre Bounine 3119388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 3120388b78adSAlexandre Bounine 31211da177e4SLinus Torvaldsendmenu 31221da177e4SLinus Torvalds 31231da177e4SLinus Torvaldsconfig TRAD_SIGNALS 31241da177e4SLinus Torvalds bool 31251da177e4SLinus Torvalds 31261da177e4SLinus Torvaldsconfig MIPS32_COMPAT 312778aaf956SRalf Baechle bool 31281da177e4SLinus Torvalds 31291da177e4SLinus Torvaldsconfig COMPAT 31301da177e4SLinus Torvalds bool 31311da177e4SLinus Torvalds 313205e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 313305e43966SAtsushi Nemoto bool 313405e43966SAtsushi Nemoto 31351da177e4SLinus Torvaldsconfig MIPS32_O32 31361da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 313778aaf956SRalf Baechle depends on 64BIT 313878aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 313978aaf956SRalf Baechle select COMPAT 314078aaf956SRalf Baechle select MIPS32_COMPAT 314178aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31421da177e4SLinus Torvalds help 31431da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 31441da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 31451da177e4SLinus Torvalds existing binaries are in this format. 31461da177e4SLinus Torvalds 31471da177e4SLinus Torvalds If unsure, say Y. 31481da177e4SLinus Torvalds 31491da177e4SLinus Torvaldsconfig MIPS32_N32 31501da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 3151c22eacfeSRalf Baechle depends on 64BIT 315278aaf956SRalf Baechle select COMPAT 315378aaf956SRalf Baechle select MIPS32_COMPAT 315478aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31551da177e4SLinus Torvalds help 31561da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 31571da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 31581da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 31591da177e4SLinus Torvalds cases. 31601da177e4SLinus Torvalds 31611da177e4SLinus Torvalds If unsure, say N. 31621da177e4SLinus Torvalds 31631da177e4SLinus Torvaldsconfig BINFMT_ELF32 31641da177e4SLinus Torvalds bool 31651da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 3166f43edca7SRalf Baechle select ELFCORE 31671da177e4SLinus Torvalds 31682116245eSRalf Baechlemenu "Power management options" 3169952fa954SRodolfo Giometti 3170363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 3171363c55caSWu Zhangjin def_bool y 31723f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3173363c55caSWu Zhangjin 3174f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 3175f4cb5700SJohannes Berg def_bool y 31763f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3177f4cb5700SJohannes Berg 31782116245eSRalf Baechlesource "kernel/power/Kconfig" 3179952fa954SRodolfo Giometti 31801da177e4SLinus Torvaldsendmenu 31811da177e4SLinus Torvalds 31827a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 31837a998935SViresh Kumar bool 31847a998935SViresh Kumar 31857a998935SViresh Kumarmenu "CPU Power Management" 3186c095ebafSPaul Burton 3187c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 31887a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 31897a998935SViresh Kumarendif 31909726b43aSWu Zhangjin 3191c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 3192c095ebafSPaul Burton 3193c095ebafSPaul Burtonendmenu 3194c095ebafSPaul Burton 319598cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 319698cdee0eSRalf Baechle 31972235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 3198