11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 5393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 6c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 7f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 8ec7748b5SSam Ravnborg select HAVE_IDE 942d4b839SMathieu Desnoyers select HAVE_OPROFILE 107f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 117f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1288547001SJason Wessel select HAVE_ARCH_KGDB 13490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 14c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 157563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 16d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 1769a7d1b3SWu Zhangjin select HAVE_FUNCTION_TRACE_MCOUNT_TEST 18538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 19538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2064575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2129c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 22c1bf207dSDavid Daney select HAVE_KPROBES 23c1bf207dSDavid Daney select HAVE_KRETPROBES 24b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 251d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 26e26d196cSDavid Daney select ARCH_BINFMT_ELF_RANDOMIZE_PIE 27383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 2821a41faaSWu Zhangjin select RTC_LIB if !MACH_LOONGSON 292b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 307463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3148e1fd5aSDavid Daney select HAVE_DMA_ATTRS 3248e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 333bd27e32SDavid Daney select GENERIC_IRQ_PROBE 34f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3578857614SMarkos Chandras select GENERIC_PCI_IOMAP 3694bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 37c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 380f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 399d15ffc8STejun Heo select HAVE_MEMBLOCK 409d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 419d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 42360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 434b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 44cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 45cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 46786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 474febd95aSStephen Rothwell select VIRT_TO_BUS 482f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 492f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5050150d2bSAl Viro select CLONE_BACKWARDS 51d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5219952a92SKees Cook select HAVE_CC_STACKPROTECTOR 53*b1d4c6caSJames Hogan select CPU_PM if CPU_IDLE 541da177e4SLinus Torvalds 551da177e4SLinus Torvaldsmenu "Machine selection" 561da177e4SLinus Torvalds 575e83d430SRalf Baechlechoice 585e83d430SRalf Baechle prompt "System type" 595e83d430SRalf Baechle default SGI_IP22 601da177e4SLinus Torvalds 6142a4f17dSManuel Laussconfig MIPS_ALCHEMY 62c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 6342a4f17dSManuel Lauss select 64BIT_PHYS_ADDR 64f772cdb2SRalf Baechle select CEVT_R4K 65d7ea335cSSteven J. Hill select CSRC_R4K 6642a4f17dSManuel Lauss select IRQ_CPU 6788e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 6842a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 6942a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 7042a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 71efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 721b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 731da177e4SLinus Torvalds 747ca5dc14SFlorian Fainelliconfig AR7 757ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 767ca5dc14SFlorian Fainelli select BOOT_ELF32 777ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 787ca5dc14SFlorian Fainelli select CEVT_R4K 797ca5dc14SFlorian Fainelli select CSRC_R4K 807ca5dc14SFlorian Fainelli select IRQ_CPU 817ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 827ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 837ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 847ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 857ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 867ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 871b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 885f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 897ca5dc14SFlorian Fainelli select VLYNQ 908551fb64SYoichi Yuasa select HAVE_CLK 917ca5dc14SFlorian Fainelli help 927ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 937ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 947ca5dc14SFlorian Fainelli 95d4a67d9dSGabor Juhosconfig ATH79 96d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 976eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 98d4a67d9dSGabor Juhos select BOOT_RAW 99d4a67d9dSGabor Juhos select CEVT_R4K 100d4a67d9dSGabor Juhos select CSRC_R4K 101d4a67d9dSGabor Juhos select DMA_NONCOHERENT 10294638067SGabor Juhos select HAVE_CLK 1032c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 104d4a67d9dSGabor Juhos select IRQ_CPU 1050aabf1a4SGabor Juhos select MIPS_MACHINE 106d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 107d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 108d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 109d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 110d4a67d9dSGabor Juhos help 111d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 112d4a67d9dSGabor Juhos 1131c0c13ebSAurelien Jarnoconfig BCM47XX 114c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1152da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 116fe08f8c2SHauke Mehrtens select BOOT_RAW 11742f77542SRalf Baechle select CEVT_R4K 118940f6b48SRalf Baechle select CSRC_R4K 1191c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1201c0c13ebSAurelien Jarno select HW_HAS_PCI 1211c0c13ebSAurelien Jarno select IRQ_CPU 122314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 123dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1241c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1251c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 12625e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 127e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 1281c0c13ebSAurelien Jarno help 1291c0c13ebSAurelien Jarno Support for BCM47XX based boards 1301c0c13ebSAurelien Jarno 131e7300d04SMaxime Bizonconfig BCM63XX 132e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 133ae8de61cSFlorian Fainelli select BOOT_RAW 134e7300d04SMaxime Bizon select CEVT_R4K 135e7300d04SMaxime Bizon select CSRC_R4K 136e7300d04SMaxime Bizon select DMA_NONCOHERENT 137e7300d04SMaxime Bizon select IRQ_CPU 138e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 139e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 140e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 141e7300d04SMaxime Bizon select SWAP_IO_SPACE 142e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 1433e82eeebSYoichi Yuasa select HAVE_CLK 144af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 145e7300d04SMaxime Bizon help 146e7300d04SMaxime Bizon Support for BCM63XX based boards 147e7300d04SMaxime Bizon 1481da177e4SLinus Torvaldsconfig MIPS_COBALT 1493fa986faSMartin Michlmayr bool "Cobalt Server" 15042f77542SRalf Baechle select CEVT_R4K 151940f6b48SRalf Baechle select CSRC_R4K 1521097c6acSYoichi Yuasa select CEVT_GT641XX 1531da177e4SLinus Torvalds select DMA_NONCOHERENT 1541da177e4SLinus Torvalds select HW_HAS_PCI 155d865bea4SRalf Baechle select I8253 1561da177e4SLinus Torvalds select I8259 1571da177e4SLinus Torvalds select IRQ_CPU 158d5ab1a69SYoichi Yuasa select IRQ_GT641XX 159252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 160e25bfc92SYoichi Yuasa select PCI 1617cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 1620a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 163ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1640e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 1655e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 166e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 1671da177e4SLinus Torvalds 1681da177e4SLinus Torvaldsconfig MACH_DECSTATION 1693fa986faSMartin Michlmayr bool "DECstations" 1701da177e4SLinus Torvalds select BOOT_ELF32 1716457d9fcSYoichi Yuasa select CEVT_DS1287 17242f77542SRalf Baechle select CEVT_R4K 1734247417dSYoichi Yuasa select CSRC_IOASIC 174940f6b48SRalf Baechle select CSRC_R4K 17520d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 17620d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 17720d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 1781da177e4SLinus Torvalds select DMA_NONCOHERENT 179ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 1801da177e4SLinus Torvalds select IRQ_CPU 1817cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 1827cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 183ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1847d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 1855e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1861723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 1871723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 1881723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 189930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 1905e83d430SRalf Baechle help 1911da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 1921da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 1931da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 1941da177e4SLinus Torvalds 1951da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 1961da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 1971da177e4SLinus Torvalds 1981da177e4SLinus Torvalds DECstation 5000/50 1991da177e4SLinus Torvalds DECstation 5000/150 2001da177e4SLinus Torvalds DECstation 5000/260 2011da177e4SLinus Torvalds DECsystem 5900/260 2021da177e4SLinus Torvalds 2031da177e4SLinus Torvalds otherwise choose R3000. 2041da177e4SLinus Torvalds 2055e83d430SRalf Baechleconfig MACH_JAZZ 2063fa986faSMartin Michlmayr bool "Jazz family of machines" 2070e2794b0SRalf Baechle select FW_ARC 2080e2794b0SRalf Baechle select FW_ARC32 2095e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 21042f77542SRalf Baechle select CEVT_R4K 211940f6b48SRalf Baechle select CSRC_R4K 212e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2135e83d430SRalf Baechle select GENERIC_ISA_DMA 2148a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 215ea202c63SThomas Bogendoerfer select IRQ_CPU 216d865bea4SRalf Baechle select I8253 2175e83d430SRalf Baechle select I8259 2185e83d430SRalf Baechle select ISA 2197cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2205e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2217d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2221723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2231da177e4SLinus Torvalds help 2245e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2255e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 226692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2275e83d430SRalf Baechle Olivetti M700-10 workstations. 2285e83d430SRalf Baechle 2295ebabe59SLars-Peter Clausenconfig MACH_JZ4740 2305ebabe59SLars-Peter Clausen bool "Ingenic JZ4740 based machines" 2315ebabe59SLars-Peter Clausen select SYS_HAS_CPU_MIPS32_R1 2325ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2335ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 234f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 2355ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 2365ebabe59SLars-Peter Clausen select IRQ_CPU 2375ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 2385ebabe59SLars-Peter Clausen select SYS_HAS_EARLY_PRINTK 239ab5330ebSMaurus Cuelenaere select HAVE_CLK 24083bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 2415ebabe59SLars-Peter Clausen 242171bb2f1SJohn Crispinconfig LANTIQ 243171bb2f1SJohn Crispin bool "Lantiq based platforms" 244171bb2f1SJohn Crispin select DMA_NONCOHERENT 245171bb2f1SJohn Crispin select IRQ_CPU 246171bb2f1SJohn Crispin select CEVT_R4K 247171bb2f1SJohn Crispin select CSRC_R4K 248171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 249171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 250171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 251171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 252171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 253171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 254171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 255171bb2f1SJohn Crispin select SWAP_IO_SPACE 256171bb2f1SJohn Crispin select BOOT_RAW 257287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 258287e3f3fSJohn Crispin select CLKDEV_LOOKUP 259a0392222SJohn Crispin select USE_OF 2603f8c50c9SJohn Crispin select PINCTRL 2613f8c50c9SJohn Crispin select PINCTRL_LANTIQ 262171bb2f1SJohn Crispin 2631f21d2bdSBrian Murphyconfig LASAT 2641f21d2bdSBrian Murphy bool "LASAT Networks platforms" 26542f77542SRalf Baechle select CEVT_R4K 266940f6b48SRalf Baechle select CSRC_R4K 2671f21d2bdSBrian Murphy select DMA_NONCOHERENT 2681f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 2691f21d2bdSBrian Murphy select HW_HAS_PCI 270a5ccfe5cSRalf Baechle select IRQ_CPU 2711f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 2721f21d2bdSBrian Murphy select MIPS_NILE4 2731f21d2bdSBrian Murphy select R5000_CPU_SCACHE 2741f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 2751f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 2761f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 2771f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 2781f21d2bdSBrian Murphy 27985749d24SWu Zhangjinconfig MACH_LOONGSON 28085749d24SWu Zhangjin bool "Loongson family of machines" 281c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 282ade299d8SYoichi Yuasa help 28385749d24SWu Zhangjin This enables the support of Loongson family of machines. 28485749d24SWu Zhangjin 28585749d24SWu Zhangjin Loongson is a family of general-purpose MIPS-compatible CPUs. 28685749d24SWu Zhangjin developed at Institute of Computing Technology (ICT), 28785749d24SWu Zhangjin Chinese Academy of Sciences (CAS) in the People's Republic 28885749d24SWu Zhangjin of China. The chief architect is Professor Weiwu Hu. 289ade299d8SYoichi Yuasa 290ca585cf9SKelvin Cheungconfig MACH_LOONGSON1 291ca585cf9SKelvin Cheung bool "Loongson 1 family of machines" 292ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 293ca585cf9SKelvin Cheung help 294ca585cf9SKelvin Cheung This enables support for the Loongson 1 based machines. 295ca585cf9SKelvin Cheung 296ca585cf9SKelvin Cheung Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by 297ca585cf9SKelvin Cheung the ICT (Institute of Computing Technology) and the Chinese Academy 298ca585cf9SKelvin Cheung of Sciences. 299ca585cf9SKelvin Cheung 3001da177e4SLinus Torvaldsconfig MIPS_MALTA 3013fa986faSMartin Michlmayr bool "MIPS Malta board" 30261ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 3031da177e4SLinus Torvalds select BOOT_ELF32 304fa71c960SRalf Baechle select BOOT_RAW 30542f77542SRalf Baechle select CEVT_R4K 306940f6b48SRalf Baechle select CSRC_R4K 307778eeb1bSSteven J. Hill select CSRC_GIC 308885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 3091da177e4SLinus Torvalds select GENERIC_ISA_DMA 3108a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 311aa414dffSRalf Baechle select IRQ_CPU 31239b8d525SRalf Baechle select IRQ_GIC 3131da177e4SLinus Torvalds select HW_HAS_PCI 314d865bea4SRalf Baechle select I8253 3151da177e4SLinus Torvalds select I8259 3165e83d430SRalf Baechle select MIPS_BONITO64 3179318c51aSChris Dearman select MIPS_CPU_SCACHE 318252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 3195e83d430SRalf Baechle select MIPS_MSC 3201da177e4SLinus Torvalds select SWAP_IO_SPACE 3217cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 3227cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 323bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 3247cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 3255d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 3267cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3277cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 328ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 329ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 3305e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 3315e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3320365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 333e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 334f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 3359693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 3361b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 3371da177e4SLinus Torvalds help 338f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 3391da177e4SLinus Torvalds board. 3401da177e4SLinus Torvalds 341ec47b274SSteven J. Hillconfig MIPS_SEAD3 342ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 343ec47b274SSteven J. Hill select BOOT_ELF32 344ec47b274SSteven J. Hill select BOOT_RAW 345ec47b274SSteven J. Hill select CEVT_R4K 346ec47b274SSteven J. Hill select CSRC_R4K 347dfa762e1SSteven J. Hill select CSRC_GIC 348ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 349ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 350ec47b274SSteven J. Hill select DMA_NONCOHERENT 351ec47b274SSteven J. Hill select IRQ_CPU 352ec47b274SSteven J. Hill select IRQ_GIC 35344327236SQais Yousef select LIBFDT 354ec47b274SSteven J. Hill select MIPS_MSC 355ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 356ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 357ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 358ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 359ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 360ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 361ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 362ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 363ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 364a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 365ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 366ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 3679b731009SSteven J. Hill select USE_OF 368ec47b274SSteven J. Hill help 369ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 370ec47b274SSteven J. Hill board. 371ec47b274SSteven J. Hill 372a83860c2SRalf Baechleconfig NEC_MARKEINS 373a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 374a83860c2SRalf Baechle select SOC_EMMA2RH 375a83860c2SRalf Baechle select HW_HAS_PCI 376a83860c2SRalf Baechle help 377a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 378ade299d8SYoichi Yuasa 3795e83d430SRalf Baechleconfig MACH_VR41XX 38074142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 38142f77542SRalf Baechle select CEVT_R4K 382940f6b48SRalf Baechle select CSRC_R4K 3837cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 38427fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 3855e83d430SRalf Baechle 386edb6310aSDaniel Lairdconfig NXP_STB220 387edb6310aSDaniel Laird bool "NXP STB220 board" 388edb6310aSDaniel Laird select SOC_PNX833X 389edb6310aSDaniel Laird help 390edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 391edb6310aSDaniel Laird 392edb6310aSDaniel Lairdconfig NXP_STB225 393edb6310aSDaniel Laird bool "NXP 225 board" 394edb6310aSDaniel Laird select SOC_PNX833X 395edb6310aSDaniel Laird select SOC_PNX8335 396edb6310aSDaniel Laird help 397edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 398edb6310aSDaniel Laird 3999267a30dSMarc St-Jeanconfig PMC_MSP 4009267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 40139d30c13SAnoop P A select CEVT_R4K 40239d30c13SAnoop P A select CSRC_R4K 4039267a30dSMarc St-Jean select DMA_NONCOHERENT 4049267a30dSMarc St-Jean select SWAP_IO_SPACE 4059267a30dSMarc St-Jean select NO_EXCEPT_FILL 4069267a30dSMarc St-Jean select BOOT_RAW 4079267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 4089267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 4099267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 4109267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 4119267a30dSMarc St-Jean select IRQ_CPU 4129267a30dSMarc St-Jean select SERIAL_8250 4139267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 4149296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 4159296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 4169267a30dSMarc St-Jean help 4179267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 4189267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 4199267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 4209267a30dSMarc St-Jean a variety of MIPS cores. 4219267a30dSMarc St-Jean 422ae2b5bb6SJohn Crispinconfig RALINK 423ae2b5bb6SJohn Crispin bool "Ralink based machines" 424ae2b5bb6SJohn Crispin select CEVT_R4K 425ae2b5bb6SJohn Crispin select CSRC_R4K 426ae2b5bb6SJohn Crispin select BOOT_RAW 427ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 428ae2b5bb6SJohn Crispin select IRQ_CPU 429ae2b5bb6SJohn Crispin select USE_OF 430ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 431ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 432ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 433ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 434ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 435ae2b5bb6SJohn Crispin select HAVE_MACH_CLKDEV 436ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 4372a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 4382a153f1cSJohn Crispin select RESET_CONTROLLER 439ae2b5bb6SJohn Crispin 4401da177e4SLinus Torvaldsconfig SGI_IP22 4413fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 4420e2794b0SRalf Baechle select FW_ARC 4430e2794b0SRalf Baechle select FW_ARC32 4441da177e4SLinus Torvalds select BOOT_ELF32 44542f77542SRalf Baechle select CEVT_R4K 446940f6b48SRalf Baechle select CSRC_R4K 447e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 4481da177e4SLinus Torvalds select DMA_NONCOHERENT 4495e83d430SRalf Baechle select HW_HAS_EISA 450d865bea4SRalf Baechle select I8253 45168de4803SThomas Bogendoerfer select I8259 4521da177e4SLinus Torvalds select IP22_CPU_SCACHE 4531da177e4SLinus Torvalds select IRQ_CPU 454aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 455e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 456e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 45736e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 458e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 459e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 460e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 4611da177e4SLinus Torvalds select SWAP_IO_SPACE 4627cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 4637cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 4642b5e63f6SMartin Michlmayr # 4652b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 4662b5e63f6SMartin Michlmayr # memory during early boot on some machines. 4672b5e63f6SMartin Michlmayr # 4682b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 4692b5e63f6SMartin Michlmayr # for a more details discussion 4702b5e63f6SMartin Michlmayr # 4712b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 472ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 473ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4745e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 475930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 4761da177e4SLinus Torvalds help 4771da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 4781da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 4791da177e4SLinus Torvalds that runs on these, say Y here. 4801da177e4SLinus Torvalds 4811da177e4SLinus Torvaldsconfig SGI_IP27 4823fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 4830e2794b0SRalf Baechle select FW_ARC 4840e2794b0SRalf Baechle select FW_ARC64 4855e83d430SRalf Baechle select BOOT_ELF64 486e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 487634286f1SRalf Baechle select DMA_COHERENT 48836a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 4891da177e4SLinus Torvalds select HW_HAS_PCI 490130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 4917cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 492ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4935e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 494d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 4951a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 496930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 4971da177e4SLinus Torvalds help 4981da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 4991da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 5001da177e4SLinus Torvalds here. 5011da177e4SLinus Torvalds 502e2defae5SThomas Bogendoerferconfig SGI_IP28 5037d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 5040e2794b0SRalf Baechle select FW_ARC 5050e2794b0SRalf Baechle select FW_ARC64 506e2defae5SThomas Bogendoerfer select BOOT_ELF64 507e2defae5SThomas Bogendoerfer select CEVT_R4K 508e2defae5SThomas Bogendoerfer select CSRC_R4K 509e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 510e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 511e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 512e2defae5SThomas Bogendoerfer select IRQ_CPU 513e2defae5SThomas Bogendoerfer select HW_HAS_EISA 514e2defae5SThomas Bogendoerfer select I8253 515e2defae5SThomas Bogendoerfer select I8259 516e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 517e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 5185b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 519e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 520e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 521e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 522e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 523e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 5242b5e63f6SMartin Michlmayr # 5252b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5262b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5272b5e63f6SMartin Michlmayr # 5282b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5292b5e63f6SMartin Michlmayr # for a more details discussion 5302b5e63f6SMartin Michlmayr # 5312b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 532e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 533e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 534e2defae5SThomas Bogendoerfer help 535e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 536e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 537e2defae5SThomas Bogendoerfer 5381da177e4SLinus Torvaldsconfig SGI_IP32 539cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 5400e2794b0SRalf Baechle select FW_ARC 5410e2794b0SRalf Baechle select FW_ARC32 5421da177e4SLinus Torvalds select BOOT_ELF32 54342f77542SRalf Baechle select CEVT_R4K 544940f6b48SRalf Baechle select CSRC_R4K 5451da177e4SLinus Torvalds select DMA_NONCOHERENT 5461da177e4SLinus Torvalds select HW_HAS_PCI 547dd67b155SRalf Baechle select IRQ_CPU 5481da177e4SLinus Torvalds select R5000_CPU_SCACHE 5491da177e4SLinus Torvalds select RM7000_CPU_SCACHE 5507cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5517cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 5527cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 553dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 554ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5555e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5561da177e4SLinus Torvalds help 5571da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 5581da177e4SLinus Torvalds 559ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 560ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 5615e83d430SRalf Baechle select BOOT_ELF32 5625e83d430SRalf Baechle select DMA_COHERENT 5635e83d430SRalf Baechle select SIBYTE_BCM1120 5645e83d430SRalf Baechle select SWAP_IO_SPACE 5657cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5665e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5675e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5685e83d430SRalf Baechle 569ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 570ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 5715e83d430SRalf Baechle select BOOT_ELF32 5725e83d430SRalf Baechle select DMA_COHERENT 5735e83d430SRalf Baechle select SIBYTE_BCM1120 5745e83d430SRalf Baechle select SWAP_IO_SPACE 5757cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5765e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5775e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5785e83d430SRalf Baechle 5795e83d430SRalf Baechleconfig SIBYTE_CRHONE 5803fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 5815e83d430SRalf Baechle select BOOT_ELF32 5825e83d430SRalf Baechle select DMA_COHERENT 5835e83d430SRalf Baechle select SIBYTE_BCM1125 5845e83d430SRalf Baechle select SWAP_IO_SPACE 5857cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5865e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5875e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 5885e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5895e83d430SRalf Baechle 590ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 591ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 592ade299d8SYoichi Yuasa select BOOT_ELF32 593ade299d8SYoichi Yuasa select DMA_COHERENT 594ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 595ade299d8SYoichi Yuasa select SWAP_IO_SPACE 596ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 597ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 598ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 599ade299d8SYoichi Yuasa 600ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 601ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 602ade299d8SYoichi Yuasa select BOOT_ELF32 603ade299d8SYoichi Yuasa select DMA_COHERENT 604fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 605ade299d8SYoichi Yuasa select SIBYTE_SB1250 606ade299d8SYoichi Yuasa select SWAP_IO_SPACE 607ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 608ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 609ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 610ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 611cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 612ade299d8SYoichi Yuasa 613ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 614ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 615ade299d8SYoichi Yuasa select BOOT_ELF32 616ade299d8SYoichi Yuasa select DMA_COHERENT 617fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 618ade299d8SYoichi Yuasa select SIBYTE_SB1250 619ade299d8SYoichi Yuasa select SWAP_IO_SPACE 620ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 621ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 622ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 623ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 624ade299d8SYoichi Yuasa 625ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 626ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 627ade299d8SYoichi Yuasa select BOOT_ELF32 628ade299d8SYoichi Yuasa select DMA_COHERENT 629ade299d8SYoichi Yuasa select SIBYTE_SB1250 630ade299d8SYoichi Yuasa select SWAP_IO_SPACE 631ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 632ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 633ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 634ade299d8SYoichi Yuasa 635ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 636ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 637ade299d8SYoichi Yuasa select BOOT_ELF32 638ade299d8SYoichi Yuasa select DMA_COHERENT 639ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 640ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 641ade299d8SYoichi Yuasa select SWAP_IO_SPACE 642ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 643ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 644651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 645ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 646cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 647ade299d8SYoichi Yuasa 64814b36af4SThomas Bogendoerferconfig SNI_RM 64914b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 6500e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 6510e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 652aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 6535e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 6545e83d430SRalf Baechle select BOOT_ELF32 65542f77542SRalf Baechle select CEVT_R4K 656940f6b48SRalf Baechle select CSRC_R4K 657e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 6585e83d430SRalf Baechle select DMA_NONCOHERENT 6595e83d430SRalf Baechle select GENERIC_ISA_DMA 6608a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 6615e83d430SRalf Baechle select HW_HAS_EISA 6625e83d430SRalf Baechle select HW_HAS_PCI 663c066a32aSThomas Bogendoerfer select IRQ_CPU 664d865bea4SRalf Baechle select I8253 6655e83d430SRalf Baechle select I8259 6665e83d430SRalf Baechle select ISA 6674a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 6687cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6694a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 670c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 6714a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 67236a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 673ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 6747d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 6754a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 6765e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 6775e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 678e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 6791da177e4SLinus Torvalds help 68014b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 68114b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 6825e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 6835e83d430SRalf Baechle support this machine type. 6841da177e4SLinus Torvalds 685edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 686edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 6875e83d430SRalf Baechle 688edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 689edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 69023fbee9dSRalf Baechle 69173b4390fSRalf Baechleconfig MIKROTIK_RB532 69273b4390fSRalf Baechle bool "Mikrotik RB532 boards" 69373b4390fSRalf Baechle select CEVT_R4K 69473b4390fSRalf Baechle select CSRC_R4K 69573b4390fSRalf Baechle select DMA_NONCOHERENT 69673b4390fSRalf Baechle select HW_HAS_PCI 69773b4390fSRalf Baechle select IRQ_CPU 69873b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 69973b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 70073b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 70173b4390fSRalf Baechle select SWAP_IO_SPACE 70273b4390fSRalf Baechle select BOOT_RAW 703d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 704930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 70573b4390fSRalf Baechle help 70673b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 70773b4390fSRalf Baechle based on the IDT RC32434 SoC. 70873b4390fSRalf Baechle 7099ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 7109ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 711a86c7f72SDavid Daney select CEVT_R4K 712a86c7f72SDavid Daney select 64BIT_PHYS_ADDR 713a86c7f72SDavid Daney select DMA_COHERENT 714a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 715a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 716f65aad41SRalf Baechle select EDAC_SUPPORT 717773cb77dSRalf Baechle select SYS_SUPPORTS_HOTPLUG_CPU 718a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 7195e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 720a86c7f72SDavid Daney select SWAP_IO_SPACE 721e8635b48SDavid Daney select HW_HAS_PCI 722f00e001eSDavid Daney select ZONE_DMA32 723465aaed0SDavid Daney select HOLES_IN_ZONE 72499cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 725a86c7f72SDavid Daney help 726a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 727a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 728a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 729a86c7f72SDavid Daney Some of the supported boards are: 730a86c7f72SDavid Daney EBT3000 731a86c7f72SDavid Daney EBH3000 732a86c7f72SDavid Daney EBH3100 733a86c7f72SDavid Daney Thunder 734a86c7f72SDavid Daney Kodama 735a86c7f72SDavid Daney Hikari 736a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 737a86c7f72SDavid Daney 7387f058e85SJayachandran Cconfig NLM_XLR_BOARD 7397f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 7407f058e85SJayachandran C select BOOT_ELF32 7417f058e85SJayachandran C select NLM_COMMON 7427f058e85SJayachandran C select SYS_HAS_CPU_XLR 7437f058e85SJayachandran C select SYS_SUPPORTS_SMP 7447f058e85SJayachandran C select HW_HAS_PCI 7457f058e85SJayachandran C select SWAP_IO_SPACE 7467f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7477f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7487f058e85SJayachandran C select 64BIT_PHYS_ADDR 7497f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7507f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 7517f058e85SJayachandran C select DMA_COHERENT 7527f058e85SJayachandran C select NR_CPUS_DEFAULT_32 7537f058e85SJayachandran C select CEVT_R4K 7547f058e85SJayachandran C select CSRC_R4K 7557f058e85SJayachandran C select IRQ_CPU 756b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7577f058e85SJayachandran C select SYNC_R4K 7587f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 7598f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7608f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7617f058e85SJayachandran C help 7627f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 7637f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 7647f058e85SJayachandran C 7651c773ea4SJayachandran Cconfig NLM_XLP_BOARD 7661c773ea4SJayachandran C bool "Netlogic XLP based systems" 7671c773ea4SJayachandran C select BOOT_ELF32 7681c773ea4SJayachandran C select NLM_COMMON 7691c773ea4SJayachandran C select SYS_HAS_CPU_XLP 7701c773ea4SJayachandran C select SYS_SUPPORTS_SMP 7711c773ea4SJayachandran C select HW_HAS_PCI 7721c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7731c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7741c773ea4SJayachandran C select 64BIT_PHYS_ADDR 7751c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7761c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 7771c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 7781c773ea4SJayachandran C select DMA_COHERENT 7791c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 7801c773ea4SJayachandran C select CEVT_R4K 7811c773ea4SJayachandran C select CSRC_R4K 7821c773ea4SJayachandran C select IRQ_CPU 783b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7841c773ea4SJayachandran C select SYNC_R4K 7851c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 7862f6528e1SJayachandran C select USE_OF 7878f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7888f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7891c773ea4SJayachandran C help 7901c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 7911c773ea4SJayachandran C Say Y here if you have a XLP based board. 7921c773ea4SJayachandran C 7931da177e4SLinus Torvaldsendchoice 7941da177e4SLinus Torvalds 795e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 796d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 797a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 798e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 7995e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 8005ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 8018ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 8021f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 8030f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 804ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 80529c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 80638b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 80722b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 8085e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 809a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 81085749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig" 811ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig" 8127f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 81338b18f72SRalf Baechle 8145e83d430SRalf Baechleendmenu 8155e83d430SRalf Baechle 8161da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 8171da177e4SLinus Torvalds bool 8181da177e4SLinus Torvalds default y 8191da177e4SLinus Torvalds 8201da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 8211da177e4SLinus Torvalds bool 8221da177e4SLinus Torvalds 823f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 824f0d1b0b3SDavid Howells bool 825f0d1b0b3SDavid Howells default n 826f0d1b0b3SDavid Howells 827f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 828f0d1b0b3SDavid Howells bool 829f0d1b0b3SDavid Howells default n 830f0d1b0b3SDavid Howells 8313c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 8323c9ee7efSAkinobu Mita bool 8333c9ee7efSAkinobu Mita default y 8343c9ee7efSAkinobu Mita 8351da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 8361da177e4SLinus Torvalds bool 8371da177e4SLinus Torvalds default y 8381da177e4SLinus Torvalds 839ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 8401cc89038SAtsushi Nemoto bool 8411cc89038SAtsushi Nemoto default y 8421cc89038SAtsushi Nemoto 8431da177e4SLinus Torvalds# 8441da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 8451da177e4SLinus Torvalds# 8460e2794b0SRalf Baechleconfig FW_ARC 8471da177e4SLinus Torvalds bool 8481da177e4SLinus Torvalds 84961ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 85061ed242dSRalf Baechle bool 85161ed242dSRalf Baechle 8529267a30dSMarc St-Jeanconfig BOOT_RAW 8539267a30dSMarc St-Jean bool 8549267a30dSMarc St-Jean 855217dd11eSRalf Baechleconfig CEVT_BCM1480 856217dd11eSRalf Baechle bool 857217dd11eSRalf Baechle 8586457d9fcSYoichi Yuasaconfig CEVT_DS1287 8596457d9fcSYoichi Yuasa bool 8606457d9fcSYoichi Yuasa 8611097c6acSYoichi Yuasaconfig CEVT_GT641XX 8621097c6acSYoichi Yuasa bool 8631097c6acSYoichi Yuasa 86442f77542SRalf Baechleconfig CEVT_R4K 86542f77542SRalf Baechle bool 86642f77542SRalf Baechle 8670ab2b7d0SRaghu Gandhamconfig CEVT_GIC 868237036deSPaul Burton select MIPS_CM 8690ab2b7d0SRaghu Gandham bool 8700ab2b7d0SRaghu Gandham 871217dd11eSRalf Baechleconfig CEVT_SB1250 872217dd11eSRalf Baechle bool 873217dd11eSRalf Baechle 874229f773eSAtsushi Nemotoconfig CEVT_TXX9 875229f773eSAtsushi Nemoto bool 876229f773eSAtsushi Nemoto 877217dd11eSRalf Baechleconfig CSRC_BCM1480 878217dd11eSRalf Baechle bool 879217dd11eSRalf Baechle 8804247417dSYoichi Yuasaconfig CSRC_IOASIC 8814247417dSYoichi Yuasa bool 8824247417dSYoichi Yuasa 883940f6b48SRalf Baechleconfig CSRC_R4K 884940f6b48SRalf Baechle bool 885940f6b48SRalf Baechle 886778eeb1bSSteven J. Hillconfig CSRC_GIC 887237036deSPaul Burton select MIPS_CM 888778eeb1bSSteven J. Hill bool 889778eeb1bSSteven J. Hill 890217dd11eSRalf Baechleconfig CSRC_SB1250 891217dd11eSRalf Baechle bool 892217dd11eSRalf Baechle 893a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 8947444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 895a9aec7feSAtsushi Nemoto bool 896a9aec7feSAtsushi Nemoto 8970e2794b0SRalf Baechleconfig FW_CFE 898df78b5c8SAurelien Jarno bool 899df78b5c8SAurelien Jarno 9004bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 9014bafad92SFUJITA Tomonori def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT 9024bafad92SFUJITA Tomonori 903885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 904885014bcSFelix Fietkau select DMA_NONCOHERENT 905885014bcSFelix Fietkau bool 906885014bcSFelix Fietkau 9071da177e4SLinus Torvaldsconfig DMA_COHERENT 9081da177e4SLinus Torvalds bool 9091da177e4SLinus Torvalds 9101da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 9111da177e4SLinus Torvalds bool 912e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 9134ce588cdSRalf Baechle 914e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 9154ce588cdSRalf Baechle bool 9161da177e4SLinus Torvalds 91736a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 9181da177e4SLinus Torvalds bool 9191da177e4SLinus Torvalds 920dbb74540SRalf Baechleconfig HOTPLUG_CPU 9211b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 92240b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 9231b2bc75cSRalf Baechle help 9241b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 9251b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 9261b2bc75cSRalf Baechle (Note: power management support will enable this option 9271b2bc75cSRalf Baechle automatically on SMP systems. ) 9281b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 9291b2bc75cSRalf Baechle 9301b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 931dbb74540SRalf Baechle bool 932dbb74540SRalf Baechle 9331da177e4SLinus Torvaldsconfig I8259 9341da177e4SLinus Torvalds bool 9351da177e4SLinus Torvalds 9361da177e4SLinus Torvaldsconfig MIPS_BONITO64 9371da177e4SLinus Torvalds bool 9381da177e4SLinus Torvalds 9391da177e4SLinus Torvaldsconfig MIPS_MSC 9401da177e4SLinus Torvalds bool 9411da177e4SLinus Torvalds 9421f21d2bdSBrian Murphyconfig MIPS_NILE4 9431f21d2bdSBrian Murphy bool 9441f21d2bdSBrian Murphy 94539b8d525SRalf Baechleconfig SYNC_R4K 94639b8d525SRalf Baechle bool 94739b8d525SRalf Baechle 948487d70d0SGabor Juhosconfig MIPS_MACHINE 949487d70d0SGabor Juhos def_bool n 950487d70d0SGabor Juhos 951ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 952d388d685SMaciej W. Rozycki def_bool n 953d388d685SMaciej W. Rozycki 9548313da30SRalf Baechleconfig GENERIC_ISA_DMA 9558313da30SRalf Baechle bool 9568313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 957a35bee8aSNamhyung Kim select ISA_DMA_API 9588313da30SRalf Baechle 959aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 960aa414dffSRalf Baechle bool 9618313da30SRalf Baechle select GENERIC_ISA_DMA 962aa414dffSRalf Baechle 963a35bee8aSNamhyung Kimconfig ISA_DMA_API 964a35bee8aSNamhyung Kim bool 965a35bee8aSNamhyung Kim 966465aaed0SDavid Daneyconfig HOLES_IN_ZONE 967465aaed0SDavid Daney bool 968465aaed0SDavid Daney 9695e83d430SRalf Baechle# 9706b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 9715e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 9725e83d430SRalf Baechle# choice statement should be more obvious to the user. 9735e83d430SRalf Baechle# 9745e83d430SRalf Baechlechoice 9756b2aac42SMasanari Iida prompt "Endianness selection" 9761da177e4SLinus Torvalds help 9771da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 9785e83d430SRalf Baechle byte order. These modes require different kernels and a different 9793cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 9805e83d430SRalf Baechle particular system but some systems are just as commonly used in the 9813dde6ad8SDavid Sterba one or the other endianness. 9825e83d430SRalf Baechle 9835e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 9845e83d430SRalf Baechle bool "Big endian" 9855e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 9865e83d430SRalf Baechle 9875e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 9885e83d430SRalf Baechle bool "Little endian" 9895e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 9905e83d430SRalf Baechle 9915e83d430SRalf Baechleendchoice 9925e83d430SRalf Baechle 99322b0763aSDavid Daneyconfig EXPORT_UASM 99422b0763aSDavid Daney bool 99522b0763aSDavid Daney 9962116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 9972116245eSRalf Baechle bool 9982116245eSRalf Baechle 9995e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 10005e83d430SRalf Baechle bool 10015e83d430SRalf Baechle 10025e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 10035e83d430SRalf Baechle bool 10041da177e4SLinus Torvalds 10059cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 10069cffd154SDavid Daney bool 10079cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 10089cffd154SDavid Daney default y 10099cffd154SDavid Daney 1010aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1011aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1012aa1762f4SDavid Daney 10131da177e4SLinus Torvaldsconfig IRQ_CPU 10141da177e4SLinus Torvalds bool 10151da177e4SLinus Torvalds 10161da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 10171da177e4SLinus Torvalds bool 10181da177e4SLinus Torvalds 10199267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 10209267a30dSMarc St-Jean bool 10219267a30dSMarc St-Jean 10229267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 10239267a30dSMarc St-Jean bool 10249267a30dSMarc St-Jean 10258420fd00SAtsushi Nemotoconfig IRQ_TXX9 10268420fd00SAtsushi Nemoto bool 10278420fd00SAtsushi Nemoto 1028d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1029d5ab1a69SYoichi Yuasa bool 1030d5ab1a69SYoichi Yuasa 103139b8d525SRalf Baechleconfig IRQ_GIC 1032237036deSPaul Burton select MIPS_CM 103339b8d525SRalf Baechle bool 103439b8d525SRalf Baechle 1035252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 10361da177e4SLinus Torvalds bool 10371da177e4SLinus Torvalds 10389267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 10399267a30dSMarc St-Jean bool 10409267a30dSMarc St-Jean 1041a83860c2SRalf Baechleconfig SOC_EMMA2RH 1042a83860c2SRalf Baechle bool 1043a83860c2SRalf Baechle select CEVT_R4K 1044a83860c2SRalf Baechle select CSRC_R4K 1045a83860c2SRalf Baechle select DMA_NONCOHERENT 1046a83860c2SRalf Baechle select IRQ_CPU 1047a83860c2SRalf Baechle select SWAP_IO_SPACE 1048a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1049a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1050a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1051a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1052a83860c2SRalf Baechle 1053edb6310aSDaniel Lairdconfig SOC_PNX833X 1054edb6310aSDaniel Laird bool 1055edb6310aSDaniel Laird select CEVT_R4K 1056edb6310aSDaniel Laird select CSRC_R4K 1057edb6310aSDaniel Laird select IRQ_CPU 1058edb6310aSDaniel Laird select DMA_NONCOHERENT 1059edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1060edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1061edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1062edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1063edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1064edb6310aSDaniel Laird 1065edb6310aSDaniel Lairdconfig SOC_PNX8335 1066edb6310aSDaniel Laird bool 1067edb6310aSDaniel Laird select SOC_PNX833X 1068edb6310aSDaniel Laird 10691da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 10701da177e4SLinus Torvalds bool 10711da177e4SLinus Torvalds 1072e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1073e2defae5SThomas Bogendoerfer bool 1074e2defae5SThomas Bogendoerfer 10755b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 10765b438c44SThomas Bogendoerfer bool 10775b438c44SThomas Bogendoerfer 1078e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1079e2defae5SThomas Bogendoerfer bool 1080e2defae5SThomas Bogendoerfer 1081e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1082e2defae5SThomas Bogendoerfer bool 1083e2defae5SThomas Bogendoerfer 1084e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1085e2defae5SThomas Bogendoerfer bool 1086e2defae5SThomas Bogendoerfer 1087e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1088e2defae5SThomas Bogendoerfer bool 1089e2defae5SThomas Bogendoerfer 1090e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1091e2defae5SThomas Bogendoerfer bool 1092e2defae5SThomas Bogendoerfer 10930e2794b0SRalf Baechleconfig FW_ARC32 10945e83d430SRalf Baechle bool 10955e83d430SRalf Baechle 1096aaa9fad3SPaul Bolleconfig FW_SNIPROM 1097231a35d3SThomas Bogendoerfer bool 1098231a35d3SThomas Bogendoerfer 10991da177e4SLinus Torvaldsconfig BOOT_ELF32 11001da177e4SLinus Torvalds bool 11011da177e4SLinus Torvalds 1102930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1103930beb5aSFlorian Fainelli bool 1104930beb5aSFlorian Fainelli 1105930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1106930beb5aSFlorian Fainelli bool 1107930beb5aSFlorian Fainelli 1108930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1109930beb5aSFlorian Fainelli bool 1110930beb5aSFlorian Fainelli 1111930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1112930beb5aSFlorian Fainelli bool 1113930beb5aSFlorian Fainelli 11141da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 11151da177e4SLinus Torvalds int 1116a4c0201eSFlorian Fainelli default "4" if MIPS_L1_CACHE_SHIFT_4 1117a4c0201eSFlorian Fainelli default "5" if MIPS_L1_CACHE_SHIFT_5 1118a4c0201eSFlorian Fainelli default "6" if MIPS_L1_CACHE_SHIFT_6 1119a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 11201da177e4SLinus Torvalds default "5" 11211da177e4SLinus Torvalds 11221da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 11231da177e4SLinus Torvalds bool 11241da177e4SLinus Torvalds 11251da177e4SLinus Torvaldsconfig ARC_CONSOLE 11261da177e4SLinus Torvalds bool "ARC console support" 1127e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 11281da177e4SLinus Torvalds 11291da177e4SLinus Torvaldsconfig ARC_MEMORY 11301da177e4SLinus Torvalds bool 113114b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 11321da177e4SLinus Torvalds default y 11331da177e4SLinus Torvalds 11341da177e4SLinus Torvaldsconfig ARC_PROMLIB 11351da177e4SLinus Torvalds bool 1136e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 11371da177e4SLinus Torvalds default y 11381da177e4SLinus Torvalds 11390e2794b0SRalf Baechleconfig FW_ARC64 11401da177e4SLinus Torvalds bool 11411da177e4SLinus Torvalds 11421da177e4SLinus Torvaldsconfig BOOT_ELF64 11431da177e4SLinus Torvalds bool 11441da177e4SLinus Torvalds 11451da177e4SLinus Torvaldsmenu "CPU selection" 11461da177e4SLinus Torvalds 11471da177e4SLinus Torvaldschoice 11481da177e4SLinus Torvalds prompt "CPU type" 11491da177e4SLinus Torvalds default CPU_R4X00 11501da177e4SLinus Torvalds 11510e476d91SHuacai Chenconfig CPU_LOONGSON3 11520e476d91SHuacai Chen bool "Loongson 3 CPU" 11530e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 11540e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 11550e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 11560e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 11570e476d91SHuacai Chen select WEAK_ORDERING 11580e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 11590e476d91SHuacai Chen help 11600e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 11610e476d91SHuacai Chen set with many extensions. 11620e476d91SHuacai Chen 11633702bba5SWu Zhangjinconfig CPU_LOONGSON2E 11643702bba5SWu Zhangjin bool "Loongson 2E" 11653702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 11663702bba5SWu Zhangjin select CPU_LOONGSON2 11672a21c730SFuxin Zhang help 11682a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 11692a21c730SFuxin Zhang with many extensions. 11702a21c730SFuxin Zhang 117125985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 11726f7a251aSWu Zhangjin bonito64. 11736f7a251aSWu Zhangjin 11746f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 11756f7a251aSWu Zhangjin bool "Loongson 2F" 11766f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 11776f7a251aSWu Zhangjin select CPU_LOONGSON2 1178c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 11796f7a251aSWu Zhangjin help 11806f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 11816f7a251aSWu Zhangjin with many extensions. 11826f7a251aSWu Zhangjin 11836f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 11846f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 11856f7a251aSWu Zhangjin Loongson2E. 11866f7a251aSWu Zhangjin 1187ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1188ca585cf9SKelvin Cheung bool "Loongson 1B" 1189ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1190ca585cf9SKelvin Cheung select CPU_LOONGSON1 1191ca585cf9SKelvin Cheung help 1192ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1193ca585cf9SKelvin Cheung release 2 instruction set. 1194ca585cf9SKelvin Cheung 11956e760c8dSRalf Baechleconfig CPU_MIPS32_R1 11966e760c8dSRalf Baechle bool "MIPS32 Release 1" 11977cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 11986e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1199797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1200ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12016e760c8dSRalf Baechle help 12025e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 12031e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12041e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12051e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12061e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12071e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 12081e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 12091e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 12101e5f1caaSRalf Baechle performance. 12111e5f1caaSRalf Baechle 12121e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 12131e5f1caaSRalf Baechle bool "MIPS32 Release 2" 12147cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 12151e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1216797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1217ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1218a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 12192235a54dSSanjay Lal select HAVE_KVM 12201e5f1caaSRalf Baechle help 12215e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 12226e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12236e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12246e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12256e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12261da177e4SLinus Torvalds 12276e760c8dSRalf Baechleconfig CPU_MIPS64_R1 12286e760c8dSRalf Baechle bool "MIPS64 Release 1" 12297cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1230797798c1SRalf Baechle select CPU_HAS_PREFETCH 1231ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1232ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1233ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12349cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 12356e760c8dSRalf Baechle help 12366e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 12376e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12386e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12396e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12406e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12411e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 12421e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 12431e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 12441e5f1caaSRalf Baechle performance. 12451e5f1caaSRalf Baechle 12461e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 12471e5f1caaSRalf Baechle bool "MIPS64 Release 2" 12487cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1249797798c1SRalf Baechle select CPU_HAS_PREFETCH 12501e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 12511e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1252ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12539cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1254a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 12551e5f1caaSRalf Baechle help 12561e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 12571e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12581e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12591e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12601e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12611da177e4SLinus Torvalds 12621da177e4SLinus Torvaldsconfig CPU_R3000 12631da177e4SLinus Torvalds bool "R3000" 12647cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1265f7062ddbSRalf Baechle select CPU_HAS_WB 1266ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1267797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12681da177e4SLinus Torvalds help 12691da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 12701da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 12711da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 12721da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 12731da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 12741da177e4SLinus Torvalds try to recompile with R3000. 12751da177e4SLinus Torvalds 12761da177e4SLinus Torvaldsconfig CPU_TX39XX 12771da177e4SLinus Torvalds bool "R39XX" 12787cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1279ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 12801da177e4SLinus Torvalds 12811da177e4SLinus Torvaldsconfig CPU_VR41XX 12821da177e4SLinus Torvalds bool "R41xx" 12837cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1284ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1285ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 12861da177e4SLinus Torvalds help 12875e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 12881da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 12891da177e4SLinus Torvalds kernel built with this option will not run on any other type of 12901da177e4SLinus Torvalds processor or vice versa. 12911da177e4SLinus Torvalds 12921da177e4SLinus Torvaldsconfig CPU_R4300 12931da177e4SLinus Torvalds bool "R4300" 12947cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1295ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1296ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 12971da177e4SLinus Torvalds help 12981da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 12991da177e4SLinus Torvalds 13001da177e4SLinus Torvaldsconfig CPU_R4X00 13011da177e4SLinus Torvalds bool "R4x00" 13027cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1303ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1304ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1305970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13061da177e4SLinus Torvalds help 13071da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 13081da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 13091da177e4SLinus Torvalds 13101da177e4SLinus Torvaldsconfig CPU_TX49XX 13111da177e4SLinus Torvalds bool "R49XX" 13127cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1313de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1314ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1315ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1316970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13171da177e4SLinus Torvalds 13181da177e4SLinus Torvaldsconfig CPU_R5000 13191da177e4SLinus Torvalds bool "R5000" 13207cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1321ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1322ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1323970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13241da177e4SLinus Torvalds help 13251da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 13261da177e4SLinus Torvalds 13271da177e4SLinus Torvaldsconfig CPU_R5432 13281da177e4SLinus Torvalds bool "R5432" 13297cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 13305e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 13315e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1332970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13331da177e4SLinus Torvalds 1334542c1020SShinya Kuribayashiconfig CPU_R5500 1335542c1020SShinya Kuribayashi bool "R5500" 1336542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1337542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1338542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 13399cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1340542c1020SShinya Kuribayashi help 1341542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1342542c1020SShinya Kuribayashi instruction set. 1343542c1020SShinya Kuribayashi 13441da177e4SLinus Torvaldsconfig CPU_R6000 13451da177e4SLinus Torvalds bool "R6000" 13467cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1347ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 13481da177e4SLinus Torvalds help 13491da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1350c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 13511da177e4SLinus Torvalds 13521da177e4SLinus Torvaldsconfig CPU_NEVADA 13531da177e4SLinus Torvalds bool "RM52xx" 13547cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1355ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1356ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1357970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13581da177e4SLinus Torvalds help 13591da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 13601da177e4SLinus Torvalds 13611da177e4SLinus Torvaldsconfig CPU_R8000 13621da177e4SLinus Torvalds bool "R8000" 13637cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 13645e83d430SRalf Baechle select CPU_HAS_PREFETCH 1365ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 13661da177e4SLinus Torvalds help 13671da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 13681da177e4SLinus Torvalds uncommon and the support for them is incomplete. 13691da177e4SLinus Torvalds 13701da177e4SLinus Torvaldsconfig CPU_R10000 13711da177e4SLinus Torvalds bool "R10000" 13727cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 13735e83d430SRalf Baechle select CPU_HAS_PREFETCH 1374ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1375ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1376797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1377970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13781da177e4SLinus Torvalds help 13791da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 13801da177e4SLinus Torvalds 13811da177e4SLinus Torvaldsconfig CPU_RM7000 13821da177e4SLinus Torvalds bool "RM7000" 13837cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 13845e83d430SRalf Baechle select CPU_HAS_PREFETCH 1385ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1386ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1387797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1388970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13891da177e4SLinus Torvalds 13901da177e4SLinus Torvaldsconfig CPU_SB1 13911da177e4SLinus Torvalds bool "SB1" 13927cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1393ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1394ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1395797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1396970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13970004a9dfSRalf Baechle select WEAK_ORDERING 13981da177e4SLinus Torvalds 1399a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1400a86c7f72SDavid Daney bool "Cavium Octeon processor" 14015e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 14027ee91de4SYoichi Yuasa select ARCH_SPARSEMEM_ENABLE 1403a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1404a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1405a86c7f72SDavid Daney select SYS_SUPPORTS_SMP 1406a86c7f72SDavid Daney select NR_CPUS_DEFAULT_16 1407a86c7f72SDavid Daney select WEAK_ORDERING 1408a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 14099cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14107ed18152SDavid Daney select LIBFDT 14117ed18152SDavid Daney select USE_OF 14129296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 1413930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1414a86c7f72SDavid Daney help 1415a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1416a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1417a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1418a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1419a86c7f72SDavid Daney 1420cd746249SJonas Gorskiconfig CPU_BMIPS 1421cd746249SJonas Gorski bool "Broadcom BMIPS" 1422cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1423cd746249SJonas Gorski select CPU_MIPS32 1424fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1425cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1426cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1427cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1428cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1429cd746249SJonas Gorski select DMA_NONCOHERENT 1430cd746249SJonas Gorski select IRQ_CPU 1431cd746249SJonas Gorski select SWAP_IO_SPACE 1432cd746249SJonas Gorski select WEAK_ORDERING 1433c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 143469aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1435c1c0c461SKevin Cernekee help 1436fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1437c1c0c461SKevin Cernekee 14387f058e85SJayachandran Cconfig CPU_XLR 14397f058e85SJayachandran C bool "Netlogic XLR SoC" 14407f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 14417f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14427f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14437f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1444970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14457f058e85SJayachandran C select WEAK_ORDERING 14467f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14477f058e85SJayachandran C help 14487f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 14491c773ea4SJayachandran C 14501c773ea4SJayachandran Cconfig CPU_XLP 14511c773ea4SJayachandran C bool "Netlogic XLP SoC" 14521c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 14531c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14541c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14551c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 14561c773ea4SJayachandran C select WEAK_ORDERING 14571c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14581c773ea4SJayachandran C select CPU_HAS_PREFETCH 1459d6504846SJayachandran C select CPU_MIPSR2 14601c773ea4SJayachandran C help 14611c773ea4SJayachandran C Netlogic Microsystems XLP processors. 14621da177e4SLinus Torvaldsendchoice 14631da177e4SLinus Torvalds 1464a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1465a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1466a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 1467a6e18781SLeonid Yegoshin depends on CPU_MIPS32_R2 1468a6e18781SLeonid Yegoshin help 1469a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1470a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1471a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1472a6e18781SLeonid Yegoshin 1473a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1474a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1475a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1476a6e18781SLeonid Yegoshin select EVA 1477a6e18781SLeonid Yegoshin default y 1478a6e18781SLeonid Yegoshin help 1479a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1480a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1481a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1482a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1483a6e18781SLeonid Yegoshin 1484622844bfSWu Zhangjinif CPU_LOONGSON2F 1485622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1486622844bfSWu Zhangjin bool 1487622844bfSWu Zhangjin 1488622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1489622844bfSWu Zhangjin bool 1490622844bfSWu Zhangjin 1491622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1492622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1493622844bfSWu Zhangjin default y 1494622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1495622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1496622844bfSWu Zhangjin help 1497622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1498622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1499622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1500622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1501622844bfSWu Zhangjin 1502622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1503622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1504622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1505622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1506622844bfSWu Zhangjin systems. 1507622844bfSWu Zhangjin 1508622844bfSWu Zhangjin If unsure, please say Y. 1509622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1510622844bfSWu Zhangjin 15111b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 15121b93b3c3SWu Zhangjin bool 15131b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 15141b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 151531c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 15161b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1517fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 15184e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 15191b93b3c3SWu Zhangjin 15201b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 15211b93b3c3SWu Zhangjin bool 15221b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 15231b93b3c3SWu Zhangjin 15243702bba5SWu Zhangjinconfig CPU_LOONGSON2 15253702bba5SWu Zhangjin bool 15263702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 15273702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 15283702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1529970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15303702bba5SWu Zhangjin 1531ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1532ca585cf9SKelvin Cheung bool 1533ca585cf9SKelvin Cheung select CPU_MIPS32 1534ca585cf9SKelvin Cheung select CPU_MIPSR2 1535ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1536ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1537ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1538ca585cf9SKelvin Cheung 1539fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 154004fa8bf7SJonas Gorski select SMP_UP if SMP 15411bbb6c1bSKevin Cernekee bool 1542cd746249SJonas Gorski 1543cd746249SJonas Gorskiconfig CPU_BMIPS4350 1544cd746249SJonas Gorski bool 1545cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1546cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1547cd746249SJonas Gorski 1548cd746249SJonas Gorskiconfig CPU_BMIPS4380 1549cd746249SJonas Gorski bool 1550cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1551cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1552cd746249SJonas Gorski 1553cd746249SJonas Gorskiconfig CPU_BMIPS5000 1554cd746249SJonas Gorski bool 1555cd746249SJonas Gorski select MIPS_CPU_SCACHE 1556cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1557cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 15581bbb6c1bSKevin Cernekee 15590e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 15600e476d91SHuacai Chen bool 15610e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 15620e476d91SHuacai Chen 15633702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 15642a21c730SFuxin Zhang bool 15652a21c730SFuxin Zhang 15666f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 15676f7a251aSWu Zhangjin bool 156855045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 156955045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 157022f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 15716f7a251aSWu Zhangjin 1572ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1573ca585cf9SKelvin Cheung bool 1574ca585cf9SKelvin Cheung 15757cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 15767cf8053bSRalf Baechle bool 15777cf8053bSRalf Baechle 15787cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 15797cf8053bSRalf Baechle bool 15807cf8053bSRalf Baechle 1581a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1582a6e18781SLeonid Yegoshin bool 1583a6e18781SLeonid Yegoshin 15847cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 15857cf8053bSRalf Baechle bool 15867cf8053bSRalf Baechle 15877cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 15887cf8053bSRalf Baechle bool 15897cf8053bSRalf Baechle 15907cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 15917cf8053bSRalf Baechle bool 15927cf8053bSRalf Baechle 15937cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 15947cf8053bSRalf Baechle bool 15957cf8053bSRalf Baechle 15967cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 15977cf8053bSRalf Baechle bool 15987cf8053bSRalf Baechle 15997cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 16007cf8053bSRalf Baechle bool 16017cf8053bSRalf Baechle 16027cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 16037cf8053bSRalf Baechle bool 16047cf8053bSRalf Baechle 16057cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 16067cf8053bSRalf Baechle bool 16077cf8053bSRalf Baechle 16087cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 16097cf8053bSRalf Baechle bool 16107cf8053bSRalf Baechle 16117cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 16127cf8053bSRalf Baechle bool 16137cf8053bSRalf Baechle 1614542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1615542c1020SShinya Kuribayashi bool 1616542c1020SShinya Kuribayashi 16177cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 16187cf8053bSRalf Baechle bool 16197cf8053bSRalf Baechle 16207cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 16217cf8053bSRalf Baechle bool 16227cf8053bSRalf Baechle 16237cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 16247cf8053bSRalf Baechle bool 16257cf8053bSRalf Baechle 16267cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 16277cf8053bSRalf Baechle bool 16287cf8053bSRalf Baechle 16297cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 16307cf8053bSRalf Baechle bool 16317cf8053bSRalf Baechle 16327cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 16337cf8053bSRalf Baechle bool 16347cf8053bSRalf Baechle 16355e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 16365e683389SDavid Daney bool 16375e683389SDavid Daney 1638cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1639c1c0c461SKevin Cernekee bool 1640c1c0c461SKevin Cernekee 1641fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1642c1c0c461SKevin Cernekee bool 1643cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1644c1c0c461SKevin Cernekee 1645c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1646c1c0c461SKevin Cernekee bool 1647cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1648c1c0c461SKevin Cernekee 1649c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1650c1c0c461SKevin Cernekee bool 1651cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1652c1c0c461SKevin Cernekee 1653c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1654c1c0c461SKevin Cernekee bool 1655cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1656c1c0c461SKevin Cernekee 16577f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 16587f058e85SJayachandran C bool 16597f058e85SJayachandran C 16601c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 16611c773ea4SJayachandran C bool 16621c773ea4SJayachandran C 166317099b11SRalf Baechle# 166417099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 166517099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 166617099b11SRalf Baechle# 16670004a9dfSRalf Baechleconfig WEAK_ORDERING 16680004a9dfSRalf Baechle bool 166917099b11SRalf Baechle 167017099b11SRalf Baechle# 167117099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 167217099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 167317099b11SRalf Baechle# 167417099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 167517099b11SRalf Baechle bool 16765e83d430SRalf Baechleendmenu 16775e83d430SRalf Baechle 16785e83d430SRalf Baechle# 16795e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 16805e83d430SRalf Baechle# 16815e83d430SRalf Baechleconfig CPU_MIPS32 16825e83d430SRalf Baechle bool 16835e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 16845e83d430SRalf Baechle 16855e83d430SRalf Baechleconfig CPU_MIPS64 16865e83d430SRalf Baechle bool 16875e83d430SRalf Baechle default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 16885e83d430SRalf Baechle 16895e83d430SRalf Baechle# 1690c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 16915e83d430SRalf Baechle# 16925e83d430SRalf Baechleconfig CPU_MIPSR1 16935e83d430SRalf Baechle bool 16945e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 16955e83d430SRalf Baechle 16965e83d430SRalf Baechleconfig CPU_MIPSR2 16975e83d430SRalf Baechle bool 1698a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 16995e83d430SRalf Baechle 1700a6e18781SLeonid Yegoshinconfig EVA 1701a6e18781SLeonid Yegoshin bool 1702a6e18781SLeonid Yegoshin 17035e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 17045e83d430SRalf Baechle bool 17055e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 17065e83d430SRalf Baechle bool 17075e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 17085e83d430SRalf Baechle bool 17095e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 17105e83d430SRalf Baechle bool 171155045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 171255045ff5SWu Zhangjin bool 171355045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 171455045ff5SWu Zhangjin bool 17159cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 17169cffd154SDavid Daney bool 171722f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 171822f1fdfdSWu Zhangjin bool 171982622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 172082622284SDavid Daney bool 1721d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 17225e83d430SRalf Baechle 17238192c9eaSDavid Daney# 17248192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 17258192c9eaSDavid Daney# 17268192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 17278192c9eaSDavid Daney bool 1728f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 17298192c9eaSDavid Daney 17305e83d430SRalf Baechlemenu "Kernel type" 17315e83d430SRalf Baechle 17325e83d430SRalf Baechlechoice 17335e83d430SRalf Baechle prompt "Kernel code model" 17345e83d430SRalf Baechle help 17355e83d430SRalf Baechle You should only select this option if you have a workload that 17365e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 17375e83d430SRalf Baechle large memory. You will only be presented a single option in this 17385e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 17395e83d430SRalf Baechle 17405e83d430SRalf Baechleconfig 32BIT 17415e83d430SRalf Baechle bool "32-bit kernel" 17425e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 17435e83d430SRalf Baechle select TRAD_SIGNALS 17445e83d430SRalf Baechle help 17455e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 17465e83d430SRalf Baechleconfig 64BIT 17475e83d430SRalf Baechle bool "64-bit kernel" 17485e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 17495e83d430SRalf Baechle help 17505e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 17515e83d430SRalf Baechle 17525e83d430SRalf Baechleendchoice 17535e83d430SRalf Baechle 17542235a54dSSanjay Lalconfig KVM_GUEST 17552235a54dSSanjay Lal bool "KVM Guest Kernel" 1756f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 17572235a54dSSanjay Lal help 17582235a54dSSanjay Lal Select this option if building a guest kernel for KVM (Trap & Emulate) mode 17592235a54dSSanjay Lal 17602235a54dSSanjay Lalconfig KVM_HOST_FREQ 17612235a54dSSanjay Lal int "KVM Host Processor Frequency (MHz)" 17622235a54dSSanjay Lal depends on KVM_GUEST 17632235a54dSSanjay Lal default 500 17642235a54dSSanjay Lal help 17652235a54dSSanjay Lal Select this option if building a guest kernel for KVM to skip 17662235a54dSSanjay Lal RTC emulation when determining guest CPU Frequency. Instead, the guest 17672235a54dSSanjay Lal processor frequency is automatically derived from the host frequency. 17682235a54dSSanjay Lal 17691da177e4SLinus Torvaldschoice 17701da177e4SLinus Torvalds prompt "Kernel page size" 17711da177e4SLinus Torvalds default PAGE_SIZE_4KB 17721da177e4SLinus Torvalds 17731da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 17741da177e4SLinus Torvalds bool "4kB" 17750e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 17761da177e4SLinus Torvalds help 17771da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 17781da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 17791da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 17801da177e4SLinus Torvalds recommended for low memory systems. 17811da177e4SLinus Torvalds 17821da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 17831da177e4SLinus Torvalds bool "8kB" 17847d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 17851da177e4SLinus Torvalds help 17861da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 17871da177e4SLinus Torvalds the price of higher memory consumption. This option is available 1788c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 1789c52399beSRalf Baechle suitable Linux distribution to support this. 17901da177e4SLinus Torvalds 17911da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 17921da177e4SLinus Torvalds bool "16kB" 1793714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 17941da177e4SLinus Torvalds help 17951da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 17961da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 1797714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 1798714bfad6SRalf Baechle Linux distribution to support this. 17991da177e4SLinus Torvalds 1800c52399beSRalf Baechleconfig PAGE_SIZE_32KB 1801c52399beSRalf Baechle bool "32kB" 1802c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 1803c52399beSRalf Baechle help 1804c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 1805c52399beSRalf Baechle the price of higher memory consumption. This option is available 1806c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 1807c52399beSRalf Baechle distribution to support this. 1808c52399beSRalf Baechle 18091da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 18101da177e4SLinus Torvalds bool "64kB" 18117d60717eSKees Cook depends on !CPU_R3000 && !CPU_TX39XX 18121da177e4SLinus Torvalds help 18131da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 18141da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 18151da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 1816714bfad6SRalf Baechle writing this option is still high experimental. 18171da177e4SLinus Torvalds 18181da177e4SLinus Torvaldsendchoice 18191da177e4SLinus Torvalds 1820c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 1821c9bace7cSDavid Daney int "Maximum zone order" 1822e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 1823e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 1824e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 1825e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 1826e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 1827e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 1828c9bace7cSDavid Daney range 11 64 1829c9bace7cSDavid Daney default "11" 1830c9bace7cSDavid Daney help 1831c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 1832c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 1833c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 1834c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 1835c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 1836c9bace7cSDavid Daney increase this value. 1837c9bace7cSDavid Daney 1838c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 1839c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 1840c9bace7cSDavid Daney 1841c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 1842c9bace7cSDavid Daney when choosing a value for this option. 1843c9bace7cSDavid Daney 18440ab2b7d0SRaghu Gandhamconfig CEVT_GIC 18450ab2b7d0SRaghu Gandham bool "Use GIC global counter for clock events" 18460ab2b7d0SRaghu Gandham depends on IRQ_GIC && !(MIPS_SEAD3 || MIPS_MT_SMTC) 18470ab2b7d0SRaghu Gandham help 18480ab2b7d0SRaghu Gandham Use the GIC global counter for the clock events. The R4K clock 18490ab2b7d0SRaghu Gandham event driver is always present, so if the platform ends up not 18500ab2b7d0SRaghu Gandham detecting a GIC, it will fall back to the R4K timer for the 18510ab2b7d0SRaghu Gandham generation of clock events. 18520ab2b7d0SRaghu Gandham 18531da177e4SLinus Torvaldsconfig BOARD_SCACHE 18541da177e4SLinus Torvalds bool 18551da177e4SLinus Torvalds 18561da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 18571da177e4SLinus Torvalds bool 18581da177e4SLinus Torvalds select BOARD_SCACHE 18591da177e4SLinus Torvalds 18609318c51aSChris Dearman# 18619318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 18629318c51aSChris Dearman# 18639318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 18649318c51aSChris Dearman bool 18659318c51aSChris Dearman select BOARD_SCACHE 1866930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_6 18679318c51aSChris Dearman 18681da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 18691da177e4SLinus Torvalds bool 18701da177e4SLinus Torvalds select BOARD_SCACHE 18711da177e4SLinus Torvalds 18721da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 18731da177e4SLinus Torvalds bool 18741da177e4SLinus Torvalds select BOARD_SCACHE 18751da177e4SLinus Torvalds 18761da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 18771da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 18781da177e4SLinus Torvalds depends on CPU_SB1 18791da177e4SLinus Torvalds help 18801da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 18811da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 18821da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 18831da177e4SLinus Torvalds 18841da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 1885c8094b53SRalf Baechle bool 18861da177e4SLinus Torvalds 18873165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 18883165c846SFlorian Fainelli bool 18893165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 18903165c846SFlorian Fainelli 189191405eb6SFlorian Fainelliconfig CPU_R4K_FPU 189291405eb6SFlorian Fainelli bool 189391405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 189491405eb6SFlorian Fainelli 189562cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 189662cedc4fSFlorian Fainelli bool 189762cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 189862cedc4fSFlorian Fainelli 1899340ee4b9SRalf Baechlechoice 1900340ee4b9SRalf Baechle prompt "MIPS MT options" 1901f41ae0b2SRalf Baechle 1902f41ae0b2SRalf Baechleconfig MIPS_MT_DISABLED 1903c080faa5SSteven J. Hill bool "Disable multithreading support" 1904f41ae0b2SRalf Baechle help 1905c080faa5SSteven J. Hill Use this option if your platform does not support the MT ASE 1906c080faa5SSteven J. Hill which is hardware multithreading support. On systems without 1907c080faa5SSteven J. Hill an MT-enabled processor, this will be the only option that is 1908c080faa5SSteven J. Hill available in this menu. 1909340ee4b9SRalf Baechle 191059d6ab86SRalf Baechleconfig MIPS_MT_SMP 191159d6ab86SRalf Baechle bool "Use 1 TC on each available VPE for SMP" 191259d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 191359d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 1914d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1915c080faa5SSteven J. Hill select SYNC_R4K 19160c2cb004SPaul Burton select MIPS_GIC_IPI 191759d6ab86SRalf Baechle select MIPS_MT 191859d6ab86SRalf Baechle select SMP 191987353d8aSRalf Baechle select SMP_UP 1920c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 1921c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 1922399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 192359d6ab86SRalf Baechle help 1924c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 1925c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 1926c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 1927c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 1928c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 192959d6ab86SRalf Baechle 193041c594abSRalf Baechleconfig MIPS_MT_SMTC 1931c080faa5SSteven J. Hill bool "Use all TCs on all VPEs for SMP (DEPRECATED)" 1932f41ae0b2SRalf Baechle depends on CPU_MIPS32_R2 1933f41ae0b2SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 19340ee958e1SPaul Burton depends on !MIPS_CPS 1935f7062ddbSRalf Baechle select CPU_MIPSR2_IRQ_VI 1936d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1937f41ae0b2SRalf Baechle select MIPS_MT 193841c594abSRalf Baechle select SMP 193987353d8aSRalf Baechle select SMP_UP 1940c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 1941c080faa5SSteven J. Hill select NR_CPUS_DEFAULT_8 1942f41ae0b2SRalf Baechle help 1943c080faa5SSteven J. Hill This is a kernel model which is known as SMTC. This is 1944c080faa5SSteven J. Hill supported on cores with the MT ASE and presents all TCs 1945c080faa5SSteven J. Hill available on all VPEs to support SMP. For further 1946c080faa5SSteven J. Hill information see <http://www.linux-mips.org/wiki/34K#SMTC>. 194741c594abSRalf Baechle 1948340ee4b9SRalf Baechleendchoice 1949340ee4b9SRalf Baechle 1950f41ae0b2SRalf Baechleconfig MIPS_MT 1951f41ae0b2SRalf Baechle bool 1952f41ae0b2SRalf Baechle 19530ab7aefcSRalf Baechleconfig SCHED_SMT 19540ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 19550ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 19560ab7aefcSRalf Baechle default n 19570ab7aefcSRalf Baechle help 19580ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 19590ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 19600ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 19610ab7aefcSRalf Baechle 19620ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 19630ab7aefcSRalf Baechle bool 19640ab7aefcSRalf Baechle 1965f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 1966f41ae0b2SRalf Baechle bool 1967f41ae0b2SRalf Baechle 1968f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 1969f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 1970f088fc84SRalf Baechle default y 197107cc0c9eSRalf Baechle depends on MIPS_MT_SMP || MIPS_MT_SMTC 197207cc0c9eSRalf Baechle 197307cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 197407cc0c9eSRalf Baechle bool "VPE loader support." 1975704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 197607cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 197707cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 197807cc0c9eSRalf Baechle select MIPS_MT 197907cc0c9eSRalf Baechle help 198007cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 198107cc0c9eSRalf Baechle onto another VPE and running it. 1982f088fc84SRalf Baechle 198317a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 198417a1d523SDeng-Cheng Zhu bool 198517a1d523SDeng-Cheng Zhu default "y" 198617a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 198717a1d523SDeng-Cheng Zhu 19881a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 19891a2a6d7eSDeng-Cheng Zhu bool 19901a2a6d7eSDeng-Cheng Zhu default "y" 19911a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 19921a2a6d7eSDeng-Cheng Zhu 19930db34215SKevin D. Kissellconfig MIPS_MT_SMTC_IM_BACKSTOP 19940db34215SKevin D. Kissell bool "Use per-TC register bits as backstop for inhibited IM bits" 19950db34215SKevin D. Kissell depends on MIPS_MT_SMTC 19968531a35eSKevin D. Kissell default n 19970db34215SKevin D. Kissell help 19980db34215SKevin D. Kissell To support multiple TC microthreads acting as "CPUs" within 19990db34215SKevin D. Kissell a VPE, VPE-wide interrupt mask bits must be specially manipulated 20000db34215SKevin D. Kissell during interrupt handling. To support legacy drivers and interrupt 20010db34215SKevin D. Kissell controller management code, SMTC has a "backstop" to track and 20020db34215SKevin D. Kissell if necessary restore the interrupt mask. This has some performance 20038531a35eSKevin D. Kissell impact on interrupt service overhead. 20040db34215SKevin D. Kissell 2005f571eff0SKevin D. Kissellconfig MIPS_MT_SMTC_IRQAFF 2006f571eff0SKevin D. Kissell bool "Support IRQ affinity API" 2007f571eff0SKevin D. Kissell depends on MIPS_MT_SMTC 2008f571eff0SKevin D. Kissell default n 2009f571eff0SKevin D. Kissell help 2010f571eff0SKevin D. Kissell Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.) 2011f571eff0SKevin D. Kissell for SMTC Linux kernel. Requires platform support, of which 2012f571eff0SKevin D. Kissell an example can be found in the MIPS kernel i8259 and Malta 20138531a35eSKevin D. Kissell platform code. Adds some overhead to interrupt dispatch, and 20148531a35eSKevin D. Kissell should be used only if you know what you are doing. 2015f571eff0SKevin D. Kissell 2016e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2017e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2018e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2019e01402b1SRalf Baechle default y 2020e01402b1SRalf Baechle help 2021e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2022e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2023e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2024e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2025e01402b1SRalf Baechle 2026e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2027e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2028e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 20295e83d430SRalf Baechle help 2030e01402b1SRalf Baechle 2031da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2032da615cf6SDeng-Cheng Zhu bool 2033da615cf6SDeng-Cheng Zhu default "y" 2034da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2035da615cf6SDeng-Cheng Zhu 20362c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 20372c973ef0SDeng-Cheng Zhu bool 20382c973ef0SDeng-Cheng Zhu default "y" 20392c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 20402c973ef0SDeng-Cheng Zhu 20414a16ff4cSRalf Baechleconfig MIPS_CMP 20425cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 2043a6ce202eSPaul Burton depends on SYS_SUPPORTS_MIPS_CMP && !MIPS_MT_SMTC 204472e20142SPaul Burton select MIPS_GIC_IPI 2045eb9b5141STim Anderson select SYNC_R4K 20464a16ff4cSRalf Baechle select WEAK_ORDERING 20474a16ff4cSRalf Baechle default n 20484a16ff4cSRalf Baechle help 2049044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2050044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2051044505c7SPaul Burton its ability to start secondary CPUs. 20524a16ff4cSRalf Baechle 20535cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 20545cac93b3SPaul Burton instead of this. 20555cac93b3SPaul Burton 20560ee958e1SPaul Burtonconfig MIPS_CPS 20570ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 20580ee958e1SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 20590ee958e1SPaul Burton select MIPS_CM 20600ee958e1SPaul Burton select MIPS_CPC 20610ee958e1SPaul Burton select MIPS_GIC_IPI 20620ee958e1SPaul Burton select SMP 20630ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 20640ee958e1SPaul Burton select SYS_SUPPORTS_SMP 20650ee958e1SPaul Burton select WEAK_ORDERING 20660ee958e1SPaul Burton help 20670ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 20680ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 20690ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 20700ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 20710ee958e1SPaul Burton support is unavailable. 20720ee958e1SPaul Burton 207372e20142SPaul Burtonconfig MIPS_GIC_IPI 207472e20142SPaul Burton bool 207572e20142SPaul Burton 20769f98f3ddSPaul Burtonconfig MIPS_CM 20779f98f3ddSPaul Burton bool 20789f98f3ddSPaul Burton 20799c38cf44SPaul Burtonconfig MIPS_CPC 20809c38cf44SPaul Burton bool 20812600990eSRalf Baechle 20821da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 20831da177e4SLinus Torvalds bool 20841da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 20851da177e4SLinus Torvalds default y 20861da177e4SLinus Torvalds 20871da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 20881da177e4SLinus Torvalds bool 20891da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 20901da177e4SLinus Torvalds default y 20911da177e4SLinus Torvalds 20921da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 20931da177e4SLinus Torvalds bool 20941da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 20951da177e4SLinus Torvalds default y 20961da177e4SLinus Torvalds 20972235a54dSSanjay Lal 20981da177e4SLinus Torvaldsconfig 64BIT_PHYS_ADDR 2099d806cb2bSRalf Baechle bool 21001da177e4SLinus Torvalds 210160ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 210260ec6571Spascal@pabr.org def_bool 64BIT_PHYS_ADDR 210360ec6571Spascal@pabr.org 21049693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 21059693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 21069693a853SFranck Bui-Huu bool "Support for the SmartMIPS ASE" 21079693a853SFranck Bui-Huu help 21089693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 21099693a853SFranck Bui-Huu increased security at both hardware and software level for 21109693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 21119693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 21129693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 21139693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 21149693a853SFranck Bui-Huu here. 21159693a853SFranck Bui-Huu 2116bce86083SSteven J. Hillconfig CPU_MICROMIPS 2117bce86083SSteven J. Hill depends on SYS_SUPPORTS_MICROMIPS 2118bce86083SSteven J. Hill bool "Build kernel using microMIPS ISA" 2119bce86083SSteven J. Hill help 2120bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2121bce86083SSteven J. Hill microMIPS ISA 2122bce86083SSteven J. Hill 2123a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 2124a5e9a69eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2125a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 2126a5e9a69eSPaul Burton default y 2127a5e9a69eSPaul Burton help 2128a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2129a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 21301db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 21311db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 21321db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 21331db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 21341db1af84SPaul Burton the size & complexity of your kernel. 2135a5e9a69eSPaul Burton 2136a5e9a69eSPaul Burton If unsure, say Y. 2137a5e9a69eSPaul Burton 21381da177e4SLinus Torvaldsconfig CPU_HAS_WB 2139f7062ddbSRalf Baechle bool 2140e01402b1SRalf Baechle 2141df0ac8a4SKevin Cernekeeconfig XKS01 2142df0ac8a4SKevin Cernekee bool 2143df0ac8a4SKevin Cernekee 2144f41ae0b2SRalf Baechle# 2145f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2146f41ae0b2SRalf Baechle# 2147e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2148f41ae0b2SRalf Baechle bool 2149e01402b1SRalf Baechle 2150f41ae0b2SRalf Baechle# 2151f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2152f41ae0b2SRalf Baechle# 2153e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2154f41ae0b2SRalf Baechle bool 2155e01402b1SRalf Baechle 21561da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 21571da177e4SLinus Torvalds bool 21581da177e4SLinus Torvalds depends on !CPU_R3000 21591da177e4SLinus Torvalds default y 21601da177e4SLinus Torvalds 21611da177e4SLinus Torvalds# 216220d60d99SMaciej W. Rozycki# CPU non-features 216320d60d99SMaciej W. Rozycki# 216420d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 216520d60d99SMaciej W. Rozycki bool 216620d60d99SMaciej W. Rozycki 216720d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 216820d60d99SMaciej W. Rozycki bool 216920d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 217020d60d99SMaciej W. Rozycki 217120d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 217220d60d99SMaciej W. Rozycki bool 217320d60d99SMaciej W. Rozycki 217420d60d99SMaciej W. Rozycki# 21751da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 21761da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 21771da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 21781da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 21791da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 21801da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 21811da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 21821da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2183797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2184797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2185797798c1SRalf Baechle# support. 21861da177e4SLinus Torvalds# 21871da177e4SLinus Torvaldsconfig HIGHMEM 21881da177e4SLinus Torvalds bool "High Memory Support" 2189a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2190797798c1SRalf Baechle 2191797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2192797798c1SRalf Baechle bool 2193797798c1SRalf Baechle 2194797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2195797798c1SRalf Baechle bool 21961da177e4SLinus Torvalds 21979693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 21989693a853SFranck Bui-Huu bool 21999693a853SFranck Bui-Huu 2200a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2201a6a4834cSSteven J. Hill bool 2202a6a4834cSSteven J. Hill 2203a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2204a5e9a69eSPaul Burton bool 2205a5e9a69eSPaul Burton 2206b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2207b4819b59SYoichi Yuasa def_bool y 2208f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2209b4819b59SYoichi Yuasa 2210d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2211d8cb4e11SRalf Baechle bool 2212d8cb4e11SRalf Baechle default y if SGI_IP27 2213d8cb4e11SRalf Baechle help 22143dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2215d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2216d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2217d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2218d8cb4e11SRalf Baechle 2219b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2220b1c6cd42SAtsushi Nemoto bool 22217de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 222231473747SAtsushi Nemoto 2223d8cb4e11SRalf Baechleconfig NUMA 2224d8cb4e11SRalf Baechle bool "NUMA Support" 2225d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2226d8cb4e11SRalf Baechle help 2227d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2228d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2229d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2230d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2231d8cb4e11SRalf Baechle disabled. 2232d8cb4e11SRalf Baechle 2233d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2234d8cb4e11SRalf Baechle bool 2235d8cb4e11SRalf Baechle 2236c80d79d7SYasunori Gotoconfig NODES_SHIFT 2237c80d79d7SYasunori Goto int 2238c80d79d7SYasunori Goto default "6" 2239c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2240c80d79d7SYasunori Goto 224114f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 224214f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 22434be3d2f3SZi Shen Lim depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) 224414f70012SDeng-Cheng Zhu default y 224514f70012SDeng-Cheng Zhu help 224614f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 224714f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 224814f70012SDeng-Cheng Zhu 2249b4819b59SYoichi Yuasasource "mm/Kconfig" 2250b4819b59SYoichi Yuasa 22511da177e4SLinus Torvaldsconfig SMP 22521da177e4SLinus Torvalds bool "Multi-Processing support" 2253e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2254e73ea273SRalf Baechle help 22551da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 22564a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 22574a474157SRobert Graffham than one CPU, say Y. 22581da177e4SLinus Torvalds 22594a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 22601da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 22611da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 22624a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 22631da177e4SLinus Torvalds will run faster if you say N here. 22641da177e4SLinus Torvalds 22651da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 22661da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 22671da177e4SLinus Torvalds 226803502faaSAdrian Bunk See also the SMP-HOWTO available at 226903502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 22701da177e4SLinus Torvalds 22711da177e4SLinus Torvalds If you don't know what to do here, say N. 22721da177e4SLinus Torvalds 227387353d8aSRalf Baechleconfig SMP_UP 227487353d8aSRalf Baechle bool 227587353d8aSRalf Baechle 22764a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 22774a16ff4cSRalf Baechle bool 22784a16ff4cSRalf Baechle 22790ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 22800ee958e1SPaul Burton bool 22810ee958e1SPaul Burton 2282e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2283e73ea273SRalf Baechle bool 2284e73ea273SRalf Baechle 2285130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2286130e2fb7SRalf Baechle bool 2287130e2fb7SRalf Baechle 2288130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2289130e2fb7SRalf Baechle bool 2290130e2fb7SRalf Baechle 2291130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2292130e2fb7SRalf Baechle bool 2293130e2fb7SRalf Baechle 2294130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2295130e2fb7SRalf Baechle bool 2296130e2fb7SRalf Baechle 2297130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2298130e2fb7SRalf Baechle bool 2299130e2fb7SRalf Baechle 23001da177e4SLinus Torvaldsconfig NR_CPUS 23011da177e4SLinus Torvalds int "Maximum number of CPUs (2-64)" 2302c5eaff3eSMarkos Chandras range 2 64 23031da177e4SLinus Torvalds depends on SMP 2304130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2305130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2306130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2307130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2308130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 23091da177e4SLinus Torvalds help 23101da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 23111da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 23121da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 231372ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 231472ede9b1SAtsushi Nemoto and 2 for all others. 23151da177e4SLinus Torvalds 23161da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 231772ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 231872ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 231972ede9b1SAtsushi Nemoto power of two. 23201da177e4SLinus Torvalds 2321399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2322399aaa25SAl Cooper bool 2323399aaa25SAl Cooper 23241723b4a3SAtsushi Nemoto# 23251723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 23261723b4a3SAtsushi Nemoto# 23271723b4a3SAtsushi Nemoto 23281723b4a3SAtsushi Nemotochoice 23291723b4a3SAtsushi Nemoto prompt "Timer frequency" 23301723b4a3SAtsushi Nemoto default HZ_250 23311723b4a3SAtsushi Nemoto help 23321723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 23331723b4a3SAtsushi Nemoto 23341723b4a3SAtsushi Nemoto config HZ_48 23350f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 23361723b4a3SAtsushi Nemoto 23371723b4a3SAtsushi Nemoto config HZ_100 23381723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 23391723b4a3SAtsushi Nemoto 23401723b4a3SAtsushi Nemoto config HZ_128 23411723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 23421723b4a3SAtsushi Nemoto 23431723b4a3SAtsushi Nemoto config HZ_250 23441723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 23451723b4a3SAtsushi Nemoto 23461723b4a3SAtsushi Nemoto config HZ_256 23471723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 23481723b4a3SAtsushi Nemoto 23491723b4a3SAtsushi Nemoto config HZ_1000 23501723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 23511723b4a3SAtsushi Nemoto 23521723b4a3SAtsushi Nemoto config HZ_1024 23531723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 23541723b4a3SAtsushi Nemoto 23551723b4a3SAtsushi Nemotoendchoice 23561723b4a3SAtsushi Nemoto 23571723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 23581723b4a3SAtsushi Nemoto bool 23591723b4a3SAtsushi Nemoto 23601723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 23611723b4a3SAtsushi Nemoto bool 23621723b4a3SAtsushi Nemoto 23631723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 23641723b4a3SAtsushi Nemoto bool 23651723b4a3SAtsushi Nemoto 23661723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 23671723b4a3SAtsushi Nemoto bool 23681723b4a3SAtsushi Nemoto 23691723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 23701723b4a3SAtsushi Nemoto bool 23711723b4a3SAtsushi Nemoto 23721723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 23731723b4a3SAtsushi Nemoto bool 23741723b4a3SAtsushi Nemoto 23751723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 23761723b4a3SAtsushi Nemoto bool 23771723b4a3SAtsushi Nemoto 23781723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 23791723b4a3SAtsushi Nemoto bool 23801723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 23811723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 23821723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 23831723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 23841723b4a3SAtsushi Nemoto 23851723b4a3SAtsushi Nemotoconfig HZ 23861723b4a3SAtsushi Nemoto int 23871723b4a3SAtsushi Nemoto default 48 if HZ_48 23881723b4a3SAtsushi Nemoto default 100 if HZ_100 23891723b4a3SAtsushi Nemoto default 128 if HZ_128 23901723b4a3SAtsushi Nemoto default 250 if HZ_250 23911723b4a3SAtsushi Nemoto default 256 if HZ_256 23921723b4a3SAtsushi Nemoto default 1000 if HZ_1000 23931723b4a3SAtsushi Nemoto default 1024 if HZ_1024 23941723b4a3SAtsushi Nemoto 2395e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 23961da177e4SLinus Torvalds 2397ea6e942bSAtsushi Nemotoconfig KEXEC 23987d60717eSKees Cook bool "Kexec system call" 2399ea6e942bSAtsushi Nemoto help 2400ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2401ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 24023dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2403ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2404ea6e942bSAtsushi Nemoto 240501dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2406ea6e942bSAtsushi Nemoto 2407ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2408ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2409bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2410bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2411bf220695SGeert Uytterhoeven made. 2412ea6e942bSAtsushi Nemoto 24137aa1c8f4SRalf Baechleconfig CRASH_DUMP 24147aa1c8f4SRalf Baechle bool "Kernel crash dumps" 24157aa1c8f4SRalf Baechle help 24167aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 24177aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 24187aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 24197aa1c8f4SRalf Baechle a specially reserved region and then later executed after 24207aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 24217aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 24227aa1c8f4SRalf Baechle PHYSICAL_START. 24237aa1c8f4SRalf Baechle 24247aa1c8f4SRalf Baechleconfig PHYSICAL_START 24257aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 24267aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 24277aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 24287aa1c8f4SRalf Baechle depends on CRASH_DUMP 24297aa1c8f4SRalf Baechle help 24307aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 24317aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 24327aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 24337aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 24347aa1c8f4SRalf Baechle passed to the panic-ed kernel). 24357aa1c8f4SRalf Baechle 2436ea6e942bSAtsushi Nemotoconfig SECCOMP 2437ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2438293c5bd1SRalf Baechle depends on PROC_FS 2439ea6e942bSAtsushi Nemoto default y 2440ea6e942bSAtsushi Nemoto help 2441ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2442ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2443ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2444ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2445ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2446ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2447ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2448ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2449ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2450ea6e942bSAtsushi Nemoto 2451ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2452ea6e942bSAtsushi Nemoto 2453597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 245406e2e882SPaul Burton bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)" 2455597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2456597ce172SPaul Burton help 2457597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2458597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2459597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2460597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2461597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2462597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2463597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2464597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2465597ce172SPaul Burton saying N here. 2466597ce172SPaul Burton 246706e2e882SPaul Burton Although binutils currently supports use of this flag the details 246806e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 246906e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 247006e2e882SPaul Burton behaviour before the details have been finalised, this option should 247106e2e882SPaul Burton be considered experimental and only enabled by those working upon 247206e2e882SPaul Burton said details. 247306e2e882SPaul Burton 247406e2e882SPaul Burton If unsure, say N. 2475597ce172SPaul Burton 2476f2ffa5abSDezhong Diaoconfig USE_OF 24770b3e06fdSJonas Gorski bool 2478f2ffa5abSDezhong Diao select OF 2479e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2480abd2363fSGrant Likely select IRQ_DOMAIN 2481f2ffa5abSDezhong Diao 24825e83d430SRalf Baechleendmenu 24835e83d430SRalf Baechle 24841df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 24851df0f0ffSAtsushi Nemoto bool 24861df0f0ffSAtsushi Nemoto default y 24871df0f0ffSAtsushi Nemoto 24881df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 24891df0f0ffSAtsushi Nemoto bool 24901df0f0ffSAtsushi Nemoto default y 24911df0f0ffSAtsushi Nemoto 2492b6c3539bSRalf Baechlesource "init/Kconfig" 2493b6c3539bSRalf Baechle 2494dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2495dc52ddc0SMatt Helsley 24961da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 24971da177e4SLinus Torvalds 24985e83d430SRalf Baechleconfig HW_HAS_EISA 24995e83d430SRalf Baechle bool 25001da177e4SLinus Torvaldsconfig HW_HAS_PCI 25011da177e4SLinus Torvalds bool 25021da177e4SLinus Torvalds 25031da177e4SLinus Torvaldsconfig PCI 25041da177e4SLinus Torvalds bool "Support for PCI controller" 25051da177e4SLinus Torvalds depends on HW_HAS_PCI 2506abb4ae46SRalf Baechle select PCI_DOMAINS 25070f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 25081da177e4SLinus Torvalds help 25091da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 25101da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 25111da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 25121da177e4SLinus Torvalds say Y, otherwise N. 25131da177e4SLinus Torvalds 25140e476d91SHuacai Chenconfig HT_PCI 25150e476d91SHuacai Chen bool "Support for HT-linked PCI" 25160e476d91SHuacai Chen default y 25170e476d91SHuacai Chen depends on CPU_LOONGSON3 25180e476d91SHuacai Chen select PCI 25190e476d91SHuacai Chen select PCI_DOMAINS 25200e476d91SHuacai Chen help 25210e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 25220e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 25230e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 25240e476d91SHuacai Chen 25251da177e4SLinus Torvaldsconfig PCI_DOMAINS 25261da177e4SLinus Torvalds bool 25271da177e4SLinus Torvalds 25281da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 25291da177e4SLinus Torvalds 25303f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 25313f787ca4SJonas Gorski 25321da177e4SLinus Torvalds# 25331da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 25341da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 25351da177e4SLinus Torvalds# users to choose the right thing ... 25361da177e4SLinus Torvalds# 25371da177e4SLinus Torvaldsconfig ISA 25381da177e4SLinus Torvalds bool 25391da177e4SLinus Torvalds 25401da177e4SLinus Torvaldsconfig EISA 25411da177e4SLinus Torvalds bool "EISA support" 25425e83d430SRalf Baechle depends on HW_HAS_EISA 25431da177e4SLinus Torvalds select ISA 2544aa414dffSRalf Baechle select GENERIC_ISA_DMA 25451da177e4SLinus Torvalds ---help--- 25461da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 25471da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 25481da177e4SLinus Torvalds 25491da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 25501da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 25511da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 25521da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 25531da177e4SLinus Torvalds 25541da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 25551da177e4SLinus Torvalds 25561da177e4SLinus Torvalds Otherwise, say N. 25571da177e4SLinus Torvalds 25581da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 25591da177e4SLinus Torvalds 25601da177e4SLinus Torvaldsconfig TC 25611da177e4SLinus Torvalds bool "TURBOchannel support" 25621da177e4SLinus Torvalds depends on MACH_DECSTATION 25631da177e4SLinus Torvalds help 256450a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 256550a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 256650a23e6eSJustin P. Mattock at: 256750a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 256850a23e6eSJustin P. Mattock and: 256950a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 257050a23e6eSJustin P. Mattock Linux driver support status is documented at: 257150a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 25721da177e4SLinus Torvalds 25731da177e4SLinus Torvaldsconfig MMU 25741da177e4SLinus Torvalds bool 25751da177e4SLinus Torvalds default y 25761da177e4SLinus Torvalds 2577d865bea4SRalf Baechleconfig I8253 2578d865bea4SRalf Baechle bool 2579798778b8SRussell King select CLKSRC_I8253 25802d02612fSThomas Gleixner select CLKEVT_I8253 25819726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2582d865bea4SRalf Baechle 2583e05eb3f8SRalf Baechleconfig ZONE_DMA 2584e05eb3f8SRalf Baechle bool 2585e05eb3f8SRalf Baechle 2586cce335aeSRalf Baechleconfig ZONE_DMA32 2587cce335aeSRalf Baechle bool 2588cce335aeSRalf Baechle 25891da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 25901da177e4SLinus Torvalds 25911da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 25921da177e4SLinus Torvalds 2593388b78adSAlexandre Bounineconfig RAPIDIO 259456abde72SAlexandre Bounine tristate "RapidIO support" 2595388b78adSAlexandre Bounine depends on PCI 2596388b78adSAlexandre Bounine default n 2597388b78adSAlexandre Bounine help 2598388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2599388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2600388b78adSAlexandre Bounine 2601388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2602388b78adSAlexandre Bounine 26031da177e4SLinus Torvaldsendmenu 26041da177e4SLinus Torvalds 26051da177e4SLinus Torvaldsmenu "Executable file formats" 26061da177e4SLinus Torvalds 26071da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 26081da177e4SLinus Torvalds 26091da177e4SLinus Torvaldsconfig TRAD_SIGNALS 26101da177e4SLinus Torvalds bool 26111da177e4SLinus Torvalds 26121da177e4SLinus Torvaldsconfig MIPS32_COMPAT 26131da177e4SLinus Torvalds bool "Kernel support for Linux/MIPS 32-bit binary compatibility" 2614875d43e7SRalf Baechle depends on 64BIT 26151da177e4SLinus Torvalds help 26161da177e4SLinus Torvalds Select this option if you want Linux/MIPS 32-bit binary 26171da177e4SLinus Torvalds compatibility. Since all software available for Linux/MIPS is 26181da177e4SLinus Torvalds currently 32-bit you should say Y here. 26191da177e4SLinus Torvalds 26201da177e4SLinus Torvaldsconfig COMPAT 26211da177e4SLinus Torvalds bool 26221da177e4SLinus Torvalds depends on MIPS32_COMPAT 262348b25c43SChris Metcalf select ARCH_WANT_OLD_COMPAT_IPC 26241da177e4SLinus Torvalds default y 26251da177e4SLinus Torvalds 262605e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 262705e43966SAtsushi Nemoto bool 262805e43966SAtsushi Nemoto depends on COMPAT && SYSVIPC 262905e43966SAtsushi Nemoto default y 263005e43966SAtsushi Nemoto 26311da177e4SLinus Torvaldsconfig MIPS32_O32 26321da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 26331da177e4SLinus Torvalds depends on MIPS32_COMPAT 26341da177e4SLinus Torvalds help 26351da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 26361da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 26371da177e4SLinus Torvalds existing binaries are in this format. 26381da177e4SLinus Torvalds 26391da177e4SLinus Torvalds If unsure, say Y. 26401da177e4SLinus Torvalds 26411da177e4SLinus Torvaldsconfig MIPS32_N32 26421da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 26431da177e4SLinus Torvalds depends on MIPS32_COMPAT 26441da177e4SLinus Torvalds help 26451da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 26461da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 26471da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 26481da177e4SLinus Torvalds cases. 26491da177e4SLinus Torvalds 26501da177e4SLinus Torvalds If unsure, say N. 26511da177e4SLinus Torvalds 26521da177e4SLinus Torvaldsconfig BINFMT_ELF32 26531da177e4SLinus Torvalds bool 26541da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 26551da177e4SLinus Torvalds 26562116245eSRalf Baechleendmenu 26571da177e4SLinus Torvalds 26582116245eSRalf Baechlemenu "Power management options" 2659952fa954SRodolfo Giometti 2660363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2661363c55caSWu Zhangjin def_bool y 26623f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2663363c55caSWu Zhangjin 2664f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2665f4cb5700SJohannes Berg def_bool y 26663f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2667f4cb5700SJohannes Berg 26682116245eSRalf Baechlesource "kernel/power/Kconfig" 2669952fa954SRodolfo Giometti 26701da177e4SLinus Torvaldsendmenu 26711da177e4SLinus Torvalds 26727a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 26737a998935SViresh Kumar bool 26747a998935SViresh Kumar 26757a998935SViresh Kumarif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 26767a998935SViresh Kumarmenu "CPU Power Management" 26777a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 26787a998935SViresh Kumarendmenu 26797a998935SViresh Kumarendif 26809726b43aSWu Zhangjin 2681d5950b43SSam Ravnborgsource "net/Kconfig" 2682d5950b43SSam Ravnborg 26831da177e4SLinus Torvaldssource "drivers/Kconfig" 26841da177e4SLinus Torvalds 268598cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 268698cdee0eSRalf Baechle 26871da177e4SLinus Torvaldssource "fs/Kconfig" 26881da177e4SLinus Torvalds 26891da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 26901da177e4SLinus Torvalds 26911da177e4SLinus Torvaldssource "security/Kconfig" 26921da177e4SLinus Torvalds 26931da177e4SLinus Torvaldssource "crypto/Kconfig" 26941da177e4SLinus Torvalds 26951da177e4SLinus Torvaldssource "lib/Kconfig" 26962235a54dSSanjay Lal 26972235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 2698