11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 5393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 6c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 7f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 8ec7748b5SSam Ravnborg select HAVE_IDE 942d4b839SMathieu Desnoyers select HAVE_OPROFILE 107f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 117f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1288547001SJason Wessel select HAVE_ARCH_KGDB 13490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 14c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 153f5fdb4bSMarkos Chandras select HAVE_BPF_JIT if !CPU_MICROMIPS 167563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 17d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 1869a7d1b3SWu Zhangjin select HAVE_FUNCTION_TRACE_MCOUNT_TEST 19538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 20538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2164575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2229c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 23c1bf207dSDavid Daney select HAVE_KPROBES 24c1bf207dSDavid Daney select HAVE_KRETPROBES 25b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 261d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 27e26d196cSDavid Daney select ARCH_BINFMT_ELF_RANDOMIZE_PIE 28383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 2921a41faaSWu Zhangjin select RTC_LIB if !MACH_LOONGSON 302b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 317463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3248e1fd5aSDavid Daney select HAVE_DMA_ATTRS 3348e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 343bd27e32SDavid Daney select GENERIC_IRQ_PROBE 35f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3678857614SMarkos Chandras select GENERIC_PCI_IOMAP 3794bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 38c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 390f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 409d15ffc8STejun Heo select HAVE_MEMBLOCK 419d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 429d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 43360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 444b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 45cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 46cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 47786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 484febd95aSStephen Rothwell select VIRT_TO_BUS 492f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 502f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5150150d2bSAl Viro select CLONE_BACKWARDS 52d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5319952a92SKees Cook select HAVE_CC_STACKPROTECTOR 54b1d4c6caSJames Hogan select CPU_PM if CPU_IDLE 55cc7964afSPaul Burton select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 561da177e4SLinus Torvalds 571da177e4SLinus Torvaldsmenu "Machine selection" 581da177e4SLinus Torvalds 595e83d430SRalf Baechlechoice 605e83d430SRalf Baechle prompt "System type" 615e83d430SRalf Baechle default SGI_IP22 621da177e4SLinus Torvalds 6342a4f17dSManuel Laussconfig MIPS_ALCHEMY 64c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 6542a4f17dSManuel Lauss select 64BIT_PHYS_ADDR 66f772cdb2SRalf Baechle select CEVT_R4K 67d7ea335cSSteven J. Hill select CSRC_R4K 6842a4f17dSManuel Lauss select IRQ_CPU 6988e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 7042a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 7142a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 7242a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 73efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 741b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 751da177e4SLinus Torvalds 767ca5dc14SFlorian Fainelliconfig AR7 777ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 787ca5dc14SFlorian Fainelli select BOOT_ELF32 797ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 807ca5dc14SFlorian Fainelli select CEVT_R4K 817ca5dc14SFlorian Fainelli select CSRC_R4K 827ca5dc14SFlorian Fainelli select IRQ_CPU 837ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 847ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 857ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 867ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 877ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 887ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 89377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 901b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 915f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 927ca5dc14SFlorian Fainelli select VLYNQ 938551fb64SYoichi Yuasa select HAVE_CLK 947ca5dc14SFlorian Fainelli help 957ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 967ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 977ca5dc14SFlorian Fainelli 98d4a67d9dSGabor Juhosconfig ATH79 99d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 1006eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 101d4a67d9dSGabor Juhos select BOOT_RAW 102d4a67d9dSGabor Juhos select CEVT_R4K 103d4a67d9dSGabor Juhos select CSRC_R4K 104d4a67d9dSGabor Juhos select DMA_NONCOHERENT 10594638067SGabor Juhos select HAVE_CLK 1062c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 107d4a67d9dSGabor Juhos select IRQ_CPU 1080aabf1a4SGabor Juhos select MIPS_MACHINE 109d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 110d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 111d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 112d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 113377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 114d4a67d9dSGabor Juhos help 115d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 116d4a67d9dSGabor Juhos 1171c0c13ebSAurelien Jarnoconfig BCM47XX 118c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1192da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 120fe08f8c2SHauke Mehrtens select BOOT_RAW 12142f77542SRalf Baechle select CEVT_R4K 122940f6b48SRalf Baechle select CSRC_R4K 1231c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1241c0c13ebSAurelien Jarno select HW_HAS_PCI 1251c0c13ebSAurelien Jarno select IRQ_CPU 126314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 127dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1281c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1291c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 130377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 13125e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 132e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 1331c0c13ebSAurelien Jarno help 1341c0c13ebSAurelien Jarno Support for BCM47XX based boards 1351c0c13ebSAurelien Jarno 136e7300d04SMaxime Bizonconfig BCM63XX 137e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 138ae8de61cSFlorian Fainelli select BOOT_RAW 139e7300d04SMaxime Bizon select CEVT_R4K 140e7300d04SMaxime Bizon select CSRC_R4K 141e7300d04SMaxime Bizon select DMA_NONCOHERENT 142e7300d04SMaxime Bizon select IRQ_CPU 143e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 144e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 145e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 146e7300d04SMaxime Bizon select SWAP_IO_SPACE 147e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 1483e82eeebSYoichi Yuasa select HAVE_CLK 149af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 150e7300d04SMaxime Bizon help 151e7300d04SMaxime Bizon Support for BCM63XX based boards 152e7300d04SMaxime Bizon 1531da177e4SLinus Torvaldsconfig MIPS_COBALT 1543fa986faSMartin Michlmayr bool "Cobalt Server" 15542f77542SRalf Baechle select CEVT_R4K 156940f6b48SRalf Baechle select CSRC_R4K 1571097c6acSYoichi Yuasa select CEVT_GT641XX 1581da177e4SLinus Torvalds select DMA_NONCOHERENT 1591da177e4SLinus Torvalds select HW_HAS_PCI 160d865bea4SRalf Baechle select I8253 1611da177e4SLinus Torvalds select I8259 1621da177e4SLinus Torvalds select IRQ_CPU 163d5ab1a69SYoichi Yuasa select IRQ_GT641XX 164252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 165e25bfc92SYoichi Yuasa select PCI 1667cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 1670a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 168ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1690e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 1705e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 171e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 1721da177e4SLinus Torvalds 1731da177e4SLinus Torvaldsconfig MACH_DECSTATION 1743fa986faSMartin Michlmayr bool "DECstations" 1751da177e4SLinus Torvalds select BOOT_ELF32 1766457d9fcSYoichi Yuasa select CEVT_DS1287 17781d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 1784247417dSYoichi Yuasa select CSRC_IOASIC 17981d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 18020d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 18120d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 18220d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 1831da177e4SLinus Torvalds select DMA_NONCOHERENT 184ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 1851da177e4SLinus Torvalds select IRQ_CPU 1867cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 1877cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 188ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1897d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 1905e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1911723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 1921723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 1931723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 194930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 1955e83d430SRalf Baechle help 1961da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 1971da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 1981da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 1991da177e4SLinus Torvalds 2001da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 2011da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 2021da177e4SLinus Torvalds 2031da177e4SLinus Torvalds DECstation 5000/50 2041da177e4SLinus Torvalds DECstation 5000/150 2051da177e4SLinus Torvalds DECstation 5000/260 2061da177e4SLinus Torvalds DECsystem 5900/260 2071da177e4SLinus Torvalds 2081da177e4SLinus Torvalds otherwise choose R3000. 2091da177e4SLinus Torvalds 2105e83d430SRalf Baechleconfig MACH_JAZZ 2113fa986faSMartin Michlmayr bool "Jazz family of machines" 2120e2794b0SRalf Baechle select FW_ARC 2130e2794b0SRalf Baechle select FW_ARC32 2145e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 21542f77542SRalf Baechle select CEVT_R4K 216940f6b48SRalf Baechle select CSRC_R4K 217e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2185e83d430SRalf Baechle select GENERIC_ISA_DMA 2198a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 220ea202c63SThomas Bogendoerfer select IRQ_CPU 221d865bea4SRalf Baechle select I8253 2225e83d430SRalf Baechle select I8259 2235e83d430SRalf Baechle select ISA 2247cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2255e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2267d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2271723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2281da177e4SLinus Torvalds help 2295e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2305e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 231692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2325e83d430SRalf Baechle Olivetti M700-10 workstations. 2335e83d430SRalf Baechle 2345ebabe59SLars-Peter Clausenconfig MACH_JZ4740 2355ebabe59SLars-Peter Clausen bool "Ingenic JZ4740 based machines" 2365ebabe59SLars-Peter Clausen select SYS_HAS_CPU_MIPS32_R1 2375ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2385ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 239f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 2405ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 2415ebabe59SLars-Peter Clausen select IRQ_CPU 2425ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 2435ebabe59SLars-Peter Clausen select SYS_HAS_EARLY_PRINTK 244ab5330ebSMaurus Cuelenaere select HAVE_CLK 24583bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 2465ebabe59SLars-Peter Clausen 247171bb2f1SJohn Crispinconfig LANTIQ 248171bb2f1SJohn Crispin bool "Lantiq based platforms" 249171bb2f1SJohn Crispin select DMA_NONCOHERENT 250171bb2f1SJohn Crispin select IRQ_CPU 251171bb2f1SJohn Crispin select CEVT_R4K 252171bb2f1SJohn Crispin select CSRC_R4K 253171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 254171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 255171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 256171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 257377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 258171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 259171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 260171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 261171bb2f1SJohn Crispin select SWAP_IO_SPACE 262171bb2f1SJohn Crispin select BOOT_RAW 263287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 264287e3f3fSJohn Crispin select CLKDEV_LOOKUP 265a0392222SJohn Crispin select USE_OF 2663f8c50c9SJohn Crispin select PINCTRL 2673f8c50c9SJohn Crispin select PINCTRL_LANTIQ 268171bb2f1SJohn Crispin 2691f21d2bdSBrian Murphyconfig LASAT 2701f21d2bdSBrian Murphy bool "LASAT Networks platforms" 27142f77542SRalf Baechle select CEVT_R4K 272940f6b48SRalf Baechle select CSRC_R4K 2731f21d2bdSBrian Murphy select DMA_NONCOHERENT 2741f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 2751f21d2bdSBrian Murphy select HW_HAS_PCI 276a5ccfe5cSRalf Baechle select IRQ_CPU 2771f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 2781f21d2bdSBrian Murphy select MIPS_NILE4 2791f21d2bdSBrian Murphy select R5000_CPU_SCACHE 2801f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 2811f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 2821f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 2831f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 2841f21d2bdSBrian Murphy 28585749d24SWu Zhangjinconfig MACH_LOONGSON 28685749d24SWu Zhangjin bool "Loongson family of machines" 287c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 288ade299d8SYoichi Yuasa help 28985749d24SWu Zhangjin This enables the support of Loongson family of machines. 29085749d24SWu Zhangjin 29185749d24SWu Zhangjin Loongson is a family of general-purpose MIPS-compatible CPUs. 29285749d24SWu Zhangjin developed at Institute of Computing Technology (ICT), 29385749d24SWu Zhangjin Chinese Academy of Sciences (CAS) in the People's Republic 29485749d24SWu Zhangjin of China. The chief architect is Professor Weiwu Hu. 295ade299d8SYoichi Yuasa 296ca585cf9SKelvin Cheungconfig MACH_LOONGSON1 297ca585cf9SKelvin Cheung bool "Loongson 1 family of machines" 298ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 299ca585cf9SKelvin Cheung help 300ca585cf9SKelvin Cheung This enables support for the Loongson 1 based machines. 301ca585cf9SKelvin Cheung 302ca585cf9SKelvin Cheung Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by 303ca585cf9SKelvin Cheung the ICT (Institute of Computing Technology) and the Chinese Academy 304ca585cf9SKelvin Cheung of Sciences. 305ca585cf9SKelvin Cheung 3061da177e4SLinus Torvaldsconfig MIPS_MALTA 3073fa986faSMartin Michlmayr bool "MIPS Malta board" 30861ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 3091da177e4SLinus Torvalds select BOOT_ELF32 310fa71c960SRalf Baechle select BOOT_RAW 31142f77542SRalf Baechle select CEVT_R4K 312940f6b48SRalf Baechle select CSRC_R4K 313778eeb1bSSteven J. Hill select CSRC_GIC 314885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 3151da177e4SLinus Torvalds select GENERIC_ISA_DMA 3168a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 317aa414dffSRalf Baechle select IRQ_CPU 31839b8d525SRalf Baechle select IRQ_GIC 3191da177e4SLinus Torvalds select HW_HAS_PCI 320d865bea4SRalf Baechle select I8253 3211da177e4SLinus Torvalds select I8259 3225e83d430SRalf Baechle select MIPS_BONITO64 3239318c51aSChris Dearman select MIPS_CPU_SCACHE 324252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 3255e83d430SRalf Baechle select MIPS_MSC 3261da177e4SLinus Torvalds select SWAP_IO_SPACE 3277cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 3287cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 329bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 3307cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 3315d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 3327cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3337cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 334ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 335ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 3365e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 3375e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3380365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 339e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 340377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 341f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 3429693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 3431b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 3441da177e4SLinus Torvalds help 345f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 3461da177e4SLinus Torvalds board. 3471da177e4SLinus Torvalds 348ec47b274SSteven J. Hillconfig MIPS_SEAD3 349ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 350ec47b274SSteven J. Hill select BOOT_ELF32 351ec47b274SSteven J. Hill select BOOT_RAW 352ec47b274SSteven J. Hill select CEVT_R4K 353ec47b274SSteven J. Hill select CSRC_R4K 354dfa762e1SSteven J. Hill select CSRC_GIC 355ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 356ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 357ec47b274SSteven J. Hill select DMA_NONCOHERENT 358ec47b274SSteven J. Hill select IRQ_CPU 359ec47b274SSteven J. Hill select IRQ_GIC 36044327236SQais Yousef select LIBFDT 361ec47b274SSteven J. Hill select MIPS_MSC 362ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 363ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 364ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 365ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 366ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 367ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 368ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 369ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 370ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 371a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 372377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 373ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 374ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 3759b731009SSteven J. Hill select USE_OF 376ec47b274SSteven J. Hill help 377ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 378ec47b274SSteven J. Hill board. 379ec47b274SSteven J. Hill 380a83860c2SRalf Baechleconfig NEC_MARKEINS 381a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 382a83860c2SRalf Baechle select SOC_EMMA2RH 383a83860c2SRalf Baechle select HW_HAS_PCI 384a83860c2SRalf Baechle help 385a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 386ade299d8SYoichi Yuasa 3875e83d430SRalf Baechleconfig MACH_VR41XX 38874142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 38942f77542SRalf Baechle select CEVT_R4K 390940f6b48SRalf Baechle select CSRC_R4K 3917cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 392377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 39327fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 3945e83d430SRalf Baechle 395edb6310aSDaniel Lairdconfig NXP_STB220 396edb6310aSDaniel Laird bool "NXP STB220 board" 397edb6310aSDaniel Laird select SOC_PNX833X 398edb6310aSDaniel Laird help 399edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 400edb6310aSDaniel Laird 401edb6310aSDaniel Lairdconfig NXP_STB225 402edb6310aSDaniel Laird bool "NXP 225 board" 403edb6310aSDaniel Laird select SOC_PNX833X 404edb6310aSDaniel Laird select SOC_PNX8335 405edb6310aSDaniel Laird help 406edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 407edb6310aSDaniel Laird 4089267a30dSMarc St-Jeanconfig PMC_MSP 4099267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 41039d30c13SAnoop P A select CEVT_R4K 41139d30c13SAnoop P A select CSRC_R4K 4129267a30dSMarc St-Jean select DMA_NONCOHERENT 4139267a30dSMarc St-Jean select SWAP_IO_SPACE 4149267a30dSMarc St-Jean select NO_EXCEPT_FILL 4159267a30dSMarc St-Jean select BOOT_RAW 4169267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 4179267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 4189267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 4199267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 420377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 4219267a30dSMarc St-Jean select IRQ_CPU 4229267a30dSMarc St-Jean select SERIAL_8250 4239267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 4249296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 4259296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 4269267a30dSMarc St-Jean help 4279267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 4289267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 4299267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 4309267a30dSMarc St-Jean a variety of MIPS cores. 4319267a30dSMarc St-Jean 432ae2b5bb6SJohn Crispinconfig RALINK 433ae2b5bb6SJohn Crispin bool "Ralink based machines" 434ae2b5bb6SJohn Crispin select CEVT_R4K 435ae2b5bb6SJohn Crispin select CSRC_R4K 436ae2b5bb6SJohn Crispin select BOOT_RAW 437ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 438ae2b5bb6SJohn Crispin select IRQ_CPU 439ae2b5bb6SJohn Crispin select USE_OF 440ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 441ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 442ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 443ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 444377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 445ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 446ae2b5bb6SJohn Crispin select HAVE_MACH_CLKDEV 447ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 4482a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 4492a153f1cSJohn Crispin select RESET_CONTROLLER 450ae2b5bb6SJohn Crispin 4511da177e4SLinus Torvaldsconfig SGI_IP22 4523fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 4530e2794b0SRalf Baechle select FW_ARC 4540e2794b0SRalf Baechle select FW_ARC32 4551da177e4SLinus Torvalds select BOOT_ELF32 45642f77542SRalf Baechle select CEVT_R4K 457940f6b48SRalf Baechle select CSRC_R4K 458e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 4591da177e4SLinus Torvalds select DMA_NONCOHERENT 4605e83d430SRalf Baechle select HW_HAS_EISA 461d865bea4SRalf Baechle select I8253 46268de4803SThomas Bogendoerfer select I8259 4631da177e4SLinus Torvalds select IP22_CPU_SCACHE 4641da177e4SLinus Torvalds select IRQ_CPU 465aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 466e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 467e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 46836e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 469e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 470e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 471e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 4721da177e4SLinus Torvalds select SWAP_IO_SPACE 4737cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 4747cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 4752b5e63f6SMartin Michlmayr # 4762b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 4772b5e63f6SMartin Michlmayr # memory during early boot on some machines. 4782b5e63f6SMartin Michlmayr # 4792b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 4802b5e63f6SMartin Michlmayr # for a more details discussion 4812b5e63f6SMartin Michlmayr # 4822b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 483ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 484ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4855e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 486930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 4871da177e4SLinus Torvalds help 4881da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 4891da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 4901da177e4SLinus Torvalds that runs on these, say Y here. 4911da177e4SLinus Torvalds 4921da177e4SLinus Torvaldsconfig SGI_IP27 4933fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 4940e2794b0SRalf Baechle select FW_ARC 4950e2794b0SRalf Baechle select FW_ARC64 4965e83d430SRalf Baechle select BOOT_ELF64 497e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 498634286f1SRalf Baechle select DMA_COHERENT 49936a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 5001da177e4SLinus Torvalds select HW_HAS_PCI 501130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 5027cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 503ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5045e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 505d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 5061a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 507930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 5081da177e4SLinus Torvalds help 5091da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 5101da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 5111da177e4SLinus Torvalds here. 5121da177e4SLinus Torvalds 513e2defae5SThomas Bogendoerferconfig SGI_IP28 5147d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 5150e2794b0SRalf Baechle select FW_ARC 5160e2794b0SRalf Baechle select FW_ARC64 517e2defae5SThomas Bogendoerfer select BOOT_ELF64 518e2defae5SThomas Bogendoerfer select CEVT_R4K 519e2defae5SThomas Bogendoerfer select CSRC_R4K 520e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 521e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 522e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 523e2defae5SThomas Bogendoerfer select IRQ_CPU 524e2defae5SThomas Bogendoerfer select HW_HAS_EISA 525e2defae5SThomas Bogendoerfer select I8253 526e2defae5SThomas Bogendoerfer select I8259 527e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 528e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 5295b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 530e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 531e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 532e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 533e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 534e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 5352b5e63f6SMartin Michlmayr # 5362b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5372b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5382b5e63f6SMartin Michlmayr # 5392b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5402b5e63f6SMartin Michlmayr # for a more details discussion 5412b5e63f6SMartin Michlmayr # 5422b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 543e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 544e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 545e2defae5SThomas Bogendoerfer help 546e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 547e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 548e2defae5SThomas Bogendoerfer 5491da177e4SLinus Torvaldsconfig SGI_IP32 550cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 5510e2794b0SRalf Baechle select FW_ARC 5520e2794b0SRalf Baechle select FW_ARC32 5531da177e4SLinus Torvalds select BOOT_ELF32 55442f77542SRalf Baechle select CEVT_R4K 555940f6b48SRalf Baechle select CSRC_R4K 5561da177e4SLinus Torvalds select DMA_NONCOHERENT 5571da177e4SLinus Torvalds select HW_HAS_PCI 558dd67b155SRalf Baechle select IRQ_CPU 5591da177e4SLinus Torvalds select R5000_CPU_SCACHE 5601da177e4SLinus Torvalds select RM7000_CPU_SCACHE 5617cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5627cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 5637cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 564dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 565ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5665e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5671da177e4SLinus Torvalds help 5681da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 5691da177e4SLinus Torvalds 570ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 571ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 5725e83d430SRalf Baechle select BOOT_ELF32 5735e83d430SRalf Baechle select DMA_COHERENT 5745e83d430SRalf Baechle select SIBYTE_BCM1120 5755e83d430SRalf Baechle select SWAP_IO_SPACE 5767cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5775e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5785e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5795e83d430SRalf Baechle 580ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 581ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 5825e83d430SRalf Baechle select BOOT_ELF32 5835e83d430SRalf Baechle select DMA_COHERENT 5845e83d430SRalf Baechle select SIBYTE_BCM1120 5855e83d430SRalf Baechle select SWAP_IO_SPACE 5867cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5875e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5885e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5895e83d430SRalf Baechle 5905e83d430SRalf Baechleconfig SIBYTE_CRHONE 5913fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 5925e83d430SRalf Baechle select BOOT_ELF32 5935e83d430SRalf Baechle select DMA_COHERENT 5945e83d430SRalf Baechle select SIBYTE_BCM1125 5955e83d430SRalf Baechle select SWAP_IO_SPACE 5967cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5975e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5985e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 5995e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6005e83d430SRalf Baechle 601ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 602ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 603ade299d8SYoichi Yuasa select BOOT_ELF32 604ade299d8SYoichi Yuasa select DMA_COHERENT 605ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 606ade299d8SYoichi Yuasa select SWAP_IO_SPACE 607ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 608ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 609ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 610ade299d8SYoichi Yuasa 611ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 612ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 613ade299d8SYoichi Yuasa select BOOT_ELF32 614ade299d8SYoichi Yuasa select DMA_COHERENT 615fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 616ade299d8SYoichi Yuasa select SIBYTE_SB1250 617ade299d8SYoichi Yuasa select SWAP_IO_SPACE 618ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 619ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 620ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 621ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 622cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 623ade299d8SYoichi Yuasa 624ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 625ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 626ade299d8SYoichi Yuasa select BOOT_ELF32 627ade299d8SYoichi Yuasa select DMA_COHERENT 628fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 629ade299d8SYoichi Yuasa select SIBYTE_SB1250 630ade299d8SYoichi Yuasa select SWAP_IO_SPACE 631ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 632ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 633ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 634ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 635ade299d8SYoichi Yuasa 636ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 637ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 638ade299d8SYoichi Yuasa select BOOT_ELF32 639ade299d8SYoichi Yuasa select DMA_COHERENT 640ade299d8SYoichi Yuasa select SIBYTE_SB1250 641ade299d8SYoichi Yuasa select SWAP_IO_SPACE 642ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 643ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 644ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 645ade299d8SYoichi Yuasa 646ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 647ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 648ade299d8SYoichi Yuasa select BOOT_ELF32 649ade299d8SYoichi Yuasa select DMA_COHERENT 650ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 651ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 652ade299d8SYoichi Yuasa select SWAP_IO_SPACE 653ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 654ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 655651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 656ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 657cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 658ade299d8SYoichi Yuasa 65914b36af4SThomas Bogendoerferconfig SNI_RM 66014b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 6610e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 6620e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 663aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 6645e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 6655e83d430SRalf Baechle select BOOT_ELF32 66642f77542SRalf Baechle select CEVT_R4K 667940f6b48SRalf Baechle select CSRC_R4K 668e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 6695e83d430SRalf Baechle select DMA_NONCOHERENT 6705e83d430SRalf Baechle select GENERIC_ISA_DMA 6718a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 6725e83d430SRalf Baechle select HW_HAS_EISA 6735e83d430SRalf Baechle select HW_HAS_PCI 674c066a32aSThomas Bogendoerfer select IRQ_CPU 675d865bea4SRalf Baechle select I8253 6765e83d430SRalf Baechle select I8259 6775e83d430SRalf Baechle select ISA 6784a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 6797cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6804a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 681c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 6824a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 68336a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 684ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 6857d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 6864a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 6875e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 6885e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6891da177e4SLinus Torvalds help 69014b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 69114b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 6925e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 6935e83d430SRalf Baechle support this machine type. 6941da177e4SLinus Torvalds 695edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 696edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 6975e83d430SRalf Baechle 698edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 699edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 70023fbee9dSRalf Baechle 70173b4390fSRalf Baechleconfig MIKROTIK_RB532 70273b4390fSRalf Baechle bool "Mikrotik RB532 boards" 70373b4390fSRalf Baechle select CEVT_R4K 70473b4390fSRalf Baechle select CSRC_R4K 70573b4390fSRalf Baechle select DMA_NONCOHERENT 70673b4390fSRalf Baechle select HW_HAS_PCI 70773b4390fSRalf Baechle select IRQ_CPU 70873b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 70973b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 71073b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 71173b4390fSRalf Baechle select SWAP_IO_SPACE 71273b4390fSRalf Baechle select BOOT_RAW 713d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 714930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 71573b4390fSRalf Baechle help 71673b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 71773b4390fSRalf Baechle based on the IDT RC32434 SoC. 71873b4390fSRalf Baechle 7199ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 7209ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 721a86c7f72SDavid Daney select CEVT_R4K 722a86c7f72SDavid Daney select 64BIT_PHYS_ADDR 723a86c7f72SDavid Daney select DMA_COHERENT 724a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 725a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 726f65aad41SRalf Baechle select EDAC_SUPPORT 727773cb77dSRalf Baechle select SYS_SUPPORTS_HOTPLUG_CPU 728a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 7295e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 730a86c7f72SDavid Daney select SWAP_IO_SPACE 731e8635b48SDavid Daney select HW_HAS_PCI 732f00e001eSDavid Daney select ZONE_DMA32 733465aaed0SDavid Daney select HOLES_IN_ZONE 73499cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 7356e511163SDavid Daney select LIBFDT 7366e511163SDavid Daney select USE_OF 7376e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 7386e511163SDavid Daney select SYS_SUPPORTS_SMP 7396e511163SDavid Daney select NR_CPUS_DEFAULT_16 740a86c7f72SDavid Daney help 741a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 742a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 743a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 744a86c7f72SDavid Daney Some of the supported boards are: 745a86c7f72SDavid Daney EBT3000 746a86c7f72SDavid Daney EBH3000 747a86c7f72SDavid Daney EBH3100 748a86c7f72SDavid Daney Thunder 749a86c7f72SDavid Daney Kodama 750a86c7f72SDavid Daney Hikari 751a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 752a86c7f72SDavid Daney 7537f058e85SJayachandran Cconfig NLM_XLR_BOARD 7547f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 7557f058e85SJayachandran C select BOOT_ELF32 7567f058e85SJayachandran C select NLM_COMMON 7577f058e85SJayachandran C select SYS_HAS_CPU_XLR 7587f058e85SJayachandran C select SYS_SUPPORTS_SMP 7597f058e85SJayachandran C select HW_HAS_PCI 7607f058e85SJayachandran C select SWAP_IO_SPACE 7617f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7627f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7637f058e85SJayachandran C select 64BIT_PHYS_ADDR 7647f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7657f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 7667f058e85SJayachandran C select DMA_COHERENT 7677f058e85SJayachandran C select NR_CPUS_DEFAULT_32 7687f058e85SJayachandran C select CEVT_R4K 7697f058e85SJayachandran C select CSRC_R4K 7707f058e85SJayachandran C select IRQ_CPU 771b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7727f058e85SJayachandran C select SYNC_R4K 7737f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 7748f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7758f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7767f058e85SJayachandran C help 7777f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 7787f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 7797f058e85SJayachandran C 7801c773ea4SJayachandran Cconfig NLM_XLP_BOARD 7811c773ea4SJayachandran C bool "Netlogic XLP based systems" 7821c773ea4SJayachandran C select BOOT_ELF32 7831c773ea4SJayachandran C select NLM_COMMON 7841c773ea4SJayachandran C select SYS_HAS_CPU_XLP 7851c773ea4SJayachandran C select SYS_SUPPORTS_SMP 7861c773ea4SJayachandran C select HW_HAS_PCI 7871c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7881c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7891c773ea4SJayachandran C select 64BIT_PHYS_ADDR 7901c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7911c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 7921c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 7931c773ea4SJayachandran C select DMA_COHERENT 7941c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 7951c773ea4SJayachandran C select CEVT_R4K 7961c773ea4SJayachandran C select CSRC_R4K 7971c773ea4SJayachandran C select IRQ_CPU 798b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7991c773ea4SJayachandran C select SYNC_R4K 8001c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 8012f6528e1SJayachandran C select USE_OF 8028f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 8038f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 8041c773ea4SJayachandran C help 8051c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 8061c773ea4SJayachandran C Say Y here if you have a XLP based board. 8071c773ea4SJayachandran C 8081da177e4SLinus Torvaldsendchoice 8091da177e4SLinus Torvalds 810e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 811d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 812a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 813e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 8145e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 8155ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 8168ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 8171f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 8180f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 819ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 82029c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 82138b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 82222b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 8235e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 824a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 82585749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig" 826ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig" 8277f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 828*ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 82938b18f72SRalf Baechle 8305e83d430SRalf Baechleendmenu 8315e83d430SRalf Baechle 8321da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 8331da177e4SLinus Torvalds bool 8341da177e4SLinus Torvalds default y 8351da177e4SLinus Torvalds 8361da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 8371da177e4SLinus Torvalds bool 8381da177e4SLinus Torvalds 839f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 840f0d1b0b3SDavid Howells bool 841f0d1b0b3SDavid Howells default n 842f0d1b0b3SDavid Howells 843f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 844f0d1b0b3SDavid Howells bool 845f0d1b0b3SDavid Howells default n 846f0d1b0b3SDavid Howells 8473c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 8483c9ee7efSAkinobu Mita bool 8493c9ee7efSAkinobu Mita default y 8503c9ee7efSAkinobu Mita 8511da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 8521da177e4SLinus Torvalds bool 8531da177e4SLinus Torvalds default y 8541da177e4SLinus Torvalds 855ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 8561cc89038SAtsushi Nemoto bool 8571cc89038SAtsushi Nemoto default y 8581cc89038SAtsushi Nemoto 8591da177e4SLinus Torvalds# 8601da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 8611da177e4SLinus Torvalds# 8620e2794b0SRalf Baechleconfig FW_ARC 8631da177e4SLinus Torvalds bool 8641da177e4SLinus Torvalds 86561ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 86661ed242dSRalf Baechle bool 86761ed242dSRalf Baechle 8689267a30dSMarc St-Jeanconfig BOOT_RAW 8699267a30dSMarc St-Jean bool 8709267a30dSMarc St-Jean 871217dd11eSRalf Baechleconfig CEVT_BCM1480 872217dd11eSRalf Baechle bool 873217dd11eSRalf Baechle 8746457d9fcSYoichi Yuasaconfig CEVT_DS1287 8756457d9fcSYoichi Yuasa bool 8766457d9fcSYoichi Yuasa 8771097c6acSYoichi Yuasaconfig CEVT_GT641XX 8781097c6acSYoichi Yuasa bool 8791097c6acSYoichi Yuasa 88042f77542SRalf Baechleconfig CEVT_R4K 88142f77542SRalf Baechle bool 88242f77542SRalf Baechle 8830ab2b7d0SRaghu Gandhamconfig CEVT_GIC 884237036deSPaul Burton select MIPS_CM 8850ab2b7d0SRaghu Gandham bool 8860ab2b7d0SRaghu Gandham 887217dd11eSRalf Baechleconfig CEVT_SB1250 888217dd11eSRalf Baechle bool 889217dd11eSRalf Baechle 890229f773eSAtsushi Nemotoconfig CEVT_TXX9 891229f773eSAtsushi Nemoto bool 892229f773eSAtsushi Nemoto 893217dd11eSRalf Baechleconfig CSRC_BCM1480 894217dd11eSRalf Baechle bool 895217dd11eSRalf Baechle 8964247417dSYoichi Yuasaconfig CSRC_IOASIC 8974247417dSYoichi Yuasa bool 8984247417dSYoichi Yuasa 899940f6b48SRalf Baechleconfig CSRC_R4K 900940f6b48SRalf Baechle bool 901940f6b48SRalf Baechle 902778eeb1bSSteven J. Hillconfig CSRC_GIC 903237036deSPaul Burton select MIPS_CM 904778eeb1bSSteven J. Hill bool 905778eeb1bSSteven J. Hill 906217dd11eSRalf Baechleconfig CSRC_SB1250 907217dd11eSRalf Baechle bool 908217dd11eSRalf Baechle 909a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 9107444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 911a9aec7feSAtsushi Nemoto bool 912a9aec7feSAtsushi Nemoto 9130e2794b0SRalf Baechleconfig FW_CFE 914df78b5c8SAurelien Jarno bool 915df78b5c8SAurelien Jarno 9164bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 9174bafad92SFUJITA Tomonori def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT 9184bafad92SFUJITA Tomonori 919885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 920885014bcSFelix Fietkau select DMA_NONCOHERENT 921885014bcSFelix Fietkau bool 922885014bcSFelix Fietkau 9231da177e4SLinus Torvaldsconfig DMA_COHERENT 9241da177e4SLinus Torvalds bool 9251da177e4SLinus Torvalds 9261da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 9271da177e4SLinus Torvalds bool 928e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 9294ce588cdSRalf Baechle 930e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 9314ce588cdSRalf Baechle bool 9321da177e4SLinus Torvalds 93336a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 9341da177e4SLinus Torvalds bool 9351da177e4SLinus Torvalds 936dbb74540SRalf Baechleconfig HOTPLUG_CPU 9371b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 93840b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 9391b2bc75cSRalf Baechle help 9401b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 9411b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 9421b2bc75cSRalf Baechle (Note: power management support will enable this option 9431b2bc75cSRalf Baechle automatically on SMP systems. ) 9441b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 9451b2bc75cSRalf Baechle 9461b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 947dbb74540SRalf Baechle bool 948dbb74540SRalf Baechle 9491da177e4SLinus Torvaldsconfig I8259 9501da177e4SLinus Torvalds bool 9511da177e4SLinus Torvalds 9521da177e4SLinus Torvaldsconfig MIPS_BONITO64 9531da177e4SLinus Torvalds bool 9541da177e4SLinus Torvalds 9551da177e4SLinus Torvaldsconfig MIPS_MSC 9561da177e4SLinus Torvalds bool 9571da177e4SLinus Torvalds 9581f21d2bdSBrian Murphyconfig MIPS_NILE4 9591f21d2bdSBrian Murphy bool 9601f21d2bdSBrian Murphy 96139b8d525SRalf Baechleconfig SYNC_R4K 96239b8d525SRalf Baechle bool 96339b8d525SRalf Baechle 964487d70d0SGabor Juhosconfig MIPS_MACHINE 965487d70d0SGabor Juhos def_bool n 966487d70d0SGabor Juhos 967ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 968d388d685SMaciej W. Rozycki def_bool n 969d388d685SMaciej W. Rozycki 9708313da30SRalf Baechleconfig GENERIC_ISA_DMA 9718313da30SRalf Baechle bool 9728313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 973a35bee8aSNamhyung Kim select ISA_DMA_API 9748313da30SRalf Baechle 975aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 976aa414dffSRalf Baechle bool 9778313da30SRalf Baechle select GENERIC_ISA_DMA 978aa414dffSRalf Baechle 979a35bee8aSNamhyung Kimconfig ISA_DMA_API 980a35bee8aSNamhyung Kim bool 981a35bee8aSNamhyung Kim 982465aaed0SDavid Daneyconfig HOLES_IN_ZONE 983465aaed0SDavid Daney bool 984465aaed0SDavid Daney 9855e83d430SRalf Baechle# 9866b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 9875e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 9885e83d430SRalf Baechle# choice statement should be more obvious to the user. 9895e83d430SRalf Baechle# 9905e83d430SRalf Baechlechoice 9916b2aac42SMasanari Iida prompt "Endianness selection" 9921da177e4SLinus Torvalds help 9931da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 9945e83d430SRalf Baechle byte order. These modes require different kernels and a different 9953cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 9965e83d430SRalf Baechle particular system but some systems are just as commonly used in the 9973dde6ad8SDavid Sterba one or the other endianness. 9985e83d430SRalf Baechle 9995e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 10005e83d430SRalf Baechle bool "Big endian" 10015e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 10025e83d430SRalf Baechle 10035e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 10045e83d430SRalf Baechle bool "Little endian" 10055e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 10065e83d430SRalf Baechle 10075e83d430SRalf Baechleendchoice 10085e83d430SRalf Baechle 100922b0763aSDavid Daneyconfig EXPORT_UASM 101022b0763aSDavid Daney bool 101122b0763aSDavid Daney 10122116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 10132116245eSRalf Baechle bool 10142116245eSRalf Baechle 10155e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 10165e83d430SRalf Baechle bool 10175e83d430SRalf Baechle 10185e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 10195e83d430SRalf Baechle bool 10201da177e4SLinus Torvalds 10219cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 10229cffd154SDavid Daney bool 10239cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 10249cffd154SDavid Daney default y 10259cffd154SDavid Daney 1026aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1027aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1028aa1762f4SDavid Daney 10291da177e4SLinus Torvaldsconfig IRQ_CPU 10301da177e4SLinus Torvalds bool 10311da177e4SLinus Torvalds 10321da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 10331da177e4SLinus Torvalds bool 10341da177e4SLinus Torvalds 10359267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 10369267a30dSMarc St-Jean bool 10379267a30dSMarc St-Jean 10389267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 10399267a30dSMarc St-Jean bool 10409267a30dSMarc St-Jean 10418420fd00SAtsushi Nemotoconfig IRQ_TXX9 10428420fd00SAtsushi Nemoto bool 10438420fd00SAtsushi Nemoto 1044d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1045d5ab1a69SYoichi Yuasa bool 1046d5ab1a69SYoichi Yuasa 104739b8d525SRalf Baechleconfig IRQ_GIC 1048237036deSPaul Burton select MIPS_CM 104939b8d525SRalf Baechle bool 105039b8d525SRalf Baechle 1051252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 10521da177e4SLinus Torvalds bool 10531da177e4SLinus Torvalds 10549267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 10559267a30dSMarc St-Jean bool 10569267a30dSMarc St-Jean 1057a83860c2SRalf Baechleconfig SOC_EMMA2RH 1058a83860c2SRalf Baechle bool 1059a83860c2SRalf Baechle select CEVT_R4K 1060a83860c2SRalf Baechle select CSRC_R4K 1061a83860c2SRalf Baechle select DMA_NONCOHERENT 1062a83860c2SRalf Baechle select IRQ_CPU 1063a83860c2SRalf Baechle select SWAP_IO_SPACE 1064a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1065a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1066a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1067a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1068a83860c2SRalf Baechle 1069edb6310aSDaniel Lairdconfig SOC_PNX833X 1070edb6310aSDaniel Laird bool 1071edb6310aSDaniel Laird select CEVT_R4K 1072edb6310aSDaniel Laird select CSRC_R4K 1073edb6310aSDaniel Laird select IRQ_CPU 1074edb6310aSDaniel Laird select DMA_NONCOHERENT 1075edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1076edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1077edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1078edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1079377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1080edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1081edb6310aSDaniel Laird 1082edb6310aSDaniel Lairdconfig SOC_PNX8335 1083edb6310aSDaniel Laird bool 1084edb6310aSDaniel Laird select SOC_PNX833X 1085edb6310aSDaniel Laird 10861da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 10871da177e4SLinus Torvalds bool 10881da177e4SLinus Torvalds 1089e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1090e2defae5SThomas Bogendoerfer bool 1091e2defae5SThomas Bogendoerfer 10925b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 10935b438c44SThomas Bogendoerfer bool 10945b438c44SThomas Bogendoerfer 1095e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1096e2defae5SThomas Bogendoerfer bool 1097e2defae5SThomas Bogendoerfer 1098e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1099e2defae5SThomas Bogendoerfer bool 1100e2defae5SThomas Bogendoerfer 1101e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1102e2defae5SThomas Bogendoerfer bool 1103e2defae5SThomas Bogendoerfer 1104e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1105e2defae5SThomas Bogendoerfer bool 1106e2defae5SThomas Bogendoerfer 1107e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1108e2defae5SThomas Bogendoerfer bool 1109e2defae5SThomas Bogendoerfer 11100e2794b0SRalf Baechleconfig FW_ARC32 11115e83d430SRalf Baechle bool 11125e83d430SRalf Baechle 1113aaa9fad3SPaul Bolleconfig FW_SNIPROM 1114231a35d3SThomas Bogendoerfer bool 1115231a35d3SThomas Bogendoerfer 11161da177e4SLinus Torvaldsconfig BOOT_ELF32 11171da177e4SLinus Torvalds bool 11181da177e4SLinus Torvalds 1119930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1120930beb5aSFlorian Fainelli bool 1121930beb5aSFlorian Fainelli 1122930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1123930beb5aSFlorian Fainelli bool 1124930beb5aSFlorian Fainelli 1125930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1126930beb5aSFlorian Fainelli bool 1127930beb5aSFlorian Fainelli 1128930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1129930beb5aSFlorian Fainelli bool 1130930beb5aSFlorian Fainelli 11311da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 11321da177e4SLinus Torvalds int 1133a4c0201eSFlorian Fainelli default "4" if MIPS_L1_CACHE_SHIFT_4 1134a4c0201eSFlorian Fainelli default "5" if MIPS_L1_CACHE_SHIFT_5 1135a4c0201eSFlorian Fainelli default "6" if MIPS_L1_CACHE_SHIFT_6 1136a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 11371da177e4SLinus Torvalds default "5" 11381da177e4SLinus Torvalds 11391da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 11401da177e4SLinus Torvalds bool 11411da177e4SLinus Torvalds 11421da177e4SLinus Torvaldsconfig ARC_CONSOLE 11431da177e4SLinus Torvalds bool "ARC console support" 1144e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 11451da177e4SLinus Torvalds 11461da177e4SLinus Torvaldsconfig ARC_MEMORY 11471da177e4SLinus Torvalds bool 114814b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 11491da177e4SLinus Torvalds default y 11501da177e4SLinus Torvalds 11511da177e4SLinus Torvaldsconfig ARC_PROMLIB 11521da177e4SLinus Torvalds bool 1153e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 11541da177e4SLinus Torvalds default y 11551da177e4SLinus Torvalds 11560e2794b0SRalf Baechleconfig FW_ARC64 11571da177e4SLinus Torvalds bool 11581da177e4SLinus Torvalds 11591da177e4SLinus Torvaldsconfig BOOT_ELF64 11601da177e4SLinus Torvalds bool 11611da177e4SLinus Torvalds 11621da177e4SLinus Torvaldsmenu "CPU selection" 11631da177e4SLinus Torvalds 11641da177e4SLinus Torvaldschoice 11651da177e4SLinus Torvalds prompt "CPU type" 11661da177e4SLinus Torvalds default CPU_R4X00 11671da177e4SLinus Torvalds 11680e476d91SHuacai Chenconfig CPU_LOONGSON3 11690e476d91SHuacai Chen bool "Loongson 3 CPU" 11700e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 11710e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 11720e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 11730e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 11740e476d91SHuacai Chen select WEAK_ORDERING 11750e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 11760e476d91SHuacai Chen help 11770e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 11780e476d91SHuacai Chen set with many extensions. 11790e476d91SHuacai Chen 11803702bba5SWu Zhangjinconfig CPU_LOONGSON2E 11813702bba5SWu Zhangjin bool "Loongson 2E" 11823702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 11833702bba5SWu Zhangjin select CPU_LOONGSON2 11842a21c730SFuxin Zhang help 11852a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 11862a21c730SFuxin Zhang with many extensions. 11872a21c730SFuxin Zhang 118825985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 11896f7a251aSWu Zhangjin bonito64. 11906f7a251aSWu Zhangjin 11916f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 11926f7a251aSWu Zhangjin bool "Loongson 2F" 11936f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 11946f7a251aSWu Zhangjin select CPU_LOONGSON2 1195c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 11966f7a251aSWu Zhangjin help 11976f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 11986f7a251aSWu Zhangjin with many extensions. 11996f7a251aSWu Zhangjin 12006f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 12016f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 12026f7a251aSWu Zhangjin Loongson2E. 12036f7a251aSWu Zhangjin 1204ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1205ca585cf9SKelvin Cheung bool "Loongson 1B" 1206ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1207ca585cf9SKelvin Cheung select CPU_LOONGSON1 1208ca585cf9SKelvin Cheung help 1209ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1210ca585cf9SKelvin Cheung release 2 instruction set. 1211ca585cf9SKelvin Cheung 12126e760c8dSRalf Baechleconfig CPU_MIPS32_R1 12136e760c8dSRalf Baechle bool "MIPS32 Release 1" 12147cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 12156e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1216797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1217ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12186e760c8dSRalf Baechle help 12195e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 12201e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12211e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12221e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12231e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12241e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 12251e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 12261e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 12271e5f1caaSRalf Baechle performance. 12281e5f1caaSRalf Baechle 12291e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 12301e5f1caaSRalf Baechle bool "MIPS32 Release 2" 12317cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 12321e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1233797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1234ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1235a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 12362235a54dSSanjay Lal select HAVE_KVM 12371e5f1caaSRalf Baechle help 12385e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 12396e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12406e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12416e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12426e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12431da177e4SLinus Torvalds 12446e760c8dSRalf Baechleconfig CPU_MIPS64_R1 12456e760c8dSRalf Baechle bool "MIPS64 Release 1" 12467cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1247797798c1SRalf Baechle select CPU_HAS_PREFETCH 1248ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1249ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1250ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12519cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 12526e760c8dSRalf Baechle help 12536e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 12546e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12556e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12566e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12576e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12581e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 12591e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 12601e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 12611e5f1caaSRalf Baechle performance. 12621e5f1caaSRalf Baechle 12631e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 12641e5f1caaSRalf Baechle bool "MIPS64 Release 2" 12657cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1266797798c1SRalf Baechle select CPU_HAS_PREFETCH 12671e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 12681e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1269ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12709cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1271a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 12721e5f1caaSRalf Baechle help 12731e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 12741e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12751e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12761e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12771e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12781da177e4SLinus Torvalds 12791da177e4SLinus Torvaldsconfig CPU_R3000 12801da177e4SLinus Torvalds bool "R3000" 12817cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1282f7062ddbSRalf Baechle select CPU_HAS_WB 1283ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1284797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12851da177e4SLinus Torvalds help 12861da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 12871da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 12881da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 12891da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 12901da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 12911da177e4SLinus Torvalds try to recompile with R3000. 12921da177e4SLinus Torvalds 12931da177e4SLinus Torvaldsconfig CPU_TX39XX 12941da177e4SLinus Torvalds bool "R39XX" 12957cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1296ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 12971da177e4SLinus Torvalds 12981da177e4SLinus Torvaldsconfig CPU_VR41XX 12991da177e4SLinus Torvalds bool "R41xx" 13007cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1301ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1302ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 13031da177e4SLinus Torvalds help 13045e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 13051da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 13061da177e4SLinus Torvalds kernel built with this option will not run on any other type of 13071da177e4SLinus Torvalds processor or vice versa. 13081da177e4SLinus Torvalds 13091da177e4SLinus Torvaldsconfig CPU_R4300 13101da177e4SLinus Torvalds bool "R4300" 13117cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1312ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1313ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 13141da177e4SLinus Torvalds help 13151da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 13161da177e4SLinus Torvalds 13171da177e4SLinus Torvaldsconfig CPU_R4X00 13181da177e4SLinus Torvalds bool "R4x00" 13197cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1320ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1321ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1322970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13231da177e4SLinus Torvalds help 13241da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 13251da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 13261da177e4SLinus Torvalds 13271da177e4SLinus Torvaldsconfig CPU_TX49XX 13281da177e4SLinus Torvalds bool "R49XX" 13297cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1330de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1331ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1332ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1333970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13341da177e4SLinus Torvalds 13351da177e4SLinus Torvaldsconfig CPU_R5000 13361da177e4SLinus Torvalds bool "R5000" 13377cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1338ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1339ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1340970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13411da177e4SLinus Torvalds help 13421da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 13431da177e4SLinus Torvalds 13441da177e4SLinus Torvaldsconfig CPU_R5432 13451da177e4SLinus Torvalds bool "R5432" 13467cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 13475e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 13485e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1349970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13501da177e4SLinus Torvalds 1351542c1020SShinya Kuribayashiconfig CPU_R5500 1352542c1020SShinya Kuribayashi bool "R5500" 1353542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1354542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1355542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 13569cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1357542c1020SShinya Kuribayashi help 1358542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1359542c1020SShinya Kuribayashi instruction set. 1360542c1020SShinya Kuribayashi 13611da177e4SLinus Torvaldsconfig CPU_R6000 13621da177e4SLinus Torvalds bool "R6000" 13637cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1364ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 13651da177e4SLinus Torvalds help 13661da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1367c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 13681da177e4SLinus Torvalds 13691da177e4SLinus Torvaldsconfig CPU_NEVADA 13701da177e4SLinus Torvalds bool "RM52xx" 13717cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1372ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1373ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1374970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13751da177e4SLinus Torvalds help 13761da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 13771da177e4SLinus Torvalds 13781da177e4SLinus Torvaldsconfig CPU_R8000 13791da177e4SLinus Torvalds bool "R8000" 13807cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 13815e83d430SRalf Baechle select CPU_HAS_PREFETCH 1382ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 13831da177e4SLinus Torvalds help 13841da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 13851da177e4SLinus Torvalds uncommon and the support for them is incomplete. 13861da177e4SLinus Torvalds 13871da177e4SLinus Torvaldsconfig CPU_R10000 13881da177e4SLinus Torvalds bool "R10000" 13897cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 13905e83d430SRalf Baechle select CPU_HAS_PREFETCH 1391ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1392ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1393797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1394970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13951da177e4SLinus Torvalds help 13961da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 13971da177e4SLinus Torvalds 13981da177e4SLinus Torvaldsconfig CPU_RM7000 13991da177e4SLinus Torvalds bool "RM7000" 14007cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 14015e83d430SRalf Baechle select CPU_HAS_PREFETCH 1402ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1403ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1404797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1405970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14061da177e4SLinus Torvalds 14071da177e4SLinus Torvaldsconfig CPU_SB1 14081da177e4SLinus Torvalds bool "SB1" 14097cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1410ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1411ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1412797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1413970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14140004a9dfSRalf Baechle select WEAK_ORDERING 14151da177e4SLinus Torvalds 1416a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1417a86c7f72SDavid Daney bool "Cavium Octeon processor" 14185e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1419a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1420a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1421a86c7f72SDavid Daney select WEAK_ORDERING 1422a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 14239cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14249296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 1425930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1426a86c7f72SDavid Daney help 1427a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1428a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1429a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1430a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1431a86c7f72SDavid Daney 1432cd746249SJonas Gorskiconfig CPU_BMIPS 1433cd746249SJonas Gorski bool "Broadcom BMIPS" 1434cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1435cd746249SJonas Gorski select CPU_MIPS32 1436fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1437cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1438cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1439cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1440cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1441cd746249SJonas Gorski select DMA_NONCOHERENT 1442cd746249SJonas Gorski select IRQ_CPU 1443cd746249SJonas Gorski select SWAP_IO_SPACE 1444cd746249SJonas Gorski select WEAK_ORDERING 1445c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 144669aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1447c1c0c461SKevin Cernekee help 1448fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1449c1c0c461SKevin Cernekee 14507f058e85SJayachandran Cconfig CPU_XLR 14517f058e85SJayachandran C bool "Netlogic XLR SoC" 14527f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 14537f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14547f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14557f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1456970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14577f058e85SJayachandran C select WEAK_ORDERING 14587f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14597f058e85SJayachandran C help 14607f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 14611c773ea4SJayachandran C 14621c773ea4SJayachandran Cconfig CPU_XLP 14631c773ea4SJayachandran C bool "Netlogic XLP SoC" 14641c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 14651c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14661c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14671c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 14681c773ea4SJayachandran C select WEAK_ORDERING 14691c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14701c773ea4SJayachandran C select CPU_HAS_PREFETCH 1471d6504846SJayachandran C select CPU_MIPSR2 14721c773ea4SJayachandran C help 14731c773ea4SJayachandran C Netlogic Microsystems XLP processors. 14741da177e4SLinus Torvaldsendchoice 14751da177e4SLinus Torvalds 1476a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1477a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1478a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 1479a6e18781SLeonid Yegoshin depends on CPU_MIPS32_R2 1480a6e18781SLeonid Yegoshin help 1481a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1482a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1483a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1484a6e18781SLeonid Yegoshin 1485a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1486a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1487a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1488a6e18781SLeonid Yegoshin select EVA 1489a6e18781SLeonid Yegoshin default y 1490a6e18781SLeonid Yegoshin help 1491a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1492a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1493a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1494a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1495a6e18781SLeonid Yegoshin 1496622844bfSWu Zhangjinif CPU_LOONGSON2F 1497622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1498622844bfSWu Zhangjin bool 1499622844bfSWu Zhangjin 1500622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1501622844bfSWu Zhangjin bool 1502622844bfSWu Zhangjin 1503622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1504622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1505622844bfSWu Zhangjin default y 1506622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1507622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1508622844bfSWu Zhangjin help 1509622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1510622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1511622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1512622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1513622844bfSWu Zhangjin 1514622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1515622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1516622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1517622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1518622844bfSWu Zhangjin systems. 1519622844bfSWu Zhangjin 1520622844bfSWu Zhangjin If unsure, please say Y. 1521622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1522622844bfSWu Zhangjin 15231b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 15241b93b3c3SWu Zhangjin bool 15251b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 15261b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 152731c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 15281b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1529fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 15304e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 15311b93b3c3SWu Zhangjin 15321b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 15331b93b3c3SWu Zhangjin bool 15341b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 15351b93b3c3SWu Zhangjin 15363702bba5SWu Zhangjinconfig CPU_LOONGSON2 15373702bba5SWu Zhangjin bool 15383702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 15393702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 15403702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1541970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15423702bba5SWu Zhangjin 1543ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1544ca585cf9SKelvin Cheung bool 1545ca585cf9SKelvin Cheung select CPU_MIPS32 1546ca585cf9SKelvin Cheung select CPU_MIPSR2 1547ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1548ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1549ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1550ca585cf9SKelvin Cheung 1551fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 155204fa8bf7SJonas Gorski select SMP_UP if SMP 15531bbb6c1bSKevin Cernekee bool 1554cd746249SJonas Gorski 1555cd746249SJonas Gorskiconfig CPU_BMIPS4350 1556cd746249SJonas Gorski bool 1557cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1558cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1559cd746249SJonas Gorski 1560cd746249SJonas Gorskiconfig CPU_BMIPS4380 1561cd746249SJonas Gorski bool 1562cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1563cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1564cd746249SJonas Gorski 1565cd746249SJonas Gorskiconfig CPU_BMIPS5000 1566cd746249SJonas Gorski bool 1567cd746249SJonas Gorski select MIPS_CPU_SCACHE 1568cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1569cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 15701bbb6c1bSKevin Cernekee 15710e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 15720e476d91SHuacai Chen bool 15730e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 15740e476d91SHuacai Chen 15753702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 15762a21c730SFuxin Zhang bool 15772a21c730SFuxin Zhang 15786f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 15796f7a251aSWu Zhangjin bool 158055045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 158155045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 158222f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 15836f7a251aSWu Zhangjin 1584ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1585ca585cf9SKelvin Cheung bool 1586ca585cf9SKelvin Cheung 15877cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 15887cf8053bSRalf Baechle bool 15897cf8053bSRalf Baechle 15907cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 15917cf8053bSRalf Baechle bool 15927cf8053bSRalf Baechle 1593a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1594a6e18781SLeonid Yegoshin bool 1595a6e18781SLeonid Yegoshin 15967cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 15977cf8053bSRalf Baechle bool 15987cf8053bSRalf Baechle 15997cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 16007cf8053bSRalf Baechle bool 16017cf8053bSRalf Baechle 16027cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 16037cf8053bSRalf Baechle bool 16047cf8053bSRalf Baechle 16057cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 16067cf8053bSRalf Baechle bool 16077cf8053bSRalf Baechle 16087cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 16097cf8053bSRalf Baechle bool 16107cf8053bSRalf Baechle 16117cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 16127cf8053bSRalf Baechle bool 16137cf8053bSRalf Baechle 16147cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 16157cf8053bSRalf Baechle bool 16167cf8053bSRalf Baechle 16177cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 16187cf8053bSRalf Baechle bool 16197cf8053bSRalf Baechle 16207cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 16217cf8053bSRalf Baechle bool 16227cf8053bSRalf Baechle 16237cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 16247cf8053bSRalf Baechle bool 16257cf8053bSRalf Baechle 1626542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1627542c1020SShinya Kuribayashi bool 1628542c1020SShinya Kuribayashi 16297cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 16307cf8053bSRalf Baechle bool 16317cf8053bSRalf Baechle 16327cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 16337cf8053bSRalf Baechle bool 16347cf8053bSRalf Baechle 16357cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 16367cf8053bSRalf Baechle bool 16377cf8053bSRalf Baechle 16387cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 16397cf8053bSRalf Baechle bool 16407cf8053bSRalf Baechle 16417cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 16427cf8053bSRalf Baechle bool 16437cf8053bSRalf Baechle 16447cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 16457cf8053bSRalf Baechle bool 16467cf8053bSRalf Baechle 16475e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 16485e683389SDavid Daney bool 16495e683389SDavid Daney 1650cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1651c1c0c461SKevin Cernekee bool 1652c1c0c461SKevin Cernekee 1653fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1654c1c0c461SKevin Cernekee bool 1655cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1656c1c0c461SKevin Cernekee 1657c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1658c1c0c461SKevin Cernekee bool 1659cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1660c1c0c461SKevin Cernekee 1661c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1662c1c0c461SKevin Cernekee bool 1663cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1664c1c0c461SKevin Cernekee 1665c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1666c1c0c461SKevin Cernekee bool 1667cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1668c1c0c461SKevin Cernekee 16697f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 16707f058e85SJayachandran C bool 16717f058e85SJayachandran C 16721c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 16731c773ea4SJayachandran C bool 16741c773ea4SJayachandran C 1675b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 1676b6911bbaSPaul Burton depends on MIPS_MALTA 1677b6911bbaSPaul Burton depends on PCI 1678b6911bbaSPaul Burton bool 1679b6911bbaSPaul Burton default y 1680b6911bbaSPaul Burton 168117099b11SRalf Baechle# 168217099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 168317099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 168417099b11SRalf Baechle# 16850004a9dfSRalf Baechleconfig WEAK_ORDERING 16860004a9dfSRalf Baechle bool 168717099b11SRalf Baechle 168817099b11SRalf Baechle# 168917099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 169017099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 169117099b11SRalf Baechle# 169217099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 169317099b11SRalf Baechle bool 16945e83d430SRalf Baechleendmenu 16955e83d430SRalf Baechle 16965e83d430SRalf Baechle# 16975e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 16985e83d430SRalf Baechle# 16995e83d430SRalf Baechleconfig CPU_MIPS32 17005e83d430SRalf Baechle bool 17015e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 17025e83d430SRalf Baechle 17035e83d430SRalf Baechleconfig CPU_MIPS64 17045e83d430SRalf Baechle bool 17055e83d430SRalf Baechle default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 17065e83d430SRalf Baechle 17075e83d430SRalf Baechle# 1708c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 17095e83d430SRalf Baechle# 17105e83d430SRalf Baechleconfig CPU_MIPSR1 17115e83d430SRalf Baechle bool 17125e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 17135e83d430SRalf Baechle 17145e83d430SRalf Baechleconfig CPU_MIPSR2 17155e83d430SRalf Baechle bool 1716a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 17175e83d430SRalf Baechle 1718a6e18781SLeonid Yegoshinconfig EVA 1719a6e18781SLeonid Yegoshin bool 1720a6e18781SLeonid Yegoshin 17215e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 17225e83d430SRalf Baechle bool 17235e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 17245e83d430SRalf Baechle bool 17255e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 17265e83d430SRalf Baechle bool 17275e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 17285e83d430SRalf Baechle bool 172955045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 173055045ff5SWu Zhangjin bool 173155045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 173255045ff5SWu Zhangjin bool 17339cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 17349cffd154SDavid Daney bool 173522f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 173622f1fdfdSWu Zhangjin bool 173782622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 173882622284SDavid Daney bool 1739d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 17405e83d430SRalf Baechle 17418192c9eaSDavid Daney# 17428192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 17438192c9eaSDavid Daney# 17448192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 17458192c9eaSDavid Daney bool 1746f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 17478192c9eaSDavid Daney 17485e83d430SRalf Baechlemenu "Kernel type" 17495e83d430SRalf Baechle 17505e83d430SRalf Baechlechoice 17515e83d430SRalf Baechle prompt "Kernel code model" 17525e83d430SRalf Baechle help 17535e83d430SRalf Baechle You should only select this option if you have a workload that 17545e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 17555e83d430SRalf Baechle large memory. You will only be presented a single option in this 17565e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 17575e83d430SRalf Baechle 17585e83d430SRalf Baechleconfig 32BIT 17595e83d430SRalf Baechle bool "32-bit kernel" 17605e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 17615e83d430SRalf Baechle select TRAD_SIGNALS 17625e83d430SRalf Baechle help 17635e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 17645e83d430SRalf Baechleconfig 64BIT 17655e83d430SRalf Baechle bool "64-bit kernel" 17665e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 17675e83d430SRalf Baechle help 17685e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 17695e83d430SRalf Baechle 17705e83d430SRalf Baechleendchoice 17715e83d430SRalf Baechle 17722235a54dSSanjay Lalconfig KVM_GUEST 17732235a54dSSanjay Lal bool "KVM Guest Kernel" 1774f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 17752235a54dSSanjay Lal help 17762235a54dSSanjay Lal Select this option if building a guest kernel for KVM (Trap & Emulate) mode 17772235a54dSSanjay Lal 17782235a54dSSanjay Lalconfig KVM_HOST_FREQ 17792235a54dSSanjay Lal int "KVM Host Processor Frequency (MHz)" 17802235a54dSSanjay Lal depends on KVM_GUEST 17812235a54dSSanjay Lal default 500 17822235a54dSSanjay Lal help 17832235a54dSSanjay Lal Select this option if building a guest kernel for KVM to skip 17842235a54dSSanjay Lal RTC emulation when determining guest CPU Frequency. Instead, the guest 17852235a54dSSanjay Lal processor frequency is automatically derived from the host frequency. 17862235a54dSSanjay Lal 17871da177e4SLinus Torvaldschoice 17881da177e4SLinus Torvalds prompt "Kernel page size" 17891da177e4SLinus Torvalds default PAGE_SIZE_4KB 17901da177e4SLinus Torvalds 17911da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 17921da177e4SLinus Torvalds bool "4kB" 17930e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 17941da177e4SLinus Torvalds help 17951da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 17961da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 17971da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 17981da177e4SLinus Torvalds recommended for low memory systems. 17991da177e4SLinus Torvalds 18001da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 18011da177e4SLinus Torvalds bool "8kB" 18027d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 18031da177e4SLinus Torvalds help 18041da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 18051da177e4SLinus Torvalds the price of higher memory consumption. This option is available 1806c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 1807c52399beSRalf Baechle suitable Linux distribution to support this. 18081da177e4SLinus Torvalds 18091da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 18101da177e4SLinus Torvalds bool "16kB" 1811714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 18121da177e4SLinus Torvalds help 18131da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 18141da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 1815714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 1816714bfad6SRalf Baechle Linux distribution to support this. 18171da177e4SLinus Torvalds 1818c52399beSRalf Baechleconfig PAGE_SIZE_32KB 1819c52399beSRalf Baechle bool "32kB" 1820c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 1821c52399beSRalf Baechle help 1822c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 1823c52399beSRalf Baechle the price of higher memory consumption. This option is available 1824c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 1825c52399beSRalf Baechle distribution to support this. 1826c52399beSRalf Baechle 18271da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 18281da177e4SLinus Torvalds bool "64kB" 18297d60717eSKees Cook depends on !CPU_R3000 && !CPU_TX39XX 18301da177e4SLinus Torvalds help 18311da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 18321da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 18331da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 1834714bfad6SRalf Baechle writing this option is still high experimental. 18351da177e4SLinus Torvalds 18361da177e4SLinus Torvaldsendchoice 18371da177e4SLinus Torvalds 1838c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 1839c9bace7cSDavid Daney int "Maximum zone order" 1840e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 1841e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 1842e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 1843e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 1844e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 1845e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 1846c9bace7cSDavid Daney range 11 64 1847c9bace7cSDavid Daney default "11" 1848c9bace7cSDavid Daney help 1849c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 1850c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 1851c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 1852c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 1853c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 1854c9bace7cSDavid Daney increase this value. 1855c9bace7cSDavid Daney 1856c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 1857c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 1858c9bace7cSDavid Daney 1859c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 1860c9bace7cSDavid Daney when choosing a value for this option. 1861c9bace7cSDavid Daney 18620ab2b7d0SRaghu Gandhamconfig CEVT_GIC 18630ab2b7d0SRaghu Gandham bool "Use GIC global counter for clock events" 1864b633648cSRalf Baechle depends on IRQ_GIC && !MIPS_SEAD3 18650ab2b7d0SRaghu Gandham help 18660ab2b7d0SRaghu Gandham Use the GIC global counter for the clock events. The R4K clock 18670ab2b7d0SRaghu Gandham event driver is always present, so if the platform ends up not 18680ab2b7d0SRaghu Gandham detecting a GIC, it will fall back to the R4K timer for the 18690ab2b7d0SRaghu Gandham generation of clock events. 18700ab2b7d0SRaghu Gandham 18711da177e4SLinus Torvaldsconfig BOARD_SCACHE 18721da177e4SLinus Torvalds bool 18731da177e4SLinus Torvalds 18741da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 18751da177e4SLinus Torvalds bool 18761da177e4SLinus Torvalds select BOARD_SCACHE 18771da177e4SLinus Torvalds 18789318c51aSChris Dearman# 18799318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 18809318c51aSChris Dearman# 18819318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 18829318c51aSChris Dearman bool 18839318c51aSChris Dearman select BOARD_SCACHE 1884930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_6 18859318c51aSChris Dearman 18861da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 18871da177e4SLinus Torvalds bool 18881da177e4SLinus Torvalds select BOARD_SCACHE 18891da177e4SLinus Torvalds 18901da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 18911da177e4SLinus Torvalds bool 18921da177e4SLinus Torvalds select BOARD_SCACHE 18931da177e4SLinus Torvalds 18941da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 18951da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 18961da177e4SLinus Torvalds depends on CPU_SB1 18971da177e4SLinus Torvalds help 18981da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 18991da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 19001da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 19011da177e4SLinus Torvalds 19021da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 1903c8094b53SRalf Baechle bool 19041da177e4SLinus Torvalds 19053165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 19063165c846SFlorian Fainelli bool 19073165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 19083165c846SFlorian Fainelli 190991405eb6SFlorian Fainelliconfig CPU_R4K_FPU 191091405eb6SFlorian Fainelli bool 191191405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 191291405eb6SFlorian Fainelli 191362cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 191462cedc4fSFlorian Fainelli bool 191562cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 191662cedc4fSFlorian Fainelli 191759d6ab86SRalf Baechleconfig MIPS_MT_SMP 1918a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 191959d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 192059d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 1921d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1922c080faa5SSteven J. Hill select SYNC_R4K 19230c2cb004SPaul Burton select MIPS_GIC_IPI 192459d6ab86SRalf Baechle select MIPS_MT 192559d6ab86SRalf Baechle select SMP 192687353d8aSRalf Baechle select SMP_UP 1927c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 1928c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 1929399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 193059d6ab86SRalf Baechle help 1931c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 1932c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 1933c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 1934c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 1935c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 193659d6ab86SRalf Baechle 1937f41ae0b2SRalf Baechleconfig MIPS_MT 1938f41ae0b2SRalf Baechle bool 1939f41ae0b2SRalf Baechle 19400ab7aefcSRalf Baechleconfig SCHED_SMT 19410ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 19420ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 19430ab7aefcSRalf Baechle default n 19440ab7aefcSRalf Baechle help 19450ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 19460ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 19470ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 19480ab7aefcSRalf Baechle 19490ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 19500ab7aefcSRalf Baechle bool 19510ab7aefcSRalf Baechle 1952f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 1953f41ae0b2SRalf Baechle bool 1954f41ae0b2SRalf Baechle 1955f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 1956f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 1957f088fc84SRalf Baechle default y 1958b633648cSRalf Baechle depends on MIPS_MT_SMP 195907cc0c9eSRalf Baechle 196007cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 196107cc0c9eSRalf Baechle bool "VPE loader support." 1962704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 196307cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 196407cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 196507cc0c9eSRalf Baechle select MIPS_MT 196607cc0c9eSRalf Baechle help 196707cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 196807cc0c9eSRalf Baechle onto another VPE and running it. 1969f088fc84SRalf Baechle 197017a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 197117a1d523SDeng-Cheng Zhu bool 197217a1d523SDeng-Cheng Zhu default "y" 197317a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 197417a1d523SDeng-Cheng Zhu 19751a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 19761a2a6d7eSDeng-Cheng Zhu bool 19771a2a6d7eSDeng-Cheng Zhu default "y" 19781a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 19791a2a6d7eSDeng-Cheng Zhu 1980e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 1981e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 1982e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 1983e01402b1SRalf Baechle default y 1984e01402b1SRalf Baechle help 1985e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 1986e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 1987e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 1988e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 1989e01402b1SRalf Baechle 1990e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 1991e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 1992e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 19935e83d430SRalf Baechle help 1994e01402b1SRalf Baechle 1995da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 1996da615cf6SDeng-Cheng Zhu bool 1997da615cf6SDeng-Cheng Zhu default "y" 1998da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 1999da615cf6SDeng-Cheng Zhu 20002c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 20012c973ef0SDeng-Cheng Zhu bool 20022c973ef0SDeng-Cheng Zhu default "y" 20032c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 20042c973ef0SDeng-Cheng Zhu 20054a16ff4cSRalf Baechleconfig MIPS_CMP 20065cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 2007b633648cSRalf Baechle depends on SYS_SUPPORTS_MIPS_CMP 200872e20142SPaul Burton select MIPS_GIC_IPI 2009eb9b5141STim Anderson select SYNC_R4K 20104a16ff4cSRalf Baechle select WEAK_ORDERING 20114a16ff4cSRalf Baechle default n 20124a16ff4cSRalf Baechle help 2013044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2014044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2015044505c7SPaul Burton its ability to start secondary CPUs. 20164a16ff4cSRalf Baechle 20175cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 20185cac93b3SPaul Burton instead of this. 20195cac93b3SPaul Burton 20200ee958e1SPaul Burtonconfig MIPS_CPS 20210ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 20220ee958e1SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 20230ee958e1SPaul Burton select MIPS_CM 20240ee958e1SPaul Burton select MIPS_CPC 20251d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 20260ee958e1SPaul Burton select MIPS_GIC_IPI 20270ee958e1SPaul Burton select SMP 20280ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 20291d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 20300ee958e1SPaul Burton select SYS_SUPPORTS_SMP 20310ee958e1SPaul Burton select WEAK_ORDERING 20320ee958e1SPaul Burton help 20330ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 20340ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 20350ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 20360ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 20370ee958e1SPaul Burton support is unavailable. 20380ee958e1SPaul Burton 20393179d37eSPaul Burtonconfig MIPS_CPS_PM 20403179d37eSPaul Burton bool 20413179d37eSPaul Burton 204272e20142SPaul Burtonconfig MIPS_GIC_IPI 204372e20142SPaul Burton bool 204472e20142SPaul Burton 20459f98f3ddSPaul Burtonconfig MIPS_CM 20469f98f3ddSPaul Burton bool 20479f98f3ddSPaul Burton 20489c38cf44SPaul Burtonconfig MIPS_CPC 20499c38cf44SPaul Burton bool 20502600990eSRalf Baechle 20511da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 20521da177e4SLinus Torvalds bool 20531da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 20541da177e4SLinus Torvalds default y 20551da177e4SLinus Torvalds 20561da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 20571da177e4SLinus Torvalds bool 20581da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 20591da177e4SLinus Torvalds default y 20601da177e4SLinus Torvalds 20611da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 20621da177e4SLinus Torvalds bool 20631da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 20641da177e4SLinus Torvalds default y 20651da177e4SLinus Torvalds 20662235a54dSSanjay Lal 20671da177e4SLinus Torvaldsconfig 64BIT_PHYS_ADDR 2068d806cb2bSRalf Baechle bool 20691da177e4SLinus Torvalds 207060ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 207160ec6571Spascal@pabr.org def_bool 64BIT_PHYS_ADDR 207260ec6571Spascal@pabr.org 20739693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 20749693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 20759693a853SFranck Bui-Huu bool "Support for the SmartMIPS ASE" 20769693a853SFranck Bui-Huu help 20779693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 20789693a853SFranck Bui-Huu increased security at both hardware and software level for 20799693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 20809693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 20819693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 20829693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 20839693a853SFranck Bui-Huu here. 20849693a853SFranck Bui-Huu 2085bce86083SSteven J. Hillconfig CPU_MICROMIPS 2086bce86083SSteven J. Hill depends on SYS_SUPPORTS_MICROMIPS 2087bce86083SSteven J. Hill bool "Build kernel using microMIPS ISA" 2088bce86083SSteven J. Hill help 2089bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2090bce86083SSteven J. Hill microMIPS ISA 2091bce86083SSteven J. Hill 2092a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 2093a5e9a69eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2094a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 2095a5e9a69eSPaul Burton default y 2096a5e9a69eSPaul Burton help 2097a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2098a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 20991db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 21001db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 21011db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 21021db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 21031db1af84SPaul Burton the size & complexity of your kernel. 2104a5e9a69eSPaul Burton 2105a5e9a69eSPaul Burton If unsure, say Y. 2106a5e9a69eSPaul Burton 21071da177e4SLinus Torvaldsconfig CPU_HAS_WB 2108f7062ddbSRalf Baechle bool 2109e01402b1SRalf Baechle 2110df0ac8a4SKevin Cernekeeconfig XKS01 2111df0ac8a4SKevin Cernekee bool 2112df0ac8a4SKevin Cernekee 2113f41ae0b2SRalf Baechle# 2114f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2115f41ae0b2SRalf Baechle# 2116e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2117f41ae0b2SRalf Baechle bool 2118e01402b1SRalf Baechle 2119f41ae0b2SRalf Baechle# 2120f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2121f41ae0b2SRalf Baechle# 2122e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2123f41ae0b2SRalf Baechle bool 2124e01402b1SRalf Baechle 21251da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 21261da177e4SLinus Torvalds bool 21271da177e4SLinus Torvalds depends on !CPU_R3000 21281da177e4SLinus Torvalds default y 21291da177e4SLinus Torvalds 21301da177e4SLinus Torvalds# 213120d60d99SMaciej W. Rozycki# CPU non-features 213220d60d99SMaciej W. Rozycki# 213320d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 213420d60d99SMaciej W. Rozycki bool 213520d60d99SMaciej W. Rozycki 213620d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 213720d60d99SMaciej W. Rozycki bool 213820d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 213920d60d99SMaciej W. Rozycki 214020d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 214120d60d99SMaciej W. Rozycki bool 214220d60d99SMaciej W. Rozycki 214320d60d99SMaciej W. Rozycki# 21441da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 21451da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 21461da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 21471da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 21481da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 21491da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 21501da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 21511da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2152797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2153797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2154797798c1SRalf Baechle# support. 21551da177e4SLinus Torvalds# 21561da177e4SLinus Torvaldsconfig HIGHMEM 21571da177e4SLinus Torvalds bool "High Memory Support" 2158a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2159797798c1SRalf Baechle 2160797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2161797798c1SRalf Baechle bool 2162797798c1SRalf Baechle 2163797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2164797798c1SRalf Baechle bool 21651da177e4SLinus Torvalds 21669693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 21679693a853SFranck Bui-Huu bool 21689693a853SFranck Bui-Huu 2169a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2170a6a4834cSSteven J. Hill bool 2171a6a4834cSSteven J. Hill 2172377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2173377cb1b6SRalf Baechle bool 2174377cb1b6SRalf Baechle help 2175377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2176377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2177377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2178377cb1b6SRalf Baechle 2179a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2180a5e9a69eSPaul Burton bool 2181a5e9a69eSPaul Burton 2182b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2183b4819b59SYoichi Yuasa def_bool y 2184f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2185b4819b59SYoichi Yuasa 2186d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2187d8cb4e11SRalf Baechle bool 2188d8cb4e11SRalf Baechle default y if SGI_IP27 2189d8cb4e11SRalf Baechle help 21903dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2191d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2192d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2193d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2194d8cb4e11SRalf Baechle 2195b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2196b1c6cd42SAtsushi Nemoto bool 21977de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 219831473747SAtsushi Nemoto 2199d8cb4e11SRalf Baechleconfig NUMA 2200d8cb4e11SRalf Baechle bool "NUMA Support" 2201d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2202d8cb4e11SRalf Baechle help 2203d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2204d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2205d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2206d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2207d8cb4e11SRalf Baechle disabled. 2208d8cb4e11SRalf Baechle 2209d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2210d8cb4e11SRalf Baechle bool 2211d8cb4e11SRalf Baechle 2212c80d79d7SYasunori Gotoconfig NODES_SHIFT 2213c80d79d7SYasunori Goto int 2214c80d79d7SYasunori Goto default "6" 2215c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2216c80d79d7SYasunori Goto 221714f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 221814f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 2219b633648cSRalf Baechle depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) 222014f70012SDeng-Cheng Zhu default y 222114f70012SDeng-Cheng Zhu help 222214f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 222314f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 222414f70012SDeng-Cheng Zhu 2225b4819b59SYoichi Yuasasource "mm/Kconfig" 2226b4819b59SYoichi Yuasa 22271da177e4SLinus Torvaldsconfig SMP 22281da177e4SLinus Torvalds bool "Multi-Processing support" 2229e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2230e73ea273SRalf Baechle help 22311da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 22324a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 22334a474157SRobert Graffham than one CPU, say Y. 22341da177e4SLinus Torvalds 22354a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 22361da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 22371da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 22384a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 22391da177e4SLinus Torvalds will run faster if you say N here. 22401da177e4SLinus Torvalds 22411da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 22421da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 22431da177e4SLinus Torvalds 224403502faaSAdrian Bunk See also the SMP-HOWTO available at 224503502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 22461da177e4SLinus Torvalds 22471da177e4SLinus Torvalds If you don't know what to do here, say N. 22481da177e4SLinus Torvalds 224987353d8aSRalf Baechleconfig SMP_UP 225087353d8aSRalf Baechle bool 225187353d8aSRalf Baechle 22524a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 22534a16ff4cSRalf Baechle bool 22544a16ff4cSRalf Baechle 22550ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 22560ee958e1SPaul Burton bool 22570ee958e1SPaul Burton 2258e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2259e73ea273SRalf Baechle bool 2260e73ea273SRalf Baechle 2261130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2262130e2fb7SRalf Baechle bool 2263130e2fb7SRalf Baechle 2264130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2265130e2fb7SRalf Baechle bool 2266130e2fb7SRalf Baechle 2267130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2268130e2fb7SRalf Baechle bool 2269130e2fb7SRalf Baechle 2270130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2271130e2fb7SRalf Baechle bool 2272130e2fb7SRalf Baechle 2273130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2274130e2fb7SRalf Baechle bool 2275130e2fb7SRalf Baechle 22761da177e4SLinus Torvaldsconfig NR_CPUS 2277a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2278a91796a9SJayachandran C range 2 256 22791da177e4SLinus Torvalds depends on SMP 2280130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2281130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2282130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2283130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2284130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 22851da177e4SLinus Torvalds help 22861da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 22871da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 22881da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 228972ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 229072ede9b1SAtsushi Nemoto and 2 for all others. 22911da177e4SLinus Torvalds 22921da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 229372ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 229472ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 229572ede9b1SAtsushi Nemoto power of two. 22961da177e4SLinus Torvalds 2297399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2298399aaa25SAl Cooper bool 2299399aaa25SAl Cooper 23001723b4a3SAtsushi Nemoto# 23011723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 23021723b4a3SAtsushi Nemoto# 23031723b4a3SAtsushi Nemoto 23041723b4a3SAtsushi Nemotochoice 23051723b4a3SAtsushi Nemoto prompt "Timer frequency" 23061723b4a3SAtsushi Nemoto default HZ_250 23071723b4a3SAtsushi Nemoto help 23081723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 23091723b4a3SAtsushi Nemoto 23101723b4a3SAtsushi Nemoto config HZ_48 23110f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 23121723b4a3SAtsushi Nemoto 23131723b4a3SAtsushi Nemoto config HZ_100 23141723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 23151723b4a3SAtsushi Nemoto 23161723b4a3SAtsushi Nemoto config HZ_128 23171723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 23181723b4a3SAtsushi Nemoto 23191723b4a3SAtsushi Nemoto config HZ_250 23201723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 23211723b4a3SAtsushi Nemoto 23221723b4a3SAtsushi Nemoto config HZ_256 23231723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 23241723b4a3SAtsushi Nemoto 23251723b4a3SAtsushi Nemoto config HZ_1000 23261723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 23271723b4a3SAtsushi Nemoto 23281723b4a3SAtsushi Nemoto config HZ_1024 23291723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 23301723b4a3SAtsushi Nemoto 23311723b4a3SAtsushi Nemotoendchoice 23321723b4a3SAtsushi Nemoto 23331723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 23341723b4a3SAtsushi Nemoto bool 23351723b4a3SAtsushi Nemoto 23361723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 23371723b4a3SAtsushi Nemoto bool 23381723b4a3SAtsushi Nemoto 23391723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 23401723b4a3SAtsushi Nemoto bool 23411723b4a3SAtsushi Nemoto 23421723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 23431723b4a3SAtsushi Nemoto bool 23441723b4a3SAtsushi Nemoto 23451723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 23461723b4a3SAtsushi Nemoto bool 23471723b4a3SAtsushi Nemoto 23481723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 23491723b4a3SAtsushi Nemoto bool 23501723b4a3SAtsushi Nemoto 23511723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 23521723b4a3SAtsushi Nemoto bool 23531723b4a3SAtsushi Nemoto 23541723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 23551723b4a3SAtsushi Nemoto bool 23561723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 23571723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 23581723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 23591723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 23601723b4a3SAtsushi Nemoto 23611723b4a3SAtsushi Nemotoconfig HZ 23621723b4a3SAtsushi Nemoto int 23631723b4a3SAtsushi Nemoto default 48 if HZ_48 23641723b4a3SAtsushi Nemoto default 100 if HZ_100 23651723b4a3SAtsushi Nemoto default 128 if HZ_128 23661723b4a3SAtsushi Nemoto default 250 if HZ_250 23671723b4a3SAtsushi Nemoto default 256 if HZ_256 23681723b4a3SAtsushi Nemoto default 1000 if HZ_1000 23691723b4a3SAtsushi Nemoto default 1024 if HZ_1024 23701723b4a3SAtsushi Nemoto 2371e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 23721da177e4SLinus Torvalds 2373ea6e942bSAtsushi Nemotoconfig KEXEC 23747d60717eSKees Cook bool "Kexec system call" 2375ea6e942bSAtsushi Nemoto help 2376ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2377ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 23783dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2379ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2380ea6e942bSAtsushi Nemoto 238101dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2382ea6e942bSAtsushi Nemoto 2383ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2384ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2385bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2386bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2387bf220695SGeert Uytterhoeven made. 2388ea6e942bSAtsushi Nemoto 23897aa1c8f4SRalf Baechleconfig CRASH_DUMP 23907aa1c8f4SRalf Baechle bool "Kernel crash dumps" 23917aa1c8f4SRalf Baechle help 23927aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 23937aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 23947aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 23957aa1c8f4SRalf Baechle a specially reserved region and then later executed after 23967aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 23977aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 23987aa1c8f4SRalf Baechle PHYSICAL_START. 23997aa1c8f4SRalf Baechle 24007aa1c8f4SRalf Baechleconfig PHYSICAL_START 24017aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 24027aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 24037aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 24047aa1c8f4SRalf Baechle depends on CRASH_DUMP 24057aa1c8f4SRalf Baechle help 24067aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 24077aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 24087aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 24097aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 24107aa1c8f4SRalf Baechle passed to the panic-ed kernel). 24117aa1c8f4SRalf Baechle 2412ea6e942bSAtsushi Nemotoconfig SECCOMP 2413ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2414293c5bd1SRalf Baechle depends on PROC_FS 2415ea6e942bSAtsushi Nemoto default y 2416ea6e942bSAtsushi Nemoto help 2417ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2418ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2419ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2420ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2421ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2422ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2423ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2424ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2425ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2426ea6e942bSAtsushi Nemoto 2427ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2428ea6e942bSAtsushi Nemoto 2429597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 243006e2e882SPaul Burton bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)" 2431597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2432597ce172SPaul Burton help 2433597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2434597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2435597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2436597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2437597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2438597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2439597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2440597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2441597ce172SPaul Burton saying N here. 2442597ce172SPaul Burton 244306e2e882SPaul Burton Although binutils currently supports use of this flag the details 244406e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 244506e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 244606e2e882SPaul Burton behaviour before the details have been finalised, this option should 244706e2e882SPaul Burton be considered experimental and only enabled by those working upon 244806e2e882SPaul Burton said details. 244906e2e882SPaul Burton 245006e2e882SPaul Burton If unsure, say N. 2451597ce172SPaul Burton 2452f2ffa5abSDezhong Diaoconfig USE_OF 24530b3e06fdSJonas Gorski bool 2454f2ffa5abSDezhong Diao select OF 2455e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2456abd2363fSGrant Likely select IRQ_DOMAIN 2457f2ffa5abSDezhong Diao 24585e83d430SRalf Baechleendmenu 24595e83d430SRalf Baechle 24601df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 24611df0f0ffSAtsushi Nemoto bool 24621df0f0ffSAtsushi Nemoto default y 24631df0f0ffSAtsushi Nemoto 24641df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 24651df0f0ffSAtsushi Nemoto bool 24661df0f0ffSAtsushi Nemoto default y 24671df0f0ffSAtsushi Nemoto 2468b6c3539bSRalf Baechlesource "init/Kconfig" 2469b6c3539bSRalf Baechle 2470dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2471dc52ddc0SMatt Helsley 24721da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 24731da177e4SLinus Torvalds 24745e83d430SRalf Baechleconfig HW_HAS_EISA 24755e83d430SRalf Baechle bool 24761da177e4SLinus Torvaldsconfig HW_HAS_PCI 24771da177e4SLinus Torvalds bool 24781da177e4SLinus Torvalds 24791da177e4SLinus Torvaldsconfig PCI 24801da177e4SLinus Torvalds bool "Support for PCI controller" 24811da177e4SLinus Torvalds depends on HW_HAS_PCI 2482abb4ae46SRalf Baechle select PCI_DOMAINS 24830f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 24841da177e4SLinus Torvalds help 24851da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 24861da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 24871da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 24881da177e4SLinus Torvalds say Y, otherwise N. 24891da177e4SLinus Torvalds 24900e476d91SHuacai Chenconfig HT_PCI 24910e476d91SHuacai Chen bool "Support for HT-linked PCI" 24920e476d91SHuacai Chen default y 24930e476d91SHuacai Chen depends on CPU_LOONGSON3 24940e476d91SHuacai Chen select PCI 24950e476d91SHuacai Chen select PCI_DOMAINS 24960e476d91SHuacai Chen help 24970e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 24980e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 24990e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 25000e476d91SHuacai Chen 25011da177e4SLinus Torvaldsconfig PCI_DOMAINS 25021da177e4SLinus Torvalds bool 25031da177e4SLinus Torvalds 25041da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 25051da177e4SLinus Torvalds 25063f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 25073f787ca4SJonas Gorski 25081da177e4SLinus Torvalds# 25091da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 25101da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 25111da177e4SLinus Torvalds# users to choose the right thing ... 25121da177e4SLinus Torvalds# 25131da177e4SLinus Torvaldsconfig ISA 25141da177e4SLinus Torvalds bool 25151da177e4SLinus Torvalds 25161da177e4SLinus Torvaldsconfig EISA 25171da177e4SLinus Torvalds bool "EISA support" 25185e83d430SRalf Baechle depends on HW_HAS_EISA 25191da177e4SLinus Torvalds select ISA 2520aa414dffSRalf Baechle select GENERIC_ISA_DMA 25211da177e4SLinus Torvalds ---help--- 25221da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 25231da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 25241da177e4SLinus Torvalds 25251da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 25261da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 25271da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 25281da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 25291da177e4SLinus Torvalds 25301da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 25311da177e4SLinus Torvalds 25321da177e4SLinus Torvalds Otherwise, say N. 25331da177e4SLinus Torvalds 25341da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 25351da177e4SLinus Torvalds 25361da177e4SLinus Torvaldsconfig TC 25371da177e4SLinus Torvalds bool "TURBOchannel support" 25381da177e4SLinus Torvalds depends on MACH_DECSTATION 25391da177e4SLinus Torvalds help 254050a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 254150a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 254250a23e6eSJustin P. Mattock at: 254350a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 254450a23e6eSJustin P. Mattock and: 254550a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 254650a23e6eSJustin P. Mattock Linux driver support status is documented at: 254750a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 25481da177e4SLinus Torvalds 25491da177e4SLinus Torvaldsconfig MMU 25501da177e4SLinus Torvalds bool 25511da177e4SLinus Torvalds default y 25521da177e4SLinus Torvalds 2553d865bea4SRalf Baechleconfig I8253 2554d865bea4SRalf Baechle bool 2555798778b8SRussell King select CLKSRC_I8253 25562d02612fSThomas Gleixner select CLKEVT_I8253 25579726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2558d865bea4SRalf Baechle 2559e05eb3f8SRalf Baechleconfig ZONE_DMA 2560e05eb3f8SRalf Baechle bool 2561e05eb3f8SRalf Baechle 2562cce335aeSRalf Baechleconfig ZONE_DMA32 2563cce335aeSRalf Baechle bool 2564cce335aeSRalf Baechle 25651da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 25661da177e4SLinus Torvalds 25671da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 25681da177e4SLinus Torvalds 2569388b78adSAlexandre Bounineconfig RAPIDIO 257056abde72SAlexandre Bounine tristate "RapidIO support" 2571388b78adSAlexandre Bounine depends on PCI 2572388b78adSAlexandre Bounine default n 2573388b78adSAlexandre Bounine help 2574388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2575388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2576388b78adSAlexandre Bounine 2577388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2578388b78adSAlexandre Bounine 25791da177e4SLinus Torvaldsendmenu 25801da177e4SLinus Torvalds 25811da177e4SLinus Torvaldsmenu "Executable file formats" 25821da177e4SLinus Torvalds 25831da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 25841da177e4SLinus Torvalds 25851da177e4SLinus Torvaldsconfig TRAD_SIGNALS 25861da177e4SLinus Torvalds bool 25871da177e4SLinus Torvalds 25881da177e4SLinus Torvaldsconfig MIPS32_COMPAT 25891da177e4SLinus Torvalds bool "Kernel support for Linux/MIPS 32-bit binary compatibility" 2590875d43e7SRalf Baechle depends on 64BIT 25911da177e4SLinus Torvalds help 25921da177e4SLinus Torvalds Select this option if you want Linux/MIPS 32-bit binary 25931da177e4SLinus Torvalds compatibility. Since all software available for Linux/MIPS is 25941da177e4SLinus Torvalds currently 32-bit you should say Y here. 25951da177e4SLinus Torvalds 25961da177e4SLinus Torvaldsconfig COMPAT 25971da177e4SLinus Torvalds bool 25981da177e4SLinus Torvalds depends on MIPS32_COMPAT 259948b25c43SChris Metcalf select ARCH_WANT_OLD_COMPAT_IPC 26001da177e4SLinus Torvalds default y 26011da177e4SLinus Torvalds 260205e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 260305e43966SAtsushi Nemoto bool 260405e43966SAtsushi Nemoto depends on COMPAT && SYSVIPC 260505e43966SAtsushi Nemoto default y 260605e43966SAtsushi Nemoto 26071da177e4SLinus Torvaldsconfig MIPS32_O32 26081da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 26091da177e4SLinus Torvalds depends on MIPS32_COMPAT 26101da177e4SLinus Torvalds help 26111da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 26121da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 26131da177e4SLinus Torvalds existing binaries are in this format. 26141da177e4SLinus Torvalds 26151da177e4SLinus Torvalds If unsure, say Y. 26161da177e4SLinus Torvalds 26171da177e4SLinus Torvaldsconfig MIPS32_N32 26181da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 26191da177e4SLinus Torvalds depends on MIPS32_COMPAT 26201da177e4SLinus Torvalds help 26211da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 26221da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 26231da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 26241da177e4SLinus Torvalds cases. 26251da177e4SLinus Torvalds 26261da177e4SLinus Torvalds If unsure, say N. 26271da177e4SLinus Torvalds 26281da177e4SLinus Torvaldsconfig BINFMT_ELF32 26291da177e4SLinus Torvalds bool 26301da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 26311da177e4SLinus Torvalds 26322116245eSRalf Baechleendmenu 26331da177e4SLinus Torvalds 26342116245eSRalf Baechlemenu "Power management options" 2635952fa954SRodolfo Giometti 2636363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2637363c55caSWu Zhangjin def_bool y 26383f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2639363c55caSWu Zhangjin 2640f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2641f4cb5700SJohannes Berg def_bool y 26423f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2643f4cb5700SJohannes Berg 26442116245eSRalf Baechlesource "kernel/power/Kconfig" 2645952fa954SRodolfo Giometti 26461da177e4SLinus Torvaldsendmenu 26471da177e4SLinus Torvalds 26487a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 26497a998935SViresh Kumar bool 26507a998935SViresh Kumar 26517a998935SViresh Kumarmenu "CPU Power Management" 2652c095ebafSPaul Burton 2653c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 26547a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 26557a998935SViresh Kumarendif 26569726b43aSWu Zhangjin 2657c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 2658c095ebafSPaul Burton 2659c095ebafSPaul Burtonendmenu 2660c095ebafSPaul Burton 2661d5950b43SSam Ravnborgsource "net/Kconfig" 2662d5950b43SSam Ravnborg 26631da177e4SLinus Torvaldssource "drivers/Kconfig" 26641da177e4SLinus Torvalds 266598cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 266698cdee0eSRalf Baechle 26671da177e4SLinus Torvaldssource "fs/Kconfig" 26681da177e4SLinus Torvalds 26691da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 26701da177e4SLinus Torvalds 26711da177e4SLinus Torvaldssource "security/Kconfig" 26721da177e4SLinus Torvalds 26731da177e4SLinus Torvaldssource "crypto/Kconfig" 26741da177e4SLinus Torvalds 26751da177e4SLinus Torvaldssource "lib/Kconfig" 26762235a54dSSanjay Lal 26772235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 2678