11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 5393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 6c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 7f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 8ec7748b5SSam Ravnborg select HAVE_IDE 942d4b839SMathieu Desnoyers select HAVE_OPROFILE 107f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 117f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1288547001SJason Wessel select HAVE_ARCH_KGDB 13490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 14c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 153f5fdb4bSMarkos Chandras select HAVE_BPF_JIT if !CPU_MICROMIPS 167563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 17d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 18538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 19538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2064575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2129c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 22c1bf207dSDavid Daney select HAVE_KPROBES 23c1bf207dSDavid Daney select HAVE_KRETPROBES 24fb59e394SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 25b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 261d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 272b68f6caSKees Cook select ARCH_HAS_ELF_RANDOMIZE 28383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 2921a41faaSWu Zhangjin select RTC_LIB if !MACH_LOONGSON 302b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 317463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3248e1fd5aSDavid Daney select HAVE_DMA_ATTRS 33f4649382SZubair Lutfullah Kakakhel select HAVE_DMA_CONTIGUOUS 3448e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 353bd27e32SDavid Daney select GENERIC_IRQ_PROBE 36f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3778857614SMarkos Chandras select GENERIC_PCI_IOMAP 3894bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 39c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 400f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 419d15ffc8STejun Heo select HAVE_MEMBLOCK 429d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 439d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 44360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 454b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 46cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 47929de4ccSDeng-Cheng Zhu select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 48cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 49786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 504febd95aSStephen Rothwell select VIRT_TO_BUS 512f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 522f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5350150d2bSAl Viro select CLONE_BACKWARDS 54d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5519952a92SKees Cook select HAVE_CC_STACKPROTECTOR 56b1d4c6caSJames Hogan select CPU_PM if CPU_IDLE 57cc7964afSPaul Burton select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 5890cee759SPaul Burton select ARCH_BINFMT_ELF_STATE 59d79d853dSMarkos Chandras select SYSCTL_EXCEPTION_TRACE 60bb877e96SDeng-Cheng Zhu select HAVE_VIRT_CPU_ACCOUNTING_GEN 61ec9ddad3SDeng-Cheng Zhu select HAVE_IRQ_TIME_ACCOUNTING 621da177e4SLinus Torvalds 631da177e4SLinus Torvaldsmenu "Machine selection" 641da177e4SLinus Torvalds 655e83d430SRalf Baechlechoice 665e83d430SRalf Baechle prompt "System type" 675e83d430SRalf Baechle default SGI_IP22 681da177e4SLinus Torvalds 6942a4f17dSManuel Laussconfig MIPS_ALCHEMY 70c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 7134adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 72f772cdb2SRalf Baechle select CEVT_R4K 73d7ea335cSSteven J. Hill select CSRC_R4K 7467e38cf2SRalf Baechle select IRQ_MIPS_CPU 7588e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 7642a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 7742a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 7842a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 79efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 801b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 8147440229SManuel Lauss select COMMON_CLK 821da177e4SLinus Torvalds 837ca5dc14SFlorian Fainelliconfig AR7 847ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 857ca5dc14SFlorian Fainelli select BOOT_ELF32 867ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 877ca5dc14SFlorian Fainelli select CEVT_R4K 887ca5dc14SFlorian Fainelli select CSRC_R4K 8967e38cf2SRalf Baechle select IRQ_MIPS_CPU 907ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 917ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 927ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 937ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 947ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 957ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 96377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 971b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 985f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 997ca5dc14SFlorian Fainelli select VLYNQ 1008551fb64SYoichi Yuasa select HAVE_CLK 1017ca5dc14SFlorian Fainelli help 1027ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1037ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1047ca5dc14SFlorian Fainelli 10543cc739fSSergey Ryazanovconfig ATH25 10643cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 10743cc739fSSergey Ryazanov select CEVT_R4K 10843cc739fSSergey Ryazanov select CSRC_R4K 10943cc739fSSergey Ryazanov select DMA_NONCOHERENT 11067e38cf2SRalf Baechle select IRQ_MIPS_CPU 1111753e74eSSergey Ryazanov select IRQ_DOMAIN 11243cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 11343cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 11443cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1158aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 11643cc739fSSergey Ryazanov help 11743cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 11843cc739fSSergey Ryazanov 119d4a67d9dSGabor Juhosconfig ATH79 120d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 1216eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 122d4a67d9dSGabor Juhos select BOOT_RAW 123d4a67d9dSGabor Juhos select CEVT_R4K 124d4a67d9dSGabor Juhos select CSRC_R4K 125d4a67d9dSGabor Juhos select DMA_NONCOHERENT 12694638067SGabor Juhos select HAVE_CLK 127411520afSAlban Bedel select COMMON_CLK 1282c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 12967e38cf2SRalf Baechle select IRQ_MIPS_CPU 1300aabf1a4SGabor Juhos select MIPS_MACHINE 131d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 132d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 133d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 134d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 135377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 136da628e8bSAlban Bedel select SYS_SUPPORTS_ZBOOT 137d4a67d9dSGabor Juhos help 138d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 139d4a67d9dSGabor Juhos 1405f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 1415f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 142d666cd02SKevin Cernekee select BOOT_RAW 143d666cd02SKevin Cernekee select NO_EXCEPT_FILL 144d666cd02SKevin Cernekee select USE_OF 145d666cd02SKevin Cernekee select CEVT_R4K 146d666cd02SKevin Cernekee select CSRC_R4K 147d666cd02SKevin Cernekee select SYNC_R4K 148d666cd02SKevin Cernekee select COMMON_CLK 14960b858f2SKevin Cernekee select BCM7038_L1_IRQ 15060b858f2SKevin Cernekee select BCM7120_L2_IRQ 15160b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 15267e38cf2SRalf Baechle select IRQ_MIPS_CPU 15360b858f2SKevin Cernekee select RAW_IRQ_ACCESSORS 15460b858f2SKevin Cernekee select DMA_NONCOHERENT 155d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 15660b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 157d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 158d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 15960b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 16060b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 16160b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 162d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 163d666cd02SKevin Cernekee select SWAP_IO_SPACE 16460b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 16560b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 16660b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 16760b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 168d666cd02SKevin Cernekee help 1695f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 1705f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 1715f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 1725f2d4459SKevin Cernekee must be set appropriately for your board. 173d666cd02SKevin Cernekee 1741c0c13ebSAurelien Jarnoconfig BCM47XX 175c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1762da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 177fe08f8c2SHauke Mehrtens select BOOT_RAW 17842f77542SRalf Baechle select CEVT_R4K 179940f6b48SRalf Baechle select CSRC_R4K 1801c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1811c0c13ebSAurelien Jarno select HW_HAS_PCI 18267e38cf2SRalf Baechle select IRQ_MIPS_CPU 183314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 184dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1851c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1861c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 187377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 18825e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 189e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 190c949c0bcSRafał Miłecki select GPIOLIB 191c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 1921c0c13ebSAurelien Jarno help 1931c0c13ebSAurelien Jarno Support for BCM47XX based boards 1941c0c13ebSAurelien Jarno 195e7300d04SMaxime Bizonconfig BCM63XX 196e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 197ae8de61cSFlorian Fainelli select BOOT_RAW 198e7300d04SMaxime Bizon select CEVT_R4K 199e7300d04SMaxime Bizon select CSRC_R4K 200fc264022SJonas Gorski select SYNC_R4K 201e7300d04SMaxime Bizon select DMA_NONCOHERENT 20267e38cf2SRalf Baechle select IRQ_MIPS_CPU 203e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 204e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 205e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 206e7300d04SMaxime Bizon select SWAP_IO_SPACE 207e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 2083e82eeebSYoichi Yuasa select HAVE_CLK 209af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 210e7300d04SMaxime Bizon help 211e7300d04SMaxime Bizon Support for BCM63XX based boards 212e7300d04SMaxime Bizon 2131da177e4SLinus Torvaldsconfig MIPS_COBALT 2143fa986faSMartin Michlmayr bool "Cobalt Server" 21542f77542SRalf Baechle select CEVT_R4K 216940f6b48SRalf Baechle select CSRC_R4K 2171097c6acSYoichi Yuasa select CEVT_GT641XX 2181da177e4SLinus Torvalds select DMA_NONCOHERENT 2191da177e4SLinus Torvalds select HW_HAS_PCI 220d865bea4SRalf Baechle select I8253 2211da177e4SLinus Torvalds select I8259 22267e38cf2SRalf Baechle select IRQ_MIPS_CPU 223d5ab1a69SYoichi Yuasa select IRQ_GT641XX 224252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 225e25bfc92SYoichi Yuasa select PCI 2267cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 2270a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 228ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2290e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 2305e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 231e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 2321da177e4SLinus Torvalds 2331da177e4SLinus Torvaldsconfig MACH_DECSTATION 2343fa986faSMartin Michlmayr bool "DECstations" 2351da177e4SLinus Torvalds select BOOT_ELF32 2366457d9fcSYoichi Yuasa select CEVT_DS1287 23781d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 2384247417dSYoichi Yuasa select CSRC_IOASIC 23981d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 24020d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 24120d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 24220d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 2431da177e4SLinus Torvalds select DMA_NONCOHERENT 244ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 24567e38cf2SRalf Baechle select IRQ_MIPS_CPU 2467cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 2477cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 248ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2497d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2505e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 2511723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 2521723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 2531723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 254930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 2555e83d430SRalf Baechle help 2561da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 2571da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 2581da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 2591da177e4SLinus Torvalds 2601da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 2611da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 2621da177e4SLinus Torvalds 2631da177e4SLinus Torvalds DECstation 5000/50 2641da177e4SLinus Torvalds DECstation 5000/150 2651da177e4SLinus Torvalds DECstation 5000/260 2661da177e4SLinus Torvalds DECsystem 5900/260 2671da177e4SLinus Torvalds 2681da177e4SLinus Torvalds otherwise choose R3000. 2691da177e4SLinus Torvalds 2705e83d430SRalf Baechleconfig MACH_JAZZ 2713fa986faSMartin Michlmayr bool "Jazz family of machines" 2720e2794b0SRalf Baechle select FW_ARC 2730e2794b0SRalf Baechle select FW_ARC32 2745e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 27542f77542SRalf Baechle select CEVT_R4K 276940f6b48SRalf Baechle select CSRC_R4K 277e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2785e83d430SRalf Baechle select GENERIC_ISA_DMA 2798a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 28067e38cf2SRalf Baechle select IRQ_MIPS_CPU 281d865bea4SRalf Baechle select I8253 2825e83d430SRalf Baechle select I8259 2835e83d430SRalf Baechle select ISA 2847cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2855e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2867d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2871723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2881da177e4SLinus Torvalds help 2895e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2905e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 291692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2925e83d430SRalf Baechle Olivetti M700-10 workstations. 2935e83d430SRalf Baechle 294de361e8bSPaul Burtonconfig MACH_INGENIC 295de361e8bSPaul Burton bool "Ingenic SoC based machines" 2965ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2975ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 298f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 2995ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 30067e38cf2SRalf Baechle select IRQ_MIPS_CPU 3015ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 302ff1930c6SPaul Burton select COMMON_CLK 30383bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 304ffb1843dSPaul Burton select BUILTIN_DTB 305ffb1843dSPaul Burton select USE_OF 3066ec127fbSPaul Burton select LIBFDT 3075ebabe59SLars-Peter Clausen 308171bb2f1SJohn Crispinconfig LANTIQ 309171bb2f1SJohn Crispin bool "Lantiq based platforms" 310171bb2f1SJohn Crispin select DMA_NONCOHERENT 31167e38cf2SRalf Baechle select IRQ_MIPS_CPU 312171bb2f1SJohn Crispin select CEVT_R4K 313171bb2f1SJohn Crispin select CSRC_R4K 314171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 315171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 316171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 317171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 318377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 319171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 320171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 321171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 322171bb2f1SJohn Crispin select SWAP_IO_SPACE 323171bb2f1SJohn Crispin select BOOT_RAW 324287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 325287e3f3fSJohn Crispin select CLKDEV_LOOKUP 326a0392222SJohn Crispin select USE_OF 3273f8c50c9SJohn Crispin select PINCTRL 3283f8c50c9SJohn Crispin select PINCTRL_LANTIQ 329c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 330c530781cSJohn Crispin select RESET_CONTROLLER 331171bb2f1SJohn Crispin 3321f21d2bdSBrian Murphyconfig LASAT 3331f21d2bdSBrian Murphy bool "LASAT Networks platforms" 33442f77542SRalf Baechle select CEVT_R4K 33516f0bbbcSRalf Baechle select CRC32 336940f6b48SRalf Baechle select CSRC_R4K 3371f21d2bdSBrian Murphy select DMA_NONCOHERENT 3381f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 3391f21d2bdSBrian Murphy select HW_HAS_PCI 34067e38cf2SRalf Baechle select IRQ_MIPS_CPU 3411f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 3421f21d2bdSBrian Murphy select MIPS_NILE4 3431f21d2bdSBrian Murphy select R5000_CPU_SCACHE 3441f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 3451f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 3461f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 3471f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 3481f21d2bdSBrian Murphy 34985749d24SWu Zhangjinconfig MACH_LOONGSON 35085749d24SWu Zhangjin bool "Loongson family of machines" 351c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 352ade299d8SYoichi Yuasa help 35385749d24SWu Zhangjin This enables the support of Loongson family of machines. 35485749d24SWu Zhangjin 35585749d24SWu Zhangjin Loongson is a family of general-purpose MIPS-compatible CPUs. 35685749d24SWu Zhangjin developed at Institute of Computing Technology (ICT), 35785749d24SWu Zhangjin Chinese Academy of Sciences (CAS) in the People's Republic 35885749d24SWu Zhangjin of China. The chief architect is Professor Weiwu Hu. 359ade299d8SYoichi Yuasa 360ca585cf9SKelvin Cheungconfig MACH_LOONGSON1 361ca585cf9SKelvin Cheung bool "Loongson 1 family of machines" 362ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 363ca585cf9SKelvin Cheung help 364ca585cf9SKelvin Cheung This enables support for the Loongson 1 based machines. 365ca585cf9SKelvin Cheung 366ca585cf9SKelvin Cheung Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by 367ca585cf9SKelvin Cheung the ICT (Institute of Computing Technology) and the Chinese Academy 368ca585cf9SKelvin Cheung of Sciences. 369ca585cf9SKelvin Cheung 3706a438309SAndrew Brestickerconfig MACH_PISTACHIO 3716a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 3726a438309SAndrew Bresticker select ARCH_REQUIRE_GPIOLIB 3736a438309SAndrew Bresticker select BOOT_ELF32 3746a438309SAndrew Bresticker select BOOT_RAW 3756a438309SAndrew Bresticker select CEVT_R4K 3766a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 3776a438309SAndrew Bresticker select COMMON_CLK 3786a438309SAndrew Bresticker select CSRC_R4K 3796a438309SAndrew Bresticker select DMA_MAYBE_COHERENT 38067e38cf2SRalf Baechle select IRQ_MIPS_CPU 3816a438309SAndrew Bresticker select LIBFDT 3826a438309SAndrew Bresticker select MFD_SYSCON 3836a438309SAndrew Bresticker select MIPS_CPU_SCACHE 3846a438309SAndrew Bresticker select MIPS_GIC 3856a438309SAndrew Bresticker select PINCTRL 3866a438309SAndrew Bresticker select REGULATOR 3876a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 3886a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 3896a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 3906a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 3916a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 3926a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 393018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 394018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 3956a438309SAndrew Bresticker select USE_OF 3966a438309SAndrew Bresticker help 3976a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 3986a438309SAndrew Bresticker 3991da177e4SLinus Torvaldsconfig MIPS_MALTA 4003fa986faSMartin Michlmayr bool "MIPS Malta board" 40161ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 4021da177e4SLinus Torvalds select BOOT_ELF32 403fa71c960SRalf Baechle select BOOT_RAW 40442f77542SRalf Baechle select CEVT_R4K 405940f6b48SRalf Baechle select CSRC_R4K 406fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 407885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 4081da177e4SLinus Torvalds select GENERIC_ISA_DMA 4098a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 41067e38cf2SRalf Baechle select IRQ_MIPS_CPU 4118a19b8f1SAndrew Bresticker select MIPS_GIC 4121da177e4SLinus Torvalds select HW_HAS_PCI 413d865bea4SRalf Baechle select I8253 4141da177e4SLinus Torvalds select I8259 4155e83d430SRalf Baechle select MIPS_BONITO64 4169318c51aSChris Dearman select MIPS_CPU_SCACHE 417a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 418252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 4195e83d430SRalf Baechle select MIPS_MSC 4201da177e4SLinus Torvalds select SWAP_IO_SPACE 4217cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 4227cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 423bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 424c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 425575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 4267cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 4275d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 428575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 4297cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 4307cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 431ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 432ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4335e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 434c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 4355e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 436424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 4370365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 438e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 439377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 440f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 4419693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 4421b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 443*abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 4441da177e4SLinus Torvalds help 445f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 4461da177e4SLinus Torvalds board. 4471da177e4SLinus Torvalds 448ec47b274SSteven J. Hillconfig MIPS_SEAD3 449ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 450ec47b274SSteven J. Hill select BOOT_ELF32 451ec47b274SSteven J. Hill select BOOT_RAW 452f262b5f2SAndrew Bresticker select BUILTIN_DTB 453ec47b274SSteven J. Hill select CEVT_R4K 454ec47b274SSteven J. Hill select CSRC_R4K 455fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 456ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 457ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 458ec47b274SSteven J. Hill select DMA_NONCOHERENT 45967e38cf2SRalf Baechle select IRQ_MIPS_CPU 4608a19b8f1SAndrew Bresticker select MIPS_GIC 46144327236SQais Yousef select LIBFDT 462ec47b274SSteven J. Hill select MIPS_MSC 463ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 464ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 465ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 466ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 467ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 468ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 469ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 470ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 471ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 472a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 473377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 474ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 475ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 4769b731009SSteven J. Hill select USE_OF 477ec47b274SSteven J. Hill help 478ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 479ec47b274SSteven J. Hill board. 480ec47b274SSteven J. Hill 481a83860c2SRalf Baechleconfig NEC_MARKEINS 482a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 483a83860c2SRalf Baechle select SOC_EMMA2RH 484a83860c2SRalf Baechle select HW_HAS_PCI 485a83860c2SRalf Baechle help 486a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 487ade299d8SYoichi Yuasa 4885e83d430SRalf Baechleconfig MACH_VR41XX 48974142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 49042f77542SRalf Baechle select CEVT_R4K 491940f6b48SRalf Baechle select CSRC_R4K 4927cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 493377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 49427fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 4955e83d430SRalf Baechle 496edb6310aSDaniel Lairdconfig NXP_STB220 497edb6310aSDaniel Laird bool "NXP STB220 board" 498edb6310aSDaniel Laird select SOC_PNX833X 499edb6310aSDaniel Laird help 500edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 501edb6310aSDaniel Laird 502edb6310aSDaniel Lairdconfig NXP_STB225 503edb6310aSDaniel Laird bool "NXP 225 board" 504edb6310aSDaniel Laird select SOC_PNX833X 505edb6310aSDaniel Laird select SOC_PNX8335 506edb6310aSDaniel Laird help 507edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 508edb6310aSDaniel Laird 5099267a30dSMarc St-Jeanconfig PMC_MSP 5109267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 51139d30c13SAnoop P A select CEVT_R4K 51239d30c13SAnoop P A select CSRC_R4K 5139267a30dSMarc St-Jean select DMA_NONCOHERENT 5149267a30dSMarc St-Jean select SWAP_IO_SPACE 5159267a30dSMarc St-Jean select NO_EXCEPT_FILL 5169267a30dSMarc St-Jean select BOOT_RAW 5179267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 5189267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 5199267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 5209267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 521377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 52267e38cf2SRalf Baechle select IRQ_MIPS_CPU 5239267a30dSMarc St-Jean select SERIAL_8250 5249267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 5259296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 5269296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 5279267a30dSMarc St-Jean help 5289267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 5299267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 5309267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 5319267a30dSMarc St-Jean a variety of MIPS cores. 5329267a30dSMarc St-Jean 533ae2b5bb6SJohn Crispinconfig RALINK 534ae2b5bb6SJohn Crispin bool "Ralink based machines" 535ae2b5bb6SJohn Crispin select CEVT_R4K 536ae2b5bb6SJohn Crispin select CSRC_R4K 537ae2b5bb6SJohn Crispin select BOOT_RAW 538ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 53967e38cf2SRalf Baechle select IRQ_MIPS_CPU 540ae2b5bb6SJohn Crispin select USE_OF 541ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 542ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 543ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 544ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 545377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 546ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 547ae2b5bb6SJohn Crispin select HAVE_MACH_CLKDEV 548ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 5492a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 5502a153f1cSJohn Crispin select RESET_CONTROLLER 551ae2b5bb6SJohn Crispin 5521da177e4SLinus Torvaldsconfig SGI_IP22 5533fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 5540e2794b0SRalf Baechle select FW_ARC 5550e2794b0SRalf Baechle select FW_ARC32 5561da177e4SLinus Torvalds select BOOT_ELF32 55742f77542SRalf Baechle select CEVT_R4K 558940f6b48SRalf Baechle select CSRC_R4K 559e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 5601da177e4SLinus Torvalds select DMA_NONCOHERENT 5615e83d430SRalf Baechle select HW_HAS_EISA 562d865bea4SRalf Baechle select I8253 56368de4803SThomas Bogendoerfer select I8259 5641da177e4SLinus Torvalds select IP22_CPU_SCACHE 56567e38cf2SRalf Baechle select IRQ_MIPS_CPU 566aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 567e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 568e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 56936e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 570e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 571e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 572e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 5731da177e4SLinus Torvalds select SWAP_IO_SPACE 5747cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 5757cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5762b5e63f6SMartin Michlmayr # 5772b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5782b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5792b5e63f6SMartin Michlmayr # 5802b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5812b5e63f6SMartin Michlmayr # for a more details discussion 5822b5e63f6SMartin Michlmayr # 5832b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 584ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 585ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5865e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 587930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 5881da177e4SLinus Torvalds help 5891da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 5901da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 5911da177e4SLinus Torvalds that runs on these, say Y here. 5921da177e4SLinus Torvalds 5931da177e4SLinus Torvaldsconfig SGI_IP27 5943fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 5950e2794b0SRalf Baechle select FW_ARC 5960e2794b0SRalf Baechle select FW_ARC64 5975e83d430SRalf Baechle select BOOT_ELF64 598e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 599634286f1SRalf Baechle select DMA_COHERENT 60036a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 6011da177e4SLinus Torvalds select HW_HAS_PCI 602130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 6037cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 604ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6055e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 606d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 6071a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 608930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6091da177e4SLinus Torvalds help 6101da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 6111da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 6121da177e4SLinus Torvalds here. 6131da177e4SLinus Torvalds 614e2defae5SThomas Bogendoerferconfig SGI_IP28 6157d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 6160e2794b0SRalf Baechle select FW_ARC 6170e2794b0SRalf Baechle select FW_ARC64 618e2defae5SThomas Bogendoerfer select BOOT_ELF64 619e2defae5SThomas Bogendoerfer select CEVT_R4K 620e2defae5SThomas Bogendoerfer select CSRC_R4K 621e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 622e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 623e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 62467e38cf2SRalf Baechle select IRQ_MIPS_CPU 625e2defae5SThomas Bogendoerfer select HW_HAS_EISA 626e2defae5SThomas Bogendoerfer select I8253 627e2defae5SThomas Bogendoerfer select I8259 628e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 629e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 6305b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 631e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 632e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 633e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 634e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 635e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 6362b5e63f6SMartin Michlmayr # 6372b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6382b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6392b5e63f6SMartin Michlmayr # 6402b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6412b5e63f6SMartin Michlmayr # for a more details discussion 6422b5e63f6SMartin Michlmayr # 6432b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 644e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 645e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 646dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 647e2defae5SThomas Bogendoerfer help 648e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 649e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 650e2defae5SThomas Bogendoerfer 6511da177e4SLinus Torvaldsconfig SGI_IP32 652cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 6530e2794b0SRalf Baechle select FW_ARC 6540e2794b0SRalf Baechle select FW_ARC32 6551da177e4SLinus Torvalds select BOOT_ELF32 65642f77542SRalf Baechle select CEVT_R4K 657940f6b48SRalf Baechle select CSRC_R4K 6581da177e4SLinus Torvalds select DMA_NONCOHERENT 6591da177e4SLinus Torvalds select HW_HAS_PCI 66067e38cf2SRalf Baechle select IRQ_MIPS_CPU 6611da177e4SLinus Torvalds select R5000_CPU_SCACHE 6621da177e4SLinus Torvalds select RM7000_CPU_SCACHE 6637cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6647cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 6657cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 666dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 667ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6685e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6691da177e4SLinus Torvalds help 6701da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 6711da177e4SLinus Torvalds 672ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 673ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 6745e83d430SRalf Baechle select BOOT_ELF32 6755e83d430SRalf Baechle select DMA_COHERENT 6765e83d430SRalf Baechle select SIBYTE_BCM1120 6775e83d430SRalf Baechle select SWAP_IO_SPACE 6787cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6795e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6805e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6815e83d430SRalf Baechle 682ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 683ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 6845e83d430SRalf Baechle select BOOT_ELF32 6855e83d430SRalf Baechle select DMA_COHERENT 6865e83d430SRalf Baechle select SIBYTE_BCM1120 6875e83d430SRalf Baechle select SWAP_IO_SPACE 6887cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6895e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6905e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6915e83d430SRalf Baechle 6925e83d430SRalf Baechleconfig SIBYTE_CRHONE 6933fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 6945e83d430SRalf Baechle select BOOT_ELF32 6955e83d430SRalf Baechle select DMA_COHERENT 6965e83d430SRalf Baechle select SIBYTE_BCM1125 6975e83d430SRalf Baechle select SWAP_IO_SPACE 6987cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6995e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7005e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7015e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7025e83d430SRalf Baechle 703ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 704ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 705ade299d8SYoichi Yuasa select BOOT_ELF32 706ade299d8SYoichi Yuasa select DMA_COHERENT 707ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 708ade299d8SYoichi Yuasa select SWAP_IO_SPACE 709ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 710ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 711ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 712ade299d8SYoichi Yuasa 713ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 714ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 715ade299d8SYoichi Yuasa select BOOT_ELF32 716ade299d8SYoichi Yuasa select DMA_COHERENT 717fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 718ade299d8SYoichi Yuasa select SIBYTE_SB1250 719ade299d8SYoichi Yuasa select SWAP_IO_SPACE 720ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 721ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 722ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 723ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 724cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 725ade299d8SYoichi Yuasa 726ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 727ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 728ade299d8SYoichi Yuasa select BOOT_ELF32 729ade299d8SYoichi Yuasa select DMA_COHERENT 730fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 731ade299d8SYoichi Yuasa select SIBYTE_SB1250 732ade299d8SYoichi Yuasa select SWAP_IO_SPACE 733ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 734ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 735ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 736ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 737ade299d8SYoichi Yuasa 738ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 739ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 740ade299d8SYoichi Yuasa select BOOT_ELF32 741ade299d8SYoichi Yuasa select DMA_COHERENT 742ade299d8SYoichi Yuasa select SIBYTE_SB1250 743ade299d8SYoichi Yuasa select SWAP_IO_SPACE 744ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 745ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 746ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 747ade299d8SYoichi Yuasa 748ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 749ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 750ade299d8SYoichi Yuasa select BOOT_ELF32 751ade299d8SYoichi Yuasa select DMA_COHERENT 752ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 753ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 754ade299d8SYoichi Yuasa select SWAP_IO_SPACE 755ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 756ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 757651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 758ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 759cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 760ade299d8SYoichi Yuasa 76114b36af4SThomas Bogendoerferconfig SNI_RM 76214b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 7630e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 7640e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 765aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 7665e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 7675e83d430SRalf Baechle select BOOT_ELF32 76842f77542SRalf Baechle select CEVT_R4K 769940f6b48SRalf Baechle select CSRC_R4K 770e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 7715e83d430SRalf Baechle select DMA_NONCOHERENT 7725e83d430SRalf Baechle select GENERIC_ISA_DMA 7738a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 7745e83d430SRalf Baechle select HW_HAS_EISA 7755e83d430SRalf Baechle select HW_HAS_PCI 77667e38cf2SRalf Baechle select IRQ_MIPS_CPU 777d865bea4SRalf Baechle select I8253 7785e83d430SRalf Baechle select I8259 7795e83d430SRalf Baechle select ISA 7804a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 7817cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 7824a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 783c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 7844a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 78536a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 786ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 7877d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 7884a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 7895e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7905e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7911da177e4SLinus Torvalds help 79214b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 79314b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 7945e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 7955e83d430SRalf Baechle support this machine type. 7961da177e4SLinus Torvalds 797edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 798edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 7995e83d430SRalf Baechle 800edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 801edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 80223fbee9dSRalf Baechle 80373b4390fSRalf Baechleconfig MIKROTIK_RB532 80473b4390fSRalf Baechle bool "Mikrotik RB532 boards" 80573b4390fSRalf Baechle select CEVT_R4K 80673b4390fSRalf Baechle select CSRC_R4K 80773b4390fSRalf Baechle select DMA_NONCOHERENT 80873b4390fSRalf Baechle select HW_HAS_PCI 80967e38cf2SRalf Baechle select IRQ_MIPS_CPU 81073b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 81173b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 81273b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 81373b4390fSRalf Baechle select SWAP_IO_SPACE 81473b4390fSRalf Baechle select BOOT_RAW 815d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 816930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 81773b4390fSRalf Baechle help 81873b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 81973b4390fSRalf Baechle based on the IDT RC32434 SoC. 82073b4390fSRalf Baechle 8219ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 8229ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 823a86c7f72SDavid Daney select CEVT_R4K 82434adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 825a86c7f72SDavid Daney select DMA_COHERENT 826a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 827a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 828f65aad41SRalf Baechle select EDAC_SUPPORT 82973569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 83073569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 831a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 8325e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 833a86c7f72SDavid Daney select SWAP_IO_SPACE 834e8635b48SDavid Daney select HW_HAS_PCI 835f00e001eSDavid Daney select ZONE_DMA32 836465aaed0SDavid Daney select HOLES_IN_ZONE 83799cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 8386e511163SDavid Daney select LIBFDT 8396e511163SDavid Daney select USE_OF 8406e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 8416e511163SDavid Daney select SYS_SUPPORTS_SMP 8426e511163SDavid Daney select NR_CPUS_DEFAULT_16 843e326479fSAndrew Bresticker select BUILTIN_DTB 8448c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 845a86c7f72SDavid Daney help 846a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 847a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 848a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 849a86c7f72SDavid Daney Some of the supported boards are: 850a86c7f72SDavid Daney EBT3000 851a86c7f72SDavid Daney EBH3000 852a86c7f72SDavid Daney EBH3100 853a86c7f72SDavid Daney Thunder 854a86c7f72SDavid Daney Kodama 855a86c7f72SDavid Daney Hikari 856a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 857a86c7f72SDavid Daney 8587f058e85SJayachandran Cconfig NLM_XLR_BOARD 8597f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 8607f058e85SJayachandran C select BOOT_ELF32 8617f058e85SJayachandran C select NLM_COMMON 8627f058e85SJayachandran C select SYS_HAS_CPU_XLR 8637f058e85SJayachandran C select SYS_SUPPORTS_SMP 8647f058e85SJayachandran C select HW_HAS_PCI 8657f058e85SJayachandran C select SWAP_IO_SPACE 8667f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 8677f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 86834adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 8697f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 8707f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 8717f058e85SJayachandran C select DMA_COHERENT 8727f058e85SJayachandran C select NR_CPUS_DEFAULT_32 8737f058e85SJayachandran C select CEVT_R4K 8747f058e85SJayachandran C select CSRC_R4K 87567e38cf2SRalf Baechle select IRQ_MIPS_CPU 876b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 8777f058e85SJayachandran C select SYNC_R4K 8787f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 8798f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 8808f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 8817f058e85SJayachandran C help 8827f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 8837f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 8847f058e85SJayachandran C 8851c773ea4SJayachandran Cconfig NLM_XLP_BOARD 8861c773ea4SJayachandran C bool "Netlogic XLP based systems" 8871c773ea4SJayachandran C select BOOT_ELF32 8881c773ea4SJayachandran C select NLM_COMMON 8891c773ea4SJayachandran C select SYS_HAS_CPU_XLP 8901c773ea4SJayachandran C select SYS_SUPPORTS_SMP 8911c773ea4SJayachandran C select HW_HAS_PCI 8921c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 8931c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 89434adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 8951c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 8961c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 8971c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 8981c773ea4SJayachandran C select DMA_COHERENT 8991c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 9001c773ea4SJayachandran C select CEVT_R4K 9011c773ea4SJayachandran C select CSRC_R4K 90267e38cf2SRalf Baechle select IRQ_MIPS_CPU 903b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9041c773ea4SJayachandran C select SYNC_R4K 9051c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 9062f6528e1SJayachandran C select USE_OF 9078f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9088f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9091c773ea4SJayachandran C help 9101c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 9111c773ea4SJayachandran C Say Y here if you have a XLP based board. 9121c773ea4SJayachandran C 9139bc463beSDavid Daneyconfig MIPS_PARAVIRT 9149bc463beSDavid Daney bool "Para-Virtualized guest system" 9159bc463beSDavid Daney select CEVT_R4K 9169bc463beSDavid Daney select CSRC_R4K 9179bc463beSDavid Daney select DMA_COHERENT 9189bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 9199bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 9209bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 9219bc463beSDavid Daney select SYS_SUPPORTS_SMP 9229bc463beSDavid Daney select NR_CPUS_DEFAULT_4 9239bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 9249bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 9259bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 9269bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 9279bc463beSDavid Daney select HW_HAS_PCI 9289bc463beSDavid Daney select SWAP_IO_SPACE 9299bc463beSDavid Daney help 9309bc463beSDavid Daney This option supports guest running under ???? 9319bc463beSDavid Daney 9321da177e4SLinus Torvaldsendchoice 9331da177e4SLinus Torvalds 934e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 9353b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 936d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 937a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 938e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 9398945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 9405e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 9415ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 9428ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 9431f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 9440f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 945ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 94629c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 94738b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 94822b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 9495e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 950a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 95185749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig" 952ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig" 9537f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 954ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 95538b18f72SRalf Baechle 9565e83d430SRalf Baechleendmenu 9575e83d430SRalf Baechle 9581da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 9591da177e4SLinus Torvalds bool 9601da177e4SLinus Torvalds default y 9611da177e4SLinus Torvalds 9621da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 9631da177e4SLinus Torvalds bool 9641da177e4SLinus Torvalds 965f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 966f0d1b0b3SDavid Howells bool 967f0d1b0b3SDavid Howells default n 968f0d1b0b3SDavid Howells 969f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 970f0d1b0b3SDavid Howells bool 971f0d1b0b3SDavid Howells default n 972f0d1b0b3SDavid Howells 9733c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 9743c9ee7efSAkinobu Mita bool 9753c9ee7efSAkinobu Mita default y 9763c9ee7efSAkinobu Mita 9771da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 9781da177e4SLinus Torvalds bool 9791da177e4SLinus Torvalds default y 9801da177e4SLinus Torvalds 981ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 9821cc89038SAtsushi Nemoto bool 9831cc89038SAtsushi Nemoto default y 9841cc89038SAtsushi Nemoto 9851da177e4SLinus Torvalds# 9861da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 9871da177e4SLinus Torvalds# 9880e2794b0SRalf Baechleconfig FW_ARC 9891da177e4SLinus Torvalds bool 9901da177e4SLinus Torvalds 99161ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 99261ed242dSRalf Baechle bool 99361ed242dSRalf Baechle 9949267a30dSMarc St-Jeanconfig BOOT_RAW 9959267a30dSMarc St-Jean bool 9969267a30dSMarc St-Jean 997217dd11eSRalf Baechleconfig CEVT_BCM1480 998217dd11eSRalf Baechle bool 999217dd11eSRalf Baechle 10006457d9fcSYoichi Yuasaconfig CEVT_DS1287 10016457d9fcSYoichi Yuasa bool 10026457d9fcSYoichi Yuasa 10031097c6acSYoichi Yuasaconfig CEVT_GT641XX 10041097c6acSYoichi Yuasa bool 10051097c6acSYoichi Yuasa 100642f77542SRalf Baechleconfig CEVT_R4K 100742f77542SRalf Baechle bool 100842f77542SRalf Baechle 1009217dd11eSRalf Baechleconfig CEVT_SB1250 1010217dd11eSRalf Baechle bool 1011217dd11eSRalf Baechle 1012229f773eSAtsushi Nemotoconfig CEVT_TXX9 1013229f773eSAtsushi Nemoto bool 1014229f773eSAtsushi Nemoto 1015217dd11eSRalf Baechleconfig CSRC_BCM1480 1016217dd11eSRalf Baechle bool 1017217dd11eSRalf Baechle 10184247417dSYoichi Yuasaconfig CSRC_IOASIC 10194247417dSYoichi Yuasa bool 10204247417dSYoichi Yuasa 1021940f6b48SRalf Baechleconfig CSRC_R4K 1022940f6b48SRalf Baechle bool 1023940f6b48SRalf Baechle 1024217dd11eSRalf Baechleconfig CSRC_SB1250 1025217dd11eSRalf Baechle bool 1026217dd11eSRalf Baechle 1027a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 10287444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 1029a9aec7feSAtsushi Nemoto bool 1030a9aec7feSAtsushi Nemoto 10310e2794b0SRalf Baechleconfig FW_CFE 1032df78b5c8SAurelien Jarno bool 1033df78b5c8SAurelien Jarno 10344bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 103534adb28dSRalf Baechle def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 10364bafad92SFUJITA Tomonori 1037885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1038885014bcSFelix Fietkau select DMA_NONCOHERENT 1039885014bcSFelix Fietkau bool 1040885014bcSFelix Fietkau 10411da177e4SLinus Torvaldsconfig DMA_COHERENT 10421da177e4SLinus Torvalds bool 10431da177e4SLinus Torvalds 10441da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 10451da177e4SLinus Torvalds bool 1046e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 10474ce588cdSRalf Baechle 1048e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 10494ce588cdSRalf Baechle bool 10501da177e4SLinus Torvalds 105136a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 10521da177e4SLinus Torvalds bool 10531da177e4SLinus Torvalds 1054dbb74540SRalf Baechleconfig HOTPLUG_CPU 10551b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 105640b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 10571b2bc75cSRalf Baechle help 10581b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 10591b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 10601b2bc75cSRalf Baechle (Note: power management support will enable this option 10611b2bc75cSRalf Baechle automatically on SMP systems. ) 10621b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 10631b2bc75cSRalf Baechle 10641b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1065dbb74540SRalf Baechle bool 1066dbb74540SRalf Baechle 10671da177e4SLinus Torvaldsconfig I8259 10681da177e4SLinus Torvalds bool 1069079a4601SAndrew Bresticker select IRQ_DOMAIN 10701da177e4SLinus Torvalds 10711da177e4SLinus Torvaldsconfig MIPS_BONITO64 10721da177e4SLinus Torvalds bool 10731da177e4SLinus Torvalds 10741da177e4SLinus Torvaldsconfig MIPS_MSC 10751da177e4SLinus Torvalds bool 10761da177e4SLinus Torvalds 10771f21d2bdSBrian Murphyconfig MIPS_NILE4 10781f21d2bdSBrian Murphy bool 10791f21d2bdSBrian Murphy 108039b8d525SRalf Baechleconfig SYNC_R4K 108139b8d525SRalf Baechle bool 108239b8d525SRalf Baechle 1083487d70d0SGabor Juhosconfig MIPS_MACHINE 1084487d70d0SGabor Juhos def_bool n 1085487d70d0SGabor Juhos 1086ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1087d388d685SMaciej W. Rozycki def_bool n 1088d388d685SMaciej W. Rozycki 10894e0748f5SMarkos Chandrasconfig GENERIC_CSUM 10904e0748f5SMarkos Chandras bool 10914e0748f5SMarkos Chandras 10928313da30SRalf Baechleconfig GENERIC_ISA_DMA 10938313da30SRalf Baechle bool 10948313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1095a35bee8aSNamhyung Kim select ISA_DMA_API 10968313da30SRalf Baechle 1097aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1098aa414dffSRalf Baechle bool 10998313da30SRalf Baechle select GENERIC_ISA_DMA 1100aa414dffSRalf Baechle 1101a35bee8aSNamhyung Kimconfig ISA_DMA_API 1102a35bee8aSNamhyung Kim bool 1103a35bee8aSNamhyung Kim 1104465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1105465aaed0SDavid Daney bool 1106465aaed0SDavid Daney 11075e83d430SRalf Baechle# 11086b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 11095e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 11105e83d430SRalf Baechle# choice statement should be more obvious to the user. 11115e83d430SRalf Baechle# 11125e83d430SRalf Baechlechoice 11136b2aac42SMasanari Iida prompt "Endianness selection" 11141da177e4SLinus Torvalds help 11151da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 11165e83d430SRalf Baechle byte order. These modes require different kernels and a different 11173cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 11185e83d430SRalf Baechle particular system but some systems are just as commonly used in the 11193dde6ad8SDavid Sterba one or the other endianness. 11205e83d430SRalf Baechle 11215e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 11225e83d430SRalf Baechle bool "Big endian" 11235e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 11245e83d430SRalf Baechle 11255e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 11265e83d430SRalf Baechle bool "Little endian" 11275e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 11285e83d430SRalf Baechle 11295e83d430SRalf Baechleendchoice 11305e83d430SRalf Baechle 113122b0763aSDavid Daneyconfig EXPORT_UASM 113222b0763aSDavid Daney bool 113322b0763aSDavid Daney 11342116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 11352116245eSRalf Baechle bool 11362116245eSRalf Baechle 11375e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 11385e83d430SRalf Baechle bool 11395e83d430SRalf Baechle 11405e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 11415e83d430SRalf Baechle bool 11421da177e4SLinus Torvalds 11439cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 11449cffd154SDavid Daney bool 11459cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 11469cffd154SDavid Daney default y 11479cffd154SDavid Daney 1148aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1149aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1150aa1762f4SDavid Daney 11511da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 11521da177e4SLinus Torvalds bool 11531da177e4SLinus Torvalds 11549267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 11559267a30dSMarc St-Jean bool 11569267a30dSMarc St-Jean 11579267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 11589267a30dSMarc St-Jean bool 11599267a30dSMarc St-Jean 11608420fd00SAtsushi Nemotoconfig IRQ_TXX9 11618420fd00SAtsushi Nemoto bool 11628420fd00SAtsushi Nemoto 1163d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1164d5ab1a69SYoichi Yuasa bool 1165d5ab1a69SYoichi Yuasa 1166252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 11671da177e4SLinus Torvalds bool 11681da177e4SLinus Torvalds 11699267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 11709267a30dSMarc St-Jean bool 11719267a30dSMarc St-Jean 1172a83860c2SRalf Baechleconfig SOC_EMMA2RH 1173a83860c2SRalf Baechle bool 1174a83860c2SRalf Baechle select CEVT_R4K 1175a83860c2SRalf Baechle select CSRC_R4K 1176a83860c2SRalf Baechle select DMA_NONCOHERENT 117767e38cf2SRalf Baechle select IRQ_MIPS_CPU 1178a83860c2SRalf Baechle select SWAP_IO_SPACE 1179a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1180a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1181a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1182a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1183a83860c2SRalf Baechle 1184edb6310aSDaniel Lairdconfig SOC_PNX833X 1185edb6310aSDaniel Laird bool 1186edb6310aSDaniel Laird select CEVT_R4K 1187edb6310aSDaniel Laird select CSRC_R4K 118867e38cf2SRalf Baechle select IRQ_MIPS_CPU 1189edb6310aSDaniel Laird select DMA_NONCOHERENT 1190edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1191edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1192edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1193edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1194377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1195edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1196edb6310aSDaniel Laird 1197edb6310aSDaniel Lairdconfig SOC_PNX8335 1198edb6310aSDaniel Laird bool 1199edb6310aSDaniel Laird select SOC_PNX833X 1200edb6310aSDaniel Laird 1201a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1202a7e07b1aSMarkos Chandras bool 1203a7e07b1aSMarkos Chandras 12041da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 12051da177e4SLinus Torvalds bool 12061da177e4SLinus Torvalds 1207e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1208e2defae5SThomas Bogendoerfer bool 1209e2defae5SThomas Bogendoerfer 12105b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 12115b438c44SThomas Bogendoerfer bool 12125b438c44SThomas Bogendoerfer 1213e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1214e2defae5SThomas Bogendoerfer bool 1215e2defae5SThomas Bogendoerfer 1216e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1217e2defae5SThomas Bogendoerfer bool 1218e2defae5SThomas Bogendoerfer 1219e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1220e2defae5SThomas Bogendoerfer bool 1221e2defae5SThomas Bogendoerfer 1222e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1223e2defae5SThomas Bogendoerfer bool 1224e2defae5SThomas Bogendoerfer 1225e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1226e2defae5SThomas Bogendoerfer bool 1227e2defae5SThomas Bogendoerfer 12280e2794b0SRalf Baechleconfig FW_ARC32 12295e83d430SRalf Baechle bool 12305e83d430SRalf Baechle 1231aaa9fad3SPaul Bolleconfig FW_SNIPROM 1232231a35d3SThomas Bogendoerfer bool 1233231a35d3SThomas Bogendoerfer 12341da177e4SLinus Torvaldsconfig BOOT_ELF32 12351da177e4SLinus Torvalds bool 12361da177e4SLinus Torvalds 1237930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1238930beb5aSFlorian Fainelli bool 1239930beb5aSFlorian Fainelli 1240930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1241930beb5aSFlorian Fainelli bool 1242930beb5aSFlorian Fainelli 1243930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1244930beb5aSFlorian Fainelli bool 1245930beb5aSFlorian Fainelli 1246930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1247930beb5aSFlorian Fainelli bool 1248930beb5aSFlorian Fainelli 12491da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 12501da177e4SLinus Torvalds int 1251a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 12525432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 12535432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 12545432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 12551da177e4SLinus Torvalds default "5" 12561da177e4SLinus Torvalds 12571da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 12581da177e4SLinus Torvalds bool 12591da177e4SLinus Torvalds 12601da177e4SLinus Torvaldsconfig ARC_CONSOLE 12611da177e4SLinus Torvalds bool "ARC console support" 1262e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 12631da177e4SLinus Torvalds 12641da177e4SLinus Torvaldsconfig ARC_MEMORY 12651da177e4SLinus Torvalds bool 126614b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 12671da177e4SLinus Torvalds default y 12681da177e4SLinus Torvalds 12691da177e4SLinus Torvaldsconfig ARC_PROMLIB 12701da177e4SLinus Torvalds bool 1271e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 12721da177e4SLinus Torvalds default y 12731da177e4SLinus Torvalds 12740e2794b0SRalf Baechleconfig FW_ARC64 12751da177e4SLinus Torvalds bool 12761da177e4SLinus Torvalds 12771da177e4SLinus Torvaldsconfig BOOT_ELF64 12781da177e4SLinus Torvalds bool 12791da177e4SLinus Torvalds 12801da177e4SLinus Torvaldsmenu "CPU selection" 12811da177e4SLinus Torvalds 12821da177e4SLinus Torvaldschoice 12831da177e4SLinus Torvalds prompt "CPU type" 12841da177e4SLinus Torvalds default CPU_R4X00 12851da177e4SLinus Torvalds 12860e476d91SHuacai Chenconfig CPU_LOONGSON3 12870e476d91SHuacai Chen bool "Loongson 3 CPU" 12880e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 12890e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 12900e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 12910e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 12920e476d91SHuacai Chen select WEAK_ORDERING 12930e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 1294cbfb3ea7SHuacai Chen select ARCH_REQUIRE_GPIOLIB 12950e476d91SHuacai Chen help 12960e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 12970e476d91SHuacai Chen set with many extensions. 12980e476d91SHuacai Chen 12993702bba5SWu Zhangjinconfig CPU_LOONGSON2E 13003702bba5SWu Zhangjin bool "Loongson 2E" 13013702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 13023702bba5SWu Zhangjin select CPU_LOONGSON2 13032a21c730SFuxin Zhang help 13042a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 13052a21c730SFuxin Zhang with many extensions. 13062a21c730SFuxin Zhang 130725985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 13086f7a251aSWu Zhangjin bonito64. 13096f7a251aSWu Zhangjin 13106f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 13116f7a251aSWu Zhangjin bool "Loongson 2F" 13126f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 13136f7a251aSWu Zhangjin select CPU_LOONGSON2 1314c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 13156f7a251aSWu Zhangjin help 13166f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 13176f7a251aSWu Zhangjin with many extensions. 13186f7a251aSWu Zhangjin 13196f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 13206f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 13216f7a251aSWu Zhangjin Loongson2E. 13226f7a251aSWu Zhangjin 1323ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1324ca585cf9SKelvin Cheung bool "Loongson 1B" 1325ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1326ca585cf9SKelvin Cheung select CPU_LOONGSON1 1327ca585cf9SKelvin Cheung help 1328ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1329ca585cf9SKelvin Cheung release 2 instruction set. 1330ca585cf9SKelvin Cheung 13316e760c8dSRalf Baechleconfig CPU_MIPS32_R1 13326e760c8dSRalf Baechle bool "MIPS32 Release 1" 13337cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 13346e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1335797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1336ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13376e760c8dSRalf Baechle help 13385e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 13391e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 13401e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 13411e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 13421e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 13431e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 13441e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 13451e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 13461e5f1caaSRalf Baechle performance. 13471e5f1caaSRalf Baechle 13481e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 13491e5f1caaSRalf Baechle bool "MIPS32 Release 2" 13507cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 13511e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1352797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1353ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1354a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 13552235a54dSSanjay Lal select HAVE_KVM 13561e5f1caaSRalf Baechle help 13575e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 13586e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 13596e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 13606e760c8dSRalf Baechle specific type of processor in your system, choose those that one 13616e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 13621da177e4SLinus Torvalds 13637fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 13647fd08ca5SLeonid Yegoshin bool "MIPS32 Release 6 (EXPERIMENTAL)" 13657fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 13667fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 13677fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 13687fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 13697fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 13704e0748f5SMarkos Chandras select GENERIC_CSUM 13717fd08ca5SLeonid Yegoshin select HAVE_KVM 13727fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 13737fd08ca5SLeonid Yegoshin help 13747fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 13757fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 13767fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 13777fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 13787fd08ca5SLeonid Yegoshin 13796e760c8dSRalf Baechleconfig CPU_MIPS64_R1 13806e760c8dSRalf Baechle bool "MIPS64 Release 1" 13817cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1382797798c1SRalf Baechle select CPU_HAS_PREFETCH 1383ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1384ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1385ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13869cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 13876e760c8dSRalf Baechle help 13886e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 13896e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 13906e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 13916e760c8dSRalf Baechle specific type of processor in your system, choose those that one 13926e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 13931e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 13941e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 13951e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 13961e5f1caaSRalf Baechle performance. 13971e5f1caaSRalf Baechle 13981e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 13991e5f1caaSRalf Baechle bool "MIPS64 Release 2" 14007cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1401797798c1SRalf Baechle select CPU_HAS_PREFETCH 14021e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 14031e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1404ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14059cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1406a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14071e5f1caaSRalf Baechle help 14081e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 14091e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 14101e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 14111e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14121e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 14131da177e4SLinus Torvalds 14147fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 14157fd08ca5SLeonid Yegoshin bool "MIPS64 Release 6 (EXPERIMENTAL)" 14167fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 14177fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14187fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14197fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 14207fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14217fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14224e0748f5SMarkos Chandras select GENERIC_CSUM 14237fd08ca5SLeonid Yegoshin help 14247fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14257fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 14267fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 14277fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 14287fd08ca5SLeonid Yegoshin 14291da177e4SLinus Torvaldsconfig CPU_R3000 14301da177e4SLinus Torvalds bool "R3000" 14317cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1432f7062ddbSRalf Baechle select CPU_HAS_WB 1433ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1434797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14351da177e4SLinus Torvalds help 14361da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 14371da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 14381da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 14391da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 14401da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 14411da177e4SLinus Torvalds try to recompile with R3000. 14421da177e4SLinus Torvalds 14431da177e4SLinus Torvaldsconfig CPU_TX39XX 14441da177e4SLinus Torvalds bool "R39XX" 14457cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1446ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 14471da177e4SLinus Torvalds 14481da177e4SLinus Torvaldsconfig CPU_VR41XX 14491da177e4SLinus Torvalds bool "R41xx" 14507cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1451ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1452ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 14531da177e4SLinus Torvalds help 14545e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 14551da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 14561da177e4SLinus Torvalds kernel built with this option will not run on any other type of 14571da177e4SLinus Torvalds processor or vice versa. 14581da177e4SLinus Torvalds 14591da177e4SLinus Torvaldsconfig CPU_R4300 14601da177e4SLinus Torvalds bool "R4300" 14617cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1462ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1463ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 14641da177e4SLinus Torvalds help 14651da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 14661da177e4SLinus Torvalds 14671da177e4SLinus Torvaldsconfig CPU_R4X00 14681da177e4SLinus Torvalds bool "R4x00" 14697cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1470ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1471ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1472970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14731da177e4SLinus Torvalds help 14741da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 14751da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 14761da177e4SLinus Torvalds 14771da177e4SLinus Torvaldsconfig CPU_TX49XX 14781da177e4SLinus Torvalds bool "R49XX" 14797cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1480de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1481ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1482ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1483970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14841da177e4SLinus Torvalds 14851da177e4SLinus Torvaldsconfig CPU_R5000 14861da177e4SLinus Torvalds bool "R5000" 14877cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1488ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1489ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1490970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14911da177e4SLinus Torvalds help 14921da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 14931da177e4SLinus Torvalds 14941da177e4SLinus Torvaldsconfig CPU_R5432 14951da177e4SLinus Torvalds bool "R5432" 14967cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 14975e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 14985e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1499970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15001da177e4SLinus Torvalds 1501542c1020SShinya Kuribayashiconfig CPU_R5500 1502542c1020SShinya Kuribayashi bool "R5500" 1503542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1504542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1505542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 15069cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1507542c1020SShinya Kuribayashi help 1508542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1509542c1020SShinya Kuribayashi instruction set. 1510542c1020SShinya Kuribayashi 15111da177e4SLinus Torvaldsconfig CPU_R6000 15121da177e4SLinus Torvalds bool "R6000" 15137cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1514ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15151da177e4SLinus Torvalds help 15161da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1517c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 15181da177e4SLinus Torvalds 15191da177e4SLinus Torvaldsconfig CPU_NEVADA 15201da177e4SLinus Torvalds bool "RM52xx" 15217cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1522ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1523ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1524970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15251da177e4SLinus Torvalds help 15261da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 15271da177e4SLinus Torvalds 15281da177e4SLinus Torvaldsconfig CPU_R8000 15291da177e4SLinus Torvalds bool "R8000" 15307cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 15315e83d430SRalf Baechle select CPU_HAS_PREFETCH 1532ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15331da177e4SLinus Torvalds help 15341da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 15351da177e4SLinus Torvalds uncommon and the support for them is incomplete. 15361da177e4SLinus Torvalds 15371da177e4SLinus Torvaldsconfig CPU_R10000 15381da177e4SLinus Torvalds bool "R10000" 15397cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 15405e83d430SRalf Baechle select CPU_HAS_PREFETCH 1541ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1542ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1543797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1544970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15451da177e4SLinus Torvalds help 15461da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 15471da177e4SLinus Torvalds 15481da177e4SLinus Torvaldsconfig CPU_RM7000 15491da177e4SLinus Torvalds bool "RM7000" 15507cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 15515e83d430SRalf Baechle select CPU_HAS_PREFETCH 1552ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1553ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1554797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1555970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15561da177e4SLinus Torvalds 15571da177e4SLinus Torvaldsconfig CPU_SB1 15581da177e4SLinus Torvalds bool "SB1" 15597cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1560ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1561ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1562797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1563970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15640004a9dfSRalf Baechle select WEAK_ORDERING 15651da177e4SLinus Torvalds 1566a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1567a86c7f72SDavid Daney bool "Cavium Octeon processor" 15685e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1569a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1570a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1571a86c7f72SDavid Daney select WEAK_ORDERING 1572a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 15739cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 15749296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 1575930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1576a86c7f72SDavid Daney help 1577a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1578a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1579a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1580a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1581a86c7f72SDavid Daney 1582cd746249SJonas Gorskiconfig CPU_BMIPS 1583cd746249SJonas Gorski bool "Broadcom BMIPS" 1584cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1585cd746249SJonas Gorski select CPU_MIPS32 1586fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1587cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1588cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1589cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1590cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1591cd746249SJonas Gorski select DMA_NONCOHERENT 159267e38cf2SRalf Baechle select IRQ_MIPS_CPU 1593cd746249SJonas Gorski select SWAP_IO_SPACE 1594cd746249SJonas Gorski select WEAK_ORDERING 1595c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 159669aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1597c1c0c461SKevin Cernekee help 1598fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1599c1c0c461SKevin Cernekee 16007f058e85SJayachandran Cconfig CPU_XLR 16017f058e85SJayachandran C bool "Netlogic XLR SoC" 16027f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 16037f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 16047f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 16057f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1606970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16077f058e85SJayachandran C select WEAK_ORDERING 16087f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 16097f058e85SJayachandran C help 16107f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 16111c773ea4SJayachandran C 16121c773ea4SJayachandran Cconfig CPU_XLP 16131c773ea4SJayachandran C bool "Netlogic XLP SoC" 16141c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 16151c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 16161c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 16171c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 16181c773ea4SJayachandran C select WEAK_ORDERING 16191c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 16201c773ea4SJayachandran C select CPU_HAS_PREFETCH 1621d6504846SJayachandran C select CPU_MIPSR2 1622ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 16231c773ea4SJayachandran C help 16241c773ea4SJayachandran C Netlogic Microsystems XLP processors. 16251da177e4SLinus Torvaldsendchoice 16261da177e4SLinus Torvalds 1627a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1628a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1629a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 16307fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1631a6e18781SLeonid Yegoshin help 1632a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1633a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1634a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1635a6e18781SLeonid Yegoshin 1636a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1637a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1638a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1639a6e18781SLeonid Yegoshin select EVA 1640a6e18781SLeonid Yegoshin default y 1641a6e18781SLeonid Yegoshin help 1642a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1643a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1644a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1645a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1646a6e18781SLeonid Yegoshin 1647c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1648c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1649c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1650c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1651c5b36783SSteven J. Hill help 1652c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1653c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1654c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1655c5b36783SSteven J. Hill 1656c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1657c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1658c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1659c5b36783SSteven J. Hill depends on !EVA 1660c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1661c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1662c5b36783SSteven J. Hill select XPA 1663c5b36783SSteven J. Hill select HIGHMEM 1664c5b36783SSteven J. Hill select ARCH_PHYS_ADDR_T_64BIT 1665c5b36783SSteven J. Hill default n 1666c5b36783SSteven J. Hill help 1667c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1668c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1669c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1670c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1671c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1672c5b36783SSteven J. Hill If unsure, say 'N' here. 1673c5b36783SSteven J. Hill 1674622844bfSWu Zhangjinif CPU_LOONGSON2F 1675622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1676622844bfSWu Zhangjin bool 1677622844bfSWu Zhangjin 1678622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1679622844bfSWu Zhangjin bool 1680622844bfSWu Zhangjin 1681622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1682622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1683622844bfSWu Zhangjin default y 1684622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1685622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1686622844bfSWu Zhangjin help 1687622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1688622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1689622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1690622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1691622844bfSWu Zhangjin 1692622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1693622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1694622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1695622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1696622844bfSWu Zhangjin systems. 1697622844bfSWu Zhangjin 1698622844bfSWu Zhangjin If unsure, please say Y. 1699622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1700622844bfSWu Zhangjin 17011b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 17021b93b3c3SWu Zhangjin bool 17031b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 17041b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 170531c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 17061b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1707fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 17084e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 17091b93b3c3SWu Zhangjin 17101b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 17111b93b3c3SWu Zhangjin bool 17121b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 17131b93b3c3SWu Zhangjin 17143702bba5SWu Zhangjinconfig CPU_LOONGSON2 17153702bba5SWu Zhangjin bool 17163702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 17173702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 17183702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1719970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17203702bba5SWu Zhangjin 1721ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1722ca585cf9SKelvin Cheung bool 1723ca585cf9SKelvin Cheung select CPU_MIPS32 1724ca585cf9SKelvin Cheung select CPU_MIPSR2 1725ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1726ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1727ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1728f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1729ca585cf9SKelvin Cheung 1730fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 173104fa8bf7SJonas Gorski select SMP_UP if SMP 17321bbb6c1bSKevin Cernekee bool 1733cd746249SJonas Gorski 1734cd746249SJonas Gorskiconfig CPU_BMIPS4350 1735cd746249SJonas Gorski bool 1736cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1737cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1738cd746249SJonas Gorski 1739cd746249SJonas Gorskiconfig CPU_BMIPS4380 1740cd746249SJonas Gorski bool 1741bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1742cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1743cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1744cd746249SJonas Gorski 1745cd746249SJonas Gorskiconfig CPU_BMIPS5000 1746cd746249SJonas Gorski bool 1747cd746249SJonas Gorski select MIPS_CPU_SCACHE 1748bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1749cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1750cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 17511bbb6c1bSKevin Cernekee 17520e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 17530e476d91SHuacai Chen bool 17540e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 17550e476d91SHuacai Chen 17563702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 17572a21c730SFuxin Zhang bool 17582a21c730SFuxin Zhang 17596f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 17606f7a251aSWu Zhangjin bool 176155045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 176255045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 176322f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 17646f7a251aSWu Zhangjin 1765ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1766ca585cf9SKelvin Cheung bool 1767ca585cf9SKelvin Cheung 17687cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 17697cf8053bSRalf Baechle bool 17707cf8053bSRalf Baechle 17717cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 17727cf8053bSRalf Baechle bool 17737cf8053bSRalf Baechle 1774a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1775a6e18781SLeonid Yegoshin bool 1776a6e18781SLeonid Yegoshin 1777c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1778c5b36783SSteven J. Hill bool 1779c5b36783SSteven J. Hill 17807fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 17817fd08ca5SLeonid Yegoshin bool 17827fd08ca5SLeonid Yegoshin 17837cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 17847cf8053bSRalf Baechle bool 17857cf8053bSRalf Baechle 17867cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 17877cf8053bSRalf Baechle bool 17887cf8053bSRalf Baechle 17897fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 17907fd08ca5SLeonid Yegoshin bool 17917fd08ca5SLeonid Yegoshin 17927cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 17937cf8053bSRalf Baechle bool 17947cf8053bSRalf Baechle 17957cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 17967cf8053bSRalf Baechle bool 17977cf8053bSRalf Baechle 17987cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 17997cf8053bSRalf Baechle bool 18007cf8053bSRalf Baechle 18017cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 18027cf8053bSRalf Baechle bool 18037cf8053bSRalf Baechle 18047cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 18057cf8053bSRalf Baechle bool 18067cf8053bSRalf Baechle 18077cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 18087cf8053bSRalf Baechle bool 18097cf8053bSRalf Baechle 18107cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 18117cf8053bSRalf Baechle bool 18127cf8053bSRalf Baechle 18137cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 18147cf8053bSRalf Baechle bool 18157cf8053bSRalf Baechle 1816542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1817542c1020SShinya Kuribayashi bool 1818542c1020SShinya Kuribayashi 18197cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 18207cf8053bSRalf Baechle bool 18217cf8053bSRalf Baechle 18227cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 18237cf8053bSRalf Baechle bool 18247cf8053bSRalf Baechle 18257cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 18267cf8053bSRalf Baechle bool 18277cf8053bSRalf Baechle 18287cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 18297cf8053bSRalf Baechle bool 18307cf8053bSRalf Baechle 18317cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 18327cf8053bSRalf Baechle bool 18337cf8053bSRalf Baechle 18347cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 18357cf8053bSRalf Baechle bool 18367cf8053bSRalf Baechle 18375e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 18385e683389SDavid Daney bool 18395e683389SDavid Daney 1840cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1841c1c0c461SKevin Cernekee bool 1842c1c0c461SKevin Cernekee 1843fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1844c1c0c461SKevin Cernekee bool 1845cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1846c1c0c461SKevin Cernekee 1847c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1848c1c0c461SKevin Cernekee bool 1849cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1850c1c0c461SKevin Cernekee 1851c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1852c1c0c461SKevin Cernekee bool 1853cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1854c1c0c461SKevin Cernekee 1855c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1856c1c0c461SKevin Cernekee bool 1857cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1858c1c0c461SKevin Cernekee 18597f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 18607f058e85SJayachandran C bool 18617f058e85SJayachandran C 18621c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 18631c773ea4SJayachandran C bool 18641c773ea4SJayachandran C 1865b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 1866b6911bbaSPaul Burton depends on MIPS_MALTA 1867b6911bbaSPaul Burton depends on PCI 1868b6911bbaSPaul Burton bool 1869b6911bbaSPaul Burton default y 1870b6911bbaSPaul Burton 187117099b11SRalf Baechle# 187217099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 187317099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 187417099b11SRalf Baechle# 18750004a9dfSRalf Baechleconfig WEAK_ORDERING 18760004a9dfSRalf Baechle bool 187717099b11SRalf Baechle 187817099b11SRalf Baechle# 187917099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 188017099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 188117099b11SRalf Baechle# 188217099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 188317099b11SRalf Baechle bool 18845e83d430SRalf Baechleendmenu 18855e83d430SRalf Baechle 18865e83d430SRalf Baechle# 18875e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 18885e83d430SRalf Baechle# 18895e83d430SRalf Baechleconfig CPU_MIPS32 18905e83d430SRalf Baechle bool 18917fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 18925e83d430SRalf Baechle 18935e83d430SRalf Baechleconfig CPU_MIPS64 18945e83d430SRalf Baechle bool 18957fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 18965e83d430SRalf Baechle 18975e83d430SRalf Baechle# 1898c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 18995e83d430SRalf Baechle# 19005e83d430SRalf Baechleconfig CPU_MIPSR1 19015e83d430SRalf Baechle bool 19025e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 19035e83d430SRalf Baechle 19045e83d430SRalf Baechleconfig CPU_MIPSR2 19055e83d430SRalf Baechle bool 1906a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 1907a7e07b1aSMarkos Chandras select MIPS_SPRAM 19085e83d430SRalf Baechle 19097fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 19107fd08ca5SLeonid Yegoshin bool 19117fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 1912a7e07b1aSMarkos Chandras select MIPS_SPRAM 19135e83d430SRalf Baechle 1914a6e18781SLeonid Yegoshinconfig EVA 1915a6e18781SLeonid Yegoshin bool 1916a6e18781SLeonid Yegoshin 1917c5b36783SSteven J. Hillconfig XPA 1918c5b36783SSteven J. Hill bool 1919c5b36783SSteven J. Hill 19205e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 19215e83d430SRalf Baechle bool 19225e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 19235e83d430SRalf Baechle bool 19245e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 19255e83d430SRalf Baechle bool 19265e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 19275e83d430SRalf Baechle bool 192855045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 192955045ff5SWu Zhangjin bool 193055045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 193155045ff5SWu Zhangjin bool 19329cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 19339cffd154SDavid Daney bool 193422f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 193522f1fdfdSWu Zhangjin bool 193682622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 193782622284SDavid Daney bool 1938d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 19395e83d430SRalf Baechle 19408192c9eaSDavid Daney# 19418192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 19428192c9eaSDavid Daney# 19438192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 19448192c9eaSDavid Daney bool 1945f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 19468192c9eaSDavid Daney 19475e83d430SRalf Baechlemenu "Kernel type" 19485e83d430SRalf Baechle 19495e83d430SRalf Baechlechoice 19505e83d430SRalf Baechle prompt "Kernel code model" 19515e83d430SRalf Baechle help 19525e83d430SRalf Baechle You should only select this option if you have a workload that 19535e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 19545e83d430SRalf Baechle large memory. You will only be presented a single option in this 19555e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 19565e83d430SRalf Baechle 19575e83d430SRalf Baechleconfig 32BIT 19585e83d430SRalf Baechle bool "32-bit kernel" 19595e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 19605e83d430SRalf Baechle select TRAD_SIGNALS 19615e83d430SRalf Baechle help 19625e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 19635e83d430SRalf Baechleconfig 64BIT 19645e83d430SRalf Baechle bool "64-bit kernel" 19655e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 19665e83d430SRalf Baechle help 19675e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 19685e83d430SRalf Baechle 19695e83d430SRalf Baechleendchoice 19705e83d430SRalf Baechle 19712235a54dSSanjay Lalconfig KVM_GUEST 19722235a54dSSanjay Lal bool "KVM Guest Kernel" 1973f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 19742235a54dSSanjay Lal help 19752235a54dSSanjay Lal Select this option if building a guest kernel for KVM (Trap & Emulate) mode 19762235a54dSSanjay Lal 1977eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 1978eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 19792235a54dSSanjay Lal depends on KVM_GUEST 1980eda3d33cSJames Hogan default 100 19812235a54dSSanjay Lal help 1982eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 1983eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 1984eda3d33cSJames Hogan timer frequency is specified directly. 19852235a54dSSanjay Lal 19861da177e4SLinus Torvaldschoice 19871da177e4SLinus Torvalds prompt "Kernel page size" 19881da177e4SLinus Torvalds default PAGE_SIZE_4KB 19891da177e4SLinus Torvalds 19901da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 19911da177e4SLinus Torvalds bool "4kB" 19920e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 19931da177e4SLinus Torvalds help 19941da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 19951da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 19961da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 19971da177e4SLinus Torvalds recommended for low memory systems. 19981da177e4SLinus Torvalds 19991da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 20001da177e4SLinus Torvalds bool "8kB" 20017d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 20021da177e4SLinus Torvalds help 20031da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 20041da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2005c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 2006c52399beSRalf Baechle suitable Linux distribution to support this. 20071da177e4SLinus Torvalds 20081da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 20091da177e4SLinus Torvalds bool "16kB" 2010714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 20111da177e4SLinus Torvalds help 20121da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 20131da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2014714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2015714bfad6SRalf Baechle Linux distribution to support this. 20161da177e4SLinus Torvalds 2017c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2018c52399beSRalf Baechle bool "32kB" 2019c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 2020c52399beSRalf Baechle help 2021c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2022c52399beSRalf Baechle the price of higher memory consumption. This option is available 2023c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2024c52399beSRalf Baechle distribution to support this. 2025c52399beSRalf Baechle 20261da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 20271da177e4SLinus Torvalds bool "64kB" 20287d60717eSKees Cook depends on !CPU_R3000 && !CPU_TX39XX 20291da177e4SLinus Torvalds help 20301da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 20311da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 20321da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2033714bfad6SRalf Baechle writing this option is still high experimental. 20341da177e4SLinus Torvalds 20351da177e4SLinus Torvaldsendchoice 20361da177e4SLinus Torvalds 2037c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2038c9bace7cSDavid Daney int "Maximum zone order" 2039e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2040e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2041e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2042e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2043e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2044e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2045c9bace7cSDavid Daney range 11 64 2046c9bace7cSDavid Daney default "11" 2047c9bace7cSDavid Daney help 2048c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2049c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2050c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2051c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2052c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2053c9bace7cSDavid Daney increase this value. 2054c9bace7cSDavid Daney 2055c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2056c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2057c9bace7cSDavid Daney 2058c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2059c9bace7cSDavid Daney when choosing a value for this option. 2060c9bace7cSDavid Daney 20611da177e4SLinus Torvaldsconfig BOARD_SCACHE 20621da177e4SLinus Torvalds bool 20631da177e4SLinus Torvalds 20641da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 20651da177e4SLinus Torvalds bool 20661da177e4SLinus Torvalds select BOARD_SCACHE 20671da177e4SLinus Torvalds 20689318c51aSChris Dearman# 20699318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 20709318c51aSChris Dearman# 20719318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 20729318c51aSChris Dearman bool 20739318c51aSChris Dearman select BOARD_SCACHE 20749318c51aSChris Dearman 20751da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 20761da177e4SLinus Torvalds bool 20771da177e4SLinus Torvalds select BOARD_SCACHE 20781da177e4SLinus Torvalds 20791da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 20801da177e4SLinus Torvalds bool 20811da177e4SLinus Torvalds select BOARD_SCACHE 20821da177e4SLinus Torvalds 20831da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 20841da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 20851da177e4SLinus Torvalds depends on CPU_SB1 20861da177e4SLinus Torvalds help 20871da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 20881da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 20891da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 20901da177e4SLinus Torvalds 20911da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2092c8094b53SRalf Baechle bool 20931da177e4SLinus Torvalds 20943165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 20953165c846SFlorian Fainelli bool 20963165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 20973165c846SFlorian Fainelli 209891405eb6SFlorian Fainelliconfig CPU_R4K_FPU 209991405eb6SFlorian Fainelli bool 210091405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 210191405eb6SFlorian Fainelli 210262cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 210362cedc4fSFlorian Fainelli bool 210462cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 210562cedc4fSFlorian Fainelli 210659d6ab86SRalf Baechleconfig MIPS_MT_SMP 2107a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 210859d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 210959d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2110d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2111c080faa5SSteven J. Hill select SYNC_R4K 21120c2cb004SPaul Burton select MIPS_GIC_IPI 211359d6ab86SRalf Baechle select MIPS_MT 211459d6ab86SRalf Baechle select SMP 211587353d8aSRalf Baechle select SMP_UP 2116c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2117c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2118399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 211959d6ab86SRalf Baechle help 2120c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2121c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2122c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2123c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2124c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 212559d6ab86SRalf Baechle 2126f41ae0b2SRalf Baechleconfig MIPS_MT 2127f41ae0b2SRalf Baechle bool 2128f41ae0b2SRalf Baechle 21290ab7aefcSRalf Baechleconfig SCHED_SMT 21300ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 21310ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 21320ab7aefcSRalf Baechle default n 21330ab7aefcSRalf Baechle help 21340ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 21350ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 21360ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 21370ab7aefcSRalf Baechle 21380ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 21390ab7aefcSRalf Baechle bool 21400ab7aefcSRalf Baechle 2141f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2142f41ae0b2SRalf Baechle bool 2143f41ae0b2SRalf Baechle 2144f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2145f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2146f088fc84SRalf Baechle default y 2147b633648cSRalf Baechle depends on MIPS_MT_SMP 214807cc0c9eSRalf Baechle 2149b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2150b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 2151b0a668fbSLeonid Yegoshin depends on CPU_MIPSR6 && !SMP 2152b0a668fbSLeonid Yegoshin default y 2153b0a668fbSLeonid Yegoshin help 2154b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2155b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 215607edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2157b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2158b0a668fbSLeonid Yegoshin final kernel image. 2159b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels" 2160b0a668fbSLeonid Yegoshin depends on SMP && CPU_MIPSR6 2161b0a668fbSLeonid Yegoshin 216207cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 216307cc0c9eSRalf Baechle bool "VPE loader support." 2164704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 216507cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 216607cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 216707cc0c9eSRalf Baechle select MIPS_MT 216807cc0c9eSRalf Baechle help 216907cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 217007cc0c9eSRalf Baechle onto another VPE and running it. 2171f088fc84SRalf Baechle 217217a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 217317a1d523SDeng-Cheng Zhu bool 217417a1d523SDeng-Cheng Zhu default "y" 217517a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 217617a1d523SDeng-Cheng Zhu 21771a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 21781a2a6d7eSDeng-Cheng Zhu bool 21791a2a6d7eSDeng-Cheng Zhu default "y" 21801a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 21811a2a6d7eSDeng-Cheng Zhu 2182e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2183e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2184e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2185e01402b1SRalf Baechle default y 2186e01402b1SRalf Baechle help 2187e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2188e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2189e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2190e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2191e01402b1SRalf Baechle 2192e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2193e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2194e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 21955e83d430SRalf Baechle help 2196e01402b1SRalf Baechle 2197da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2198da615cf6SDeng-Cheng Zhu bool 2199da615cf6SDeng-Cheng Zhu default "y" 2200da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2201da615cf6SDeng-Cheng Zhu 22022c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 22032c973ef0SDeng-Cheng Zhu bool 22042c973ef0SDeng-Cheng Zhu default "y" 22052c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 22062c973ef0SDeng-Cheng Zhu 22074a16ff4cSRalf Baechleconfig MIPS_CMP 22085cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 2209b633648cSRalf Baechle depends on SYS_SUPPORTS_MIPS_CMP 221072e20142SPaul Burton select MIPS_GIC_IPI 2211b10b43baSMarkos Chandras select SMP 2212eb9b5141STim Anderson select SYNC_R4K 2213b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 22144a16ff4cSRalf Baechle select WEAK_ORDERING 22154a16ff4cSRalf Baechle default n 22164a16ff4cSRalf Baechle help 2217044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2218044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2219044505c7SPaul Burton its ability to start secondary CPUs. 22204a16ff4cSRalf Baechle 22215cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 22225cac93b3SPaul Burton instead of this. 22235cac93b3SPaul Burton 22240ee958e1SPaul Burtonconfig MIPS_CPS 22250ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 22266ca716f2SMarkos Chandras depends on SYS_SUPPORTS_MIPS_CPS && !64BIT 22270ee958e1SPaul Burton select MIPS_CM 22280ee958e1SPaul Burton select MIPS_CPC 22291d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 22300ee958e1SPaul Burton select MIPS_GIC_IPI 22310ee958e1SPaul Burton select SMP 22320ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 22331d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 22340ee958e1SPaul Burton select SYS_SUPPORTS_SMP 22350ee958e1SPaul Burton select WEAK_ORDERING 22360ee958e1SPaul Burton help 22370ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 22380ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 22390ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 22400ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 22410ee958e1SPaul Burton support is unavailable. 22420ee958e1SPaul Burton 22433179d37eSPaul Burtonconfig MIPS_CPS_PM 224439a59593SMarkos Chandras depends on MIPS_CPS 2245a8b84677SPaul Burton select MIPS_CPC 22463179d37eSPaul Burton bool 22473179d37eSPaul Burton 224872e20142SPaul Burtonconfig MIPS_GIC_IPI 224972e20142SPaul Burton bool 225072e20142SPaul Burton 22519f98f3ddSPaul Burtonconfig MIPS_CM 22529f98f3ddSPaul Burton bool 22539f98f3ddSPaul Burton 22549c38cf44SPaul Burtonconfig MIPS_CPC 22559c38cf44SPaul Burton bool 22562600990eSRalf Baechle 22571da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 22581da177e4SLinus Torvalds bool 22591da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 22601da177e4SLinus Torvalds default y 22611da177e4SLinus Torvalds 22621da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 22631da177e4SLinus Torvalds bool 22641da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 22651da177e4SLinus Torvalds default y 22661da177e4SLinus Torvalds 22671da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 22681da177e4SLinus Torvalds bool 22691da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 22701da177e4SLinus Torvalds default y 22711da177e4SLinus Torvalds 22722235a54dSSanjay Lal 227360ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 227434adb28dSRalf Baechle bool 227560ec6571Spascal@pabr.org 22769e2b5372SMarkos Chandraschoice 22779e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 22789e2b5372SMarkos Chandras 22799e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 22809e2b5372SMarkos Chandras bool "None" 22819e2b5372SMarkos Chandras help 22829e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 22839e2b5372SMarkos Chandras 22849693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 22859693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 22869e2b5372SMarkos Chandras bool "SmartMIPS" 22879693a853SFranck Bui-Huu help 22889693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 22899693a853SFranck Bui-Huu increased security at both hardware and software level for 22909693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 22919693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 22929693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 22939693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 22949693a853SFranck Bui-Huu here. 22959693a853SFranck Bui-Huu 2296bce86083SSteven J. Hillconfig CPU_MICROMIPS 22977fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 22989e2b5372SMarkos Chandras bool "microMIPS" 2299bce86083SSteven J. Hill help 2300bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2301bce86083SSteven J. Hill microMIPS ISA 2302bce86083SSteven J. Hill 23039e2b5372SMarkos Chandrasendchoice 23049e2b5372SMarkos Chandras 2305a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 23064af94d5dSPaul Burton bool "Support for the MIPS SIMD Architecture (EXPERIMENTAL)" 2307a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 23082a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2309a5e9a69eSPaul Burton help 2310a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2311a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 23121db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 23131db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 23141db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 23151db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 23161db1af84SPaul Burton the size & complexity of your kernel. 2317a5e9a69eSPaul Burton 2318a5e9a69eSPaul Burton If unsure, say Y. 2319a5e9a69eSPaul Burton 23201da177e4SLinus Torvaldsconfig CPU_HAS_WB 2321f7062ddbSRalf Baechle bool 2322e01402b1SRalf Baechle 2323df0ac8a4SKevin Cernekeeconfig XKS01 2324df0ac8a4SKevin Cernekee bool 2325df0ac8a4SKevin Cernekee 2326f41ae0b2SRalf Baechle# 2327f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2328f41ae0b2SRalf Baechle# 2329e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2330f41ae0b2SRalf Baechle bool 2331e01402b1SRalf Baechle 2332f41ae0b2SRalf Baechle# 2333f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2334f41ae0b2SRalf Baechle# 2335e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2336f41ae0b2SRalf Baechle bool 2337e01402b1SRalf Baechle 23381da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 23391da177e4SLinus Torvalds bool 23401da177e4SLinus Torvalds depends on !CPU_R3000 23411da177e4SLinus Torvalds default y 23421da177e4SLinus Torvalds 23431da177e4SLinus Torvalds# 234420d60d99SMaciej W. Rozycki# CPU non-features 234520d60d99SMaciej W. Rozycki# 234620d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 234720d60d99SMaciej W. Rozycki bool 234820d60d99SMaciej W. Rozycki 234920d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 235020d60d99SMaciej W. Rozycki bool 235120d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 235220d60d99SMaciej W. Rozycki 235320d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 235420d60d99SMaciej W. Rozycki bool 235520d60d99SMaciej W. Rozycki 235620d60d99SMaciej W. Rozycki# 23571da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 23581da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 23591da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 23601da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 23611da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 23621da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 23631da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 23641da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2365797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2366797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2367797798c1SRalf Baechle# support. 23681da177e4SLinus Torvalds# 23691da177e4SLinus Torvaldsconfig HIGHMEM 23701da177e4SLinus Torvalds bool "High Memory Support" 2371a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2372797798c1SRalf Baechle 2373797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2374797798c1SRalf Baechle bool 2375797798c1SRalf Baechle 2376797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2377797798c1SRalf Baechle bool 23781da177e4SLinus Torvalds 23799693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 23809693a853SFranck Bui-Huu bool 23819693a853SFranck Bui-Huu 2382a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2383a6a4834cSSteven J. Hill bool 2384a6a4834cSSteven J. Hill 2385377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2386377cb1b6SRalf Baechle bool 2387377cb1b6SRalf Baechle help 2388377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2389377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2390377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2391377cb1b6SRalf Baechle 2392a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2393a5e9a69eSPaul Burton bool 2394a5e9a69eSPaul Burton 2395b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2396b4819b59SYoichi Yuasa def_bool y 2397f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2398b4819b59SYoichi Yuasa 2399d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2400d8cb4e11SRalf Baechle bool 2401d8cb4e11SRalf Baechle default y if SGI_IP27 2402d8cb4e11SRalf Baechle help 24033dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2404d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2405d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2406d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2407d8cb4e11SRalf Baechle 2408b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2409b1c6cd42SAtsushi Nemoto bool 24107de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 241131473747SAtsushi Nemoto 2412d8cb4e11SRalf Baechleconfig NUMA 2413d8cb4e11SRalf Baechle bool "NUMA Support" 2414d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2415d8cb4e11SRalf Baechle help 2416d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2417d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2418d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2419d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2420d8cb4e11SRalf Baechle disabled. 2421d8cb4e11SRalf Baechle 2422d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2423d8cb4e11SRalf Baechle bool 2424d8cb4e11SRalf Baechle 2425c80d79d7SYasunori Gotoconfig NODES_SHIFT 2426c80d79d7SYasunori Goto int 2427c80d79d7SYasunori Goto default "6" 2428c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2429c80d79d7SYasunori Goto 243014f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 243114f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 2432f14ceff7SHuacai Chen depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) 243314f70012SDeng-Cheng Zhu default y 243414f70012SDeng-Cheng Zhu help 243514f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 243614f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 243714f70012SDeng-Cheng Zhu 2438b4819b59SYoichi Yuasasource "mm/Kconfig" 2439b4819b59SYoichi Yuasa 24401da177e4SLinus Torvaldsconfig SMP 24411da177e4SLinus Torvalds bool "Multi-Processing support" 2442e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2443e73ea273SRalf Baechle help 24441da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 24454a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 24464a474157SRobert Graffham than one CPU, say Y. 24471da177e4SLinus Torvalds 24484a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 24491da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 24501da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 24514a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 24521da177e4SLinus Torvalds will run faster if you say N here. 24531da177e4SLinus Torvalds 24541da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 24551da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 24561da177e4SLinus Torvalds 245703502faaSAdrian Bunk See also the SMP-HOWTO available at 245803502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 24591da177e4SLinus Torvalds 24601da177e4SLinus Torvalds If you don't know what to do here, say N. 24611da177e4SLinus Torvalds 246287353d8aSRalf Baechleconfig SMP_UP 246387353d8aSRalf Baechle bool 246487353d8aSRalf Baechle 24654a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 24664a16ff4cSRalf Baechle bool 24674a16ff4cSRalf Baechle 24680ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 24690ee958e1SPaul Burton bool 24700ee958e1SPaul Burton 2471e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2472e73ea273SRalf Baechle bool 2473e73ea273SRalf Baechle 2474130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2475130e2fb7SRalf Baechle bool 2476130e2fb7SRalf Baechle 2477130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2478130e2fb7SRalf Baechle bool 2479130e2fb7SRalf Baechle 2480130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2481130e2fb7SRalf Baechle bool 2482130e2fb7SRalf Baechle 2483130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2484130e2fb7SRalf Baechle bool 2485130e2fb7SRalf Baechle 2486130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2487130e2fb7SRalf Baechle bool 2488130e2fb7SRalf Baechle 24891da177e4SLinus Torvaldsconfig NR_CPUS 2490a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2491a91796a9SJayachandran C range 2 256 24921da177e4SLinus Torvalds depends on SMP 2493130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2494130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2495130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2496130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2497130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 24981da177e4SLinus Torvalds help 24991da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 25001da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 25011da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 250272ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 250372ede9b1SAtsushi Nemoto and 2 for all others. 25041da177e4SLinus Torvalds 25051da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 250672ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 250772ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 250872ede9b1SAtsushi Nemoto power of two. 25091da177e4SLinus Torvalds 2510399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2511399aaa25SAl Cooper bool 2512399aaa25SAl Cooper 25131723b4a3SAtsushi Nemoto# 25141723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 25151723b4a3SAtsushi Nemoto# 25161723b4a3SAtsushi Nemoto 25171723b4a3SAtsushi Nemotochoice 25181723b4a3SAtsushi Nemoto prompt "Timer frequency" 25191723b4a3SAtsushi Nemoto default HZ_250 25201723b4a3SAtsushi Nemoto help 25211723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 25221723b4a3SAtsushi Nemoto 25231723b4a3SAtsushi Nemoto config HZ_48 25240f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 25251723b4a3SAtsushi Nemoto 25261723b4a3SAtsushi Nemoto config HZ_100 25271723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 25281723b4a3SAtsushi Nemoto 25291723b4a3SAtsushi Nemoto config HZ_128 25301723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 25311723b4a3SAtsushi Nemoto 25321723b4a3SAtsushi Nemoto config HZ_250 25331723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 25341723b4a3SAtsushi Nemoto 25351723b4a3SAtsushi Nemoto config HZ_256 25361723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 25371723b4a3SAtsushi Nemoto 25381723b4a3SAtsushi Nemoto config HZ_1000 25391723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 25401723b4a3SAtsushi Nemoto 25411723b4a3SAtsushi Nemoto config HZ_1024 25421723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 25431723b4a3SAtsushi Nemoto 25441723b4a3SAtsushi Nemotoendchoice 25451723b4a3SAtsushi Nemoto 25461723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 25471723b4a3SAtsushi Nemoto bool 25481723b4a3SAtsushi Nemoto 25491723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 25501723b4a3SAtsushi Nemoto bool 25511723b4a3SAtsushi Nemoto 25521723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 25531723b4a3SAtsushi Nemoto bool 25541723b4a3SAtsushi Nemoto 25551723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 25561723b4a3SAtsushi Nemoto bool 25571723b4a3SAtsushi Nemoto 25581723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 25591723b4a3SAtsushi Nemoto bool 25601723b4a3SAtsushi Nemoto 25611723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 25621723b4a3SAtsushi Nemoto bool 25631723b4a3SAtsushi Nemoto 25641723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 25651723b4a3SAtsushi Nemoto bool 25661723b4a3SAtsushi Nemoto 25671723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 25681723b4a3SAtsushi Nemoto bool 25691723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 25701723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 25711723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 25721723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 25731723b4a3SAtsushi Nemoto 25741723b4a3SAtsushi Nemotoconfig HZ 25751723b4a3SAtsushi Nemoto int 25761723b4a3SAtsushi Nemoto default 48 if HZ_48 25771723b4a3SAtsushi Nemoto default 100 if HZ_100 25781723b4a3SAtsushi Nemoto default 128 if HZ_128 25791723b4a3SAtsushi Nemoto default 250 if HZ_250 25801723b4a3SAtsushi Nemoto default 256 if HZ_256 25811723b4a3SAtsushi Nemoto default 1000 if HZ_1000 25821723b4a3SAtsushi Nemoto default 1024 if HZ_1024 25831723b4a3SAtsushi Nemoto 258496685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 258596685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 258696685b17SDeng-Cheng Zhu 2587e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 25881da177e4SLinus Torvalds 2589ea6e942bSAtsushi Nemotoconfig KEXEC 25907d60717eSKees Cook bool "Kexec system call" 2591ea6e942bSAtsushi Nemoto help 2592ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2593ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 25943dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2595ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2596ea6e942bSAtsushi Nemoto 259701dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2598ea6e942bSAtsushi Nemoto 2599ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2600ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2601bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2602bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2603bf220695SGeert Uytterhoeven made. 2604ea6e942bSAtsushi Nemoto 26057aa1c8f4SRalf Baechleconfig CRASH_DUMP 26067aa1c8f4SRalf Baechle bool "Kernel crash dumps" 26077aa1c8f4SRalf Baechle help 26087aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 26097aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 26107aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 26117aa1c8f4SRalf Baechle a specially reserved region and then later executed after 26127aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 26137aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 26147aa1c8f4SRalf Baechle PHYSICAL_START. 26157aa1c8f4SRalf Baechle 26167aa1c8f4SRalf Baechleconfig PHYSICAL_START 26177aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 26187aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 26197aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 26207aa1c8f4SRalf Baechle depends on CRASH_DUMP 26217aa1c8f4SRalf Baechle help 26227aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 26237aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 26247aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 26257aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 26267aa1c8f4SRalf Baechle passed to the panic-ed kernel). 26277aa1c8f4SRalf Baechle 2628ea6e942bSAtsushi Nemotoconfig SECCOMP 2629ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2630293c5bd1SRalf Baechle depends on PROC_FS 2631ea6e942bSAtsushi Nemoto default y 2632ea6e942bSAtsushi Nemoto help 2633ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2634ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2635ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2636ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2637ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2638ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2639ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2640ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2641ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2642ea6e942bSAtsushi Nemoto 2643ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2644ea6e942bSAtsushi Nemoto 2645597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 264606e2e882SPaul Burton bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)" 2647597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2648597ce172SPaul Burton help 2649597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2650597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2651597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2652597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2653597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2654597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2655597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2656597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2657597ce172SPaul Burton saying N here. 2658597ce172SPaul Burton 265906e2e882SPaul Burton Although binutils currently supports use of this flag the details 266006e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 266106e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 266206e2e882SPaul Burton behaviour before the details have been finalised, this option should 266306e2e882SPaul Burton be considered experimental and only enabled by those working upon 266406e2e882SPaul Burton said details. 266506e2e882SPaul Burton 266606e2e882SPaul Burton If unsure, say N. 2667597ce172SPaul Burton 2668f2ffa5abSDezhong Diaoconfig USE_OF 26690b3e06fdSJonas Gorski bool 2670f2ffa5abSDezhong Diao select OF 2671e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2672abd2363fSGrant Likely select IRQ_DOMAIN 2673f2ffa5abSDezhong Diao 26747fafb068SAndrew Brestickerconfig BUILTIN_DTB 26757fafb068SAndrew Bresticker bool 26767fafb068SAndrew Bresticker 26775e83d430SRalf Baechleendmenu 26785e83d430SRalf Baechle 26791df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 26801df0f0ffSAtsushi Nemoto bool 26811df0f0ffSAtsushi Nemoto default y 26821df0f0ffSAtsushi Nemoto 26831df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 26841df0f0ffSAtsushi Nemoto bool 26851df0f0ffSAtsushi Nemoto default y 26861df0f0ffSAtsushi Nemoto 2687a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 2688a728ab52SKirill A. Shutemov int 2689a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 2690a728ab52SKirill A. Shutemov default 2 2691a728ab52SKirill A. Shutemov 2692b6c3539bSRalf Baechlesource "init/Kconfig" 2693b6c3539bSRalf Baechle 2694dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2695dc52ddc0SMatt Helsley 26961da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 26971da177e4SLinus Torvalds 26985e83d430SRalf Baechleconfig HW_HAS_EISA 26995e83d430SRalf Baechle bool 27001da177e4SLinus Torvaldsconfig HW_HAS_PCI 27011da177e4SLinus Torvalds bool 27021da177e4SLinus Torvalds 27031da177e4SLinus Torvaldsconfig PCI 27041da177e4SLinus Torvalds bool "Support for PCI controller" 27051da177e4SLinus Torvalds depends on HW_HAS_PCI 2706abb4ae46SRalf Baechle select PCI_DOMAINS 27070f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 27081da177e4SLinus Torvalds help 27091da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 27101da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 27111da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 27121da177e4SLinus Torvalds say Y, otherwise N. 27131da177e4SLinus Torvalds 27140e476d91SHuacai Chenconfig HT_PCI 27150e476d91SHuacai Chen bool "Support for HT-linked PCI" 27160e476d91SHuacai Chen default y 27170e476d91SHuacai Chen depends on CPU_LOONGSON3 27180e476d91SHuacai Chen select PCI 27190e476d91SHuacai Chen select PCI_DOMAINS 27200e476d91SHuacai Chen help 27210e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 27220e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 27230e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 27240e476d91SHuacai Chen 27251da177e4SLinus Torvaldsconfig PCI_DOMAINS 27261da177e4SLinus Torvalds bool 27271da177e4SLinus Torvalds 27281da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 27291da177e4SLinus Torvalds 27303f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 27313f787ca4SJonas Gorski 27321da177e4SLinus Torvalds# 27331da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 27341da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 27351da177e4SLinus Torvalds# users to choose the right thing ... 27361da177e4SLinus Torvalds# 27371da177e4SLinus Torvaldsconfig ISA 27381da177e4SLinus Torvalds bool 27391da177e4SLinus Torvalds 27401da177e4SLinus Torvaldsconfig EISA 27411da177e4SLinus Torvalds bool "EISA support" 27425e83d430SRalf Baechle depends on HW_HAS_EISA 27431da177e4SLinus Torvalds select ISA 2744aa414dffSRalf Baechle select GENERIC_ISA_DMA 27451da177e4SLinus Torvalds ---help--- 27461da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 27471da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 27481da177e4SLinus Torvalds 27491da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 27501da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 27511da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 27521da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 27531da177e4SLinus Torvalds 27541da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 27551da177e4SLinus Torvalds 27561da177e4SLinus Torvalds Otherwise, say N. 27571da177e4SLinus Torvalds 27581da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 27591da177e4SLinus Torvalds 27601da177e4SLinus Torvaldsconfig TC 27611da177e4SLinus Torvalds bool "TURBOchannel support" 27621da177e4SLinus Torvalds depends on MACH_DECSTATION 27631da177e4SLinus Torvalds help 276450a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 276550a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 276650a23e6eSJustin P. Mattock at: 276750a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 276850a23e6eSJustin P. Mattock and: 276950a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 277050a23e6eSJustin P. Mattock Linux driver support status is documented at: 277150a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 27721da177e4SLinus Torvalds 27731da177e4SLinus Torvaldsconfig MMU 27741da177e4SLinus Torvalds bool 27751da177e4SLinus Torvalds default y 27761da177e4SLinus Torvalds 2777d865bea4SRalf Baechleconfig I8253 2778d865bea4SRalf Baechle bool 2779798778b8SRussell King select CLKSRC_I8253 27802d02612fSThomas Gleixner select CLKEVT_I8253 27819726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2782d865bea4SRalf Baechle 2783e05eb3f8SRalf Baechleconfig ZONE_DMA 2784e05eb3f8SRalf Baechle bool 2785e05eb3f8SRalf Baechle 2786cce335aeSRalf Baechleconfig ZONE_DMA32 2787cce335aeSRalf Baechle bool 2788cce335aeSRalf Baechle 27891da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 27901da177e4SLinus Torvalds 27911da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 27921da177e4SLinus Torvalds 2793388b78adSAlexandre Bounineconfig RAPIDIO 279456abde72SAlexandre Bounine tristate "RapidIO support" 2795388b78adSAlexandre Bounine depends on PCI 2796388b78adSAlexandre Bounine default n 2797388b78adSAlexandre Bounine help 2798388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2799388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2800388b78adSAlexandre Bounine 2801388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2802388b78adSAlexandre Bounine 28031da177e4SLinus Torvaldsendmenu 28041da177e4SLinus Torvalds 28051da177e4SLinus Torvaldsmenu "Executable file formats" 28061da177e4SLinus Torvalds 28071da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 28081da177e4SLinus Torvalds 28091da177e4SLinus Torvaldsconfig TRAD_SIGNALS 28101da177e4SLinus Torvalds bool 28111da177e4SLinus Torvalds 28121da177e4SLinus Torvaldsconfig MIPS32_COMPAT 281378aaf956SRalf Baechle bool 28141da177e4SLinus Torvalds 28151da177e4SLinus Torvaldsconfig COMPAT 28161da177e4SLinus Torvalds bool 28171da177e4SLinus Torvalds 281805e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 281905e43966SAtsushi Nemoto bool 282005e43966SAtsushi Nemoto 28211da177e4SLinus Torvaldsconfig MIPS32_O32 28221da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 282378aaf956SRalf Baechle depends on 64BIT 282478aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 282578aaf956SRalf Baechle select COMPAT 282678aaf956SRalf Baechle select MIPS32_COMPAT 282778aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 28281da177e4SLinus Torvalds help 28291da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 28301da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 28311da177e4SLinus Torvalds existing binaries are in this format. 28321da177e4SLinus Torvalds 28331da177e4SLinus Torvalds If unsure, say Y. 28341da177e4SLinus Torvalds 28351da177e4SLinus Torvaldsconfig MIPS32_N32 28361da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 2837c22eacfeSRalf Baechle depends on 64BIT 283878aaf956SRalf Baechle select COMPAT 283978aaf956SRalf Baechle select MIPS32_COMPAT 284078aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 28411da177e4SLinus Torvalds help 28421da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 28431da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 28441da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 28451da177e4SLinus Torvalds cases. 28461da177e4SLinus Torvalds 28471da177e4SLinus Torvalds If unsure, say N. 28481da177e4SLinus Torvalds 28491da177e4SLinus Torvaldsconfig BINFMT_ELF32 28501da177e4SLinus Torvalds bool 28511da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 28521da177e4SLinus Torvalds 28532116245eSRalf Baechleendmenu 28541da177e4SLinus Torvalds 28552116245eSRalf Baechlemenu "Power management options" 2856952fa954SRodolfo Giometti 2857363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2858363c55caSWu Zhangjin def_bool y 28593f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2860363c55caSWu Zhangjin 2861f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2862f4cb5700SJohannes Berg def_bool y 28633f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2864f4cb5700SJohannes Berg 28652116245eSRalf Baechlesource "kernel/power/Kconfig" 2866952fa954SRodolfo Giometti 28671da177e4SLinus Torvaldsendmenu 28681da177e4SLinus Torvalds 28697a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 28707a998935SViresh Kumar bool 28717a998935SViresh Kumar 28727a998935SViresh Kumarmenu "CPU Power Management" 2873c095ebafSPaul Burton 2874c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 28757a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 28767a998935SViresh Kumarendif 28779726b43aSWu Zhangjin 2878c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 2879c095ebafSPaul Burton 2880c095ebafSPaul Burtonendmenu 2881c095ebafSPaul Burton 2882d5950b43SSam Ravnborgsource "net/Kconfig" 2883d5950b43SSam Ravnborg 28841da177e4SLinus Torvaldssource "drivers/Kconfig" 28851da177e4SLinus Torvalds 288698cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 288798cdee0eSRalf Baechle 28881da177e4SLinus Torvaldssource "fs/Kconfig" 28891da177e4SLinus Torvalds 28901da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 28911da177e4SLinus Torvalds 28921da177e4SLinus Torvaldssource "security/Kconfig" 28931da177e4SLinus Torvalds 28941da177e4SLinus Torvaldssource "crypto/Kconfig" 28951da177e4SLinus Torvalds 28961da177e4SLinus Torvaldssource "lib/Kconfig" 28972235a54dSSanjay Lal 28982235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 2899