11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 5393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 6c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 7f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 8ec7748b5SSam Ravnborg select HAVE_IDE 942d4b839SMathieu Desnoyers select HAVE_OPROFILE 107f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 117f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1288547001SJason Wessel select HAVE_ARCH_KGDB 13490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 14c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 153f5fdb4bSMarkos Chandras select HAVE_BPF_JIT if !CPU_MICROMIPS 167563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 17d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 1869a7d1b3SWu Zhangjin select HAVE_FUNCTION_TRACE_MCOUNT_TEST 19538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 20538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2164575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2229c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 23c1bf207dSDavid Daney select HAVE_KPROBES 24c1bf207dSDavid Daney select HAVE_KRETPROBES 25b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 261d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 27e26d196cSDavid Daney select ARCH_BINFMT_ELF_RANDOMIZE_PIE 28383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 2921a41faaSWu Zhangjin select RTC_LIB if !MACH_LOONGSON 302b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 317463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3248e1fd5aSDavid Daney select HAVE_DMA_ATTRS 3348e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 343bd27e32SDavid Daney select GENERIC_IRQ_PROBE 35f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3678857614SMarkos Chandras select GENERIC_PCI_IOMAP 3794bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 38c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 390f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 409d15ffc8STejun Heo select HAVE_MEMBLOCK 419d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 429d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 43360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 444b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 45cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 46cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 47786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 484febd95aSStephen Rothwell select VIRT_TO_BUS 492f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 502f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5150150d2bSAl Viro select CLONE_BACKWARDS 52d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5319952a92SKees Cook select HAVE_CC_STACKPROTECTOR 54b1d4c6caSJames Hogan select CPU_PM if CPU_IDLE 55cc7964afSPaul Burton select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 561da177e4SLinus Torvalds 571da177e4SLinus Torvaldsmenu "Machine selection" 581da177e4SLinus Torvalds 595e83d430SRalf Baechlechoice 605e83d430SRalf Baechle prompt "System type" 615e83d430SRalf Baechle default SGI_IP22 621da177e4SLinus Torvalds 6342a4f17dSManuel Laussconfig MIPS_ALCHEMY 64c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 6542a4f17dSManuel Lauss select 64BIT_PHYS_ADDR 66f772cdb2SRalf Baechle select CEVT_R4K 67d7ea335cSSteven J. Hill select CSRC_R4K 6842a4f17dSManuel Lauss select IRQ_CPU 6988e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 7042a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 7142a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 7242a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 73efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 741b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 751da177e4SLinus Torvalds 767ca5dc14SFlorian Fainelliconfig AR7 777ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 787ca5dc14SFlorian Fainelli select BOOT_ELF32 797ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 807ca5dc14SFlorian Fainelli select CEVT_R4K 817ca5dc14SFlorian Fainelli select CSRC_R4K 827ca5dc14SFlorian Fainelli select IRQ_CPU 837ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 847ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 857ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 867ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 877ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 887ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 89377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 901b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 915f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 927ca5dc14SFlorian Fainelli select VLYNQ 938551fb64SYoichi Yuasa select HAVE_CLK 947ca5dc14SFlorian Fainelli help 957ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 967ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 977ca5dc14SFlorian Fainelli 98d4a67d9dSGabor Juhosconfig ATH79 99d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 1006eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 101d4a67d9dSGabor Juhos select BOOT_RAW 102d4a67d9dSGabor Juhos select CEVT_R4K 103d4a67d9dSGabor Juhos select CSRC_R4K 104d4a67d9dSGabor Juhos select DMA_NONCOHERENT 10594638067SGabor Juhos select HAVE_CLK 1062c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 107d4a67d9dSGabor Juhos select IRQ_CPU 1080aabf1a4SGabor Juhos select MIPS_MACHINE 109d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 110d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 111d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 112d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 113377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 114d4a67d9dSGabor Juhos help 115d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 116d4a67d9dSGabor Juhos 1171c0c13ebSAurelien Jarnoconfig BCM47XX 118c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1192da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 120fe08f8c2SHauke Mehrtens select BOOT_RAW 12142f77542SRalf Baechle select CEVT_R4K 122940f6b48SRalf Baechle select CSRC_R4K 1231c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1241c0c13ebSAurelien Jarno select HW_HAS_PCI 1251c0c13ebSAurelien Jarno select IRQ_CPU 126314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 127dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1281c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1291c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 130377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 13125e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 132e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 1331c0c13ebSAurelien Jarno help 1341c0c13ebSAurelien Jarno Support for BCM47XX based boards 1351c0c13ebSAurelien Jarno 136e7300d04SMaxime Bizonconfig BCM63XX 137e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 138ae8de61cSFlorian Fainelli select BOOT_RAW 139e7300d04SMaxime Bizon select CEVT_R4K 140e7300d04SMaxime Bizon select CSRC_R4K 141e7300d04SMaxime Bizon select DMA_NONCOHERENT 142e7300d04SMaxime Bizon select IRQ_CPU 143e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 144e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 145e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 146e7300d04SMaxime Bizon select SWAP_IO_SPACE 147e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 1483e82eeebSYoichi Yuasa select HAVE_CLK 149af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 150e7300d04SMaxime Bizon help 151e7300d04SMaxime Bizon Support for BCM63XX based boards 152e7300d04SMaxime Bizon 1531da177e4SLinus Torvaldsconfig MIPS_COBALT 1543fa986faSMartin Michlmayr bool "Cobalt Server" 15542f77542SRalf Baechle select CEVT_R4K 156940f6b48SRalf Baechle select CSRC_R4K 1571097c6acSYoichi Yuasa select CEVT_GT641XX 1581da177e4SLinus Torvalds select DMA_NONCOHERENT 1591da177e4SLinus Torvalds select HW_HAS_PCI 160d865bea4SRalf Baechle select I8253 1611da177e4SLinus Torvalds select I8259 1621da177e4SLinus Torvalds select IRQ_CPU 163d5ab1a69SYoichi Yuasa select IRQ_GT641XX 164252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 165e25bfc92SYoichi Yuasa select PCI 1667cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 1670a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 168ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1690e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 1705e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 171e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 1721da177e4SLinus Torvalds 1731da177e4SLinus Torvaldsconfig MACH_DECSTATION 1743fa986faSMartin Michlmayr bool "DECstations" 1751da177e4SLinus Torvalds select BOOT_ELF32 1766457d9fcSYoichi Yuasa select CEVT_DS1287 17742f77542SRalf Baechle select CEVT_R4K 1784247417dSYoichi Yuasa select CSRC_IOASIC 179940f6b48SRalf Baechle select CSRC_R4K 18020d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 18120d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 18220d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 1831da177e4SLinus Torvalds select DMA_NONCOHERENT 184ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 1851da177e4SLinus Torvalds select IRQ_CPU 1867cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 1877cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 188ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1897d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 1905e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1911723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 1921723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 1931723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 194930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 1955e83d430SRalf Baechle help 1961da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 1971da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 1981da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 1991da177e4SLinus Torvalds 2001da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 2011da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 2021da177e4SLinus Torvalds 2031da177e4SLinus Torvalds DECstation 5000/50 2041da177e4SLinus Torvalds DECstation 5000/150 2051da177e4SLinus Torvalds DECstation 5000/260 2061da177e4SLinus Torvalds DECsystem 5900/260 2071da177e4SLinus Torvalds 2081da177e4SLinus Torvalds otherwise choose R3000. 2091da177e4SLinus Torvalds 2105e83d430SRalf Baechleconfig MACH_JAZZ 2113fa986faSMartin Michlmayr bool "Jazz family of machines" 2120e2794b0SRalf Baechle select FW_ARC 2130e2794b0SRalf Baechle select FW_ARC32 2145e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 21542f77542SRalf Baechle select CEVT_R4K 216940f6b48SRalf Baechle select CSRC_R4K 217e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2185e83d430SRalf Baechle select GENERIC_ISA_DMA 2198a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 220ea202c63SThomas Bogendoerfer select IRQ_CPU 221d865bea4SRalf Baechle select I8253 2225e83d430SRalf Baechle select I8259 2235e83d430SRalf Baechle select ISA 2247cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2255e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2267d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2271723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2281da177e4SLinus Torvalds help 2295e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2305e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 231692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2325e83d430SRalf Baechle Olivetti M700-10 workstations. 2335e83d430SRalf Baechle 2345ebabe59SLars-Peter Clausenconfig MACH_JZ4740 2355ebabe59SLars-Peter Clausen bool "Ingenic JZ4740 based machines" 2365ebabe59SLars-Peter Clausen select SYS_HAS_CPU_MIPS32_R1 2375ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2385ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 239f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 2405ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 2415ebabe59SLars-Peter Clausen select IRQ_CPU 2425ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 2435ebabe59SLars-Peter Clausen select SYS_HAS_EARLY_PRINTK 244ab5330ebSMaurus Cuelenaere select HAVE_CLK 24583bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 2465ebabe59SLars-Peter Clausen 247171bb2f1SJohn Crispinconfig LANTIQ 248171bb2f1SJohn Crispin bool "Lantiq based platforms" 249171bb2f1SJohn Crispin select DMA_NONCOHERENT 250171bb2f1SJohn Crispin select IRQ_CPU 251171bb2f1SJohn Crispin select CEVT_R4K 252171bb2f1SJohn Crispin select CSRC_R4K 253171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 254171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 255171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 256171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 257377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 258171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 259171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 260171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 261171bb2f1SJohn Crispin select SWAP_IO_SPACE 262171bb2f1SJohn Crispin select BOOT_RAW 263287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 264287e3f3fSJohn Crispin select CLKDEV_LOOKUP 265a0392222SJohn Crispin select USE_OF 2663f8c50c9SJohn Crispin select PINCTRL 2673f8c50c9SJohn Crispin select PINCTRL_LANTIQ 268171bb2f1SJohn Crispin 2691f21d2bdSBrian Murphyconfig LASAT 2701f21d2bdSBrian Murphy bool "LASAT Networks platforms" 27142f77542SRalf Baechle select CEVT_R4K 272940f6b48SRalf Baechle select CSRC_R4K 2731f21d2bdSBrian Murphy select DMA_NONCOHERENT 2741f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 2751f21d2bdSBrian Murphy select HW_HAS_PCI 276a5ccfe5cSRalf Baechle select IRQ_CPU 2771f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 2781f21d2bdSBrian Murphy select MIPS_NILE4 2791f21d2bdSBrian Murphy select R5000_CPU_SCACHE 2801f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 2811f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 2821f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 2831f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 2841f21d2bdSBrian Murphy 28585749d24SWu Zhangjinconfig MACH_LOONGSON 28685749d24SWu Zhangjin bool "Loongson family of machines" 287c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 288ade299d8SYoichi Yuasa help 28985749d24SWu Zhangjin This enables the support of Loongson family of machines. 29085749d24SWu Zhangjin 29185749d24SWu Zhangjin Loongson is a family of general-purpose MIPS-compatible CPUs. 29285749d24SWu Zhangjin developed at Institute of Computing Technology (ICT), 29385749d24SWu Zhangjin Chinese Academy of Sciences (CAS) in the People's Republic 29485749d24SWu Zhangjin of China. The chief architect is Professor Weiwu Hu. 295ade299d8SYoichi Yuasa 296ca585cf9SKelvin Cheungconfig MACH_LOONGSON1 297ca585cf9SKelvin Cheung bool "Loongson 1 family of machines" 298ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 299ca585cf9SKelvin Cheung help 300ca585cf9SKelvin Cheung This enables support for the Loongson 1 based machines. 301ca585cf9SKelvin Cheung 302ca585cf9SKelvin Cheung Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by 303ca585cf9SKelvin Cheung the ICT (Institute of Computing Technology) and the Chinese Academy 304ca585cf9SKelvin Cheung of Sciences. 305ca585cf9SKelvin Cheung 3061da177e4SLinus Torvaldsconfig MIPS_MALTA 3073fa986faSMartin Michlmayr bool "MIPS Malta board" 30861ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 3091da177e4SLinus Torvalds select BOOT_ELF32 310fa71c960SRalf Baechle select BOOT_RAW 31142f77542SRalf Baechle select CEVT_R4K 312940f6b48SRalf Baechle select CSRC_R4K 313778eeb1bSSteven J. Hill select CSRC_GIC 314885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 3151da177e4SLinus Torvalds select GENERIC_ISA_DMA 3168a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 317aa414dffSRalf Baechle select IRQ_CPU 31839b8d525SRalf Baechle select IRQ_GIC 3191da177e4SLinus Torvalds select HW_HAS_PCI 320d865bea4SRalf Baechle select I8253 3211da177e4SLinus Torvalds select I8259 3225e83d430SRalf Baechle select MIPS_BONITO64 3239318c51aSChris Dearman select MIPS_CPU_SCACHE 324252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 3255e83d430SRalf Baechle select MIPS_MSC 3261da177e4SLinus Torvalds select SWAP_IO_SPACE 3277cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 3287cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 329bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 3307cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 3315d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 3327cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3337cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 334ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 335ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 3365e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 3375e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3380365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 339e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 340377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 341f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 3429693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 3431b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 3441da177e4SLinus Torvalds help 345f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 3461da177e4SLinus Torvalds board. 3471da177e4SLinus Torvalds 348ec47b274SSteven J. Hillconfig MIPS_SEAD3 349ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 350ec47b274SSteven J. Hill select BOOT_ELF32 351ec47b274SSteven J. Hill select BOOT_RAW 352ec47b274SSteven J. Hill select CEVT_R4K 353ec47b274SSteven J. Hill select CSRC_R4K 354dfa762e1SSteven J. Hill select CSRC_GIC 355ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 356ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 357ec47b274SSteven J. Hill select DMA_NONCOHERENT 358ec47b274SSteven J. Hill select IRQ_CPU 359ec47b274SSteven J. Hill select IRQ_GIC 36044327236SQais Yousef select LIBFDT 361ec47b274SSteven J. Hill select MIPS_MSC 362ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 363ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 364ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 365ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 366ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 367ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 368ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 369ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 370ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 371a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 372377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 373ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 374ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 3759b731009SSteven J. Hill select USE_OF 376ec47b274SSteven J. Hill help 377ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 378ec47b274SSteven J. Hill board. 379ec47b274SSteven J. Hill 380a83860c2SRalf Baechleconfig NEC_MARKEINS 381a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 382a83860c2SRalf Baechle select SOC_EMMA2RH 383a83860c2SRalf Baechle select HW_HAS_PCI 384a83860c2SRalf Baechle help 385a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 386ade299d8SYoichi Yuasa 3875e83d430SRalf Baechleconfig MACH_VR41XX 38874142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 38942f77542SRalf Baechle select CEVT_R4K 390940f6b48SRalf Baechle select CSRC_R4K 3917cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 392377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 39327fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 3945e83d430SRalf Baechle 395edb6310aSDaniel Lairdconfig NXP_STB220 396edb6310aSDaniel Laird bool "NXP STB220 board" 397edb6310aSDaniel Laird select SOC_PNX833X 398edb6310aSDaniel Laird help 399edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 400edb6310aSDaniel Laird 401edb6310aSDaniel Lairdconfig NXP_STB225 402edb6310aSDaniel Laird bool "NXP 225 board" 403edb6310aSDaniel Laird select SOC_PNX833X 404edb6310aSDaniel Laird select SOC_PNX8335 405edb6310aSDaniel Laird help 406edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 407edb6310aSDaniel Laird 4089267a30dSMarc St-Jeanconfig PMC_MSP 4099267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 41039d30c13SAnoop P A select CEVT_R4K 41139d30c13SAnoop P A select CSRC_R4K 4129267a30dSMarc St-Jean select DMA_NONCOHERENT 4139267a30dSMarc St-Jean select SWAP_IO_SPACE 4149267a30dSMarc St-Jean select NO_EXCEPT_FILL 4159267a30dSMarc St-Jean select BOOT_RAW 4169267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 4179267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 4189267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 4199267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 420377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 4219267a30dSMarc St-Jean select IRQ_CPU 4229267a30dSMarc St-Jean select SERIAL_8250 4239267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 4249296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 4259296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 4269267a30dSMarc St-Jean help 4279267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 4289267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 4299267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 4309267a30dSMarc St-Jean a variety of MIPS cores. 4319267a30dSMarc St-Jean 432ae2b5bb6SJohn Crispinconfig RALINK 433ae2b5bb6SJohn Crispin bool "Ralink based machines" 434ae2b5bb6SJohn Crispin select CEVT_R4K 435ae2b5bb6SJohn Crispin select CSRC_R4K 436ae2b5bb6SJohn Crispin select BOOT_RAW 437ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 438ae2b5bb6SJohn Crispin select IRQ_CPU 439ae2b5bb6SJohn Crispin select USE_OF 440ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 441ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 442ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 443ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 444377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 445ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 446ae2b5bb6SJohn Crispin select HAVE_MACH_CLKDEV 447ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 4482a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 4492a153f1cSJohn Crispin select RESET_CONTROLLER 450ae2b5bb6SJohn Crispin 4511da177e4SLinus Torvaldsconfig SGI_IP22 4523fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 4530e2794b0SRalf Baechle select FW_ARC 4540e2794b0SRalf Baechle select FW_ARC32 4551da177e4SLinus Torvalds select BOOT_ELF32 45642f77542SRalf Baechle select CEVT_R4K 457940f6b48SRalf Baechle select CSRC_R4K 458e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 4591da177e4SLinus Torvalds select DMA_NONCOHERENT 4605e83d430SRalf Baechle select HW_HAS_EISA 461d865bea4SRalf Baechle select I8253 46268de4803SThomas Bogendoerfer select I8259 4631da177e4SLinus Torvalds select IP22_CPU_SCACHE 4641da177e4SLinus Torvalds select IRQ_CPU 465aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 466e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 467e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 46836e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 469e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 470e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 471e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 4721da177e4SLinus Torvalds select SWAP_IO_SPACE 4737cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 4747cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 4752b5e63f6SMartin Michlmayr # 4762b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 4772b5e63f6SMartin Michlmayr # memory during early boot on some machines. 4782b5e63f6SMartin Michlmayr # 4792b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 4802b5e63f6SMartin Michlmayr # for a more details discussion 4812b5e63f6SMartin Michlmayr # 4822b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 483ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 484ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4855e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 486930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 4871da177e4SLinus Torvalds help 4881da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 4891da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 4901da177e4SLinus Torvalds that runs on these, say Y here. 4911da177e4SLinus Torvalds 4921da177e4SLinus Torvaldsconfig SGI_IP27 4933fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 4940e2794b0SRalf Baechle select FW_ARC 4950e2794b0SRalf Baechle select FW_ARC64 4965e83d430SRalf Baechle select BOOT_ELF64 497e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 498634286f1SRalf Baechle select DMA_COHERENT 49936a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 5001da177e4SLinus Torvalds select HW_HAS_PCI 501130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 5027cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 503ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5045e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 505d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 5061a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 507930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 5081da177e4SLinus Torvalds help 5091da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 5101da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 5111da177e4SLinus Torvalds here. 5121da177e4SLinus Torvalds 513e2defae5SThomas Bogendoerferconfig SGI_IP28 5147d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 5150e2794b0SRalf Baechle select FW_ARC 5160e2794b0SRalf Baechle select FW_ARC64 517e2defae5SThomas Bogendoerfer select BOOT_ELF64 518e2defae5SThomas Bogendoerfer select CEVT_R4K 519e2defae5SThomas Bogendoerfer select CSRC_R4K 520e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 521e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 522e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 523e2defae5SThomas Bogendoerfer select IRQ_CPU 524e2defae5SThomas Bogendoerfer select HW_HAS_EISA 525e2defae5SThomas Bogendoerfer select I8253 526e2defae5SThomas Bogendoerfer select I8259 527e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 528e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 5295b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 530e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 531e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 532e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 533e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 534e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 5352b5e63f6SMartin Michlmayr # 5362b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5372b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5382b5e63f6SMartin Michlmayr # 5392b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5402b5e63f6SMartin Michlmayr # for a more details discussion 5412b5e63f6SMartin Michlmayr # 5422b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 543e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 544e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 545e2defae5SThomas Bogendoerfer help 546e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 547e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 548e2defae5SThomas Bogendoerfer 5491da177e4SLinus Torvaldsconfig SGI_IP32 550cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 5510e2794b0SRalf Baechle select FW_ARC 5520e2794b0SRalf Baechle select FW_ARC32 5531da177e4SLinus Torvalds select BOOT_ELF32 55442f77542SRalf Baechle select CEVT_R4K 555940f6b48SRalf Baechle select CSRC_R4K 5561da177e4SLinus Torvalds select DMA_NONCOHERENT 5571da177e4SLinus Torvalds select HW_HAS_PCI 558dd67b155SRalf Baechle select IRQ_CPU 5591da177e4SLinus Torvalds select R5000_CPU_SCACHE 5601da177e4SLinus Torvalds select RM7000_CPU_SCACHE 5617cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5627cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 5637cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 564dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 565ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5665e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5671da177e4SLinus Torvalds help 5681da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 5691da177e4SLinus Torvalds 570ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 571ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 5725e83d430SRalf Baechle select BOOT_ELF32 5735e83d430SRalf Baechle select DMA_COHERENT 5745e83d430SRalf Baechle select SIBYTE_BCM1120 5755e83d430SRalf Baechle select SWAP_IO_SPACE 5767cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5775e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5785e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5795e83d430SRalf Baechle 580ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 581ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 5825e83d430SRalf Baechle select BOOT_ELF32 5835e83d430SRalf Baechle select DMA_COHERENT 5845e83d430SRalf Baechle select SIBYTE_BCM1120 5855e83d430SRalf Baechle select SWAP_IO_SPACE 5867cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5875e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5885e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5895e83d430SRalf Baechle 5905e83d430SRalf Baechleconfig SIBYTE_CRHONE 5913fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 5925e83d430SRalf Baechle select BOOT_ELF32 5935e83d430SRalf Baechle select DMA_COHERENT 5945e83d430SRalf Baechle select SIBYTE_BCM1125 5955e83d430SRalf Baechle select SWAP_IO_SPACE 5967cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5975e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5985e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 5995e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6005e83d430SRalf Baechle 601ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 602ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 603ade299d8SYoichi Yuasa select BOOT_ELF32 604ade299d8SYoichi Yuasa select DMA_COHERENT 605ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 606ade299d8SYoichi Yuasa select SWAP_IO_SPACE 607ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 608ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 609ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 610ade299d8SYoichi Yuasa 611ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 612ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 613ade299d8SYoichi Yuasa select BOOT_ELF32 614ade299d8SYoichi Yuasa select DMA_COHERENT 615fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 616ade299d8SYoichi Yuasa select SIBYTE_SB1250 617ade299d8SYoichi Yuasa select SWAP_IO_SPACE 618ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 619ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 620ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 621ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 622cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 623ade299d8SYoichi Yuasa 624ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 625ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 626ade299d8SYoichi Yuasa select BOOT_ELF32 627ade299d8SYoichi Yuasa select DMA_COHERENT 628fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 629ade299d8SYoichi Yuasa select SIBYTE_SB1250 630ade299d8SYoichi Yuasa select SWAP_IO_SPACE 631ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 632ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 633ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 634ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 635ade299d8SYoichi Yuasa 636ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 637ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 638ade299d8SYoichi Yuasa select BOOT_ELF32 639ade299d8SYoichi Yuasa select DMA_COHERENT 640ade299d8SYoichi Yuasa select SIBYTE_SB1250 641ade299d8SYoichi Yuasa select SWAP_IO_SPACE 642ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 643ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 644ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 645ade299d8SYoichi Yuasa 646ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 647ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 648ade299d8SYoichi Yuasa select BOOT_ELF32 649ade299d8SYoichi Yuasa select DMA_COHERENT 650ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 651ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 652ade299d8SYoichi Yuasa select SWAP_IO_SPACE 653ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 654ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 655651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 656ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 657cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 658ade299d8SYoichi Yuasa 65914b36af4SThomas Bogendoerferconfig SNI_RM 66014b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 6610e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 6620e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 663aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 6645e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 6655e83d430SRalf Baechle select BOOT_ELF32 66642f77542SRalf Baechle select CEVT_R4K 667940f6b48SRalf Baechle select CSRC_R4K 668e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 6695e83d430SRalf Baechle select DMA_NONCOHERENT 6705e83d430SRalf Baechle select GENERIC_ISA_DMA 6718a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 6725e83d430SRalf Baechle select HW_HAS_EISA 6735e83d430SRalf Baechle select HW_HAS_PCI 674c066a32aSThomas Bogendoerfer select IRQ_CPU 675d865bea4SRalf Baechle select I8253 6765e83d430SRalf Baechle select I8259 6775e83d430SRalf Baechle select ISA 6784a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 6797cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6804a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 681c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 6824a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 68336a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 684ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 6857d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 6864a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 6875e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 6885e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6891da177e4SLinus Torvalds help 69014b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 69114b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 6925e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 6935e83d430SRalf Baechle support this machine type. 6941da177e4SLinus Torvalds 695edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 696edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 6975e83d430SRalf Baechle 698edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 699edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 70023fbee9dSRalf Baechle 70173b4390fSRalf Baechleconfig MIKROTIK_RB532 70273b4390fSRalf Baechle bool "Mikrotik RB532 boards" 70373b4390fSRalf Baechle select CEVT_R4K 70473b4390fSRalf Baechle select CSRC_R4K 70573b4390fSRalf Baechle select DMA_NONCOHERENT 70673b4390fSRalf Baechle select HW_HAS_PCI 70773b4390fSRalf Baechle select IRQ_CPU 70873b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 70973b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 71073b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 71173b4390fSRalf Baechle select SWAP_IO_SPACE 71273b4390fSRalf Baechle select BOOT_RAW 713d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 714930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 71573b4390fSRalf Baechle help 71673b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 71773b4390fSRalf Baechle based on the IDT RC32434 SoC. 71873b4390fSRalf Baechle 7199ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 7209ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 721a86c7f72SDavid Daney select CEVT_R4K 722a86c7f72SDavid Daney select 64BIT_PHYS_ADDR 723a86c7f72SDavid Daney select DMA_COHERENT 724a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 725a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 726f65aad41SRalf Baechle select EDAC_SUPPORT 727773cb77dSRalf Baechle select SYS_SUPPORTS_HOTPLUG_CPU 728a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 7295e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 730a86c7f72SDavid Daney select SWAP_IO_SPACE 731e8635b48SDavid Daney select HW_HAS_PCI 732f00e001eSDavid Daney select ZONE_DMA32 733465aaed0SDavid Daney select HOLES_IN_ZONE 73499cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 735a86c7f72SDavid Daney help 736a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 737a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 738a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 739a86c7f72SDavid Daney Some of the supported boards are: 740a86c7f72SDavid Daney EBT3000 741a86c7f72SDavid Daney EBH3000 742a86c7f72SDavid Daney EBH3100 743a86c7f72SDavid Daney Thunder 744a86c7f72SDavid Daney Kodama 745a86c7f72SDavid Daney Hikari 746a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 747a86c7f72SDavid Daney 7487f058e85SJayachandran Cconfig NLM_XLR_BOARD 7497f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 7507f058e85SJayachandran C select BOOT_ELF32 7517f058e85SJayachandran C select NLM_COMMON 7527f058e85SJayachandran C select SYS_HAS_CPU_XLR 7537f058e85SJayachandran C select SYS_SUPPORTS_SMP 7547f058e85SJayachandran C select HW_HAS_PCI 7557f058e85SJayachandran C select SWAP_IO_SPACE 7567f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7577f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7587f058e85SJayachandran C select 64BIT_PHYS_ADDR 7597f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7607f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 7617f058e85SJayachandran C select DMA_COHERENT 7627f058e85SJayachandran C select NR_CPUS_DEFAULT_32 7637f058e85SJayachandran C select CEVT_R4K 7647f058e85SJayachandran C select CSRC_R4K 7657f058e85SJayachandran C select IRQ_CPU 766b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7677f058e85SJayachandran C select SYNC_R4K 7687f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 7698f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7708f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7717f058e85SJayachandran C help 7727f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 7737f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 7747f058e85SJayachandran C 7751c773ea4SJayachandran Cconfig NLM_XLP_BOARD 7761c773ea4SJayachandran C bool "Netlogic XLP based systems" 7771c773ea4SJayachandran C select BOOT_ELF32 7781c773ea4SJayachandran C select NLM_COMMON 7791c773ea4SJayachandran C select SYS_HAS_CPU_XLP 7801c773ea4SJayachandran C select SYS_SUPPORTS_SMP 7811c773ea4SJayachandran C select HW_HAS_PCI 7821c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7831c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7841c773ea4SJayachandran C select 64BIT_PHYS_ADDR 7851c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7861c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 7871c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 7881c773ea4SJayachandran C select DMA_COHERENT 7891c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 7901c773ea4SJayachandran C select CEVT_R4K 7911c773ea4SJayachandran C select CSRC_R4K 7921c773ea4SJayachandran C select IRQ_CPU 793b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7941c773ea4SJayachandran C select SYNC_R4K 7951c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 7962f6528e1SJayachandran C select USE_OF 7978f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7988f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7991c773ea4SJayachandran C help 8001c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 8011c773ea4SJayachandran C Say Y here if you have a XLP based board. 8021c773ea4SJayachandran C 8031da177e4SLinus Torvaldsendchoice 8041da177e4SLinus Torvalds 805e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 806d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 807a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 808e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 8095e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 8105ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 8118ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 8121f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 8130f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 814ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 81529c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 81638b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 81722b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 8185e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 819a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 82085749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig" 821ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig" 8227f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 82338b18f72SRalf Baechle 8245e83d430SRalf Baechleendmenu 8255e83d430SRalf Baechle 8261da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 8271da177e4SLinus Torvalds bool 8281da177e4SLinus Torvalds default y 8291da177e4SLinus Torvalds 8301da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 8311da177e4SLinus Torvalds bool 8321da177e4SLinus Torvalds 833f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 834f0d1b0b3SDavid Howells bool 835f0d1b0b3SDavid Howells default n 836f0d1b0b3SDavid Howells 837f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 838f0d1b0b3SDavid Howells bool 839f0d1b0b3SDavid Howells default n 840f0d1b0b3SDavid Howells 8413c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 8423c9ee7efSAkinobu Mita bool 8433c9ee7efSAkinobu Mita default y 8443c9ee7efSAkinobu Mita 8451da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 8461da177e4SLinus Torvalds bool 8471da177e4SLinus Torvalds default y 8481da177e4SLinus Torvalds 849ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 8501cc89038SAtsushi Nemoto bool 8511cc89038SAtsushi Nemoto default y 8521cc89038SAtsushi Nemoto 8531da177e4SLinus Torvalds# 8541da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 8551da177e4SLinus Torvalds# 8560e2794b0SRalf Baechleconfig FW_ARC 8571da177e4SLinus Torvalds bool 8581da177e4SLinus Torvalds 85961ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 86061ed242dSRalf Baechle bool 86161ed242dSRalf Baechle 8629267a30dSMarc St-Jeanconfig BOOT_RAW 8639267a30dSMarc St-Jean bool 8649267a30dSMarc St-Jean 865217dd11eSRalf Baechleconfig CEVT_BCM1480 866217dd11eSRalf Baechle bool 867217dd11eSRalf Baechle 8686457d9fcSYoichi Yuasaconfig CEVT_DS1287 8696457d9fcSYoichi Yuasa bool 8706457d9fcSYoichi Yuasa 8711097c6acSYoichi Yuasaconfig CEVT_GT641XX 8721097c6acSYoichi Yuasa bool 8731097c6acSYoichi Yuasa 87442f77542SRalf Baechleconfig CEVT_R4K 87542f77542SRalf Baechle bool 87642f77542SRalf Baechle 8770ab2b7d0SRaghu Gandhamconfig CEVT_GIC 878237036deSPaul Burton select MIPS_CM 8790ab2b7d0SRaghu Gandham bool 8800ab2b7d0SRaghu Gandham 881217dd11eSRalf Baechleconfig CEVT_SB1250 882217dd11eSRalf Baechle bool 883217dd11eSRalf Baechle 884229f773eSAtsushi Nemotoconfig CEVT_TXX9 885229f773eSAtsushi Nemoto bool 886229f773eSAtsushi Nemoto 887217dd11eSRalf Baechleconfig CSRC_BCM1480 888217dd11eSRalf Baechle bool 889217dd11eSRalf Baechle 8904247417dSYoichi Yuasaconfig CSRC_IOASIC 8914247417dSYoichi Yuasa bool 8924247417dSYoichi Yuasa 893940f6b48SRalf Baechleconfig CSRC_R4K 894940f6b48SRalf Baechle bool 895940f6b48SRalf Baechle 896778eeb1bSSteven J. Hillconfig CSRC_GIC 897237036deSPaul Burton select MIPS_CM 898778eeb1bSSteven J. Hill bool 899778eeb1bSSteven J. Hill 900217dd11eSRalf Baechleconfig CSRC_SB1250 901217dd11eSRalf Baechle bool 902217dd11eSRalf Baechle 903a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 9047444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 905a9aec7feSAtsushi Nemoto bool 906a9aec7feSAtsushi Nemoto 9070e2794b0SRalf Baechleconfig FW_CFE 908df78b5c8SAurelien Jarno bool 909df78b5c8SAurelien Jarno 9104bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 9114bafad92SFUJITA Tomonori def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT 9124bafad92SFUJITA Tomonori 913885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 914885014bcSFelix Fietkau select DMA_NONCOHERENT 915885014bcSFelix Fietkau bool 916885014bcSFelix Fietkau 9171da177e4SLinus Torvaldsconfig DMA_COHERENT 9181da177e4SLinus Torvalds bool 9191da177e4SLinus Torvalds 9201da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 9211da177e4SLinus Torvalds bool 922e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 9234ce588cdSRalf Baechle 924e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 9254ce588cdSRalf Baechle bool 9261da177e4SLinus Torvalds 92736a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 9281da177e4SLinus Torvalds bool 9291da177e4SLinus Torvalds 930dbb74540SRalf Baechleconfig HOTPLUG_CPU 9311b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 93240b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 9331b2bc75cSRalf Baechle help 9341b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 9351b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 9361b2bc75cSRalf Baechle (Note: power management support will enable this option 9371b2bc75cSRalf Baechle automatically on SMP systems. ) 9381b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 9391b2bc75cSRalf Baechle 9401b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 941dbb74540SRalf Baechle bool 942dbb74540SRalf Baechle 9431da177e4SLinus Torvaldsconfig I8259 9441da177e4SLinus Torvalds bool 9451da177e4SLinus Torvalds 9461da177e4SLinus Torvaldsconfig MIPS_BONITO64 9471da177e4SLinus Torvalds bool 9481da177e4SLinus Torvalds 9491da177e4SLinus Torvaldsconfig MIPS_MSC 9501da177e4SLinus Torvalds bool 9511da177e4SLinus Torvalds 9521f21d2bdSBrian Murphyconfig MIPS_NILE4 9531f21d2bdSBrian Murphy bool 9541f21d2bdSBrian Murphy 95539b8d525SRalf Baechleconfig SYNC_R4K 95639b8d525SRalf Baechle bool 95739b8d525SRalf Baechle 958487d70d0SGabor Juhosconfig MIPS_MACHINE 959487d70d0SGabor Juhos def_bool n 960487d70d0SGabor Juhos 961ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 962d388d685SMaciej W. Rozycki def_bool n 963d388d685SMaciej W. Rozycki 9648313da30SRalf Baechleconfig GENERIC_ISA_DMA 9658313da30SRalf Baechle bool 9668313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 967a35bee8aSNamhyung Kim select ISA_DMA_API 9688313da30SRalf Baechle 969aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 970aa414dffSRalf Baechle bool 9718313da30SRalf Baechle select GENERIC_ISA_DMA 972aa414dffSRalf Baechle 973a35bee8aSNamhyung Kimconfig ISA_DMA_API 974a35bee8aSNamhyung Kim bool 975a35bee8aSNamhyung Kim 976465aaed0SDavid Daneyconfig HOLES_IN_ZONE 977465aaed0SDavid Daney bool 978465aaed0SDavid Daney 9795e83d430SRalf Baechle# 9806b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 9815e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 9825e83d430SRalf Baechle# choice statement should be more obvious to the user. 9835e83d430SRalf Baechle# 9845e83d430SRalf Baechlechoice 9856b2aac42SMasanari Iida prompt "Endianness selection" 9861da177e4SLinus Torvalds help 9871da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 9885e83d430SRalf Baechle byte order. These modes require different kernels and a different 9893cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 9905e83d430SRalf Baechle particular system but some systems are just as commonly used in the 9913dde6ad8SDavid Sterba one or the other endianness. 9925e83d430SRalf Baechle 9935e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 9945e83d430SRalf Baechle bool "Big endian" 9955e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 9965e83d430SRalf Baechle 9975e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 9985e83d430SRalf Baechle bool "Little endian" 9995e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 10005e83d430SRalf Baechle 10015e83d430SRalf Baechleendchoice 10025e83d430SRalf Baechle 100322b0763aSDavid Daneyconfig EXPORT_UASM 100422b0763aSDavid Daney bool 100522b0763aSDavid Daney 10062116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 10072116245eSRalf Baechle bool 10082116245eSRalf Baechle 10095e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 10105e83d430SRalf Baechle bool 10115e83d430SRalf Baechle 10125e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 10135e83d430SRalf Baechle bool 10141da177e4SLinus Torvalds 10159cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 10169cffd154SDavid Daney bool 10179cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 10189cffd154SDavid Daney default y 10199cffd154SDavid Daney 1020aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1021aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1022aa1762f4SDavid Daney 10231da177e4SLinus Torvaldsconfig IRQ_CPU 10241da177e4SLinus Torvalds bool 10251da177e4SLinus Torvalds 10261da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 10271da177e4SLinus Torvalds bool 10281da177e4SLinus Torvalds 10299267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 10309267a30dSMarc St-Jean bool 10319267a30dSMarc St-Jean 10329267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 10339267a30dSMarc St-Jean bool 10349267a30dSMarc St-Jean 10358420fd00SAtsushi Nemotoconfig IRQ_TXX9 10368420fd00SAtsushi Nemoto bool 10378420fd00SAtsushi Nemoto 1038d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1039d5ab1a69SYoichi Yuasa bool 1040d5ab1a69SYoichi Yuasa 104139b8d525SRalf Baechleconfig IRQ_GIC 1042237036deSPaul Burton select MIPS_CM 104339b8d525SRalf Baechle bool 104439b8d525SRalf Baechle 1045252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 10461da177e4SLinus Torvalds bool 10471da177e4SLinus Torvalds 10489267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 10499267a30dSMarc St-Jean bool 10509267a30dSMarc St-Jean 1051a83860c2SRalf Baechleconfig SOC_EMMA2RH 1052a83860c2SRalf Baechle bool 1053a83860c2SRalf Baechle select CEVT_R4K 1054a83860c2SRalf Baechle select CSRC_R4K 1055a83860c2SRalf Baechle select DMA_NONCOHERENT 1056a83860c2SRalf Baechle select IRQ_CPU 1057a83860c2SRalf Baechle select SWAP_IO_SPACE 1058a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1059a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1060a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1061a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1062a83860c2SRalf Baechle 1063edb6310aSDaniel Lairdconfig SOC_PNX833X 1064edb6310aSDaniel Laird bool 1065edb6310aSDaniel Laird select CEVT_R4K 1066edb6310aSDaniel Laird select CSRC_R4K 1067edb6310aSDaniel Laird select IRQ_CPU 1068edb6310aSDaniel Laird select DMA_NONCOHERENT 1069edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1070edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1071edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1072edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1073377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1074edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1075edb6310aSDaniel Laird 1076edb6310aSDaniel Lairdconfig SOC_PNX8335 1077edb6310aSDaniel Laird bool 1078edb6310aSDaniel Laird select SOC_PNX833X 1079edb6310aSDaniel Laird 10801da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 10811da177e4SLinus Torvalds bool 10821da177e4SLinus Torvalds 1083e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1084e2defae5SThomas Bogendoerfer bool 1085e2defae5SThomas Bogendoerfer 10865b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 10875b438c44SThomas Bogendoerfer bool 10885b438c44SThomas Bogendoerfer 1089e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1090e2defae5SThomas Bogendoerfer bool 1091e2defae5SThomas Bogendoerfer 1092e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1093e2defae5SThomas Bogendoerfer bool 1094e2defae5SThomas Bogendoerfer 1095e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1096e2defae5SThomas Bogendoerfer bool 1097e2defae5SThomas Bogendoerfer 1098e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1099e2defae5SThomas Bogendoerfer bool 1100e2defae5SThomas Bogendoerfer 1101e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1102e2defae5SThomas Bogendoerfer bool 1103e2defae5SThomas Bogendoerfer 11040e2794b0SRalf Baechleconfig FW_ARC32 11055e83d430SRalf Baechle bool 11065e83d430SRalf Baechle 1107aaa9fad3SPaul Bolleconfig FW_SNIPROM 1108231a35d3SThomas Bogendoerfer bool 1109231a35d3SThomas Bogendoerfer 11101da177e4SLinus Torvaldsconfig BOOT_ELF32 11111da177e4SLinus Torvalds bool 11121da177e4SLinus Torvalds 1113930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1114930beb5aSFlorian Fainelli bool 1115930beb5aSFlorian Fainelli 1116930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1117930beb5aSFlorian Fainelli bool 1118930beb5aSFlorian Fainelli 1119930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1120930beb5aSFlorian Fainelli bool 1121930beb5aSFlorian Fainelli 1122930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1123930beb5aSFlorian Fainelli bool 1124930beb5aSFlorian Fainelli 11251da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 11261da177e4SLinus Torvalds int 1127a4c0201eSFlorian Fainelli default "4" if MIPS_L1_CACHE_SHIFT_4 1128a4c0201eSFlorian Fainelli default "5" if MIPS_L1_CACHE_SHIFT_5 1129a4c0201eSFlorian Fainelli default "6" if MIPS_L1_CACHE_SHIFT_6 1130a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 11311da177e4SLinus Torvalds default "5" 11321da177e4SLinus Torvalds 11331da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 11341da177e4SLinus Torvalds bool 11351da177e4SLinus Torvalds 11361da177e4SLinus Torvaldsconfig ARC_CONSOLE 11371da177e4SLinus Torvalds bool "ARC console support" 1138e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 11391da177e4SLinus Torvalds 11401da177e4SLinus Torvaldsconfig ARC_MEMORY 11411da177e4SLinus Torvalds bool 114214b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 11431da177e4SLinus Torvalds default y 11441da177e4SLinus Torvalds 11451da177e4SLinus Torvaldsconfig ARC_PROMLIB 11461da177e4SLinus Torvalds bool 1147e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 11481da177e4SLinus Torvalds default y 11491da177e4SLinus Torvalds 11500e2794b0SRalf Baechleconfig FW_ARC64 11511da177e4SLinus Torvalds bool 11521da177e4SLinus Torvalds 11531da177e4SLinus Torvaldsconfig BOOT_ELF64 11541da177e4SLinus Torvalds bool 11551da177e4SLinus Torvalds 11561da177e4SLinus Torvaldsmenu "CPU selection" 11571da177e4SLinus Torvalds 11581da177e4SLinus Torvaldschoice 11591da177e4SLinus Torvalds prompt "CPU type" 11601da177e4SLinus Torvalds default CPU_R4X00 11611da177e4SLinus Torvalds 11620e476d91SHuacai Chenconfig CPU_LOONGSON3 11630e476d91SHuacai Chen bool "Loongson 3 CPU" 11640e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 11650e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 11660e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 11670e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 11680e476d91SHuacai Chen select WEAK_ORDERING 11690e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 11700e476d91SHuacai Chen help 11710e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 11720e476d91SHuacai Chen set with many extensions. 11730e476d91SHuacai Chen 11743702bba5SWu Zhangjinconfig CPU_LOONGSON2E 11753702bba5SWu Zhangjin bool "Loongson 2E" 11763702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 11773702bba5SWu Zhangjin select CPU_LOONGSON2 11782a21c730SFuxin Zhang help 11792a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 11802a21c730SFuxin Zhang with many extensions. 11812a21c730SFuxin Zhang 118225985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 11836f7a251aSWu Zhangjin bonito64. 11846f7a251aSWu Zhangjin 11856f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 11866f7a251aSWu Zhangjin bool "Loongson 2F" 11876f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 11886f7a251aSWu Zhangjin select CPU_LOONGSON2 1189c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 11906f7a251aSWu Zhangjin help 11916f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 11926f7a251aSWu Zhangjin with many extensions. 11936f7a251aSWu Zhangjin 11946f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 11956f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 11966f7a251aSWu Zhangjin Loongson2E. 11976f7a251aSWu Zhangjin 1198ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1199ca585cf9SKelvin Cheung bool "Loongson 1B" 1200ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1201ca585cf9SKelvin Cheung select CPU_LOONGSON1 1202ca585cf9SKelvin Cheung help 1203ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1204ca585cf9SKelvin Cheung release 2 instruction set. 1205ca585cf9SKelvin Cheung 12066e760c8dSRalf Baechleconfig CPU_MIPS32_R1 12076e760c8dSRalf Baechle bool "MIPS32 Release 1" 12087cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 12096e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1210797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1211ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12126e760c8dSRalf Baechle help 12135e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 12141e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12151e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12161e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12171e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12181e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 12191e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 12201e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 12211e5f1caaSRalf Baechle performance. 12221e5f1caaSRalf Baechle 12231e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 12241e5f1caaSRalf Baechle bool "MIPS32 Release 2" 12257cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 12261e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1227797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1228ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1229a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 12302235a54dSSanjay Lal select HAVE_KVM 12311e5f1caaSRalf Baechle help 12325e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 12336e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12346e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12356e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12366e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12371da177e4SLinus Torvalds 12386e760c8dSRalf Baechleconfig CPU_MIPS64_R1 12396e760c8dSRalf Baechle bool "MIPS64 Release 1" 12407cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1241797798c1SRalf Baechle select CPU_HAS_PREFETCH 1242ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1243ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1244ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12459cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 12466e760c8dSRalf Baechle help 12476e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 12486e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12496e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12506e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12516e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12521e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 12531e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 12541e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 12551e5f1caaSRalf Baechle performance. 12561e5f1caaSRalf Baechle 12571e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 12581e5f1caaSRalf Baechle bool "MIPS64 Release 2" 12597cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1260797798c1SRalf Baechle select CPU_HAS_PREFETCH 12611e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 12621e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1263ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12649cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1265a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 12661e5f1caaSRalf Baechle help 12671e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 12681e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12691e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12701e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12711e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12721da177e4SLinus Torvalds 12731da177e4SLinus Torvaldsconfig CPU_R3000 12741da177e4SLinus Torvalds bool "R3000" 12757cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1276f7062ddbSRalf Baechle select CPU_HAS_WB 1277ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1278797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12791da177e4SLinus Torvalds help 12801da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 12811da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 12821da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 12831da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 12841da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 12851da177e4SLinus Torvalds try to recompile with R3000. 12861da177e4SLinus Torvalds 12871da177e4SLinus Torvaldsconfig CPU_TX39XX 12881da177e4SLinus Torvalds bool "R39XX" 12897cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1290ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 12911da177e4SLinus Torvalds 12921da177e4SLinus Torvaldsconfig CPU_VR41XX 12931da177e4SLinus Torvalds bool "R41xx" 12947cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1295ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1296ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 12971da177e4SLinus Torvalds help 12985e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 12991da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 13001da177e4SLinus Torvalds kernel built with this option will not run on any other type of 13011da177e4SLinus Torvalds processor or vice versa. 13021da177e4SLinus Torvalds 13031da177e4SLinus Torvaldsconfig CPU_R4300 13041da177e4SLinus Torvalds bool "R4300" 13057cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1306ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1307ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 13081da177e4SLinus Torvalds help 13091da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 13101da177e4SLinus Torvalds 13111da177e4SLinus Torvaldsconfig CPU_R4X00 13121da177e4SLinus Torvalds bool "R4x00" 13137cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1314ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1315ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1316970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13171da177e4SLinus Torvalds help 13181da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 13191da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 13201da177e4SLinus Torvalds 13211da177e4SLinus Torvaldsconfig CPU_TX49XX 13221da177e4SLinus Torvalds bool "R49XX" 13237cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1324de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1325ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1326ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1327970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13281da177e4SLinus Torvalds 13291da177e4SLinus Torvaldsconfig CPU_R5000 13301da177e4SLinus Torvalds bool "R5000" 13317cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1332ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1333ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1334970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13351da177e4SLinus Torvalds help 13361da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 13371da177e4SLinus Torvalds 13381da177e4SLinus Torvaldsconfig CPU_R5432 13391da177e4SLinus Torvalds bool "R5432" 13407cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 13415e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 13425e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1343970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13441da177e4SLinus Torvalds 1345542c1020SShinya Kuribayashiconfig CPU_R5500 1346542c1020SShinya Kuribayashi bool "R5500" 1347542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1348542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1349542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 13509cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1351542c1020SShinya Kuribayashi help 1352542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1353542c1020SShinya Kuribayashi instruction set. 1354542c1020SShinya Kuribayashi 13551da177e4SLinus Torvaldsconfig CPU_R6000 13561da177e4SLinus Torvalds bool "R6000" 13577cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1358ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 13591da177e4SLinus Torvalds help 13601da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1361c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 13621da177e4SLinus Torvalds 13631da177e4SLinus Torvaldsconfig CPU_NEVADA 13641da177e4SLinus Torvalds bool "RM52xx" 13657cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1366ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1367ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1368970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13691da177e4SLinus Torvalds help 13701da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 13711da177e4SLinus Torvalds 13721da177e4SLinus Torvaldsconfig CPU_R8000 13731da177e4SLinus Torvalds bool "R8000" 13747cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 13755e83d430SRalf Baechle select CPU_HAS_PREFETCH 1376ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 13771da177e4SLinus Torvalds help 13781da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 13791da177e4SLinus Torvalds uncommon and the support for them is incomplete. 13801da177e4SLinus Torvalds 13811da177e4SLinus Torvaldsconfig CPU_R10000 13821da177e4SLinus Torvalds bool "R10000" 13837cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 13845e83d430SRalf Baechle select CPU_HAS_PREFETCH 1385ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1386ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1387797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1388970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13891da177e4SLinus Torvalds help 13901da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 13911da177e4SLinus Torvalds 13921da177e4SLinus Torvaldsconfig CPU_RM7000 13931da177e4SLinus Torvalds bool "RM7000" 13947cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 13955e83d430SRalf Baechle select CPU_HAS_PREFETCH 1396ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1397ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1398797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1399970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14001da177e4SLinus Torvalds 14011da177e4SLinus Torvaldsconfig CPU_SB1 14021da177e4SLinus Torvalds bool "SB1" 14037cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1404ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1405ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1406797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1407970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14080004a9dfSRalf Baechle select WEAK_ORDERING 14091da177e4SLinus Torvalds 1410a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1411a86c7f72SDavid Daney bool "Cavium Octeon processor" 14125e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 14137ee91de4SYoichi Yuasa select ARCH_SPARSEMEM_ENABLE 1414a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1415a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1416a86c7f72SDavid Daney select SYS_SUPPORTS_SMP 1417a86c7f72SDavid Daney select NR_CPUS_DEFAULT_16 1418a86c7f72SDavid Daney select WEAK_ORDERING 1419a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 14209cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14217ed18152SDavid Daney select LIBFDT 14227ed18152SDavid Daney select USE_OF 14239296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 1424930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1425a86c7f72SDavid Daney help 1426a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1427a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1428a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1429a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1430a86c7f72SDavid Daney 1431cd746249SJonas Gorskiconfig CPU_BMIPS 1432cd746249SJonas Gorski bool "Broadcom BMIPS" 1433cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1434cd746249SJonas Gorski select CPU_MIPS32 1435fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1436cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1437cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1438cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1439cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1440cd746249SJonas Gorski select DMA_NONCOHERENT 1441cd746249SJonas Gorski select IRQ_CPU 1442cd746249SJonas Gorski select SWAP_IO_SPACE 1443cd746249SJonas Gorski select WEAK_ORDERING 1444c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 144569aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1446c1c0c461SKevin Cernekee help 1447fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1448c1c0c461SKevin Cernekee 14497f058e85SJayachandran Cconfig CPU_XLR 14507f058e85SJayachandran C bool "Netlogic XLR SoC" 14517f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 14527f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14537f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14547f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1455970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14567f058e85SJayachandran C select WEAK_ORDERING 14577f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14587f058e85SJayachandran C help 14597f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 14601c773ea4SJayachandran C 14611c773ea4SJayachandran Cconfig CPU_XLP 14621c773ea4SJayachandran C bool "Netlogic XLP SoC" 14631c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 14641c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14651c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14661c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 14671c773ea4SJayachandran C select WEAK_ORDERING 14681c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14691c773ea4SJayachandran C select CPU_HAS_PREFETCH 1470d6504846SJayachandran C select CPU_MIPSR2 14711c773ea4SJayachandran C help 14721c773ea4SJayachandran C Netlogic Microsystems XLP processors. 14731da177e4SLinus Torvaldsendchoice 14741da177e4SLinus Torvalds 1475a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1476a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1477a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 1478a6e18781SLeonid Yegoshin depends on CPU_MIPS32_R2 1479a6e18781SLeonid Yegoshin help 1480a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1481a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1482a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1483a6e18781SLeonid Yegoshin 1484a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1485a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1486a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1487a6e18781SLeonid Yegoshin select EVA 1488a6e18781SLeonid Yegoshin default y 1489a6e18781SLeonid Yegoshin help 1490a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1491a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1492a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1493a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1494a6e18781SLeonid Yegoshin 1495622844bfSWu Zhangjinif CPU_LOONGSON2F 1496622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1497622844bfSWu Zhangjin bool 1498622844bfSWu Zhangjin 1499622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1500622844bfSWu Zhangjin bool 1501622844bfSWu Zhangjin 1502622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1503622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1504622844bfSWu Zhangjin default y 1505622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1506622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1507622844bfSWu Zhangjin help 1508622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1509622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1510622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1511622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1512622844bfSWu Zhangjin 1513622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1514622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1515622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1516622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1517622844bfSWu Zhangjin systems. 1518622844bfSWu Zhangjin 1519622844bfSWu Zhangjin If unsure, please say Y. 1520622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1521622844bfSWu Zhangjin 15221b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 15231b93b3c3SWu Zhangjin bool 15241b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 15251b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 152631c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 15271b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1528fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 15294e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 15301b93b3c3SWu Zhangjin 15311b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 15321b93b3c3SWu Zhangjin bool 15331b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 15341b93b3c3SWu Zhangjin 15353702bba5SWu Zhangjinconfig CPU_LOONGSON2 15363702bba5SWu Zhangjin bool 15373702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 15383702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 15393702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1540970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15413702bba5SWu Zhangjin 1542ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1543ca585cf9SKelvin Cheung bool 1544ca585cf9SKelvin Cheung select CPU_MIPS32 1545ca585cf9SKelvin Cheung select CPU_MIPSR2 1546ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1547ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1548ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1549ca585cf9SKelvin Cheung 1550fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 155104fa8bf7SJonas Gorski select SMP_UP if SMP 15521bbb6c1bSKevin Cernekee bool 1553cd746249SJonas Gorski 1554cd746249SJonas Gorskiconfig CPU_BMIPS4350 1555cd746249SJonas Gorski bool 1556cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1557cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1558cd746249SJonas Gorski 1559cd746249SJonas Gorskiconfig CPU_BMIPS4380 1560cd746249SJonas Gorski bool 1561cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1562cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1563cd746249SJonas Gorski 1564cd746249SJonas Gorskiconfig CPU_BMIPS5000 1565cd746249SJonas Gorski bool 1566cd746249SJonas Gorski select MIPS_CPU_SCACHE 1567cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1568cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 15691bbb6c1bSKevin Cernekee 15700e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 15710e476d91SHuacai Chen bool 15720e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 15730e476d91SHuacai Chen 15743702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 15752a21c730SFuxin Zhang bool 15762a21c730SFuxin Zhang 15776f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 15786f7a251aSWu Zhangjin bool 157955045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 158055045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 158122f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 15826f7a251aSWu Zhangjin 1583ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1584ca585cf9SKelvin Cheung bool 1585ca585cf9SKelvin Cheung 15867cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 15877cf8053bSRalf Baechle bool 15887cf8053bSRalf Baechle 15897cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 15907cf8053bSRalf Baechle bool 15917cf8053bSRalf Baechle 1592a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1593a6e18781SLeonid Yegoshin bool 1594a6e18781SLeonid Yegoshin 15957cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 15967cf8053bSRalf Baechle bool 15977cf8053bSRalf Baechle 15987cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 15997cf8053bSRalf Baechle bool 16007cf8053bSRalf Baechle 16017cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 16027cf8053bSRalf Baechle bool 16037cf8053bSRalf Baechle 16047cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 16057cf8053bSRalf Baechle bool 16067cf8053bSRalf Baechle 16077cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 16087cf8053bSRalf Baechle bool 16097cf8053bSRalf Baechle 16107cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 16117cf8053bSRalf Baechle bool 16127cf8053bSRalf Baechle 16137cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 16147cf8053bSRalf Baechle bool 16157cf8053bSRalf Baechle 16167cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 16177cf8053bSRalf Baechle bool 16187cf8053bSRalf Baechle 16197cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 16207cf8053bSRalf Baechle bool 16217cf8053bSRalf Baechle 16227cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 16237cf8053bSRalf Baechle bool 16247cf8053bSRalf Baechle 1625542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1626542c1020SShinya Kuribayashi bool 1627542c1020SShinya Kuribayashi 16287cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 16297cf8053bSRalf Baechle bool 16307cf8053bSRalf Baechle 16317cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 16327cf8053bSRalf Baechle bool 16337cf8053bSRalf Baechle 16347cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 16357cf8053bSRalf Baechle bool 16367cf8053bSRalf Baechle 16377cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 16387cf8053bSRalf Baechle bool 16397cf8053bSRalf Baechle 16407cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 16417cf8053bSRalf Baechle bool 16427cf8053bSRalf Baechle 16437cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 16447cf8053bSRalf Baechle bool 16457cf8053bSRalf Baechle 16465e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 16475e683389SDavid Daney bool 16485e683389SDavid Daney 1649cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1650c1c0c461SKevin Cernekee bool 1651c1c0c461SKevin Cernekee 1652fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1653c1c0c461SKevin Cernekee bool 1654cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1655c1c0c461SKevin Cernekee 1656c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1657c1c0c461SKevin Cernekee bool 1658cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1659c1c0c461SKevin Cernekee 1660c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1661c1c0c461SKevin Cernekee bool 1662cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1663c1c0c461SKevin Cernekee 1664c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1665c1c0c461SKevin Cernekee bool 1666cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1667c1c0c461SKevin Cernekee 16687f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 16697f058e85SJayachandran C bool 16707f058e85SJayachandran C 16711c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 16721c773ea4SJayachandran C bool 16731c773ea4SJayachandran C 167417099b11SRalf Baechle# 167517099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 167617099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 167717099b11SRalf Baechle# 16780004a9dfSRalf Baechleconfig WEAK_ORDERING 16790004a9dfSRalf Baechle bool 168017099b11SRalf Baechle 168117099b11SRalf Baechle# 168217099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 168317099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 168417099b11SRalf Baechle# 168517099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 168617099b11SRalf Baechle bool 16875e83d430SRalf Baechleendmenu 16885e83d430SRalf Baechle 16895e83d430SRalf Baechle# 16905e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 16915e83d430SRalf Baechle# 16925e83d430SRalf Baechleconfig CPU_MIPS32 16935e83d430SRalf Baechle bool 16945e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 16955e83d430SRalf Baechle 16965e83d430SRalf Baechleconfig CPU_MIPS64 16975e83d430SRalf Baechle bool 16985e83d430SRalf Baechle default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 16995e83d430SRalf Baechle 17005e83d430SRalf Baechle# 1701c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 17025e83d430SRalf Baechle# 17035e83d430SRalf Baechleconfig CPU_MIPSR1 17045e83d430SRalf Baechle bool 17055e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 17065e83d430SRalf Baechle 17075e83d430SRalf Baechleconfig CPU_MIPSR2 17085e83d430SRalf Baechle bool 1709a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 17105e83d430SRalf Baechle 1711a6e18781SLeonid Yegoshinconfig EVA 1712a6e18781SLeonid Yegoshin bool 1713a6e18781SLeonid Yegoshin 17145e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 17155e83d430SRalf Baechle bool 17165e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 17175e83d430SRalf Baechle bool 17185e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 17195e83d430SRalf Baechle bool 17205e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 17215e83d430SRalf Baechle bool 172255045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 172355045ff5SWu Zhangjin bool 172455045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 172555045ff5SWu Zhangjin bool 17269cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 17279cffd154SDavid Daney bool 172822f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 172922f1fdfdSWu Zhangjin bool 173082622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 173182622284SDavid Daney bool 1732d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 17335e83d430SRalf Baechle 17348192c9eaSDavid Daney# 17358192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 17368192c9eaSDavid Daney# 17378192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 17388192c9eaSDavid Daney bool 1739f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 17408192c9eaSDavid Daney 17415e83d430SRalf Baechlemenu "Kernel type" 17425e83d430SRalf Baechle 17435e83d430SRalf Baechlechoice 17445e83d430SRalf Baechle prompt "Kernel code model" 17455e83d430SRalf Baechle help 17465e83d430SRalf Baechle You should only select this option if you have a workload that 17475e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 17485e83d430SRalf Baechle large memory. You will only be presented a single option in this 17495e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 17505e83d430SRalf Baechle 17515e83d430SRalf Baechleconfig 32BIT 17525e83d430SRalf Baechle bool "32-bit kernel" 17535e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 17545e83d430SRalf Baechle select TRAD_SIGNALS 17555e83d430SRalf Baechle help 17565e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 17575e83d430SRalf Baechleconfig 64BIT 17585e83d430SRalf Baechle bool "64-bit kernel" 17595e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 17605e83d430SRalf Baechle help 17615e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 17625e83d430SRalf Baechle 17635e83d430SRalf Baechleendchoice 17645e83d430SRalf Baechle 17652235a54dSSanjay Lalconfig KVM_GUEST 17662235a54dSSanjay Lal bool "KVM Guest Kernel" 1767f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 17682235a54dSSanjay Lal help 17692235a54dSSanjay Lal Select this option if building a guest kernel for KVM (Trap & Emulate) mode 17702235a54dSSanjay Lal 17712235a54dSSanjay Lalconfig KVM_HOST_FREQ 17722235a54dSSanjay Lal int "KVM Host Processor Frequency (MHz)" 17732235a54dSSanjay Lal depends on KVM_GUEST 17742235a54dSSanjay Lal default 500 17752235a54dSSanjay Lal help 17762235a54dSSanjay Lal Select this option if building a guest kernel for KVM to skip 17772235a54dSSanjay Lal RTC emulation when determining guest CPU Frequency. Instead, the guest 17782235a54dSSanjay Lal processor frequency is automatically derived from the host frequency. 17792235a54dSSanjay Lal 17801da177e4SLinus Torvaldschoice 17811da177e4SLinus Torvalds prompt "Kernel page size" 17821da177e4SLinus Torvalds default PAGE_SIZE_4KB 17831da177e4SLinus Torvalds 17841da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 17851da177e4SLinus Torvalds bool "4kB" 17860e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 17871da177e4SLinus Torvalds help 17881da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 17891da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 17901da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 17911da177e4SLinus Torvalds recommended for low memory systems. 17921da177e4SLinus Torvalds 17931da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 17941da177e4SLinus Torvalds bool "8kB" 17957d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 17961da177e4SLinus Torvalds help 17971da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 17981da177e4SLinus Torvalds the price of higher memory consumption. This option is available 1799c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 1800c52399beSRalf Baechle suitable Linux distribution to support this. 18011da177e4SLinus Torvalds 18021da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 18031da177e4SLinus Torvalds bool "16kB" 1804714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 18051da177e4SLinus Torvalds help 18061da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 18071da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 1808714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 1809714bfad6SRalf Baechle Linux distribution to support this. 18101da177e4SLinus Torvalds 1811c52399beSRalf Baechleconfig PAGE_SIZE_32KB 1812c52399beSRalf Baechle bool "32kB" 1813c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 1814c52399beSRalf Baechle help 1815c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 1816c52399beSRalf Baechle the price of higher memory consumption. This option is available 1817c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 1818c52399beSRalf Baechle distribution to support this. 1819c52399beSRalf Baechle 18201da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 18211da177e4SLinus Torvalds bool "64kB" 18227d60717eSKees Cook depends on !CPU_R3000 && !CPU_TX39XX 18231da177e4SLinus Torvalds help 18241da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 18251da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 18261da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 1827714bfad6SRalf Baechle writing this option is still high experimental. 18281da177e4SLinus Torvalds 18291da177e4SLinus Torvaldsendchoice 18301da177e4SLinus Torvalds 1831c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 1832c9bace7cSDavid Daney int "Maximum zone order" 1833e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 1834e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 1835e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 1836e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 1837e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 1838e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 1839c9bace7cSDavid Daney range 11 64 1840c9bace7cSDavid Daney default "11" 1841c9bace7cSDavid Daney help 1842c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 1843c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 1844c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 1845c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 1846c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 1847c9bace7cSDavid Daney increase this value. 1848c9bace7cSDavid Daney 1849c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 1850c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 1851c9bace7cSDavid Daney 1852c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 1853c9bace7cSDavid Daney when choosing a value for this option. 1854c9bace7cSDavid Daney 18550ab2b7d0SRaghu Gandhamconfig CEVT_GIC 18560ab2b7d0SRaghu Gandham bool "Use GIC global counter for clock events" 1857b633648cSRalf Baechle depends on IRQ_GIC && !MIPS_SEAD3 18580ab2b7d0SRaghu Gandham help 18590ab2b7d0SRaghu Gandham Use the GIC global counter for the clock events. The R4K clock 18600ab2b7d0SRaghu Gandham event driver is always present, so if the platform ends up not 18610ab2b7d0SRaghu Gandham detecting a GIC, it will fall back to the R4K timer for the 18620ab2b7d0SRaghu Gandham generation of clock events. 18630ab2b7d0SRaghu Gandham 18641da177e4SLinus Torvaldsconfig BOARD_SCACHE 18651da177e4SLinus Torvalds bool 18661da177e4SLinus Torvalds 18671da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 18681da177e4SLinus Torvalds bool 18691da177e4SLinus Torvalds select BOARD_SCACHE 18701da177e4SLinus Torvalds 18719318c51aSChris Dearman# 18729318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 18739318c51aSChris Dearman# 18749318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 18759318c51aSChris Dearman bool 18769318c51aSChris Dearman select BOARD_SCACHE 1877930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_6 18789318c51aSChris Dearman 18791da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 18801da177e4SLinus Torvalds bool 18811da177e4SLinus Torvalds select BOARD_SCACHE 18821da177e4SLinus Torvalds 18831da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 18841da177e4SLinus Torvalds bool 18851da177e4SLinus Torvalds select BOARD_SCACHE 18861da177e4SLinus Torvalds 18871da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 18881da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 18891da177e4SLinus Torvalds depends on CPU_SB1 18901da177e4SLinus Torvalds help 18911da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 18921da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 18931da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 18941da177e4SLinus Torvalds 18951da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 1896c8094b53SRalf Baechle bool 18971da177e4SLinus Torvalds 18983165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 18993165c846SFlorian Fainelli bool 19003165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 19013165c846SFlorian Fainelli 190291405eb6SFlorian Fainelliconfig CPU_R4K_FPU 190391405eb6SFlorian Fainelli bool 190491405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 190591405eb6SFlorian Fainelli 190662cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 190762cedc4fSFlorian Fainelli bool 190862cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 190962cedc4fSFlorian Fainelli 191059d6ab86SRalf Baechleconfig MIPS_MT_SMP 1911a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 191259d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 191359d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 1914d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1915c080faa5SSteven J. Hill select SYNC_R4K 19160c2cb004SPaul Burton select MIPS_GIC_IPI 191759d6ab86SRalf Baechle select MIPS_MT 191859d6ab86SRalf Baechle select SMP 191987353d8aSRalf Baechle select SMP_UP 1920c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 1921c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 1922399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 192359d6ab86SRalf Baechle help 1924c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 1925c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 1926c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 1927c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 1928c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 192959d6ab86SRalf Baechle 1930f41ae0b2SRalf Baechleconfig MIPS_MT 1931f41ae0b2SRalf Baechle bool 1932f41ae0b2SRalf Baechle 19330ab7aefcSRalf Baechleconfig SCHED_SMT 19340ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 19350ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 19360ab7aefcSRalf Baechle default n 19370ab7aefcSRalf Baechle help 19380ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 19390ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 19400ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 19410ab7aefcSRalf Baechle 19420ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 19430ab7aefcSRalf Baechle bool 19440ab7aefcSRalf Baechle 1945f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 1946f41ae0b2SRalf Baechle bool 1947f41ae0b2SRalf Baechle 1948f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 1949f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 1950f088fc84SRalf Baechle default y 1951b633648cSRalf Baechle depends on MIPS_MT_SMP 195207cc0c9eSRalf Baechle 195307cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 195407cc0c9eSRalf Baechle bool "VPE loader support." 1955704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 195607cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 195707cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 195807cc0c9eSRalf Baechle select MIPS_MT 195907cc0c9eSRalf Baechle help 196007cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 196107cc0c9eSRalf Baechle onto another VPE and running it. 1962f088fc84SRalf Baechle 196317a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 196417a1d523SDeng-Cheng Zhu bool 196517a1d523SDeng-Cheng Zhu default "y" 196617a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 196717a1d523SDeng-Cheng Zhu 19681a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 19691a2a6d7eSDeng-Cheng Zhu bool 19701a2a6d7eSDeng-Cheng Zhu default "y" 19711a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 19721a2a6d7eSDeng-Cheng Zhu 1973e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 1974e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 1975e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 1976e01402b1SRalf Baechle default y 1977e01402b1SRalf Baechle help 1978e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 1979e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 1980e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 1981e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 1982e01402b1SRalf Baechle 1983e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 1984e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 1985e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 19865e83d430SRalf Baechle help 1987e01402b1SRalf Baechle 1988da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 1989da615cf6SDeng-Cheng Zhu bool 1990da615cf6SDeng-Cheng Zhu default "y" 1991da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 1992da615cf6SDeng-Cheng Zhu 19932c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 19942c973ef0SDeng-Cheng Zhu bool 19952c973ef0SDeng-Cheng Zhu default "y" 19962c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 19972c973ef0SDeng-Cheng Zhu 19984a16ff4cSRalf Baechleconfig MIPS_CMP 19995cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 2000b633648cSRalf Baechle depends on SYS_SUPPORTS_MIPS_CMP 200172e20142SPaul Burton select MIPS_GIC_IPI 2002eb9b5141STim Anderson select SYNC_R4K 20034a16ff4cSRalf Baechle select WEAK_ORDERING 20044a16ff4cSRalf Baechle default n 20054a16ff4cSRalf Baechle help 2006044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2007044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2008044505c7SPaul Burton its ability to start secondary CPUs. 20094a16ff4cSRalf Baechle 20105cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 20115cac93b3SPaul Burton instead of this. 20125cac93b3SPaul Burton 20130ee958e1SPaul Burtonconfig MIPS_CPS 20140ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 20150ee958e1SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 20160ee958e1SPaul Burton select MIPS_CM 20170ee958e1SPaul Burton select MIPS_CPC 20181d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 20190ee958e1SPaul Burton select MIPS_GIC_IPI 20200ee958e1SPaul Burton select SMP 20210ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 20221d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 20230ee958e1SPaul Burton select SYS_SUPPORTS_SMP 20240ee958e1SPaul Burton select WEAK_ORDERING 20250ee958e1SPaul Burton help 20260ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 20270ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 20280ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 20290ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 20300ee958e1SPaul Burton support is unavailable. 20310ee958e1SPaul Burton 20323179d37eSPaul Burtonconfig MIPS_CPS_PM 20333179d37eSPaul Burton bool 20343179d37eSPaul Burton 203572e20142SPaul Burtonconfig MIPS_GIC_IPI 203672e20142SPaul Burton bool 203772e20142SPaul Burton 20389f98f3ddSPaul Burtonconfig MIPS_CM 20399f98f3ddSPaul Burton bool 20409f98f3ddSPaul Burton 20419c38cf44SPaul Burtonconfig MIPS_CPC 20429c38cf44SPaul Burton bool 20432600990eSRalf Baechle 20441da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 20451da177e4SLinus Torvalds bool 20461da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 20471da177e4SLinus Torvalds default y 20481da177e4SLinus Torvalds 20491da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 20501da177e4SLinus Torvalds bool 20511da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 20521da177e4SLinus Torvalds default y 20531da177e4SLinus Torvalds 20541da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 20551da177e4SLinus Torvalds bool 20561da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 20571da177e4SLinus Torvalds default y 20581da177e4SLinus Torvalds 20592235a54dSSanjay Lal 20601da177e4SLinus Torvaldsconfig 64BIT_PHYS_ADDR 2061d806cb2bSRalf Baechle bool 20621da177e4SLinus Torvalds 206360ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 206460ec6571Spascal@pabr.org def_bool 64BIT_PHYS_ADDR 206560ec6571Spascal@pabr.org 20669693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 20679693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 20689693a853SFranck Bui-Huu bool "Support for the SmartMIPS ASE" 20699693a853SFranck Bui-Huu help 20709693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 20719693a853SFranck Bui-Huu increased security at both hardware and software level for 20729693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 20739693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 20749693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 20759693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 20769693a853SFranck Bui-Huu here. 20779693a853SFranck Bui-Huu 2078bce86083SSteven J. Hillconfig CPU_MICROMIPS 2079bce86083SSteven J. Hill depends on SYS_SUPPORTS_MICROMIPS 2080bce86083SSteven J. Hill bool "Build kernel using microMIPS ISA" 2081bce86083SSteven J. Hill help 2082bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2083bce86083SSteven J. Hill microMIPS ISA 2084bce86083SSteven J. Hill 2085a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 2086a5e9a69eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2087a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 2088a5e9a69eSPaul Burton default y 2089a5e9a69eSPaul Burton help 2090a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2091a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 20921db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 20931db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 20941db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 20951db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 20961db1af84SPaul Burton the size & complexity of your kernel. 2097a5e9a69eSPaul Burton 2098a5e9a69eSPaul Burton If unsure, say Y. 2099a5e9a69eSPaul Burton 21001da177e4SLinus Torvaldsconfig CPU_HAS_WB 2101f7062ddbSRalf Baechle bool 2102e01402b1SRalf Baechle 2103df0ac8a4SKevin Cernekeeconfig XKS01 2104df0ac8a4SKevin Cernekee bool 2105df0ac8a4SKevin Cernekee 2106f41ae0b2SRalf Baechle# 2107f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2108f41ae0b2SRalf Baechle# 2109e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2110f41ae0b2SRalf Baechle bool 2111e01402b1SRalf Baechle 2112f41ae0b2SRalf Baechle# 2113f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2114f41ae0b2SRalf Baechle# 2115e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2116f41ae0b2SRalf Baechle bool 2117e01402b1SRalf Baechle 21181da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 21191da177e4SLinus Torvalds bool 21201da177e4SLinus Torvalds depends on !CPU_R3000 21211da177e4SLinus Torvalds default y 21221da177e4SLinus Torvalds 21231da177e4SLinus Torvalds# 212420d60d99SMaciej W. Rozycki# CPU non-features 212520d60d99SMaciej W. Rozycki# 212620d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 212720d60d99SMaciej W. Rozycki bool 212820d60d99SMaciej W. Rozycki 212920d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 213020d60d99SMaciej W. Rozycki bool 213120d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 213220d60d99SMaciej W. Rozycki 213320d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 213420d60d99SMaciej W. Rozycki bool 213520d60d99SMaciej W. Rozycki 213620d60d99SMaciej W. Rozycki# 21371da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 21381da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 21391da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 21401da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 21411da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 21421da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 21431da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 21441da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2145797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2146797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2147797798c1SRalf Baechle# support. 21481da177e4SLinus Torvalds# 21491da177e4SLinus Torvaldsconfig HIGHMEM 21501da177e4SLinus Torvalds bool "High Memory Support" 2151a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2152797798c1SRalf Baechle 2153797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2154797798c1SRalf Baechle bool 2155797798c1SRalf Baechle 2156797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2157797798c1SRalf Baechle bool 21581da177e4SLinus Torvalds 21599693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 21609693a853SFranck Bui-Huu bool 21619693a853SFranck Bui-Huu 2162a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2163a6a4834cSSteven J. Hill bool 2164a6a4834cSSteven J. Hill 2165377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2166377cb1b6SRalf Baechle bool 2167377cb1b6SRalf Baechle help 2168377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2169377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2170377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2171377cb1b6SRalf Baechle 2172a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2173a5e9a69eSPaul Burton bool 2174a5e9a69eSPaul Burton 2175b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2176b4819b59SYoichi Yuasa def_bool y 2177f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2178b4819b59SYoichi Yuasa 2179d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2180d8cb4e11SRalf Baechle bool 2181d8cb4e11SRalf Baechle default y if SGI_IP27 2182d8cb4e11SRalf Baechle help 21833dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2184d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2185d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2186d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2187d8cb4e11SRalf Baechle 2188b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2189b1c6cd42SAtsushi Nemoto bool 21907de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 219131473747SAtsushi Nemoto 2192d8cb4e11SRalf Baechleconfig NUMA 2193d8cb4e11SRalf Baechle bool "NUMA Support" 2194d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2195d8cb4e11SRalf Baechle help 2196d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2197d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2198d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2199d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2200d8cb4e11SRalf Baechle disabled. 2201d8cb4e11SRalf Baechle 2202d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2203d8cb4e11SRalf Baechle bool 2204d8cb4e11SRalf Baechle 2205c80d79d7SYasunori Gotoconfig NODES_SHIFT 2206c80d79d7SYasunori Goto int 2207c80d79d7SYasunori Goto default "6" 2208c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2209c80d79d7SYasunori Goto 221014f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 221114f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 2212b633648cSRalf Baechle depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) 221314f70012SDeng-Cheng Zhu default y 221414f70012SDeng-Cheng Zhu help 221514f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 221614f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 221714f70012SDeng-Cheng Zhu 2218b4819b59SYoichi Yuasasource "mm/Kconfig" 2219b4819b59SYoichi Yuasa 22201da177e4SLinus Torvaldsconfig SMP 22211da177e4SLinus Torvalds bool "Multi-Processing support" 2222e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2223e73ea273SRalf Baechle help 22241da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 22254a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 22264a474157SRobert Graffham than one CPU, say Y. 22271da177e4SLinus Torvalds 22284a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 22291da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 22301da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 22314a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 22321da177e4SLinus Torvalds will run faster if you say N here. 22331da177e4SLinus Torvalds 22341da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 22351da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 22361da177e4SLinus Torvalds 223703502faaSAdrian Bunk See also the SMP-HOWTO available at 223803502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 22391da177e4SLinus Torvalds 22401da177e4SLinus Torvalds If you don't know what to do here, say N. 22411da177e4SLinus Torvalds 224287353d8aSRalf Baechleconfig SMP_UP 224387353d8aSRalf Baechle bool 224487353d8aSRalf Baechle 22454a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 22464a16ff4cSRalf Baechle bool 22474a16ff4cSRalf Baechle 22480ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 22490ee958e1SPaul Burton bool 22500ee958e1SPaul Burton 2251e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2252e73ea273SRalf Baechle bool 2253e73ea273SRalf Baechle 2254130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2255130e2fb7SRalf Baechle bool 2256130e2fb7SRalf Baechle 2257130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2258130e2fb7SRalf Baechle bool 2259130e2fb7SRalf Baechle 2260130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2261130e2fb7SRalf Baechle bool 2262130e2fb7SRalf Baechle 2263130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2264130e2fb7SRalf Baechle bool 2265130e2fb7SRalf Baechle 2266130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2267130e2fb7SRalf Baechle bool 2268130e2fb7SRalf Baechle 22691da177e4SLinus Torvaldsconfig NR_CPUS 2270*a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2271*a91796a9SJayachandran C range 2 256 22721da177e4SLinus Torvalds depends on SMP 2273130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2274130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2275130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2276130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2277130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 22781da177e4SLinus Torvalds help 22791da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 22801da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 22811da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 228272ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 228372ede9b1SAtsushi Nemoto and 2 for all others. 22841da177e4SLinus Torvalds 22851da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 228672ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 228772ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 228872ede9b1SAtsushi Nemoto power of two. 22891da177e4SLinus Torvalds 2290399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2291399aaa25SAl Cooper bool 2292399aaa25SAl Cooper 22931723b4a3SAtsushi Nemoto# 22941723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 22951723b4a3SAtsushi Nemoto# 22961723b4a3SAtsushi Nemoto 22971723b4a3SAtsushi Nemotochoice 22981723b4a3SAtsushi Nemoto prompt "Timer frequency" 22991723b4a3SAtsushi Nemoto default HZ_250 23001723b4a3SAtsushi Nemoto help 23011723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 23021723b4a3SAtsushi Nemoto 23031723b4a3SAtsushi Nemoto config HZ_48 23040f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 23051723b4a3SAtsushi Nemoto 23061723b4a3SAtsushi Nemoto config HZ_100 23071723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 23081723b4a3SAtsushi Nemoto 23091723b4a3SAtsushi Nemoto config HZ_128 23101723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 23111723b4a3SAtsushi Nemoto 23121723b4a3SAtsushi Nemoto config HZ_250 23131723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 23141723b4a3SAtsushi Nemoto 23151723b4a3SAtsushi Nemoto config HZ_256 23161723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 23171723b4a3SAtsushi Nemoto 23181723b4a3SAtsushi Nemoto config HZ_1000 23191723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 23201723b4a3SAtsushi Nemoto 23211723b4a3SAtsushi Nemoto config HZ_1024 23221723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 23231723b4a3SAtsushi Nemoto 23241723b4a3SAtsushi Nemotoendchoice 23251723b4a3SAtsushi Nemoto 23261723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 23271723b4a3SAtsushi Nemoto bool 23281723b4a3SAtsushi Nemoto 23291723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 23301723b4a3SAtsushi Nemoto bool 23311723b4a3SAtsushi Nemoto 23321723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 23331723b4a3SAtsushi Nemoto bool 23341723b4a3SAtsushi Nemoto 23351723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 23361723b4a3SAtsushi Nemoto bool 23371723b4a3SAtsushi Nemoto 23381723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 23391723b4a3SAtsushi Nemoto bool 23401723b4a3SAtsushi Nemoto 23411723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 23421723b4a3SAtsushi Nemoto bool 23431723b4a3SAtsushi Nemoto 23441723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 23451723b4a3SAtsushi Nemoto bool 23461723b4a3SAtsushi Nemoto 23471723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 23481723b4a3SAtsushi Nemoto bool 23491723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 23501723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 23511723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 23521723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 23531723b4a3SAtsushi Nemoto 23541723b4a3SAtsushi Nemotoconfig HZ 23551723b4a3SAtsushi Nemoto int 23561723b4a3SAtsushi Nemoto default 48 if HZ_48 23571723b4a3SAtsushi Nemoto default 100 if HZ_100 23581723b4a3SAtsushi Nemoto default 128 if HZ_128 23591723b4a3SAtsushi Nemoto default 250 if HZ_250 23601723b4a3SAtsushi Nemoto default 256 if HZ_256 23611723b4a3SAtsushi Nemoto default 1000 if HZ_1000 23621723b4a3SAtsushi Nemoto default 1024 if HZ_1024 23631723b4a3SAtsushi Nemoto 2364e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 23651da177e4SLinus Torvalds 2366ea6e942bSAtsushi Nemotoconfig KEXEC 23677d60717eSKees Cook bool "Kexec system call" 2368ea6e942bSAtsushi Nemoto help 2369ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2370ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 23713dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2372ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2373ea6e942bSAtsushi Nemoto 237401dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2375ea6e942bSAtsushi Nemoto 2376ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2377ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2378bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2379bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2380bf220695SGeert Uytterhoeven made. 2381ea6e942bSAtsushi Nemoto 23827aa1c8f4SRalf Baechleconfig CRASH_DUMP 23837aa1c8f4SRalf Baechle bool "Kernel crash dumps" 23847aa1c8f4SRalf Baechle help 23857aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 23867aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 23877aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 23887aa1c8f4SRalf Baechle a specially reserved region and then later executed after 23897aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 23907aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 23917aa1c8f4SRalf Baechle PHYSICAL_START. 23927aa1c8f4SRalf Baechle 23937aa1c8f4SRalf Baechleconfig PHYSICAL_START 23947aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 23957aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 23967aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 23977aa1c8f4SRalf Baechle depends on CRASH_DUMP 23987aa1c8f4SRalf Baechle help 23997aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 24007aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 24017aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 24027aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 24037aa1c8f4SRalf Baechle passed to the panic-ed kernel). 24047aa1c8f4SRalf Baechle 2405ea6e942bSAtsushi Nemotoconfig SECCOMP 2406ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2407293c5bd1SRalf Baechle depends on PROC_FS 2408ea6e942bSAtsushi Nemoto default y 2409ea6e942bSAtsushi Nemoto help 2410ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2411ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2412ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2413ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2414ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2415ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2416ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2417ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2418ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2419ea6e942bSAtsushi Nemoto 2420ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2421ea6e942bSAtsushi Nemoto 2422597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 242306e2e882SPaul Burton bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)" 2424597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2425597ce172SPaul Burton help 2426597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2427597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2428597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2429597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2430597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2431597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2432597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2433597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2434597ce172SPaul Burton saying N here. 2435597ce172SPaul Burton 243606e2e882SPaul Burton Although binutils currently supports use of this flag the details 243706e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 243806e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 243906e2e882SPaul Burton behaviour before the details have been finalised, this option should 244006e2e882SPaul Burton be considered experimental and only enabled by those working upon 244106e2e882SPaul Burton said details. 244206e2e882SPaul Burton 244306e2e882SPaul Burton If unsure, say N. 2444597ce172SPaul Burton 2445f2ffa5abSDezhong Diaoconfig USE_OF 24460b3e06fdSJonas Gorski bool 2447f2ffa5abSDezhong Diao select OF 2448e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2449abd2363fSGrant Likely select IRQ_DOMAIN 2450f2ffa5abSDezhong Diao 24515e83d430SRalf Baechleendmenu 24525e83d430SRalf Baechle 24531df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 24541df0f0ffSAtsushi Nemoto bool 24551df0f0ffSAtsushi Nemoto default y 24561df0f0ffSAtsushi Nemoto 24571df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 24581df0f0ffSAtsushi Nemoto bool 24591df0f0ffSAtsushi Nemoto default y 24601df0f0ffSAtsushi Nemoto 2461b6c3539bSRalf Baechlesource "init/Kconfig" 2462b6c3539bSRalf Baechle 2463dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2464dc52ddc0SMatt Helsley 24651da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 24661da177e4SLinus Torvalds 24675e83d430SRalf Baechleconfig HW_HAS_EISA 24685e83d430SRalf Baechle bool 24691da177e4SLinus Torvaldsconfig HW_HAS_PCI 24701da177e4SLinus Torvalds bool 24711da177e4SLinus Torvalds 24721da177e4SLinus Torvaldsconfig PCI 24731da177e4SLinus Torvalds bool "Support for PCI controller" 24741da177e4SLinus Torvalds depends on HW_HAS_PCI 2475abb4ae46SRalf Baechle select PCI_DOMAINS 24760f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 24771da177e4SLinus Torvalds help 24781da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 24791da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 24801da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 24811da177e4SLinus Torvalds say Y, otherwise N. 24821da177e4SLinus Torvalds 24830e476d91SHuacai Chenconfig HT_PCI 24840e476d91SHuacai Chen bool "Support for HT-linked PCI" 24850e476d91SHuacai Chen default y 24860e476d91SHuacai Chen depends on CPU_LOONGSON3 24870e476d91SHuacai Chen select PCI 24880e476d91SHuacai Chen select PCI_DOMAINS 24890e476d91SHuacai Chen help 24900e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 24910e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 24920e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 24930e476d91SHuacai Chen 24941da177e4SLinus Torvaldsconfig PCI_DOMAINS 24951da177e4SLinus Torvalds bool 24961da177e4SLinus Torvalds 24971da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 24981da177e4SLinus Torvalds 24993f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 25003f787ca4SJonas Gorski 25011da177e4SLinus Torvalds# 25021da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 25031da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 25041da177e4SLinus Torvalds# users to choose the right thing ... 25051da177e4SLinus Torvalds# 25061da177e4SLinus Torvaldsconfig ISA 25071da177e4SLinus Torvalds bool 25081da177e4SLinus Torvalds 25091da177e4SLinus Torvaldsconfig EISA 25101da177e4SLinus Torvalds bool "EISA support" 25115e83d430SRalf Baechle depends on HW_HAS_EISA 25121da177e4SLinus Torvalds select ISA 2513aa414dffSRalf Baechle select GENERIC_ISA_DMA 25141da177e4SLinus Torvalds ---help--- 25151da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 25161da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 25171da177e4SLinus Torvalds 25181da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 25191da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 25201da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 25211da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 25221da177e4SLinus Torvalds 25231da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 25241da177e4SLinus Torvalds 25251da177e4SLinus Torvalds Otherwise, say N. 25261da177e4SLinus Torvalds 25271da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 25281da177e4SLinus Torvalds 25291da177e4SLinus Torvaldsconfig TC 25301da177e4SLinus Torvalds bool "TURBOchannel support" 25311da177e4SLinus Torvalds depends on MACH_DECSTATION 25321da177e4SLinus Torvalds help 253350a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 253450a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 253550a23e6eSJustin P. Mattock at: 253650a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 253750a23e6eSJustin P. Mattock and: 253850a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 253950a23e6eSJustin P. Mattock Linux driver support status is documented at: 254050a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 25411da177e4SLinus Torvalds 25421da177e4SLinus Torvaldsconfig MMU 25431da177e4SLinus Torvalds bool 25441da177e4SLinus Torvalds default y 25451da177e4SLinus Torvalds 2546d865bea4SRalf Baechleconfig I8253 2547d865bea4SRalf Baechle bool 2548798778b8SRussell King select CLKSRC_I8253 25492d02612fSThomas Gleixner select CLKEVT_I8253 25509726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2551d865bea4SRalf Baechle 2552e05eb3f8SRalf Baechleconfig ZONE_DMA 2553e05eb3f8SRalf Baechle bool 2554e05eb3f8SRalf Baechle 2555cce335aeSRalf Baechleconfig ZONE_DMA32 2556cce335aeSRalf Baechle bool 2557cce335aeSRalf Baechle 25581da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 25591da177e4SLinus Torvalds 25601da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 25611da177e4SLinus Torvalds 2562388b78adSAlexandre Bounineconfig RAPIDIO 256356abde72SAlexandre Bounine tristate "RapidIO support" 2564388b78adSAlexandre Bounine depends on PCI 2565388b78adSAlexandre Bounine default n 2566388b78adSAlexandre Bounine help 2567388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2568388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2569388b78adSAlexandre Bounine 2570388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2571388b78adSAlexandre Bounine 25721da177e4SLinus Torvaldsendmenu 25731da177e4SLinus Torvalds 25741da177e4SLinus Torvaldsmenu "Executable file formats" 25751da177e4SLinus Torvalds 25761da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 25771da177e4SLinus Torvalds 25781da177e4SLinus Torvaldsconfig TRAD_SIGNALS 25791da177e4SLinus Torvalds bool 25801da177e4SLinus Torvalds 25811da177e4SLinus Torvaldsconfig MIPS32_COMPAT 25821da177e4SLinus Torvalds bool "Kernel support for Linux/MIPS 32-bit binary compatibility" 2583875d43e7SRalf Baechle depends on 64BIT 25841da177e4SLinus Torvalds help 25851da177e4SLinus Torvalds Select this option if you want Linux/MIPS 32-bit binary 25861da177e4SLinus Torvalds compatibility. Since all software available for Linux/MIPS is 25871da177e4SLinus Torvalds currently 32-bit you should say Y here. 25881da177e4SLinus Torvalds 25891da177e4SLinus Torvaldsconfig COMPAT 25901da177e4SLinus Torvalds bool 25911da177e4SLinus Torvalds depends on MIPS32_COMPAT 259248b25c43SChris Metcalf select ARCH_WANT_OLD_COMPAT_IPC 25931da177e4SLinus Torvalds default y 25941da177e4SLinus Torvalds 259505e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 259605e43966SAtsushi Nemoto bool 259705e43966SAtsushi Nemoto depends on COMPAT && SYSVIPC 259805e43966SAtsushi Nemoto default y 259905e43966SAtsushi Nemoto 26001da177e4SLinus Torvaldsconfig MIPS32_O32 26011da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 26021da177e4SLinus Torvalds depends on MIPS32_COMPAT 26031da177e4SLinus Torvalds help 26041da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 26051da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 26061da177e4SLinus Torvalds existing binaries are in this format. 26071da177e4SLinus Torvalds 26081da177e4SLinus Torvalds If unsure, say Y. 26091da177e4SLinus Torvalds 26101da177e4SLinus Torvaldsconfig MIPS32_N32 26111da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 26121da177e4SLinus Torvalds depends on MIPS32_COMPAT 26131da177e4SLinus Torvalds help 26141da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 26151da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 26161da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 26171da177e4SLinus Torvalds cases. 26181da177e4SLinus Torvalds 26191da177e4SLinus Torvalds If unsure, say N. 26201da177e4SLinus Torvalds 26211da177e4SLinus Torvaldsconfig BINFMT_ELF32 26221da177e4SLinus Torvalds bool 26231da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 26241da177e4SLinus Torvalds 26252116245eSRalf Baechleendmenu 26261da177e4SLinus Torvalds 26272116245eSRalf Baechlemenu "Power management options" 2628952fa954SRodolfo Giometti 2629363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2630363c55caSWu Zhangjin def_bool y 26313f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2632363c55caSWu Zhangjin 2633f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2634f4cb5700SJohannes Berg def_bool y 26353f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2636f4cb5700SJohannes Berg 26372116245eSRalf Baechlesource "kernel/power/Kconfig" 2638952fa954SRodolfo Giometti 26391da177e4SLinus Torvaldsendmenu 26401da177e4SLinus Torvalds 26417a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 26427a998935SViresh Kumar bool 26437a998935SViresh Kumar 26447a998935SViresh Kumarmenu "CPU Power Management" 2645c095ebafSPaul Burton 2646c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 26477a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 26487a998935SViresh Kumarendif 26499726b43aSWu Zhangjin 2650c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 2651c095ebafSPaul Burton 2652c095ebafSPaul Burtonendmenu 2653c095ebafSPaul Burton 2654d5950b43SSam Ravnborgsource "net/Kconfig" 2655d5950b43SSam Ravnborg 26561da177e4SLinus Torvaldssource "drivers/Kconfig" 26571da177e4SLinus Torvalds 265898cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 265998cdee0eSRalf Baechle 26601da177e4SLinus Torvaldssource "fs/Kconfig" 26611da177e4SLinus Torvalds 26621da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 26631da177e4SLinus Torvalds 26641da177e4SLinus Torvaldssource "security/Kconfig" 26651da177e4SLinus Torvalds 26661da177e4SLinus Torvaldssource "crypto/Kconfig" 26671da177e4SLinus Torvalds 26681da177e4SLinus Torvaldssource "lib/Kconfig" 26692235a54dSSanjay Lal 26702235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 2671