11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 5393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 6c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 7f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 8ec7748b5SSam Ravnborg select HAVE_IDE 942d4b839SMathieu Desnoyers select HAVE_OPROFILE 107f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 117f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1288547001SJason Wessel select HAVE_ARCH_KGDB 13490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 14c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 157563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 16d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 1769a7d1b3SWu Zhangjin select HAVE_FUNCTION_TRACE_MCOUNT_TEST 18538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 19538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2064575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2129c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 22c1bf207dSDavid Daney select HAVE_KPROBES 23c1bf207dSDavid Daney select HAVE_KRETPROBES 24b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 251d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 26e26d196cSDavid Daney select ARCH_BINFMT_ELF_RANDOMIZE_PIE 27383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 2821a41faaSWu Zhangjin select RTC_LIB if !MACH_LOONGSON 292b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 307463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3148e1fd5aSDavid Daney select HAVE_DMA_ATTRS 3248e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 333bd27e32SDavid Daney select GENERIC_IRQ_PROBE 34f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3578857614SMarkos Chandras select GENERIC_PCI_IOMAP 3694bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 37c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 380f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 399d15ffc8STejun Heo select HAVE_MEMBLOCK 409d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 419d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 42360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 434b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 44cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 45cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 46786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 474febd95aSStephen Rothwell select VIRT_TO_BUS 482f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 492f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5050150d2bSAl Viro select CLONE_BACKWARDS 51d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5219952a92SKees Cook select HAVE_CC_STACKPROTECTOR 531da177e4SLinus Torvalds 541da177e4SLinus Torvaldsmenu "Machine selection" 551da177e4SLinus Torvalds 565e83d430SRalf Baechlechoice 575e83d430SRalf Baechle prompt "System type" 585e83d430SRalf Baechle default SGI_IP22 591da177e4SLinus Torvalds 6042a4f17dSManuel Laussconfig MIPS_ALCHEMY 61c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 6242a4f17dSManuel Lauss select 64BIT_PHYS_ADDR 63f772cdb2SRalf Baechle select CEVT_R4K 64d7ea335cSSteven J. Hill select CSRC_R4K 6542a4f17dSManuel Lauss select IRQ_CPU 6642a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 6742a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 6842a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 69efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 701b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 7137663860SManuel Lauss select USB_ARCH_HAS_OHCI 7237663860SManuel Lauss select USB_ARCH_HAS_EHCI 731da177e4SLinus Torvalds 747ca5dc14SFlorian Fainelliconfig AR7 757ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 767ca5dc14SFlorian Fainelli select BOOT_ELF32 777ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 787ca5dc14SFlorian Fainelli select CEVT_R4K 797ca5dc14SFlorian Fainelli select CSRC_R4K 807ca5dc14SFlorian Fainelli select IRQ_CPU 817ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 827ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 837ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 847ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 857ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 867ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 871b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 885f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 897ca5dc14SFlorian Fainelli select VLYNQ 908551fb64SYoichi Yuasa select HAVE_CLK 917ca5dc14SFlorian Fainelli help 927ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 937ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 947ca5dc14SFlorian Fainelli 95d4a67d9dSGabor Juhosconfig ATH79 96d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 976eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 98d4a67d9dSGabor Juhos select BOOT_RAW 99d4a67d9dSGabor Juhos select CEVT_R4K 100d4a67d9dSGabor Juhos select CSRC_R4K 101d4a67d9dSGabor Juhos select DMA_NONCOHERENT 10294638067SGabor Juhos select HAVE_CLK 1032c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 104d4a67d9dSGabor Juhos select IRQ_CPU 1050aabf1a4SGabor Juhos select MIPS_MACHINE 106d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 107d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 108d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 109d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 110d4a67d9dSGabor Juhos help 111d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 112d4a67d9dSGabor Juhos 1131c0c13ebSAurelien Jarnoconfig BCM47XX 114c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1152da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 116fe08f8c2SHauke Mehrtens select BOOT_RAW 11742f77542SRalf Baechle select CEVT_R4K 118940f6b48SRalf Baechle select CSRC_R4K 1191c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1201c0c13ebSAurelien Jarno select HW_HAS_PCI 1211c0c13ebSAurelien Jarno select IRQ_CPU 122314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 123dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1241c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1251c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 12625e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 127e1ccbb65SHauke Mehrtens select EARLY_PRINTK_8250 if EARLY_PRINTK 1281c0c13ebSAurelien Jarno help 1291c0c13ebSAurelien Jarno Support for BCM47XX based boards 1301c0c13ebSAurelien Jarno 131e7300d04SMaxime Bizonconfig BCM63XX 132e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 133ae8de61cSFlorian Fainelli select BOOT_RAW 134e7300d04SMaxime Bizon select CEVT_R4K 135e7300d04SMaxime Bizon select CSRC_R4K 136e7300d04SMaxime Bizon select DMA_NONCOHERENT 137e7300d04SMaxime Bizon select IRQ_CPU 138e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 139e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 140e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 141e7300d04SMaxime Bizon select SWAP_IO_SPACE 142e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 1433e82eeebSYoichi Yuasa select HAVE_CLK 144af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 145e7300d04SMaxime Bizon help 146e7300d04SMaxime Bizon Support for BCM63XX based boards 147e7300d04SMaxime Bizon 1481da177e4SLinus Torvaldsconfig MIPS_COBALT 1493fa986faSMartin Michlmayr bool "Cobalt Server" 15042f77542SRalf Baechle select CEVT_R4K 151940f6b48SRalf Baechle select CSRC_R4K 1521097c6acSYoichi Yuasa select CEVT_GT641XX 1531da177e4SLinus Torvalds select DMA_NONCOHERENT 1548a8594a7SYoichi Yuasa select EARLY_PRINTK_8250 if EARLY_PRINTK 1551da177e4SLinus Torvalds select HW_HAS_PCI 156d865bea4SRalf Baechle select I8253 1571da177e4SLinus Torvalds select I8259 1581da177e4SLinus Torvalds select IRQ_CPU 159d5ab1a69SYoichi Yuasa select IRQ_GT641XX 160252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 161e25bfc92SYoichi Yuasa select PCI 1627cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 1630a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 164ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1650e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 1665e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1671da177e4SLinus Torvalds 1681da177e4SLinus Torvaldsconfig MACH_DECSTATION 1693fa986faSMartin Michlmayr bool "DECstations" 1701da177e4SLinus Torvalds select BOOT_ELF32 1716457d9fcSYoichi Yuasa select CEVT_DS1287 17242f77542SRalf Baechle select CEVT_R4K 1734247417dSYoichi Yuasa select CSRC_IOASIC 174940f6b48SRalf Baechle select CSRC_R4K 17520d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 17620d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 17720d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 1781da177e4SLinus Torvalds select DMA_NONCOHERENT 179d388d685SMaciej W. Rozycki select NO_IOPORT 1801da177e4SLinus Torvalds select IRQ_CPU 1817cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 1827cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 183ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1847d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 1855e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1861723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 1871723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 1881723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 189930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 1905e83d430SRalf Baechle help 1911da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 1921da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 1931da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 1941da177e4SLinus Torvalds 1951da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 1961da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 1971da177e4SLinus Torvalds 1981da177e4SLinus Torvalds DECstation 5000/50 1991da177e4SLinus Torvalds DECstation 5000/150 2001da177e4SLinus Torvalds DECstation 5000/260 2011da177e4SLinus Torvalds DECsystem 5900/260 2021da177e4SLinus Torvalds 2031da177e4SLinus Torvalds otherwise choose R3000. 2041da177e4SLinus Torvalds 2055e83d430SRalf Baechleconfig MACH_JAZZ 2063fa986faSMartin Michlmayr bool "Jazz family of machines" 2070e2794b0SRalf Baechle select FW_ARC 2080e2794b0SRalf Baechle select FW_ARC32 2095e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 21042f77542SRalf Baechle select CEVT_R4K 211940f6b48SRalf Baechle select CSRC_R4K 212e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2135e83d430SRalf Baechle select GENERIC_ISA_DMA 2148a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 215ea202c63SThomas Bogendoerfer select IRQ_CPU 216d865bea4SRalf Baechle select I8253 2175e83d430SRalf Baechle select I8259 2185e83d430SRalf Baechle select ISA 2197cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2205e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2217d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2221723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2231da177e4SLinus Torvalds help 2245e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2255e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 226692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2275e83d430SRalf Baechle Olivetti M700-10 workstations. 2285e83d430SRalf Baechle 2295ebabe59SLars-Peter Clausenconfig MACH_JZ4740 2305ebabe59SLars-Peter Clausen bool "Ingenic JZ4740 based machines" 2315ebabe59SLars-Peter Clausen select SYS_HAS_CPU_MIPS32_R1 2325ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2335ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 234f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 2355ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 2365ebabe59SLars-Peter Clausen select IRQ_CPU 2375ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 2385ebabe59SLars-Peter Clausen select SYS_HAS_EARLY_PRINTK 2395ebabe59SLars-Peter Clausen select HAVE_PWM 240ab5330ebSMaurus Cuelenaere select HAVE_CLK 24183bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 2425ebabe59SLars-Peter Clausen 243171bb2f1SJohn Crispinconfig LANTIQ 244171bb2f1SJohn Crispin bool "Lantiq based platforms" 245171bb2f1SJohn Crispin select DMA_NONCOHERENT 246171bb2f1SJohn Crispin select IRQ_CPU 247171bb2f1SJohn Crispin select CEVT_R4K 248171bb2f1SJohn Crispin select CSRC_R4K 249171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 250171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 251171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 252171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 253171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 254171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 255171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 256171bb2f1SJohn Crispin select SWAP_IO_SPACE 257171bb2f1SJohn Crispin select BOOT_RAW 258287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 259287e3f3fSJohn Crispin select CLKDEV_LOOKUP 260a0392222SJohn Crispin select USE_OF 2613f8c50c9SJohn Crispin select PINCTRL 2623f8c50c9SJohn Crispin select PINCTRL_LANTIQ 263171bb2f1SJohn Crispin 2641f21d2bdSBrian Murphyconfig LASAT 2651f21d2bdSBrian Murphy bool "LASAT Networks platforms" 26642f77542SRalf Baechle select CEVT_R4K 267940f6b48SRalf Baechle select CSRC_R4K 2681f21d2bdSBrian Murphy select DMA_NONCOHERENT 2691f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 2701f21d2bdSBrian Murphy select HW_HAS_PCI 271a5ccfe5cSRalf Baechle select IRQ_CPU 2721f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 2731f21d2bdSBrian Murphy select MIPS_NILE4 2741f21d2bdSBrian Murphy select R5000_CPU_SCACHE 2751f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 2761f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 2771f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 2781f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 2791f21d2bdSBrian Murphy 28085749d24SWu Zhangjinconfig MACH_LOONGSON 28185749d24SWu Zhangjin bool "Loongson family of machines" 282c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 283ade299d8SYoichi Yuasa help 28485749d24SWu Zhangjin This enables the support of Loongson family of machines. 28585749d24SWu Zhangjin 28685749d24SWu Zhangjin Loongson is a family of general-purpose MIPS-compatible CPUs. 28785749d24SWu Zhangjin developed at Institute of Computing Technology (ICT), 28885749d24SWu Zhangjin Chinese Academy of Sciences (CAS) in the People's Republic 28985749d24SWu Zhangjin of China. The chief architect is Professor Weiwu Hu. 290ade299d8SYoichi Yuasa 291ca585cf9SKelvin Cheungconfig MACH_LOONGSON1 292ca585cf9SKelvin Cheung bool "Loongson 1 family of machines" 293ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 294ca585cf9SKelvin Cheung help 295ca585cf9SKelvin Cheung This enables support for the Loongson 1 based machines. 296ca585cf9SKelvin Cheung 297ca585cf9SKelvin Cheung Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by 298ca585cf9SKelvin Cheung the ICT (Institute of Computing Technology) and the Chinese Academy 299ca585cf9SKelvin Cheung of Sciences. 300ca585cf9SKelvin Cheung 3011da177e4SLinus Torvaldsconfig MIPS_MALTA 3023fa986faSMartin Michlmayr bool "MIPS Malta board" 30361ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 3041da177e4SLinus Torvalds select BOOT_ELF32 305fa71c960SRalf Baechle select BOOT_RAW 30642f77542SRalf Baechle select CEVT_R4K 307940f6b48SRalf Baechle select CSRC_R4K 308778eeb1bSSteven J. Hill select CSRC_GIC 309885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 3101da177e4SLinus Torvalds select GENERIC_ISA_DMA 3118a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 312aa414dffSRalf Baechle select IRQ_CPU 31339b8d525SRalf Baechle select IRQ_GIC 3141da177e4SLinus Torvalds select HW_HAS_PCI 315d865bea4SRalf Baechle select I8253 3161da177e4SLinus Torvalds select I8259 3175e83d430SRalf Baechle select MIPS_BONITO64 3189318c51aSChris Dearman select MIPS_CPU_SCACHE 319252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 3205e83d430SRalf Baechle select MIPS_MSC 3211da177e4SLinus Torvalds select SWAP_IO_SPACE 3227cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 3237cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 3247cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 3255d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 3267cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3277cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 328ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 329ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 3305e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 3315e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3320365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 333e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 334f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 3359693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 3361b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 3371da177e4SLinus Torvalds help 338f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 3391da177e4SLinus Torvalds board. 3401da177e4SLinus Torvalds 341ec47b274SSteven J. Hillconfig MIPS_SEAD3 342ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 343ec47b274SSteven J. Hill select BOOT_ELF32 344ec47b274SSteven J. Hill select BOOT_RAW 345ec47b274SSteven J. Hill select CEVT_R4K 346ec47b274SSteven J. Hill select CSRC_R4K 347dfa762e1SSteven J. Hill select CSRC_GIC 348ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 349ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 350ec47b274SSteven J. Hill select DMA_NONCOHERENT 351ec47b274SSteven J. Hill select IRQ_CPU 352ec47b274SSteven J. Hill select IRQ_GIC 35344327236SQais Yousef select LIBFDT 354ec47b274SSteven J. Hill select MIPS_MSC 355ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 356ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 357ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 358ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 359ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 360ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 361ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 362ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 363ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 364a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 365ec47b274SSteven J. Hill select USB_ARCH_HAS_EHCI 366ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 367ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 3689b731009SSteven J. Hill select USE_OF 369ec47b274SSteven J. Hill help 370ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 371ec47b274SSteven J. Hill board. 372ec47b274SSteven J. Hill 373a83860c2SRalf Baechleconfig NEC_MARKEINS 374a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 375a83860c2SRalf Baechle select SOC_EMMA2RH 376a83860c2SRalf Baechle select HW_HAS_PCI 377a83860c2SRalf Baechle help 378a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 379ade299d8SYoichi Yuasa 3805e83d430SRalf Baechleconfig MACH_VR41XX 38174142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 38242f77542SRalf Baechle select CEVT_R4K 383940f6b48SRalf Baechle select CSRC_R4K 3847cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 38527fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 3865e83d430SRalf Baechle 387edb6310aSDaniel Lairdconfig NXP_STB220 388edb6310aSDaniel Laird bool "NXP STB220 board" 389edb6310aSDaniel Laird select SOC_PNX833X 390edb6310aSDaniel Laird help 391edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 392edb6310aSDaniel Laird 393edb6310aSDaniel Lairdconfig NXP_STB225 394edb6310aSDaniel Laird bool "NXP 225 board" 395edb6310aSDaniel Laird select SOC_PNX833X 396edb6310aSDaniel Laird select SOC_PNX8335 397edb6310aSDaniel Laird help 398edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 399edb6310aSDaniel Laird 4009267a30dSMarc St-Jeanconfig PMC_MSP 4019267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 40239d30c13SAnoop P A select CEVT_R4K 40339d30c13SAnoop P A select CSRC_R4K 4049267a30dSMarc St-Jean select DMA_NONCOHERENT 4059267a30dSMarc St-Jean select SWAP_IO_SPACE 4069267a30dSMarc St-Jean select NO_EXCEPT_FILL 4079267a30dSMarc St-Jean select BOOT_RAW 4089267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 4099267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 4109267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 4119267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 4129267a30dSMarc St-Jean select IRQ_CPU 4139267a30dSMarc St-Jean select SERIAL_8250 4149267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 4159296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 4169296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 4179267a30dSMarc St-Jean help 4189267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 4199267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 4209267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 4219267a30dSMarc St-Jean a variety of MIPS cores. 4229267a30dSMarc St-Jean 423ae2b5bb6SJohn Crispinconfig RALINK 424ae2b5bb6SJohn Crispin bool "Ralink based machines" 425ae2b5bb6SJohn Crispin select CEVT_R4K 426ae2b5bb6SJohn Crispin select CSRC_R4K 427ae2b5bb6SJohn Crispin select BOOT_RAW 428ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 429ae2b5bb6SJohn Crispin select IRQ_CPU 430ae2b5bb6SJohn Crispin select USE_OF 431ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 432ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 433ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 434ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 435ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 436ae2b5bb6SJohn Crispin select HAVE_MACH_CLKDEV 437ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 4382a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 4392a153f1cSJohn Crispin select RESET_CONTROLLER 440ae2b5bb6SJohn Crispin 4411da177e4SLinus Torvaldsconfig SGI_IP22 4423fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 4430e2794b0SRalf Baechle select FW_ARC 4440e2794b0SRalf Baechle select FW_ARC32 4451da177e4SLinus Torvalds select BOOT_ELF32 44642f77542SRalf Baechle select CEVT_R4K 447940f6b48SRalf Baechle select CSRC_R4K 448e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 4491da177e4SLinus Torvalds select DMA_NONCOHERENT 4505e83d430SRalf Baechle select HW_HAS_EISA 451d865bea4SRalf Baechle select I8253 45268de4803SThomas Bogendoerfer select I8259 4531da177e4SLinus Torvalds select IP22_CPU_SCACHE 4541da177e4SLinus Torvalds select IRQ_CPU 455aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 456e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 457e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 45836e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 459e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 460e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 461e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 4621da177e4SLinus Torvalds select SWAP_IO_SPACE 4637cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 4647cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 4652b5e63f6SMartin Michlmayr # 4662b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 4672b5e63f6SMartin Michlmayr # memory during early boot on some machines. 4682b5e63f6SMartin Michlmayr # 4692b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 4702b5e63f6SMartin Michlmayr # for a more details discussion 4712b5e63f6SMartin Michlmayr # 4722b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 473ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 474ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4755e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 476930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 4771da177e4SLinus Torvalds help 4781da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 4791da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 4801da177e4SLinus Torvalds that runs on these, say Y here. 4811da177e4SLinus Torvalds 4821da177e4SLinus Torvaldsconfig SGI_IP27 4833fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 4840e2794b0SRalf Baechle select FW_ARC 4850e2794b0SRalf Baechle select FW_ARC64 4865e83d430SRalf Baechle select BOOT_ELF64 487e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 488634286f1SRalf Baechle select DMA_COHERENT 48936a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 4901da177e4SLinus Torvalds select HW_HAS_PCI 491130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 4927cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 493ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4945e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 495d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 4961a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 497930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 4981da177e4SLinus Torvalds help 4991da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 5001da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 5011da177e4SLinus Torvalds here. 5021da177e4SLinus Torvalds 503e2defae5SThomas Bogendoerferconfig SGI_IP28 5047d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 5050e2794b0SRalf Baechle select FW_ARC 5060e2794b0SRalf Baechle select FW_ARC64 507e2defae5SThomas Bogendoerfer select BOOT_ELF64 508e2defae5SThomas Bogendoerfer select CEVT_R4K 509e2defae5SThomas Bogendoerfer select CSRC_R4K 510e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 511e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 512e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 513e2defae5SThomas Bogendoerfer select IRQ_CPU 514e2defae5SThomas Bogendoerfer select HW_HAS_EISA 515e2defae5SThomas Bogendoerfer select I8253 516e2defae5SThomas Bogendoerfer select I8259 517e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 518e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 5195b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 520e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 521e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 522e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 523e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 524e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 5252b5e63f6SMartin Michlmayr # 5262b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5272b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5282b5e63f6SMartin Michlmayr # 5292b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5302b5e63f6SMartin Michlmayr # for a more details discussion 5312b5e63f6SMartin Michlmayr # 5322b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 533e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 534e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 535e2defae5SThomas Bogendoerfer help 536e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 537e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 538e2defae5SThomas Bogendoerfer 5391da177e4SLinus Torvaldsconfig SGI_IP32 540cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 5410e2794b0SRalf Baechle select FW_ARC 5420e2794b0SRalf Baechle select FW_ARC32 5431da177e4SLinus Torvalds select BOOT_ELF32 54442f77542SRalf Baechle select CEVT_R4K 545940f6b48SRalf Baechle select CSRC_R4K 5461da177e4SLinus Torvalds select DMA_NONCOHERENT 5471da177e4SLinus Torvalds select HW_HAS_PCI 548dd67b155SRalf Baechle select IRQ_CPU 5491da177e4SLinus Torvalds select R5000_CPU_SCACHE 5501da177e4SLinus Torvalds select RM7000_CPU_SCACHE 5517cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5527cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 5537cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 554dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 555ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5565e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5571da177e4SLinus Torvalds help 5581da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 5591da177e4SLinus Torvalds 560ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 561ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 5625e83d430SRalf Baechle select BOOT_ELF32 5635e83d430SRalf Baechle select DMA_COHERENT 5645e83d430SRalf Baechle select SIBYTE_BCM1120 5655e83d430SRalf Baechle select SWAP_IO_SPACE 5667cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5675e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5685e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5695e83d430SRalf Baechle 570ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 571ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 5725e83d430SRalf Baechle select BOOT_ELF32 5735e83d430SRalf Baechle select DMA_COHERENT 5745e83d430SRalf Baechle select SIBYTE_BCM1120 5755e83d430SRalf Baechle select SWAP_IO_SPACE 5767cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5775e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5785e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5795e83d430SRalf Baechle 5805e83d430SRalf Baechleconfig SIBYTE_CRHONE 5813fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 5825e83d430SRalf Baechle select BOOT_ELF32 5835e83d430SRalf Baechle select DMA_COHERENT 5845e83d430SRalf Baechle select SIBYTE_BCM1125 5855e83d430SRalf Baechle select SWAP_IO_SPACE 5867cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5875e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5885e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 5895e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5905e83d430SRalf Baechle 591ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 592ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 593ade299d8SYoichi Yuasa select BOOT_ELF32 594ade299d8SYoichi Yuasa select DMA_COHERENT 595ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 596ade299d8SYoichi Yuasa select SWAP_IO_SPACE 597ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 598ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 599ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 600ade299d8SYoichi Yuasa 601ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 602ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 603ade299d8SYoichi Yuasa select BOOT_ELF32 604ade299d8SYoichi Yuasa select DMA_COHERENT 605fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 606ade299d8SYoichi Yuasa select SIBYTE_SB1250 607ade299d8SYoichi Yuasa select SWAP_IO_SPACE 608ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 609ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 610ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 611ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 612cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 613ade299d8SYoichi Yuasa 614ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 615ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 616ade299d8SYoichi Yuasa select BOOT_ELF32 617ade299d8SYoichi Yuasa select DMA_COHERENT 618fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 619ade299d8SYoichi Yuasa select SIBYTE_SB1250 620ade299d8SYoichi Yuasa select SWAP_IO_SPACE 621ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 622ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 623ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 624ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 625ade299d8SYoichi Yuasa 626ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 627ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 628ade299d8SYoichi Yuasa select BOOT_ELF32 629ade299d8SYoichi Yuasa select DMA_COHERENT 630ade299d8SYoichi Yuasa select SIBYTE_SB1250 631ade299d8SYoichi Yuasa select SWAP_IO_SPACE 632ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 633ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 634ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 635ade299d8SYoichi Yuasa 636ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 637ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 638ade299d8SYoichi Yuasa select BOOT_ELF32 639ade299d8SYoichi Yuasa select DMA_COHERENT 640ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 641ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 642ade299d8SYoichi Yuasa select SWAP_IO_SPACE 643ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 644ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 645651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 646ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 647cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 648ade299d8SYoichi Yuasa 64914b36af4SThomas Bogendoerferconfig SNI_RM 65014b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 6510e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 6520e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 653aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 6545e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 6555e83d430SRalf Baechle select BOOT_ELF32 65642f77542SRalf Baechle select CEVT_R4K 657940f6b48SRalf Baechle select CSRC_R4K 658e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 6595e83d430SRalf Baechle select DMA_NONCOHERENT 6605e83d430SRalf Baechle select GENERIC_ISA_DMA 6618a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 6625e83d430SRalf Baechle select HW_HAS_EISA 6635e83d430SRalf Baechle select HW_HAS_PCI 664c066a32aSThomas Bogendoerfer select IRQ_CPU 665d865bea4SRalf Baechle select I8253 6665e83d430SRalf Baechle select I8259 6675e83d430SRalf Baechle select ISA 6684a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 6697cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6704a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 671c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 6724a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 67336a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 674ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 6757d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 6764a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 6775e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 6785e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6791da177e4SLinus Torvalds help 68014b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 68114b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 6825e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 6835e83d430SRalf Baechle support this machine type. 6841da177e4SLinus Torvalds 685edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 686edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 6875e83d430SRalf Baechle 688edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 689edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 69023fbee9dSRalf Baechle 69173b4390fSRalf Baechleconfig MIKROTIK_RB532 69273b4390fSRalf Baechle bool "Mikrotik RB532 boards" 69373b4390fSRalf Baechle select CEVT_R4K 69473b4390fSRalf Baechle select CSRC_R4K 69573b4390fSRalf Baechle select DMA_NONCOHERENT 69673b4390fSRalf Baechle select HW_HAS_PCI 69773b4390fSRalf Baechle select IRQ_CPU 69873b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 69973b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 70073b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 70173b4390fSRalf Baechle select SWAP_IO_SPACE 70273b4390fSRalf Baechle select BOOT_RAW 703d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 704930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 70573b4390fSRalf Baechle help 70673b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 70773b4390fSRalf Baechle based on the IDT RC32434 SoC. 70873b4390fSRalf Baechle 7099ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 7109ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 711a86c7f72SDavid Daney select CEVT_R4K 712a86c7f72SDavid Daney select 64BIT_PHYS_ADDR 713a86c7f72SDavid Daney select DMA_COHERENT 714a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 715a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 716f65aad41SRalf Baechle select EDAC_SUPPORT 717773cb77dSRalf Baechle select SYS_SUPPORTS_HOTPLUG_CPU 718a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 7195e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 720a86c7f72SDavid Daney select SWAP_IO_SPACE 721e8635b48SDavid Daney select HW_HAS_PCI 722f00e001eSDavid Daney select ZONE_DMA32 723340fbb8bSDavid Daney select USB_ARCH_HAS_OHCI 724340fbb8bSDavid Daney select USB_ARCH_HAS_EHCI 725465aaed0SDavid Daney select HOLES_IN_ZONE 72699cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 727a86c7f72SDavid Daney help 728a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 729a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 730a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 731a86c7f72SDavid Daney Some of the supported boards are: 732a86c7f72SDavid Daney EBT3000 733a86c7f72SDavid Daney EBH3000 734a86c7f72SDavid Daney EBH3100 735a86c7f72SDavid Daney Thunder 736a86c7f72SDavid Daney Kodama 737a86c7f72SDavid Daney Hikari 738a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 739a86c7f72SDavid Daney 7407f058e85SJayachandran Cconfig NLM_XLR_BOARD 7417f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 7427f058e85SJayachandran C select BOOT_ELF32 7437f058e85SJayachandran C select NLM_COMMON 7447f058e85SJayachandran C select SYS_HAS_CPU_XLR 7457f058e85SJayachandran C select SYS_SUPPORTS_SMP 7467f058e85SJayachandran C select HW_HAS_PCI 7477f058e85SJayachandran C select SWAP_IO_SPACE 7487f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7497f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7507f058e85SJayachandran C select 64BIT_PHYS_ADDR 7517f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7527f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 7537f058e85SJayachandran C select DMA_COHERENT 7547f058e85SJayachandran C select NR_CPUS_DEFAULT_32 7557f058e85SJayachandran C select CEVT_R4K 7567f058e85SJayachandran C select CSRC_R4K 7577f058e85SJayachandran C select IRQ_CPU 758b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7597f058e85SJayachandran C select SYNC_R4K 7607f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 761f35574a3SJayachandran C select USB_ARCH_HAS_OHCI if USB_SUPPORT 762f35574a3SJayachandran C select USB_ARCH_HAS_EHCI if USB_SUPPORT 7638f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7648f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7657f058e85SJayachandran C help 7667f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 7677f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 7687f058e85SJayachandran C 7691c773ea4SJayachandran Cconfig NLM_XLP_BOARD 7701c773ea4SJayachandran C bool "Netlogic XLP based systems" 7711c773ea4SJayachandran C select BOOT_ELF32 7721c773ea4SJayachandran C select NLM_COMMON 7731c773ea4SJayachandran C select SYS_HAS_CPU_XLP 7741c773ea4SJayachandran C select SYS_SUPPORTS_SMP 7751c773ea4SJayachandran C select HW_HAS_PCI 7761c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7771c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7781c773ea4SJayachandran C select 64BIT_PHYS_ADDR 7791c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7801c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 7811c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 7821c773ea4SJayachandran C select DMA_COHERENT 7831c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 7841c773ea4SJayachandran C select CEVT_R4K 7851c773ea4SJayachandran C select CSRC_R4K 7861c773ea4SJayachandran C select IRQ_CPU 787c24a8a7aSJayachandran C select ARCH_SUPPORTS_MSI 788b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7891c773ea4SJayachandran C select SYNC_R4K 7901c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 7912f6528e1SJayachandran C select USE_OF 7928f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7938f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7941c773ea4SJayachandran C help 7951c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 7961c773ea4SJayachandran C Say Y here if you have a XLP based board. 7971c773ea4SJayachandran C 7981da177e4SLinus Torvaldsendchoice 7991da177e4SLinus Torvalds 800e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 801d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 802a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 803e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 8045e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 8055ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 8068ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 8071f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 8080f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 809ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 81029c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 81138b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 81222b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 8135e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 814a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 81585749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig" 816ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig" 8177f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 81838b18f72SRalf Baechle 8195e83d430SRalf Baechleendmenu 8205e83d430SRalf Baechle 8211da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 8221da177e4SLinus Torvalds bool 8231da177e4SLinus Torvalds default y 8241da177e4SLinus Torvalds 8251da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 8261da177e4SLinus Torvalds bool 8271da177e4SLinus Torvalds 828f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 829f0d1b0b3SDavid Howells bool 830f0d1b0b3SDavid Howells default n 831f0d1b0b3SDavid Howells 832f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 833f0d1b0b3SDavid Howells bool 834f0d1b0b3SDavid Howells default n 835f0d1b0b3SDavid Howells 8363c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 8373c9ee7efSAkinobu Mita bool 8383c9ee7efSAkinobu Mita default y 8393c9ee7efSAkinobu Mita 8401da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 8411da177e4SLinus Torvalds bool 8421da177e4SLinus Torvalds default y 8431da177e4SLinus Torvalds 844ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 8451cc89038SAtsushi Nemoto bool 8461cc89038SAtsushi Nemoto default y 8471cc89038SAtsushi Nemoto 8481da177e4SLinus Torvalds# 8491da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 8501da177e4SLinus Torvalds# 8510e2794b0SRalf Baechleconfig FW_ARC 8521da177e4SLinus Torvalds bool 8531da177e4SLinus Torvalds 85461ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 85561ed242dSRalf Baechle bool 85661ed242dSRalf Baechle 8579267a30dSMarc St-Jeanconfig BOOT_RAW 8589267a30dSMarc St-Jean bool 8599267a30dSMarc St-Jean 860217dd11eSRalf Baechleconfig CEVT_BCM1480 861217dd11eSRalf Baechle bool 862217dd11eSRalf Baechle 8636457d9fcSYoichi Yuasaconfig CEVT_DS1287 8646457d9fcSYoichi Yuasa bool 8656457d9fcSYoichi Yuasa 8661097c6acSYoichi Yuasaconfig CEVT_GT641XX 8671097c6acSYoichi Yuasa bool 8681097c6acSYoichi Yuasa 86942f77542SRalf Baechleconfig CEVT_R4K 87042f77542SRalf Baechle bool 87142f77542SRalf Baechle 8720ab2b7d0SRaghu Gandhamconfig CEVT_GIC 873237036deSPaul Burton select MIPS_CM 8740ab2b7d0SRaghu Gandham bool 8750ab2b7d0SRaghu Gandham 876217dd11eSRalf Baechleconfig CEVT_SB1250 877217dd11eSRalf Baechle bool 878217dd11eSRalf Baechle 879229f773eSAtsushi Nemotoconfig CEVT_TXX9 880229f773eSAtsushi Nemoto bool 881229f773eSAtsushi Nemoto 882217dd11eSRalf Baechleconfig CSRC_BCM1480 883217dd11eSRalf Baechle bool 884217dd11eSRalf Baechle 8854247417dSYoichi Yuasaconfig CSRC_IOASIC 8864247417dSYoichi Yuasa bool 8874247417dSYoichi Yuasa 888940f6b48SRalf Baechleconfig CSRC_R4K 889940f6b48SRalf Baechle bool 890940f6b48SRalf Baechle 891778eeb1bSSteven J. Hillconfig CSRC_GIC 892237036deSPaul Burton select MIPS_CM 893778eeb1bSSteven J. Hill bool 894778eeb1bSSteven J. Hill 895217dd11eSRalf Baechleconfig CSRC_SB1250 896217dd11eSRalf Baechle bool 897217dd11eSRalf Baechle 898a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 8997444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 900a9aec7feSAtsushi Nemoto bool 901a9aec7feSAtsushi Nemoto 9020e2794b0SRalf Baechleconfig FW_CFE 903df78b5c8SAurelien Jarno bool 904df78b5c8SAurelien Jarno 9054bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 9064bafad92SFUJITA Tomonori def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT 9074bafad92SFUJITA Tomonori 908885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 909885014bcSFelix Fietkau select DMA_NONCOHERENT 910885014bcSFelix Fietkau bool 911885014bcSFelix Fietkau 9121da177e4SLinus Torvaldsconfig DMA_COHERENT 9131da177e4SLinus Torvalds bool 9141da177e4SLinus Torvalds 9151da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 9161da177e4SLinus Torvalds bool 917e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 9184ce588cdSRalf Baechle 919e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 9204ce588cdSRalf Baechle bool 9211da177e4SLinus Torvalds 92236a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 9231da177e4SLinus Torvalds bool 9241da177e4SLinus Torvalds 925dbb74540SRalf Baechleconfig HOTPLUG_CPU 9261b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 92740b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 9281b2bc75cSRalf Baechle help 9291b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 9301b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 9311b2bc75cSRalf Baechle (Note: power management support will enable this option 9321b2bc75cSRalf Baechle automatically on SMP systems. ) 9331b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 9341b2bc75cSRalf Baechle 9351b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 936dbb74540SRalf Baechle bool 937dbb74540SRalf Baechle 9381da177e4SLinus Torvaldsconfig I8259 9391da177e4SLinus Torvalds bool 9401da177e4SLinus Torvalds 9411da177e4SLinus Torvaldsconfig MIPS_BONITO64 9421da177e4SLinus Torvalds bool 9431da177e4SLinus Torvalds 9441da177e4SLinus Torvaldsconfig MIPS_MSC 9451da177e4SLinus Torvalds bool 9461da177e4SLinus Torvalds 9471f21d2bdSBrian Murphyconfig MIPS_NILE4 9481f21d2bdSBrian Murphy bool 9491f21d2bdSBrian Murphy 95039b8d525SRalf Baechleconfig SYNC_R4K 95139b8d525SRalf Baechle bool 95239b8d525SRalf Baechle 953487d70d0SGabor Juhosconfig MIPS_MACHINE 954487d70d0SGabor Juhos def_bool n 955487d70d0SGabor Juhos 956d388d685SMaciej W. Rozyckiconfig NO_IOPORT 957d388d685SMaciej W. Rozycki def_bool n 958d388d685SMaciej W. Rozycki 9598313da30SRalf Baechleconfig GENERIC_ISA_DMA 9608313da30SRalf Baechle bool 9618313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 962a35bee8aSNamhyung Kim select ISA_DMA_API 9638313da30SRalf Baechle 964aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 965aa414dffSRalf Baechle bool 9668313da30SRalf Baechle select GENERIC_ISA_DMA 967aa414dffSRalf Baechle 968a35bee8aSNamhyung Kimconfig ISA_DMA_API 969a35bee8aSNamhyung Kim bool 970a35bee8aSNamhyung Kim 971465aaed0SDavid Daneyconfig HOLES_IN_ZONE 972465aaed0SDavid Daney bool 973465aaed0SDavid Daney 9745e83d430SRalf Baechle# 9756b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 9765e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 9775e83d430SRalf Baechle# choice statement should be more obvious to the user. 9785e83d430SRalf Baechle# 9795e83d430SRalf Baechlechoice 9806b2aac42SMasanari Iida prompt "Endianness selection" 9811da177e4SLinus Torvalds help 9821da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 9835e83d430SRalf Baechle byte order. These modes require different kernels and a different 9843cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 9855e83d430SRalf Baechle particular system but some systems are just as commonly used in the 9863dde6ad8SDavid Sterba one or the other endianness. 9875e83d430SRalf Baechle 9885e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 9895e83d430SRalf Baechle bool "Big endian" 9905e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 9915e83d430SRalf Baechle 9925e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 9935e83d430SRalf Baechle bool "Little endian" 9945e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 9955e83d430SRalf Baechle 9965e83d430SRalf Baechleendchoice 9975e83d430SRalf Baechle 99822b0763aSDavid Daneyconfig EXPORT_UASM 99922b0763aSDavid Daney bool 100022b0763aSDavid Daney 10012116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 10022116245eSRalf Baechle bool 10032116245eSRalf Baechle 10045e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 10055e83d430SRalf Baechle bool 10065e83d430SRalf Baechle 10075e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 10085e83d430SRalf Baechle bool 10091da177e4SLinus Torvalds 10109cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 10119cffd154SDavid Daney bool 10129cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 10139cffd154SDavid Daney default y 10149cffd154SDavid Daney 1015aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1016aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1017aa1762f4SDavid Daney 10181da177e4SLinus Torvaldsconfig IRQ_CPU 10191da177e4SLinus Torvalds bool 10201da177e4SLinus Torvalds 10211da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 10221da177e4SLinus Torvalds bool 10231da177e4SLinus Torvalds 10249267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 10259267a30dSMarc St-Jean bool 10269267a30dSMarc St-Jean 10279267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 10289267a30dSMarc St-Jean bool 10299267a30dSMarc St-Jean 10308420fd00SAtsushi Nemotoconfig IRQ_TXX9 10318420fd00SAtsushi Nemoto bool 10328420fd00SAtsushi Nemoto 1033d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1034d5ab1a69SYoichi Yuasa bool 1035d5ab1a69SYoichi Yuasa 103639b8d525SRalf Baechleconfig IRQ_GIC 1037237036deSPaul Burton select MIPS_CM 103839b8d525SRalf Baechle bool 103939b8d525SRalf Baechle 1040252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 10411da177e4SLinus Torvalds bool 10421da177e4SLinus Torvalds 10439267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 10449267a30dSMarc St-Jean bool 10459267a30dSMarc St-Jean 1046a83860c2SRalf Baechleconfig SOC_EMMA2RH 1047a83860c2SRalf Baechle bool 1048a83860c2SRalf Baechle select CEVT_R4K 1049a83860c2SRalf Baechle select CSRC_R4K 1050a83860c2SRalf Baechle select DMA_NONCOHERENT 1051a83860c2SRalf Baechle select IRQ_CPU 1052a83860c2SRalf Baechle select SWAP_IO_SPACE 1053a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1054a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1055a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1056a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1057a83860c2SRalf Baechle 1058edb6310aSDaniel Lairdconfig SOC_PNX833X 1059edb6310aSDaniel Laird bool 1060edb6310aSDaniel Laird select CEVT_R4K 1061edb6310aSDaniel Laird select CSRC_R4K 1062edb6310aSDaniel Laird select IRQ_CPU 1063edb6310aSDaniel Laird select DMA_NONCOHERENT 1064edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1065edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1066edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1067edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1068edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1069edb6310aSDaniel Laird 1070edb6310aSDaniel Lairdconfig SOC_PNX8335 1071edb6310aSDaniel Laird bool 1072edb6310aSDaniel Laird select SOC_PNX833X 1073edb6310aSDaniel Laird 10741da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 10751da177e4SLinus Torvalds bool 10761da177e4SLinus Torvalds 1077e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1078e2defae5SThomas Bogendoerfer bool 1079e2defae5SThomas Bogendoerfer 10805b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 10815b438c44SThomas Bogendoerfer bool 10825b438c44SThomas Bogendoerfer 1083e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1084e2defae5SThomas Bogendoerfer bool 1085e2defae5SThomas Bogendoerfer 1086e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1087e2defae5SThomas Bogendoerfer bool 1088e2defae5SThomas Bogendoerfer 1089e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1090e2defae5SThomas Bogendoerfer bool 1091e2defae5SThomas Bogendoerfer 1092e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1093e2defae5SThomas Bogendoerfer bool 1094e2defae5SThomas Bogendoerfer 1095e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1096e2defae5SThomas Bogendoerfer bool 1097e2defae5SThomas Bogendoerfer 10980e2794b0SRalf Baechleconfig FW_ARC32 10995e83d430SRalf Baechle bool 11005e83d430SRalf Baechle 1101aaa9fad3SPaul Bolleconfig FW_SNIPROM 1102231a35d3SThomas Bogendoerfer bool 1103231a35d3SThomas Bogendoerfer 11041da177e4SLinus Torvaldsconfig BOOT_ELF32 11051da177e4SLinus Torvalds bool 11061da177e4SLinus Torvalds 1107930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1108930beb5aSFlorian Fainelli bool 1109930beb5aSFlorian Fainelli 1110930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1111930beb5aSFlorian Fainelli bool 1112930beb5aSFlorian Fainelli 1113930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1114930beb5aSFlorian Fainelli bool 1115930beb5aSFlorian Fainelli 1116930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1117930beb5aSFlorian Fainelli bool 1118930beb5aSFlorian Fainelli 11191da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 11201da177e4SLinus Torvalds int 1121a4c0201eSFlorian Fainelli default "4" if MIPS_L1_CACHE_SHIFT_4 1122a4c0201eSFlorian Fainelli default "5" if MIPS_L1_CACHE_SHIFT_5 1123a4c0201eSFlorian Fainelli default "6" if MIPS_L1_CACHE_SHIFT_6 1124a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 11251da177e4SLinus Torvalds default "5" 11261da177e4SLinus Torvalds 11271da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 11281da177e4SLinus Torvalds bool 11291da177e4SLinus Torvalds 11301da177e4SLinus Torvaldsconfig ARC_CONSOLE 11311da177e4SLinus Torvalds bool "ARC console support" 1132e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 11331da177e4SLinus Torvalds 11341da177e4SLinus Torvaldsconfig ARC_MEMORY 11351da177e4SLinus Torvalds bool 113614b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 11371da177e4SLinus Torvalds default y 11381da177e4SLinus Torvalds 11391da177e4SLinus Torvaldsconfig ARC_PROMLIB 11401da177e4SLinus Torvalds bool 1141e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 11421da177e4SLinus Torvalds default y 11431da177e4SLinus Torvalds 11440e2794b0SRalf Baechleconfig FW_ARC64 11451da177e4SLinus Torvalds bool 11461da177e4SLinus Torvalds 11471da177e4SLinus Torvaldsconfig BOOT_ELF64 11481da177e4SLinus Torvalds bool 11491da177e4SLinus Torvalds 11501da177e4SLinus Torvaldsmenu "CPU selection" 11511da177e4SLinus Torvalds 11521da177e4SLinus Torvaldschoice 11531da177e4SLinus Torvalds prompt "CPU type" 11541da177e4SLinus Torvalds default CPU_R4X00 11551da177e4SLinus Torvalds 11563702bba5SWu Zhangjinconfig CPU_LOONGSON2E 11573702bba5SWu Zhangjin bool "Loongson 2E" 11583702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 11593702bba5SWu Zhangjin select CPU_LOONGSON2 11602a21c730SFuxin Zhang help 11612a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 11622a21c730SFuxin Zhang with many extensions. 11632a21c730SFuxin Zhang 116425985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 11656f7a251aSWu Zhangjin bonito64. 11666f7a251aSWu Zhangjin 11676f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 11686f7a251aSWu Zhangjin bool "Loongson 2F" 11696f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 11706f7a251aSWu Zhangjin select CPU_LOONGSON2 1171c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 11726f7a251aSWu Zhangjin help 11736f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 11746f7a251aSWu Zhangjin with many extensions. 11756f7a251aSWu Zhangjin 11766f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 11776f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 11786f7a251aSWu Zhangjin Loongson2E. 11796f7a251aSWu Zhangjin 1180ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1181ca585cf9SKelvin Cheung bool "Loongson 1B" 1182ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1183ca585cf9SKelvin Cheung select CPU_LOONGSON1 1184ca585cf9SKelvin Cheung help 1185ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1186ca585cf9SKelvin Cheung release 2 instruction set. 1187ca585cf9SKelvin Cheung 11886e760c8dSRalf Baechleconfig CPU_MIPS32_R1 11896e760c8dSRalf Baechle bool "MIPS32 Release 1" 11907cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 11916e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1192797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1193ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 11946e760c8dSRalf Baechle help 11955e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 11961e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 11971e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 11981e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 11991e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12001e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 12011e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 12021e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 12031e5f1caaSRalf Baechle performance. 12041e5f1caaSRalf Baechle 12051e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 12061e5f1caaSRalf Baechle bool "MIPS32 Release 2" 12077cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 12081e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1209797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1210ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1211a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 12122235a54dSSanjay Lal select HAVE_KVM 12131e5f1caaSRalf Baechle help 12145e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 12156e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12166e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12176e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12186e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12191da177e4SLinus Torvalds 12206e760c8dSRalf Baechleconfig CPU_MIPS64_R1 12216e760c8dSRalf Baechle bool "MIPS64 Release 1" 12227cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1223797798c1SRalf Baechle select CPU_HAS_PREFETCH 1224ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1225ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1226ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12279cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 12286e760c8dSRalf Baechle help 12296e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 12306e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12316e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12326e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12336e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12341e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 12351e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 12361e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 12371e5f1caaSRalf Baechle performance. 12381e5f1caaSRalf Baechle 12391e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 12401e5f1caaSRalf Baechle bool "MIPS64 Release 2" 12417cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1242797798c1SRalf Baechle select CPU_HAS_PREFETCH 12431e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 12441e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1245ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12469cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1247a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 12481e5f1caaSRalf Baechle help 12491e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 12501e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12511e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12521e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12531e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12541da177e4SLinus Torvalds 12551da177e4SLinus Torvaldsconfig CPU_R3000 12561da177e4SLinus Torvalds bool "R3000" 12577cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1258f7062ddbSRalf Baechle select CPU_HAS_WB 1259ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1260797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12611da177e4SLinus Torvalds help 12621da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 12631da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 12641da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 12651da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 12661da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 12671da177e4SLinus Torvalds try to recompile with R3000. 12681da177e4SLinus Torvalds 12691da177e4SLinus Torvaldsconfig CPU_TX39XX 12701da177e4SLinus Torvalds bool "R39XX" 12717cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1272ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 12731da177e4SLinus Torvalds 12741da177e4SLinus Torvaldsconfig CPU_VR41XX 12751da177e4SLinus Torvalds bool "R41xx" 12767cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1277ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1278ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 12791da177e4SLinus Torvalds help 12805e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 12811da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 12821da177e4SLinus Torvalds kernel built with this option will not run on any other type of 12831da177e4SLinus Torvalds processor or vice versa. 12841da177e4SLinus Torvalds 12851da177e4SLinus Torvaldsconfig CPU_R4300 12861da177e4SLinus Torvalds bool "R4300" 12877cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1288ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1289ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 12901da177e4SLinus Torvalds help 12911da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 12921da177e4SLinus Torvalds 12931da177e4SLinus Torvaldsconfig CPU_R4X00 12941da177e4SLinus Torvalds bool "R4x00" 12957cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1296ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1297ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1298970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 12991da177e4SLinus Torvalds help 13001da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 13011da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 13021da177e4SLinus Torvalds 13031da177e4SLinus Torvaldsconfig CPU_TX49XX 13041da177e4SLinus Torvalds bool "R49XX" 13057cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1306de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1307ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1308ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1309970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13101da177e4SLinus Torvalds 13111da177e4SLinus Torvaldsconfig CPU_R5000 13121da177e4SLinus Torvalds bool "R5000" 13137cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1314ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1315ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1316970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13171da177e4SLinus Torvalds help 13181da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 13191da177e4SLinus Torvalds 13201da177e4SLinus Torvaldsconfig CPU_R5432 13211da177e4SLinus Torvalds bool "R5432" 13227cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 13235e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 13245e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1325970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13261da177e4SLinus Torvalds 1327542c1020SShinya Kuribayashiconfig CPU_R5500 1328542c1020SShinya Kuribayashi bool "R5500" 1329542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1330542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1331542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 13329cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1333542c1020SShinya Kuribayashi help 1334542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1335542c1020SShinya Kuribayashi instruction set. 1336542c1020SShinya Kuribayashi 13371da177e4SLinus Torvaldsconfig CPU_R6000 13381da177e4SLinus Torvalds bool "R6000" 13397cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1340ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 13411da177e4SLinus Torvalds help 13421da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1343c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 13441da177e4SLinus Torvalds 13451da177e4SLinus Torvaldsconfig CPU_NEVADA 13461da177e4SLinus Torvalds bool "RM52xx" 13477cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1348ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1349ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1350970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13511da177e4SLinus Torvalds help 13521da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 13531da177e4SLinus Torvalds 13541da177e4SLinus Torvaldsconfig CPU_R8000 13551da177e4SLinus Torvalds bool "R8000" 13567cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 13575e83d430SRalf Baechle select CPU_HAS_PREFETCH 1358ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 13591da177e4SLinus Torvalds help 13601da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 13611da177e4SLinus Torvalds uncommon and the support for them is incomplete. 13621da177e4SLinus Torvalds 13631da177e4SLinus Torvaldsconfig CPU_R10000 13641da177e4SLinus Torvalds bool "R10000" 13657cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 13665e83d430SRalf Baechle select CPU_HAS_PREFETCH 1367ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1368ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1369797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1370970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13711da177e4SLinus Torvalds help 13721da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 13731da177e4SLinus Torvalds 13741da177e4SLinus Torvaldsconfig CPU_RM7000 13751da177e4SLinus Torvalds bool "RM7000" 13767cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 13775e83d430SRalf Baechle select CPU_HAS_PREFETCH 1378ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1379ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1380797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1381970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13821da177e4SLinus Torvalds 13831da177e4SLinus Torvaldsconfig CPU_SB1 13841da177e4SLinus Torvalds bool "SB1" 13857cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1386ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1387ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1388797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1389970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13900004a9dfSRalf Baechle select WEAK_ORDERING 13911da177e4SLinus Torvalds 1392a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1393a86c7f72SDavid Daney bool "Cavium Octeon processor" 13945e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 13957ee91de4SYoichi Yuasa select ARCH_SPARSEMEM_ENABLE 1396a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1397a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1398a86c7f72SDavid Daney select SYS_SUPPORTS_SMP 1399a86c7f72SDavid Daney select NR_CPUS_DEFAULT_16 1400a86c7f72SDavid Daney select WEAK_ORDERING 1401a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 14029cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14037ed18152SDavid Daney select LIBFDT 14047ed18152SDavid Daney select USE_OF 14059296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 1406930beb5aSFlorian Fainelli select SYS_HAS_DMA_OPS 1407930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1408a86c7f72SDavid Daney help 1409a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1410a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1411a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1412a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1413a86c7f72SDavid Daney 1414cd746249SJonas Gorskiconfig CPU_BMIPS 1415cd746249SJonas Gorski bool "Broadcom BMIPS" 1416cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1417cd746249SJonas Gorski select CPU_MIPS32 1418fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1419cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1420cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1421cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1422cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1423cd746249SJonas Gorski select DMA_NONCOHERENT 1424cd746249SJonas Gorski select IRQ_CPU 1425cd746249SJonas Gorski select SWAP_IO_SPACE 1426cd746249SJonas Gorski select WEAK_ORDERING 1427c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 142869aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1429c1c0c461SKevin Cernekee help 1430fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1431c1c0c461SKevin Cernekee 14327f058e85SJayachandran Cconfig CPU_XLR 14337f058e85SJayachandran C bool "Netlogic XLR SoC" 14347f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 14357f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14367f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14377f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1438970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14397f058e85SJayachandran C select WEAK_ORDERING 14407f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14417f058e85SJayachandran C help 14427f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 14431c773ea4SJayachandran C 14441c773ea4SJayachandran Cconfig CPU_XLP 14451c773ea4SJayachandran C bool "Netlogic XLP SoC" 14461c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 14471c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14481c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14491c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 14501c773ea4SJayachandran C select WEAK_ORDERING 14511c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14521c773ea4SJayachandran C select CPU_HAS_PREFETCH 1453d6504846SJayachandran C select CPU_MIPSR2 14541c773ea4SJayachandran C help 14551c773ea4SJayachandran C Netlogic Microsystems XLP processors. 14561da177e4SLinus Torvaldsendchoice 14571da177e4SLinus Torvalds 1458*a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1459*a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1460*a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 1461*a6e18781SLeonid Yegoshin depends on CPU_MIPS32_R2 1462*a6e18781SLeonid Yegoshin help 1463*a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1464*a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1465*a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1466*a6e18781SLeonid Yegoshin 1467*a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1468*a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1469*a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1470*a6e18781SLeonid Yegoshin select EVA 1471*a6e18781SLeonid Yegoshin default y 1472*a6e18781SLeonid Yegoshin help 1473*a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1474*a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1475*a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1476*a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1477*a6e18781SLeonid Yegoshin 1478622844bfSWu Zhangjinif CPU_LOONGSON2F 1479622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1480622844bfSWu Zhangjin bool 1481622844bfSWu Zhangjin 1482622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1483622844bfSWu Zhangjin bool 1484622844bfSWu Zhangjin 1485622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1486622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1487622844bfSWu Zhangjin default y 1488622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1489622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1490622844bfSWu Zhangjin help 1491622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1492622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1493622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1494622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1495622844bfSWu Zhangjin 1496622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1497622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1498622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1499622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1500622844bfSWu Zhangjin systems. 1501622844bfSWu Zhangjin 1502622844bfSWu Zhangjin If unsure, please say Y. 1503622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1504622844bfSWu Zhangjin 15051b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 15061b93b3c3SWu Zhangjin bool 15071b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 15081b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 150931c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 15101b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1511fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 15124e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 15131b93b3c3SWu Zhangjin 15141b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 15151b93b3c3SWu Zhangjin bool 15161b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 15171b93b3c3SWu Zhangjin 15183702bba5SWu Zhangjinconfig CPU_LOONGSON2 15193702bba5SWu Zhangjin bool 15203702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 15213702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 15223702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1523970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15243702bba5SWu Zhangjin 1525ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1526ca585cf9SKelvin Cheung bool 1527ca585cf9SKelvin Cheung select CPU_MIPS32 1528ca585cf9SKelvin Cheung select CPU_MIPSR2 1529ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1530ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1531ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1532ca585cf9SKelvin Cheung 1533fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 153404fa8bf7SJonas Gorski select SMP_UP if SMP 15351bbb6c1bSKevin Cernekee bool 1536cd746249SJonas Gorski 1537cd746249SJonas Gorskiconfig CPU_BMIPS4350 1538cd746249SJonas Gorski bool 1539cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1540cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1541cd746249SJonas Gorski 1542cd746249SJonas Gorskiconfig CPU_BMIPS4380 1543cd746249SJonas Gorski bool 1544cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1545cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1546cd746249SJonas Gorski 1547cd746249SJonas Gorskiconfig CPU_BMIPS5000 1548cd746249SJonas Gorski bool 1549cd746249SJonas Gorski select MIPS_CPU_SCACHE 1550cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1551cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 15521bbb6c1bSKevin Cernekee 15533702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 15542a21c730SFuxin Zhang bool 15552a21c730SFuxin Zhang 15566f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 15576f7a251aSWu Zhangjin bool 155855045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 155955045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 156022f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 15616f7a251aSWu Zhangjin 1562ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1563ca585cf9SKelvin Cheung bool 1564ca585cf9SKelvin Cheung 15657cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 15667cf8053bSRalf Baechle bool 15677cf8053bSRalf Baechle 15687cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 15697cf8053bSRalf Baechle bool 15707cf8053bSRalf Baechle 1571*a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1572*a6e18781SLeonid Yegoshin bool 1573*a6e18781SLeonid Yegoshin 15747cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 15757cf8053bSRalf Baechle bool 15767cf8053bSRalf Baechle 15777cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 15787cf8053bSRalf Baechle bool 15797cf8053bSRalf Baechle 15807cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 15817cf8053bSRalf Baechle bool 15827cf8053bSRalf Baechle 15837cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 15847cf8053bSRalf Baechle bool 15857cf8053bSRalf Baechle 15867cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 15877cf8053bSRalf Baechle bool 15887cf8053bSRalf Baechle 15897cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 15907cf8053bSRalf Baechle bool 15917cf8053bSRalf Baechle 15927cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 15937cf8053bSRalf Baechle bool 15947cf8053bSRalf Baechle 15957cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 15967cf8053bSRalf Baechle bool 15977cf8053bSRalf Baechle 15987cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 15997cf8053bSRalf Baechle bool 16007cf8053bSRalf Baechle 16017cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 16027cf8053bSRalf Baechle bool 16037cf8053bSRalf Baechle 1604542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1605542c1020SShinya Kuribayashi bool 1606542c1020SShinya Kuribayashi 16077cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 16087cf8053bSRalf Baechle bool 16097cf8053bSRalf Baechle 16107cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 16117cf8053bSRalf Baechle bool 16127cf8053bSRalf Baechle 16137cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 16147cf8053bSRalf Baechle bool 16157cf8053bSRalf Baechle 16167cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 16177cf8053bSRalf Baechle bool 16187cf8053bSRalf Baechle 16197cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 16207cf8053bSRalf Baechle bool 16217cf8053bSRalf Baechle 16227cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 16237cf8053bSRalf Baechle bool 16247cf8053bSRalf Baechle 16255e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 16265e683389SDavid Daney bool 16275e683389SDavid Daney 1628cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1629c1c0c461SKevin Cernekee bool 1630c1c0c461SKevin Cernekee 1631fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1632c1c0c461SKevin Cernekee bool 1633cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1634c1c0c461SKevin Cernekee 1635c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1636c1c0c461SKevin Cernekee bool 1637cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1638c1c0c461SKevin Cernekee 1639c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1640c1c0c461SKevin Cernekee bool 1641cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1642c1c0c461SKevin Cernekee 1643c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1644c1c0c461SKevin Cernekee bool 1645cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1646c1c0c461SKevin Cernekee 16477f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 16487f058e85SJayachandran C bool 16497f058e85SJayachandran C 16501c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 16511c773ea4SJayachandran C bool 16521c773ea4SJayachandran C 165317099b11SRalf Baechle# 165417099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 165517099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 165617099b11SRalf Baechle# 16570004a9dfSRalf Baechleconfig WEAK_ORDERING 16580004a9dfSRalf Baechle bool 165917099b11SRalf Baechle 166017099b11SRalf Baechle# 166117099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 166217099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 166317099b11SRalf Baechle# 166417099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 166517099b11SRalf Baechle bool 16665e83d430SRalf Baechleendmenu 16675e83d430SRalf Baechle 16685e83d430SRalf Baechle# 16695e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 16705e83d430SRalf Baechle# 16715e83d430SRalf Baechleconfig CPU_MIPS32 16725e83d430SRalf Baechle bool 16735e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 16745e83d430SRalf Baechle 16755e83d430SRalf Baechleconfig CPU_MIPS64 16765e83d430SRalf Baechle bool 16775e83d430SRalf Baechle default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 16785e83d430SRalf Baechle 16795e83d430SRalf Baechle# 1680c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 16815e83d430SRalf Baechle# 16825e83d430SRalf Baechleconfig CPU_MIPSR1 16835e83d430SRalf Baechle bool 16845e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 16855e83d430SRalf Baechle 16865e83d430SRalf Baechleconfig CPU_MIPSR2 16875e83d430SRalf Baechle bool 1688a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 16895e83d430SRalf Baechle 1690*a6e18781SLeonid Yegoshinconfig EVA 1691*a6e18781SLeonid Yegoshin bool 1692*a6e18781SLeonid Yegoshin 16935e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 16945e83d430SRalf Baechle bool 16955e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 16965e83d430SRalf Baechle bool 16975e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 16985e83d430SRalf Baechle bool 16995e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 17005e83d430SRalf Baechle bool 170155045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 170255045ff5SWu Zhangjin bool 170355045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 170455045ff5SWu Zhangjin bool 17059cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 17069cffd154SDavid Daney bool 170722f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 170822f1fdfdSWu Zhangjin bool 170982622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 171082622284SDavid Daney bool 1711d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 17125e83d430SRalf Baechle 17138192c9eaSDavid Daney# 17148192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 17158192c9eaSDavid Daney# 17168192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 17178192c9eaSDavid Daney bool 1718f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 17198192c9eaSDavid Daney 17205e83d430SRalf Baechlemenu "Kernel type" 17215e83d430SRalf Baechle 17225e83d430SRalf Baechlechoice 17235e83d430SRalf Baechle prompt "Kernel code model" 17245e83d430SRalf Baechle help 17255e83d430SRalf Baechle You should only select this option if you have a workload that 17265e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 17275e83d430SRalf Baechle large memory. You will only be presented a single option in this 17285e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 17295e83d430SRalf Baechle 17305e83d430SRalf Baechleconfig 32BIT 17315e83d430SRalf Baechle bool "32-bit kernel" 17325e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 17335e83d430SRalf Baechle select TRAD_SIGNALS 17345e83d430SRalf Baechle help 17355e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 17365e83d430SRalf Baechleconfig 64BIT 17375e83d430SRalf Baechle bool "64-bit kernel" 17385e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 17395e83d430SRalf Baechle help 17405e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 17415e83d430SRalf Baechle 17425e83d430SRalf Baechleendchoice 17435e83d430SRalf Baechle 17442235a54dSSanjay Lalconfig KVM_GUEST 17452235a54dSSanjay Lal bool "KVM Guest Kernel" 1746f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 17472235a54dSSanjay Lal help 17482235a54dSSanjay Lal Select this option if building a guest kernel for KVM (Trap & Emulate) mode 17492235a54dSSanjay Lal 17502235a54dSSanjay Lalconfig KVM_HOST_FREQ 17512235a54dSSanjay Lal int "KVM Host Processor Frequency (MHz)" 17522235a54dSSanjay Lal depends on KVM_GUEST 17532235a54dSSanjay Lal default 500 17542235a54dSSanjay Lal help 17552235a54dSSanjay Lal Select this option if building a guest kernel for KVM to skip 17562235a54dSSanjay Lal RTC emulation when determining guest CPU Frequency. Instead, the guest 17572235a54dSSanjay Lal processor frequency is automatically derived from the host frequency. 17582235a54dSSanjay Lal 17591da177e4SLinus Torvaldschoice 17601da177e4SLinus Torvalds prompt "Kernel page size" 17611da177e4SLinus Torvalds default PAGE_SIZE_4KB 17621da177e4SLinus Torvalds 17631da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 17641da177e4SLinus Torvalds bool "4kB" 1765315fe625SWu Zhangjin depends on !CPU_LOONGSON2 17661da177e4SLinus Torvalds help 17671da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 17681da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 17691da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 17701da177e4SLinus Torvalds recommended for low memory systems. 17711da177e4SLinus Torvalds 17721da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 17731da177e4SLinus Torvalds bool "8kB" 17747d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 17751da177e4SLinus Torvalds help 17761da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 17771da177e4SLinus Torvalds the price of higher memory consumption. This option is available 1778c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 1779c52399beSRalf Baechle suitable Linux distribution to support this. 17801da177e4SLinus Torvalds 17811da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 17821da177e4SLinus Torvalds bool "16kB" 1783714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 17841da177e4SLinus Torvalds help 17851da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 17861da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 1787714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 1788714bfad6SRalf Baechle Linux distribution to support this. 17891da177e4SLinus Torvalds 1790c52399beSRalf Baechleconfig PAGE_SIZE_32KB 1791c52399beSRalf Baechle bool "32kB" 1792c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 1793c52399beSRalf Baechle help 1794c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 1795c52399beSRalf Baechle the price of higher memory consumption. This option is available 1796c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 1797c52399beSRalf Baechle distribution to support this. 1798c52399beSRalf Baechle 17991da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 18001da177e4SLinus Torvalds bool "64kB" 18017d60717eSKees Cook depends on !CPU_R3000 && !CPU_TX39XX 18021da177e4SLinus Torvalds help 18031da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 18041da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 18051da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 1806714bfad6SRalf Baechle writing this option is still high experimental. 18071da177e4SLinus Torvalds 18081da177e4SLinus Torvaldsendchoice 18091da177e4SLinus Torvalds 1810c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 1811c9bace7cSDavid Daney int "Maximum zone order" 181285f993b8SDavid Daney range 14 64 if HUGETLB_PAGE && PAGE_SIZE_64KB 181385f993b8SDavid Daney default "14" if HUGETLB_PAGE && PAGE_SIZE_64KB 181485f993b8SDavid Daney range 13 64 if HUGETLB_PAGE && PAGE_SIZE_32KB 181585f993b8SDavid Daney default "13" if HUGETLB_PAGE && PAGE_SIZE_32KB 181685f993b8SDavid Daney range 12 64 if HUGETLB_PAGE && PAGE_SIZE_16KB 181785f993b8SDavid Daney default "12" if HUGETLB_PAGE && PAGE_SIZE_16KB 1818c9bace7cSDavid Daney range 11 64 1819c9bace7cSDavid Daney default "11" 1820c9bace7cSDavid Daney help 1821c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 1822c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 1823c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 1824c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 1825c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 1826c9bace7cSDavid Daney increase this value. 1827c9bace7cSDavid Daney 1828c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 1829c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 1830c9bace7cSDavid Daney 1831c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 1832c9bace7cSDavid Daney when choosing a value for this option. 1833c9bace7cSDavid Daney 18340ab2b7d0SRaghu Gandhamconfig CEVT_GIC 18350ab2b7d0SRaghu Gandham bool "Use GIC global counter for clock events" 18360ab2b7d0SRaghu Gandham depends on IRQ_GIC && !(MIPS_SEAD3 || MIPS_MT_SMTC) 18370ab2b7d0SRaghu Gandham help 18380ab2b7d0SRaghu Gandham Use the GIC global counter for the clock events. The R4K clock 18390ab2b7d0SRaghu Gandham event driver is always present, so if the platform ends up not 18400ab2b7d0SRaghu Gandham detecting a GIC, it will fall back to the R4K timer for the 18410ab2b7d0SRaghu Gandham generation of clock events. 18420ab2b7d0SRaghu Gandham 18431da177e4SLinus Torvaldsconfig BOARD_SCACHE 18441da177e4SLinus Torvalds bool 18451da177e4SLinus Torvalds 18461da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 18471da177e4SLinus Torvalds bool 18481da177e4SLinus Torvalds select BOARD_SCACHE 18491da177e4SLinus Torvalds 18509318c51aSChris Dearman# 18519318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 18529318c51aSChris Dearman# 18539318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 18549318c51aSChris Dearman bool 18559318c51aSChris Dearman select BOARD_SCACHE 1856930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_6 18579318c51aSChris Dearman 18581da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 18591da177e4SLinus Torvalds bool 18601da177e4SLinus Torvalds select BOARD_SCACHE 18611da177e4SLinus Torvalds 18621da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 18631da177e4SLinus Torvalds bool 18641da177e4SLinus Torvalds select BOARD_SCACHE 18651da177e4SLinus Torvalds 18661da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 18671da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 18681da177e4SLinus Torvalds depends on CPU_SB1 18691da177e4SLinus Torvalds help 18701da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 18711da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 18721da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 18731da177e4SLinus Torvalds 18741da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 1875c8094b53SRalf Baechle bool 18761da177e4SLinus Torvalds 18773165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 18783165c846SFlorian Fainelli bool 18793165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 18803165c846SFlorian Fainelli 188191405eb6SFlorian Fainelliconfig CPU_R4K_FPU 188291405eb6SFlorian Fainelli bool 188391405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 188491405eb6SFlorian Fainelli 188562cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 188662cedc4fSFlorian Fainelli bool 188762cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 188862cedc4fSFlorian Fainelli 1889340ee4b9SRalf Baechlechoice 1890340ee4b9SRalf Baechle prompt "MIPS MT options" 1891f41ae0b2SRalf Baechle 1892f41ae0b2SRalf Baechleconfig MIPS_MT_DISABLED 1893c080faa5SSteven J. Hill bool "Disable multithreading support" 1894f41ae0b2SRalf Baechle help 1895c080faa5SSteven J. Hill Use this option if your platform does not support the MT ASE 1896c080faa5SSteven J. Hill which is hardware multithreading support. On systems without 1897c080faa5SSteven J. Hill an MT-enabled processor, this will be the only option that is 1898c080faa5SSteven J. Hill available in this menu. 1899340ee4b9SRalf Baechle 190059d6ab86SRalf Baechleconfig MIPS_MT_SMP 190159d6ab86SRalf Baechle bool "Use 1 TC on each available VPE for SMP" 190259d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 190359d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 1904d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1905c080faa5SSteven J. Hill select SYNC_R4K 190659d6ab86SRalf Baechle select MIPS_MT 190759d6ab86SRalf Baechle select SMP 190887353d8aSRalf Baechle select SMP_UP 1909c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 1910c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 1911399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 191259d6ab86SRalf Baechle help 1913c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 1914c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 1915c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 1916c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 1917c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 191859d6ab86SRalf Baechle 191941c594abSRalf Baechleconfig MIPS_MT_SMTC 1920c080faa5SSteven J. Hill bool "Use all TCs on all VPEs for SMP (DEPRECATED)" 1921f41ae0b2SRalf Baechle depends on CPU_MIPS32_R2 1922f41ae0b2SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 19230ee958e1SPaul Burton depends on !MIPS_CPS 1924f7062ddbSRalf Baechle select CPU_MIPSR2_IRQ_VI 1925d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1926f41ae0b2SRalf Baechle select MIPS_MT 192741c594abSRalf Baechle select SMP 192887353d8aSRalf Baechle select SMP_UP 1929c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 1930c080faa5SSteven J. Hill select NR_CPUS_DEFAULT_8 1931f41ae0b2SRalf Baechle help 1932c080faa5SSteven J. Hill This is a kernel model which is known as SMTC. This is 1933c080faa5SSteven J. Hill supported on cores with the MT ASE and presents all TCs 1934c080faa5SSteven J. Hill available on all VPEs to support SMP. For further 1935c080faa5SSteven J. Hill information see <http://www.linux-mips.org/wiki/34K#SMTC>. 193641c594abSRalf Baechle 1937340ee4b9SRalf Baechleendchoice 1938340ee4b9SRalf Baechle 1939f41ae0b2SRalf Baechleconfig MIPS_MT 1940f41ae0b2SRalf Baechle bool 1941f41ae0b2SRalf Baechle 19420ab7aefcSRalf Baechleconfig SCHED_SMT 19430ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 19440ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 19450ab7aefcSRalf Baechle default n 19460ab7aefcSRalf Baechle help 19470ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 19480ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 19490ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 19500ab7aefcSRalf Baechle 19510ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 19520ab7aefcSRalf Baechle bool 19530ab7aefcSRalf Baechle 1954f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 1955f41ae0b2SRalf Baechle bool 1956f41ae0b2SRalf Baechle 1957f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 1958f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 1959f088fc84SRalf Baechle default y 196007cc0c9eSRalf Baechle depends on MIPS_MT_SMP || MIPS_MT_SMTC 196107cc0c9eSRalf Baechle 196207cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 196307cc0c9eSRalf Baechle bool "VPE loader support." 1964704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 196507cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 196607cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 196707cc0c9eSRalf Baechle select MIPS_MT 196807cc0c9eSRalf Baechle help 196907cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 197007cc0c9eSRalf Baechle onto another VPE and running it. 1971f088fc84SRalf Baechle 197217a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 197317a1d523SDeng-Cheng Zhu bool 197417a1d523SDeng-Cheng Zhu default "y" 197517a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 197617a1d523SDeng-Cheng Zhu 19771a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 19781a2a6d7eSDeng-Cheng Zhu bool 19791a2a6d7eSDeng-Cheng Zhu default "y" 19801a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 19811a2a6d7eSDeng-Cheng Zhu 19820db34215SKevin D. Kissellconfig MIPS_MT_SMTC_IM_BACKSTOP 19830db34215SKevin D. Kissell bool "Use per-TC register bits as backstop for inhibited IM bits" 19840db34215SKevin D. Kissell depends on MIPS_MT_SMTC 19858531a35eSKevin D. Kissell default n 19860db34215SKevin D. Kissell help 19870db34215SKevin D. Kissell To support multiple TC microthreads acting as "CPUs" within 19880db34215SKevin D. Kissell a VPE, VPE-wide interrupt mask bits must be specially manipulated 19890db34215SKevin D. Kissell during interrupt handling. To support legacy drivers and interrupt 19900db34215SKevin D. Kissell controller management code, SMTC has a "backstop" to track and 19910db34215SKevin D. Kissell if necessary restore the interrupt mask. This has some performance 19928531a35eSKevin D. Kissell impact on interrupt service overhead. 19930db34215SKevin D. Kissell 1994f571eff0SKevin D. Kissellconfig MIPS_MT_SMTC_IRQAFF 1995f571eff0SKevin D. Kissell bool "Support IRQ affinity API" 1996f571eff0SKevin D. Kissell depends on MIPS_MT_SMTC 1997f571eff0SKevin D. Kissell default n 1998f571eff0SKevin D. Kissell help 1999f571eff0SKevin D. Kissell Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.) 2000f571eff0SKevin D. Kissell for SMTC Linux kernel. Requires platform support, of which 2001f571eff0SKevin D. Kissell an example can be found in the MIPS kernel i8259 and Malta 20028531a35eSKevin D. Kissell platform code. Adds some overhead to interrupt dispatch, and 20038531a35eSKevin D. Kissell should be used only if you know what you are doing. 2004f571eff0SKevin D. Kissell 2005e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2006e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2007e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2008e01402b1SRalf Baechle default y 2009e01402b1SRalf Baechle help 2010e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2011e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2012e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2013e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2014e01402b1SRalf Baechle 2015e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2016e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2017e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 20185e83d430SRalf Baechle help 2019e01402b1SRalf Baechle 2020da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2021da615cf6SDeng-Cheng Zhu bool 2022da615cf6SDeng-Cheng Zhu default "y" 2023da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2024da615cf6SDeng-Cheng Zhu 20252c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 20262c973ef0SDeng-Cheng Zhu bool 20272c973ef0SDeng-Cheng Zhu default "y" 20282c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 20292c973ef0SDeng-Cheng Zhu 20304a16ff4cSRalf Baechleconfig MIPS_CMP 20315cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 2032a6ce202eSPaul Burton depends on SYS_SUPPORTS_MIPS_CMP && !MIPS_MT_SMTC 203372e20142SPaul Burton select MIPS_GIC_IPI 2034eb9b5141STim Anderson select SYNC_R4K 20354a16ff4cSRalf Baechle select WEAK_ORDERING 20364a16ff4cSRalf Baechle default n 20374a16ff4cSRalf Baechle help 2038044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2039044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2040044505c7SPaul Burton its ability to start secondary CPUs. 20414a16ff4cSRalf Baechle 20425cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 20435cac93b3SPaul Burton instead of this. 20445cac93b3SPaul Burton 20450ee958e1SPaul Burtonconfig MIPS_CPS 20460ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 20470ee958e1SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 20480ee958e1SPaul Burton select MIPS_CM 20490ee958e1SPaul Burton select MIPS_CPC 20500ee958e1SPaul Burton select MIPS_GIC_IPI 20510ee958e1SPaul Burton select SMP 20520ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 20530ee958e1SPaul Burton select SYS_SUPPORTS_SMP 20540ee958e1SPaul Burton select WEAK_ORDERING 20550ee958e1SPaul Burton help 20560ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 20570ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 20580ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 20590ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 20600ee958e1SPaul Burton support is unavailable. 20610ee958e1SPaul Burton 206272e20142SPaul Burtonconfig MIPS_GIC_IPI 206372e20142SPaul Burton bool 206472e20142SPaul Burton 20659f98f3ddSPaul Burtonconfig MIPS_CM 20669f98f3ddSPaul Burton bool 20679f98f3ddSPaul Burton 20689c38cf44SPaul Burtonconfig MIPS_CPC 20699c38cf44SPaul Burton bool 20709c38cf44SPaul Burton 20711da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 20721da177e4SLinus Torvalds bool 20731da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 20741da177e4SLinus Torvalds default y 20751da177e4SLinus Torvalds 20761da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 20771da177e4SLinus Torvalds bool 20781da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 20791da177e4SLinus Torvalds default y 20801da177e4SLinus Torvalds 20811da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 20821da177e4SLinus Torvalds bool 20831da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 20841da177e4SLinus Torvalds default y 20851da177e4SLinus Torvalds 20862235a54dSSanjay Lal 20871da177e4SLinus Torvaldsconfig 64BIT_PHYS_ADDR 2088d806cb2bSRalf Baechle bool 20891da177e4SLinus Torvalds 209060ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 209160ec6571Spascal@pabr.org def_bool 64BIT_PHYS_ADDR 209260ec6571Spascal@pabr.org 20939693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 20949693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 20959693a853SFranck Bui-Huu bool "Support for the SmartMIPS ASE" 20969693a853SFranck Bui-Huu help 20979693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 20989693a853SFranck Bui-Huu increased security at both hardware and software level for 20999693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 21009693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 21019693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 21029693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 21039693a853SFranck Bui-Huu here. 21049693a853SFranck Bui-Huu 2105bce86083SSteven J. Hillconfig CPU_MICROMIPS 2106bce86083SSteven J. Hill depends on SYS_SUPPORTS_MICROMIPS 2107bce86083SSteven J. Hill bool "Build kernel using microMIPS ISA" 2108bce86083SSteven J. Hill help 2109bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2110bce86083SSteven J. Hill microMIPS ISA 2111bce86083SSteven J. Hill 2112a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 2113a5e9a69eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2114a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 2115a5e9a69eSPaul Burton default y 2116a5e9a69eSPaul Burton help 2117a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2118a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 21191db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 21201db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 21211db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 21221db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 21231db1af84SPaul Burton the size & complexity of your kernel. 2124a5e9a69eSPaul Burton 2125a5e9a69eSPaul Burton If unsure, say Y. 2126a5e9a69eSPaul Burton 21271da177e4SLinus Torvaldsconfig CPU_HAS_WB 2128f7062ddbSRalf Baechle bool 2129e01402b1SRalf Baechle 2130df0ac8a4SKevin Cernekeeconfig XKS01 2131df0ac8a4SKevin Cernekee bool 2132df0ac8a4SKevin Cernekee 2133f41ae0b2SRalf Baechle# 2134f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2135f41ae0b2SRalf Baechle# 2136e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2137f41ae0b2SRalf Baechle bool 2138e01402b1SRalf Baechle 2139f41ae0b2SRalf Baechle# 2140f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2141f41ae0b2SRalf Baechle# 2142e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2143f41ae0b2SRalf Baechle bool 2144e01402b1SRalf Baechle 21451da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 21461da177e4SLinus Torvalds bool 21471da177e4SLinus Torvalds depends on !CPU_R3000 21481da177e4SLinus Torvalds default y 21491da177e4SLinus Torvalds 21501da177e4SLinus Torvalds# 215120d60d99SMaciej W. Rozycki# CPU non-features 215220d60d99SMaciej W. Rozycki# 215320d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 215420d60d99SMaciej W. Rozycki bool 215520d60d99SMaciej W. Rozycki 215620d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 215720d60d99SMaciej W. Rozycki bool 215820d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 215920d60d99SMaciej W. Rozycki 216020d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 216120d60d99SMaciej W. Rozycki bool 216220d60d99SMaciej W. Rozycki 216320d60d99SMaciej W. Rozycki# 21641da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 21651da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 21661da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 21671da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 21681da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 21691da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 21701da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 21711da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2172797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2173797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2174797798c1SRalf Baechle# support. 21751da177e4SLinus Torvalds# 21761da177e4SLinus Torvaldsconfig HIGHMEM 21771da177e4SLinus Torvalds bool "High Memory Support" 2178*a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2179797798c1SRalf Baechle 2180797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2181797798c1SRalf Baechle bool 2182797798c1SRalf Baechle 2183797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2184797798c1SRalf Baechle bool 21851da177e4SLinus Torvalds 21869693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 21879693a853SFranck Bui-Huu bool 21889693a853SFranck Bui-Huu 2189a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2190a6a4834cSSteven J. Hill bool 2191a6a4834cSSteven J. Hill 2192a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2193a5e9a69eSPaul Burton bool 2194a5e9a69eSPaul Burton 2195b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2196b4819b59SYoichi Yuasa def_bool y 2197f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2198b4819b59SYoichi Yuasa 2199d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2200d8cb4e11SRalf Baechle bool 2201d8cb4e11SRalf Baechle default y if SGI_IP27 2202d8cb4e11SRalf Baechle help 22033dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2204d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2205d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2206d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2207d8cb4e11SRalf Baechle 2208b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2209b1c6cd42SAtsushi Nemoto bool 22107de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 221131473747SAtsushi Nemoto 2212d8cb4e11SRalf Baechleconfig NUMA 2213d8cb4e11SRalf Baechle bool "NUMA Support" 2214d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2215d8cb4e11SRalf Baechle help 2216d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2217d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2218d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2219d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2220d8cb4e11SRalf Baechle disabled. 2221d8cb4e11SRalf Baechle 2222d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2223d8cb4e11SRalf Baechle bool 2224d8cb4e11SRalf Baechle 2225c80d79d7SYasunori Gotoconfig NODES_SHIFT 2226c80d79d7SYasunori Goto int 2227c80d79d7SYasunori Goto default "6" 2228c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2229c80d79d7SYasunori Goto 223014f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 223114f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 22324be3d2f3SZi Shen Lim depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) 223314f70012SDeng-Cheng Zhu default y 223414f70012SDeng-Cheng Zhu help 223514f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 223614f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 223714f70012SDeng-Cheng Zhu 2238b4819b59SYoichi Yuasasource "mm/Kconfig" 2239b4819b59SYoichi Yuasa 22401da177e4SLinus Torvaldsconfig SMP 22411da177e4SLinus Torvalds bool "Multi-Processing support" 2242e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2243e73ea273SRalf Baechle help 22441da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 22454a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 22464a474157SRobert Graffham than one CPU, say Y. 22471da177e4SLinus Torvalds 22484a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 22491da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 22501da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 22514a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 22521da177e4SLinus Torvalds will run faster if you say N here. 22531da177e4SLinus Torvalds 22541da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 22551da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 22561da177e4SLinus Torvalds 225703502faaSAdrian Bunk See also the SMP-HOWTO available at 225803502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 22591da177e4SLinus Torvalds 22601da177e4SLinus Torvalds If you don't know what to do here, say N. 22611da177e4SLinus Torvalds 226287353d8aSRalf Baechleconfig SMP_UP 226387353d8aSRalf Baechle bool 226487353d8aSRalf Baechle 22654a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 22664a16ff4cSRalf Baechle bool 22674a16ff4cSRalf Baechle 22680ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 22690ee958e1SPaul Burton bool 22700ee958e1SPaul Burton 2271e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2272e73ea273SRalf Baechle bool 2273e73ea273SRalf Baechle 2274130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2275130e2fb7SRalf Baechle bool 2276130e2fb7SRalf Baechle 2277130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2278130e2fb7SRalf Baechle bool 2279130e2fb7SRalf Baechle 2280130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2281130e2fb7SRalf Baechle bool 2282130e2fb7SRalf Baechle 2283130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2284130e2fb7SRalf Baechle bool 2285130e2fb7SRalf Baechle 2286130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2287130e2fb7SRalf Baechle bool 2288130e2fb7SRalf Baechle 22891da177e4SLinus Torvaldsconfig NR_CPUS 22901da177e4SLinus Torvalds int "Maximum number of CPUs (2-64)" 2291c5eaff3eSMarkos Chandras range 2 64 22921da177e4SLinus Torvalds depends on SMP 2293130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2294130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2295130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2296130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2297130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 22981da177e4SLinus Torvalds help 22991da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 23001da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 23011da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 230272ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 230372ede9b1SAtsushi Nemoto and 2 for all others. 23041da177e4SLinus Torvalds 23051da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 230672ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 230772ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 230872ede9b1SAtsushi Nemoto power of two. 23091da177e4SLinus Torvalds 2310399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2311399aaa25SAl Cooper bool 2312399aaa25SAl Cooper 23131723b4a3SAtsushi Nemoto# 23141723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 23151723b4a3SAtsushi Nemoto# 23161723b4a3SAtsushi Nemoto 23171723b4a3SAtsushi Nemotochoice 23181723b4a3SAtsushi Nemoto prompt "Timer frequency" 23191723b4a3SAtsushi Nemoto default HZ_250 23201723b4a3SAtsushi Nemoto help 23211723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 23221723b4a3SAtsushi Nemoto 23231723b4a3SAtsushi Nemoto config HZ_48 23240f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 23251723b4a3SAtsushi Nemoto 23261723b4a3SAtsushi Nemoto config HZ_100 23271723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 23281723b4a3SAtsushi Nemoto 23291723b4a3SAtsushi Nemoto config HZ_128 23301723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 23311723b4a3SAtsushi Nemoto 23321723b4a3SAtsushi Nemoto config HZ_250 23331723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 23341723b4a3SAtsushi Nemoto 23351723b4a3SAtsushi Nemoto config HZ_256 23361723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 23371723b4a3SAtsushi Nemoto 23381723b4a3SAtsushi Nemoto config HZ_1000 23391723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 23401723b4a3SAtsushi Nemoto 23411723b4a3SAtsushi Nemoto config HZ_1024 23421723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 23431723b4a3SAtsushi Nemoto 23441723b4a3SAtsushi Nemotoendchoice 23451723b4a3SAtsushi Nemoto 23461723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 23471723b4a3SAtsushi Nemoto bool 23481723b4a3SAtsushi Nemoto 23491723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 23501723b4a3SAtsushi Nemoto bool 23511723b4a3SAtsushi Nemoto 23521723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 23531723b4a3SAtsushi Nemoto bool 23541723b4a3SAtsushi Nemoto 23551723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 23561723b4a3SAtsushi Nemoto bool 23571723b4a3SAtsushi Nemoto 23581723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 23591723b4a3SAtsushi Nemoto bool 23601723b4a3SAtsushi Nemoto 23611723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 23621723b4a3SAtsushi Nemoto bool 23631723b4a3SAtsushi Nemoto 23641723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 23651723b4a3SAtsushi Nemoto bool 23661723b4a3SAtsushi Nemoto 23671723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 23681723b4a3SAtsushi Nemoto bool 23691723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 23701723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 23711723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 23721723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 23731723b4a3SAtsushi Nemoto 23741723b4a3SAtsushi Nemotoconfig HZ 23751723b4a3SAtsushi Nemoto int 23761723b4a3SAtsushi Nemoto default 48 if HZ_48 23771723b4a3SAtsushi Nemoto default 100 if HZ_100 23781723b4a3SAtsushi Nemoto default 128 if HZ_128 23791723b4a3SAtsushi Nemoto default 250 if HZ_250 23801723b4a3SAtsushi Nemoto default 256 if HZ_256 23811723b4a3SAtsushi Nemoto default 1000 if HZ_1000 23821723b4a3SAtsushi Nemoto default 1024 if HZ_1024 23831723b4a3SAtsushi Nemoto 2384e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 23851da177e4SLinus Torvalds 2386ea6e942bSAtsushi Nemotoconfig KEXEC 23877d60717eSKees Cook bool "Kexec system call" 2388ea6e942bSAtsushi Nemoto help 2389ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2390ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 23913dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2392ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2393ea6e942bSAtsushi Nemoto 239401dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2395ea6e942bSAtsushi Nemoto 2396ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2397ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2398bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2399bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2400bf220695SGeert Uytterhoeven made. 2401ea6e942bSAtsushi Nemoto 24027aa1c8f4SRalf Baechleconfig CRASH_DUMP 24037aa1c8f4SRalf Baechle bool "Kernel crash dumps" 24047aa1c8f4SRalf Baechle help 24057aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 24067aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 24077aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 24087aa1c8f4SRalf Baechle a specially reserved region and then later executed after 24097aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 24107aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 24117aa1c8f4SRalf Baechle PHYSICAL_START. 24127aa1c8f4SRalf Baechle 24137aa1c8f4SRalf Baechleconfig PHYSICAL_START 24147aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 24157aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 24167aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 24177aa1c8f4SRalf Baechle depends on CRASH_DUMP 24187aa1c8f4SRalf Baechle help 24197aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 24207aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 24217aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 24227aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 24237aa1c8f4SRalf Baechle passed to the panic-ed kernel). 24247aa1c8f4SRalf Baechle 2425ea6e942bSAtsushi Nemotoconfig SECCOMP 2426ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2427293c5bd1SRalf Baechle depends on PROC_FS 2428ea6e942bSAtsushi Nemoto default y 2429ea6e942bSAtsushi Nemoto help 2430ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2431ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2432ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2433ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2434ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2435ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2436ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2437ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2438ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2439ea6e942bSAtsushi Nemoto 2440ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2441ea6e942bSAtsushi Nemoto 2442597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 2443597ce172SPaul Burton bool "Support for O32 binaries using 64-bit FP" 2444597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2445597ce172SPaul Burton default y 2446597ce172SPaul Burton help 2447597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2448597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2449597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2450597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2451597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2452597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2453597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2454597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2455597ce172SPaul Burton saying N here. 2456597ce172SPaul Burton 2457597ce172SPaul Burton If unsure, say Y. 2458597ce172SPaul Burton 2459f2ffa5abSDezhong Diaoconfig USE_OF 24600b3e06fdSJonas Gorski bool 2461f2ffa5abSDezhong Diao select OF 2462e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2463abd2363fSGrant Likely select IRQ_DOMAIN 2464f2ffa5abSDezhong Diao 24655e83d430SRalf Baechleendmenu 24665e83d430SRalf Baechle 24671df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 24681df0f0ffSAtsushi Nemoto bool 24691df0f0ffSAtsushi Nemoto default y 24701df0f0ffSAtsushi Nemoto 24711df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 24721df0f0ffSAtsushi Nemoto bool 24731df0f0ffSAtsushi Nemoto default y 24741df0f0ffSAtsushi Nemoto 2475b6c3539bSRalf Baechlesource "init/Kconfig" 2476b6c3539bSRalf Baechle 2477dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2478dc52ddc0SMatt Helsley 24791da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 24801da177e4SLinus Torvalds 24815e83d430SRalf Baechleconfig HW_HAS_EISA 24825e83d430SRalf Baechle bool 24831da177e4SLinus Torvaldsconfig HW_HAS_PCI 24841da177e4SLinus Torvalds bool 24851da177e4SLinus Torvalds 24861da177e4SLinus Torvaldsconfig PCI 24871da177e4SLinus Torvalds bool "Support for PCI controller" 24881da177e4SLinus Torvalds depends on HW_HAS_PCI 2489abb4ae46SRalf Baechle select PCI_DOMAINS 24900f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 24911da177e4SLinus Torvalds help 24921da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 24931da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 24941da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 24951da177e4SLinus Torvalds say Y, otherwise N. 24961da177e4SLinus Torvalds 24971da177e4SLinus Torvaldsconfig PCI_DOMAINS 24981da177e4SLinus Torvalds bool 24991da177e4SLinus Torvalds 25001da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 25011da177e4SLinus Torvalds 25023f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 25033f787ca4SJonas Gorski 25041da177e4SLinus Torvalds# 25051da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 25061da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 25071da177e4SLinus Torvalds# users to choose the right thing ... 25081da177e4SLinus Torvalds# 25091da177e4SLinus Torvaldsconfig ISA 25101da177e4SLinus Torvalds bool 25111da177e4SLinus Torvalds 25121da177e4SLinus Torvaldsconfig EISA 25131da177e4SLinus Torvalds bool "EISA support" 25145e83d430SRalf Baechle depends on HW_HAS_EISA 25151da177e4SLinus Torvalds select ISA 2516aa414dffSRalf Baechle select GENERIC_ISA_DMA 25171da177e4SLinus Torvalds ---help--- 25181da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 25191da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 25201da177e4SLinus Torvalds 25211da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 25221da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 25231da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 25241da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 25251da177e4SLinus Torvalds 25261da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 25271da177e4SLinus Torvalds 25281da177e4SLinus Torvalds Otherwise, say N. 25291da177e4SLinus Torvalds 25301da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 25311da177e4SLinus Torvalds 25321da177e4SLinus Torvaldsconfig TC 25331da177e4SLinus Torvalds bool "TURBOchannel support" 25341da177e4SLinus Torvalds depends on MACH_DECSTATION 25351da177e4SLinus Torvalds help 253650a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 253750a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 253850a23e6eSJustin P. Mattock at: 253950a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 254050a23e6eSJustin P. Mattock and: 254150a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 254250a23e6eSJustin P. Mattock Linux driver support status is documented at: 254350a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 25441da177e4SLinus Torvalds 25451da177e4SLinus Torvaldsconfig MMU 25461da177e4SLinus Torvalds bool 25471da177e4SLinus Torvalds default y 25481da177e4SLinus Torvalds 2549d865bea4SRalf Baechleconfig I8253 2550d865bea4SRalf Baechle bool 2551798778b8SRussell King select CLKSRC_I8253 25522d02612fSThomas Gleixner select CLKEVT_I8253 25539726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2554d865bea4SRalf Baechle 2555e05eb3f8SRalf Baechleconfig ZONE_DMA 2556e05eb3f8SRalf Baechle bool 2557e05eb3f8SRalf Baechle 2558cce335aeSRalf Baechleconfig ZONE_DMA32 2559cce335aeSRalf Baechle bool 2560cce335aeSRalf Baechle 25611da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 25621da177e4SLinus Torvalds 25631da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 25641da177e4SLinus Torvalds 2565388b78adSAlexandre Bounineconfig RAPIDIO 256656abde72SAlexandre Bounine tristate "RapidIO support" 2567388b78adSAlexandre Bounine depends on PCI 2568388b78adSAlexandre Bounine default n 2569388b78adSAlexandre Bounine help 2570388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2571388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2572388b78adSAlexandre Bounine 2573388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2574388b78adSAlexandre Bounine 25751da177e4SLinus Torvaldsendmenu 25761da177e4SLinus Torvalds 25771da177e4SLinus Torvaldsmenu "Executable file formats" 25781da177e4SLinus Torvalds 25791da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 25801da177e4SLinus Torvalds 25811da177e4SLinus Torvaldsconfig TRAD_SIGNALS 25821da177e4SLinus Torvalds bool 25831da177e4SLinus Torvalds 25841da177e4SLinus Torvaldsconfig MIPS32_COMPAT 25851da177e4SLinus Torvalds bool "Kernel support for Linux/MIPS 32-bit binary compatibility" 2586875d43e7SRalf Baechle depends on 64BIT 25871da177e4SLinus Torvalds help 25881da177e4SLinus Torvalds Select this option if you want Linux/MIPS 32-bit binary 25891da177e4SLinus Torvalds compatibility. Since all software available for Linux/MIPS is 25901da177e4SLinus Torvalds currently 32-bit you should say Y here. 25911da177e4SLinus Torvalds 25921da177e4SLinus Torvaldsconfig COMPAT 25931da177e4SLinus Torvalds bool 25941da177e4SLinus Torvalds depends on MIPS32_COMPAT 259548b25c43SChris Metcalf select ARCH_WANT_OLD_COMPAT_IPC 25961da177e4SLinus Torvalds default y 25971da177e4SLinus Torvalds 259805e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 259905e43966SAtsushi Nemoto bool 260005e43966SAtsushi Nemoto depends on COMPAT && SYSVIPC 260105e43966SAtsushi Nemoto default y 260205e43966SAtsushi Nemoto 26031da177e4SLinus Torvaldsconfig MIPS32_O32 26041da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 26051da177e4SLinus Torvalds depends on MIPS32_COMPAT 26061da177e4SLinus Torvalds help 26071da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 26081da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 26091da177e4SLinus Torvalds existing binaries are in this format. 26101da177e4SLinus Torvalds 26111da177e4SLinus Torvalds If unsure, say Y. 26121da177e4SLinus Torvalds 26131da177e4SLinus Torvaldsconfig MIPS32_N32 26141da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 26151da177e4SLinus Torvalds depends on MIPS32_COMPAT 26161da177e4SLinus Torvalds help 26171da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 26181da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 26191da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 26201da177e4SLinus Torvalds cases. 26211da177e4SLinus Torvalds 26221da177e4SLinus Torvalds If unsure, say N. 26231da177e4SLinus Torvalds 26241da177e4SLinus Torvaldsconfig BINFMT_ELF32 26251da177e4SLinus Torvalds bool 26261da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 26271da177e4SLinus Torvalds 26282116245eSRalf Baechleendmenu 26291da177e4SLinus Torvalds 26302116245eSRalf Baechlemenu "Power management options" 2631952fa954SRodolfo Giometti 2632363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2633363c55caSWu Zhangjin def_bool y 26343f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2635363c55caSWu Zhangjin 2636f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2637f4cb5700SJohannes Berg def_bool y 26383f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2639f4cb5700SJohannes Berg 26402116245eSRalf Baechlesource "kernel/power/Kconfig" 2641952fa954SRodolfo Giometti 26421da177e4SLinus Torvaldsendmenu 26431da177e4SLinus Torvalds 26447a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 26457a998935SViresh Kumar bool 26467a998935SViresh Kumar 26477a998935SViresh Kumarif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 26487a998935SViresh Kumarmenu "CPU Power Management" 26497a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 26507a998935SViresh Kumarendmenu 26517a998935SViresh Kumarendif 26529726b43aSWu Zhangjin 2653d5950b43SSam Ravnborgsource "net/Kconfig" 2654d5950b43SSam Ravnborg 26551da177e4SLinus Torvaldssource "drivers/Kconfig" 26561da177e4SLinus Torvalds 265798cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 265898cdee0eSRalf Baechle 26591da177e4SLinus Torvaldssource "fs/Kconfig" 26601da177e4SLinus Torvalds 26611da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 26621da177e4SLinus Torvalds 26631da177e4SLinus Torvaldssource "security/Kconfig" 26641da177e4SLinus Torvalds 26651da177e4SLinus Torvaldssource "crypto/Kconfig" 26661da177e4SLinus Torvalds 26671da177e4SLinus Torvaldssource "lib/Kconfig" 26682235a54dSSanjay Lal 26692235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 2670