11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 5393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 6c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 7f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 8ec7748b5SSam Ravnborg select HAVE_IDE 942d4b839SMathieu Desnoyers select HAVE_OPROFILE 107f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 117f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1288547001SJason Wessel select HAVE_ARCH_KGDB 13c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 147563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 15d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 1669a7d1b3SWu Zhangjin select HAVE_FUNCTION_TRACE_MCOUNT_TEST 17538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 18538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 1964575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2029c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 21c1bf207dSDavid Daney select HAVE_KPROBES 22c1bf207dSDavid Daney select HAVE_KRETPROBES 23b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 241d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 25e26d196cSDavid Daney select ARCH_BINFMT_ELF_RANDOMIZE_PIE 26383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 2721a41faaSWu Zhangjin select RTC_LIB if !MACH_LOONGSON 282b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 297463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3048e1fd5aSDavid Daney select HAVE_DMA_ATTRS 3148e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 323bd27e32SDavid Daney select GENERIC_IRQ_PROBE 33f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3478857614SMarkos Chandras select GENERIC_PCI_IOMAP 3594bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 36c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 370f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 389d15ffc8STejun Heo select HAVE_MEMBLOCK 399d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 409d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 41360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 424b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 43cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 44cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 45786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 464febd95aSStephen Rothwell select VIRT_TO_BUS 472f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 482f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 4950150d2bSAl Viro select CLONE_BACKWARDS 50d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5119952a92SKees Cook select HAVE_CC_STACKPROTECTOR 521da177e4SLinus Torvalds 531da177e4SLinus Torvaldsmenu "Machine selection" 541da177e4SLinus Torvalds 555e83d430SRalf Baechlechoice 565e83d430SRalf Baechle prompt "System type" 575e83d430SRalf Baechle default SGI_IP22 581da177e4SLinus Torvalds 5942a4f17dSManuel Laussconfig MIPS_ALCHEMY 60c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 6142a4f17dSManuel Lauss select 64BIT_PHYS_ADDR 62f772cdb2SRalf Baechle select CEVT_R4K 63d7ea335cSSteven J. Hill select CSRC_R4K 6442a4f17dSManuel Lauss select IRQ_CPU 6542a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 6642a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 6742a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 68efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 691b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 7037663860SManuel Lauss select USB_ARCH_HAS_OHCI 7137663860SManuel Lauss select USB_ARCH_HAS_EHCI 721da177e4SLinus Torvalds 737ca5dc14SFlorian Fainelliconfig AR7 747ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 757ca5dc14SFlorian Fainelli select BOOT_ELF32 767ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 777ca5dc14SFlorian Fainelli select CEVT_R4K 787ca5dc14SFlorian Fainelli select CSRC_R4K 797ca5dc14SFlorian Fainelli select IRQ_CPU 807ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 817ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 827ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 837ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 847ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 857ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 861b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 875f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 887ca5dc14SFlorian Fainelli select VLYNQ 898551fb64SYoichi Yuasa select HAVE_CLK 907ca5dc14SFlorian Fainelli help 917ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 927ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 937ca5dc14SFlorian Fainelli 94d4a67d9dSGabor Juhosconfig ATH79 95d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 966eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 97d4a67d9dSGabor Juhos select BOOT_RAW 98d4a67d9dSGabor Juhos select CEVT_R4K 99d4a67d9dSGabor Juhos select CSRC_R4K 100d4a67d9dSGabor Juhos select DMA_NONCOHERENT 10194638067SGabor Juhos select HAVE_CLK 1022c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 103d4a67d9dSGabor Juhos select IRQ_CPU 1040aabf1a4SGabor Juhos select MIPS_MACHINE 105d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 106d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 107d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 108d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 109d4a67d9dSGabor Juhos help 110d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 111d4a67d9dSGabor Juhos 1121c0c13ebSAurelien Jarnoconfig BCM47XX 113c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1142da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 115fe08f8c2SHauke Mehrtens select BOOT_RAW 11642f77542SRalf Baechle select CEVT_R4K 117940f6b48SRalf Baechle select CSRC_R4K 1181c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1191c0c13ebSAurelien Jarno select HW_HAS_PCI 1201c0c13ebSAurelien Jarno select IRQ_CPU 121314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 122dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1231c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1241c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 12525e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 126e1ccbb65SHauke Mehrtens select EARLY_PRINTK_8250 if EARLY_PRINTK 1271c0c13ebSAurelien Jarno help 1281c0c13ebSAurelien Jarno Support for BCM47XX based boards 1291c0c13ebSAurelien Jarno 130e7300d04SMaxime Bizonconfig BCM63XX 131e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 132ae8de61cSFlorian Fainelli select BOOT_RAW 133e7300d04SMaxime Bizon select CEVT_R4K 134e7300d04SMaxime Bizon select CSRC_R4K 135e7300d04SMaxime Bizon select DMA_NONCOHERENT 136e7300d04SMaxime Bizon select IRQ_CPU 137e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 138e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 139e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 140e7300d04SMaxime Bizon select SWAP_IO_SPACE 141e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 1423e82eeebSYoichi Yuasa select HAVE_CLK 143af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 144e7300d04SMaxime Bizon help 145e7300d04SMaxime Bizon Support for BCM63XX based boards 146e7300d04SMaxime Bizon 1471da177e4SLinus Torvaldsconfig MIPS_COBALT 1483fa986faSMartin Michlmayr bool "Cobalt Server" 14942f77542SRalf Baechle select CEVT_R4K 150940f6b48SRalf Baechle select CSRC_R4K 1511097c6acSYoichi Yuasa select CEVT_GT641XX 1521da177e4SLinus Torvalds select DMA_NONCOHERENT 1538a8594a7SYoichi Yuasa select EARLY_PRINTK_8250 if EARLY_PRINTK 1541da177e4SLinus Torvalds select HW_HAS_PCI 155d865bea4SRalf Baechle select I8253 1561da177e4SLinus Torvalds select I8259 1571da177e4SLinus Torvalds select IRQ_CPU 158d5ab1a69SYoichi Yuasa select IRQ_GT641XX 159252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 160e25bfc92SYoichi Yuasa select PCI 1617cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 1620a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 163ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1640e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 1655e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1661da177e4SLinus Torvalds 1671da177e4SLinus Torvaldsconfig MACH_DECSTATION 1683fa986faSMartin Michlmayr bool "DECstations" 1691da177e4SLinus Torvalds select BOOT_ELF32 1706457d9fcSYoichi Yuasa select CEVT_DS1287 17142f77542SRalf Baechle select CEVT_R4K 1724247417dSYoichi Yuasa select CSRC_IOASIC 173940f6b48SRalf Baechle select CSRC_R4K 17420d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 17520d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 17620d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 1771da177e4SLinus Torvalds select DMA_NONCOHERENT 178d388d685SMaciej W. Rozycki select NO_IOPORT 1791da177e4SLinus Torvalds select IRQ_CPU 1807cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 1817cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 182ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1837d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 1845e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1851723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 1861723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 1871723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 188930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 1895e83d430SRalf Baechle help 1901da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 1911da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 1921da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 1931da177e4SLinus Torvalds 1941da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 1951da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 1961da177e4SLinus Torvalds 1971da177e4SLinus Torvalds DECstation 5000/50 1981da177e4SLinus Torvalds DECstation 5000/150 1991da177e4SLinus Torvalds DECstation 5000/260 2001da177e4SLinus Torvalds DECsystem 5900/260 2011da177e4SLinus Torvalds 2021da177e4SLinus Torvalds otherwise choose R3000. 2031da177e4SLinus Torvalds 2045e83d430SRalf Baechleconfig MACH_JAZZ 2053fa986faSMartin Michlmayr bool "Jazz family of machines" 2060e2794b0SRalf Baechle select FW_ARC 2070e2794b0SRalf Baechle select FW_ARC32 2085e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 20942f77542SRalf Baechle select CEVT_R4K 210940f6b48SRalf Baechle select CSRC_R4K 211e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2125e83d430SRalf Baechle select GENERIC_ISA_DMA 2138a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 214ea202c63SThomas Bogendoerfer select IRQ_CPU 215d865bea4SRalf Baechle select I8253 2165e83d430SRalf Baechle select I8259 2175e83d430SRalf Baechle select ISA 2187cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2195e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2207d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2211723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2221da177e4SLinus Torvalds help 2235e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2245e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 225692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2265e83d430SRalf Baechle Olivetti M700-10 workstations. 2275e83d430SRalf Baechle 2285ebabe59SLars-Peter Clausenconfig MACH_JZ4740 2295ebabe59SLars-Peter Clausen bool "Ingenic JZ4740 based machines" 2305ebabe59SLars-Peter Clausen select SYS_HAS_CPU_MIPS32_R1 2315ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2325ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 233f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 2345ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 2355ebabe59SLars-Peter Clausen select IRQ_CPU 2365ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 2375ebabe59SLars-Peter Clausen select SYS_HAS_EARLY_PRINTK 2385ebabe59SLars-Peter Clausen select HAVE_PWM 239ab5330ebSMaurus Cuelenaere select HAVE_CLK 24083bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 2415ebabe59SLars-Peter Clausen 242171bb2f1SJohn Crispinconfig LANTIQ 243171bb2f1SJohn Crispin bool "Lantiq based platforms" 244171bb2f1SJohn Crispin select DMA_NONCOHERENT 245171bb2f1SJohn Crispin select IRQ_CPU 246171bb2f1SJohn Crispin select CEVT_R4K 247171bb2f1SJohn Crispin select CSRC_R4K 248171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 249171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 250171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 251171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 252171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 253171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 254171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 255171bb2f1SJohn Crispin select SWAP_IO_SPACE 256171bb2f1SJohn Crispin select BOOT_RAW 257287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 258287e3f3fSJohn Crispin select CLKDEV_LOOKUP 259a0392222SJohn Crispin select USE_OF 2603f8c50c9SJohn Crispin select PINCTRL 2613f8c50c9SJohn Crispin select PINCTRL_LANTIQ 262171bb2f1SJohn Crispin 2631f21d2bdSBrian Murphyconfig LASAT 2641f21d2bdSBrian Murphy bool "LASAT Networks platforms" 26542f77542SRalf Baechle select CEVT_R4K 266940f6b48SRalf Baechle select CSRC_R4K 2671f21d2bdSBrian Murphy select DMA_NONCOHERENT 2681f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 2691f21d2bdSBrian Murphy select HW_HAS_PCI 270a5ccfe5cSRalf Baechle select IRQ_CPU 2711f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 2721f21d2bdSBrian Murphy select MIPS_NILE4 2731f21d2bdSBrian Murphy select R5000_CPU_SCACHE 2741f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 2751f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 2761f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 2771f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 2781f21d2bdSBrian Murphy 27985749d24SWu Zhangjinconfig MACH_LOONGSON 28085749d24SWu Zhangjin bool "Loongson family of machines" 281c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 282ade299d8SYoichi Yuasa help 28385749d24SWu Zhangjin This enables the support of Loongson family of machines. 28485749d24SWu Zhangjin 28585749d24SWu Zhangjin Loongson is a family of general-purpose MIPS-compatible CPUs. 28685749d24SWu Zhangjin developed at Institute of Computing Technology (ICT), 28785749d24SWu Zhangjin Chinese Academy of Sciences (CAS) in the People's Republic 28885749d24SWu Zhangjin of China. The chief architect is Professor Weiwu Hu. 289ade299d8SYoichi Yuasa 290ca585cf9SKelvin Cheungconfig MACH_LOONGSON1 291ca585cf9SKelvin Cheung bool "Loongson 1 family of machines" 292ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 293ca585cf9SKelvin Cheung help 294ca585cf9SKelvin Cheung This enables support for the Loongson 1 based machines. 295ca585cf9SKelvin Cheung 296ca585cf9SKelvin Cheung Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by 297ca585cf9SKelvin Cheung the ICT (Institute of Computing Technology) and the Chinese Academy 298ca585cf9SKelvin Cheung of Sciences. 299ca585cf9SKelvin Cheung 3001da177e4SLinus Torvaldsconfig MIPS_MALTA 3013fa986faSMartin Michlmayr bool "MIPS Malta board" 30261ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 3031da177e4SLinus Torvalds select BOOT_ELF32 304fa71c960SRalf Baechle select BOOT_RAW 30542f77542SRalf Baechle select CEVT_R4K 306940f6b48SRalf Baechle select CSRC_R4K 307778eeb1bSSteven J. Hill select CSRC_GIC 308885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 3091da177e4SLinus Torvalds select GENERIC_ISA_DMA 3108a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 311aa414dffSRalf Baechle select IRQ_CPU 31239b8d525SRalf Baechle select IRQ_GIC 3131da177e4SLinus Torvalds select HW_HAS_PCI 314d865bea4SRalf Baechle select I8253 3151da177e4SLinus Torvalds select I8259 3165e83d430SRalf Baechle select MIPS_BONITO64 3179318c51aSChris Dearman select MIPS_CPU_SCACHE 318252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 3195e83d430SRalf Baechle select MIPS_MSC 3201da177e4SLinus Torvalds select SWAP_IO_SPACE 3217cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 3227cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 3237cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 3245d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 3257cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3267cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 327ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 328ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 3295e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 3305e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3310365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 332e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 333f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 3349693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 3351b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 3361da177e4SLinus Torvalds help 337f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 3381da177e4SLinus Torvalds board. 3391da177e4SLinus Torvalds 340ec47b274SSteven J. Hillconfig MIPS_SEAD3 341ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 342ec47b274SSteven J. Hill select BOOT_ELF32 343ec47b274SSteven J. Hill select BOOT_RAW 344ec47b274SSteven J. Hill select CEVT_R4K 345ec47b274SSteven J. Hill select CSRC_R4K 346dfa762e1SSteven J. Hill select CSRC_GIC 347ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 348ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 349ec47b274SSteven J. Hill select DMA_NONCOHERENT 350ec47b274SSteven J. Hill select IRQ_CPU 351ec47b274SSteven J. Hill select IRQ_GIC 35244327236SQais Yousef select LIBFDT 353ec47b274SSteven J. Hill select MIPS_MSC 354ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 355ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 356ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 357ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 358ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 359ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 360ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 361ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 362ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 363a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 364ec47b274SSteven J. Hill select USB_ARCH_HAS_EHCI 365ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 366ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 3679b731009SSteven J. Hill select USE_OF 368ec47b274SSteven J. Hill help 369ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 370ec47b274SSteven J. Hill board. 371ec47b274SSteven J. Hill 372a83860c2SRalf Baechleconfig NEC_MARKEINS 373a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 374a83860c2SRalf Baechle select SOC_EMMA2RH 375a83860c2SRalf Baechle select HW_HAS_PCI 376a83860c2SRalf Baechle help 377a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 378ade299d8SYoichi Yuasa 3795e83d430SRalf Baechleconfig MACH_VR41XX 38074142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 38142f77542SRalf Baechle select CEVT_R4K 382940f6b48SRalf Baechle select CSRC_R4K 3837cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 38427fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 3855e83d430SRalf Baechle 386edb6310aSDaniel Lairdconfig NXP_STB220 387edb6310aSDaniel Laird bool "NXP STB220 board" 388edb6310aSDaniel Laird select SOC_PNX833X 389edb6310aSDaniel Laird help 390edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 391edb6310aSDaniel Laird 392edb6310aSDaniel Lairdconfig NXP_STB225 393edb6310aSDaniel Laird bool "NXP 225 board" 394edb6310aSDaniel Laird select SOC_PNX833X 395edb6310aSDaniel Laird select SOC_PNX8335 396edb6310aSDaniel Laird help 397edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 398edb6310aSDaniel Laird 3999267a30dSMarc St-Jeanconfig PMC_MSP 4009267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 40139d30c13SAnoop P A select CEVT_R4K 40239d30c13SAnoop P A select CSRC_R4K 4039267a30dSMarc St-Jean select DMA_NONCOHERENT 4049267a30dSMarc St-Jean select SWAP_IO_SPACE 4059267a30dSMarc St-Jean select NO_EXCEPT_FILL 4069267a30dSMarc St-Jean select BOOT_RAW 4079267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 4089267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 4099267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 4109267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 4119267a30dSMarc St-Jean select IRQ_CPU 4129267a30dSMarc St-Jean select SERIAL_8250 4139267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 4149296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 4159296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 4169267a30dSMarc St-Jean help 4179267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 4189267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 4199267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 4209267a30dSMarc St-Jean a variety of MIPS cores. 4219267a30dSMarc St-Jean 422ae2b5bb6SJohn Crispinconfig RALINK 423ae2b5bb6SJohn Crispin bool "Ralink based machines" 424ae2b5bb6SJohn Crispin select CEVT_R4K 425ae2b5bb6SJohn Crispin select CSRC_R4K 426ae2b5bb6SJohn Crispin select BOOT_RAW 427ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 428ae2b5bb6SJohn Crispin select IRQ_CPU 429ae2b5bb6SJohn Crispin select USE_OF 430ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 431ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 432ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 433ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 434ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 435ae2b5bb6SJohn Crispin select HAVE_MACH_CLKDEV 436ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 4372a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 4382a153f1cSJohn Crispin select RESET_CONTROLLER 439ae2b5bb6SJohn Crispin 4401da177e4SLinus Torvaldsconfig SGI_IP22 4413fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 4420e2794b0SRalf Baechle select FW_ARC 4430e2794b0SRalf Baechle select FW_ARC32 4441da177e4SLinus Torvalds select BOOT_ELF32 44542f77542SRalf Baechle select CEVT_R4K 446940f6b48SRalf Baechle select CSRC_R4K 447e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 4481da177e4SLinus Torvalds select DMA_NONCOHERENT 4495e83d430SRalf Baechle select HW_HAS_EISA 450d865bea4SRalf Baechle select I8253 45168de4803SThomas Bogendoerfer select I8259 4521da177e4SLinus Torvalds select IP22_CPU_SCACHE 4531da177e4SLinus Torvalds select IRQ_CPU 454aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 455e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 456e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 45736e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 458e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 459e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 460e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 4611da177e4SLinus Torvalds select SWAP_IO_SPACE 4627cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 4637cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 4642b5e63f6SMartin Michlmayr # 4652b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 4662b5e63f6SMartin Michlmayr # memory during early boot on some machines. 4672b5e63f6SMartin Michlmayr # 4682b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 4692b5e63f6SMartin Michlmayr # for a more details discussion 4702b5e63f6SMartin Michlmayr # 4712b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 472ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 473ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4745e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 475930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 4761da177e4SLinus Torvalds help 4771da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 4781da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 4791da177e4SLinus Torvalds that runs on these, say Y here. 4801da177e4SLinus Torvalds 4811da177e4SLinus Torvaldsconfig SGI_IP27 4823fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 4830e2794b0SRalf Baechle select FW_ARC 4840e2794b0SRalf Baechle select FW_ARC64 4855e83d430SRalf Baechle select BOOT_ELF64 486e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 487634286f1SRalf Baechle select DMA_COHERENT 48836a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 4891da177e4SLinus Torvalds select HW_HAS_PCI 490130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 4917cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 492ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4935e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 494d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 4951a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 496930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 4971da177e4SLinus Torvalds help 4981da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 4991da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 5001da177e4SLinus Torvalds here. 5011da177e4SLinus Torvalds 502e2defae5SThomas Bogendoerferconfig SGI_IP28 5037d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 5040e2794b0SRalf Baechle select FW_ARC 5050e2794b0SRalf Baechle select FW_ARC64 506e2defae5SThomas Bogendoerfer select BOOT_ELF64 507e2defae5SThomas Bogendoerfer select CEVT_R4K 508e2defae5SThomas Bogendoerfer select CSRC_R4K 509e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 510e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 511e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 512e2defae5SThomas Bogendoerfer select IRQ_CPU 513e2defae5SThomas Bogendoerfer select HW_HAS_EISA 514e2defae5SThomas Bogendoerfer select I8253 515e2defae5SThomas Bogendoerfer select I8259 516e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 517e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 5185b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 519e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 520e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 521e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 522e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 523e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 5242b5e63f6SMartin Michlmayr # 5252b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5262b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5272b5e63f6SMartin Michlmayr # 5282b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5292b5e63f6SMartin Michlmayr # for a more details discussion 5302b5e63f6SMartin Michlmayr # 5312b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 532e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 533e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 534e2defae5SThomas Bogendoerfer help 535e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 536e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 537e2defae5SThomas Bogendoerfer 5381da177e4SLinus Torvaldsconfig SGI_IP32 539cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 5400e2794b0SRalf Baechle select FW_ARC 5410e2794b0SRalf Baechle select FW_ARC32 5421da177e4SLinus Torvalds select BOOT_ELF32 54342f77542SRalf Baechle select CEVT_R4K 544940f6b48SRalf Baechle select CSRC_R4K 5451da177e4SLinus Torvalds select DMA_NONCOHERENT 5461da177e4SLinus Torvalds select HW_HAS_PCI 547dd67b155SRalf Baechle select IRQ_CPU 5481da177e4SLinus Torvalds select R5000_CPU_SCACHE 5491da177e4SLinus Torvalds select RM7000_CPU_SCACHE 5507cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5517cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 5527cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 553dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 554ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5555e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5561da177e4SLinus Torvalds help 5571da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 5581da177e4SLinus Torvalds 559ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 560ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 5615e83d430SRalf Baechle select BOOT_ELF32 5625e83d430SRalf Baechle select DMA_COHERENT 5635e83d430SRalf Baechle select SIBYTE_BCM1120 5645e83d430SRalf Baechle select SWAP_IO_SPACE 5657cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5665e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5675e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5685e83d430SRalf Baechle 569ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 570ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 5715e83d430SRalf Baechle select BOOT_ELF32 5725e83d430SRalf Baechle select DMA_COHERENT 5735e83d430SRalf Baechle select SIBYTE_BCM1120 5745e83d430SRalf Baechle select SWAP_IO_SPACE 5757cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5765e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5775e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5785e83d430SRalf Baechle 5795e83d430SRalf Baechleconfig SIBYTE_CRHONE 5803fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 5815e83d430SRalf Baechle select BOOT_ELF32 5825e83d430SRalf Baechle select DMA_COHERENT 5835e83d430SRalf Baechle select SIBYTE_BCM1125 5845e83d430SRalf Baechle select SWAP_IO_SPACE 5857cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5865e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5875e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 5885e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5895e83d430SRalf Baechle 590ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 591ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 592ade299d8SYoichi Yuasa select BOOT_ELF32 593ade299d8SYoichi Yuasa select DMA_COHERENT 594ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 595ade299d8SYoichi Yuasa select SWAP_IO_SPACE 596ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 597ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 598ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 599ade299d8SYoichi Yuasa 600ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 601ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 602ade299d8SYoichi Yuasa select BOOT_ELF32 603ade299d8SYoichi Yuasa select DMA_COHERENT 604fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 605ade299d8SYoichi Yuasa select SIBYTE_SB1250 606ade299d8SYoichi Yuasa select SWAP_IO_SPACE 607ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 608ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 609ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 610ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 611cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 612ade299d8SYoichi Yuasa 613ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 614ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 615ade299d8SYoichi Yuasa select BOOT_ELF32 616ade299d8SYoichi Yuasa select DMA_COHERENT 617fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 618ade299d8SYoichi Yuasa select SIBYTE_SB1250 619ade299d8SYoichi Yuasa select SWAP_IO_SPACE 620ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 621ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 622ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 623ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 624ade299d8SYoichi Yuasa 625ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 626ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 627ade299d8SYoichi Yuasa select BOOT_ELF32 628ade299d8SYoichi Yuasa select DMA_COHERENT 629ade299d8SYoichi Yuasa select SIBYTE_SB1250 630ade299d8SYoichi Yuasa select SWAP_IO_SPACE 631ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 632ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 633ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 634ade299d8SYoichi Yuasa 635ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 636ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 637ade299d8SYoichi Yuasa select BOOT_ELF32 638ade299d8SYoichi Yuasa select DMA_COHERENT 639ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 640ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 641ade299d8SYoichi Yuasa select SWAP_IO_SPACE 642ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 643ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 644651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 645ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 646cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 647ade299d8SYoichi Yuasa 64814b36af4SThomas Bogendoerferconfig SNI_RM 64914b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 6500e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 6510e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 652aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 6535e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 6545e83d430SRalf Baechle select BOOT_ELF32 65542f77542SRalf Baechle select CEVT_R4K 656940f6b48SRalf Baechle select CSRC_R4K 657e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 6585e83d430SRalf Baechle select DMA_NONCOHERENT 6595e83d430SRalf Baechle select GENERIC_ISA_DMA 6608a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 6615e83d430SRalf Baechle select HW_HAS_EISA 6625e83d430SRalf Baechle select HW_HAS_PCI 663c066a32aSThomas Bogendoerfer select IRQ_CPU 664d865bea4SRalf Baechle select I8253 6655e83d430SRalf Baechle select I8259 6665e83d430SRalf Baechle select ISA 6674a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 6687cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6694a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 670c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 6714a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 67236a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 673ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 6747d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 6754a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 6765e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 6775e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6781da177e4SLinus Torvalds help 67914b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 68014b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 6815e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 6825e83d430SRalf Baechle support this machine type. 6831da177e4SLinus Torvalds 684edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 685edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 6865e83d430SRalf Baechle 687edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 688edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 68923fbee9dSRalf Baechle 69073b4390fSRalf Baechleconfig MIKROTIK_RB532 69173b4390fSRalf Baechle bool "Mikrotik RB532 boards" 69273b4390fSRalf Baechle select CEVT_R4K 69373b4390fSRalf Baechle select CSRC_R4K 69473b4390fSRalf Baechle select DMA_NONCOHERENT 69573b4390fSRalf Baechle select HW_HAS_PCI 69673b4390fSRalf Baechle select IRQ_CPU 69773b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 69873b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 69973b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 70073b4390fSRalf Baechle select SWAP_IO_SPACE 70173b4390fSRalf Baechle select BOOT_RAW 702d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 703930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 70473b4390fSRalf Baechle help 70573b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 70673b4390fSRalf Baechle based on the IDT RC32434 SoC. 70773b4390fSRalf Baechle 7089ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 7099ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 710a86c7f72SDavid Daney select CEVT_R4K 711a86c7f72SDavid Daney select 64BIT_PHYS_ADDR 712a86c7f72SDavid Daney select DMA_COHERENT 713a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 714a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 715f65aad41SRalf Baechle select EDAC_SUPPORT 716773cb77dSRalf Baechle select SYS_SUPPORTS_HOTPLUG_CPU 717a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 7185e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 719a86c7f72SDavid Daney select SWAP_IO_SPACE 720e8635b48SDavid Daney select HW_HAS_PCI 721f00e001eSDavid Daney select ZONE_DMA32 722340fbb8bSDavid Daney select USB_ARCH_HAS_OHCI 723340fbb8bSDavid Daney select USB_ARCH_HAS_EHCI 724465aaed0SDavid Daney select HOLES_IN_ZONE 72599cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 726a86c7f72SDavid Daney help 727a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 728a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 729a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 730a86c7f72SDavid Daney Some of the supported boards are: 731a86c7f72SDavid Daney EBT3000 732a86c7f72SDavid Daney EBH3000 733a86c7f72SDavid Daney EBH3100 734a86c7f72SDavid Daney Thunder 735a86c7f72SDavid Daney Kodama 736a86c7f72SDavid Daney Hikari 737a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 738a86c7f72SDavid Daney 7397f058e85SJayachandran Cconfig NLM_XLR_BOARD 7407f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 7417f058e85SJayachandran C select BOOT_ELF32 7427f058e85SJayachandran C select NLM_COMMON 7437f058e85SJayachandran C select SYS_HAS_CPU_XLR 7447f058e85SJayachandran C select SYS_SUPPORTS_SMP 7457f058e85SJayachandran C select HW_HAS_PCI 7467f058e85SJayachandran C select SWAP_IO_SPACE 7477f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7487f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7497f058e85SJayachandran C select 64BIT_PHYS_ADDR 7507f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7517f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 7527f058e85SJayachandran C select DMA_COHERENT 7537f058e85SJayachandran C select NR_CPUS_DEFAULT_32 7547f058e85SJayachandran C select CEVT_R4K 7557f058e85SJayachandran C select CSRC_R4K 7567f058e85SJayachandran C select IRQ_CPU 757b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7587f058e85SJayachandran C select SYNC_R4K 7597f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 760f35574a3SJayachandran C select USB_ARCH_HAS_OHCI if USB_SUPPORT 761f35574a3SJayachandran C select USB_ARCH_HAS_EHCI if USB_SUPPORT 7628f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7638f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7647f058e85SJayachandran C help 7657f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 7667f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 7677f058e85SJayachandran C 7681c773ea4SJayachandran Cconfig NLM_XLP_BOARD 7691c773ea4SJayachandran C bool "Netlogic XLP based systems" 7701c773ea4SJayachandran C select BOOT_ELF32 7711c773ea4SJayachandran C select NLM_COMMON 7721c773ea4SJayachandran C select SYS_HAS_CPU_XLP 7731c773ea4SJayachandran C select SYS_SUPPORTS_SMP 7741c773ea4SJayachandran C select HW_HAS_PCI 7751c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7761c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7771c773ea4SJayachandran C select 64BIT_PHYS_ADDR 7781c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7791c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 7801c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 7811c773ea4SJayachandran C select DMA_COHERENT 7821c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 7831c773ea4SJayachandran C select CEVT_R4K 7841c773ea4SJayachandran C select CSRC_R4K 7851c773ea4SJayachandran C select IRQ_CPU 786c24a8a7aSJayachandran C select ARCH_SUPPORTS_MSI 787b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7881c773ea4SJayachandran C select SYNC_R4K 7891c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 7902f6528e1SJayachandran C select USE_OF 7918f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7928f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7931c773ea4SJayachandran C help 7941c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 7951c773ea4SJayachandran C Say Y here if you have a XLP based board. 7961c773ea4SJayachandran C 7971da177e4SLinus Torvaldsendchoice 7981da177e4SLinus Torvalds 799e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 800d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 801a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 802e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 8035e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 8045ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 8058ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 8061f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 8070f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 808ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 80929c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 81038b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 81122b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 8125e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 813a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 81485749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig" 815ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig" 8167f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 81738b18f72SRalf Baechle 8185e83d430SRalf Baechleendmenu 8195e83d430SRalf Baechle 8201da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 8211da177e4SLinus Torvalds bool 8221da177e4SLinus Torvalds default y 8231da177e4SLinus Torvalds 8241da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 8251da177e4SLinus Torvalds bool 8261da177e4SLinus Torvalds 827f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 828f0d1b0b3SDavid Howells bool 829f0d1b0b3SDavid Howells default n 830f0d1b0b3SDavid Howells 831f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 832f0d1b0b3SDavid Howells bool 833f0d1b0b3SDavid Howells default n 834f0d1b0b3SDavid Howells 8353c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 8363c9ee7efSAkinobu Mita bool 8373c9ee7efSAkinobu Mita default y 8383c9ee7efSAkinobu Mita 8391da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 8401da177e4SLinus Torvalds bool 8411da177e4SLinus Torvalds default y 8421da177e4SLinus Torvalds 843ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 8441cc89038SAtsushi Nemoto bool 8451cc89038SAtsushi Nemoto default y 8461cc89038SAtsushi Nemoto 8471da177e4SLinus Torvalds# 8481da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 8491da177e4SLinus Torvalds# 8500e2794b0SRalf Baechleconfig FW_ARC 8511da177e4SLinus Torvalds bool 8521da177e4SLinus Torvalds 85361ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 85461ed242dSRalf Baechle bool 85561ed242dSRalf Baechle 8569267a30dSMarc St-Jeanconfig BOOT_RAW 8579267a30dSMarc St-Jean bool 8589267a30dSMarc St-Jean 859217dd11eSRalf Baechleconfig CEVT_BCM1480 860217dd11eSRalf Baechle bool 861217dd11eSRalf Baechle 8626457d9fcSYoichi Yuasaconfig CEVT_DS1287 8636457d9fcSYoichi Yuasa bool 8646457d9fcSYoichi Yuasa 8651097c6acSYoichi Yuasaconfig CEVT_GT641XX 8661097c6acSYoichi Yuasa bool 8671097c6acSYoichi Yuasa 86842f77542SRalf Baechleconfig CEVT_R4K 86942f77542SRalf Baechle bool 87042f77542SRalf Baechle 8710ab2b7d0SRaghu Gandhamconfig CEVT_GIC 872237036deSPaul Burton select MIPS_CM 8730ab2b7d0SRaghu Gandham bool 8740ab2b7d0SRaghu Gandham 875217dd11eSRalf Baechleconfig CEVT_SB1250 876217dd11eSRalf Baechle bool 877217dd11eSRalf Baechle 878229f773eSAtsushi Nemotoconfig CEVT_TXX9 879229f773eSAtsushi Nemoto bool 880229f773eSAtsushi Nemoto 881217dd11eSRalf Baechleconfig CSRC_BCM1480 882217dd11eSRalf Baechle bool 883217dd11eSRalf Baechle 8844247417dSYoichi Yuasaconfig CSRC_IOASIC 8854247417dSYoichi Yuasa bool 8864247417dSYoichi Yuasa 887940f6b48SRalf Baechleconfig CSRC_R4K 888940f6b48SRalf Baechle bool 889940f6b48SRalf Baechle 890778eeb1bSSteven J. Hillconfig CSRC_GIC 891237036deSPaul Burton select MIPS_CM 892778eeb1bSSteven J. Hill bool 893778eeb1bSSteven J. Hill 894217dd11eSRalf Baechleconfig CSRC_SB1250 895217dd11eSRalf Baechle bool 896217dd11eSRalf Baechle 897a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 8987444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 899a9aec7feSAtsushi Nemoto bool 900a9aec7feSAtsushi Nemoto 9010e2794b0SRalf Baechleconfig FW_CFE 902df78b5c8SAurelien Jarno bool 903df78b5c8SAurelien Jarno 9044bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 9054bafad92SFUJITA Tomonori def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT 9064bafad92SFUJITA Tomonori 907885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 908885014bcSFelix Fietkau select DMA_NONCOHERENT 909885014bcSFelix Fietkau bool 910885014bcSFelix Fietkau 9111da177e4SLinus Torvaldsconfig DMA_COHERENT 9121da177e4SLinus Torvalds bool 9131da177e4SLinus Torvalds 9141da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 9151da177e4SLinus Torvalds bool 916e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 9174ce588cdSRalf Baechle 918e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 9194ce588cdSRalf Baechle bool 9201da177e4SLinus Torvalds 92136a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 9221da177e4SLinus Torvalds bool 9231da177e4SLinus Torvalds 924dbb74540SRalf Baechleconfig HOTPLUG_CPU 9251b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 92640b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 9271b2bc75cSRalf Baechle help 9281b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 9291b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 9301b2bc75cSRalf Baechle (Note: power management support will enable this option 9311b2bc75cSRalf Baechle automatically on SMP systems. ) 9321b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 9331b2bc75cSRalf Baechle 9341b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 935dbb74540SRalf Baechle bool 936dbb74540SRalf Baechle 9371da177e4SLinus Torvaldsconfig I8259 9381da177e4SLinus Torvalds bool 9391da177e4SLinus Torvalds 9401da177e4SLinus Torvaldsconfig MIPS_BONITO64 9411da177e4SLinus Torvalds bool 9421da177e4SLinus Torvalds 9431da177e4SLinus Torvaldsconfig MIPS_MSC 9441da177e4SLinus Torvalds bool 9451da177e4SLinus Torvalds 9461f21d2bdSBrian Murphyconfig MIPS_NILE4 9471f21d2bdSBrian Murphy bool 9481f21d2bdSBrian Murphy 94939b8d525SRalf Baechleconfig SYNC_R4K 95039b8d525SRalf Baechle bool 95139b8d525SRalf Baechle 952487d70d0SGabor Juhosconfig MIPS_MACHINE 953487d70d0SGabor Juhos def_bool n 954487d70d0SGabor Juhos 955d388d685SMaciej W. Rozyckiconfig NO_IOPORT 956d388d685SMaciej W. Rozycki def_bool n 957d388d685SMaciej W. Rozycki 9588313da30SRalf Baechleconfig GENERIC_ISA_DMA 9598313da30SRalf Baechle bool 9608313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 961a35bee8aSNamhyung Kim select ISA_DMA_API 9628313da30SRalf Baechle 963aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 964aa414dffSRalf Baechle bool 9658313da30SRalf Baechle select GENERIC_ISA_DMA 966aa414dffSRalf Baechle 967a35bee8aSNamhyung Kimconfig ISA_DMA_API 968a35bee8aSNamhyung Kim bool 969a35bee8aSNamhyung Kim 970465aaed0SDavid Daneyconfig HOLES_IN_ZONE 971465aaed0SDavid Daney bool 972465aaed0SDavid Daney 9735e83d430SRalf Baechle# 9746b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 9755e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 9765e83d430SRalf Baechle# choice statement should be more obvious to the user. 9775e83d430SRalf Baechle# 9785e83d430SRalf Baechlechoice 9796b2aac42SMasanari Iida prompt "Endianness selection" 9801da177e4SLinus Torvalds help 9811da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 9825e83d430SRalf Baechle byte order. These modes require different kernels and a different 9833cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 9845e83d430SRalf Baechle particular system but some systems are just as commonly used in the 9853dde6ad8SDavid Sterba one or the other endianness. 9865e83d430SRalf Baechle 9875e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 9885e83d430SRalf Baechle bool "Big endian" 9895e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 9905e83d430SRalf Baechle 9915e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 9925e83d430SRalf Baechle bool "Little endian" 9935e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 9945e83d430SRalf Baechle 9955e83d430SRalf Baechleendchoice 9965e83d430SRalf Baechle 99722b0763aSDavid Daneyconfig EXPORT_UASM 99822b0763aSDavid Daney bool 99922b0763aSDavid Daney 10002116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 10012116245eSRalf Baechle bool 10022116245eSRalf Baechle 10035e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 10045e83d430SRalf Baechle bool 10055e83d430SRalf Baechle 10065e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 10075e83d430SRalf Baechle bool 10081da177e4SLinus Torvalds 10099cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 10109cffd154SDavid Daney bool 10119cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 10129cffd154SDavid Daney default y 10139cffd154SDavid Daney 1014aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1015aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1016aa1762f4SDavid Daney 10171da177e4SLinus Torvaldsconfig IRQ_CPU 10181da177e4SLinus Torvalds bool 10191da177e4SLinus Torvalds 10201da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 10211da177e4SLinus Torvalds bool 10221da177e4SLinus Torvalds 10239267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 10249267a30dSMarc St-Jean bool 10259267a30dSMarc St-Jean 10269267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 10279267a30dSMarc St-Jean bool 10289267a30dSMarc St-Jean 10298420fd00SAtsushi Nemotoconfig IRQ_TXX9 10308420fd00SAtsushi Nemoto bool 10318420fd00SAtsushi Nemoto 1032d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1033d5ab1a69SYoichi Yuasa bool 1034d5ab1a69SYoichi Yuasa 103539b8d525SRalf Baechleconfig IRQ_GIC 1036237036deSPaul Burton select MIPS_CM 103739b8d525SRalf Baechle bool 103839b8d525SRalf Baechle 1039252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 10401da177e4SLinus Torvalds bool 10411da177e4SLinus Torvalds 10429267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 10439267a30dSMarc St-Jean bool 10449267a30dSMarc St-Jean 1045a83860c2SRalf Baechleconfig SOC_EMMA2RH 1046a83860c2SRalf Baechle bool 1047a83860c2SRalf Baechle select CEVT_R4K 1048a83860c2SRalf Baechle select CSRC_R4K 1049a83860c2SRalf Baechle select DMA_NONCOHERENT 1050a83860c2SRalf Baechle select IRQ_CPU 1051a83860c2SRalf Baechle select SWAP_IO_SPACE 1052a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1053a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1054a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1055a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1056a83860c2SRalf Baechle 1057edb6310aSDaniel Lairdconfig SOC_PNX833X 1058edb6310aSDaniel Laird bool 1059edb6310aSDaniel Laird select CEVT_R4K 1060edb6310aSDaniel Laird select CSRC_R4K 1061edb6310aSDaniel Laird select IRQ_CPU 1062edb6310aSDaniel Laird select DMA_NONCOHERENT 1063edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1064edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1065edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1066edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1067edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1068edb6310aSDaniel Laird 1069edb6310aSDaniel Lairdconfig SOC_PNX8335 1070edb6310aSDaniel Laird bool 1071edb6310aSDaniel Laird select SOC_PNX833X 1072edb6310aSDaniel Laird 10731da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 10741da177e4SLinus Torvalds bool 10751da177e4SLinus Torvalds 1076e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1077e2defae5SThomas Bogendoerfer bool 1078e2defae5SThomas Bogendoerfer 10795b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 10805b438c44SThomas Bogendoerfer bool 10815b438c44SThomas Bogendoerfer 1082e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1083e2defae5SThomas Bogendoerfer bool 1084e2defae5SThomas Bogendoerfer 1085e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1086e2defae5SThomas Bogendoerfer bool 1087e2defae5SThomas Bogendoerfer 1088e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1089e2defae5SThomas Bogendoerfer bool 1090e2defae5SThomas Bogendoerfer 1091e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1092e2defae5SThomas Bogendoerfer bool 1093e2defae5SThomas Bogendoerfer 1094e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1095e2defae5SThomas Bogendoerfer bool 1096e2defae5SThomas Bogendoerfer 10970e2794b0SRalf Baechleconfig FW_ARC32 10985e83d430SRalf Baechle bool 10995e83d430SRalf Baechle 1100aaa9fad3SPaul Bolleconfig FW_SNIPROM 1101231a35d3SThomas Bogendoerfer bool 1102231a35d3SThomas Bogendoerfer 11031da177e4SLinus Torvaldsconfig BOOT_ELF32 11041da177e4SLinus Torvalds bool 11051da177e4SLinus Torvalds 1106930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1107930beb5aSFlorian Fainelli bool 1108930beb5aSFlorian Fainelli 1109930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1110930beb5aSFlorian Fainelli bool 1111930beb5aSFlorian Fainelli 1112930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1113930beb5aSFlorian Fainelli bool 1114930beb5aSFlorian Fainelli 1115930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1116930beb5aSFlorian Fainelli bool 1117930beb5aSFlorian Fainelli 11181da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 11191da177e4SLinus Torvalds int 1120a4c0201eSFlorian Fainelli default "4" if MIPS_L1_CACHE_SHIFT_4 1121a4c0201eSFlorian Fainelli default "5" if MIPS_L1_CACHE_SHIFT_5 1122a4c0201eSFlorian Fainelli default "6" if MIPS_L1_CACHE_SHIFT_6 1123a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 11241da177e4SLinus Torvalds default "5" 11251da177e4SLinus Torvalds 11261da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 11271da177e4SLinus Torvalds bool 11281da177e4SLinus Torvalds 11291da177e4SLinus Torvaldsconfig ARC_CONSOLE 11301da177e4SLinus Torvalds bool "ARC console support" 1131e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 11321da177e4SLinus Torvalds 11331da177e4SLinus Torvaldsconfig ARC_MEMORY 11341da177e4SLinus Torvalds bool 113514b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 11361da177e4SLinus Torvalds default y 11371da177e4SLinus Torvalds 11381da177e4SLinus Torvaldsconfig ARC_PROMLIB 11391da177e4SLinus Torvalds bool 1140e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 11411da177e4SLinus Torvalds default y 11421da177e4SLinus Torvalds 11430e2794b0SRalf Baechleconfig FW_ARC64 11441da177e4SLinus Torvalds bool 11451da177e4SLinus Torvalds 11461da177e4SLinus Torvaldsconfig BOOT_ELF64 11471da177e4SLinus Torvalds bool 11481da177e4SLinus Torvalds 11491da177e4SLinus Torvaldsmenu "CPU selection" 11501da177e4SLinus Torvalds 11511da177e4SLinus Torvaldschoice 11521da177e4SLinus Torvalds prompt "CPU type" 11531da177e4SLinus Torvalds default CPU_R4X00 11541da177e4SLinus Torvalds 11553702bba5SWu Zhangjinconfig CPU_LOONGSON2E 11563702bba5SWu Zhangjin bool "Loongson 2E" 11573702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 11583702bba5SWu Zhangjin select CPU_LOONGSON2 11592a21c730SFuxin Zhang help 11602a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 11612a21c730SFuxin Zhang with many extensions. 11622a21c730SFuxin Zhang 116325985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 11646f7a251aSWu Zhangjin bonito64. 11656f7a251aSWu Zhangjin 11666f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 11676f7a251aSWu Zhangjin bool "Loongson 2F" 11686f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 11696f7a251aSWu Zhangjin select CPU_LOONGSON2 1170c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 11716f7a251aSWu Zhangjin help 11726f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 11736f7a251aSWu Zhangjin with many extensions. 11746f7a251aSWu Zhangjin 11756f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 11766f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 11776f7a251aSWu Zhangjin Loongson2E. 11786f7a251aSWu Zhangjin 1179ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1180ca585cf9SKelvin Cheung bool "Loongson 1B" 1181ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1182ca585cf9SKelvin Cheung select CPU_LOONGSON1 1183ca585cf9SKelvin Cheung help 1184ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1185ca585cf9SKelvin Cheung release 2 instruction set. 1186ca585cf9SKelvin Cheung 11876e760c8dSRalf Baechleconfig CPU_MIPS32_R1 11886e760c8dSRalf Baechle bool "MIPS32 Release 1" 11897cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 11906e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1191797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1192ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 11936e760c8dSRalf Baechle help 11945e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 11951e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 11961e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 11971e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 11981e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 11991e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 12001e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 12011e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 12021e5f1caaSRalf Baechle performance. 12031e5f1caaSRalf Baechle 12041e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 12051e5f1caaSRalf Baechle bool "MIPS32 Release 2" 12067cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 12071e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1208797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1209ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12102235a54dSSanjay Lal select HAVE_KVM 12111e5f1caaSRalf Baechle help 12125e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 12136e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12146e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12156e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12166e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12171da177e4SLinus Torvalds 12186e760c8dSRalf Baechleconfig CPU_MIPS64_R1 12196e760c8dSRalf Baechle bool "MIPS64 Release 1" 12207cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1221797798c1SRalf Baechle select CPU_HAS_PREFETCH 1222ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1223ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1224ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12259cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 12266e760c8dSRalf Baechle help 12276e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 12286e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12296e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12306e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12316e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12321e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 12331e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 12341e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 12351e5f1caaSRalf Baechle performance. 12361e5f1caaSRalf Baechle 12371e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 12381e5f1caaSRalf Baechle bool "MIPS64 Release 2" 12397cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1240797798c1SRalf Baechle select CPU_HAS_PREFETCH 12411e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 12421e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1243ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12449cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 12451e5f1caaSRalf Baechle help 12461e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 12471e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12481e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12491e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12501e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12511da177e4SLinus Torvalds 12521da177e4SLinus Torvaldsconfig CPU_R3000 12531da177e4SLinus Torvalds bool "R3000" 12547cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1255f7062ddbSRalf Baechle select CPU_HAS_WB 1256ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1257797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12581da177e4SLinus Torvalds help 12591da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 12601da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 12611da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 12621da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 12631da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 12641da177e4SLinus Torvalds try to recompile with R3000. 12651da177e4SLinus Torvalds 12661da177e4SLinus Torvaldsconfig CPU_TX39XX 12671da177e4SLinus Torvalds bool "R39XX" 12687cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1269ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 12701da177e4SLinus Torvalds 12711da177e4SLinus Torvaldsconfig CPU_VR41XX 12721da177e4SLinus Torvalds bool "R41xx" 12737cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1274ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1275ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 12761da177e4SLinus Torvalds help 12775e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 12781da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 12791da177e4SLinus Torvalds kernel built with this option will not run on any other type of 12801da177e4SLinus Torvalds processor or vice versa. 12811da177e4SLinus Torvalds 12821da177e4SLinus Torvaldsconfig CPU_R4300 12831da177e4SLinus Torvalds bool "R4300" 12847cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1285ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1286ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 12871da177e4SLinus Torvalds help 12881da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 12891da177e4SLinus Torvalds 12901da177e4SLinus Torvaldsconfig CPU_R4X00 12911da177e4SLinus Torvalds bool "R4x00" 12927cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1293ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1294ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1295970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 12961da177e4SLinus Torvalds help 12971da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 12981da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 12991da177e4SLinus Torvalds 13001da177e4SLinus Torvaldsconfig CPU_TX49XX 13011da177e4SLinus Torvalds bool "R49XX" 13027cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1303de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1304ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1305ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1306970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13071da177e4SLinus Torvalds 13081da177e4SLinus Torvaldsconfig CPU_R5000 13091da177e4SLinus Torvalds bool "R5000" 13107cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1311ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1312ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1313970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13141da177e4SLinus Torvalds help 13151da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 13161da177e4SLinus Torvalds 13171da177e4SLinus Torvaldsconfig CPU_R5432 13181da177e4SLinus Torvalds bool "R5432" 13197cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 13205e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 13215e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1322970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13231da177e4SLinus Torvalds 1324542c1020SShinya Kuribayashiconfig CPU_R5500 1325542c1020SShinya Kuribayashi bool "R5500" 1326542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1327542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1328542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 13299cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1330542c1020SShinya Kuribayashi help 1331542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1332542c1020SShinya Kuribayashi instruction set. 1333542c1020SShinya Kuribayashi 13341da177e4SLinus Torvaldsconfig CPU_R6000 13351da177e4SLinus Torvalds bool "R6000" 13367cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1337ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 13381da177e4SLinus Torvalds help 13391da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1340c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 13411da177e4SLinus Torvalds 13421da177e4SLinus Torvaldsconfig CPU_NEVADA 13431da177e4SLinus Torvalds bool "RM52xx" 13447cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1345ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1346ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1347970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13481da177e4SLinus Torvalds help 13491da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 13501da177e4SLinus Torvalds 13511da177e4SLinus Torvaldsconfig CPU_R8000 13521da177e4SLinus Torvalds bool "R8000" 13537cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 13545e83d430SRalf Baechle select CPU_HAS_PREFETCH 1355ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 13561da177e4SLinus Torvalds help 13571da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 13581da177e4SLinus Torvalds uncommon and the support for them is incomplete. 13591da177e4SLinus Torvalds 13601da177e4SLinus Torvaldsconfig CPU_R10000 13611da177e4SLinus Torvalds bool "R10000" 13627cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 13635e83d430SRalf Baechle select CPU_HAS_PREFETCH 1364ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1365ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1366797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1367970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13681da177e4SLinus Torvalds help 13691da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 13701da177e4SLinus Torvalds 13711da177e4SLinus Torvaldsconfig CPU_RM7000 13721da177e4SLinus Torvalds bool "RM7000" 13737cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 13745e83d430SRalf Baechle select CPU_HAS_PREFETCH 1375ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1376ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1377797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1378970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13791da177e4SLinus Torvalds 13801da177e4SLinus Torvaldsconfig CPU_SB1 13811da177e4SLinus Torvalds bool "SB1" 13827cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1383ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1384ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1385797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1386970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13870004a9dfSRalf Baechle select WEAK_ORDERING 13881da177e4SLinus Torvalds 1389a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1390a86c7f72SDavid Daney bool "Cavium Octeon processor" 13915e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 13927ee91de4SYoichi Yuasa select ARCH_SPARSEMEM_ENABLE 1393a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1394a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1395a86c7f72SDavid Daney select SYS_SUPPORTS_SMP 1396a86c7f72SDavid Daney select NR_CPUS_DEFAULT_16 1397a86c7f72SDavid Daney select WEAK_ORDERING 1398a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 13999cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14007ed18152SDavid Daney select LIBFDT 14017ed18152SDavid Daney select USE_OF 14029296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 1403930beb5aSFlorian Fainelli select SYS_HAS_DMA_OPS 1404930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1405a86c7f72SDavid Daney help 1406a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1407a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1408a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1409a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1410a86c7f72SDavid Daney 1411cd746249SJonas Gorskiconfig CPU_BMIPS 1412cd746249SJonas Gorski bool "Broadcom BMIPS" 1413cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1414cd746249SJonas Gorski select CPU_MIPS32 1415fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1416cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1417cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1418cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1419cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1420cd746249SJonas Gorski select DMA_NONCOHERENT 1421cd746249SJonas Gorski select IRQ_CPU 1422cd746249SJonas Gorski select SWAP_IO_SPACE 1423cd746249SJonas Gorski select WEAK_ORDERING 1424c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 142569aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1426c1c0c461SKevin Cernekee help 1427fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1428c1c0c461SKevin Cernekee 14297f058e85SJayachandran Cconfig CPU_XLR 14307f058e85SJayachandran C bool "Netlogic XLR SoC" 14317f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 14327f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14337f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14347f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1435970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14367f058e85SJayachandran C select WEAK_ORDERING 14377f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14387f058e85SJayachandran C help 14397f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 14401c773ea4SJayachandran C 14411c773ea4SJayachandran Cconfig CPU_XLP 14421c773ea4SJayachandran C bool "Netlogic XLP SoC" 14431c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 14441c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14451c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14461c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 14471c773ea4SJayachandran C select WEAK_ORDERING 14481c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14491c773ea4SJayachandran C select CPU_HAS_PREFETCH 1450d6504846SJayachandran C select CPU_MIPSR2 14511c773ea4SJayachandran C help 14521c773ea4SJayachandran C Netlogic Microsystems XLP processors. 14531da177e4SLinus Torvaldsendchoice 14541da177e4SLinus Torvalds 1455622844bfSWu Zhangjinif CPU_LOONGSON2F 1456622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1457622844bfSWu Zhangjin bool 1458622844bfSWu Zhangjin 1459622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1460622844bfSWu Zhangjin bool 1461622844bfSWu Zhangjin 1462622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1463622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1464622844bfSWu Zhangjin default y 1465622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1466622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1467622844bfSWu Zhangjin help 1468622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1469622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1470622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1471622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1472622844bfSWu Zhangjin 1473622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1474622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1475622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1476622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1477622844bfSWu Zhangjin systems. 1478622844bfSWu Zhangjin 1479622844bfSWu Zhangjin If unsure, please say Y. 1480622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1481622844bfSWu Zhangjin 14821b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 14831b93b3c3SWu Zhangjin bool 14841b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 14851b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 148631c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 14871b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1488fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 14894e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 14901b93b3c3SWu Zhangjin 14911b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 14921b93b3c3SWu Zhangjin bool 14931b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 14941b93b3c3SWu Zhangjin 14953702bba5SWu Zhangjinconfig CPU_LOONGSON2 14963702bba5SWu Zhangjin bool 14973702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 14983702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 14993702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1500970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15013702bba5SWu Zhangjin 1502ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1503ca585cf9SKelvin Cheung bool 1504ca585cf9SKelvin Cheung select CPU_MIPS32 1505ca585cf9SKelvin Cheung select CPU_MIPSR2 1506ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1507ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1508ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1509ca585cf9SKelvin Cheung 1510fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 151104fa8bf7SJonas Gorski select SMP_UP if SMP 15121bbb6c1bSKevin Cernekee bool 1513cd746249SJonas Gorski 1514cd746249SJonas Gorskiconfig CPU_BMIPS4350 1515cd746249SJonas Gorski bool 1516cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1517cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1518cd746249SJonas Gorski 1519cd746249SJonas Gorskiconfig CPU_BMIPS4380 1520cd746249SJonas Gorski bool 1521cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1522cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1523cd746249SJonas Gorski 1524cd746249SJonas Gorskiconfig CPU_BMIPS5000 1525cd746249SJonas Gorski bool 1526cd746249SJonas Gorski select MIPS_CPU_SCACHE 1527cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1528cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 15291bbb6c1bSKevin Cernekee 15303702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 15312a21c730SFuxin Zhang bool 15322a21c730SFuxin Zhang 15336f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 15346f7a251aSWu Zhangjin bool 153555045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 153655045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 153722f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 15386f7a251aSWu Zhangjin 1539ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1540ca585cf9SKelvin Cheung bool 1541ca585cf9SKelvin Cheung 15427cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 15437cf8053bSRalf Baechle bool 15447cf8053bSRalf Baechle 15457cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 15467cf8053bSRalf Baechle bool 15477cf8053bSRalf Baechle 15487cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 15497cf8053bSRalf Baechle bool 15507cf8053bSRalf Baechle 15517cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 15527cf8053bSRalf Baechle bool 15537cf8053bSRalf Baechle 15547cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 15557cf8053bSRalf Baechle bool 15567cf8053bSRalf Baechle 15577cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 15587cf8053bSRalf Baechle bool 15597cf8053bSRalf Baechle 15607cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 15617cf8053bSRalf Baechle bool 15627cf8053bSRalf Baechle 15637cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 15647cf8053bSRalf Baechle bool 15657cf8053bSRalf Baechle 15667cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 15677cf8053bSRalf Baechle bool 15687cf8053bSRalf Baechle 15697cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 15707cf8053bSRalf Baechle bool 15717cf8053bSRalf Baechle 15727cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 15737cf8053bSRalf Baechle bool 15747cf8053bSRalf Baechle 15757cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 15767cf8053bSRalf Baechle bool 15777cf8053bSRalf Baechle 1578542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1579542c1020SShinya Kuribayashi bool 1580542c1020SShinya Kuribayashi 15817cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 15827cf8053bSRalf Baechle bool 15837cf8053bSRalf Baechle 15847cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 15857cf8053bSRalf Baechle bool 15867cf8053bSRalf Baechle 15877cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 15887cf8053bSRalf Baechle bool 15897cf8053bSRalf Baechle 15907cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 15917cf8053bSRalf Baechle bool 15927cf8053bSRalf Baechle 15937cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 15947cf8053bSRalf Baechle bool 15957cf8053bSRalf Baechle 15967cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 15977cf8053bSRalf Baechle bool 15987cf8053bSRalf Baechle 15995e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 16005e683389SDavid Daney bool 16015e683389SDavid Daney 1602cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1603c1c0c461SKevin Cernekee bool 1604c1c0c461SKevin Cernekee 1605fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1606c1c0c461SKevin Cernekee bool 1607cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1608c1c0c461SKevin Cernekee 1609c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1610c1c0c461SKevin Cernekee bool 1611cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1612c1c0c461SKevin Cernekee 1613c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1614c1c0c461SKevin Cernekee bool 1615cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1616c1c0c461SKevin Cernekee 1617c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1618c1c0c461SKevin Cernekee bool 1619cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1620c1c0c461SKevin Cernekee 16217f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 16227f058e85SJayachandran C bool 16237f058e85SJayachandran C 16241c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 16251c773ea4SJayachandran C bool 16261c773ea4SJayachandran C 162717099b11SRalf Baechle# 162817099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 162917099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 163017099b11SRalf Baechle# 16310004a9dfSRalf Baechleconfig WEAK_ORDERING 16320004a9dfSRalf Baechle bool 163317099b11SRalf Baechle 163417099b11SRalf Baechle# 163517099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 163617099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 163717099b11SRalf Baechle# 163817099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 163917099b11SRalf Baechle bool 16405e83d430SRalf Baechleendmenu 16415e83d430SRalf Baechle 16425e83d430SRalf Baechle# 16435e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 16445e83d430SRalf Baechle# 16455e83d430SRalf Baechleconfig CPU_MIPS32 16465e83d430SRalf Baechle bool 16475e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 16485e83d430SRalf Baechle 16495e83d430SRalf Baechleconfig CPU_MIPS64 16505e83d430SRalf Baechle bool 16515e83d430SRalf Baechle default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 16525e83d430SRalf Baechle 16535e83d430SRalf Baechle# 1654c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 16555e83d430SRalf Baechle# 16565e83d430SRalf Baechleconfig CPU_MIPSR1 16575e83d430SRalf Baechle bool 16585e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 16595e83d430SRalf Baechle 16605e83d430SRalf Baechleconfig CPU_MIPSR2 16615e83d430SRalf Baechle bool 1662a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 16635e83d430SRalf Baechle 16645e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 16655e83d430SRalf Baechle bool 16665e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 16675e83d430SRalf Baechle bool 16685e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 16695e83d430SRalf Baechle bool 16705e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 16715e83d430SRalf Baechle bool 167255045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 167355045ff5SWu Zhangjin bool 167455045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 167555045ff5SWu Zhangjin bool 16769cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 16779cffd154SDavid Daney bool 167822f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 167922f1fdfdSWu Zhangjin bool 168082622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 168182622284SDavid Daney bool 1682d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 16835e83d430SRalf Baechle 16848192c9eaSDavid Daney# 16858192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 16868192c9eaSDavid Daney# 16878192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 16888192c9eaSDavid Daney bool 1689f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 16908192c9eaSDavid Daney 16915e83d430SRalf Baechlemenu "Kernel type" 16925e83d430SRalf Baechle 16935e83d430SRalf Baechlechoice 16945e83d430SRalf Baechle prompt "Kernel code model" 16955e83d430SRalf Baechle help 16965e83d430SRalf Baechle You should only select this option if you have a workload that 16975e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 16985e83d430SRalf Baechle large memory. You will only be presented a single option in this 16995e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 17005e83d430SRalf Baechle 17015e83d430SRalf Baechleconfig 32BIT 17025e83d430SRalf Baechle bool "32-bit kernel" 17035e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 17045e83d430SRalf Baechle select TRAD_SIGNALS 17055e83d430SRalf Baechle help 17065e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 17075e83d430SRalf Baechleconfig 64BIT 17085e83d430SRalf Baechle bool "64-bit kernel" 17095e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 17105e83d430SRalf Baechle help 17115e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 17125e83d430SRalf Baechle 17135e83d430SRalf Baechleendchoice 17145e83d430SRalf Baechle 17152235a54dSSanjay Lalconfig KVM_GUEST 17162235a54dSSanjay Lal bool "KVM Guest Kernel" 1717f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 17182235a54dSSanjay Lal help 17192235a54dSSanjay Lal Select this option if building a guest kernel for KVM (Trap & Emulate) mode 17202235a54dSSanjay Lal 17212235a54dSSanjay Lalconfig KVM_HOST_FREQ 17222235a54dSSanjay Lal int "KVM Host Processor Frequency (MHz)" 17232235a54dSSanjay Lal depends on KVM_GUEST 17242235a54dSSanjay Lal default 500 17252235a54dSSanjay Lal help 17262235a54dSSanjay Lal Select this option if building a guest kernel for KVM to skip 17272235a54dSSanjay Lal RTC emulation when determining guest CPU Frequency. Instead, the guest 17282235a54dSSanjay Lal processor frequency is automatically derived from the host frequency. 17292235a54dSSanjay Lal 17301da177e4SLinus Torvaldschoice 17311da177e4SLinus Torvalds prompt "Kernel page size" 17321da177e4SLinus Torvalds default PAGE_SIZE_4KB 17331da177e4SLinus Torvalds 17341da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 17351da177e4SLinus Torvalds bool "4kB" 1736315fe625SWu Zhangjin depends on !CPU_LOONGSON2 17371da177e4SLinus Torvalds help 17381da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 17391da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 17401da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 17411da177e4SLinus Torvalds recommended for low memory systems. 17421da177e4SLinus Torvalds 17431da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 17441da177e4SLinus Torvalds bool "8kB" 17457d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 17461da177e4SLinus Torvalds help 17471da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 17481da177e4SLinus Torvalds the price of higher memory consumption. This option is available 1749c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 1750c52399beSRalf Baechle suitable Linux distribution to support this. 17511da177e4SLinus Torvalds 17521da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 17531da177e4SLinus Torvalds bool "16kB" 1754714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 17551da177e4SLinus Torvalds help 17561da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 17571da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 1758714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 1759714bfad6SRalf Baechle Linux distribution to support this. 17601da177e4SLinus Torvalds 1761c52399beSRalf Baechleconfig PAGE_SIZE_32KB 1762c52399beSRalf Baechle bool "32kB" 1763c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 1764c52399beSRalf Baechle help 1765c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 1766c52399beSRalf Baechle the price of higher memory consumption. This option is available 1767c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 1768c52399beSRalf Baechle distribution to support this. 1769c52399beSRalf Baechle 17701da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 17711da177e4SLinus Torvalds bool "64kB" 17727d60717eSKees Cook depends on !CPU_R3000 && !CPU_TX39XX 17731da177e4SLinus Torvalds help 17741da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 17751da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 17761da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 1777714bfad6SRalf Baechle writing this option is still high experimental. 17781da177e4SLinus Torvalds 17791da177e4SLinus Torvaldsendchoice 17801da177e4SLinus Torvalds 1781c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 1782c9bace7cSDavid Daney int "Maximum zone order" 178385f993b8SDavid Daney range 14 64 if HUGETLB_PAGE && PAGE_SIZE_64KB 178485f993b8SDavid Daney default "14" if HUGETLB_PAGE && PAGE_SIZE_64KB 178585f993b8SDavid Daney range 13 64 if HUGETLB_PAGE && PAGE_SIZE_32KB 178685f993b8SDavid Daney default "13" if HUGETLB_PAGE && PAGE_SIZE_32KB 178785f993b8SDavid Daney range 12 64 if HUGETLB_PAGE && PAGE_SIZE_16KB 178885f993b8SDavid Daney default "12" if HUGETLB_PAGE && PAGE_SIZE_16KB 1789c9bace7cSDavid Daney range 11 64 1790c9bace7cSDavid Daney default "11" 1791c9bace7cSDavid Daney help 1792c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 1793c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 1794c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 1795c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 1796c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 1797c9bace7cSDavid Daney increase this value. 1798c9bace7cSDavid Daney 1799c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 1800c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 1801c9bace7cSDavid Daney 1802c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 1803c9bace7cSDavid Daney when choosing a value for this option. 1804c9bace7cSDavid Daney 18050ab2b7d0SRaghu Gandhamconfig CEVT_GIC 18060ab2b7d0SRaghu Gandham bool "Use GIC global counter for clock events" 18070ab2b7d0SRaghu Gandham depends on IRQ_GIC && !(MIPS_SEAD3 || MIPS_MT_SMTC) 18080ab2b7d0SRaghu Gandham help 18090ab2b7d0SRaghu Gandham Use the GIC global counter for the clock events. The R4K clock 18100ab2b7d0SRaghu Gandham event driver is always present, so if the platform ends up not 18110ab2b7d0SRaghu Gandham detecting a GIC, it will fall back to the R4K timer for the 18120ab2b7d0SRaghu Gandham generation of clock events. 18130ab2b7d0SRaghu Gandham 18141da177e4SLinus Torvaldsconfig BOARD_SCACHE 18151da177e4SLinus Torvalds bool 18161da177e4SLinus Torvalds 18171da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 18181da177e4SLinus Torvalds bool 18191da177e4SLinus Torvalds select BOARD_SCACHE 18201da177e4SLinus Torvalds 18219318c51aSChris Dearman# 18229318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 18239318c51aSChris Dearman# 18249318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 18259318c51aSChris Dearman bool 18269318c51aSChris Dearman select BOARD_SCACHE 1827930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_6 18289318c51aSChris Dearman 18291da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 18301da177e4SLinus Torvalds bool 18311da177e4SLinus Torvalds select BOARD_SCACHE 18321da177e4SLinus Torvalds 18331da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 18341da177e4SLinus Torvalds bool 18351da177e4SLinus Torvalds select BOARD_SCACHE 18361da177e4SLinus Torvalds 18371da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 18381da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 18391da177e4SLinus Torvalds depends on CPU_SB1 18401da177e4SLinus Torvalds help 18411da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 18421da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 18431da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 18441da177e4SLinus Torvalds 18451da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 1846c8094b53SRalf Baechle bool 18471da177e4SLinus Torvalds 18483165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 18493165c846SFlorian Fainelli bool 18503165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 18513165c846SFlorian Fainelli 185291405eb6SFlorian Fainelliconfig CPU_R4K_FPU 185391405eb6SFlorian Fainelli bool 185491405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 185591405eb6SFlorian Fainelli 185662cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 185762cedc4fSFlorian Fainelli bool 185862cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 185962cedc4fSFlorian Fainelli 1860340ee4b9SRalf Baechlechoice 1861340ee4b9SRalf Baechle prompt "MIPS MT options" 1862f41ae0b2SRalf Baechle 1863f41ae0b2SRalf Baechleconfig MIPS_MT_DISABLED 1864c080faa5SSteven J. Hill bool "Disable multithreading support" 1865f41ae0b2SRalf Baechle help 1866c080faa5SSteven J. Hill Use this option if your platform does not support the MT ASE 1867c080faa5SSteven J. Hill which is hardware multithreading support. On systems without 1868c080faa5SSteven J. Hill an MT-enabled processor, this will be the only option that is 1869c080faa5SSteven J. Hill available in this menu. 1870340ee4b9SRalf Baechle 187159d6ab86SRalf Baechleconfig MIPS_MT_SMP 187259d6ab86SRalf Baechle bool "Use 1 TC on each available VPE for SMP" 187359d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 187459d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 1875d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1876c080faa5SSteven J. Hill select SYNC_R4K 187759d6ab86SRalf Baechle select MIPS_MT 187859d6ab86SRalf Baechle select SMP 187987353d8aSRalf Baechle select SMP_UP 1880c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 1881c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 1882399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 188359d6ab86SRalf Baechle help 1884c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 1885c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 1886c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 1887c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 1888c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 188959d6ab86SRalf Baechle 189041c594abSRalf Baechleconfig MIPS_MT_SMTC 1891c080faa5SSteven J. Hill bool "Use all TCs on all VPEs for SMP (DEPRECATED)" 1892f41ae0b2SRalf Baechle depends on CPU_MIPS32_R2 1893f41ae0b2SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 18940ee958e1SPaul Burton depends on !MIPS_CPS 1895f7062ddbSRalf Baechle select CPU_MIPSR2_IRQ_VI 1896d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1897f41ae0b2SRalf Baechle select MIPS_MT 189841c594abSRalf Baechle select SMP 189987353d8aSRalf Baechle select SMP_UP 1900c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 1901c080faa5SSteven J. Hill select NR_CPUS_DEFAULT_8 1902f41ae0b2SRalf Baechle help 1903c080faa5SSteven J. Hill This is a kernel model which is known as SMTC. This is 1904c080faa5SSteven J. Hill supported on cores with the MT ASE and presents all TCs 1905c080faa5SSteven J. Hill available on all VPEs to support SMP. For further 1906c080faa5SSteven J. Hill information see <http://www.linux-mips.org/wiki/34K#SMTC>. 190741c594abSRalf Baechle 1908340ee4b9SRalf Baechleendchoice 1909340ee4b9SRalf Baechle 1910f41ae0b2SRalf Baechleconfig MIPS_MT 1911f41ae0b2SRalf Baechle bool 1912f41ae0b2SRalf Baechle 19130ab7aefcSRalf Baechleconfig SCHED_SMT 19140ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 19150ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 19160ab7aefcSRalf Baechle default n 19170ab7aefcSRalf Baechle help 19180ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 19190ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 19200ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 19210ab7aefcSRalf Baechle 19220ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 19230ab7aefcSRalf Baechle bool 19240ab7aefcSRalf Baechle 1925f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 1926f41ae0b2SRalf Baechle bool 1927f41ae0b2SRalf Baechle 1928f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 1929f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 1930f088fc84SRalf Baechle default y 193107cc0c9eSRalf Baechle depends on MIPS_MT_SMP || MIPS_MT_SMTC 193207cc0c9eSRalf Baechle 193307cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 193407cc0c9eSRalf Baechle bool "VPE loader support." 1935704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 193607cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 193707cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 193807cc0c9eSRalf Baechle select MIPS_MT 193907cc0c9eSRalf Baechle help 194007cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 194107cc0c9eSRalf Baechle onto another VPE and running it. 1942f088fc84SRalf Baechle 194317a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 194417a1d523SDeng-Cheng Zhu bool 194517a1d523SDeng-Cheng Zhu default "y" 194617a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 194717a1d523SDeng-Cheng Zhu 19481a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 19491a2a6d7eSDeng-Cheng Zhu bool 19501a2a6d7eSDeng-Cheng Zhu default "y" 19511a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 19521a2a6d7eSDeng-Cheng Zhu 19530db34215SKevin D. Kissellconfig MIPS_MT_SMTC_IM_BACKSTOP 19540db34215SKevin D. Kissell bool "Use per-TC register bits as backstop for inhibited IM bits" 19550db34215SKevin D. Kissell depends on MIPS_MT_SMTC 19568531a35eSKevin D. Kissell default n 19570db34215SKevin D. Kissell help 19580db34215SKevin D. Kissell To support multiple TC microthreads acting as "CPUs" within 19590db34215SKevin D. Kissell a VPE, VPE-wide interrupt mask bits must be specially manipulated 19600db34215SKevin D. Kissell during interrupt handling. To support legacy drivers and interrupt 19610db34215SKevin D. Kissell controller management code, SMTC has a "backstop" to track and 19620db34215SKevin D. Kissell if necessary restore the interrupt mask. This has some performance 19638531a35eSKevin D. Kissell impact on interrupt service overhead. 19640db34215SKevin D. Kissell 1965f571eff0SKevin D. Kissellconfig MIPS_MT_SMTC_IRQAFF 1966f571eff0SKevin D. Kissell bool "Support IRQ affinity API" 1967f571eff0SKevin D. Kissell depends on MIPS_MT_SMTC 1968f571eff0SKevin D. Kissell default n 1969f571eff0SKevin D. Kissell help 1970f571eff0SKevin D. Kissell Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.) 1971f571eff0SKevin D. Kissell for SMTC Linux kernel. Requires platform support, of which 1972f571eff0SKevin D. Kissell an example can be found in the MIPS kernel i8259 and Malta 19738531a35eSKevin D. Kissell platform code. Adds some overhead to interrupt dispatch, and 19748531a35eSKevin D. Kissell should be used only if you know what you are doing. 1975f571eff0SKevin D. Kissell 1976e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 1977e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 1978e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 1979e01402b1SRalf Baechle default y 1980e01402b1SRalf Baechle help 1981e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 1982e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 1983e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 1984e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 1985e01402b1SRalf Baechle 1986e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 1987e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 1988e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 19895e83d430SRalf Baechle help 1990e01402b1SRalf Baechle 1991da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 1992da615cf6SDeng-Cheng Zhu bool 1993da615cf6SDeng-Cheng Zhu default "y" 1994da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 1995da615cf6SDeng-Cheng Zhu 19962c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 19972c973ef0SDeng-Cheng Zhu bool 19982c973ef0SDeng-Cheng Zhu default "y" 19992c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 20002c973ef0SDeng-Cheng Zhu 20014a16ff4cSRalf Baechleconfig MIPS_CMP 2002044505c7SPaul Burton bool "MIPS CMP framework support" 2003*a6ce202eSPaul Burton depends on SYS_SUPPORTS_MIPS_CMP && !MIPS_MT_SMTC 200472e20142SPaul Burton select MIPS_GIC_IPI 2005eb9b5141STim Anderson select SYNC_R4K 20064a16ff4cSRalf Baechle select WEAK_ORDERING 20074a16ff4cSRalf Baechle default n 20084a16ff4cSRalf Baechle help 2009044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2010044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2011044505c7SPaul Burton its ability to start secondary CPUs. 20124a16ff4cSRalf Baechle 20130ee958e1SPaul Burtonconfig MIPS_CPS 20140ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 20150ee958e1SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 20160ee958e1SPaul Burton select MIPS_CM 20170ee958e1SPaul Burton select MIPS_CPC 20180ee958e1SPaul Burton select MIPS_GIC_IPI 20190ee958e1SPaul Burton select SMP 20200ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 20210ee958e1SPaul Burton select SYS_SUPPORTS_SMP 20220ee958e1SPaul Burton select WEAK_ORDERING 20230ee958e1SPaul Burton help 20240ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 20250ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 20260ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 20270ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 20280ee958e1SPaul Burton support is unavailable. 20290ee958e1SPaul Burton 203072e20142SPaul Burtonconfig MIPS_GIC_IPI 203172e20142SPaul Burton bool 203272e20142SPaul Burton 20339f98f3ddSPaul Burtonconfig MIPS_CM 20349f98f3ddSPaul Burton bool 20359f98f3ddSPaul Burton 20369c38cf44SPaul Burtonconfig MIPS_CPC 20379c38cf44SPaul Burton bool 20389c38cf44SPaul Burton 20391da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 20401da177e4SLinus Torvalds bool 20411da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 20421da177e4SLinus Torvalds default y 20431da177e4SLinus Torvalds 20441da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 20451da177e4SLinus Torvalds bool 20461da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 20471da177e4SLinus Torvalds default y 20481da177e4SLinus Torvalds 20491da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 20501da177e4SLinus Torvalds bool 20511da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 20521da177e4SLinus Torvalds default y 20531da177e4SLinus Torvalds 20542235a54dSSanjay Lal 20551da177e4SLinus Torvaldsconfig 64BIT_PHYS_ADDR 2056d806cb2bSRalf Baechle bool 20571da177e4SLinus Torvalds 205860ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 205960ec6571Spascal@pabr.org def_bool 64BIT_PHYS_ADDR 206060ec6571Spascal@pabr.org 20619693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 20629693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 20639693a853SFranck Bui-Huu bool "Support for the SmartMIPS ASE" 20649693a853SFranck Bui-Huu help 20659693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 20669693a853SFranck Bui-Huu increased security at both hardware and software level for 20679693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 20689693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 20699693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 20709693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 20719693a853SFranck Bui-Huu here. 20729693a853SFranck Bui-Huu 2073bce86083SSteven J. Hillconfig CPU_MICROMIPS 2074bce86083SSteven J. Hill depends on SYS_SUPPORTS_MICROMIPS 2075bce86083SSteven J. Hill bool "Build kernel using microMIPS ISA" 2076bce86083SSteven J. Hill help 2077bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2078bce86083SSteven J. Hill microMIPS ISA 2079bce86083SSteven J. Hill 20801da177e4SLinus Torvaldsconfig CPU_HAS_WB 2081f7062ddbSRalf Baechle bool 2082e01402b1SRalf Baechle 2083df0ac8a4SKevin Cernekeeconfig XKS01 2084df0ac8a4SKevin Cernekee bool 2085df0ac8a4SKevin Cernekee 2086f41ae0b2SRalf Baechle# 2087f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2088f41ae0b2SRalf Baechle# 2089e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2090f41ae0b2SRalf Baechle bool 2091e01402b1SRalf Baechle 2092f41ae0b2SRalf Baechle# 2093f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2094f41ae0b2SRalf Baechle# 2095e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2096f41ae0b2SRalf Baechle bool 2097e01402b1SRalf Baechle 20981da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 20991da177e4SLinus Torvalds bool 21001da177e4SLinus Torvalds depends on !CPU_R3000 21011da177e4SLinus Torvalds default y 21021da177e4SLinus Torvalds 21031da177e4SLinus Torvalds# 210420d60d99SMaciej W. Rozycki# CPU non-features 210520d60d99SMaciej W. Rozycki# 210620d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 210720d60d99SMaciej W. Rozycki bool 210820d60d99SMaciej W. Rozycki 210920d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 211020d60d99SMaciej W. Rozycki bool 211120d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 211220d60d99SMaciej W. Rozycki 211320d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 211420d60d99SMaciej W. Rozycki bool 211520d60d99SMaciej W. Rozycki 211620d60d99SMaciej W. Rozycki# 21171da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 21181da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 21191da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 21201da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 21211da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 21221da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 21231da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 21241da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2125797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2126797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2127797798c1SRalf Baechle# support. 21281da177e4SLinus Torvalds# 21291da177e4SLinus Torvaldsconfig HIGHMEM 21301da177e4SLinus Torvalds bool "High Memory Support" 2131797798c1SRalf Baechle depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM 2132797798c1SRalf Baechle 2133797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2134797798c1SRalf Baechle bool 2135797798c1SRalf Baechle 2136797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2137797798c1SRalf Baechle bool 21381da177e4SLinus Torvalds 21399693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 21409693a853SFranck Bui-Huu bool 21419693a853SFranck Bui-Huu 2142a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2143a6a4834cSSteven J. Hill bool 2144a6a4834cSSteven J. Hill 2145b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2146b4819b59SYoichi Yuasa def_bool y 2147f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2148b4819b59SYoichi Yuasa 2149d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2150d8cb4e11SRalf Baechle bool 2151d8cb4e11SRalf Baechle default y if SGI_IP27 2152d8cb4e11SRalf Baechle help 21533dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2154d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2155d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2156d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2157d8cb4e11SRalf Baechle 2158b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2159b1c6cd42SAtsushi Nemoto bool 21607de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 216131473747SAtsushi Nemoto 2162d8cb4e11SRalf Baechleconfig NUMA 2163d8cb4e11SRalf Baechle bool "NUMA Support" 2164d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2165d8cb4e11SRalf Baechle help 2166d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2167d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2168d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2169d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2170d8cb4e11SRalf Baechle disabled. 2171d8cb4e11SRalf Baechle 2172d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2173d8cb4e11SRalf Baechle bool 2174d8cb4e11SRalf Baechle 2175c80d79d7SYasunori Gotoconfig NODES_SHIFT 2176c80d79d7SYasunori Goto int 2177c80d79d7SYasunori Goto default "6" 2178c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2179c80d79d7SYasunori Goto 218014f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 218114f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 21824be3d2f3SZi Shen Lim depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) 218314f70012SDeng-Cheng Zhu default y 218414f70012SDeng-Cheng Zhu help 218514f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 218614f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 218714f70012SDeng-Cheng Zhu 2188b4819b59SYoichi Yuasasource "mm/Kconfig" 2189b4819b59SYoichi Yuasa 21901da177e4SLinus Torvaldsconfig SMP 21911da177e4SLinus Torvalds bool "Multi-Processing support" 2192e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2193e73ea273SRalf Baechle help 21941da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 21954a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 21964a474157SRobert Graffham than one CPU, say Y. 21971da177e4SLinus Torvalds 21984a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 21991da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 22001da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 22014a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 22021da177e4SLinus Torvalds will run faster if you say N here. 22031da177e4SLinus Torvalds 22041da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 22051da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 22061da177e4SLinus Torvalds 220703502faaSAdrian Bunk See also the SMP-HOWTO available at 220803502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 22091da177e4SLinus Torvalds 22101da177e4SLinus Torvalds If you don't know what to do here, say N. 22111da177e4SLinus Torvalds 221287353d8aSRalf Baechleconfig SMP_UP 221387353d8aSRalf Baechle bool 221487353d8aSRalf Baechle 22154a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 22164a16ff4cSRalf Baechle bool 22174a16ff4cSRalf Baechle 22180ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 22190ee958e1SPaul Burton bool 22200ee958e1SPaul Burton 2221e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2222e73ea273SRalf Baechle bool 2223e73ea273SRalf Baechle 2224130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2225130e2fb7SRalf Baechle bool 2226130e2fb7SRalf Baechle 2227130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2228130e2fb7SRalf Baechle bool 2229130e2fb7SRalf Baechle 2230130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2231130e2fb7SRalf Baechle bool 2232130e2fb7SRalf Baechle 2233130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2234130e2fb7SRalf Baechle bool 2235130e2fb7SRalf Baechle 2236130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2237130e2fb7SRalf Baechle bool 2238130e2fb7SRalf Baechle 22391da177e4SLinus Torvaldsconfig NR_CPUS 22401da177e4SLinus Torvalds int "Maximum number of CPUs (2-64)" 2241c5eaff3eSMarkos Chandras range 2 64 22421da177e4SLinus Torvalds depends on SMP 2243130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2244130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2245130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2246130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2247130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 22481da177e4SLinus Torvalds help 22491da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 22501da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 22511da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 225272ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 225372ede9b1SAtsushi Nemoto and 2 for all others. 22541da177e4SLinus Torvalds 22551da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 225672ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 225772ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 225872ede9b1SAtsushi Nemoto power of two. 22591da177e4SLinus Torvalds 2260399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2261399aaa25SAl Cooper bool 2262399aaa25SAl Cooper 22631723b4a3SAtsushi Nemoto# 22641723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 22651723b4a3SAtsushi Nemoto# 22661723b4a3SAtsushi Nemoto 22671723b4a3SAtsushi Nemotochoice 22681723b4a3SAtsushi Nemoto prompt "Timer frequency" 22691723b4a3SAtsushi Nemoto default HZ_250 22701723b4a3SAtsushi Nemoto help 22711723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 22721723b4a3SAtsushi Nemoto 22731723b4a3SAtsushi Nemoto config HZ_48 22740f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 22751723b4a3SAtsushi Nemoto 22761723b4a3SAtsushi Nemoto config HZ_100 22771723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 22781723b4a3SAtsushi Nemoto 22791723b4a3SAtsushi Nemoto config HZ_128 22801723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 22811723b4a3SAtsushi Nemoto 22821723b4a3SAtsushi Nemoto config HZ_250 22831723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 22841723b4a3SAtsushi Nemoto 22851723b4a3SAtsushi Nemoto config HZ_256 22861723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 22871723b4a3SAtsushi Nemoto 22881723b4a3SAtsushi Nemoto config HZ_1000 22891723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 22901723b4a3SAtsushi Nemoto 22911723b4a3SAtsushi Nemoto config HZ_1024 22921723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 22931723b4a3SAtsushi Nemoto 22941723b4a3SAtsushi Nemotoendchoice 22951723b4a3SAtsushi Nemoto 22961723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 22971723b4a3SAtsushi Nemoto bool 22981723b4a3SAtsushi Nemoto 22991723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 23001723b4a3SAtsushi Nemoto bool 23011723b4a3SAtsushi Nemoto 23021723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 23031723b4a3SAtsushi Nemoto bool 23041723b4a3SAtsushi Nemoto 23051723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 23061723b4a3SAtsushi Nemoto bool 23071723b4a3SAtsushi Nemoto 23081723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 23091723b4a3SAtsushi Nemoto bool 23101723b4a3SAtsushi Nemoto 23111723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 23121723b4a3SAtsushi Nemoto bool 23131723b4a3SAtsushi Nemoto 23141723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 23151723b4a3SAtsushi Nemoto bool 23161723b4a3SAtsushi Nemoto 23171723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 23181723b4a3SAtsushi Nemoto bool 23191723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 23201723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 23211723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 23221723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 23231723b4a3SAtsushi Nemoto 23241723b4a3SAtsushi Nemotoconfig HZ 23251723b4a3SAtsushi Nemoto int 23261723b4a3SAtsushi Nemoto default 48 if HZ_48 23271723b4a3SAtsushi Nemoto default 100 if HZ_100 23281723b4a3SAtsushi Nemoto default 128 if HZ_128 23291723b4a3SAtsushi Nemoto default 250 if HZ_250 23301723b4a3SAtsushi Nemoto default 256 if HZ_256 23311723b4a3SAtsushi Nemoto default 1000 if HZ_1000 23321723b4a3SAtsushi Nemoto default 1024 if HZ_1024 23331723b4a3SAtsushi Nemoto 2334e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 23351da177e4SLinus Torvalds 2336ea6e942bSAtsushi Nemotoconfig KEXEC 23377d60717eSKees Cook bool "Kexec system call" 2338ea6e942bSAtsushi Nemoto help 2339ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2340ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 23413dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2342ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2343ea6e942bSAtsushi Nemoto 234401dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2345ea6e942bSAtsushi Nemoto 2346ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2347ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2348bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2349bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2350bf220695SGeert Uytterhoeven made. 2351ea6e942bSAtsushi Nemoto 23527aa1c8f4SRalf Baechleconfig CRASH_DUMP 23537aa1c8f4SRalf Baechle bool "Kernel crash dumps" 23547aa1c8f4SRalf Baechle help 23557aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 23567aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 23577aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 23587aa1c8f4SRalf Baechle a specially reserved region and then later executed after 23597aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 23607aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 23617aa1c8f4SRalf Baechle PHYSICAL_START. 23627aa1c8f4SRalf Baechle 23637aa1c8f4SRalf Baechleconfig PHYSICAL_START 23647aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 23657aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 23667aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 23677aa1c8f4SRalf Baechle depends on CRASH_DUMP 23687aa1c8f4SRalf Baechle help 23697aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 23707aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 23717aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 23727aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 23737aa1c8f4SRalf Baechle passed to the panic-ed kernel). 23747aa1c8f4SRalf Baechle 2375ea6e942bSAtsushi Nemotoconfig SECCOMP 2376ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2377293c5bd1SRalf Baechle depends on PROC_FS 2378ea6e942bSAtsushi Nemoto default y 2379ea6e942bSAtsushi Nemoto help 2380ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2381ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2382ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2383ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2384ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2385ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2386ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2387ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2388ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2389ea6e942bSAtsushi Nemoto 2390ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2391ea6e942bSAtsushi Nemoto 2392597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 2393597ce172SPaul Burton bool "Support for O32 binaries using 64-bit FP" 2394597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2395597ce172SPaul Burton default y 2396597ce172SPaul Burton help 2397597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2398597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2399597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2400597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2401597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2402597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2403597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2404597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2405597ce172SPaul Burton saying N here. 2406597ce172SPaul Burton 2407597ce172SPaul Burton If unsure, say Y. 2408597ce172SPaul Burton 2409f2ffa5abSDezhong Diaoconfig USE_OF 24100b3e06fdSJonas Gorski bool 2411f2ffa5abSDezhong Diao select OF 2412e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2413abd2363fSGrant Likely select IRQ_DOMAIN 2414f2ffa5abSDezhong Diao 24155e83d430SRalf Baechleendmenu 24165e83d430SRalf Baechle 24171df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 24181df0f0ffSAtsushi Nemoto bool 24191df0f0ffSAtsushi Nemoto default y 24201df0f0ffSAtsushi Nemoto 24211df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 24221df0f0ffSAtsushi Nemoto bool 24231df0f0ffSAtsushi Nemoto default y 24241df0f0ffSAtsushi Nemoto 2425b6c3539bSRalf Baechlesource "init/Kconfig" 2426b6c3539bSRalf Baechle 2427dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2428dc52ddc0SMatt Helsley 24291da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 24301da177e4SLinus Torvalds 24315e83d430SRalf Baechleconfig HW_HAS_EISA 24325e83d430SRalf Baechle bool 24331da177e4SLinus Torvaldsconfig HW_HAS_PCI 24341da177e4SLinus Torvalds bool 24351da177e4SLinus Torvalds 24361da177e4SLinus Torvaldsconfig PCI 24371da177e4SLinus Torvalds bool "Support for PCI controller" 24381da177e4SLinus Torvalds depends on HW_HAS_PCI 2439abb4ae46SRalf Baechle select PCI_DOMAINS 24400f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 24411da177e4SLinus Torvalds help 24421da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 24431da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 24441da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 24451da177e4SLinus Torvalds say Y, otherwise N. 24461da177e4SLinus Torvalds 24471da177e4SLinus Torvaldsconfig PCI_DOMAINS 24481da177e4SLinus Torvalds bool 24491da177e4SLinus Torvalds 24501da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 24511da177e4SLinus Torvalds 24523f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 24533f787ca4SJonas Gorski 24541da177e4SLinus Torvalds# 24551da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 24561da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 24571da177e4SLinus Torvalds# users to choose the right thing ... 24581da177e4SLinus Torvalds# 24591da177e4SLinus Torvaldsconfig ISA 24601da177e4SLinus Torvalds bool 24611da177e4SLinus Torvalds 24621da177e4SLinus Torvaldsconfig EISA 24631da177e4SLinus Torvalds bool "EISA support" 24645e83d430SRalf Baechle depends on HW_HAS_EISA 24651da177e4SLinus Torvalds select ISA 2466aa414dffSRalf Baechle select GENERIC_ISA_DMA 24671da177e4SLinus Torvalds ---help--- 24681da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 24691da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 24701da177e4SLinus Torvalds 24711da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 24721da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 24731da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 24741da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 24751da177e4SLinus Torvalds 24761da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 24771da177e4SLinus Torvalds 24781da177e4SLinus Torvalds Otherwise, say N. 24791da177e4SLinus Torvalds 24801da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 24811da177e4SLinus Torvalds 24821da177e4SLinus Torvaldsconfig TC 24831da177e4SLinus Torvalds bool "TURBOchannel support" 24841da177e4SLinus Torvalds depends on MACH_DECSTATION 24851da177e4SLinus Torvalds help 248650a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 248750a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 248850a23e6eSJustin P. Mattock at: 248950a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 249050a23e6eSJustin P. Mattock and: 249150a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 249250a23e6eSJustin P. Mattock Linux driver support status is documented at: 249350a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 24941da177e4SLinus Torvalds 24951da177e4SLinus Torvaldsconfig MMU 24961da177e4SLinus Torvalds bool 24971da177e4SLinus Torvalds default y 24981da177e4SLinus Torvalds 2499d865bea4SRalf Baechleconfig I8253 2500d865bea4SRalf Baechle bool 2501798778b8SRussell King select CLKSRC_I8253 25022d02612fSThomas Gleixner select CLKEVT_I8253 25039726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2504d865bea4SRalf Baechle 2505e05eb3f8SRalf Baechleconfig ZONE_DMA 2506e05eb3f8SRalf Baechle bool 2507e05eb3f8SRalf Baechle 2508cce335aeSRalf Baechleconfig ZONE_DMA32 2509cce335aeSRalf Baechle bool 2510cce335aeSRalf Baechle 25111da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 25121da177e4SLinus Torvalds 25131da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 25141da177e4SLinus Torvalds 2515388b78adSAlexandre Bounineconfig RAPIDIO 251656abde72SAlexandre Bounine tristate "RapidIO support" 2517388b78adSAlexandre Bounine depends on PCI 2518388b78adSAlexandre Bounine default n 2519388b78adSAlexandre Bounine help 2520388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2521388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2522388b78adSAlexandre Bounine 2523388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2524388b78adSAlexandre Bounine 25251da177e4SLinus Torvaldsendmenu 25261da177e4SLinus Torvalds 25271da177e4SLinus Torvaldsmenu "Executable file formats" 25281da177e4SLinus Torvalds 25291da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 25301da177e4SLinus Torvalds 25311da177e4SLinus Torvaldsconfig TRAD_SIGNALS 25321da177e4SLinus Torvalds bool 25331da177e4SLinus Torvalds 25341da177e4SLinus Torvaldsconfig MIPS32_COMPAT 25351da177e4SLinus Torvalds bool "Kernel support for Linux/MIPS 32-bit binary compatibility" 2536875d43e7SRalf Baechle depends on 64BIT 25371da177e4SLinus Torvalds help 25381da177e4SLinus Torvalds Select this option if you want Linux/MIPS 32-bit binary 25391da177e4SLinus Torvalds compatibility. Since all software available for Linux/MIPS is 25401da177e4SLinus Torvalds currently 32-bit you should say Y here. 25411da177e4SLinus Torvalds 25421da177e4SLinus Torvaldsconfig COMPAT 25431da177e4SLinus Torvalds bool 25441da177e4SLinus Torvalds depends on MIPS32_COMPAT 254548b25c43SChris Metcalf select ARCH_WANT_OLD_COMPAT_IPC 25461da177e4SLinus Torvalds default y 25471da177e4SLinus Torvalds 254805e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 254905e43966SAtsushi Nemoto bool 255005e43966SAtsushi Nemoto depends on COMPAT && SYSVIPC 255105e43966SAtsushi Nemoto default y 255205e43966SAtsushi Nemoto 25531da177e4SLinus Torvaldsconfig MIPS32_O32 25541da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 25551da177e4SLinus Torvalds depends on MIPS32_COMPAT 25561da177e4SLinus Torvalds help 25571da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 25581da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 25591da177e4SLinus Torvalds existing binaries are in this format. 25601da177e4SLinus Torvalds 25611da177e4SLinus Torvalds If unsure, say Y. 25621da177e4SLinus Torvalds 25631da177e4SLinus Torvaldsconfig MIPS32_N32 25641da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 25651da177e4SLinus Torvalds depends on MIPS32_COMPAT 25661da177e4SLinus Torvalds help 25671da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 25681da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 25691da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 25701da177e4SLinus Torvalds cases. 25711da177e4SLinus Torvalds 25721da177e4SLinus Torvalds If unsure, say N. 25731da177e4SLinus Torvalds 25741da177e4SLinus Torvaldsconfig BINFMT_ELF32 25751da177e4SLinus Torvalds bool 25761da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 25771da177e4SLinus Torvalds 25782116245eSRalf Baechleendmenu 25791da177e4SLinus Torvalds 25802116245eSRalf Baechlemenu "Power management options" 2581952fa954SRodolfo Giometti 2582363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2583363c55caSWu Zhangjin def_bool y 25843f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2585363c55caSWu Zhangjin 2586f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2587f4cb5700SJohannes Berg def_bool y 25883f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2589f4cb5700SJohannes Berg 25902116245eSRalf Baechlesource "kernel/power/Kconfig" 2591952fa954SRodolfo Giometti 25921da177e4SLinus Torvaldsendmenu 25931da177e4SLinus Torvalds 25947a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 25957a998935SViresh Kumar bool 25967a998935SViresh Kumar 25977a998935SViresh Kumarif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 25987a998935SViresh Kumarmenu "CPU Power Management" 25997a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 26007a998935SViresh Kumarendmenu 26017a998935SViresh Kumarendif 26029726b43aSWu Zhangjin 2603d5950b43SSam Ravnborgsource "net/Kconfig" 2604d5950b43SSam Ravnborg 26051da177e4SLinus Torvaldssource "drivers/Kconfig" 26061da177e4SLinus Torvalds 260798cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 260898cdee0eSRalf Baechle 26091da177e4SLinus Torvaldssource "fs/Kconfig" 26101da177e4SLinus Torvalds 26111da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 26121da177e4SLinus Torvalds 26131da177e4SLinus Torvaldssource "security/Kconfig" 26141da177e4SLinus Torvalds 26151da177e4SLinus Torvaldssource "crypto/Kconfig" 26161da177e4SLinus Torvalds 26171da177e4SLinus Torvaldssource "lib/Kconfig" 26182235a54dSSanjay Lal 26192235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 2620