xref: /linux/arch/mips/Kconfig (revision a510b616131f85215ba156ed67e5ed1c0701f80f)
1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0
21da177e4SLinus Torvaldsconfig MIPS
31da177e4SLinus Torvalds	bool
41da177e4SLinus Torvalds	default y
5942fa985SYury Norov	select ARCH_32BIT_OFF_T if !64BIT
6ea6a3737SPaul Burton	select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
734c01e41SAlexander Lobakin	select ARCH_HAS_FORTIFY_SOURCE
834c01e41SAlexander Lobakin	select ARCH_HAS_KCOV
934c01e41SAlexander Lobakin	select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
1012597988SMatt Redfearn	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
111e35918aSHassan Naveed	select ARCH_HAS_UBSAN_SANITIZE_ALL
1212597988SMatt Redfearn	select ARCH_SUPPORTS_UPROBES
131ee3630aSRalf Baechle	select ARCH_USE_BUILTIN_BSWAP
1412597988SMatt Redfearn	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
1525da4e9dSPaul Burton	select ARCH_USE_QUEUED_RWLOCKS
160b17c967SPaul Burton	select ARCH_USE_QUEUED_SPINLOCKS
179035bd29SAlexandre Ghiti	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
1812597988SMatt Redfearn	select ARCH_WANT_IPC_PARSE_VERSION
1910916706SShile Zhang	select BUILDTIME_TABLE_SORT
2012597988SMatt Redfearn	select CLONE_BACKWARDS
2157eeacedSPaul Burton	select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
2212597988SMatt Redfearn	select CPU_PM if CPU_IDLE
2312597988SMatt Redfearn	select GENERIC_ATOMIC64 if !64BIT
2412597988SMatt Redfearn	select GENERIC_CLOCKEVENTS
2512597988SMatt Redfearn	select GENERIC_CMOS_UPDATE
2612597988SMatt Redfearn	select GENERIC_CPU_AUTOPROBE
2724640f23SVincenzo Frascino	select GENERIC_GETTIMEOFDAY
28b962aeb0SPaul Burton	select GENERIC_IOMAP
2912597988SMatt Redfearn	select GENERIC_IRQ_PROBE
3012597988SMatt Redfearn	select GENERIC_IRQ_SHOW
316630a8e5SChristoph Hellwig	select GENERIC_ISA_DMA if EISA
32740129b3SAntony Pavlov	select GENERIC_LIB_ASHLDI3
33740129b3SAntony Pavlov	select GENERIC_LIB_ASHRDI3
34740129b3SAntony Pavlov	select GENERIC_LIB_CMPDI2
35740129b3SAntony Pavlov	select GENERIC_LIB_LSHRDI3
36740129b3SAntony Pavlov	select GENERIC_LIB_UCMPDI2
3712597988SMatt Redfearn	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
3812597988SMatt Redfearn	select GENERIC_SMP_IDLE_THREAD
3912597988SMatt Redfearn	select GENERIC_TIME_VSYSCALL
40446f062bSChristoph Hellwig	select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
4112597988SMatt Redfearn	select HANDLE_DOMAIN_IRQ
42906d441fSPaul Burton	select HAVE_ARCH_COMPILER_H
4312597988SMatt Redfearn	select HAVE_ARCH_JUMP_LABEL
4488547001SJason Wessel	select HAVE_ARCH_KGDB
45109c32ffSMatt Redfearn	select HAVE_ARCH_MMAP_RND_BITS if MMU
46109c32ffSMatt Redfearn	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
47490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
48c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
4945e03e62SDaniel Silsby	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
502ff2b7ecSMasahiro Yamada	select HAVE_ASM_MODVERSIONS
5136366e36SPaul Burton	select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
5212597988SMatt Redfearn	select HAVE_CONTEXT_TRACKING
53490f561bSFrederic Weisbecker	select HAVE_TIF_NOHZ
5464575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
5512597988SMatt Redfearn	select HAVE_DEBUG_KMEMLEAK
5612597988SMatt Redfearn	select HAVE_DEBUG_STACKOVERFLOW
5712597988SMatt Redfearn	select HAVE_DMA_CONTIGUOUS
5812597988SMatt Redfearn	select HAVE_DYNAMIC_FTRACE
5934c01e41SAlexander Lobakin	select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
6012597988SMatt Redfearn	select HAVE_EXIT_THREAD
6167a929e0SChristoph Hellwig	select HAVE_FAST_GUP
6212597988SMatt Redfearn	select HAVE_FTRACE_MCOUNT_RECORD
6329c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
6412597988SMatt Redfearn	select HAVE_FUNCTION_TRACER
6534c01e41SAlexander Lobakin	select HAVE_GCC_PLUGINS
6634c01e41SAlexander Lobakin	select HAVE_GENERIC_VDSO
6712597988SMatt Redfearn	select HAVE_IDE
68b3a428b4SHassan Naveed	select HAVE_IOREMAP_PROT
6912597988SMatt Redfearn	select HAVE_IRQ_EXIT_ON_IRQ_STACK
7012597988SMatt Redfearn	select HAVE_IRQ_TIME_ACCOUNTING
71c1bf207dSDavid Daney	select HAVE_KPROBES
72c1bf207dSDavid Daney	select HAVE_KRETPROBES
73c0436b50SPaul Burton	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
74786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
7542a0bb3fSPetr Mladek	select HAVE_NMI
7612597988SMatt Redfearn	select HAVE_OPROFILE
7712597988SMatt Redfearn	select HAVE_PERF_EVENTS
7808bccf43SMarcin Nowakowski	select HAVE_REGS_AND_STACK_ACCESS_API
799ea141adSPaul Burton	select HAVE_RSEQ
8016c0f03fSHassan Naveed	select HAVE_SPARSE_SYSCALL_NR
81d148eac0SMasahiro Yamada	select HAVE_STACKPROTECTOR
8212597988SMatt Redfearn	select HAVE_SYSCALL_TRACEPOINTS
83a3f14310SBen Hutchings	select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
8412597988SMatt Redfearn	select IRQ_FORCED_THREADING
856630a8e5SChristoph Hellwig	select ISA if EISA
8612597988SMatt Redfearn	select MODULES_USE_ELF_REL if MODULES
8734c01e41SAlexander Lobakin	select MODULES_USE_ELF_RELA if MODULES && 64BIT
8812597988SMatt Redfearn	select PERF_USE_VMALLOC
8905a0a344SArnd Bergmann	select RTC_LIB
9012597988SMatt Redfearn	select SYSCTL_EXCEPTION_TRACE
9112597988SMatt Redfearn	select VIRT_TO_BUS
921da177e4SLinus Torvalds
93d3991572SChristoph Hellwigconfig MIPS_FIXUP_BIGPHYS_ADDR
94d3991572SChristoph Hellwig	bool
95d3991572SChristoph Hellwig
961da177e4SLinus Torvaldsmenu "Machine selection"
971da177e4SLinus Torvalds
985e83d430SRalf Baechlechoice
995e83d430SRalf Baechle	prompt "System type"
100d41e6858SMatt Redfearn	default MIPS_GENERIC
1011da177e4SLinus Torvalds
102eed0eabdSPaul Burtonconfig MIPS_GENERIC
103eed0eabdSPaul Burton	bool "Generic board-agnostic MIPS kernel"
104eed0eabdSPaul Burton	select BOOT_RAW
105eed0eabdSPaul Burton	select BUILTIN_DTB
106eed0eabdSPaul Burton	select CEVT_R4K
107eed0eabdSPaul Burton	select CLKSRC_MIPS_GIC
108eed0eabdSPaul Burton	select COMMON_CLK
109eed0eabdSPaul Burton	select CPU_MIPSR2_IRQ_EI
11034c01e41SAlexander Lobakin	select CPU_MIPSR2_IRQ_VI
111eed0eabdSPaul Burton	select CSRC_R4K
112eed0eabdSPaul Burton	select DMA_PERDEV_COHERENT
113eb01d42aSChristoph Hellwig	select HAVE_PCI
114eed0eabdSPaul Burton	select IRQ_MIPS_CPU
1150211d49eSPaul Burton	select MIPS_AUTO_PFN_OFFSET
116eed0eabdSPaul Burton	select MIPS_CPU_SCACHE
117eed0eabdSPaul Burton	select MIPS_GIC
118eed0eabdSPaul Burton	select MIPS_L1_CACHE_SHIFT_7
119eed0eabdSPaul Burton	select NO_EXCEPT_FILL
120eed0eabdSPaul Burton	select PCI_DRIVERS_GENERIC
121eed0eabdSPaul Burton	select SMP_UP if SMP
122a3078e59SMatt Redfearn	select SWAP_IO_SPACE
123eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS32_R1
124eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS32_R2
125eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS32_R6
126eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS64_R1
127eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS64_R2
128eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS64_R6
129eed0eabdSPaul Burton	select SYS_SUPPORTS_32BIT_KERNEL
130eed0eabdSPaul Burton	select SYS_SUPPORTS_64BIT_KERNEL
131eed0eabdSPaul Burton	select SYS_SUPPORTS_BIG_ENDIAN
132eed0eabdSPaul Burton	select SYS_SUPPORTS_HIGHMEM
133eed0eabdSPaul Burton	select SYS_SUPPORTS_LITTLE_ENDIAN
134eed0eabdSPaul Burton	select SYS_SUPPORTS_MICROMIPS
135eed0eabdSPaul Burton	select SYS_SUPPORTS_MIPS16
13634c01e41SAlexander Lobakin	select SYS_SUPPORTS_MIPS_CPS
137eed0eabdSPaul Burton	select SYS_SUPPORTS_MULTITHREADING
138eed0eabdSPaul Burton	select SYS_SUPPORTS_RELOCATABLE
139eed0eabdSPaul Burton	select SYS_SUPPORTS_SMARTMIPS
14034c01e41SAlexander Lobakin	select UHI_BOOT
1412e6522c5SCorentin Labbe	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
1422e6522c5SCorentin Labbe	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1432e6522c5SCorentin Labbe	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
1442e6522c5SCorentin Labbe	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1452e6522c5SCorentin Labbe	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
1462e6522c5SCorentin Labbe	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
147eed0eabdSPaul Burton	select USE_OF
148eed0eabdSPaul Burton	help
149eed0eabdSPaul Burton	  Select this to build a kernel which aims to support multiple boards,
150eed0eabdSPaul Burton	  generally using a flattened device tree passed from the bootloader
151eed0eabdSPaul Burton	  using the boot protocol defined in the UHI (Unified Hosting
152eed0eabdSPaul Burton	  Interface) specification.
153eed0eabdSPaul Burton
15442a4f17dSManuel Laussconfig MIPS_ALCHEMY
155c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
156d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
157f772cdb2SRalf Baechle	select CEVT_R4K
158d7ea335cSSteven J. Hill	select CSRC_R4K
15967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
16088e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
161d3991572SChristoph Hellwig	select MIPS_FIXUP_BIGPHYS_ADDR if PCI
16242a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
16342a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
16442a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
165d30a2b47SLinus Walleij	select GPIOLIB
1661b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
16747440229SManuel Lauss	select COMMON_CLK
1681da177e4SLinus Torvalds
1697ca5dc14SFlorian Fainelliconfig AR7
1707ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
1717ca5dc14SFlorian Fainelli	select BOOT_ELF32
1727ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
1737ca5dc14SFlorian Fainelli	select CEVT_R4K
1747ca5dc14SFlorian Fainelli	select CSRC_R4K
17567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1767ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
1777ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
1787ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
1797ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
1807ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
1817ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
182377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1831b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
184d30a2b47SLinus Walleij	select GPIOLIB
1857ca5dc14SFlorian Fainelli	select VLYNQ
186bbd7ffdbSStephen Boyd	select HAVE_LEGACY_CLK
1877ca5dc14SFlorian Fainelli	help
1887ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1897ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1907ca5dc14SFlorian Fainelli
19143cc739fSSergey Ryazanovconfig ATH25
19243cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
19343cc739fSSergey Ryazanov	select CEVT_R4K
19443cc739fSSergey Ryazanov	select CSRC_R4K
19543cc739fSSergey Ryazanov	select DMA_NONCOHERENT
19667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1971753e74eSSergey Ryazanov	select IRQ_DOMAIN
19843cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
19943cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
20043cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
2018aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
20243cc739fSSergey Ryazanov	help
20343cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
20443cc739fSSergey Ryazanov
205d4a67d9dSGabor Juhosconfig ATH79
206d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
207ff591a91SAlban Bedel	select ARCH_HAS_RESET_CONTROLLER
208d4a67d9dSGabor Juhos	select BOOT_RAW
209d4a67d9dSGabor Juhos	select CEVT_R4K
210d4a67d9dSGabor Juhos	select CSRC_R4K
211d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
212d30a2b47SLinus Walleij	select GPIOLIB
213a08227a2SJohn Crispin	select PINCTRL
214411520afSAlban Bedel	select COMMON_CLK
21567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
216d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
217d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
218d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
219d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
220377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
221b3f0a250SAlban Bedel	select SYS_SUPPORTS_ZBOOT_UART_PROM
22203c8c407SAlban Bedel	select USE_OF
22353d473fcSAlban Bedel	select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
224d4a67d9dSGabor Juhos	help
225d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
226d4a67d9dSGabor Juhos
2275f2d4459SKevin Cernekeeconfig BMIPS_GENERIC
2285f2d4459SKevin Cernekee	bool "Broadcom Generic BMIPS kernel"
229d59098a0SChristoph Hellwig	select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
230d59098a0SChristoph Hellwig	select ARCH_HAS_PHYS_TO_DMA
231d666cd02SKevin Cernekee	select BOOT_RAW
232d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
233d666cd02SKevin Cernekee	select USE_OF
234d666cd02SKevin Cernekee	select CEVT_R4K
235d666cd02SKevin Cernekee	select CSRC_R4K
236d666cd02SKevin Cernekee	select SYNC_R4K
237d666cd02SKevin Cernekee	select COMMON_CLK
238c7c42ec2SSimon Arlott	select BCM6345_L1_IRQ
23960b858f2SKevin Cernekee	select BCM7038_L1_IRQ
24060b858f2SKevin Cernekee	select BCM7120_L2_IRQ
24160b858f2SKevin Cernekee	select BRCMSTB_L2_IRQ
24267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
24360b858f2SKevin Cernekee	select DMA_NONCOHERENT
244d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
24560b858f2SKevin Cernekee	select SYS_SUPPORTS_LITTLE_ENDIAN
246d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
247d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
24860b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS32_3300
24960b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4350
25060b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4380
251d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
252d666cd02SKevin Cernekee	select SWAP_IO_SPACE
25360b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
25460b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
25560b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
25660b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
2574dc4704cSJustin Chen	select HARDIRQS_SW_RESEND
258d666cd02SKevin Cernekee	help
2595f2d4459SKevin Cernekee	  Build a generic DT-based kernel image that boots on select
2605f2d4459SKevin Cernekee	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
2615f2d4459SKevin Cernekee	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
2625f2d4459SKevin Cernekee	  must be set appropriately for your board.
263d666cd02SKevin Cernekee
2641c0c13ebSAurelien Jarnoconfig BCM47XX
265c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
266fe08f8c2SHauke Mehrtens	select BOOT_RAW
26742f77542SRalf Baechle	select CEVT_R4K
268940f6b48SRalf Baechle	select CSRC_R4K
2691c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
270eb01d42aSChristoph Hellwig	select HAVE_PCI
27167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
272314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
273dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
2741c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
2751c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
276377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
2776507831fSAaro Koskinen	select SYS_SUPPORTS_ZBOOT
27825e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
279e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
280c949c0bcSRafał Miłecki	select GPIOLIB
281c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
282f6e734a8SRafał Miłecki	select BCM47XX_NVRAM
2832ab71a02SRafał Miłecki	select BCM47XX_SPROM
284dfe00495SMatt Redfearn	select BCM47XX_SSB if !BCM47XX_BCMA
2851c0c13ebSAurelien Jarno	help
2861c0c13ebSAurelien Jarno	  Support for BCM47XX based boards
2871c0c13ebSAurelien Jarno
288e7300d04SMaxime Bizonconfig BCM63XX
289e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
290ae8de61cSFlorian Fainelli	select BOOT_RAW
291e7300d04SMaxime Bizon	select CEVT_R4K
292e7300d04SMaxime Bizon	select CSRC_R4K
293fc264022SJonas Gorski	select SYNC_R4K
294e7300d04SMaxime Bizon	select DMA_NONCOHERENT
29567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
296e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
297e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
298e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
299e7300d04SMaxime Bizon	select SWAP_IO_SPACE
300d30a2b47SLinus Walleij	select GPIOLIB
301af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
302c5af3c2dSJonas Gorski	select CLKDEV_LOOKUP
303bbd7ffdbSStephen Boyd	select HAVE_LEGACY_CLK
304e7300d04SMaxime Bizon	help
305e7300d04SMaxime Bizon	  Support for BCM63XX based boards
306e7300d04SMaxime Bizon
3071da177e4SLinus Torvaldsconfig MIPS_COBALT
3083fa986faSMartin Michlmayr	bool "Cobalt Server"
30942f77542SRalf Baechle	select CEVT_R4K
310940f6b48SRalf Baechle	select CSRC_R4K
3111097c6acSYoichi Yuasa	select CEVT_GT641XX
3121da177e4SLinus Torvalds	select DMA_NONCOHERENT
313eb01d42aSChristoph Hellwig	select FORCE_PCI
314d865bea4SRalf Baechle	select I8253
3151da177e4SLinus Torvalds	select I8259
31667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
317d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
318252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
3197cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
3200a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
321ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
3220e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
3235e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
324e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
3251da177e4SLinus Torvalds
3261da177e4SLinus Torvaldsconfig MACH_DECSTATION
3273fa986faSMartin Michlmayr	bool "DECstations"
3281da177e4SLinus Torvalds	select BOOT_ELF32
3296457d9fcSYoichi Yuasa	select CEVT_DS1287
33081d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
3314247417dSYoichi Yuasa	select CSRC_IOASIC
33281d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
33320d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
33420d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
33520d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
3361da177e4SLinus Torvalds	select DMA_NONCOHERENT
337ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
33867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3397cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
3407cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
341ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
3427d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
3435e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
3441723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
3451723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
3461723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
347930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
3485e83d430SRalf Baechle	help
3491da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
3501da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
3511da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
3521da177e4SLinus Torvalds
3531da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
3541da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
3551da177e4SLinus Torvalds
3561da177e4SLinus Torvalds		DECstation 5000/50
3571da177e4SLinus Torvalds		DECstation 5000/150
3581da177e4SLinus Torvalds		DECstation 5000/260
3591da177e4SLinus Torvalds		DECsystem 5900/260
3601da177e4SLinus Torvalds
3611da177e4SLinus Torvalds	  otherwise choose R3000.
3621da177e4SLinus Torvalds
3635e83d430SRalf Baechleconfig MACH_JAZZ
3643fa986faSMartin Michlmayr	bool "Jazz family of machines"
36539b2d756SThomas Bogendoerfer	select ARC_MEMORY
36639b2d756SThomas Bogendoerfer	select ARC_PROMLIB
367a211a082SRalf Baechle	select ARCH_MIGHT_HAVE_PC_PARPORT
3687a407aa5SRalf Baechle	select ARCH_MIGHT_HAVE_PC_SERIO
3692f9237d4SChristoph Hellwig	select DMA_OPS
3700e2794b0SRalf Baechle	select FW_ARC
3710e2794b0SRalf Baechle	select FW_ARC32
3725e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
37342f77542SRalf Baechle	select CEVT_R4K
374940f6b48SRalf Baechle	select CSRC_R4K
375e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
3765e83d430SRalf Baechle	select GENERIC_ISA_DMA
3778a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
37867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
379d865bea4SRalf Baechle	select I8253
3805e83d430SRalf Baechle	select I8259
3815e83d430SRalf Baechle	select ISA
3827cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
3835e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
3847d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
3851723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
3861da177e4SLinus Torvalds	help
3875e83d430SRalf Baechle	  This a family of machines based on the MIPS R4030 chipset which was
3885e83d430SRalf Baechle	  used by several vendors to build RISC/os and Windows NT workstations.
389692105b8SMatt LaPlante	  Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
3905e83d430SRalf Baechle	  Olivetti M700-10 workstations.
3915e83d430SRalf Baechle
392de361e8bSPaul Burtonconfig MACH_INGENIC
393de361e8bSPaul Burton	bool "Ingenic SoC based machines"
3945ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
3955ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
396f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
397b35d2653SDaniel Silsby	select CPU_SUPPORTS_HUGEPAGES
3985ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
39967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
40037b4c3caSPaul Cercueil	select PINCTRL
401d30a2b47SLinus Walleij	select GPIOLIB
402ff1930c6SPaul Burton	select COMMON_CLK
40383bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
40415205fc0SPaul Cercueil	select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
405ffb1843dSPaul Burton	select USE_OF
4065ebabe59SLars-Peter Clausen
407171bb2f1SJohn Crispinconfig LANTIQ
408171bb2f1SJohn Crispin	bool "Lantiq based platforms"
409171bb2f1SJohn Crispin	select DMA_NONCOHERENT
41067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
411171bb2f1SJohn Crispin	select CEVT_R4K
412171bb2f1SJohn Crispin	select CSRC_R4K
413171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
414171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
415171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
416171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
417377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
418171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
419f35764e7SJames Hogan	select SYS_SUPPORTS_VPE_LOADER
420171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
421d30a2b47SLinus Walleij	select GPIOLIB
422171bb2f1SJohn Crispin	select SWAP_IO_SPACE
423171bb2f1SJohn Crispin	select BOOT_RAW
424287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
425bbd7ffdbSStephen Boyd	select HAVE_LEGACY_CLK
426a0392222SJohn Crispin	select USE_OF
4273f8c50c9SJohn Crispin	select PINCTRL
4283f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
429c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
430c530781cSJohn Crispin	select RESET_CONTROLLER
431171bb2f1SJohn Crispin
43230ad29bbSHuacai Chenconfig MACH_LOONGSON32
433caed1d1bSHuacai Chen	bool "Loongson 32-bit family of machines"
434c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
435ade299d8SYoichi Yuasa	help
43630ad29bbSHuacai Chen	  This enables support for the Loongson-1 family of machines.
43785749d24SWu Zhangjin
43830ad29bbSHuacai Chen	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
43930ad29bbSHuacai Chen	  the Institute of Computing Technology (ICT), Chinese Academy of
44030ad29bbSHuacai Chen	  Sciences (CAS).
441ade299d8SYoichi Yuasa
44271e2f4ddSJiaxun Yangconfig MACH_LOONGSON2EF
44371e2f4ddSJiaxun Yang	bool "Loongson-2E/F family of machines"
444ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
445ca585cf9SKelvin Cheung	help
44671e2f4ddSJiaxun Yang	  This enables the support of early Loongson-2E/F family of machines.
447ca585cf9SKelvin Cheung
44871e2f4ddSJiaxun Yangconfig MACH_LOONGSON64
449caed1d1bSHuacai Chen	bool "Loongson 64-bit family of machines"
4506fbde6b4SJiaxun Yang	select ARCH_SPARSEMEM_ENABLE
4516fbde6b4SJiaxun Yang	select ARCH_MIGHT_HAVE_PC_PARPORT
4526fbde6b4SJiaxun Yang	select ARCH_MIGHT_HAVE_PC_SERIO
4536fbde6b4SJiaxun Yang	select GENERIC_ISA_DMA_SUPPORT_BROKEN
4546fbde6b4SJiaxun Yang	select BOOT_ELF32
4556fbde6b4SJiaxun Yang	select BOARD_SCACHE
4566fbde6b4SJiaxun Yang	select CSRC_R4K
4576fbde6b4SJiaxun Yang	select CEVT_R4K
4586fbde6b4SJiaxun Yang	select CPU_HAS_WB
4596fbde6b4SJiaxun Yang	select FORCE_PCI
4606fbde6b4SJiaxun Yang	select ISA
4616fbde6b4SJiaxun Yang	select I8259
4626fbde6b4SJiaxun Yang	select IRQ_MIPS_CPU
4637d6d2837SJiaxun Yang	select NO_EXCEPT_FILL
4645125bfeeSTiezhu Yang	select NR_CPUS_DEFAULT_64
4656fbde6b4SJiaxun Yang	select USE_GENERIC_EARLY_PRINTK_8250
4666423e59aSJiaxun Yang	select PCI_DRIVERS_GENERIC
4676fbde6b4SJiaxun Yang	select SYS_HAS_CPU_LOONGSON64
4686fbde6b4SJiaxun Yang	select SYS_HAS_EARLY_PRINTK
4696fbde6b4SJiaxun Yang	select SYS_SUPPORTS_SMP
4706fbde6b4SJiaxun Yang	select SYS_SUPPORTS_HOTPLUG_CPU
4716fbde6b4SJiaxun Yang	select SYS_SUPPORTS_NUMA
4726fbde6b4SJiaxun Yang	select SYS_SUPPORTS_64BIT_KERNEL
4736fbde6b4SJiaxun Yang	select SYS_SUPPORTS_HIGHMEM
4746fbde6b4SJiaxun Yang	select SYS_SUPPORTS_LITTLE_ENDIAN
47571e2f4ddSJiaxun Yang	select SYS_SUPPORTS_ZBOOT
4766fbde6b4SJiaxun Yang	select ZONE_DMA32
4776fbde6b4SJiaxun Yang	select NUMA
47887fcfa7bSJiaxun Yang	select COMMON_CLK
47987fcfa7bSJiaxun Yang	select USE_OF
48087fcfa7bSJiaxun Yang	select BUILTIN_DTB
48139c1485cSHuacai Chen	select PCI_HOST_GENERIC
48271e2f4ddSJiaxun Yang	help
483caed1d1bSHuacai Chen	  This enables the support of Loongson-2/3 family of machines.
484caed1d1bSHuacai Chen
485caed1d1bSHuacai Chen	  Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
486caed1d1bSHuacai Chen	  GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
487caed1d1bSHuacai Chen	  and Loongson-2F which will be removed), developed by the Institute
488caed1d1bSHuacai Chen	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
489ca585cf9SKelvin Cheung
4906a438309SAndrew Brestickerconfig MACH_PISTACHIO
4916a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
4926a438309SAndrew Bresticker	select BOOT_ELF32
4936a438309SAndrew Bresticker	select BOOT_RAW
4946a438309SAndrew Bresticker	select CEVT_R4K
4956a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
4966a438309SAndrew Bresticker	select COMMON_CLK
4976a438309SAndrew Bresticker	select CSRC_R4K
498645c7827SZubair Lutfullah Kakakhel	select DMA_NONCOHERENT
499d30a2b47SLinus Walleij	select GPIOLIB
50067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5016a438309SAndrew Bresticker	select MFD_SYSCON
5026a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
5036a438309SAndrew Bresticker	select MIPS_GIC
5046a438309SAndrew Bresticker	select PINCTRL
5056a438309SAndrew Bresticker	select REGULATOR
5066a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
5076a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
5086a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
5096a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
5106a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
51141cc07beSMatt Redfearn	select SYS_SUPPORTS_RELOCATABLE
5126a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
513018f62eeSEzequiel Garcia	select SYS_HAS_EARLY_PRINTK
514018f62eeSEzequiel Garcia	select USE_GENERIC_EARLY_PRINTK_8250
5156a438309SAndrew Bresticker	select USE_OF
5166a438309SAndrew Bresticker	help
5176a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
5186a438309SAndrew Bresticker
5191da177e4SLinus Torvaldsconfig MIPS_MALTA
5203fa986faSMartin Michlmayr	bool "MIPS Malta board"
52161ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
522a211a082SRalf Baechle	select ARCH_MIGHT_HAVE_PC_PARPORT
5237a407aa5SRalf Baechle	select ARCH_MIGHT_HAVE_PC_SERIO
5241da177e4SLinus Torvalds	select BOOT_ELF32
525fa71c960SRalf Baechle	select BOOT_RAW
526e8823d26SPaul Burton	select BUILTIN_DTB
52742f77542SRalf Baechle	select CEVT_R4K
528fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
52942b002abSGuenter Roeck	select COMMON_CLK
53047bf2b03SMaksym Kokhan	select CSRC_R4K
531885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
5321da177e4SLinus Torvalds	select GENERIC_ISA_DMA
5338a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
534eb01d42aSChristoph Hellwig	select HAVE_PCI
535d865bea4SRalf Baechle	select I8253
5361da177e4SLinus Torvalds	select I8259
53747bf2b03SMaksym Kokhan	select IRQ_MIPS_CPU
5385e83d430SRalf Baechle	select MIPS_BONITO64
5399318c51aSChris Dearman	select MIPS_CPU_SCACHE
54047bf2b03SMaksym Kokhan	select MIPS_GIC
541a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
5425e83d430SRalf Baechle	select MIPS_MSC
54347bf2b03SMaksym Kokhan	select PCI_GT64XXX_PCI0
544ecafe3e9SPaul Burton	select SMP_UP if SMP
5451da177e4SLinus Torvalds	select SWAP_IO_SPACE
5467cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
5477cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
548bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
549c5b36783SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R5
550575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
5517cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
5525d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
553575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
5547cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
5557cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
556ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
557ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5585e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
559c5b36783SSteven J. Hill	select SYS_SUPPORTS_HIGHMEM
5605e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
561424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
56247bf2b03SMaksym Kokhan	select SYS_SUPPORTS_MIPS16
5630365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
564e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
565f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
56647bf2b03SMaksym Kokhan	select SYS_SUPPORTS_RELOCATABLE
5679693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
568f35764e7SJames Hogan	select SYS_SUPPORTS_VPE_LOADER
5691b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
570e8823d26SPaul Burton	select USE_OF
571abcc82b1SJames Hogan	select ZONE_DMA32 if 64BIT
5721da177e4SLinus Torvalds	help
573f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
5741da177e4SLinus Torvalds	  board.
5751da177e4SLinus Torvalds
5762572f00dSJoshua Hendersonconfig MACH_PIC32
5772572f00dSJoshua Henderson	bool "Microchip PIC32 Family"
5782572f00dSJoshua Henderson	help
5792572f00dSJoshua Henderson	  This enables support for the Microchip PIC32 family of platforms.
5802572f00dSJoshua Henderson
5812572f00dSJoshua Henderson	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
5822572f00dSJoshua Henderson	  microcontrollers.
5832572f00dSJoshua Henderson
5845e83d430SRalf Baechleconfig MACH_VR41XX
58574142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
58642f77542SRalf Baechle	select CEVT_R4K
587940f6b48SRalf Baechle	select CSRC_R4K
5887cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
589377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
590d30a2b47SLinus Walleij	select GPIOLIB
5915e83d430SRalf Baechle
592ae2b5bb6SJohn Crispinconfig RALINK
593ae2b5bb6SJohn Crispin	bool "Ralink based machines"
594ae2b5bb6SJohn Crispin	select CEVT_R4K
595ae2b5bb6SJohn Crispin	select CSRC_R4K
596ae2b5bb6SJohn Crispin	select BOOT_RAW
597ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
59867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
599ae2b5bb6SJohn Crispin	select USE_OF
600ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
601ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
602ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
603ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
604377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
605ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
606ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
6072a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
6082a153f1cSJohn Crispin	select RESET_CONTROLLER
609ae2b5bb6SJohn Crispin
6101da177e4SLinus Torvaldsconfig SGI_IP22
6113fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
612c0de00b2SThomas Bogendoerfer	select ARC_MEMORY
61339b2d756SThomas Bogendoerfer	select ARC_PROMLIB
6140e2794b0SRalf Baechle	select FW_ARC
6150e2794b0SRalf Baechle	select FW_ARC32
6167a407aa5SRalf Baechle	select ARCH_MIGHT_HAVE_PC_SERIO
6171da177e4SLinus Torvalds	select BOOT_ELF32
61842f77542SRalf Baechle	select CEVT_R4K
619940f6b48SRalf Baechle	select CSRC_R4K
620e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
6211da177e4SLinus Torvalds	select DMA_NONCOHERENT
6226630a8e5SChristoph Hellwig	select HAVE_EISA
623d865bea4SRalf Baechle	select I8253
62468de4803SThomas Bogendoerfer	select I8259
6251da177e4SLinus Torvalds	select IP22_CPU_SCACHE
62667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
627aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
628e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
629e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
63036e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
631e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
632e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
633e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
6341da177e4SLinus Torvalds	select SWAP_IO_SPACE
6357cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
6367cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
637c0de00b2SThomas Bogendoerfer	select SYS_HAS_EARLY_PRINTK
638ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
639ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6405e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
641930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6421da177e4SLinus Torvalds	help
6431da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
6441da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
6451da177e4SLinus Torvalds	  that runs on these, say Y here.
6461da177e4SLinus Torvalds
6471da177e4SLinus Torvaldsconfig SGI_IP27
6483fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
64954aed4ddSChristoph Hellwig	select ARCH_HAS_PHYS_TO_DMA
650397dc00eSMike Rapoport	select ARCH_SPARSEMEM_ENABLE
6510e2794b0SRalf Baechle	select FW_ARC
6520e2794b0SRalf Baechle	select FW_ARC64
653e9422427SThomas Bogendoerfer	select ARC_CMDLINE_ONLY
6545e83d430SRalf Baechle	select BOOT_ELF64
655e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
65636a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
657eb01d42aSChristoph Hellwig	select HAVE_PCI
65869a07a41SThomas Bogendoerfer	select IRQ_MIPS_CPU
659e6308b6dSThomas Bogendoerfer	select IRQ_DOMAIN_HIERARCHY
660130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
661a57140e9SThomas Bogendoerfer	select PCI_DRIVERS_GENERIC
662a57140e9SThomas Bogendoerfer	select PCI_XTALK_BRIDGE
6637cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
664ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6655e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
666d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
6671a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
668930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6696c86a302SMike Rapoport	select NUMA
6701da177e4SLinus Torvalds	help
6711da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
6721da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
6731da177e4SLinus Torvalds	  here.
6741da177e4SLinus Torvalds
675e2defae5SThomas Bogendoerferconfig SGI_IP28
6767d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
677c0de00b2SThomas Bogendoerfer	select ARC_MEMORY
67839b2d756SThomas Bogendoerfer	select ARC_PROMLIB
6790e2794b0SRalf Baechle	select FW_ARC
6800e2794b0SRalf Baechle	select FW_ARC64
6817a407aa5SRalf Baechle	select ARCH_MIGHT_HAVE_PC_SERIO
682e2defae5SThomas Bogendoerfer	select BOOT_ELF64
683e2defae5SThomas Bogendoerfer	select CEVT_R4K
684e2defae5SThomas Bogendoerfer	select CSRC_R4K
685e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
686e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
687e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
68867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
6896630a8e5SChristoph Hellwig	select HAVE_EISA
690e2defae5SThomas Bogendoerfer	select I8253
691e2defae5SThomas Bogendoerfer	select I8259
692e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
693e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6945b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
695e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
696e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
697e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
698e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
699e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
700c0de00b2SThomas Bogendoerfer	select SYS_HAS_EARLY_PRINTK
701e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
702e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
703dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
704e2defae5SThomas Bogendoerfer	help
705e2defae5SThomas Bogendoerfer	  This is the SGI Indigo2 with R10000 processor.  To compile a Linux
706e2defae5SThomas Bogendoerfer	  kernel that runs on these, say Y here.
707e2defae5SThomas Bogendoerfer
7087505576dSThomas Bogendoerferconfig SGI_IP30
7097505576dSThomas Bogendoerfer	bool "SGI IP30 (Octane/Octane2)"
7107505576dSThomas Bogendoerfer	select ARCH_HAS_PHYS_TO_DMA
7117505576dSThomas Bogendoerfer	select FW_ARC
7127505576dSThomas Bogendoerfer	select FW_ARC64
7137505576dSThomas Bogendoerfer	select BOOT_ELF64
7147505576dSThomas Bogendoerfer	select CEVT_R4K
7157505576dSThomas Bogendoerfer	select CSRC_R4K
7167505576dSThomas Bogendoerfer	select SYNC_R4K if SMP
7177505576dSThomas Bogendoerfer	select ZONE_DMA32
7187505576dSThomas Bogendoerfer	select HAVE_PCI
7197505576dSThomas Bogendoerfer	select IRQ_MIPS_CPU
7207505576dSThomas Bogendoerfer	select IRQ_DOMAIN_HIERARCHY
7217505576dSThomas Bogendoerfer	select NR_CPUS_DEFAULT_2
7227505576dSThomas Bogendoerfer	select PCI_DRIVERS_GENERIC
7237505576dSThomas Bogendoerfer	select PCI_XTALK_BRIDGE
7247505576dSThomas Bogendoerfer	select SYS_HAS_EARLY_PRINTK
7257505576dSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
7267505576dSThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
7277505576dSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
7287505576dSThomas Bogendoerfer	select SYS_SUPPORTS_SMP
7297505576dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
7307505576dSThomas Bogendoerfer	select ARC_MEMORY
7317505576dSThomas Bogendoerfer	help
7327505576dSThomas Bogendoerfer	  These are the SGI Octane and Octane2 graphics workstations.  To
7337505576dSThomas Bogendoerfer	  compile a Linux kernel that runs on these, say Y here.
7347505576dSThomas Bogendoerfer
7351da177e4SLinus Torvaldsconfig SGI_IP32
736cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
73739b2d756SThomas Bogendoerfer	select ARC_MEMORY
73839b2d756SThomas Bogendoerfer	select ARC_PROMLIB
73903df8229SChristoph Hellwig	select ARCH_HAS_PHYS_TO_DMA
7400e2794b0SRalf Baechle	select FW_ARC
7410e2794b0SRalf Baechle	select FW_ARC32
7421da177e4SLinus Torvalds	select BOOT_ELF32
74342f77542SRalf Baechle	select CEVT_R4K
744940f6b48SRalf Baechle	select CSRC_R4K
7451da177e4SLinus Torvalds	select DMA_NONCOHERENT
746eb01d42aSChristoph Hellwig	select HAVE_PCI
74767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7481da177e4SLinus Torvalds	select R5000_CPU_SCACHE
7491da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
7507cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
7517cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
7527cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
753dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
754ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
7555e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7561da177e4SLinus Torvalds	help
7571da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
7581da177e4SLinus Torvalds
759ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
760ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
7615e83d430SRalf Baechle	select BOOT_ELF32
7625e83d430SRalf Baechle	select SIBYTE_BCM1120
7635e83d430SRalf Baechle	select SWAP_IO_SPACE
7647cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7655e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7665e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7675e83d430SRalf Baechle
768ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
769ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
7705e83d430SRalf Baechle	select BOOT_ELF32
7715e83d430SRalf Baechle	select SIBYTE_BCM1120
7725e83d430SRalf Baechle	select SWAP_IO_SPACE
7737cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7745e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7755e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7765e83d430SRalf Baechle
7775e83d430SRalf Baechleconfig SIBYTE_CRHONE
7783fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
7795e83d430SRalf Baechle	select BOOT_ELF32
7805e83d430SRalf Baechle	select SIBYTE_BCM1125
7815e83d430SRalf Baechle	select SWAP_IO_SPACE
7827cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7835e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7845e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7855e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7865e83d430SRalf Baechle
787ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
788ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
789ade299d8SYoichi Yuasa	select BOOT_ELF32
790ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
791ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
792ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
793ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
794ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
795ade299d8SYoichi Yuasa
796ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
797ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
798ade299d8SYoichi Yuasa	select BOOT_ELF32
799fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
800ade299d8SYoichi Yuasa	select SIBYTE_SB1250
801ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
802ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
803ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
804ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
805ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
806cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
807e4849affSMaciej W. Rozycki	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
808ade299d8SYoichi Yuasa
809ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
810ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
811ade299d8SYoichi Yuasa	select BOOT_ELF32
812fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
813ade299d8SYoichi Yuasa	select SIBYTE_SB1250
814ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
815ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
816ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
817ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
818ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
819756d6d83SMaciej W. Rozycki	select ZONE_DMA32 if 64BIT
820ade299d8SYoichi Yuasa
821ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
822ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
823ade299d8SYoichi Yuasa	select BOOT_ELF32
824ade299d8SYoichi Yuasa	select SIBYTE_SB1250
825ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
826ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
827ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
828ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
829e4849affSMaciej W. Rozycki	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
830ade299d8SYoichi Yuasa
831ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
832ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
833ade299d8SYoichi Yuasa	select BOOT_ELF32
834ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
835ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
836ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
837ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
838ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
839651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
840ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
841cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
842e4849affSMaciej W. Rozycki	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
843ade299d8SYoichi Yuasa
84414b36af4SThomas Bogendoerferconfig SNI_RM
84514b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
84639b2d756SThomas Bogendoerfer	select ARC_MEMORY
84739b2d756SThomas Bogendoerfer	select ARC_PROMLIB
8480e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
8490e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
850aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
8515e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
852a211a082SRalf Baechle	select ARCH_MIGHT_HAVE_PC_PARPORT
8537a407aa5SRalf Baechle	select ARCH_MIGHT_HAVE_PC_SERIO
8545e83d430SRalf Baechle	select BOOT_ELF32
85542f77542SRalf Baechle	select CEVT_R4K
856940f6b48SRalf Baechle	select CSRC_R4K
857e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
8585e83d430SRalf Baechle	select DMA_NONCOHERENT
8595e83d430SRalf Baechle	select GENERIC_ISA_DMA
8606630a8e5SChristoph Hellwig	select HAVE_EISA
8618a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
862eb01d42aSChristoph Hellwig	select HAVE_PCI
86367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
864d865bea4SRalf Baechle	select I8253
8655e83d430SRalf Baechle	select I8259
8665e83d430SRalf Baechle	select ISA
8674a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
8687cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
8694a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
870c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
8714a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
87236a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
873ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
8747d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
8754a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
8765e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
8775e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8781da177e4SLinus Torvalds	help
87914b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
88014b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
8815e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
8825e83d430SRalf Baechle	  support this machine type.
8831da177e4SLinus Torvalds
884edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
885edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
8865e83d430SRalf Baechle
887edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
888edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
88923fbee9dSRalf Baechle
89073b4390fSRalf Baechleconfig MIKROTIK_RB532
89173b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
89273b4390fSRalf Baechle	select CEVT_R4K
89373b4390fSRalf Baechle	select CSRC_R4K
89473b4390fSRalf Baechle	select DMA_NONCOHERENT
895eb01d42aSChristoph Hellwig	select HAVE_PCI
89667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
89773b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
89873b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
89973b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
90073b4390fSRalf Baechle	select SWAP_IO_SPACE
90173b4390fSRalf Baechle	select BOOT_RAW
902d30a2b47SLinus Walleij	select GPIOLIB
903930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
90473b4390fSRalf Baechle	help
90573b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
90673b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
90773b4390fSRalf Baechle
9089ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
9099ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
910a86c7f72SDavid Daney	select CEVT_R4K
911ea8c64acSChristoph Hellwig	select ARCH_HAS_PHYS_TO_DMA
9121753d50cSChristoph Hellwig	select HAVE_RAPIDIO
913d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
914a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
915a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
916f65aad41SRalf Baechle	select EDAC_SUPPORT
917b01aec9bSBorislav Petkov	select EDAC_ATOMIC_SCRUB
91873569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
91973569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
920a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
9215e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
922eb01d42aSChristoph Hellwig	select HAVE_PCI
92378bdbbacSMasahiro Yamada	select HAVE_PLAT_DELAY
92478bdbbacSMasahiro Yamada	select HAVE_PLAT_FW_INIT_CMDLINE
92578bdbbacSMasahiro Yamada	select HAVE_PLAT_MEMCPY
926f00e001eSDavid Daney	select ZONE_DMA32
927465aaed0SDavid Daney	select HOLES_IN_ZONE
928d30a2b47SLinus Walleij	select GPIOLIB
9296e511163SDavid Daney	select USE_OF
9306e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
9316e511163SDavid Daney	select SYS_SUPPORTS_SMP
9327820b84bSDavid Daney	select NR_CPUS_DEFAULT_64
9337820b84bSDavid Daney	select MIPS_NR_CPU_NR_MAP_1024
934e326479fSAndrew Bresticker	select BUILTIN_DTB
9358c1e6b14SDavid Daney	select MTD_COMPLEX_MAPPINGS
93609230cbcSChristoph Hellwig	select SWIOTLB
9373ff72be4SSteven J. Hill	select SYS_SUPPORTS_RELOCATABLE
938a86c7f72SDavid Daney	help
939a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
940a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
941a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
942a86c7f72SDavid Daney	  Some of the supported boards are:
943a86c7f72SDavid Daney		EBT3000
944a86c7f72SDavid Daney		EBH3000
945a86c7f72SDavid Daney		EBH3100
946a86c7f72SDavid Daney		Thunder
947a86c7f72SDavid Daney		Kodama
948a86c7f72SDavid Daney		Hikari
949a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
950a86c7f72SDavid Daney
9517f058e85SJayachandran Cconfig NLM_XLR_BOARD
9527f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
9537f058e85SJayachandran C	select BOOT_ELF32
9547f058e85SJayachandran C	select NLM_COMMON
9557f058e85SJayachandran C	select SYS_HAS_CPU_XLR
9567f058e85SJayachandran C	select SYS_SUPPORTS_SMP
957eb01d42aSChristoph Hellwig	select HAVE_PCI
9587f058e85SJayachandran C	select SWAP_IO_SPACE
9597f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9607f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
961d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
9627f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9637f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9647f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
9657f058e85SJayachandran C	select CEVT_R4K
9667f058e85SJayachandran C	select CSRC_R4K
96767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
968b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9697f058e85SJayachandran C	select SYNC_R4K
9707f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
9718f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9728f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9737f058e85SJayachandran C	help
9747f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
9757f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
9767f058e85SJayachandran C
9771c773ea4SJayachandran Cconfig NLM_XLP_BOARD
9781c773ea4SJayachandran C	bool "Netlogic XLP based systems"
9791c773ea4SJayachandran C	select BOOT_ELF32
9801c773ea4SJayachandran C	select NLM_COMMON
9811c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
9821c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
983eb01d42aSChristoph Hellwig	select HAVE_PCI
9841c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9851c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
986d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
987d30a2b47SLinus Walleij	select GPIOLIB
9881c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9891c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
9901c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9911c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
9921c773ea4SJayachandran C	select CEVT_R4K
9931c773ea4SJayachandran C	select CSRC_R4K
99467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
995b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9961c773ea4SJayachandran C	select SYNC_R4K
9971c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
9982f6528e1SJayachandran C	select USE_OF
9998f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
10008f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
10011c773ea4SJayachandran C	help
10021c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
10031c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
10041c773ea4SJayachandran C
10051da177e4SLinus Torvaldsendchoice
10061da177e4SLinus Torvalds
1007e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
10083b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
1009d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
1010a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
1011e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
10128945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig"
1013eed0eabdSPaul Burtonsource "arch/mips/generic/Kconfig"
10145e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
10155ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
10168ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
10172572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig"
1018af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig"
1019ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
102029c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
102138b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
102222b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
10235e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
1024a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
102571e2f4ddSJiaxun Yangsource "arch/mips/loongson2ef/Kconfig"
102630ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig"
102730ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig"
10287f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
102938b18f72SRalf Baechle
10305e83d430SRalf Baechleendmenu
10315e83d430SRalf Baechle
10323c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
10333c9ee7efSAkinobu Mita	bool
10343c9ee7efSAkinobu Mita	default y
10353c9ee7efSAkinobu Mita
10361da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
10371da177e4SLinus Torvalds	bool
10381da177e4SLinus Torvalds	default y
10391da177e4SLinus Torvalds
1040ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
10411cc89038SAtsushi Nemoto	bool
10421cc89038SAtsushi Nemoto	default y
10431cc89038SAtsushi Nemoto
10441da177e4SLinus Torvalds#
10451da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
10461da177e4SLinus Torvalds#
10470e2794b0SRalf Baechleconfig FW_ARC
10481da177e4SLinus Torvalds	bool
10491da177e4SLinus Torvalds
105061ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
105161ed242dSRalf Baechle	bool
105261ed242dSRalf Baechle
10539267a30dSMarc St-Jeanconfig BOOT_RAW
10549267a30dSMarc St-Jean	bool
10559267a30dSMarc St-Jean
1056217dd11eSRalf Baechleconfig CEVT_BCM1480
1057217dd11eSRalf Baechle	bool
1058217dd11eSRalf Baechle
10596457d9fcSYoichi Yuasaconfig CEVT_DS1287
10606457d9fcSYoichi Yuasa	bool
10616457d9fcSYoichi Yuasa
10621097c6acSYoichi Yuasaconfig CEVT_GT641XX
10631097c6acSYoichi Yuasa	bool
10641097c6acSYoichi Yuasa
106542f77542SRalf Baechleconfig CEVT_R4K
106642f77542SRalf Baechle	bool
106742f77542SRalf Baechle
1068217dd11eSRalf Baechleconfig CEVT_SB1250
1069217dd11eSRalf Baechle	bool
1070217dd11eSRalf Baechle
1071229f773eSAtsushi Nemotoconfig CEVT_TXX9
1072229f773eSAtsushi Nemoto	bool
1073229f773eSAtsushi Nemoto
1074217dd11eSRalf Baechleconfig CSRC_BCM1480
1075217dd11eSRalf Baechle	bool
1076217dd11eSRalf Baechle
10774247417dSYoichi Yuasaconfig CSRC_IOASIC
10784247417dSYoichi Yuasa	bool
10794247417dSYoichi Yuasa
1080940f6b48SRalf Baechleconfig CSRC_R4K
108138586428SSerge Semin	select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1082940f6b48SRalf Baechle	bool
1083940f6b48SRalf Baechle
1084217dd11eSRalf Baechleconfig CSRC_SB1250
1085217dd11eSRalf Baechle	bool
1086217dd11eSRalf Baechle
1087a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL
1088a7f4df4eSAlex Smith	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1089a7f4df4eSAlex Smith
1090a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
1091d30a2b47SLinus Walleij	select GPIOLIB
1092a9aec7feSAtsushi Nemoto	bool
1093a9aec7feSAtsushi Nemoto
10940e2794b0SRalf Baechleconfig FW_CFE
1095df78b5c8SAurelien Jarno	bool
1096df78b5c8SAurelien Jarno
109740e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES
109840e084a5SRalf Baechle	bool
109940e084a5SRalf Baechle
1100885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1101f3ecc0ffSChristoph Hellwig	select ARCH_HAS_DMA_COHERENCE_H
1102885014bcSFelix Fietkau	select DMA_NONCOHERENT
1103885014bcSFelix Fietkau	bool
1104885014bcSFelix Fietkau
110520d33064SPaul Burtonconfig DMA_PERDEV_COHERENT
110620d33064SPaul Burton	bool
1107347cb6afSChristoph Hellwig	select ARCH_HAS_SETUP_DMA_OPS
11085748e1b3SChristoph Hellwig	select DMA_NONCOHERENT
110920d33064SPaul Burton
11101da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
11111da177e4SLinus Torvalds	bool
1112db91427bSChristoph Hellwig	#
1113db91427bSChristoph Hellwig	# MIPS allows mixing "slightly different" Cacheability and Coherency
1114db91427bSChristoph Hellwig	# Attribute bits.  It is believed that the uncached access through
1115db91427bSChristoph Hellwig	# KSEG1 and the implementation specific "uncached accelerated" used
1116db91427bSChristoph Hellwig	# by pgprot_writcombine can be mixed, and the latter sometimes provides
1117db91427bSChristoph Hellwig	# significant advantages.
1118db91427bSChristoph Hellwig	#
1119419e2f18SChristoph Hellwig	select ARCH_HAS_DMA_WRITE_COMBINE
1120fa7e2247SChristoph Hellwig	select ARCH_HAS_DMA_PREP_COHERENT
1121f8c55dc6SChristoph Hellwig	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1122fa7e2247SChristoph Hellwig	select ARCH_HAS_DMA_SET_UNCACHED
112334dc0ea6SChristoph Hellwig	select DMA_NONCOHERENT_MMAP
1124f8c55dc6SChristoph Hellwig	select DMA_NONCOHERENT_CACHE_SYNC
112534dc0ea6SChristoph Hellwig	select NEED_DMA_MAP_STATE
11264ce588cdSRalf Baechle
112736a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
11281da177e4SLinus Torvalds	bool
11291da177e4SLinus Torvalds
11301b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1131dbb74540SRalf Baechle	bool
1132dbb74540SRalf Baechle
11331da177e4SLinus Torvaldsconfig MIPS_BONITO64
11341da177e4SLinus Torvalds	bool
11351da177e4SLinus Torvalds
11361da177e4SLinus Torvaldsconfig MIPS_MSC
11371da177e4SLinus Torvalds	bool
11381da177e4SLinus Torvalds
113939b8d525SRalf Baechleconfig SYNC_R4K
114039b8d525SRalf Baechle	bool
114139b8d525SRalf Baechle
1142ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1143d388d685SMaciej W. Rozycki	def_bool n
1144d388d685SMaciej W. Rozycki
11454e0748f5SMarkos Chandrasconfig GENERIC_CSUM
114618d84e2eSAlexander Lobakin	def_bool CPU_NO_LOAD_STORE_LR
11474e0748f5SMarkos Chandras
11488313da30SRalf Baechleconfig GENERIC_ISA_DMA
11498313da30SRalf Baechle	bool
11508313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1151a35bee8aSNamhyung Kim	select ISA_DMA_API
11528313da30SRalf Baechle
1153aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1154aa414dffSRalf Baechle	bool
11558313da30SRalf Baechle	select GENERIC_ISA_DMA
1156aa414dffSRalf Baechle
115778bdbbacSMasahiro Yamadaconfig HAVE_PLAT_DELAY
115878bdbbacSMasahiro Yamada	bool
115978bdbbacSMasahiro Yamada
116078bdbbacSMasahiro Yamadaconfig HAVE_PLAT_FW_INIT_CMDLINE
116178bdbbacSMasahiro Yamada	bool
116278bdbbacSMasahiro Yamada
116378bdbbacSMasahiro Yamadaconfig HAVE_PLAT_MEMCPY
116478bdbbacSMasahiro Yamada	bool
116578bdbbacSMasahiro Yamada
1166a35bee8aSNamhyung Kimconfig ISA_DMA_API
1167a35bee8aSNamhyung Kim	bool
1168a35bee8aSNamhyung Kim
1169465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1170465aaed0SDavid Daney	bool
1171465aaed0SDavid Daney
11728c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE
11738c530ea3SMatt Redfearn	bool
11748c530ea3SMatt Redfearn	help
11758c530ea3SMatt Redfearn	  Selected if the platform supports relocating the kernel.
11768c530ea3SMatt Redfearn	  The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
11778c530ea3SMatt Redfearn	  to allow access to command line and entropy sources.
11788c530ea3SMatt Redfearn
1179f381bf6dSDavid Daneyconfig MIPS_CBPF_JIT
1180f381bf6dSDavid Daney	def_bool y
1181f381bf6dSDavid Daney	depends on BPF_JIT && HAVE_CBPF_JIT
1182f381bf6dSDavid Daney
1183f381bf6dSDavid Daneyconfig MIPS_EBPF_JIT
1184f381bf6dSDavid Daney	def_bool y
1185f381bf6dSDavid Daney	depends on BPF_JIT && HAVE_EBPF_JIT
1186f381bf6dSDavid Daney
1187f381bf6dSDavid Daney
11885e83d430SRalf Baechle#
11896b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
11905e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
11915e83d430SRalf Baechle# choice statement should be more obvious to the user.
11925e83d430SRalf Baechle#
11935e83d430SRalf Baechlechoice
11946b2aac42SMasanari Iida	prompt "Endianness selection"
11951da177e4SLinus Torvalds	help
11961da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
11975e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
11983cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
11995e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
12003dde6ad8SDavid Sterba	  one or the other endianness.
12015e83d430SRalf Baechle
12025e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
12035e83d430SRalf Baechle	bool "Big endian"
12045e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
12055e83d430SRalf Baechle
12065e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
12075e83d430SRalf Baechle	bool "Little endian"
12085e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
12095e83d430SRalf Baechle
12105e83d430SRalf Baechleendchoice
12115e83d430SRalf Baechle
121222b0763aSDavid Daneyconfig EXPORT_UASM
121322b0763aSDavid Daney	bool
121422b0763aSDavid Daney
12152116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
12162116245eSRalf Baechle	bool
12172116245eSRalf Baechle
12185e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
12195e83d430SRalf Baechle	bool
12205e83d430SRalf Baechle
12215e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
12225e83d430SRalf Baechle	bool
12231da177e4SLinus Torvalds
12249cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
12259cffd154SDavid Daney	bool
122645e03e62SDaniel Silsby	depends on CPU_SUPPORTS_HUGEPAGES
12279cffd154SDavid Daney	default y
12289cffd154SDavid Daney
1229aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1230aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1231aa1762f4SDavid Daney
12321da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
12331da177e4SLinus Torvalds	bool
12341da177e4SLinus Torvalds
12359267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
12369267a30dSMarc St-Jean	bool
12379267a30dSMarc St-Jean
12389267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
12399267a30dSMarc St-Jean	bool
12409267a30dSMarc St-Jean
12418420fd00SAtsushi Nemotoconfig IRQ_TXX9
12428420fd00SAtsushi Nemoto	bool
12438420fd00SAtsushi Nemoto
1244d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1245d5ab1a69SYoichi Yuasa	bool
1246d5ab1a69SYoichi Yuasa
1247252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
12481da177e4SLinus Torvalds	bool
12491da177e4SLinus Torvalds
1250a57140e9SThomas Bogendoerferconfig PCI_XTALK_BRIDGE
1251a57140e9SThomas Bogendoerfer	bool
1252a57140e9SThomas Bogendoerfer
12539267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
12549267a30dSMarc St-Jean	bool
12559267a30dSMarc St-Jean
1256a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1257a7e07b1aSMarkos Chandras	bool
1258a7e07b1aSMarkos Chandras
12591da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
12601da177e4SLinus Torvalds	bool
12611da177e4SLinus Torvalds
1262e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1263e2defae5SThomas Bogendoerfer	bool
1264e2defae5SThomas Bogendoerfer
12655b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
12665b438c44SThomas Bogendoerfer	bool
12675b438c44SThomas Bogendoerfer
1268e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1269e2defae5SThomas Bogendoerfer	bool
1270e2defae5SThomas Bogendoerfer
1271e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1272e2defae5SThomas Bogendoerfer	bool
1273e2defae5SThomas Bogendoerfer
1274e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1275e2defae5SThomas Bogendoerfer	bool
1276e2defae5SThomas Bogendoerfer
1277e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1278e2defae5SThomas Bogendoerfer	bool
1279e2defae5SThomas Bogendoerfer
1280e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1281e2defae5SThomas Bogendoerfer	bool
1282e2defae5SThomas Bogendoerfer
12830e2794b0SRalf Baechleconfig FW_ARC32
12845e83d430SRalf Baechle	bool
12855e83d430SRalf Baechle
1286aaa9fad3SPaul Bolleconfig FW_SNIPROM
1287231a35d3SThomas Bogendoerfer	bool
1288231a35d3SThomas Bogendoerfer
12891da177e4SLinus Torvaldsconfig BOOT_ELF32
12901da177e4SLinus Torvalds	bool
12911da177e4SLinus Torvalds
1292930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1293930beb5aSFlorian Fainelli	bool
1294930beb5aSFlorian Fainelli
1295930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1296930beb5aSFlorian Fainelli	bool
1297930beb5aSFlorian Fainelli
1298930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1299930beb5aSFlorian Fainelli	bool
1300930beb5aSFlorian Fainelli
1301930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1302930beb5aSFlorian Fainelli	bool
1303930beb5aSFlorian Fainelli
13041da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
13051da177e4SLinus Torvalds	int
1306a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
13075432eeb6SKevin Cernekee	default "6" if MIPS_L1_CACHE_SHIFT_6
13085432eeb6SKevin Cernekee	default "5" if MIPS_L1_CACHE_SHIFT_5
13095432eeb6SKevin Cernekee	default "4" if MIPS_L1_CACHE_SHIFT_4
13101da177e4SLinus Torvalds	default "5"
13111da177e4SLinus Torvalds
1312e9422427SThomas Bogendoerferconfig ARC_CMDLINE_ONLY
1313e9422427SThomas Bogendoerfer	bool
1314e9422427SThomas Bogendoerfer
13151da177e4SLinus Torvaldsconfig ARC_CONSOLE
13161da177e4SLinus Torvalds	bool "ARC console support"
1317e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
13181da177e4SLinus Torvalds
13191da177e4SLinus Torvaldsconfig ARC_MEMORY
13201da177e4SLinus Torvalds	bool
13211da177e4SLinus Torvalds
13221da177e4SLinus Torvaldsconfig ARC_PROMLIB
13231da177e4SLinus Torvalds	bool
13241da177e4SLinus Torvalds
13250e2794b0SRalf Baechleconfig FW_ARC64
13261da177e4SLinus Torvalds	bool
13271da177e4SLinus Torvalds
13281da177e4SLinus Torvaldsconfig BOOT_ELF64
13291da177e4SLinus Torvalds	bool
13301da177e4SLinus Torvalds
13311da177e4SLinus Torvaldsmenu "CPU selection"
13321da177e4SLinus Torvalds
13331da177e4SLinus Torvaldschoice
13341da177e4SLinus Torvalds	prompt "CPU type"
13351da177e4SLinus Torvalds	default CPU_R4X00
13361da177e4SLinus Torvalds
1337268a2d60SJiaxun Yangconfig CPU_LOONGSON64
1338caed1d1bSHuacai Chen	bool "Loongson 64-bit CPU"
1339268a2d60SJiaxun Yang	depends on SYS_HAS_CPU_LOONGSON64
1340d3bc81beSChristoph Hellwig	select ARCH_HAS_PHYS_TO_DMA
134151522217SJiaxun Yang	select CPU_MIPSR2
134251522217SJiaxun Yang	select CPU_HAS_PREFETCH
13430e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
13440e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
13450e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
13467507445bSHuacai Chen	select CPU_SUPPORTS_MSA
134751522217SJiaxun Yang	select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
134851522217SJiaxun Yang	select CPU_MIPSR2_IRQ_VI
13490e476d91SHuacai Chen	select WEAK_ORDERING
13500e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
13517507445bSHuacai Chen	select MIPS_ASID_BITS_VARIABLE
1352b2edcfc8SHuacai Chen	select MIPS_PGD_C0_CONTEXT
135317c99d94SHuacai Chen	select MIPS_L1_CACHE_SHIFT_6
1354d30a2b47SLinus Walleij	select GPIOLIB
135509230cbcSChristoph Hellwig	select SWIOTLB
13560f78355cSHuacai Chen	select HAVE_KVM
13570e476d91SHuacai Chen	help
1358caed1d1bSHuacai Chen		The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1359caed1d1bSHuacai Chen		cores implements the MIPS64R2 instruction set with many extensions,
1360caed1d1bSHuacai Chen		including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1361caed1d1bSHuacai Chen		3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1362caed1d1bSHuacai Chen		Loongson-2E/2F is not covered here and will be removed in future.
13630e476d91SHuacai Chen
1364caed1d1bSHuacai Chenconfig LOONGSON3_ENHANCEMENT
1365caed1d1bSHuacai Chen	bool "New Loongson-3 CPU Enhancements"
13661e820da3SHuacai Chen	default n
1367268a2d60SJiaxun Yang	depends on CPU_LOONGSON64
13681e820da3SHuacai Chen	help
1369caed1d1bSHuacai Chen	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
13701e820da3SHuacai Chen	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1371268a2d60SJiaxun Yang	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
13721e820da3SHuacai Chen	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
13731e820da3SHuacai Chen	  Fast TLB refill support, etc.
13741e820da3SHuacai Chen
13751e820da3SHuacai Chen	  This option enable those enhancements which are not probed at run
13761e820da3SHuacai Chen	  time. If you want a generic kernel to run on all Loongson 3 machines,
13771e820da3SHuacai Chen	  please say 'N' here. If you want a high-performance kernel to run on
1378caed1d1bSHuacai Chen	  new Loongson-3 machines only, please say 'Y' here.
13791e820da3SHuacai Chen
1380e02e07e3SHuacai Chenconfig CPU_LOONGSON3_WORKAROUNDS
1381caed1d1bSHuacai Chen	bool "Old Loongson-3 LLSC Workarounds"
1382e02e07e3SHuacai Chen	default y if SMP
1383268a2d60SJiaxun Yang	depends on CPU_LOONGSON64
1384e02e07e3SHuacai Chen	help
1385caed1d1bSHuacai Chen	  Loongson-3 processors have the llsc issues which require workarounds.
1386e02e07e3SHuacai Chen	  Without workarounds the system may hang unexpectedly.
1387e02e07e3SHuacai Chen
1388caed1d1bSHuacai Chen	  Newer Loongson-3 will fix these issues and no workarounds are needed.
1389e02e07e3SHuacai Chen	  The workarounds have no significant side effect on them but may
1390e02e07e3SHuacai Chen	  decrease the performance of the system so this option should be
1391e02e07e3SHuacai Chen	  disabled unless the kernel is intended to be run on old systems.
1392e02e07e3SHuacai Chen
1393e02e07e3SHuacai Chen	  If unsure, please say Y.
1394e02e07e3SHuacai Chen
1395ec7a9318SWANG Xueruiconfig CPU_LOONGSON3_CPUCFG_EMULATION
1396ec7a9318SWANG Xuerui	bool "Emulate the CPUCFG instruction on older Loongson cores"
1397ec7a9318SWANG Xuerui	default y
1398ec7a9318SWANG Xuerui	depends on CPU_LOONGSON64
1399ec7a9318SWANG Xuerui	help
1400ec7a9318SWANG Xuerui	  Loongson-3A R4 and newer have the CPUCFG instruction available for
1401ec7a9318SWANG Xuerui	  userland to query CPU capabilities, much like CPUID on x86. This
1402ec7a9318SWANG Xuerui	  option provides emulation of the instruction on older Loongson
1403ec7a9318SWANG Xuerui	  cores, back to Loongson-3A1000.
1404ec7a9318SWANG Xuerui
1405ec7a9318SWANG Xuerui	  If unsure, please say Y.
1406ec7a9318SWANG Xuerui
14073702bba5SWu Zhangjinconfig CPU_LOONGSON2E
14083702bba5SWu Zhangjin	bool "Loongson 2E"
14093702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
1410268a2d60SJiaxun Yang	select CPU_LOONGSON2EF
14112a21c730SFuxin Zhang	help
14122a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
14132a21c730SFuxin Zhang	  with many extensions.
14142a21c730SFuxin Zhang
141525985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
14166f7a251aSWu Zhangjin	  bonito64.
14176f7a251aSWu Zhangjin
14186f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
14196f7a251aSWu Zhangjin	bool "Loongson 2F"
14206f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
1421268a2d60SJiaxun Yang	select CPU_LOONGSON2EF
1422d30a2b47SLinus Walleij	select GPIOLIB
14236f7a251aSWu Zhangjin	help
14246f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
14256f7a251aSWu Zhangjin	  with many extensions.
14266f7a251aSWu Zhangjin
14276f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
14286f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
14296f7a251aSWu Zhangjin	  Loongson2E.
14306f7a251aSWu Zhangjin
1431ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1432ca585cf9SKelvin Cheung	bool "Loongson 1B"
1433ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1434b2afb64cSHuacai Chen	select CPU_LOONGSON32
14359ec88b60SKelvin Cheung	select LEDS_GPIO_REGISTER
1436ca585cf9SKelvin Cheung	help
1437ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1438968dc5a0S谢致邦 (XIE Zhibang)	  Release 1 instruction set and part of the MIPS32 Release 2
1439968dc5a0S谢致邦 (XIE Zhibang)	  instruction set.
1440ca585cf9SKelvin Cheung
144112e3280bSYang Lingconfig CPU_LOONGSON1C
144212e3280bSYang Ling	bool "Loongson 1C"
144312e3280bSYang Ling	depends on SYS_HAS_CPU_LOONGSON1C
1444b2afb64cSHuacai Chen	select CPU_LOONGSON32
144512e3280bSYang Ling	select LEDS_GPIO_REGISTER
144612e3280bSYang Ling	help
144712e3280bSYang Ling	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1448968dc5a0S谢致邦 (XIE Zhibang)	  Release 1 instruction set and part of the MIPS32 Release 2
1449968dc5a0S谢致邦 (XIE Zhibang)	  instruction set.
145012e3280bSYang Ling
14516e760c8dSRalf Baechleconfig CPU_MIPS32_R1
14526e760c8dSRalf Baechle	bool "MIPS32 Release 1"
14537cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
14546e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1455797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1456ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14576e760c8dSRalf Baechle	help
14585e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
14591e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
14601e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
14611e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
14621e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
14631e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
14641e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
14651e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
14661e5f1caaSRalf Baechle	  performance.
14671e5f1caaSRalf Baechle
14681e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
14691e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
14707cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
14711e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1472797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1473ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1474a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14752235a54dSSanjay Lal	select HAVE_KVM
14761e5f1caaSRalf Baechle	help
14775e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14786e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
14796e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
14806e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14816e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
14821da177e4SLinus Torvalds
1483ab7c01fdSSerge Seminconfig CPU_MIPS32_R5
1484ab7c01fdSSerge Semin	bool "MIPS32 Release 5"
1485ab7c01fdSSerge Semin	depends on SYS_HAS_CPU_MIPS32_R5
1486ab7c01fdSSerge Semin	select CPU_HAS_PREFETCH
1487ab7c01fdSSerge Semin	select CPU_SUPPORTS_32BIT_KERNEL
1488ab7c01fdSSerge Semin	select CPU_SUPPORTS_HIGHMEM
1489ab7c01fdSSerge Semin	select CPU_SUPPORTS_MSA
1490ab7c01fdSSerge Semin	select HAVE_KVM
1491ab7c01fdSSerge Semin	select MIPS_O32_FP64_SUPPORT
1492ab7c01fdSSerge Semin	help
1493ab7c01fdSSerge Semin	  Choose this option to build a kernel for release 5 or later of the
1494ab7c01fdSSerge Semin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1495ab7c01fdSSerge Semin	  family, are based on a MIPS32r5 processor. If you own an older
1496ab7c01fdSSerge Semin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1497ab7c01fdSSerge Semin
14987fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
1499674d10e2SMarkos Chandras	bool "MIPS32 Release 6"
15007fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
15017fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
150218d84e2eSAlexander Lobakin	select CPU_NO_LOAD_STORE_LR
15037fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
15047fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
15057fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
15067fd08ca5SLeonid Yegoshin	select HAVE_KVM
15077fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
15087fd08ca5SLeonid Yegoshin	help
15097fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
15107fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
15117fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
15127fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
15137fd08ca5SLeonid Yegoshin
15146e760c8dSRalf Baechleconfig CPU_MIPS64_R1
15156e760c8dSRalf Baechle	bool "MIPS64 Release 1"
15167cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1517797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1518ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1519ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1520ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
15219cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
15226e760c8dSRalf Baechle	help
15236e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
15246e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
15256e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
15266e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
15276e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
15281e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
15291e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
15301e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
15311e5f1caaSRalf Baechle	  performance.
15321e5f1caaSRalf Baechle
15331e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
15341e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
15357cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1536797798c1SRalf Baechle	select CPU_HAS_PREFETCH
15371e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
15381e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1539ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
15409cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1541a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
154240a2df49SJames Hogan	select HAVE_KVM
15431e5f1caaSRalf Baechle	help
15441e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
15451e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
15461e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
15471e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
15481e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
15491da177e4SLinus Torvalds
1550ab7c01fdSSerge Seminconfig CPU_MIPS64_R5
1551ab7c01fdSSerge Semin	bool "MIPS64 Release 5"
1552ab7c01fdSSerge Semin	depends on SYS_HAS_CPU_MIPS64_R5
1553ab7c01fdSSerge Semin	select CPU_HAS_PREFETCH
1554ab7c01fdSSerge Semin	select CPU_SUPPORTS_32BIT_KERNEL
1555ab7c01fdSSerge Semin	select CPU_SUPPORTS_64BIT_KERNEL
1556ab7c01fdSSerge Semin	select CPU_SUPPORTS_HIGHMEM
1557ab7c01fdSSerge Semin	select CPU_SUPPORTS_HUGEPAGES
1558ab7c01fdSSerge Semin	select CPU_SUPPORTS_MSA
1559ab7c01fdSSerge Semin	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1560ab7c01fdSSerge Semin	select HAVE_KVM
1561ab7c01fdSSerge Semin	help
1562ab7c01fdSSerge Semin	  Choose this option to build a kernel for release 5 or later of the
1563ab7c01fdSSerge Semin	  MIPS64 architecture.  This is a intermediate MIPS architecture
1564ab7c01fdSSerge Semin	  release partly implementing release 6 features. Though there is no
1565ab7c01fdSSerge Semin	  any hardware known to be based on this release.
1566ab7c01fdSSerge Semin
15677fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
1568674d10e2SMarkos Chandras	bool "MIPS64 Release 6"
15697fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
15707fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
157118d84e2eSAlexander Lobakin	select CPU_NO_LOAD_STORE_LR
15727fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
15737fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
15747fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
1575afd375dcSPaul Burton	select CPU_SUPPORTS_HUGEPAGES
15767fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
15772e6c7747SJames Hogan	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
157840a2df49SJames Hogan	select HAVE_KVM
15797fd08ca5SLeonid Yegoshin	help
15807fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
15817fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
15827fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
15837fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
15847fd08ca5SLeonid Yegoshin
1585281e3aeaSSerge Seminconfig CPU_P5600
1586281e3aeaSSerge Semin	bool "MIPS Warrior P5600"
1587281e3aeaSSerge Semin	depends on SYS_HAS_CPU_P5600
1588281e3aeaSSerge Semin	select CPU_HAS_PREFETCH
1589281e3aeaSSerge Semin	select CPU_SUPPORTS_32BIT_KERNEL
1590281e3aeaSSerge Semin	select CPU_SUPPORTS_HIGHMEM
1591281e3aeaSSerge Semin	select CPU_SUPPORTS_MSA
1592281e3aeaSSerge Semin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
1593281e3aeaSSerge Semin	select CPU_SUPPORTS_CPUFREQ
1594281e3aeaSSerge Semin	select CPU_MIPSR2_IRQ_VI
1595281e3aeaSSerge Semin	select CPU_MIPSR2_IRQ_EI
1596281e3aeaSSerge Semin	select HAVE_KVM
1597281e3aeaSSerge Semin	select MIPS_O32_FP64_SUPPORT
1598281e3aeaSSerge Semin	help
1599281e3aeaSSerge Semin	  Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1600281e3aeaSSerge Semin	  It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1601281e3aeaSSerge Semin	  MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1602281e3aeaSSerge Semin	  level features like up to six P5600 calculation cores, CM2 with L2
1603281e3aeaSSerge Semin	  cache, IOCU/IOMMU (though might be unused depending on the system-
1604281e3aeaSSerge Semin	  specific IP core configuration), GIC, CPC, virtualisation module,
1605281e3aeaSSerge Semin	  eJTAG and PDtrace.
1606281e3aeaSSerge Semin
16071da177e4SLinus Torvaldsconfig CPU_R3000
16081da177e4SLinus Torvalds	bool "R3000"
16097cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1610f7062ddbSRalf Baechle	select CPU_HAS_WB
161154746829SPaul Burton	select CPU_R3K_TLB
1612ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1613797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
16141da177e4SLinus Torvalds	help
16151da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
16161da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
16171da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
16181da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
16191da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
16201da177e4SLinus Torvalds	  try to recompile with R3000.
16211da177e4SLinus Torvalds
16221da177e4SLinus Torvaldsconfig CPU_TX39XX
16231da177e4SLinus Torvalds	bool "R39XX"
16247cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1625ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
162654746829SPaul Burton	select CPU_R3K_TLB
16271da177e4SLinus Torvalds
16281da177e4SLinus Torvaldsconfig CPU_VR41XX
16291da177e4SLinus Torvalds	bool "R41xx"
16307cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1631ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1632ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
16331da177e4SLinus Torvalds	help
16345e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
16351da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
16361da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
16371da177e4SLinus Torvalds	  processor or vice versa.
16381da177e4SLinus Torvalds
16391da177e4SLinus Torvaldsconfig CPU_R4X00
16401da177e4SLinus Torvalds	bool "R4x00"
16417cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1642ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1643ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1644970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16451da177e4SLinus Torvalds	help
16461da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
16471da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
16481da177e4SLinus Torvalds
16491da177e4SLinus Torvaldsconfig CPU_TX49XX
16501da177e4SLinus Torvalds	bool "R49XX"
16517cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1652de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1653ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1654ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1655970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16561da177e4SLinus Torvalds
16571da177e4SLinus Torvaldsconfig CPU_R5000
16581da177e4SLinus Torvalds	bool "R5000"
16597cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1660ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1661ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1662970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16631da177e4SLinus Torvalds	help
16641da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
16651da177e4SLinus Torvalds
1666542c1020SShinya Kuribayashiconfig CPU_R5500
1667542c1020SShinya Kuribayashi	bool "R5500"
1668542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1669542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1670542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
16719cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1672542c1020SShinya Kuribayashi	help
1673542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1674542c1020SShinya Kuribayashi	  instruction set.
1675542c1020SShinya Kuribayashi
16761da177e4SLinus Torvaldsconfig CPU_NEVADA
16771da177e4SLinus Torvalds	bool "RM52xx"
16787cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1679ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1680ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1681970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16821da177e4SLinus Torvalds	help
16831da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
16841da177e4SLinus Torvalds
16851da177e4SLinus Torvaldsconfig CPU_R10000
16861da177e4SLinus Torvalds	bool "R10000"
16877cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
16885e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1689ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1690ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1691797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1692970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16931da177e4SLinus Torvalds	help
16941da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
16951da177e4SLinus Torvalds
16961da177e4SLinus Torvaldsconfig CPU_RM7000
16971da177e4SLinus Torvalds	bool "RM7000"
16987cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
16995e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1700ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1701ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1702797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1703970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17041da177e4SLinus Torvalds
17051da177e4SLinus Torvaldsconfig CPU_SB1
17061da177e4SLinus Torvalds	bool "SB1"
17077cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1708ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1709ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1710797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1711970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17120004a9dfSRalf Baechle	select WEAK_ORDERING
17131da177e4SLinus Torvalds
1714a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1715a86c7f72SDavid Daney	bool "Cavium Octeon processor"
17165e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1717a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1718a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1719a86c7f72SDavid Daney	select WEAK_ORDERING
1720a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
17219cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1722df115f3eSBen Hutchings	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1723df115f3eSBen Hutchings	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1724930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
17250ae3abcdSJames Hogan	select HAVE_KVM
1726a86c7f72SDavid Daney	help
1727a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1728a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1729a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1730a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1731a86c7f72SDavid Daney
1732cd746249SJonas Gorskiconfig CPU_BMIPS
1733cd746249SJonas Gorski	bool "Broadcom BMIPS"
1734cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1735cd746249SJonas Gorski	select CPU_MIPS32
1736fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1737cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1738cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1739cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1740cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1741cd746249SJonas Gorski	select DMA_NONCOHERENT
174267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1743cd746249SJonas Gorski	select SWAP_IO_SPACE
1744cd746249SJonas Gorski	select WEAK_ORDERING
1745c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
174669aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1747a8d709b0SMarkus Mayer	select CPU_SUPPORTS_CPUFREQ
1748a8d709b0SMarkus Mayer	select MIPS_EXTERNAL_TIMER
1749c1c0c461SKevin Cernekee	help
1750fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1751c1c0c461SKevin Cernekee
17527f058e85SJayachandran Cconfig CPU_XLR
17537f058e85SJayachandran C	bool "Netlogic XLR SoC"
17547f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
17557f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
17567f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
17577f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1758970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17597f058e85SJayachandran C	select WEAK_ORDERING
17607f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
17617f058e85SJayachandran C	help
17627f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
17631c773ea4SJayachandran C
17641c773ea4SJayachandran Cconfig CPU_XLP
17651c773ea4SJayachandran C	bool "Netlogic XLP SoC"
17661c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
17671c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
17681c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
17691c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
17701c773ea4SJayachandran C	select WEAK_ORDERING
17711c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
17721c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1773d6504846SJayachandran C	select CPU_MIPSR2
1774ddba6833SPrem Mallappa	select CPU_SUPPORTS_HUGEPAGES
17752db003a5SPaul Burton	select MIPS_ASID_BITS_VARIABLE
17761c773ea4SJayachandran C	help
17771c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
17781da177e4SLinus Torvaldsendchoice
17791da177e4SLinus Torvalds
1780a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1781a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1782a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
1783281e3aeaSSerge Semin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1784281e3aeaSSerge Semin		   CPU_P5600
1785a6e18781SLeonid Yegoshin	help
1786a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1787a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1788a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1789a6e18781SLeonid Yegoshin
1790a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1791a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1792a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1793a6e18781SLeonid Yegoshin	select EVA
1794a6e18781SLeonid Yegoshin	default y
1795a6e18781SLeonid Yegoshin	help
1796a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1797a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1798a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1799a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1800a6e18781SLeonid Yegoshin
1801c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES
1802c5b36783SSteven J. Hill	bool "MIPS32 Release 5 Features"
1803c5b36783SSteven J. Hill	depends on SYS_HAS_CPU_MIPS32_R5
1804281e3aeaSSerge Semin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1805c5b36783SSteven J. Hill	help
1806c5b36783SSteven J. Hill	  Choose this option to build a kernel for release 2 or later of the
1807c5b36783SSteven J. Hill	  MIPS32 architecture including features from release 5 such as
1808c5b36783SSteven J. Hill	  support for Extended Physical Addressing (XPA).
1809c5b36783SSteven J. Hill
1810c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA
1811c5b36783SSteven J. Hill	bool "Extended Physical Addressing (XPA)"
1812c5b36783SSteven J. Hill	depends on CPU_MIPS32_R5_FEATURES
1813c5b36783SSteven J. Hill	depends on !EVA
1814c5b36783SSteven J. Hill	depends on !PAGE_SIZE_4KB
1815c5b36783SSteven J. Hill	depends on SYS_SUPPORTS_HIGHMEM
1816c5b36783SSteven J. Hill	select XPA
1817c5b36783SSteven J. Hill	select HIGHMEM
1818d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
1819c5b36783SSteven J. Hill	default n
1820c5b36783SSteven J. Hill	help
1821c5b36783SSteven J. Hill	  Choose this option if you want to enable the Extended Physical
1822c5b36783SSteven J. Hill	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1823c5b36783SSteven J. Hill	  benefit is to increase physical addressing equal to or greater
1824c5b36783SSteven J. Hill	  than 40 bits. Note that this has the side effect of turning on
1825c5b36783SSteven J. Hill	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1826c5b36783SSteven J. Hill	  If unsure, say 'N' here.
1827c5b36783SSteven J. Hill
1828622844bfSWu Zhangjinif CPU_LOONGSON2F
1829622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1830622844bfSWu Zhangjin	bool
1831622844bfSWu Zhangjin
1832622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1833622844bfSWu Zhangjin	bool
1834622844bfSWu Zhangjin
1835622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1836622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1837622844bfSWu Zhangjin	default y
1838622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1839622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1840622844bfSWu Zhangjin	help
1841622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1842622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1843622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1844622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1845622844bfSWu Zhangjin
1846622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1847622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1848622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1849622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1850622844bfSWu Zhangjin	  systems.
1851622844bfSWu Zhangjin
1852622844bfSWu Zhangjin	  If unsure, please say Y.
1853622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1854622844bfSWu Zhangjin
18551b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
18561b93b3c3SWu Zhangjin	bool
18571b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
18581b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
185931c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
18601b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1861fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
18624e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
1863*a510b616SPaul Cercueil	select HAVE_KERNEL_ZSTD
18641b93b3c3SWu Zhangjin
18651b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
18661b93b3c3SWu Zhangjin	bool
18671b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
18681b93b3c3SWu Zhangjin
1869dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM
1870dbb98314SAlban Bedel	bool
1871dbb98314SAlban Bedel	select SYS_SUPPORTS_ZBOOT
1872dbb98314SAlban Bedel
1873268a2d60SJiaxun Yangconfig CPU_LOONGSON2EF
18743702bba5SWu Zhangjin	bool
18753702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
18763702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
18773702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1878970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
1879e905086eSChristoph Hellwig	select ARCH_HAS_PHYS_TO_DMA
18803702bba5SWu Zhangjin
1881b2afb64cSHuacai Chenconfig CPU_LOONGSON32
1882ca585cf9SKelvin Cheung	bool
1883ca585cf9SKelvin Cheung	select CPU_MIPS32
18847e280f6bSJiaxun Yang	select CPU_MIPSR2
1885ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1886ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1887ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1888f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1889ca585cf9SKelvin Cheung
1890fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
189104fa8bf7SJonas Gorski	select SMP_UP if SMP
18921bbb6c1bSKevin Cernekee	bool
1893cd746249SJonas Gorski
1894cd746249SJonas Gorskiconfig CPU_BMIPS4350
1895cd746249SJonas Gorski	bool
1896cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1897cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1898cd746249SJonas Gorski
1899cd746249SJonas Gorskiconfig CPU_BMIPS4380
1900cd746249SJonas Gorski	bool
1901bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1902cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1903cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1904b4720809SFlorian Fainelli	select CPU_HAS_RIXI
1905cd746249SJonas Gorski
1906cd746249SJonas Gorskiconfig CPU_BMIPS5000
1907cd746249SJonas Gorski	bool
1908cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1909bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1910cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1911cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1912b4720809SFlorian Fainelli	select CPU_HAS_RIXI
19131bbb6c1bSKevin Cernekee
1914268a2d60SJiaxun Yangconfig SYS_HAS_CPU_LOONGSON64
19150e476d91SHuacai Chen	bool
19160e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
1917b2edcfc8SHuacai Chen	select CPU_HAS_RIXI
19180e476d91SHuacai Chen
19193702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
19202a21c730SFuxin Zhang	bool
19212a21c730SFuxin Zhang
19226f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
19236f7a251aSWu Zhangjin	bool
192455045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
192555045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
19266f7a251aSWu Zhangjin
1927ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1928ca585cf9SKelvin Cheung	bool
1929ca585cf9SKelvin Cheung
193012e3280bSYang Lingconfig SYS_HAS_CPU_LOONGSON1C
193112e3280bSYang Ling	bool
193212e3280bSYang Ling
19337cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
19347cf8053bSRalf Baechle	bool
19357cf8053bSRalf Baechle
19367cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
19377cf8053bSRalf Baechle	bool
19387cf8053bSRalf Baechle
1939a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1940a6e18781SLeonid Yegoshin	bool
1941a6e18781SLeonid Yegoshin
1942c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5
1943c5b36783SSteven J. Hill	bool
19449ae1f262SPaul Burton	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1945c5b36783SSteven J. Hill
19467fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
19477fd08ca5SLeonid Yegoshin	bool
19489ae1f262SPaul Burton	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
19497fd08ca5SLeonid Yegoshin
19507cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
19517cf8053bSRalf Baechle	bool
19527cf8053bSRalf Baechle
19537cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
19547cf8053bSRalf Baechle	bool
19557cf8053bSRalf Baechle
19567fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
19577fd08ca5SLeonid Yegoshin	bool
19589ae1f262SPaul Burton	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
19597fd08ca5SLeonid Yegoshin
1960281e3aeaSSerge Seminconfig SYS_HAS_CPU_P5600
1961281e3aeaSSerge Semin	bool
1962281e3aeaSSerge Semin	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1963281e3aeaSSerge Semin
19647cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
19657cf8053bSRalf Baechle	bool
19667cf8053bSRalf Baechle
19677cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
19687cf8053bSRalf Baechle	bool
19697cf8053bSRalf Baechle
19707cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
19717cf8053bSRalf Baechle	bool
19727cf8053bSRalf Baechle
19737cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
19747cf8053bSRalf Baechle	bool
19757cf8053bSRalf Baechle
19767cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
19777cf8053bSRalf Baechle	bool
19787cf8053bSRalf Baechle
19797cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
19807cf8053bSRalf Baechle	bool
19817cf8053bSRalf Baechle
1982542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1983542c1020SShinya Kuribayashi	bool
1984542c1020SShinya Kuribayashi
19857cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
19867cf8053bSRalf Baechle	bool
19877cf8053bSRalf Baechle
19887cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
19897cf8053bSRalf Baechle	bool
19909ae1f262SPaul Burton	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
19917cf8053bSRalf Baechle
19927cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
19937cf8053bSRalf Baechle	bool
19947cf8053bSRalf Baechle
19957cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
19967cf8053bSRalf Baechle	bool
19977cf8053bSRalf Baechle
19985e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
19995e683389SDavid Daney	bool
20005e683389SDavid Daney
2001cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
2002c1c0c461SKevin Cernekee	bool
2003c1c0c461SKevin Cernekee
2004fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
2005c1c0c461SKevin Cernekee	bool
2006cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
2007c1c0c461SKevin Cernekee
2008c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
2009c1c0c461SKevin Cernekee	bool
2010cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
2011c1c0c461SKevin Cernekee
2012c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
2013c1c0c461SKevin Cernekee	bool
2014cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
2015c1c0c461SKevin Cernekee
2016c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
2017c1c0c461SKevin Cernekee	bool
2018cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
2019f263f2a2SHauke Mehrtens	select ARCH_HAS_SYNC_DMA_FOR_CPU
2020c1c0c461SKevin Cernekee
20217f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
20227f058e85SJayachandran C	bool
20237f058e85SJayachandran C
20241c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
20251c773ea4SJayachandran C	bool
20261c773ea4SJayachandran C
202717099b11SRalf Baechle#
202817099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
202917099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
203017099b11SRalf Baechle#
20310004a9dfSRalf Baechleconfig WEAK_ORDERING
20320004a9dfSRalf Baechle	bool
203317099b11SRalf Baechle
203417099b11SRalf Baechle#
203517099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
203617099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
203717099b11SRalf Baechle#
203817099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
203917099b11SRalf Baechle	bool
20405e83d430SRalf Baechleendmenu
20415e83d430SRalf Baechle
20425e83d430SRalf Baechle#
20435e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
20445e83d430SRalf Baechle#
20455e83d430SRalf Baechleconfig CPU_MIPS32
20465e83d430SRalf Baechle	bool
2047ab7c01fdSSerge Semin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2048281e3aeaSSerge Semin		     CPU_MIPS32_R6 || CPU_P5600
20495e83d430SRalf Baechle
20505e83d430SRalf Baechleconfig CPU_MIPS64
20515e83d430SRalf Baechle	bool
2052ab7c01fdSSerge Semin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2053ab7c01fdSSerge Semin		     CPU_MIPS64_R6
20545e83d430SRalf Baechle
20555e83d430SRalf Baechle#
205657eeacedSPaul Burton# These indicate the revision of the architecture
20575e83d430SRalf Baechle#
20585e83d430SRalf Baechleconfig CPU_MIPSR1
20595e83d430SRalf Baechle	bool
20605e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
20615e83d430SRalf Baechle
20625e83d430SRalf Baechleconfig CPU_MIPSR2
20635e83d430SRalf Baechle	bool
2064a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
20658256b17eSFlorian Fainelli	select CPU_HAS_RIXI
2066ba9196d2SJiaxun Yang	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2067a7e07b1aSMarkos Chandras	select MIPS_SPRAM
20685e83d430SRalf Baechle
2069ab7c01fdSSerge Seminconfig CPU_MIPSR5
2070ab7c01fdSSerge Semin	bool
2071281e3aeaSSerge Semin	default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2072ab7c01fdSSerge Semin	select CPU_HAS_RIXI
2073ab7c01fdSSerge Semin	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2074ab7c01fdSSerge Semin	select MIPS_SPRAM
2075ab7c01fdSSerge Semin
20767fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
20777fd08ca5SLeonid Yegoshin	bool
20787fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
20798256b17eSFlorian Fainelli	select CPU_HAS_RIXI
2080ba9196d2SJiaxun Yang	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
208187321fddSPaul Burton	select HAVE_ARCH_BITREVERSE
20822db003a5SPaul Burton	select MIPS_ASID_BITS_VARIABLE
20834a5dc51eSMarcin Nowakowski	select MIPS_CRC_SUPPORT
2084a7e07b1aSMarkos Chandras	select MIPS_SPRAM
20855e83d430SRalf Baechle
208657eeacedSPaul Burtonconfig TARGET_ISA_REV
208757eeacedSPaul Burton	int
208857eeacedSPaul Burton	default 1 if CPU_MIPSR1
208957eeacedSPaul Burton	default 2 if CPU_MIPSR2
2090ab7c01fdSSerge Semin	default 5 if CPU_MIPSR5
209157eeacedSPaul Burton	default 6 if CPU_MIPSR6
209257eeacedSPaul Burton	default 0
209357eeacedSPaul Burton	help
209457eeacedSPaul Burton	  Reflects the ISA revision being targeted by the kernel build. This
209557eeacedSPaul Burton	  is effectively the Kconfig equivalent of MIPS_ISA_REV.
209657eeacedSPaul Burton
2097a6e18781SLeonid Yegoshinconfig EVA
2098a6e18781SLeonid Yegoshin	bool
2099a6e18781SLeonid Yegoshin
2100c5b36783SSteven J. Hillconfig XPA
2101c5b36783SSteven J. Hill	bool
2102c5b36783SSteven J. Hill
21035e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
21045e83d430SRalf Baechle	bool
21055e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
21065e83d430SRalf Baechle	bool
21075e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
21085e83d430SRalf Baechle	bool
21095e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
21105e83d430SRalf Baechle	bool
211155045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
211255045ff5SWu Zhangjin	bool
211355045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
211455045ff5SWu Zhangjin	bool
21159cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
21169cffd154SDavid Daney	bool
2117171543e7SDaniel Silsby	depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
211882622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
211982622284SDavid Daney	bool
2120cebf8c0fSPaul Burton	default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
21215e83d430SRalf Baechle
21228192c9eaSDavid Daney#
21238192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
21248192c9eaSDavid Daney#
21258192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
21268192c9eaSDavid Daney	bool
2127679eb637SJames Hogan	default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
21288192c9eaSDavid Daney
21295e83d430SRalf Baechlemenu "Kernel type"
21305e83d430SRalf Baechle
21315e83d430SRalf Baechlechoice
21325e83d430SRalf Baechle	prompt "Kernel code model"
21335e83d430SRalf Baechle	help
21345e83d430SRalf Baechle	  You should only select this option if you have a workload that
21355e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
21365e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
21375e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
21385e83d430SRalf Baechle
21395e83d430SRalf Baechleconfig 32BIT
21405e83d430SRalf Baechle	bool "32-bit kernel"
21415e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
21425e83d430SRalf Baechle	select TRAD_SIGNALS
21435e83d430SRalf Baechle	help
21445e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
2145f17c4ca3SRalf Baechle
21465e83d430SRalf Baechleconfig 64BIT
21475e83d430SRalf Baechle	bool "64-bit kernel"
21485e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
21495e83d430SRalf Baechle	help
21505e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
21515e83d430SRalf Baechle
21525e83d430SRalf Baechleendchoice
21535e83d430SRalf Baechle
21542235a54dSSanjay Lalconfig KVM_GUEST
21552235a54dSSanjay Lal	bool "KVM Guest Kernel"
215601edc5e7SJiaxun Yang	depends on CPU_MIPS32_R2
2157f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
21582235a54dSSanjay Lal	help
2159caa1faa7SJames Hogan	  Select this option if building a guest kernel for KVM (Trap & Emulate)
2160caa1faa7SJames Hogan	  mode.
21612235a54dSSanjay Lal
2162eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
2163eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
21642235a54dSSanjay Lal	depends on KVM_GUEST
2165eda3d33cSJames Hogan	default 100
21662235a54dSSanjay Lal	help
2167eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
2168eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
2169eda3d33cSJames Hogan	  timer frequency is specified directly.
21702235a54dSSanjay Lal
21711e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48
21721e321fa9SLeonid Yegoshin	bool "48 bits virtual memory"
21731e321fa9SLeonid Yegoshin	depends on 64BIT
21741e321fa9SLeonid Yegoshin	help
21753377e227SAlex Belits	  Support a maximum at least 48 bits of application virtual
21763377e227SAlex Belits	  memory.  Default is 40 bits or less, depending on the CPU.
21773377e227SAlex Belits	  For page sizes 16k and above, this option results in a small
21783377e227SAlex Belits	  memory overhead for page tables.  For 4k page size, a fourth
21793377e227SAlex Belits	  level of page tables is added which imposes both a memory
21803377e227SAlex Belits	  overhead as well as slower TLB fault handling.
21813377e227SAlex Belits
21821e321fa9SLeonid Yegoshin	  If unsure, say N.
21831e321fa9SLeonid Yegoshin
21841da177e4SLinus Torvaldschoice
21851da177e4SLinus Torvalds	prompt "Kernel page size"
21861da177e4SLinus Torvalds	default PAGE_SIZE_4KB
21871da177e4SLinus Torvalds
21881da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
21891da177e4SLinus Torvalds	bool "4kB"
2190268a2d60SJiaxun Yang	depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
21911da177e4SLinus Torvalds	help
21921da177e4SLinus Torvalds	  This option select the standard 4kB Linux page size.  On some
21931da177e4SLinus Torvalds	  R3000-family processors this is the only available page size.  Using
21941da177e4SLinus Torvalds	  4kB page size will minimize memory consumption and is therefore
21951da177e4SLinus Torvalds	  recommended for low memory systems.
21961da177e4SLinus Torvalds
21971da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
21981da177e4SLinus Torvalds	bool "8kB"
2199c2aeaaeaSPaul Burton	depends on CPU_CAVIUM_OCTEON
22001e321fa9SLeonid Yegoshin	depends on !MIPS_VA_BITS_48
22011da177e4SLinus Torvalds	help
22021da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
22031da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
2204c2aeaaeaSPaul Burton	  only on cnMIPS processors.  Note that you will need a suitable Linux
2205c2aeaaeaSPaul Burton	  distribution to support this.
22061da177e4SLinus Torvalds
22071da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
22081da177e4SLinus Torvalds	bool "16kB"
2209714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
22101da177e4SLinus Torvalds	help
22111da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
22121da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
2213714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
2214714bfad6SRalf Baechle	  Linux distribution to support this.
22151da177e4SLinus Torvalds
2216c52399beSRalf Baechleconfig PAGE_SIZE_32KB
2217c52399beSRalf Baechle	bool "32kB"
2218c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
22191e321fa9SLeonid Yegoshin	depends on !MIPS_VA_BITS_48
2220c52399beSRalf Baechle	help
2221c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
2222c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
2223c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
2224c52399beSRalf Baechle	  distribution to support this.
2225c52399beSRalf Baechle
22261da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
22271da177e4SLinus Torvalds	bool "64kB"
22283b2db173SPaul Burton	depends on !CPU_R3000 && !CPU_TX39XX
22291da177e4SLinus Torvalds	help
22301da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
22311da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
22321da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
2233714bfad6SRalf Baechle	  writing this option is still high experimental.
22341da177e4SLinus Torvalds
22351da177e4SLinus Torvaldsendchoice
22361da177e4SLinus Torvalds
2237c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
2238c9bace7cSDavid Daney	int "Maximum zone order"
2239e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2240e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2241e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2242e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2243e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2244e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2245c9bace7cSDavid Daney	range 11 64
2246c9bace7cSDavid Daney	default "11"
2247c9bace7cSDavid Daney	help
2248c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
2249c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
2250c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
2251c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2252c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2253c9bace7cSDavid Daney	  increase this value.
2254c9bace7cSDavid Daney
2255c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2256c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2257c9bace7cSDavid Daney
2258c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2259c9bace7cSDavid Daney	  when choosing a value for this option.
2260c9bace7cSDavid Daney
22611da177e4SLinus Torvaldsconfig BOARD_SCACHE
22621da177e4SLinus Torvalds	bool
22631da177e4SLinus Torvalds
22641da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
22651da177e4SLinus Torvalds	bool
22661da177e4SLinus Torvalds	select BOARD_SCACHE
22671da177e4SLinus Torvalds
22689318c51aSChris Dearman#
22699318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
22709318c51aSChris Dearman#
22719318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
22729318c51aSChris Dearman	bool
22739318c51aSChris Dearman	select BOARD_SCACHE
22749318c51aSChris Dearman
22751da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
22761da177e4SLinus Torvalds	bool
22771da177e4SLinus Torvalds	select BOARD_SCACHE
22781da177e4SLinus Torvalds
22791da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
22801da177e4SLinus Torvalds	bool
22811da177e4SLinus Torvalds	select BOARD_SCACHE
22821da177e4SLinus Torvalds
22831da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
22841da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
22851da177e4SLinus Torvalds	depends on CPU_SB1
22861da177e4SLinus Torvalds	help
22871da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
22881da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
22891da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
22901da177e4SLinus Torvalds
22911da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2292c8094b53SRalf Baechle	bool
22931da177e4SLinus Torvalds
22943165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
22953165c846SFlorian Fainelli	bool
2296c2aeaaeaSPaul Burton	default y if !(CPU_R3000 || CPU_TX39XX)
22973165c846SFlorian Fainelli
2298c92e47e5SPaul Burtonconfig MIPS_FP_SUPPORT
2299183b40f9SPaul Burton	bool "Floating Point support" if EXPERT
2300183b40f9SPaul Burton	default y
2301183b40f9SPaul Burton	help
2302183b40f9SPaul Burton	  Select y to include support for floating point in the kernel
2303183b40f9SPaul Burton	  including initialization of FPU hardware, FP context save & restore
2304183b40f9SPaul Burton	  and emulation of an FPU where necessary. Without this support any
2305183b40f9SPaul Burton	  userland program attempting to use floating point instructions will
2306183b40f9SPaul Burton	  receive a SIGILL.
2307183b40f9SPaul Burton
2308183b40f9SPaul Burton	  If you know that your userland will not attempt to use floating point
2309183b40f9SPaul Burton	  instructions then you can say n here to shrink the kernel a little.
2310183b40f9SPaul Burton
2311183b40f9SPaul Burton	  If unsure, say y.
2312c92e47e5SPaul Burton
231397f7dcbfSPaul Burtonconfig CPU_R2300_FPU
231497f7dcbfSPaul Burton	bool
2315c92e47e5SPaul Burton	depends on MIPS_FP_SUPPORT
231697f7dcbfSPaul Burton	default y if CPU_R3000 || CPU_TX39XX
231797f7dcbfSPaul Burton
231854746829SPaul Burtonconfig CPU_R3K_TLB
231954746829SPaul Burton	bool
232054746829SPaul Burton
232191405eb6SFlorian Fainelliconfig CPU_R4K_FPU
232291405eb6SFlorian Fainelli	bool
2323c92e47e5SPaul Burton	depends on MIPS_FP_SUPPORT
232497f7dcbfSPaul Burton	default y if !CPU_R2300_FPU
232591405eb6SFlorian Fainelli
232662cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
232762cedc4fSFlorian Fainelli	bool
232854746829SPaul Burton	default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
232962cedc4fSFlorian Fainelli
233059d6ab86SRalf Baechleconfig MIPS_MT_SMP
2331a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
23325cbf9688SPaul Burton	default y
2333527f1028SPaul Burton	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
233459d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2335d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2336c080faa5SSteven J. Hill	select SYNC_R4K
233759d6ab86SRalf Baechle	select MIPS_MT
233859d6ab86SRalf Baechle	select SMP
233987353d8aSRalf Baechle	select SMP_UP
2340c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2341c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2342399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
234359d6ab86SRalf Baechle	help
2344c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2345c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2346c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2347c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2348c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
234959d6ab86SRalf Baechle
2350f41ae0b2SRalf Baechleconfig MIPS_MT
2351f41ae0b2SRalf Baechle	bool
2352f41ae0b2SRalf Baechle
23530ab7aefcSRalf Baechleconfig SCHED_SMT
23540ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
23550ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
23560ab7aefcSRalf Baechle	default n
23570ab7aefcSRalf Baechle	help
23580ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
23590ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
23600ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
23610ab7aefcSRalf Baechle
23620ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
23630ab7aefcSRalf Baechle	bool
23640ab7aefcSRalf Baechle
2365f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2366f41ae0b2SRalf Baechle	bool
2367f41ae0b2SRalf Baechle
2368f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2369f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2370f088fc84SRalf Baechle	default y
2371b633648cSRalf Baechle	depends on MIPS_MT_SMP
237207cc0c9eSRalf Baechle
2373b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2374b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
23759eaa9a82SPaul Burton	depends on CPU_MIPSR6
2376c92e47e5SPaul Burton	depends on MIPS_FP_SUPPORT
2377b0a668fbSLeonid Yegoshin	default y
2378b0a668fbSLeonid Yegoshin	help
2379b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2380b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
238107edf0d4SMarkos Chandras	  default. You can enable it using the 'mipsr2emu' kernel option.
2382b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2383b0a668fbSLeonid Yegoshin	  final kernel image.
2384b0a668fbSLeonid Yegoshin
2385f35764e7SJames Hoganconfig SYS_SUPPORTS_VPE_LOADER
2386f35764e7SJames Hogan	bool
2387f35764e7SJames Hogan	depends on SYS_SUPPORTS_MULTITHREADING
2388f35764e7SJames Hogan	help
2389f35764e7SJames Hogan	  Indicates that the platform supports the VPE loader, and provides
2390f35764e7SJames Hogan	  physical_memsize.
2391f35764e7SJames Hogan
239207cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
239307cc0c9eSRalf Baechle	bool "VPE loader support."
2394f35764e7SJames Hogan	depends on SYS_SUPPORTS_VPE_LOADER && MODULES
239507cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
239607cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
239707cc0c9eSRalf Baechle	select MIPS_MT
239807cc0c9eSRalf Baechle	help
239907cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
240007cc0c9eSRalf Baechle	  onto another VPE and running it.
2401f088fc84SRalf Baechle
240217a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
240317a1d523SDeng-Cheng Zhu	bool
240417a1d523SDeng-Cheng Zhu	default "y"
240517a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
240617a1d523SDeng-Cheng Zhu
24071a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
24081a2a6d7eSDeng-Cheng Zhu	bool
24091a2a6d7eSDeng-Cheng Zhu	default "y"
24101a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
24111a2a6d7eSDeng-Cheng Zhu
2412e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2413e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2414e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2415e01402b1SRalf Baechle	default y
2416e01402b1SRalf Baechle	help
2417e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2418e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2419e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2420e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2421e01402b1SRalf Baechle
2422e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2423e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2424e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2425e01402b1SRalf Baechle
2426da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2427da615cf6SDeng-Cheng Zhu	bool
2428da615cf6SDeng-Cheng Zhu	default "y"
2429da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2430da615cf6SDeng-Cheng Zhu
24312c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
24322c973ef0SDeng-Cheng Zhu	bool
24332c973ef0SDeng-Cheng Zhu	default "y"
24342c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
24352c973ef0SDeng-Cheng Zhu
24364a16ff4cSRalf Baechleconfig MIPS_CMP
24375cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
24385676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2439b10b43baSMarkos Chandras	select SMP
2440eb9b5141STim Anderson	select SYNC_R4K
2441b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
24424a16ff4cSRalf Baechle	select WEAK_ORDERING
24434a16ff4cSRalf Baechle	default n
24444a16ff4cSRalf Baechle	help
2445044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2446044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2447044505c7SPaul Burton	  its ability to start secondary CPUs.
24484a16ff4cSRalf Baechle
24495cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
24505cac93b3SPaul Burton	  instead of this.
24515cac93b3SPaul Burton
24520ee958e1SPaul Burtonconfig MIPS_CPS
24530ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
24545a3e7c02SPaul Burton	depends on SYS_SUPPORTS_MIPS_CPS
24550ee958e1SPaul Burton	select MIPS_CM
24561d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
24570ee958e1SPaul Burton	select SMP
24580ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
24591d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
2460c8b7712cSPaul Burton	select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
24610ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
24620ee958e1SPaul Burton	select WEAK_ORDERING
24630ee958e1SPaul Burton	help
24640ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
24650ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
24660ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
24670ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
24680ee958e1SPaul Burton	  support is unavailable.
24690ee958e1SPaul Burton
24703179d37eSPaul Burtonconfig MIPS_CPS_PM
247139a59593SMarkos Chandras	depends on MIPS_CPS
24723179d37eSPaul Burton	bool
24733179d37eSPaul Burton
24749f98f3ddSPaul Burtonconfig MIPS_CM
24759f98f3ddSPaul Burton	bool
24763c9b4166SPaul Burton	select MIPS_CPC
24779f98f3ddSPaul Burton
24789c38cf44SPaul Burtonconfig MIPS_CPC
24799c38cf44SPaul Burton	bool
24802600990eSRalf Baechle
24811da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
24821da177e4SLinus Torvalds	bool
24831da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
24841da177e4SLinus Torvalds	default y
24851da177e4SLinus Torvalds
24861da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
24871da177e4SLinus Torvalds	bool
24881da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
24891da177e4SLinus Torvalds	default y
24901da177e4SLinus Torvalds
24919e2b5372SMarkos Chandraschoice
24929e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
24939e2b5372SMarkos Chandras
24949e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
24959e2b5372SMarkos Chandras	bool "None"
24969e2b5372SMarkos Chandras	help
24979e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
24989e2b5372SMarkos Chandras
24999693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
25009693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
25019e2b5372SMarkos Chandras	bool "SmartMIPS"
25029693a853SFranck Bui-Huu	help
25039693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
25049693a853SFranck Bui-Huu	  increased security at both hardware and software level for
25059693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
25069693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
25079693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
25089693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
25099693a853SFranck Bui-Huu	  here.
25109693a853SFranck Bui-Huu
2511bce86083SSteven J. Hillconfig CPU_MICROMIPS
25127fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
25139e2b5372SMarkos Chandras	bool "microMIPS"
2514bce86083SSteven J. Hill	help
2515bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2516bce86083SSteven J. Hill	  microMIPS ISA
2517bce86083SSteven J. Hill
25189e2b5372SMarkos Chandrasendchoice
25199e2b5372SMarkos Chandras
2520a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
25210ce3417eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2522a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
2523c92e47e5SPaul Burton	depends on MIPS_FP_SUPPORT
25242a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2525a5e9a69eSPaul Burton	help
2526a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2527a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
25281db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
25291db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
25301db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
25311db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
25321db1af84SPaul Burton	  the size & complexity of your kernel.
2533a5e9a69eSPaul Burton
2534a5e9a69eSPaul Burton	  If unsure, say Y.
2535a5e9a69eSPaul Burton
25361da177e4SLinus Torvaldsconfig CPU_HAS_WB
2537f7062ddbSRalf Baechle	bool
2538e01402b1SRalf Baechle
2539df0ac8a4SKevin Cernekeeconfig XKS01
2540df0ac8a4SKevin Cernekee	bool
2541df0ac8a4SKevin Cernekee
2542ba9196d2SJiaxun Yangconfig CPU_HAS_DIEI
2543ba9196d2SJiaxun Yang	depends on !CPU_DIEI_BROKEN
2544ba9196d2SJiaxun Yang	bool
2545ba9196d2SJiaxun Yang
2546ba9196d2SJiaxun Yangconfig CPU_DIEI_BROKEN
2547ba9196d2SJiaxun Yang	bool
2548ba9196d2SJiaxun Yang
25498256b17eSFlorian Fainelliconfig CPU_HAS_RIXI
25508256b17eSFlorian Fainelli	bool
25518256b17eSFlorian Fainelli
255218d84e2eSAlexander Lobakinconfig CPU_NO_LOAD_STORE_LR
2553932afdeeSYasha Cherikovsky	bool
2554932afdeeSYasha Cherikovsky	help
255518d84e2eSAlexander Lobakin	  CPU lacks support for unaligned load and store instructions:
2556932afdeeSYasha Cherikovsky	  LWL, LWR, SWL, SWR (Load/store word left/right).
255718d84e2eSAlexander Lobakin	  LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
255818d84e2eSAlexander Lobakin	  systems).
2559932afdeeSYasha Cherikovsky
2560f41ae0b2SRalf Baechle#
2561f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2562f41ae0b2SRalf Baechle#
2563e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2564f41ae0b2SRalf Baechle	bool
2565e01402b1SRalf Baechle
2566f41ae0b2SRalf Baechle#
2567f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2568f41ae0b2SRalf Baechle#
2569e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2570f41ae0b2SRalf Baechle	bool
2571e01402b1SRalf Baechle
25721da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
25731da177e4SLinus Torvalds	bool
25741da177e4SLinus Torvalds	depends on !CPU_R3000
25751da177e4SLinus Torvalds	default y
25761da177e4SLinus Torvalds
25771da177e4SLinus Torvalds#
257820d60d99SMaciej W. Rozycki# CPU non-features
257920d60d99SMaciej W. Rozycki#
258020d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
258120d60d99SMaciej W. Rozycki	bool
258220d60d99SMaciej W. Rozycki
258320d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
258420d60d99SMaciej W. Rozycki	bool
258520d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
258620d60d99SMaciej W. Rozycki
258720d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
258820d60d99SMaciej W. Rozycki	bool
258920d60d99SMaciej W. Rozycki
2590071d2f0bSPaul Burtonconfig CPU_R4X00_BUGS64
2591071d2f0bSPaul Burton	bool
2592071d2f0bSPaul Burton	default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2593071d2f0bSPaul Burton
25944edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT
25954edf00a4SPaul Burton	int
25964edf00a4SPaul Burton	default 6 if CPU_R3000 || CPU_TX39XX
25974edf00a4SPaul Burton	default 0
25984edf00a4SPaul Burton
25994edf00a4SPaul Burtonconfig MIPS_ASID_BITS
26004edf00a4SPaul Burton	int
26012db003a5SPaul Burton	default 0 if MIPS_ASID_BITS_VARIABLE
26024edf00a4SPaul Burton	default 6 if CPU_R3000 || CPU_TX39XX
26034edf00a4SPaul Burton	default 8
26044edf00a4SPaul Burton
26052db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE
26062db003a5SPaul Burton	bool
26072db003a5SPaul Burton
26084a5dc51eSMarcin Nowakowskiconfig MIPS_CRC_SUPPORT
26094a5dc51eSMarcin Nowakowski	bool
26104a5dc51eSMarcin Nowakowski
261120d60d99SMaciej W. Rozycki#
26121da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
26131da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
26141da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
26151da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
26161da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
26171da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
26181da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
26191da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2620797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2621797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2622797798c1SRalf Baechle#   support.
26231da177e4SLinus Torvalds#
26241da177e4SLinus Torvaldsconfig HIGHMEM
26251da177e4SLinus Torvalds	bool "High Memory Support"
2626a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2627797798c1SRalf Baechle
2628797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2629797798c1SRalf Baechle	bool
2630797798c1SRalf Baechle
2631797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2632797798c1SRalf Baechle	bool
26331da177e4SLinus Torvalds
26349693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
26359693a853SFranck Bui-Huu	bool
26369693a853SFranck Bui-Huu
2637a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2638a6a4834cSSteven J. Hill	bool
2639a6a4834cSSteven J. Hill
2640377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2641377cb1b6SRalf Baechle	bool
2642377cb1b6SRalf Baechle	help
2643377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2644377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2645377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2646377cb1b6SRalf Baechle
2647a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2648a5e9a69eSPaul Burton	bool
2649a5e9a69eSPaul Burton
2650b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2651b4819b59SYoichi Yuasa	def_bool y
2652268a2d60SJiaxun Yang	depends on !NUMA && !CPU_LOONGSON2EF
2653b4819b59SYoichi Yuasa
2654b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2655b1c6cd42SAtsushi Nemoto	bool
2656397dc00eSMike Rapoport	select SPARSEMEM_STATIC if !SGI_IP27
265731473747SAtsushi Nemoto
2658d8cb4e11SRalf Baechleconfig NUMA
2659d8cb4e11SRalf Baechle	bool "NUMA Support"
2660d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2661d8cb4e11SRalf Baechle	help
2662d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2663d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2664d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2665172a37e9SRandy Dunlap	  leave it disabled; on single node systems leave this option
2666d8cb4e11SRalf Baechle	  disabled.
2667d8cb4e11SRalf Baechle
2668d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2669d8cb4e11SRalf Baechle	bool
2670d8cb4e11SRalf Baechle
2671f3c560a6SThomas Bogendoerferconfig HAVE_SETUP_PER_CPU_AREA
2672f3c560a6SThomas Bogendoerfer	def_bool y
2673f3c560a6SThomas Bogendoerfer	depends on NUMA
2674f3c560a6SThomas Bogendoerfer
2675f3c560a6SThomas Bogendoerferconfig NEED_PER_CPU_EMBED_FIRST_CHUNK
2676f3c560a6SThomas Bogendoerfer	def_bool y
2677f3c560a6SThomas Bogendoerfer	depends on NUMA
2678f3c560a6SThomas Bogendoerfer
26798c530ea3SMatt Redfearnconfig RELOCATABLE
26808c530ea3SMatt Redfearn	bool "Relocatable kernel"
2681ab7c01fdSSerge Semin	depends on SYS_SUPPORTS_RELOCATABLE
2682ab7c01fdSSerge Semin	depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2683ab7c01fdSSerge Semin		   CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2684ab7c01fdSSerge Semin		   CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2685281e3aeaSSerge Semin		   CPU_P5600 || CAVIUM_OCTEON_SOC
26868c530ea3SMatt Redfearn	help
26878c530ea3SMatt Redfearn	  This builds a kernel image that retains relocation information
26888c530ea3SMatt Redfearn	  so it can be loaded someplace besides the default 1MB.
26898c530ea3SMatt Redfearn	  The relocations make the kernel binary about 15% larger,
26908c530ea3SMatt Redfearn	  but are discarded at runtime
26918c530ea3SMatt Redfearn
2692069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE
2693069fd766SMatt Redfearn	hex "Relocation table size"
2694069fd766SMatt Redfearn	depends on RELOCATABLE
2695069fd766SMatt Redfearn	range 0x0 0x01000000
2696069fd766SMatt Redfearn	default "0x00100000"
2697a7f7f624SMasahiro Yamada	help
2698069fd766SMatt Redfearn	  A table of relocation data will be appended to the kernel binary
2699069fd766SMatt Redfearn	  and parsed at boot to fix up the relocated kernel.
2700069fd766SMatt Redfearn
2701069fd766SMatt Redfearn	  This option allows the amount of space reserved for the table to be
2702069fd766SMatt Redfearn	  adjusted, although the default of 1Mb should be ok in most cases.
2703069fd766SMatt Redfearn
2704069fd766SMatt Redfearn	  The build will fail and a valid size suggested if this is too small.
2705069fd766SMatt Redfearn
2706069fd766SMatt Redfearn	  If unsure, leave at the default value.
2707069fd766SMatt Redfearn
2708405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE
2709405bc8fdSMatt Redfearn	bool "Randomize the address of the kernel image"
2710405bc8fdSMatt Redfearn	depends on RELOCATABLE
2711a7f7f624SMasahiro Yamada	help
2712405bc8fdSMatt Redfearn	  Randomizes the physical and virtual address at which the
2713405bc8fdSMatt Redfearn	  kernel image is loaded, as a security feature that
2714405bc8fdSMatt Redfearn	  deters exploit attempts relying on knowledge of the location
2715405bc8fdSMatt Redfearn	  of kernel internals.
2716405bc8fdSMatt Redfearn
2717405bc8fdSMatt Redfearn	  Entropy is generated using any coprocessor 0 registers available.
2718405bc8fdSMatt Redfearn
2719405bc8fdSMatt Redfearn	  The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2720405bc8fdSMatt Redfearn
2721405bc8fdSMatt Redfearn	  If unsure, say N.
2722405bc8fdSMatt Redfearn
2723405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET
2724405bc8fdSMatt Redfearn	hex "Maximum kASLR offset" if EXPERT
2725405bc8fdSMatt Redfearn	depends on RANDOMIZE_BASE
2726405bc8fdSMatt Redfearn	range 0x0 0x40000000 if EVA || 64BIT
2727405bc8fdSMatt Redfearn	range 0x0 0x08000000
2728405bc8fdSMatt Redfearn	default "0x01000000"
2729a7f7f624SMasahiro Yamada	help
2730405bc8fdSMatt Redfearn	  When kASLR is active, this provides the maximum offset that will
2731405bc8fdSMatt Redfearn	  be applied to the kernel image. It should be set according to the
2732405bc8fdSMatt Redfearn	  amount of physical RAM available in the target system minus
2733405bc8fdSMatt Redfearn	  PHYSICAL_START and must be a power of 2.
2734405bc8fdSMatt Redfearn
2735405bc8fdSMatt Redfearn	  This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2736405bc8fdSMatt Redfearn	  EVA or 64-bit. The default is 16Mb.
2737405bc8fdSMatt Redfearn
2738c80d79d7SYasunori Gotoconfig NODES_SHIFT
2739c80d79d7SYasunori Goto	int
2740c80d79d7SYasunori Goto	default "6"
2741c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2742c80d79d7SYasunori Goto
274314f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
274414f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
2745268a2d60SJiaxun Yang	depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
274614f70012SDeng-Cheng Zhu	default y
274714f70012SDeng-Cheng Zhu	help
274814f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
274914f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
275014f70012SDeng-Cheng Zhu
2751be8fa1cbSTiezhu Yangconfig DMI
2752be8fa1cbSTiezhu Yang	bool "Enable DMI scanning"
2753be8fa1cbSTiezhu Yang	depends on MACH_LOONGSON64
2754be8fa1cbSTiezhu Yang	select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2755be8fa1cbSTiezhu Yang	default y
2756be8fa1cbSTiezhu Yang	help
2757be8fa1cbSTiezhu Yang	  Enabled scanning of DMI to identify machine quirks. Say Y
2758be8fa1cbSTiezhu Yang	  here unless you have verified that your setup is not
2759be8fa1cbSTiezhu Yang	  affected by entries in the DMI blacklist. Required by PNP
2760be8fa1cbSTiezhu Yang	  BIOS code.
2761be8fa1cbSTiezhu Yang
27621da177e4SLinus Torvaldsconfig SMP
27631da177e4SLinus Torvalds	bool "Multi-Processing support"
2764e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2765e73ea273SRalf Baechle	help
27661da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
27674a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
27684a474157SRobert Graffham	  than one CPU, say Y.
27691da177e4SLinus Torvalds
27704a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
27711da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
27721da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
27734a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
27741da177e4SLinus Torvalds	  will run faster if you say N here.
27751da177e4SLinus Torvalds
27761da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
27771da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
27781da177e4SLinus Torvalds
277903502faaSAdrian Bunk	  See also the SMP-HOWTO available at
2780ef054ad3SAlexander A. Klimov	  <https://www.tldp.org/docs.html#howto>.
27811da177e4SLinus Torvalds
27821da177e4SLinus Torvalds	  If you don't know what to do here, say N.
27831da177e4SLinus Torvalds
27847840d618SMatt Redfearnconfig HOTPLUG_CPU
27857840d618SMatt Redfearn	bool "Support for hot-pluggable CPUs"
27867840d618SMatt Redfearn	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
27877840d618SMatt Redfearn	help
27887840d618SMatt Redfearn	  Say Y here to allow turning CPUs off and on. CPUs can be
27897840d618SMatt Redfearn	  controlled through /sys/devices/system/cpu.
27907840d618SMatt Redfearn	  (Note: power management support will enable this option
27917840d618SMatt Redfearn	    automatically on SMP systems. )
27927840d618SMatt Redfearn	  Say N if you want to disable CPU hotplug.
27937840d618SMatt Redfearn
279487353d8aSRalf Baechleconfig SMP_UP
279587353d8aSRalf Baechle	bool
279687353d8aSRalf Baechle
27974a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
27984a16ff4cSRalf Baechle	bool
27994a16ff4cSRalf Baechle
28000ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
28010ee958e1SPaul Burton	bool
28020ee958e1SPaul Burton
2803e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2804e73ea273SRalf Baechle	bool
2805e73ea273SRalf Baechle
2806130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2807130e2fb7SRalf Baechle	bool
2808130e2fb7SRalf Baechle
2809130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2810130e2fb7SRalf Baechle	bool
2811130e2fb7SRalf Baechle
2812130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2813130e2fb7SRalf Baechle	bool
2814130e2fb7SRalf Baechle
2815130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2816130e2fb7SRalf Baechle	bool
2817130e2fb7SRalf Baechle
2818130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2819130e2fb7SRalf Baechle	bool
2820130e2fb7SRalf Baechle
28211da177e4SLinus Torvaldsconfig NR_CPUS
2822a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2823a91796a9SJayachandran C	range 2 256
28241da177e4SLinus Torvalds	depends on SMP
2825130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2826130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2827130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2828130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2829130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
28301da177e4SLinus Torvalds	help
28311da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
28321da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
28331da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
283472ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
283572ede9b1SAtsushi Nemoto	  and 2 for all others.
28361da177e4SLinus Torvalds
28371da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
283872ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
283972ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
284072ede9b1SAtsushi Nemoto	  power of two.
28411da177e4SLinus Torvalds
2842399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2843399aaa25SAl Cooper	bool
2844399aaa25SAl Cooper
28457820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP_1024
28467820b84bSDavid Daney	bool
28477820b84bSDavid Daney
28487820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP
28497820b84bSDavid Daney	int
28507820b84bSDavid Daney	depends on SMP
28517820b84bSDavid Daney	default 1024 if MIPS_NR_CPU_NR_MAP_1024
28527820b84bSDavid Daney	default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
28537820b84bSDavid Daney
28541723b4a3SAtsushi Nemoto#
28551723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
28561723b4a3SAtsushi Nemoto#
28571723b4a3SAtsushi Nemoto
28581723b4a3SAtsushi Nemotochoice
28591723b4a3SAtsushi Nemoto	prompt "Timer frequency"
28601723b4a3SAtsushi Nemoto	default HZ_250
28611723b4a3SAtsushi Nemoto	help
28621723b4a3SAtsushi Nemoto	  Allows the configuration of the timer frequency.
28631723b4a3SAtsushi Nemoto
286467596573SPaul Burton	config HZ_24
286567596573SPaul Burton		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
286667596573SPaul Burton
28671723b4a3SAtsushi Nemoto	config HZ_48
28680f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
28691723b4a3SAtsushi Nemoto
28701723b4a3SAtsushi Nemoto	config HZ_100
28711723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
28721723b4a3SAtsushi Nemoto
28731723b4a3SAtsushi Nemoto	config HZ_128
28741723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
28751723b4a3SAtsushi Nemoto
28761723b4a3SAtsushi Nemoto	config HZ_250
28771723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
28781723b4a3SAtsushi Nemoto
28791723b4a3SAtsushi Nemoto	config HZ_256
28801723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
28811723b4a3SAtsushi Nemoto
28821723b4a3SAtsushi Nemoto	config HZ_1000
28831723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
28841723b4a3SAtsushi Nemoto
28851723b4a3SAtsushi Nemoto	config HZ_1024
28861723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
28871723b4a3SAtsushi Nemoto
28881723b4a3SAtsushi Nemotoendchoice
28891723b4a3SAtsushi Nemoto
289067596573SPaul Burtonconfig SYS_SUPPORTS_24HZ
289167596573SPaul Burton	bool
289267596573SPaul Burton
28931723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
28941723b4a3SAtsushi Nemoto	bool
28951723b4a3SAtsushi Nemoto
28961723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
28971723b4a3SAtsushi Nemoto	bool
28981723b4a3SAtsushi Nemoto
28991723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
29001723b4a3SAtsushi Nemoto	bool
29011723b4a3SAtsushi Nemoto
29021723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
29031723b4a3SAtsushi Nemoto	bool
29041723b4a3SAtsushi Nemoto
29051723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
29061723b4a3SAtsushi Nemoto	bool
29071723b4a3SAtsushi Nemoto
29081723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
29091723b4a3SAtsushi Nemoto	bool
29101723b4a3SAtsushi Nemoto
29111723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
29121723b4a3SAtsushi Nemoto	bool
29131723b4a3SAtsushi Nemoto
29141723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
29151723b4a3SAtsushi Nemoto	bool
291667596573SPaul Burton	default y if !SYS_SUPPORTS_24HZ && \
291767596573SPaul Burton		     !SYS_SUPPORTS_48HZ && \
291867596573SPaul Burton		     !SYS_SUPPORTS_100HZ && \
291967596573SPaul Burton		     !SYS_SUPPORTS_128HZ && \
292067596573SPaul Burton		     !SYS_SUPPORTS_250HZ && \
292167596573SPaul Burton		     !SYS_SUPPORTS_256HZ && \
292267596573SPaul Burton		     !SYS_SUPPORTS_1000HZ && \
29231723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
29241723b4a3SAtsushi Nemoto
29251723b4a3SAtsushi Nemotoconfig HZ
29261723b4a3SAtsushi Nemoto	int
292767596573SPaul Burton	default 24 if HZ_24
29281723b4a3SAtsushi Nemoto	default 48 if HZ_48
29291723b4a3SAtsushi Nemoto	default 100 if HZ_100
29301723b4a3SAtsushi Nemoto	default 128 if HZ_128
29311723b4a3SAtsushi Nemoto	default 250 if HZ_250
29321723b4a3SAtsushi Nemoto	default 256 if HZ_256
29331723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
29341723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
29351723b4a3SAtsushi Nemoto
293696685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
293796685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
293896685b17SDeng-Cheng Zhu
2939ea6e942bSAtsushi Nemotoconfig KEXEC
29407d60717eSKees Cook	bool "Kexec system call"
29412965faa5SDave Young	select KEXEC_CORE
2942ea6e942bSAtsushi Nemoto	help
2943ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2944ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
29453dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2946ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2947ea6e942bSAtsushi Nemoto
294801dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2949ea6e942bSAtsushi Nemoto
2950ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2951ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2952bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2953bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2954bf220695SGeert Uytterhoeven	  made.
2955ea6e942bSAtsushi Nemoto
29567aa1c8f4SRalf Baechleconfig CRASH_DUMP
29577aa1c8f4SRalf Baechle	bool "Kernel crash dumps"
29587aa1c8f4SRalf Baechle	help
29597aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
29607aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
29617aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
29627aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
29637aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
29647aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
29657aa1c8f4SRalf Baechle	  PHYSICAL_START.
29667aa1c8f4SRalf Baechle
29677aa1c8f4SRalf Baechleconfig PHYSICAL_START
29687aa1c8f4SRalf Baechle	hex "Physical address where the kernel is loaded"
29698bda3e26SMaciej W. Rozycki	default "0xffffffff84000000"
29707aa1c8f4SRalf Baechle	depends on CRASH_DUMP
29717aa1c8f4SRalf Baechle	help
29727aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
29737aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
29747aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
29757aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
29767aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
29777aa1c8f4SRalf Baechle
2978ea6e942bSAtsushi Nemotoconfig SECCOMP
2979ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2980293c5bd1SRalf Baechle	depends on PROC_FS
2981ea6e942bSAtsushi Nemoto	default y
2982ea6e942bSAtsushi Nemoto	help
2983ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2984ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2985ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2986ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2987ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2988ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2989ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2990ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2991ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2992ea6e942bSAtsushi Nemoto
2993ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2994ea6e942bSAtsushi Nemoto
2995597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
2996b7f1e273SPaul Burton	bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2997597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2998597ce172SPaul Burton	help
2999597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
3000597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
3001597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3002597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
3003597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
3004597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
3005597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
3006597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
3007597ce172SPaul Burton	  saying N here.
3008597ce172SPaul Burton
300906e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
301006e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
301106e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
301206e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
301306e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
301406e2e882SPaul Burton	  said details.
301506e2e882SPaul Burton
301606e2e882SPaul Burton	  If unsure, say N.
3017597ce172SPaul Burton
3018f2ffa5abSDezhong Diaoconfig USE_OF
30190b3e06fdSJonas Gorski	bool
3020f2ffa5abSDezhong Diao	select OF
3021e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
3022abd2363fSGrant Likely	select IRQ_DOMAIN
3023f2ffa5abSDezhong Diao
30242fe8ea39SDengcheng Zhuconfig UHI_BOOT
30252fe8ea39SDengcheng Zhu	bool
30262fe8ea39SDengcheng Zhu
30277fafb068SAndrew Brestickerconfig BUILTIN_DTB
30287fafb068SAndrew Bresticker	bool
30297fafb068SAndrew Bresticker
30301da8f179SJonas Gorskichoice
30315b24d52cSJonas Gorski	prompt "Kernel appended dtb support" if USE_OF
30321da8f179SJonas Gorski	default MIPS_NO_APPENDED_DTB
30331da8f179SJonas Gorski
30341da8f179SJonas Gorski	config MIPS_NO_APPENDED_DTB
30351da8f179SJonas Gorski		bool "None"
30361da8f179SJonas Gorski		help
30371da8f179SJonas Gorski		  Do not enable appended dtb support.
30381da8f179SJonas Gorski
303987db537dSAaro Koskinen	config MIPS_ELF_APPENDED_DTB
304087db537dSAaro Koskinen		bool "vmlinux"
304187db537dSAaro Koskinen		help
304287db537dSAaro Koskinen		  With this option, the boot code will look for a device tree binary
304387db537dSAaro Koskinen		  DTB) included in the vmlinux ELF section .appended_dtb. By default
304487db537dSAaro Koskinen		  it is empty and the DTB can be appended using binutils command
304587db537dSAaro Koskinen		  objcopy:
304687db537dSAaro Koskinen
304787db537dSAaro Koskinen		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
304887db537dSAaro Koskinen
304987db537dSAaro Koskinen		  This is meant as a backward compatiblity convenience for those
305087db537dSAaro Koskinen		  systems with a bootloader that can't be upgraded to accommodate
305187db537dSAaro Koskinen		  the documented boot protocol using a device tree.
305287db537dSAaro Koskinen
30531da8f179SJonas Gorski	config MIPS_RAW_APPENDED_DTB
3054b8f54f2cSJonas Gorski		bool "vmlinux.bin or vmlinuz.bin"
30551da8f179SJonas Gorski		help
30561da8f179SJonas Gorski		  With this option, the boot code will look for a device tree binary
3057b8f54f2cSJonas Gorski		  DTB) appended to raw vmlinux.bin or vmlinuz.bin.
30581da8f179SJonas Gorski		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
30591da8f179SJonas Gorski
30601da8f179SJonas Gorski		  This is meant as a backward compatibility convenience for those
30611da8f179SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
30621da8f179SJonas Gorski		  the documented boot protocol using a device tree.
30631da8f179SJonas Gorski
30641da8f179SJonas Gorski		  Beware that there is very little in terms of protection against
30651da8f179SJonas Gorski		  this option being confused by leftover garbage in memory that might
30661da8f179SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
30671da8f179SJonas Gorski		  to vmlinux.bin.  Do not leave this option active in a production kernel
30681da8f179SJonas Gorski		  if you don't intend to always append a DTB.
30691da8f179SJonas Gorskiendchoice
30701da8f179SJonas Gorski
30712024972eSJonas Gorskichoice
30722024972eSJonas Gorski	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
30732bcef9b4SJonas Gorski	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
307487fcfa7bSJiaxun Yang					 !MACH_LOONGSON64 && !MIPS_MALTA && \
30752bcef9b4SJonas Gorski					 !CAVIUM_OCTEON_SOC
30762024972eSJonas Gorski	default MIPS_CMDLINE_FROM_BOOTLOADER
30772024972eSJonas Gorski
30782024972eSJonas Gorski	config MIPS_CMDLINE_FROM_DTB
30792024972eSJonas Gorski		depends on USE_OF
30802024972eSJonas Gorski		bool "Dtb kernel arguments if available"
30812024972eSJonas Gorski
30822024972eSJonas Gorski	config MIPS_CMDLINE_DTB_EXTEND
30832024972eSJonas Gorski		depends on USE_OF
30842024972eSJonas Gorski		bool "Extend dtb kernel arguments with bootloader arguments"
30852024972eSJonas Gorski
30862024972eSJonas Gorski	config MIPS_CMDLINE_FROM_BOOTLOADER
30872024972eSJonas Gorski		bool "Bootloader kernel arguments if available"
3088ed47e153SRabin Vincent
3089ed47e153SRabin Vincent	config MIPS_CMDLINE_BUILTIN_EXTEND
3090ed47e153SRabin Vincent		depends on CMDLINE_BOOL
3091ed47e153SRabin Vincent		bool "Extend builtin kernel arguments with bootloader arguments"
30922024972eSJonas Gorskiendchoice
30932024972eSJonas Gorski
30945e83d430SRalf Baechleendmenu
30955e83d430SRalf Baechle
30961df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
30971df0f0ffSAtsushi Nemoto	bool
30981df0f0ffSAtsushi Nemoto	default y
30991df0f0ffSAtsushi Nemoto
31001df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
31011df0f0ffSAtsushi Nemoto	bool
31021df0f0ffSAtsushi Nemoto	default y
31031df0f0ffSAtsushi Nemoto
3104a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS
3105a728ab52SKirill A. Shutemov	int
31063377e227SAlex Belits	default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3107a728ab52SKirill A. Shutemov	default 3 if 64BIT && !PAGE_SIZE_64KB
3108a728ab52SKirill A. Shutemov	default 2
3109a728ab52SKirill A. Shutemov
31106c359eb1SPaul Burtonconfig MIPS_AUTO_PFN_OFFSET
31116c359eb1SPaul Burton	bool
31126c359eb1SPaul Burton
31131da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
31141da177e4SLinus Torvalds
3115c5611df9SPaul Burtonconfig PCI_DRIVERS_GENERIC
31162eac9c2dSChristoph Hellwig	select PCI_DOMAINS_GENERIC if PCI
3117c5611df9SPaul Burton	bool
3118c5611df9SPaul Burton
3119c5611df9SPaul Burtonconfig PCI_DRIVERS_LEGACY
3120c5611df9SPaul Burton	def_bool !PCI_DRIVERS_GENERIC
3121c5611df9SPaul Burton	select NO_GENERIC_PCI_IOPORT_MAP
31222eac9c2dSChristoph Hellwig	select PCI_DOMAINS if PCI
31231da177e4SLinus Torvalds
31241da177e4SLinus Torvalds#
31251da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
31261da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
31271da177e4SLinus Torvalds# users to choose the right thing ...
31281da177e4SLinus Torvalds#
31291da177e4SLinus Torvaldsconfig ISA
31301da177e4SLinus Torvalds	bool
31311da177e4SLinus Torvalds
31321da177e4SLinus Torvaldsconfig TC
31331da177e4SLinus Torvalds	bool "TURBOchannel support"
31341da177e4SLinus Torvalds	depends on MACH_DECSTATION
31351da177e4SLinus Torvalds	help
313650a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
313750a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
313850a23e6eSJustin P. Mattock	  at:
313950a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
314050a23e6eSJustin P. Mattock	  and:
314150a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
314250a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
314350a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
31441da177e4SLinus Torvalds
31451da177e4SLinus Torvaldsconfig MMU
31461da177e4SLinus Torvalds	bool
31471da177e4SLinus Torvalds	default y
31481da177e4SLinus Torvalds
3149109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MIN
3150109c32ffSMatt Redfearn	default 12 if 64BIT
3151109c32ffSMatt Redfearn	default 8
3152109c32ffSMatt Redfearn
3153109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MAX
3154109c32ffSMatt Redfearn	default 18 if 64BIT
3155109c32ffSMatt Redfearn	default 15
3156109c32ffSMatt Redfearn
3157109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MIN
3158109c32ffSMatt Redfearn	default 8
3159109c32ffSMatt Redfearn
3160109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MAX
3161109c32ffSMatt Redfearn	default 15
3162109c32ffSMatt Redfearn
3163d865bea4SRalf Baechleconfig I8253
3164d865bea4SRalf Baechle	bool
3165798778b8SRussell King	select CLKSRC_I8253
31662d02612fSThomas Gleixner	select CLKEVT_I8253
31679726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
3168d865bea4SRalf Baechle
3169e05eb3f8SRalf Baechleconfig ZONE_DMA
3170e05eb3f8SRalf Baechle	bool
3171e05eb3f8SRalf Baechle
3172cce335aeSRalf Baechleconfig ZONE_DMA32
3173cce335aeSRalf Baechle	bool
3174cce335aeSRalf Baechle
31751da177e4SLinus Torvaldsendmenu
31761da177e4SLinus Torvalds
31771da177e4SLinus Torvaldsconfig TRAD_SIGNALS
31781da177e4SLinus Torvalds	bool
31791da177e4SLinus Torvalds
31801da177e4SLinus Torvaldsconfig MIPS32_COMPAT
318178aaf956SRalf Baechle	bool
31821da177e4SLinus Torvalds
31831da177e4SLinus Torvaldsconfig COMPAT
31841da177e4SLinus Torvalds	bool
31851da177e4SLinus Torvalds
318605e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
318705e43966SAtsushi Nemoto	bool
318805e43966SAtsushi Nemoto
31891da177e4SLinus Torvaldsconfig MIPS32_O32
31901da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
319178aaf956SRalf Baechle	depends on 64BIT
319278aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
319378aaf956SRalf Baechle	select COMPAT
319478aaf956SRalf Baechle	select MIPS32_COMPAT
319578aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
31961da177e4SLinus Torvalds	help
31971da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
31981da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
31991da177e4SLinus Torvalds	  existing binaries are in this format.
32001da177e4SLinus Torvalds
32011da177e4SLinus Torvalds	  If unsure, say Y.
32021da177e4SLinus Torvalds
32031da177e4SLinus Torvaldsconfig MIPS32_N32
32041da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
3205c22eacfeSRalf Baechle	depends on 64BIT
32065a9372f7SArnd Bergmann	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
320778aaf956SRalf Baechle	select COMPAT
320878aaf956SRalf Baechle	select MIPS32_COMPAT
320978aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
32101da177e4SLinus Torvalds	help
32111da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
32121da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
32131da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
32141da177e4SLinus Torvalds	  cases.
32151da177e4SLinus Torvalds
32161da177e4SLinus Torvalds	  If unsure, say N.
32171da177e4SLinus Torvalds
32181da177e4SLinus Torvaldsconfig BINFMT_ELF32
32191da177e4SLinus Torvalds	bool
32201da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
3221f43edca7SRalf Baechle	select ELFCORE
32221da177e4SLinus Torvalds
32232116245eSRalf Baechlemenu "Power management options"
3224952fa954SRodolfo Giometti
3225363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
3226363c55caSWu Zhangjin	def_bool y
32273f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3228363c55caSWu Zhangjin
3229f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
3230f4cb5700SJohannes Berg	def_bool y
32313f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3232f4cb5700SJohannes Berg
32332116245eSRalf Baechlesource "kernel/power/Kconfig"
3234952fa954SRodolfo Giometti
32351da177e4SLinus Torvaldsendmenu
32361da177e4SLinus Torvalds
32377a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
32387a998935SViresh Kumar	bool
32397a998935SViresh Kumar
32407a998935SViresh Kumarmenu "CPU Power Management"
3241c095ebafSPaul Burton
3242c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
32437a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
32447a998935SViresh Kumarendif
32459726b43aSWu Zhangjin
3246c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
3247c095ebafSPaul Burton
3248c095ebafSPaul Burtonendmenu
3249c095ebafSPaul Burton
325098cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
325198cdee0eSRalf Baechle
32522235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
3253e91946d6SNathan Chancellor
3254e91946d6SNathan Chancellorsource "arch/mips/vdso/Kconfig"
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