1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 21da177e4SLinus Torvaldsconfig MIPS 31da177e4SLinus Torvalds bool 41da177e4SLinus Torvalds default y 512597988SMatt Redfearn select ARCH_BINFMT_ELF_STATE 612597988SMatt Redfearn select ARCH_CLOCKSOURCE_DATA 712597988SMatt Redfearn select ARCH_DISCARD_MEMBLOCK 812597988SMatt Redfearn select ARCH_HAS_ELF_RANDOMIZE 912597988SMatt Redfearn select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 1012597988SMatt Redfearn select ARCH_SUPPORTS_UPROBES 111ee3630aSRalf Baechle select ARCH_USE_BUILTIN_BSWAP 1212597988SMatt Redfearn select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 1325da4e9dSPaul Burton select ARCH_USE_QUEUED_RWLOCKS 140b17c967SPaul Burton select ARCH_USE_QUEUED_SPINLOCKS 1512597988SMatt Redfearn select ARCH_WANT_IPC_PARSE_VERSION 1612597988SMatt Redfearn select BUILDTIME_EXTABLE_SORT 1712597988SMatt Redfearn select CLONE_BACKWARDS 1812597988SMatt Redfearn select CPU_PM if CPU_IDLE 1912597988SMatt Redfearn select GENERIC_ATOMIC64 if !64BIT 2012597988SMatt Redfearn select GENERIC_CLOCKEVENTS 2112597988SMatt Redfearn select GENERIC_CMOS_UPDATE 2212597988SMatt Redfearn select GENERIC_CPU_AUTOPROBE 2312597988SMatt Redfearn select GENERIC_IRQ_PROBE 2412597988SMatt Redfearn select GENERIC_IRQ_SHOW 25740129b3SAntony Pavlov select GENERIC_LIB_ASHLDI3 26740129b3SAntony Pavlov select GENERIC_LIB_ASHRDI3 27740129b3SAntony Pavlov select GENERIC_LIB_CMPDI2 28740129b3SAntony Pavlov select GENERIC_LIB_LSHRDI3 29740129b3SAntony Pavlov select GENERIC_LIB_UCMPDI2 3012597988SMatt Redfearn select GENERIC_PCI_IOMAP 3112597988SMatt Redfearn select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 3212597988SMatt Redfearn select GENERIC_SMP_IDLE_THREAD 3312597988SMatt Redfearn select GENERIC_TIME_VSYSCALL 3412597988SMatt Redfearn select HANDLE_DOMAIN_IRQ 3512597988SMatt Redfearn select HAVE_ARCH_JUMP_LABEL 3688547001SJason Wessel select HAVE_ARCH_KGDB 37109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_BITS if MMU 38109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 39490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 40c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 4112597988SMatt Redfearn select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 42f381bf6dSDavid Daney select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS) 43f381bf6dSDavid Daney select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS) 4412597988SMatt Redfearn select HAVE_CONTEXT_TRACKING 4512597988SMatt Redfearn select HAVE_COPY_THREAD_TLS 4664575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 4712597988SMatt Redfearn select HAVE_DEBUG_KMEMLEAK 4812597988SMatt Redfearn select HAVE_DEBUG_STACKOVERFLOW 4912597988SMatt Redfearn select HAVE_DMA_CONTIGUOUS 5012597988SMatt Redfearn select HAVE_DYNAMIC_FTRACE 5112597988SMatt Redfearn select HAVE_EXIT_THREAD 5212597988SMatt Redfearn select HAVE_FTRACE_MCOUNT_RECORD 5329c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 5412597988SMatt Redfearn select HAVE_FUNCTION_TRACER 5512597988SMatt Redfearn select HAVE_GENERIC_DMA_COHERENT 5612597988SMatt Redfearn select HAVE_IDE 5712597988SMatt Redfearn select HAVE_IRQ_EXIT_ON_IRQ_STACK 5812597988SMatt Redfearn select HAVE_IRQ_TIME_ACCOUNTING 59c1bf207dSDavid Daney select HAVE_KPROBES 60c1bf207dSDavid Daney select HAVE_KRETPROBES 619d15ffc8STejun Heo select HAVE_MEMBLOCK 629d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 63786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 6442a0bb3fSPetr Mladek select HAVE_NMI 6512597988SMatt Redfearn select HAVE_OPROFILE 6612597988SMatt Redfearn select HAVE_PERF_EVENTS 6708bccf43SMarcin Nowakowski select HAVE_REGS_AND_STACK_ACCESS_API 68*9ea141adSPaul Burton select HAVE_RSEQ 69d148eac0SMasahiro Yamada select HAVE_STACKPROTECTOR 7012597988SMatt Redfearn select HAVE_SYSCALL_TRACEPOINTS 71a3f14310SBen Hutchings select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP 7212597988SMatt Redfearn select IRQ_FORCED_THREADING 7312597988SMatt Redfearn select MODULES_USE_ELF_RELA if MODULES && 64BIT 7412597988SMatt Redfearn select MODULES_USE_ELF_REL if MODULES 7512597988SMatt Redfearn select PERF_USE_VMALLOC 7612597988SMatt Redfearn select RTC_LIB if !MACH_LOONGSON64 7712597988SMatt Redfearn select SYSCTL_EXCEPTION_TRACE 7812597988SMatt Redfearn select VIRT_TO_BUS 791da177e4SLinus Torvalds 801da177e4SLinus Torvaldsmenu "Machine selection" 811da177e4SLinus Torvalds 825e83d430SRalf Baechlechoice 835e83d430SRalf Baechle prompt "System type" 84d41e6858SMatt Redfearn default MIPS_GENERIC 851da177e4SLinus Torvalds 86eed0eabdSPaul Burtonconfig MIPS_GENERIC 87eed0eabdSPaul Burton bool "Generic board-agnostic MIPS kernel" 88eed0eabdSPaul Burton select BOOT_RAW 89eed0eabdSPaul Burton select BUILTIN_DTB 90eed0eabdSPaul Burton select CEVT_R4K 91eed0eabdSPaul Burton select CLKSRC_MIPS_GIC 92eed0eabdSPaul Burton select COMMON_CLK 93eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_VI 94eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_EI 95eed0eabdSPaul Burton select CSRC_R4K 96eed0eabdSPaul Burton select DMA_PERDEV_COHERENT 97eed0eabdSPaul Burton select HW_HAS_PCI 98eed0eabdSPaul Burton select IRQ_MIPS_CPU 99eed0eabdSPaul Burton select LIBFDT 100eed0eabdSPaul Burton select MIPS_CPU_SCACHE 101eed0eabdSPaul Burton select MIPS_GIC 102eed0eabdSPaul Burton select MIPS_L1_CACHE_SHIFT_7 103eed0eabdSPaul Burton select NO_EXCEPT_FILL 104eed0eabdSPaul Burton select PCI_DRIVERS_GENERIC 105eed0eabdSPaul Burton select PINCTRL 106eed0eabdSPaul Burton select SMP_UP if SMP 107a3078e59SMatt Redfearn select SWAP_IO_SPACE 108eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R1 109eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R2 110eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R6 111eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R1 112eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R2 113eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R6 114eed0eabdSPaul Burton select SYS_SUPPORTS_32BIT_KERNEL 115eed0eabdSPaul Burton select SYS_SUPPORTS_64BIT_KERNEL 116eed0eabdSPaul Burton select SYS_SUPPORTS_BIG_ENDIAN 117eed0eabdSPaul Burton select SYS_SUPPORTS_HIGHMEM 118eed0eabdSPaul Burton select SYS_SUPPORTS_LITTLE_ENDIAN 119eed0eabdSPaul Burton select SYS_SUPPORTS_MICROMIPS 120eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS_CPS 121eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS16 122eed0eabdSPaul Burton select SYS_SUPPORTS_MULTITHREADING 123eed0eabdSPaul Burton select SYS_SUPPORTS_RELOCATABLE 124eed0eabdSPaul Burton select SYS_SUPPORTS_SMARTMIPS 1252e6522c5SCorentin Labbe select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1262e6522c5SCorentin Labbe select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1272e6522c5SCorentin Labbe select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1282e6522c5SCorentin Labbe select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1292e6522c5SCorentin Labbe select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1302e6522c5SCorentin Labbe select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 131eed0eabdSPaul Burton select USE_OF 132eed0eabdSPaul Burton help 133eed0eabdSPaul Burton Select this to build a kernel which aims to support multiple boards, 134eed0eabdSPaul Burton generally using a flattened device tree passed from the bootloader 135eed0eabdSPaul Burton using the boot protocol defined in the UHI (Unified Hosting 136eed0eabdSPaul Burton Interface) specification. 137eed0eabdSPaul Burton 13842a4f17dSManuel Laussconfig MIPS_ALCHEMY 139c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 140d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 141f772cdb2SRalf Baechle select CEVT_R4K 142d7ea335cSSteven J. Hill select CSRC_R4K 14367e38cf2SRalf Baechle select IRQ_MIPS_CPU 14488e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 14542a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 14642a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 14742a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 148d30a2b47SLinus Walleij select GPIOLIB 1491b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 15047440229SManuel Lauss select COMMON_CLK 1511da177e4SLinus Torvalds 1527ca5dc14SFlorian Fainelliconfig AR7 1537ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 1547ca5dc14SFlorian Fainelli select BOOT_ELF32 1557ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 1567ca5dc14SFlorian Fainelli select CEVT_R4K 1577ca5dc14SFlorian Fainelli select CSRC_R4K 15867e38cf2SRalf Baechle select IRQ_MIPS_CPU 1597ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 1607ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 1617ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 1627ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 1637ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 1647ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 165377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1661b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 167d30a2b47SLinus Walleij select GPIOLIB 1687ca5dc14SFlorian Fainelli select VLYNQ 1698551fb64SYoichi Yuasa select HAVE_CLK 1707ca5dc14SFlorian Fainelli help 1717ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1727ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1737ca5dc14SFlorian Fainelli 17443cc739fSSergey Ryazanovconfig ATH25 17543cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 17643cc739fSSergey Ryazanov select CEVT_R4K 17743cc739fSSergey Ryazanov select CSRC_R4K 17843cc739fSSergey Ryazanov select DMA_NONCOHERENT 17967e38cf2SRalf Baechle select IRQ_MIPS_CPU 1801753e74eSSergey Ryazanov select IRQ_DOMAIN 18143cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 18243cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 18343cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1848aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 18543cc739fSSergey Ryazanov help 18643cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 18743cc739fSSergey Ryazanov 188d4a67d9dSGabor Juhosconfig ATH79 189d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 190ff591a91SAlban Bedel select ARCH_HAS_RESET_CONTROLLER 191d4a67d9dSGabor Juhos select BOOT_RAW 192d4a67d9dSGabor Juhos select CEVT_R4K 193d4a67d9dSGabor Juhos select CSRC_R4K 194d4a67d9dSGabor Juhos select DMA_NONCOHERENT 195d30a2b47SLinus Walleij select GPIOLIB 19694638067SGabor Juhos select HAVE_CLK 197411520afSAlban Bedel select COMMON_CLK 1982c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 19967e38cf2SRalf Baechle select IRQ_MIPS_CPU 2000aabf1a4SGabor Juhos select MIPS_MACHINE 201d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 202d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 203d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 204d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 205377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 206b3f0a250SAlban Bedel select SYS_SUPPORTS_ZBOOT_UART_PROM 20703c8c407SAlban Bedel select USE_OF 20853d473fcSAlban Bedel select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM 209d4a67d9dSGabor Juhos help 210d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 211d4a67d9dSGabor Juhos 2125f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 2135f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 214d666cd02SKevin Cernekee select BOOT_RAW 215d666cd02SKevin Cernekee select NO_EXCEPT_FILL 216d666cd02SKevin Cernekee select USE_OF 217d666cd02SKevin Cernekee select CEVT_R4K 218d666cd02SKevin Cernekee select CSRC_R4K 219d666cd02SKevin Cernekee select SYNC_R4K 220d666cd02SKevin Cernekee select COMMON_CLK 221c7c42ec2SSimon Arlott select BCM6345_L1_IRQ 22260b858f2SKevin Cernekee select BCM7038_L1_IRQ 22360b858f2SKevin Cernekee select BCM7120_L2_IRQ 22460b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 22567e38cf2SRalf Baechle select IRQ_MIPS_CPU 22660b858f2SKevin Cernekee select DMA_NONCOHERENT 227d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 22860b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 229d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 230d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 23160b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 23260b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 23360b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 234d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 235d666cd02SKevin Cernekee select SWAP_IO_SPACE 23660b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 23760b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 23860b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 23960b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 2404dc4704cSJustin Chen select HARDIRQS_SW_RESEND 241d666cd02SKevin Cernekee help 2425f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 2435f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 2445f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 2455f2d4459SKevin Cernekee must be set appropriately for your board. 246d666cd02SKevin Cernekee 2471c0c13ebSAurelien Jarnoconfig BCM47XX 248c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 249fe08f8c2SHauke Mehrtens select BOOT_RAW 25042f77542SRalf Baechle select CEVT_R4K 251940f6b48SRalf Baechle select CSRC_R4K 2521c0c13ebSAurelien Jarno select DMA_NONCOHERENT 2531c0c13ebSAurelien Jarno select HW_HAS_PCI 25467e38cf2SRalf Baechle select IRQ_MIPS_CPU 255314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 256dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 2571c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 2581c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 259377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 2606507831fSAaro Koskinen select SYS_SUPPORTS_ZBOOT 26125e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 262e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 263c949c0bcSRafał Miłecki select GPIOLIB 264c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 265f6e734a8SRafał Miłecki select BCM47XX_NVRAM 2662ab71a02SRafał Miłecki select BCM47XX_SPROM 267dfe00495SMatt Redfearn select BCM47XX_SSB if !BCM47XX_BCMA 2681c0c13ebSAurelien Jarno help 2691c0c13ebSAurelien Jarno Support for BCM47XX based boards 2701c0c13ebSAurelien Jarno 271e7300d04SMaxime Bizonconfig BCM63XX 272e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 273ae8de61cSFlorian Fainelli select BOOT_RAW 274e7300d04SMaxime Bizon select CEVT_R4K 275e7300d04SMaxime Bizon select CSRC_R4K 276fc264022SJonas Gorski select SYNC_R4K 277e7300d04SMaxime Bizon select DMA_NONCOHERENT 27867e38cf2SRalf Baechle select IRQ_MIPS_CPU 279e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 280e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 281e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 282e7300d04SMaxime Bizon select SWAP_IO_SPACE 283d30a2b47SLinus Walleij select GPIOLIB 2843e82eeebSYoichi Yuasa select HAVE_CLK 285af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 286c5af3c2dSJonas Gorski select CLKDEV_LOOKUP 287e7300d04SMaxime Bizon help 288e7300d04SMaxime Bizon Support for BCM63XX based boards 289e7300d04SMaxime Bizon 2901da177e4SLinus Torvaldsconfig MIPS_COBALT 2913fa986faSMartin Michlmayr bool "Cobalt Server" 29242f77542SRalf Baechle select CEVT_R4K 293940f6b48SRalf Baechle select CSRC_R4K 2941097c6acSYoichi Yuasa select CEVT_GT641XX 2951da177e4SLinus Torvalds select DMA_NONCOHERENT 2961da177e4SLinus Torvalds select HW_HAS_PCI 297d865bea4SRalf Baechle select I8253 2981da177e4SLinus Torvalds select I8259 29967e38cf2SRalf Baechle select IRQ_MIPS_CPU 300d5ab1a69SYoichi Yuasa select IRQ_GT641XX 301252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 302e25bfc92SYoichi Yuasa select PCI 3037cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3040a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 305ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3060e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 3075e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 308e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 3091da177e4SLinus Torvalds 3101da177e4SLinus Torvaldsconfig MACH_DECSTATION 3113fa986faSMartin Michlmayr bool "DECstations" 3121da177e4SLinus Torvalds select BOOT_ELF32 3136457d9fcSYoichi Yuasa select CEVT_DS1287 31481d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 3154247417dSYoichi Yuasa select CSRC_IOASIC 31681d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 31720d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 31820d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 31920d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 3201da177e4SLinus Torvalds select DMA_NONCOHERENT 321ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 32267e38cf2SRalf Baechle select IRQ_MIPS_CPU 3237cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 3247cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 325ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3267d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3275e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3281723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 3291723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 3301723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 331930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 3325e83d430SRalf Baechle help 3331da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 3341da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 3351da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 3361da177e4SLinus Torvalds 3371da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 3381da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 3391da177e4SLinus Torvalds 3401da177e4SLinus Torvalds DECstation 5000/50 3411da177e4SLinus Torvalds DECstation 5000/150 3421da177e4SLinus Torvalds DECstation 5000/260 3431da177e4SLinus Torvalds DECsystem 5900/260 3441da177e4SLinus Torvalds 3451da177e4SLinus Torvalds otherwise choose R3000. 3461da177e4SLinus Torvalds 3475e83d430SRalf Baechleconfig MACH_JAZZ 3483fa986faSMartin Michlmayr bool "Jazz family of machines" 349a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 3507a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 3510e2794b0SRalf Baechle select FW_ARC 3520e2794b0SRalf Baechle select FW_ARC32 3535e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 35442f77542SRalf Baechle select CEVT_R4K 355940f6b48SRalf Baechle select CSRC_R4K 356e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 3575e83d430SRalf Baechle select GENERIC_ISA_DMA 3588a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 35967e38cf2SRalf Baechle select IRQ_MIPS_CPU 360d865bea4SRalf Baechle select I8253 3615e83d430SRalf Baechle select I8259 3625e83d430SRalf Baechle select ISA 3637cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 3645e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 3657d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3661723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 3671da177e4SLinus Torvalds help 3685e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 3695e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 370692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 3715e83d430SRalf Baechle Olivetti M700-10 workstations. 3725e83d430SRalf Baechle 373de361e8bSPaul Burtonconfig MACH_INGENIC 374de361e8bSPaul Burton bool "Ingenic SoC based machines" 3755ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 3765ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 377f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 3785ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 37967e38cf2SRalf Baechle select IRQ_MIPS_CPU 38037b4c3caSPaul Cercueil select PINCTRL 381d30a2b47SLinus Walleij select GPIOLIB 382ff1930c6SPaul Burton select COMMON_CLK 38383bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 384ffb1843dSPaul Burton select BUILTIN_DTB 385ffb1843dSPaul Burton select USE_OF 3866ec127fbSPaul Burton select LIBFDT 3875ebabe59SLars-Peter Clausen 388171bb2f1SJohn Crispinconfig LANTIQ 389171bb2f1SJohn Crispin bool "Lantiq based platforms" 390171bb2f1SJohn Crispin select DMA_NONCOHERENT 39167e38cf2SRalf Baechle select IRQ_MIPS_CPU 392171bb2f1SJohn Crispin select CEVT_R4K 393171bb2f1SJohn Crispin select CSRC_R4K 394171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 395171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 396171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 397171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 398377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 399171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 400f35764e7SJames Hogan select SYS_SUPPORTS_VPE_LOADER 401171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 402d30a2b47SLinus Walleij select GPIOLIB 403171bb2f1SJohn Crispin select SWAP_IO_SPACE 404171bb2f1SJohn Crispin select BOOT_RAW 405287e3f3fSJohn Crispin select CLKDEV_LOOKUP 406a0392222SJohn Crispin select USE_OF 4073f8c50c9SJohn Crispin select PINCTRL 4083f8c50c9SJohn Crispin select PINCTRL_LANTIQ 409c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 410c530781cSJohn Crispin select RESET_CONTROLLER 411171bb2f1SJohn Crispin 4121f21d2bdSBrian Murphyconfig LASAT 4131f21d2bdSBrian Murphy bool "LASAT Networks platforms" 41442f77542SRalf Baechle select CEVT_R4K 41516f0bbbcSRalf Baechle select CRC32 416940f6b48SRalf Baechle select CSRC_R4K 4171f21d2bdSBrian Murphy select DMA_NONCOHERENT 4181f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 4191f21d2bdSBrian Murphy select HW_HAS_PCI 42067e38cf2SRalf Baechle select IRQ_MIPS_CPU 4211f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 4221f21d2bdSBrian Murphy select MIPS_NILE4 4231f21d2bdSBrian Murphy select R5000_CPU_SCACHE 4241f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 4251f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 4261f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 4271f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 4281f21d2bdSBrian Murphy 42930ad29bbSHuacai Chenconfig MACH_LOONGSON32 43030ad29bbSHuacai Chen bool "Loongson-1 family of machines" 431c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 432ade299d8SYoichi Yuasa help 43330ad29bbSHuacai Chen This enables support for the Loongson-1 family of machines. 43485749d24SWu Zhangjin 43530ad29bbSHuacai Chen Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 43630ad29bbSHuacai Chen the Institute of Computing Technology (ICT), Chinese Academy of 43730ad29bbSHuacai Chen Sciences (CAS). 438ade299d8SYoichi Yuasa 43930ad29bbSHuacai Chenconfig MACH_LOONGSON64 44030ad29bbSHuacai Chen bool "Loongson-2/3 family of machines" 441ea8c64acSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 442ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 443ca585cf9SKelvin Cheung help 44430ad29bbSHuacai Chen This enables the support of Loongson-2/3 family of machines. 445ca585cf9SKelvin Cheung 44630ad29bbSHuacai Chen Loongson-2 is a family of single-core CPUs and Loongson-3 is a 44730ad29bbSHuacai Chen family of multi-core CPUs. They are both 64-bit general-purpose 44830ad29bbSHuacai Chen MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute 44930ad29bbSHuacai Chen of Computing Technology (ICT), Chinese Academy of Sciences (CAS) 45030ad29bbSHuacai Chen in the People's Republic of China. The chief architect is Professor 45130ad29bbSHuacai Chen Weiwu Hu. 452ca585cf9SKelvin Cheung 4536a438309SAndrew Brestickerconfig MACH_PISTACHIO 4546a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 4556a438309SAndrew Bresticker select BOOT_ELF32 4566a438309SAndrew Bresticker select BOOT_RAW 4576a438309SAndrew Bresticker select CEVT_R4K 4586a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 4596a438309SAndrew Bresticker select COMMON_CLK 4606a438309SAndrew Bresticker select CSRC_R4K 461645c7827SZubair Lutfullah Kakakhel select DMA_NONCOHERENT 462d30a2b47SLinus Walleij select GPIOLIB 46367e38cf2SRalf Baechle select IRQ_MIPS_CPU 4646a438309SAndrew Bresticker select LIBFDT 4656a438309SAndrew Bresticker select MFD_SYSCON 4666a438309SAndrew Bresticker select MIPS_CPU_SCACHE 4676a438309SAndrew Bresticker select MIPS_GIC 4686a438309SAndrew Bresticker select PINCTRL 4696a438309SAndrew Bresticker select REGULATOR 4706a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 4716a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 4726a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 4736a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 4746a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 47541cc07beSMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 4766a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 477018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 478018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 4796a438309SAndrew Bresticker select USE_OF 4806a438309SAndrew Bresticker help 4816a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 4826a438309SAndrew Bresticker 4831da177e4SLinus Torvaldsconfig MIPS_MALTA 4843fa986faSMartin Michlmayr bool "MIPS Malta board" 48561ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 486a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 4877a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 4881da177e4SLinus Torvalds select BOOT_ELF32 489fa71c960SRalf Baechle select BOOT_RAW 490e8823d26SPaul Burton select BUILTIN_DTB 49142f77542SRalf Baechle select CEVT_R4K 492940f6b48SRalf Baechle select CSRC_R4K 493fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 49442b002abSGuenter Roeck select COMMON_CLK 495885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 4961da177e4SLinus Torvalds select GENERIC_ISA_DMA 4978a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 49867e38cf2SRalf Baechle select IRQ_MIPS_CPU 4998a19b8f1SAndrew Bresticker select MIPS_GIC 5001da177e4SLinus Torvalds select HW_HAS_PCI 501d865bea4SRalf Baechle select I8253 5021da177e4SLinus Torvalds select I8259 5035e83d430SRalf Baechle select MIPS_BONITO64 5049318c51aSChris Dearman select MIPS_CPU_SCACHE 505a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 506252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 5075e83d430SRalf Baechle select MIPS_MSC 508ecafe3e9SPaul Burton select SMP_UP if SMP 5091da177e4SLinus Torvalds select SWAP_IO_SPACE 5107cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 5117cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 512bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 513c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 514575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 5157cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 5165d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 517575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 5187cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 5197cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 520ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 521ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5225e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 523c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 5245e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 525424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 5260365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 527e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 528377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 529f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 5309693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 531f35764e7SJames Hogan select SYS_SUPPORTS_VPE_LOADER 5321b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 5338c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 534e8823d26SPaul Burton select USE_OF 53538ec82feSPaul Burton select LIBFDT 536abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 537e81a8c7dSPaul Burton select BUILTIN_DTB 538e81a8c7dSPaul Burton select LIBFDT 5391da177e4SLinus Torvalds help 540f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 5411da177e4SLinus Torvalds board. 5421da177e4SLinus Torvalds 5432572f00dSJoshua Hendersonconfig MACH_PIC32 5442572f00dSJoshua Henderson bool "Microchip PIC32 Family" 5452572f00dSJoshua Henderson help 5462572f00dSJoshua Henderson This enables support for the Microchip PIC32 family of platforms. 5472572f00dSJoshua Henderson 5482572f00dSJoshua Henderson Microchip PIC32 is a family of general-purpose 32 bit MIPS core 5492572f00dSJoshua Henderson microcontrollers. 5502572f00dSJoshua Henderson 551a83860c2SRalf Baechleconfig NEC_MARKEINS 552a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 553a83860c2SRalf Baechle select SOC_EMMA2RH 554a83860c2SRalf Baechle select HW_HAS_PCI 555a83860c2SRalf Baechle help 556a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 557ade299d8SYoichi Yuasa 5585e83d430SRalf Baechleconfig MACH_VR41XX 55974142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 56042f77542SRalf Baechle select CEVT_R4K 561940f6b48SRalf Baechle select CSRC_R4K 5627cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 563377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 564d30a2b47SLinus Walleij select GPIOLIB 5655e83d430SRalf Baechle 566edb6310aSDaniel Lairdconfig NXP_STB220 567edb6310aSDaniel Laird bool "NXP STB220 board" 568edb6310aSDaniel Laird select SOC_PNX833X 569edb6310aSDaniel Laird help 570edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 571edb6310aSDaniel Laird 572edb6310aSDaniel Lairdconfig NXP_STB225 573edb6310aSDaniel Laird bool "NXP 225 board" 574edb6310aSDaniel Laird select SOC_PNX833X 575edb6310aSDaniel Laird select SOC_PNX8335 576edb6310aSDaniel Laird help 577edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 578edb6310aSDaniel Laird 5799267a30dSMarc St-Jeanconfig PMC_MSP 5809267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 58139d30c13SAnoop P A select CEVT_R4K 58239d30c13SAnoop P A select CSRC_R4K 5839267a30dSMarc St-Jean select DMA_NONCOHERENT 5849267a30dSMarc St-Jean select SWAP_IO_SPACE 5859267a30dSMarc St-Jean select NO_EXCEPT_FILL 5869267a30dSMarc St-Jean select BOOT_RAW 5879267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 5889267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 5899267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 5909267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 591377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 59267e38cf2SRalf Baechle select IRQ_MIPS_CPU 5939267a30dSMarc St-Jean select SERIAL_8250 5949267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 5959296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 5969296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 5979267a30dSMarc St-Jean help 5989267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 5999267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 6009267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 6019267a30dSMarc St-Jean a variety of MIPS cores. 6029267a30dSMarc St-Jean 603ae2b5bb6SJohn Crispinconfig RALINK 604ae2b5bb6SJohn Crispin bool "Ralink based machines" 605ae2b5bb6SJohn Crispin select CEVT_R4K 606ae2b5bb6SJohn Crispin select CSRC_R4K 607ae2b5bb6SJohn Crispin select BOOT_RAW 608ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 60967e38cf2SRalf Baechle select IRQ_MIPS_CPU 610ae2b5bb6SJohn Crispin select USE_OF 611ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 612ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 613ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 614ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 615377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 616ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 617ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 6182a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 6192a153f1cSJohn Crispin select RESET_CONTROLLER 620ae2b5bb6SJohn Crispin 6211da177e4SLinus Torvaldsconfig SGI_IP22 6223fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 6230e2794b0SRalf Baechle select FW_ARC 6240e2794b0SRalf Baechle select FW_ARC32 6257a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 6261da177e4SLinus Torvalds select BOOT_ELF32 62742f77542SRalf Baechle select CEVT_R4K 628940f6b48SRalf Baechle select CSRC_R4K 629e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 6301da177e4SLinus Torvalds select DMA_NONCOHERENT 6315e83d430SRalf Baechle select HW_HAS_EISA 632d865bea4SRalf Baechle select I8253 63368de4803SThomas Bogendoerfer select I8259 6341da177e4SLinus Torvalds select IP22_CPU_SCACHE 63567e38cf2SRalf Baechle select IRQ_MIPS_CPU 636aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 637e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 638e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 63936e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 640e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 641e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 642e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 6431da177e4SLinus Torvalds select SWAP_IO_SPACE 6447cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6457cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6462b5e63f6SMartin Michlmayr # 6472b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6482b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6492b5e63f6SMartin Michlmayr # 6502b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6512b5e63f6SMartin Michlmayr # for a more details discussion 6522b5e63f6SMartin Michlmayr # 6532b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 654ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 655ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6565e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 657930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6581da177e4SLinus Torvalds help 6591da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 6601da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 6611da177e4SLinus Torvalds that runs on these, say Y here. 6621da177e4SLinus Torvalds 6631da177e4SLinus Torvaldsconfig SGI_IP27 6643fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 6650e2794b0SRalf Baechle select FW_ARC 6660e2794b0SRalf Baechle select FW_ARC64 6675e83d430SRalf Baechle select BOOT_ELF64 668e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 669634286f1SRalf Baechle select DMA_COHERENT 67036a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 6711da177e4SLinus Torvalds select HW_HAS_PCI 672130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 6737cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 674ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6755e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 676d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 6771a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 678930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6791da177e4SLinus Torvalds help 6801da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 6811da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 6821da177e4SLinus Torvalds here. 6831da177e4SLinus Torvalds 684e2defae5SThomas Bogendoerferconfig SGI_IP28 6857d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 6860e2794b0SRalf Baechle select FW_ARC 6870e2794b0SRalf Baechle select FW_ARC64 6887a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 689e2defae5SThomas Bogendoerfer select BOOT_ELF64 690e2defae5SThomas Bogendoerfer select CEVT_R4K 691e2defae5SThomas Bogendoerfer select CSRC_R4K 692e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 693e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 694e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 69567e38cf2SRalf Baechle select IRQ_MIPS_CPU 696e2defae5SThomas Bogendoerfer select HW_HAS_EISA 697e2defae5SThomas Bogendoerfer select I8253 698e2defae5SThomas Bogendoerfer select I8259 699e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 700e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 7015b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 702e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 703e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 704e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 705e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 706e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 7072b5e63f6SMartin Michlmayr # 7082b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 7092b5e63f6SMartin Michlmayr # memory during early boot on some machines. 7102b5e63f6SMartin Michlmayr # 7112b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 7122b5e63f6SMartin Michlmayr # for a more details discussion 7132b5e63f6SMartin Michlmayr # 7142b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 715e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 716e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 717dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 718e2defae5SThomas Bogendoerfer help 719e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 720e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 721e2defae5SThomas Bogendoerfer 7221da177e4SLinus Torvaldsconfig SGI_IP32 723cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 7240e2794b0SRalf Baechle select FW_ARC 7250e2794b0SRalf Baechle select FW_ARC32 7261da177e4SLinus Torvalds select BOOT_ELF32 72742f77542SRalf Baechle select CEVT_R4K 728940f6b48SRalf Baechle select CSRC_R4K 7291da177e4SLinus Torvalds select DMA_NONCOHERENT 7301da177e4SLinus Torvalds select HW_HAS_PCI 73167e38cf2SRalf Baechle select IRQ_MIPS_CPU 7321da177e4SLinus Torvalds select R5000_CPU_SCACHE 7331da177e4SLinus Torvalds select RM7000_CPU_SCACHE 7347cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 7357cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 7367cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 737dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 738ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 7395e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7401da177e4SLinus Torvalds help 7411da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 7421da177e4SLinus Torvalds 743ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 744ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 7455e83d430SRalf Baechle select BOOT_ELF32 7465e83d430SRalf Baechle select DMA_COHERENT 7475e83d430SRalf Baechle select SIBYTE_BCM1120 7485e83d430SRalf Baechle select SWAP_IO_SPACE 7497cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7505e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7515e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7525e83d430SRalf Baechle 753ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 754ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 7555e83d430SRalf Baechle select BOOT_ELF32 7565e83d430SRalf Baechle select DMA_COHERENT 7575e83d430SRalf Baechle select SIBYTE_BCM1120 7585e83d430SRalf Baechle select SWAP_IO_SPACE 7597cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7605e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7615e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7625e83d430SRalf Baechle 7635e83d430SRalf Baechleconfig SIBYTE_CRHONE 7643fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 7655e83d430SRalf Baechle select BOOT_ELF32 7665e83d430SRalf Baechle select DMA_COHERENT 7675e83d430SRalf Baechle select SIBYTE_BCM1125 7685e83d430SRalf Baechle select SWAP_IO_SPACE 7697cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7705e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7715e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7725e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7735e83d430SRalf Baechle 774ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 775ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 776ade299d8SYoichi Yuasa select BOOT_ELF32 777ade299d8SYoichi Yuasa select DMA_COHERENT 778ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 779ade299d8SYoichi Yuasa select SWAP_IO_SPACE 780ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 781ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 782ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 783ade299d8SYoichi Yuasa 784ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 785ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 786ade299d8SYoichi Yuasa select BOOT_ELF32 787ade299d8SYoichi Yuasa select DMA_COHERENT 788fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 789ade299d8SYoichi Yuasa select SIBYTE_SB1250 790ade299d8SYoichi Yuasa select SWAP_IO_SPACE 791ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 792ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 793ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 794ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 795cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 796ade299d8SYoichi Yuasa 797ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 798ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 799ade299d8SYoichi Yuasa select BOOT_ELF32 800ade299d8SYoichi Yuasa select DMA_COHERENT 801fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 802ade299d8SYoichi Yuasa select SIBYTE_SB1250 803ade299d8SYoichi Yuasa select SWAP_IO_SPACE 804ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 805ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 806ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 807ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 808ade299d8SYoichi Yuasa 809ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 810ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 811ade299d8SYoichi Yuasa select BOOT_ELF32 812ade299d8SYoichi Yuasa select DMA_COHERENT 813ade299d8SYoichi Yuasa select SIBYTE_SB1250 814ade299d8SYoichi Yuasa select SWAP_IO_SPACE 815ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 816ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 817ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 818ade299d8SYoichi Yuasa 819ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 820ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 821ade299d8SYoichi Yuasa select BOOT_ELF32 822ade299d8SYoichi Yuasa select DMA_COHERENT 823ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 824ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 825ade299d8SYoichi Yuasa select SWAP_IO_SPACE 826ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 827ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 828651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 829ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 830cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 831ade299d8SYoichi Yuasa 83214b36af4SThomas Bogendoerferconfig SNI_RM 83314b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 8340e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 8350e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 836aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 8375e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 838a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 8397a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 8405e83d430SRalf Baechle select BOOT_ELF32 84142f77542SRalf Baechle select CEVT_R4K 842940f6b48SRalf Baechle select CSRC_R4K 843e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 8445e83d430SRalf Baechle select DMA_NONCOHERENT 8455e83d430SRalf Baechle select GENERIC_ISA_DMA 8468a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 8475e83d430SRalf Baechle select HW_HAS_EISA 8485e83d430SRalf Baechle select HW_HAS_PCI 84967e38cf2SRalf Baechle select IRQ_MIPS_CPU 850d865bea4SRalf Baechle select I8253 8515e83d430SRalf Baechle select I8259 8525e83d430SRalf Baechle select ISA 8534a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 8547cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 8554a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 856c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 8574a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 85836a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 859ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 8607d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 8614a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 8625e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 8635e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8641da177e4SLinus Torvalds help 86514b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 86614b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 8675e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 8685e83d430SRalf Baechle support this machine type. 8691da177e4SLinus Torvalds 870edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 871edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 8725e83d430SRalf Baechle 873edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 874edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 87523fbee9dSRalf Baechle 87673b4390fSRalf Baechleconfig MIKROTIK_RB532 87773b4390fSRalf Baechle bool "Mikrotik RB532 boards" 87873b4390fSRalf Baechle select CEVT_R4K 87973b4390fSRalf Baechle select CSRC_R4K 88073b4390fSRalf Baechle select DMA_NONCOHERENT 88173b4390fSRalf Baechle select HW_HAS_PCI 88267e38cf2SRalf Baechle select IRQ_MIPS_CPU 88373b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 88473b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 88573b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 88673b4390fSRalf Baechle select SWAP_IO_SPACE 88773b4390fSRalf Baechle select BOOT_RAW 888d30a2b47SLinus Walleij select GPIOLIB 889930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 89073b4390fSRalf Baechle help 89173b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 89273b4390fSRalf Baechle based on the IDT RC32434 SoC. 89373b4390fSRalf Baechle 8949ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 8959ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 896a86c7f72SDavid Daney select CEVT_R4K 897ea8c64acSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 898d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 899a86c7f72SDavid Daney select DMA_COHERENT 900a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 901a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 902f65aad41SRalf Baechle select EDAC_SUPPORT 903b01aec9bSBorislav Petkov select EDAC_ATOMIC_SCRUB 90473569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 90573569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 906a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 9075e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 908e8635b48SDavid Daney select HW_HAS_PCI 909f00e001eSDavid Daney select ZONE_DMA32 910465aaed0SDavid Daney select HOLES_IN_ZONE 911d30a2b47SLinus Walleij select GPIOLIB 9126e511163SDavid Daney select LIBFDT 9136e511163SDavid Daney select USE_OF 9146e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 9156e511163SDavid Daney select SYS_SUPPORTS_SMP 9167820b84bSDavid Daney select NR_CPUS_DEFAULT_64 9177820b84bSDavid Daney select MIPS_NR_CPU_NR_MAP_1024 918e326479fSAndrew Bresticker select BUILTIN_DTB 9198c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 92009230cbcSChristoph Hellwig select SWIOTLB 9213ff72be4SSteven J. Hill select SYS_SUPPORTS_RELOCATABLE 922a86c7f72SDavid Daney help 923a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 924a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 925a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 926a86c7f72SDavid Daney Some of the supported boards are: 927a86c7f72SDavid Daney EBT3000 928a86c7f72SDavid Daney EBH3000 929a86c7f72SDavid Daney EBH3100 930a86c7f72SDavid Daney Thunder 931a86c7f72SDavid Daney Kodama 932a86c7f72SDavid Daney Hikari 933a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 934a86c7f72SDavid Daney 9357f058e85SJayachandran Cconfig NLM_XLR_BOARD 9367f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 9377f058e85SJayachandran C select BOOT_ELF32 9387f058e85SJayachandran C select NLM_COMMON 9397f058e85SJayachandran C select SYS_HAS_CPU_XLR 9407f058e85SJayachandran C select SYS_SUPPORTS_SMP 9417f058e85SJayachandran C select HW_HAS_PCI 9427f058e85SJayachandran C select SWAP_IO_SPACE 9437f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9447f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 945d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 9467f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9477f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 9487f058e85SJayachandran C select DMA_COHERENT 9497f058e85SJayachandran C select NR_CPUS_DEFAULT_32 9507f058e85SJayachandran C select CEVT_R4K 9517f058e85SJayachandran C select CSRC_R4K 95267e38cf2SRalf Baechle select IRQ_MIPS_CPU 953b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9547f058e85SJayachandran C select SYNC_R4K 9557f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 9568f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9578f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9587f058e85SJayachandran C help 9597f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 9607f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 9617f058e85SJayachandran C 9621c773ea4SJayachandran Cconfig NLM_XLP_BOARD 9631c773ea4SJayachandran C bool "Netlogic XLP based systems" 9641c773ea4SJayachandran C select BOOT_ELF32 9651c773ea4SJayachandran C select NLM_COMMON 9661c773ea4SJayachandran C select SYS_HAS_CPU_XLP 9671c773ea4SJayachandran C select SYS_SUPPORTS_SMP 9681c773ea4SJayachandran C select HW_HAS_PCI 9691c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9701c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 971d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 972d30a2b47SLinus Walleij select GPIOLIB 9731c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9741c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 9751c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 9761c773ea4SJayachandran C select DMA_COHERENT 9771c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 9781c773ea4SJayachandran C select CEVT_R4K 9791c773ea4SJayachandran C select CSRC_R4K 98067e38cf2SRalf Baechle select IRQ_MIPS_CPU 981b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9821c773ea4SJayachandran C select SYNC_R4K 9831c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 9842f6528e1SJayachandran C select USE_OF 9858f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9868f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9871c773ea4SJayachandran C help 9881c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 9891c773ea4SJayachandran C Say Y here if you have a XLP based board. 9901c773ea4SJayachandran C 9919bc463beSDavid Daneyconfig MIPS_PARAVIRT 9929bc463beSDavid Daney bool "Para-Virtualized guest system" 9939bc463beSDavid Daney select CEVT_R4K 9949bc463beSDavid Daney select CSRC_R4K 9959bc463beSDavid Daney select DMA_COHERENT 9969bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 9979bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 9989bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 9999bc463beSDavid Daney select SYS_SUPPORTS_SMP 10009bc463beSDavid Daney select NR_CPUS_DEFAULT_4 10019bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 10029bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 10039bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 10049bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 10059bc463beSDavid Daney select HW_HAS_PCI 10069bc463beSDavid Daney select SWAP_IO_SPACE 10079bc463beSDavid Daney help 10089bc463beSDavid Daney This option supports guest running under ???? 10099bc463beSDavid Daney 10101da177e4SLinus Torvaldsendchoice 10111da177e4SLinus Torvalds 1012e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 10133b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 1014d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 1015a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 1016e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 10178945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 1018eed0eabdSPaul Burtonsource "arch/mips/generic/Kconfig" 10195e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 10205ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 10218ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 10221f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 10232572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig" 1024af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig" 10250f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 1026ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 102729c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 102838b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 102922b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 10305e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 1031a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 103230ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig" 103330ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig" 10347f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 1035ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 103638b18f72SRalf Baechle 10375e83d430SRalf Baechleendmenu 10385e83d430SRalf Baechle 10391da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 10401da177e4SLinus Torvalds bool 10411da177e4SLinus Torvalds default y 10421da177e4SLinus Torvalds 10431da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 10441da177e4SLinus Torvalds bool 10451da177e4SLinus Torvalds 10463c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 10473c9ee7efSAkinobu Mita bool 10483c9ee7efSAkinobu Mita default y 10493c9ee7efSAkinobu Mita 10501da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 10511da177e4SLinus Torvalds bool 10521da177e4SLinus Torvalds default y 10531da177e4SLinus Torvalds 1054ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 10551cc89038SAtsushi Nemoto bool 10561cc89038SAtsushi Nemoto default y 10571cc89038SAtsushi Nemoto 10581da177e4SLinus Torvalds# 10591da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 10601da177e4SLinus Torvalds# 10610e2794b0SRalf Baechleconfig FW_ARC 10621da177e4SLinus Torvalds bool 10631da177e4SLinus Torvalds 106461ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 106561ed242dSRalf Baechle bool 106661ed242dSRalf Baechle 10679267a30dSMarc St-Jeanconfig BOOT_RAW 10689267a30dSMarc St-Jean bool 10699267a30dSMarc St-Jean 1070217dd11eSRalf Baechleconfig CEVT_BCM1480 1071217dd11eSRalf Baechle bool 1072217dd11eSRalf Baechle 10736457d9fcSYoichi Yuasaconfig CEVT_DS1287 10746457d9fcSYoichi Yuasa bool 10756457d9fcSYoichi Yuasa 10761097c6acSYoichi Yuasaconfig CEVT_GT641XX 10771097c6acSYoichi Yuasa bool 10781097c6acSYoichi Yuasa 107942f77542SRalf Baechleconfig CEVT_R4K 108042f77542SRalf Baechle bool 108142f77542SRalf Baechle 1082217dd11eSRalf Baechleconfig CEVT_SB1250 1083217dd11eSRalf Baechle bool 1084217dd11eSRalf Baechle 1085229f773eSAtsushi Nemotoconfig CEVT_TXX9 1086229f773eSAtsushi Nemoto bool 1087229f773eSAtsushi Nemoto 1088217dd11eSRalf Baechleconfig CSRC_BCM1480 1089217dd11eSRalf Baechle bool 1090217dd11eSRalf Baechle 10914247417dSYoichi Yuasaconfig CSRC_IOASIC 10924247417dSYoichi Yuasa bool 10934247417dSYoichi Yuasa 1094940f6b48SRalf Baechleconfig CSRC_R4K 1095940f6b48SRalf Baechle bool 1096940f6b48SRalf Baechle 1097217dd11eSRalf Baechleconfig CSRC_SB1250 1098217dd11eSRalf Baechle bool 1099217dd11eSRalf Baechle 1100a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL 1101a7f4df4eSAlex Smith def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1102a7f4df4eSAlex Smith 1103a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 1104d30a2b47SLinus Walleij select GPIOLIB 1105a9aec7feSAtsushi Nemoto bool 1106a9aec7feSAtsushi Nemoto 11070e2794b0SRalf Baechleconfig FW_CFE 1108df78b5c8SAurelien Jarno bool 1109df78b5c8SAurelien Jarno 111040e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES 111140e084a5SRalf Baechle bool 111240e084a5SRalf Baechle 1113885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1114885014bcSFelix Fietkau select DMA_NONCOHERENT 1115885014bcSFelix Fietkau bool 1116885014bcSFelix Fietkau 111720d33064SPaul Burtonconfig DMA_PERDEV_COHERENT 111820d33064SPaul Burton bool 111920d33064SPaul Burton select DMA_MAYBE_COHERENT 112020d33064SPaul Burton 11211da177e4SLinus Torvaldsconfig DMA_COHERENT 11221da177e4SLinus Torvalds bool 11231da177e4SLinus Torvalds 11241da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 11251da177e4SLinus Torvalds bool 1126e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 11274ce588cdSRalf Baechle 112836a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 11291da177e4SLinus Torvalds bool 11301da177e4SLinus Torvalds 11311b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1132dbb74540SRalf Baechle bool 1133dbb74540SRalf Baechle 11341da177e4SLinus Torvaldsconfig MIPS_BONITO64 11351da177e4SLinus Torvalds bool 11361da177e4SLinus Torvalds 11371da177e4SLinus Torvaldsconfig MIPS_MSC 11381da177e4SLinus Torvalds bool 11391da177e4SLinus Torvalds 11401f21d2bdSBrian Murphyconfig MIPS_NILE4 11411f21d2bdSBrian Murphy bool 11421f21d2bdSBrian Murphy 114339b8d525SRalf Baechleconfig SYNC_R4K 114439b8d525SRalf Baechle bool 114539b8d525SRalf Baechle 1146487d70d0SGabor Juhosconfig MIPS_MACHINE 1147487d70d0SGabor Juhos def_bool n 1148487d70d0SGabor Juhos 1149ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1150d388d685SMaciej W. Rozycki def_bool n 1151d388d685SMaciej W. Rozycki 11524e0748f5SMarkos Chandrasconfig GENERIC_CSUM 11534e0748f5SMarkos Chandras bool 11544e0748f5SMarkos Chandras 11558313da30SRalf Baechleconfig GENERIC_ISA_DMA 11568313da30SRalf Baechle bool 11578313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1158a35bee8aSNamhyung Kim select ISA_DMA_API 11598313da30SRalf Baechle 1160aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1161aa414dffSRalf Baechle bool 11628313da30SRalf Baechle select GENERIC_ISA_DMA 1163aa414dffSRalf Baechle 1164a35bee8aSNamhyung Kimconfig ISA_DMA_API 1165a35bee8aSNamhyung Kim bool 1166a35bee8aSNamhyung Kim 1167465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1168465aaed0SDavid Daney bool 1169465aaed0SDavid Daney 11708c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE 11718c530ea3SMatt Redfearn bool 11728c530ea3SMatt Redfearn help 11738c530ea3SMatt Redfearn Selected if the platform supports relocating the kernel. 11748c530ea3SMatt Redfearn The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF 11758c530ea3SMatt Redfearn to allow access to command line and entropy sources. 11768c530ea3SMatt Redfearn 1177f381bf6dSDavid Daneyconfig MIPS_CBPF_JIT 1178f381bf6dSDavid Daney def_bool y 1179f381bf6dSDavid Daney depends on BPF_JIT && HAVE_CBPF_JIT 1180f381bf6dSDavid Daney 1181f381bf6dSDavid Daneyconfig MIPS_EBPF_JIT 1182f381bf6dSDavid Daney def_bool y 1183f381bf6dSDavid Daney depends on BPF_JIT && HAVE_EBPF_JIT 1184f381bf6dSDavid Daney 1185f381bf6dSDavid Daney 11865e83d430SRalf Baechle# 11876b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 11885e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 11895e83d430SRalf Baechle# choice statement should be more obvious to the user. 11905e83d430SRalf Baechle# 11915e83d430SRalf Baechlechoice 11926b2aac42SMasanari Iida prompt "Endianness selection" 11931da177e4SLinus Torvalds help 11941da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 11955e83d430SRalf Baechle byte order. These modes require different kernels and a different 11963cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 11975e83d430SRalf Baechle particular system but some systems are just as commonly used in the 11983dde6ad8SDavid Sterba one or the other endianness. 11995e83d430SRalf Baechle 12005e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 12015e83d430SRalf Baechle bool "Big endian" 12025e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 12035e83d430SRalf Baechle 12045e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 12055e83d430SRalf Baechle bool "Little endian" 12065e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 12075e83d430SRalf Baechle 12085e83d430SRalf Baechleendchoice 12095e83d430SRalf Baechle 121022b0763aSDavid Daneyconfig EXPORT_UASM 121122b0763aSDavid Daney bool 121222b0763aSDavid Daney 12132116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 12142116245eSRalf Baechle bool 12152116245eSRalf Baechle 12165e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 12175e83d430SRalf Baechle bool 12185e83d430SRalf Baechle 12195e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 12205e83d430SRalf Baechle bool 12211da177e4SLinus Torvalds 12229cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 12239cffd154SDavid Daney bool 12249cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 12259cffd154SDavid Daney default y 12269cffd154SDavid Daney 1227aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1228aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1229aa1762f4SDavid Daney 12301da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 12311da177e4SLinus Torvalds bool 12321da177e4SLinus Torvalds 12339267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 12349267a30dSMarc St-Jean bool 12359267a30dSMarc St-Jean 12369267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 12379267a30dSMarc St-Jean bool 12389267a30dSMarc St-Jean 12398420fd00SAtsushi Nemotoconfig IRQ_TXX9 12408420fd00SAtsushi Nemoto bool 12418420fd00SAtsushi Nemoto 1242d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1243d5ab1a69SYoichi Yuasa bool 1244d5ab1a69SYoichi Yuasa 1245252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 12461da177e4SLinus Torvalds bool 12471da177e4SLinus Torvalds 12489267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 12499267a30dSMarc St-Jean bool 12509267a30dSMarc St-Jean 1251a83860c2SRalf Baechleconfig SOC_EMMA2RH 1252a83860c2SRalf Baechle bool 1253a83860c2SRalf Baechle select CEVT_R4K 1254a83860c2SRalf Baechle select CSRC_R4K 1255a83860c2SRalf Baechle select DMA_NONCOHERENT 125667e38cf2SRalf Baechle select IRQ_MIPS_CPU 1257a83860c2SRalf Baechle select SWAP_IO_SPACE 1258a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1259a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1260a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1261a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1262a83860c2SRalf Baechle 1263edb6310aSDaniel Lairdconfig SOC_PNX833X 1264edb6310aSDaniel Laird bool 1265edb6310aSDaniel Laird select CEVT_R4K 1266edb6310aSDaniel Laird select CSRC_R4K 126767e38cf2SRalf Baechle select IRQ_MIPS_CPU 1268edb6310aSDaniel Laird select DMA_NONCOHERENT 1269edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1270edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1271edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1272edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1273377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1274edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1275edb6310aSDaniel Laird 1276edb6310aSDaniel Lairdconfig SOC_PNX8335 1277edb6310aSDaniel Laird bool 1278edb6310aSDaniel Laird select SOC_PNX833X 1279edb6310aSDaniel Laird 1280a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1281a7e07b1aSMarkos Chandras bool 1282a7e07b1aSMarkos Chandras 12831da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 12841da177e4SLinus Torvalds bool 12851da177e4SLinus Torvalds 1286e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1287e2defae5SThomas Bogendoerfer bool 1288e2defae5SThomas Bogendoerfer 12895b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 12905b438c44SThomas Bogendoerfer bool 12915b438c44SThomas Bogendoerfer 1292e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1293e2defae5SThomas Bogendoerfer bool 1294e2defae5SThomas Bogendoerfer 1295e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1296e2defae5SThomas Bogendoerfer bool 1297e2defae5SThomas Bogendoerfer 1298e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1299e2defae5SThomas Bogendoerfer bool 1300e2defae5SThomas Bogendoerfer 1301e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1302e2defae5SThomas Bogendoerfer bool 1303e2defae5SThomas Bogendoerfer 1304e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1305e2defae5SThomas Bogendoerfer bool 1306e2defae5SThomas Bogendoerfer 13070e2794b0SRalf Baechleconfig FW_ARC32 13085e83d430SRalf Baechle bool 13095e83d430SRalf Baechle 1310aaa9fad3SPaul Bolleconfig FW_SNIPROM 1311231a35d3SThomas Bogendoerfer bool 1312231a35d3SThomas Bogendoerfer 13131da177e4SLinus Torvaldsconfig BOOT_ELF32 13141da177e4SLinus Torvalds bool 13151da177e4SLinus Torvalds 1316930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1317930beb5aSFlorian Fainelli bool 1318930beb5aSFlorian Fainelli 1319930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1320930beb5aSFlorian Fainelli bool 1321930beb5aSFlorian Fainelli 1322930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1323930beb5aSFlorian Fainelli bool 1324930beb5aSFlorian Fainelli 1325930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1326930beb5aSFlorian Fainelli bool 1327930beb5aSFlorian Fainelli 13281da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 13291da177e4SLinus Torvalds int 1330a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 13315432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 13325432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 13335432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 13341da177e4SLinus Torvalds default "5" 13351da177e4SLinus Torvalds 13361da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 13371da177e4SLinus Torvalds bool 13381da177e4SLinus Torvalds 13391da177e4SLinus Torvaldsconfig ARC_CONSOLE 13401da177e4SLinus Torvalds bool "ARC console support" 1341e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 13421da177e4SLinus Torvalds 13431da177e4SLinus Torvaldsconfig ARC_MEMORY 13441da177e4SLinus Torvalds bool 134514b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 13461da177e4SLinus Torvalds default y 13471da177e4SLinus Torvalds 13481da177e4SLinus Torvaldsconfig ARC_PROMLIB 13491da177e4SLinus Torvalds bool 1350e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 13511da177e4SLinus Torvalds default y 13521da177e4SLinus Torvalds 13530e2794b0SRalf Baechleconfig FW_ARC64 13541da177e4SLinus Torvalds bool 13551da177e4SLinus Torvalds 13561da177e4SLinus Torvaldsconfig BOOT_ELF64 13571da177e4SLinus Torvalds bool 13581da177e4SLinus Torvalds 13591da177e4SLinus Torvaldsmenu "CPU selection" 13601da177e4SLinus Torvalds 13611da177e4SLinus Torvaldschoice 13621da177e4SLinus Torvalds prompt "CPU type" 13631da177e4SLinus Torvalds default CPU_R4X00 13641da177e4SLinus Torvalds 13650e476d91SHuacai Chenconfig CPU_LOONGSON3 13660e476d91SHuacai Chen bool "Loongson 3 CPU" 13670e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 13680e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 13690e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 13700e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 13710e476d91SHuacai Chen select WEAK_ORDERING 13720e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 1373b2edcfc8SHuacai Chen select MIPS_PGD_C0_CONTEXT 137417c99d94SHuacai Chen select MIPS_L1_CACHE_SHIFT_6 1375d30a2b47SLinus Walleij select GPIOLIB 137609230cbcSChristoph Hellwig select SWIOTLB 13770e476d91SHuacai Chen help 13780e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 13790e476d91SHuacai Chen set with many extensions. 13800e476d91SHuacai Chen 13811e820da3SHuacai Chenconfig LOONGSON3_ENHANCEMENT 13821e820da3SHuacai Chen bool "New Loongson 3 CPU Enhancements" 13831e820da3SHuacai Chen default n 13841e820da3SHuacai Chen select CPU_MIPSR2 13851e820da3SHuacai Chen select CPU_HAS_PREFETCH 13861e820da3SHuacai Chen depends on CPU_LOONGSON3 13871e820da3SHuacai Chen help 13881e820da3SHuacai Chen New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A 13891e820da3SHuacai Chen R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as 13901e820da3SHuacai Chen FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User 13911e820da3SHuacai Chen Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), 13921e820da3SHuacai Chen Fast TLB refill support, etc. 13931e820da3SHuacai Chen 13941e820da3SHuacai Chen This option enable those enhancements which are not probed at run 13951e820da3SHuacai Chen time. If you want a generic kernel to run on all Loongson 3 machines, 13961e820da3SHuacai Chen please say 'N' here. If you want a high-performance kernel to run on 13971e820da3SHuacai Chen new Loongson 3 machines only, please say 'Y' here. 13981e820da3SHuacai Chen 13993702bba5SWu Zhangjinconfig CPU_LOONGSON2E 14003702bba5SWu Zhangjin bool "Loongson 2E" 14013702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 14023702bba5SWu Zhangjin select CPU_LOONGSON2 14032a21c730SFuxin Zhang help 14042a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 14052a21c730SFuxin Zhang with many extensions. 14062a21c730SFuxin Zhang 140725985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 14086f7a251aSWu Zhangjin bonito64. 14096f7a251aSWu Zhangjin 14106f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 14116f7a251aSWu Zhangjin bool "Loongson 2F" 14126f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 14136f7a251aSWu Zhangjin select CPU_LOONGSON2 1414d30a2b47SLinus Walleij select GPIOLIB 14156f7a251aSWu Zhangjin help 14166f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 14176f7a251aSWu Zhangjin with many extensions. 14186f7a251aSWu Zhangjin 14196f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 14206f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 14216f7a251aSWu Zhangjin Loongson2E. 14226f7a251aSWu Zhangjin 1423ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1424ca585cf9SKelvin Cheung bool "Loongson 1B" 1425ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1426ca585cf9SKelvin Cheung select CPU_LOONGSON1 14279ec88b60SKelvin Cheung select LEDS_GPIO_REGISTER 1428ca585cf9SKelvin Cheung help 1429ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1430ca585cf9SKelvin Cheung release 2 instruction set. 1431ca585cf9SKelvin Cheung 143212e3280bSYang Lingconfig CPU_LOONGSON1C 143312e3280bSYang Ling bool "Loongson 1C" 143412e3280bSYang Ling depends on SYS_HAS_CPU_LOONGSON1C 143512e3280bSYang Ling select CPU_LOONGSON1 143612e3280bSYang Ling select LEDS_GPIO_REGISTER 143712e3280bSYang Ling help 143812e3280bSYang Ling The Loongson 1C is a 32-bit SoC, which implements the MIPS32 143912e3280bSYang Ling release 2 instruction set. 144012e3280bSYang Ling 14416e760c8dSRalf Baechleconfig CPU_MIPS32_R1 14426e760c8dSRalf Baechle bool "MIPS32 Release 1" 14437cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 14446e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1445797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1446ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14476e760c8dSRalf Baechle help 14485e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 14491e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14501e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14511e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14521e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14531e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 14541e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 14551e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 14561e5f1caaSRalf Baechle performance. 14571e5f1caaSRalf Baechle 14581e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 14591e5f1caaSRalf Baechle bool "MIPS32 Release 2" 14607cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 14611e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1462797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1463ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1464a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14652235a54dSSanjay Lal select HAVE_KVM 14661e5f1caaSRalf Baechle help 14675e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 14686e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14696e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14706e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14716e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14721da177e4SLinus Torvalds 14737fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 1474674d10e2SMarkos Chandras bool "MIPS32 Release 6" 14757fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 14767fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14777fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14787fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14797fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14804e0748f5SMarkos Chandras select GENERIC_CSUM 14817fd08ca5SLeonid Yegoshin select HAVE_KVM 14827fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 14837fd08ca5SLeonid Yegoshin help 14847fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14857fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 14867fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 14877fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 14887fd08ca5SLeonid Yegoshin 14896e760c8dSRalf Baechleconfig CPU_MIPS64_R1 14906e760c8dSRalf Baechle bool "MIPS64 Release 1" 14917cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1492797798c1SRalf Baechle select CPU_HAS_PREFETCH 1493ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1494ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1495ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14969cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14976e760c8dSRalf Baechle help 14986e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 14996e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 15006e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 15016e760c8dSRalf Baechle specific type of processor in your system, choose those that one 15026e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 15031e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 15041e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 15051e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 15061e5f1caaSRalf Baechle performance. 15071e5f1caaSRalf Baechle 15081e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 15091e5f1caaSRalf Baechle bool "MIPS64 Release 2" 15107cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1511797798c1SRalf Baechle select CPU_HAS_PREFETCH 15121e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 15131e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1514ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15159cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1516a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 151740a2df49SJames Hogan select HAVE_KVM 15181e5f1caaSRalf Baechle help 15191e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 15201e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 15211e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 15221e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 15231e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 15241da177e4SLinus Torvalds 15257fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 1526674d10e2SMarkos Chandras bool "MIPS64 Release 6" 15277fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 15287fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 15297fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 15307fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 15317fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 15327fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 15334e0748f5SMarkos Chandras select GENERIC_CSUM 15342e6c7747SJames Hogan select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 153540a2df49SJames Hogan select HAVE_KVM 15367fd08ca5SLeonid Yegoshin help 15377fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 15387fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 15397fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 15407fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 15417fd08ca5SLeonid Yegoshin 15421da177e4SLinus Torvaldsconfig CPU_R3000 15431da177e4SLinus Torvalds bool "R3000" 15447cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1545f7062ddbSRalf Baechle select CPU_HAS_WB 1546ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1547797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15481da177e4SLinus Torvalds help 15491da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 15501da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 15511da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 15521da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 15531da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 15541da177e4SLinus Torvalds try to recompile with R3000. 15551da177e4SLinus Torvalds 15561da177e4SLinus Torvaldsconfig CPU_TX39XX 15571da177e4SLinus Torvalds bool "R39XX" 15587cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1559ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15601da177e4SLinus Torvalds 15611da177e4SLinus Torvaldsconfig CPU_VR41XX 15621da177e4SLinus Torvalds bool "R41xx" 15637cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1564ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1565ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15661da177e4SLinus Torvalds help 15675e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 15681da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 15691da177e4SLinus Torvalds kernel built with this option will not run on any other type of 15701da177e4SLinus Torvalds processor or vice versa. 15711da177e4SLinus Torvalds 15721da177e4SLinus Torvaldsconfig CPU_R4300 15731da177e4SLinus Torvalds bool "R4300" 15747cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1575ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1576ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15771da177e4SLinus Torvalds help 15781da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 15791da177e4SLinus Torvalds 15801da177e4SLinus Torvaldsconfig CPU_R4X00 15811da177e4SLinus Torvalds bool "R4x00" 15827cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1583ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1584ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1585970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15861da177e4SLinus Torvalds help 15871da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 15881da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 15891da177e4SLinus Torvalds 15901da177e4SLinus Torvaldsconfig CPU_TX49XX 15911da177e4SLinus Torvalds bool "R49XX" 15927cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1593de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1594ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1595ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1596970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15971da177e4SLinus Torvalds 15981da177e4SLinus Torvaldsconfig CPU_R5000 15991da177e4SLinus Torvalds bool "R5000" 16007cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1601ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1602ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1603970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16041da177e4SLinus Torvalds help 16051da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 16061da177e4SLinus Torvalds 16071da177e4SLinus Torvaldsconfig CPU_R5432 16081da177e4SLinus Torvalds bool "R5432" 16097cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 16105e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 16115e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1612970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16131da177e4SLinus Torvalds 1614542c1020SShinya Kuribayashiconfig CPU_R5500 1615542c1020SShinya Kuribayashi bool "R5500" 1616542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1617542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1618542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 16199cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1620542c1020SShinya Kuribayashi help 1621542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1622542c1020SShinya Kuribayashi instruction set. 1623542c1020SShinya Kuribayashi 16241da177e4SLinus Torvaldsconfig CPU_NEVADA 16251da177e4SLinus Torvalds bool "RM52xx" 16267cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1627ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1628ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1629970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16301da177e4SLinus Torvalds help 16311da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 16321da177e4SLinus Torvalds 16331da177e4SLinus Torvaldsconfig CPU_R8000 16341da177e4SLinus Torvalds bool "R8000" 16357cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 16365e83d430SRalf Baechle select CPU_HAS_PREFETCH 1637ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 16381da177e4SLinus Torvalds help 16391da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 16401da177e4SLinus Torvalds uncommon and the support for them is incomplete. 16411da177e4SLinus Torvalds 16421da177e4SLinus Torvaldsconfig CPU_R10000 16431da177e4SLinus Torvalds bool "R10000" 16447cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 16455e83d430SRalf Baechle select CPU_HAS_PREFETCH 1646ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1647ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1648797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1649970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16501da177e4SLinus Torvalds help 16511da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 16521da177e4SLinus Torvalds 16531da177e4SLinus Torvaldsconfig CPU_RM7000 16541da177e4SLinus Torvalds bool "RM7000" 16557cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 16565e83d430SRalf Baechle select CPU_HAS_PREFETCH 1657ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1658ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1659797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1660970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16611da177e4SLinus Torvalds 16621da177e4SLinus Torvaldsconfig CPU_SB1 16631da177e4SLinus Torvalds bool "SB1" 16647cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1665ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1666ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1667797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1668970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16690004a9dfSRalf Baechle select WEAK_ORDERING 16701da177e4SLinus Torvalds 1671a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1672a86c7f72SDavid Daney bool "Cavium Octeon processor" 16735e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1674a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1675a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1676a86c7f72SDavid Daney select WEAK_ORDERING 1677a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 16789cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1679df115f3eSBen Hutchings select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1680df115f3eSBen Hutchings select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1681930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 16820ae3abcdSJames Hogan select HAVE_KVM 1683a86c7f72SDavid Daney help 1684a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1685a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1686a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1687a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1688a86c7f72SDavid Daney 1689cd746249SJonas Gorskiconfig CPU_BMIPS 1690cd746249SJonas Gorski bool "Broadcom BMIPS" 1691cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1692cd746249SJonas Gorski select CPU_MIPS32 1693fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1694cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1695cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1696cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1697cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1698cd746249SJonas Gorski select DMA_NONCOHERENT 169967e38cf2SRalf Baechle select IRQ_MIPS_CPU 1700cd746249SJonas Gorski select SWAP_IO_SPACE 1701cd746249SJonas Gorski select WEAK_ORDERING 1702c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 170369aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1704a8d709b0SMarkus Mayer select CPU_SUPPORTS_CPUFREQ 1705a8d709b0SMarkus Mayer select MIPS_EXTERNAL_TIMER 1706c1c0c461SKevin Cernekee help 1707fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1708c1c0c461SKevin Cernekee 17097f058e85SJayachandran Cconfig CPU_XLR 17107f058e85SJayachandran C bool "Netlogic XLR SoC" 17117f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 17127f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17137f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17147f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1715970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17167f058e85SJayachandran C select WEAK_ORDERING 17177f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17187f058e85SJayachandran C help 17197f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 17201c773ea4SJayachandran C 17211c773ea4SJayachandran Cconfig CPU_XLP 17221c773ea4SJayachandran C bool "Netlogic XLP SoC" 17231c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 17241c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17251c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17261c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 17271c773ea4SJayachandran C select WEAK_ORDERING 17281c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17291c773ea4SJayachandran C select CPU_HAS_PREFETCH 1730d6504846SJayachandran C select CPU_MIPSR2 1731ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 17322db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 17331c773ea4SJayachandran C help 17341c773ea4SJayachandran C Netlogic Microsystems XLP processors. 17351da177e4SLinus Torvaldsendchoice 17361da177e4SLinus Torvalds 1737a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1738a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1739a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 17407fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1741a6e18781SLeonid Yegoshin help 1742a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1743a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1744a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1745a6e18781SLeonid Yegoshin 1746a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1747a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1748a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1749a6e18781SLeonid Yegoshin select EVA 1750a6e18781SLeonid Yegoshin default y 1751a6e18781SLeonid Yegoshin help 1752a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1753a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1754a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1755a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1756a6e18781SLeonid Yegoshin 1757c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1758c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1759c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1760c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1761c5b36783SSteven J. Hill help 1762c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1763c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1764c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1765c5b36783SSteven J. Hill 1766c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1767c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1768c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1769c5b36783SSteven J. Hill depends on !EVA 1770c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1771c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1772c5b36783SSteven J. Hill select XPA 1773c5b36783SSteven J. Hill select HIGHMEM 1774d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 1775c5b36783SSteven J. Hill default n 1776c5b36783SSteven J. Hill help 1777c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1778c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1779c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1780c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1781c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1782c5b36783SSteven J. Hill If unsure, say 'N' here. 1783c5b36783SSteven J. Hill 1784622844bfSWu Zhangjinif CPU_LOONGSON2F 1785622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1786622844bfSWu Zhangjin bool 1787622844bfSWu Zhangjin 1788622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1789622844bfSWu Zhangjin bool 1790622844bfSWu Zhangjin 1791622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1792622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1793622844bfSWu Zhangjin default y 1794622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1795622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1796622844bfSWu Zhangjin help 1797622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1798622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1799622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1800622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1801622844bfSWu Zhangjin 1802622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1803622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1804622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1805622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1806622844bfSWu Zhangjin systems. 1807622844bfSWu Zhangjin 1808622844bfSWu Zhangjin If unsure, please say Y. 1809622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1810622844bfSWu Zhangjin 18111b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 18121b93b3c3SWu Zhangjin bool 18131b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 18141b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 181531c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 18161b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1817fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 18184e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 18191b93b3c3SWu Zhangjin 18201b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 18211b93b3c3SWu Zhangjin bool 18221b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 18231b93b3c3SWu Zhangjin 1824dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM 1825dbb98314SAlban Bedel bool 1826dbb98314SAlban Bedel select SYS_SUPPORTS_ZBOOT 1827dbb98314SAlban Bedel 18283702bba5SWu Zhangjinconfig CPU_LOONGSON2 18293702bba5SWu Zhangjin bool 18303702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 18313702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 18323702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1833970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 18343702bba5SWu Zhangjin 1835ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1836ca585cf9SKelvin Cheung bool 1837ca585cf9SKelvin Cheung select CPU_MIPS32 1838ca585cf9SKelvin Cheung select CPU_MIPSR2 1839ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1840ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1841ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1842f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1843ca585cf9SKelvin Cheung 1844fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 184504fa8bf7SJonas Gorski select SMP_UP if SMP 18461bbb6c1bSKevin Cernekee bool 1847cd746249SJonas Gorski 1848cd746249SJonas Gorskiconfig CPU_BMIPS4350 1849cd746249SJonas Gorski bool 1850cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1851cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1852cd746249SJonas Gorski 1853cd746249SJonas Gorskiconfig CPU_BMIPS4380 1854cd746249SJonas Gorski bool 1855bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1856cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1857cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1858b4720809SFlorian Fainelli select CPU_HAS_RIXI 1859cd746249SJonas Gorski 1860cd746249SJonas Gorskiconfig CPU_BMIPS5000 1861cd746249SJonas Gorski bool 1862cd746249SJonas Gorski select MIPS_CPU_SCACHE 1863bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1864cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1865cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1866b4720809SFlorian Fainelli select CPU_HAS_RIXI 18671bbb6c1bSKevin Cernekee 18680e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 18690e476d91SHuacai Chen bool 18700e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 1871b2edcfc8SHuacai Chen select CPU_HAS_RIXI 18720e476d91SHuacai Chen 18733702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 18742a21c730SFuxin Zhang bool 18752a21c730SFuxin Zhang 18766f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 18776f7a251aSWu Zhangjin bool 187855045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 187955045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 188022f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 18816f7a251aSWu Zhangjin 1882ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1883ca585cf9SKelvin Cheung bool 1884ca585cf9SKelvin Cheung 188512e3280bSYang Lingconfig SYS_HAS_CPU_LOONGSON1C 188612e3280bSYang Ling bool 188712e3280bSYang Ling 18887cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 18897cf8053bSRalf Baechle bool 18907cf8053bSRalf Baechle 18917cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 18927cf8053bSRalf Baechle bool 18937cf8053bSRalf Baechle 1894a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1895a6e18781SLeonid Yegoshin bool 1896a6e18781SLeonid Yegoshin 1897c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1898c5b36783SSteven J. Hill bool 1899c5b36783SSteven J. Hill 19007fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 19017fd08ca5SLeonid Yegoshin bool 19027fd08ca5SLeonid Yegoshin 19037cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 19047cf8053bSRalf Baechle bool 19057cf8053bSRalf Baechle 19067cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 19077cf8053bSRalf Baechle bool 19087cf8053bSRalf Baechle 19097fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 19107fd08ca5SLeonid Yegoshin bool 19117fd08ca5SLeonid Yegoshin 19127cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 19137cf8053bSRalf Baechle bool 19147cf8053bSRalf Baechle 19157cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 19167cf8053bSRalf Baechle bool 19177cf8053bSRalf Baechle 19187cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 19197cf8053bSRalf Baechle bool 19207cf8053bSRalf Baechle 19217cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 19227cf8053bSRalf Baechle bool 19237cf8053bSRalf Baechle 19247cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 19257cf8053bSRalf Baechle bool 19267cf8053bSRalf Baechle 19277cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 19287cf8053bSRalf Baechle bool 19297cf8053bSRalf Baechle 19307cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 19317cf8053bSRalf Baechle bool 19327cf8053bSRalf Baechle 19337cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 19347cf8053bSRalf Baechle bool 19357cf8053bSRalf Baechle 1936542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1937542c1020SShinya Kuribayashi bool 1938542c1020SShinya Kuribayashi 19397cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 19407cf8053bSRalf Baechle bool 19417cf8053bSRalf Baechle 19427cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 19437cf8053bSRalf Baechle bool 19447cf8053bSRalf Baechle 19457cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 19467cf8053bSRalf Baechle bool 19477cf8053bSRalf Baechle 19487cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 19497cf8053bSRalf Baechle bool 19507cf8053bSRalf Baechle 19517cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 19527cf8053bSRalf Baechle bool 19537cf8053bSRalf Baechle 19545e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 19555e683389SDavid Daney bool 19565e683389SDavid Daney 1957cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1958c1c0c461SKevin Cernekee bool 1959c1c0c461SKevin Cernekee 1960fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1961c1c0c461SKevin Cernekee bool 1962cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1963c1c0c461SKevin Cernekee 1964c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1965c1c0c461SKevin Cernekee bool 1966cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1967c1c0c461SKevin Cernekee 1968c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1969c1c0c461SKevin Cernekee bool 1970cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1971c1c0c461SKevin Cernekee 1972c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1973c1c0c461SKevin Cernekee bool 1974cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1975c1c0c461SKevin Cernekee 19767f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 19777f058e85SJayachandran C bool 19787f058e85SJayachandran C 19791c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 19801c773ea4SJayachandran C bool 19811c773ea4SJayachandran C 1982b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 1983b6911bbaSPaul Burton depends on MIPS_MALTA 1984b6911bbaSPaul Burton depends on PCI 1985b6911bbaSPaul Burton bool 1986b6911bbaSPaul Burton default y 1987b6911bbaSPaul Burton 198817099b11SRalf Baechle# 198917099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 199017099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 199117099b11SRalf Baechle# 19920004a9dfSRalf Baechleconfig WEAK_ORDERING 19930004a9dfSRalf Baechle bool 199417099b11SRalf Baechle 199517099b11SRalf Baechle# 199617099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 199717099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 199817099b11SRalf Baechle# 199917099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 200017099b11SRalf Baechle bool 20015e83d430SRalf Baechleendmenu 20025e83d430SRalf Baechle 20035e83d430SRalf Baechle# 20045e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 20055e83d430SRalf Baechle# 20065e83d430SRalf Baechleconfig CPU_MIPS32 20075e83d430SRalf Baechle bool 20087fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 20095e83d430SRalf Baechle 20105e83d430SRalf Baechleconfig CPU_MIPS64 20115e83d430SRalf Baechle bool 20127fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 20135e83d430SRalf Baechle 20145e83d430SRalf Baechle# 2015c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 20165e83d430SRalf Baechle# 20175e83d430SRalf Baechleconfig CPU_MIPSR1 20185e83d430SRalf Baechle bool 20195e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 20205e83d430SRalf Baechle 20215e83d430SRalf Baechleconfig CPU_MIPSR2 20225e83d430SRalf Baechle bool 2023a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 20248256b17eSFlorian Fainelli select CPU_HAS_RIXI 2025a7e07b1aSMarkos Chandras select MIPS_SPRAM 20265e83d430SRalf Baechle 20277fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 20287fd08ca5SLeonid Yegoshin bool 20297fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 20308256b17eSFlorian Fainelli select CPU_HAS_RIXI 203187321fddSPaul Burton select HAVE_ARCH_BITREVERSE 20322db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 20334a5dc51eSMarcin Nowakowski select MIPS_CRC_SUPPORT 2034a7e07b1aSMarkos Chandras select MIPS_SPRAM 20355e83d430SRalf Baechle 2036a6e18781SLeonid Yegoshinconfig EVA 2037a6e18781SLeonid Yegoshin bool 2038a6e18781SLeonid Yegoshin 2039c5b36783SSteven J. Hillconfig XPA 2040c5b36783SSteven J. Hill bool 2041c5b36783SSteven J. Hill 20425e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 20435e83d430SRalf Baechle bool 20445e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 20455e83d430SRalf Baechle bool 20465e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 20475e83d430SRalf Baechle bool 20485e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 20495e83d430SRalf Baechle bool 205055045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 205155045ff5SWu Zhangjin bool 205255045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 205355045ff5SWu Zhangjin bool 20549cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 20559cffd154SDavid Daney bool 205622f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 205722f1fdfdSWu Zhangjin bool 205882622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 205982622284SDavid Daney bool 2060cebf8c0fSPaul Burton default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP 20615e83d430SRalf Baechle 20628192c9eaSDavid Daney# 20638192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 20648192c9eaSDavid Daney# 20658192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 20668192c9eaSDavid Daney bool 2067679eb637SJames Hogan default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 20688192c9eaSDavid Daney 20695e83d430SRalf Baechlemenu "Kernel type" 20705e83d430SRalf Baechle 20715e83d430SRalf Baechlechoice 20725e83d430SRalf Baechle prompt "Kernel code model" 20735e83d430SRalf Baechle help 20745e83d430SRalf Baechle You should only select this option if you have a workload that 20755e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 20765e83d430SRalf Baechle large memory. You will only be presented a single option in this 20775e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 20785e83d430SRalf Baechle 20795e83d430SRalf Baechleconfig 32BIT 20805e83d430SRalf Baechle bool "32-bit kernel" 20815e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 20825e83d430SRalf Baechle select TRAD_SIGNALS 20835e83d430SRalf Baechle help 20845e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 2085f17c4ca3SRalf Baechle 20865e83d430SRalf Baechleconfig 64BIT 20875e83d430SRalf Baechle bool "64-bit kernel" 20885e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 20895e83d430SRalf Baechle help 20905e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 20915e83d430SRalf Baechle 20925e83d430SRalf Baechleendchoice 20935e83d430SRalf Baechle 20942235a54dSSanjay Lalconfig KVM_GUEST 20952235a54dSSanjay Lal bool "KVM Guest Kernel" 2096f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 20972235a54dSSanjay Lal help 2098caa1faa7SJames Hogan Select this option if building a guest kernel for KVM (Trap & Emulate) 2099caa1faa7SJames Hogan mode. 21002235a54dSSanjay Lal 2101eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 2102eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 21032235a54dSSanjay Lal depends on KVM_GUEST 2104eda3d33cSJames Hogan default 100 21052235a54dSSanjay Lal help 2106eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 2107eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 2108eda3d33cSJames Hogan timer frequency is specified directly. 21092235a54dSSanjay Lal 21101e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48 21111e321fa9SLeonid Yegoshin bool "48 bits virtual memory" 21121e321fa9SLeonid Yegoshin depends on 64BIT 21131e321fa9SLeonid Yegoshin help 21143377e227SAlex Belits Support a maximum at least 48 bits of application virtual 21153377e227SAlex Belits memory. Default is 40 bits or less, depending on the CPU. 21163377e227SAlex Belits For page sizes 16k and above, this option results in a small 21173377e227SAlex Belits memory overhead for page tables. For 4k page size, a fourth 21183377e227SAlex Belits level of page tables is added which imposes both a memory 21193377e227SAlex Belits overhead as well as slower TLB fault handling. 21203377e227SAlex Belits 21211e321fa9SLeonid Yegoshin If unsure, say N. 21221e321fa9SLeonid Yegoshin 21231da177e4SLinus Torvaldschoice 21241da177e4SLinus Torvalds prompt "Kernel page size" 21251da177e4SLinus Torvalds default PAGE_SIZE_4KB 21261da177e4SLinus Torvalds 21271da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 21281da177e4SLinus Torvalds bool "4kB" 21290e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 21301da177e4SLinus Torvalds help 21311da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 21321da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 21331da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 21341da177e4SLinus Torvalds recommended for low memory systems. 21351da177e4SLinus Torvalds 21361da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 21371da177e4SLinus Torvalds bool "8kB" 21387d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 21391e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 21401da177e4SLinus Torvalds help 21411da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 21421da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2143c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 2144c52399beSRalf Baechle suitable Linux distribution to support this. 21451da177e4SLinus Torvalds 21461da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 21471da177e4SLinus Torvalds bool "16kB" 2148714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 21491da177e4SLinus Torvalds help 21501da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 21511da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2152714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2153714bfad6SRalf Baechle Linux distribution to support this. 21541da177e4SLinus Torvalds 2155c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2156c52399beSRalf Baechle bool "32kB" 2157c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 21581e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 2159c52399beSRalf Baechle help 2160c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2161c52399beSRalf Baechle the price of higher memory consumption. This option is available 2162c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2163c52399beSRalf Baechle distribution to support this. 2164c52399beSRalf Baechle 21651da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 21661da177e4SLinus Torvalds bool "64kB" 21673b2db173SPaul Burton depends on !CPU_R3000 && !CPU_TX39XX 21681da177e4SLinus Torvalds help 21691da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 21701da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 21711da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2172714bfad6SRalf Baechle writing this option is still high experimental. 21731da177e4SLinus Torvalds 21741da177e4SLinus Torvaldsendchoice 21751da177e4SLinus Torvalds 2176c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2177c9bace7cSDavid Daney int "Maximum zone order" 2178e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2179e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2180e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2181e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2182e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2183e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2184c9bace7cSDavid Daney range 11 64 2185c9bace7cSDavid Daney default "11" 2186c9bace7cSDavid Daney help 2187c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2188c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2189c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2190c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2191c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2192c9bace7cSDavid Daney increase this value. 2193c9bace7cSDavid Daney 2194c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2195c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2196c9bace7cSDavid Daney 2197c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2198c9bace7cSDavid Daney when choosing a value for this option. 2199c9bace7cSDavid Daney 22001da177e4SLinus Torvaldsconfig BOARD_SCACHE 22011da177e4SLinus Torvalds bool 22021da177e4SLinus Torvalds 22031da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 22041da177e4SLinus Torvalds bool 22051da177e4SLinus Torvalds select BOARD_SCACHE 22061da177e4SLinus Torvalds 22079318c51aSChris Dearman# 22089318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 22099318c51aSChris Dearman# 22109318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 22119318c51aSChris Dearman bool 22129318c51aSChris Dearman select BOARD_SCACHE 22139318c51aSChris Dearman 22141da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 22151da177e4SLinus Torvalds bool 22161da177e4SLinus Torvalds select BOARD_SCACHE 22171da177e4SLinus Torvalds 22181da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 22191da177e4SLinus Torvalds bool 22201da177e4SLinus Torvalds select BOARD_SCACHE 22211da177e4SLinus Torvalds 22221da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 22231da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 22241da177e4SLinus Torvalds depends on CPU_SB1 22251da177e4SLinus Torvalds help 22261da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 22271da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 22281da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 22291da177e4SLinus Torvalds 22301da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2231c8094b53SRalf Baechle bool 22321da177e4SLinus Torvalds 22333165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 22343165c846SFlorian Fainelli bool 22353b2db173SPaul Burton default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX) 22363165c846SFlorian Fainelli 223791405eb6SFlorian Fainelliconfig CPU_R4K_FPU 223891405eb6SFlorian Fainelli bool 2239a2aea699SPaul Burton default y if !(CPU_R3000 || CPU_TX39XX) 224091405eb6SFlorian Fainelli 224162cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 224262cedc4fSFlorian Fainelli bool 224362cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 224462cedc4fSFlorian Fainelli 224559d6ab86SRalf Baechleconfig MIPS_MT_SMP 2246a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 22475cbf9688SPaul Burton default y 2248527f1028SPaul Burton depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS 224959d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2250d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2251c080faa5SSteven J. Hill select SYNC_R4K 225259d6ab86SRalf Baechle select MIPS_MT 225359d6ab86SRalf Baechle select SMP 225487353d8aSRalf Baechle select SMP_UP 2255c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2256c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2257399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 225859d6ab86SRalf Baechle help 2259c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2260c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2261c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2262c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2263c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 226459d6ab86SRalf Baechle 2265f41ae0b2SRalf Baechleconfig MIPS_MT 2266f41ae0b2SRalf Baechle bool 2267f41ae0b2SRalf Baechle 22680ab7aefcSRalf Baechleconfig SCHED_SMT 22690ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 22700ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 22710ab7aefcSRalf Baechle default n 22720ab7aefcSRalf Baechle help 22730ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 22740ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 22750ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 22760ab7aefcSRalf Baechle 22770ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 22780ab7aefcSRalf Baechle bool 22790ab7aefcSRalf Baechle 2280f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2281f41ae0b2SRalf Baechle bool 2282f41ae0b2SRalf Baechle 2283f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2284f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2285f088fc84SRalf Baechle default y 2286b633648cSRalf Baechle depends on MIPS_MT_SMP 228707cc0c9eSRalf Baechle 2288b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2289b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 22909eaa9a82SPaul Burton depends on CPU_MIPSR6 2291b0a668fbSLeonid Yegoshin default y 2292b0a668fbSLeonid Yegoshin help 2293b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2294b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 229507edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2296b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2297b0a668fbSLeonid Yegoshin final kernel image. 2298b0a668fbSLeonid Yegoshin 2299f35764e7SJames Hoganconfig SYS_SUPPORTS_VPE_LOADER 2300f35764e7SJames Hogan bool 2301f35764e7SJames Hogan depends on SYS_SUPPORTS_MULTITHREADING 2302f35764e7SJames Hogan help 2303f35764e7SJames Hogan Indicates that the platform supports the VPE loader, and provides 2304f35764e7SJames Hogan physical_memsize. 2305f35764e7SJames Hogan 230607cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 230707cc0c9eSRalf Baechle bool "VPE loader support." 2308f35764e7SJames Hogan depends on SYS_SUPPORTS_VPE_LOADER && MODULES 230907cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 231007cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 231107cc0c9eSRalf Baechle select MIPS_MT 231207cc0c9eSRalf Baechle help 231307cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 231407cc0c9eSRalf Baechle onto another VPE and running it. 2315f088fc84SRalf Baechle 231617a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 231717a1d523SDeng-Cheng Zhu bool 231817a1d523SDeng-Cheng Zhu default "y" 231917a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 232017a1d523SDeng-Cheng Zhu 23211a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 23221a2a6d7eSDeng-Cheng Zhu bool 23231a2a6d7eSDeng-Cheng Zhu default "y" 23241a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 23251a2a6d7eSDeng-Cheng Zhu 2326e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2327e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2328e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2329e01402b1SRalf Baechle default y 2330e01402b1SRalf Baechle help 2331e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2332e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2333e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2334e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2335e01402b1SRalf Baechle 2336e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2337e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2338e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2339e01402b1SRalf Baechle 2340da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2341da615cf6SDeng-Cheng Zhu bool 2342da615cf6SDeng-Cheng Zhu default "y" 2343da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2344da615cf6SDeng-Cheng Zhu 23452c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 23462c973ef0SDeng-Cheng Zhu bool 23472c973ef0SDeng-Cheng Zhu default "y" 23482c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 23492c973ef0SDeng-Cheng Zhu 23504a16ff4cSRalf Baechleconfig MIPS_CMP 23515cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 23525676319cSMarkos Chandras depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 2353b10b43baSMarkos Chandras select SMP 2354eb9b5141STim Anderson select SYNC_R4K 2355b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 23564a16ff4cSRalf Baechle select WEAK_ORDERING 23574a16ff4cSRalf Baechle default n 23584a16ff4cSRalf Baechle help 2359044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2360044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2361044505c7SPaul Burton its ability to start secondary CPUs. 23624a16ff4cSRalf Baechle 23635cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 23645cac93b3SPaul Burton instead of this. 23655cac93b3SPaul Burton 23660ee958e1SPaul Burtonconfig MIPS_CPS 23670ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 23685a3e7c02SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 23690ee958e1SPaul Burton select MIPS_CM 23701d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 23710ee958e1SPaul Burton select SMP 23720ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 23731d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 2374c8b7712cSPaul Burton select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 23750ee958e1SPaul Burton select SYS_SUPPORTS_SMP 23760ee958e1SPaul Burton select WEAK_ORDERING 23770ee958e1SPaul Burton help 23780ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 23790ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 23800ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 23810ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 23820ee958e1SPaul Burton support is unavailable. 23830ee958e1SPaul Burton 23843179d37eSPaul Burtonconfig MIPS_CPS_PM 238539a59593SMarkos Chandras depends on MIPS_CPS 23863179d37eSPaul Burton bool 23873179d37eSPaul Burton 23889f98f3ddSPaul Burtonconfig MIPS_CM 23899f98f3ddSPaul Burton bool 23903c9b4166SPaul Burton select MIPS_CPC 23919f98f3ddSPaul Burton 23929c38cf44SPaul Burtonconfig MIPS_CPC 23939c38cf44SPaul Burton bool 23942600990eSRalf Baechle 23951da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 23961da177e4SLinus Torvalds bool 23971da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 23981da177e4SLinus Torvalds default y 23991da177e4SLinus Torvalds 24001da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 24011da177e4SLinus Torvalds bool 24021da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 24031da177e4SLinus Torvalds default y 24041da177e4SLinus Torvalds 24052235a54dSSanjay Lal 24069e2b5372SMarkos Chandraschoice 24079e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 24089e2b5372SMarkos Chandras 24099e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 24109e2b5372SMarkos Chandras bool "None" 24119e2b5372SMarkos Chandras help 24129e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 24139e2b5372SMarkos Chandras 24149693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 24159693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 24169e2b5372SMarkos Chandras bool "SmartMIPS" 24179693a853SFranck Bui-Huu help 24189693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 24199693a853SFranck Bui-Huu increased security at both hardware and software level for 24209693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 24219693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 24229693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 24239693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 24249693a853SFranck Bui-Huu here. 24259693a853SFranck Bui-Huu 2426bce86083SSteven J. Hillconfig CPU_MICROMIPS 24277fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 24289e2b5372SMarkos Chandras bool "microMIPS" 2429bce86083SSteven J. Hill help 2430bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2431bce86083SSteven J. Hill microMIPS ISA 2432bce86083SSteven J. Hill 24339e2b5372SMarkos Chandrasendchoice 24349e2b5372SMarkos Chandras 2435a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 24360ce3417eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2437a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 24382a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2439a5e9a69eSPaul Burton help 2440a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2441a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 24421db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 24431db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 24441db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 24451db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 24461db1af84SPaul Burton the size & complexity of your kernel. 2447a5e9a69eSPaul Burton 2448a5e9a69eSPaul Burton If unsure, say Y. 2449a5e9a69eSPaul Burton 24501da177e4SLinus Torvaldsconfig CPU_HAS_WB 2451f7062ddbSRalf Baechle bool 2452e01402b1SRalf Baechle 2453df0ac8a4SKevin Cernekeeconfig XKS01 2454df0ac8a4SKevin Cernekee bool 2455df0ac8a4SKevin Cernekee 24568256b17eSFlorian Fainelliconfig CPU_HAS_RIXI 24578256b17eSFlorian Fainelli bool 24588256b17eSFlorian Fainelli 2459f41ae0b2SRalf Baechle# 2460f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2461f41ae0b2SRalf Baechle# 2462e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2463f41ae0b2SRalf Baechle bool 2464e01402b1SRalf Baechle 2465f41ae0b2SRalf Baechle# 2466f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2467f41ae0b2SRalf Baechle# 2468e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2469f41ae0b2SRalf Baechle bool 2470e01402b1SRalf Baechle 24711da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 24721da177e4SLinus Torvalds bool 24731da177e4SLinus Torvalds depends on !CPU_R3000 24741da177e4SLinus Torvalds default y 24751da177e4SLinus Torvalds 24761da177e4SLinus Torvalds# 247720d60d99SMaciej W. Rozycki# CPU non-features 247820d60d99SMaciej W. Rozycki# 247920d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 248020d60d99SMaciej W. Rozycki bool 248120d60d99SMaciej W. Rozycki 248220d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 248320d60d99SMaciej W. Rozycki bool 248420d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 248520d60d99SMaciej W. Rozycki 248620d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 248720d60d99SMaciej W. Rozycki bool 248820d60d99SMaciej W. Rozycki 24894edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT 24904edf00a4SPaul Burton int 24914edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24924edf00a4SPaul Burton default 4 if CPU_R8000 24934edf00a4SPaul Burton default 0 24944edf00a4SPaul Burton 24954edf00a4SPaul Burtonconfig MIPS_ASID_BITS 24964edf00a4SPaul Burton int 24972db003a5SPaul Burton default 0 if MIPS_ASID_BITS_VARIABLE 24984edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24994edf00a4SPaul Burton default 8 25004edf00a4SPaul Burton 25012db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE 25022db003a5SPaul Burton bool 25032db003a5SPaul Burton 25044a5dc51eSMarcin Nowakowskiconfig MIPS_CRC_SUPPORT 25054a5dc51eSMarcin Nowakowski bool 25064a5dc51eSMarcin Nowakowski 250720d60d99SMaciej W. Rozycki# 25081da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 25091da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 25101da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 25111da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 25121da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 25131da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 25141da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 25151da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2516797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2517797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2518797798c1SRalf Baechle# support. 25191da177e4SLinus Torvalds# 25201da177e4SLinus Torvaldsconfig HIGHMEM 25211da177e4SLinus Torvalds bool "High Memory Support" 2522a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2523797798c1SRalf Baechle 2524797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2525797798c1SRalf Baechle bool 2526797798c1SRalf Baechle 2527797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2528797798c1SRalf Baechle bool 25291da177e4SLinus Torvalds 25309693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 25319693a853SFranck Bui-Huu bool 25329693a853SFranck Bui-Huu 2533a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2534a6a4834cSSteven J. Hill bool 2535a6a4834cSSteven J. Hill 2536377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2537377cb1b6SRalf Baechle bool 2538377cb1b6SRalf Baechle help 2539377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2540377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2541377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2542377cb1b6SRalf Baechle 2543a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2544a5e9a69eSPaul Burton bool 2545a5e9a69eSPaul Burton 2546b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2547b4819b59SYoichi Yuasa def_bool y 2548f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2549b4819b59SYoichi Yuasa 2550d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2551d8cb4e11SRalf Baechle bool 2552d8cb4e11SRalf Baechle default y if SGI_IP27 2553d8cb4e11SRalf Baechle help 25543dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2555d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2556d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2557ad56b738SMike Rapoport See <file:Documentation/vm/numa.rst> for more. 2558d8cb4e11SRalf Baechle 2559b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2560b1c6cd42SAtsushi Nemoto bool 25617de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 256231473747SAtsushi Nemoto 2563d8cb4e11SRalf Baechleconfig NUMA 2564d8cb4e11SRalf Baechle bool "NUMA Support" 2565d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2566d8cb4e11SRalf Baechle help 2567d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2568d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2569d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2570d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2571d8cb4e11SRalf Baechle disabled. 2572d8cb4e11SRalf Baechle 2573d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2574d8cb4e11SRalf Baechle bool 2575d8cb4e11SRalf Baechle 25768c530ea3SMatt Redfearnconfig RELOCATABLE 25778c530ea3SMatt Redfearn bool "Relocatable kernel" 25783ff72be4SSteven J. Hill depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) 25798c530ea3SMatt Redfearn help 25808c530ea3SMatt Redfearn This builds a kernel image that retains relocation information 25818c530ea3SMatt Redfearn so it can be loaded someplace besides the default 1MB. 25828c530ea3SMatt Redfearn The relocations make the kernel binary about 15% larger, 25838c530ea3SMatt Redfearn but are discarded at runtime 25848c530ea3SMatt Redfearn 2585069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE 2586069fd766SMatt Redfearn hex "Relocation table size" 2587069fd766SMatt Redfearn depends on RELOCATABLE 2588069fd766SMatt Redfearn range 0x0 0x01000000 2589069fd766SMatt Redfearn default "0x00100000" 2590069fd766SMatt Redfearn ---help--- 2591069fd766SMatt Redfearn A table of relocation data will be appended to the kernel binary 2592069fd766SMatt Redfearn and parsed at boot to fix up the relocated kernel. 2593069fd766SMatt Redfearn 2594069fd766SMatt Redfearn This option allows the amount of space reserved for the table to be 2595069fd766SMatt Redfearn adjusted, although the default of 1Mb should be ok in most cases. 2596069fd766SMatt Redfearn 2597069fd766SMatt Redfearn The build will fail and a valid size suggested if this is too small. 2598069fd766SMatt Redfearn 2599069fd766SMatt Redfearn If unsure, leave at the default value. 2600069fd766SMatt Redfearn 2601405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE 2602405bc8fdSMatt Redfearn bool "Randomize the address of the kernel image" 2603405bc8fdSMatt Redfearn depends on RELOCATABLE 2604405bc8fdSMatt Redfearn ---help--- 2605405bc8fdSMatt Redfearn Randomizes the physical and virtual address at which the 2606405bc8fdSMatt Redfearn kernel image is loaded, as a security feature that 2607405bc8fdSMatt Redfearn deters exploit attempts relying on knowledge of the location 2608405bc8fdSMatt Redfearn of kernel internals. 2609405bc8fdSMatt Redfearn 2610405bc8fdSMatt Redfearn Entropy is generated using any coprocessor 0 registers available. 2611405bc8fdSMatt Redfearn 2612405bc8fdSMatt Redfearn The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2613405bc8fdSMatt Redfearn 2614405bc8fdSMatt Redfearn If unsure, say N. 2615405bc8fdSMatt Redfearn 2616405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET 2617405bc8fdSMatt Redfearn hex "Maximum kASLR offset" if EXPERT 2618405bc8fdSMatt Redfearn depends on RANDOMIZE_BASE 2619405bc8fdSMatt Redfearn range 0x0 0x40000000 if EVA || 64BIT 2620405bc8fdSMatt Redfearn range 0x0 0x08000000 2621405bc8fdSMatt Redfearn default "0x01000000" 2622405bc8fdSMatt Redfearn ---help--- 2623405bc8fdSMatt Redfearn When kASLR is active, this provides the maximum offset that will 2624405bc8fdSMatt Redfearn be applied to the kernel image. It should be set according to the 2625405bc8fdSMatt Redfearn amount of physical RAM available in the target system minus 2626405bc8fdSMatt Redfearn PHYSICAL_START and must be a power of 2. 2627405bc8fdSMatt Redfearn 2628405bc8fdSMatt Redfearn This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2629405bc8fdSMatt Redfearn EVA or 64-bit. The default is 16Mb. 2630405bc8fdSMatt Redfearn 2631c80d79d7SYasunori Gotoconfig NODES_SHIFT 2632c80d79d7SYasunori Goto int 2633c80d79d7SYasunori Goto default "6" 2634c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2635c80d79d7SYasunori Goto 263614f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 263714f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 263823021b2bSYang Shi depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) 263914f70012SDeng-Cheng Zhu default y 264014f70012SDeng-Cheng Zhu help 264114f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 264214f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 264314f70012SDeng-Cheng Zhu 2644b4819b59SYoichi Yuasasource "mm/Kconfig" 2645b4819b59SYoichi Yuasa 26461da177e4SLinus Torvaldsconfig SMP 26471da177e4SLinus Torvalds bool "Multi-Processing support" 2648e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2649e73ea273SRalf Baechle help 26501da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 26514a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 26524a474157SRobert Graffham than one CPU, say Y. 26531da177e4SLinus Torvalds 26544a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 26551da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 26561da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 26574a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 26581da177e4SLinus Torvalds will run faster if you say N here. 26591da177e4SLinus Torvalds 26601da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 26611da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 26621da177e4SLinus Torvalds 266303502faaSAdrian Bunk See also the SMP-HOWTO available at 266403502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 26651da177e4SLinus Torvalds 26661da177e4SLinus Torvalds If you don't know what to do here, say N. 26671da177e4SLinus Torvalds 26687840d618SMatt Redfearnconfig HOTPLUG_CPU 26697840d618SMatt Redfearn bool "Support for hot-pluggable CPUs" 26707840d618SMatt Redfearn depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 26717840d618SMatt Redfearn help 26727840d618SMatt Redfearn Say Y here to allow turning CPUs off and on. CPUs can be 26737840d618SMatt Redfearn controlled through /sys/devices/system/cpu. 26747840d618SMatt Redfearn (Note: power management support will enable this option 26757840d618SMatt Redfearn automatically on SMP systems. ) 26767840d618SMatt Redfearn Say N if you want to disable CPU hotplug. 26777840d618SMatt Redfearn 267887353d8aSRalf Baechleconfig SMP_UP 267987353d8aSRalf Baechle bool 268087353d8aSRalf Baechle 26814a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 26824a16ff4cSRalf Baechle bool 26834a16ff4cSRalf Baechle 26840ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 26850ee958e1SPaul Burton bool 26860ee958e1SPaul Burton 2687e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2688e73ea273SRalf Baechle bool 2689e73ea273SRalf Baechle 2690130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2691130e2fb7SRalf Baechle bool 2692130e2fb7SRalf Baechle 2693130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2694130e2fb7SRalf Baechle bool 2695130e2fb7SRalf Baechle 2696130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2697130e2fb7SRalf Baechle bool 2698130e2fb7SRalf Baechle 2699130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2700130e2fb7SRalf Baechle bool 2701130e2fb7SRalf Baechle 2702130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2703130e2fb7SRalf Baechle bool 2704130e2fb7SRalf Baechle 27051da177e4SLinus Torvaldsconfig NR_CPUS 2706a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2707a91796a9SJayachandran C range 2 256 27081da177e4SLinus Torvalds depends on SMP 2709130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2710130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2711130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2712130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2713130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 27141da177e4SLinus Torvalds help 27151da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 27161da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 27171da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 271872ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 271972ede9b1SAtsushi Nemoto and 2 for all others. 27201da177e4SLinus Torvalds 27211da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 272272ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 272372ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 272472ede9b1SAtsushi Nemoto power of two. 27251da177e4SLinus Torvalds 2726399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2727399aaa25SAl Cooper bool 2728399aaa25SAl Cooper 27297820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP_1024 27307820b84bSDavid Daney bool 27317820b84bSDavid Daney 27327820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP 27337820b84bSDavid Daney int 27347820b84bSDavid Daney depends on SMP 27357820b84bSDavid Daney default 1024 if MIPS_NR_CPU_NR_MAP_1024 27367820b84bSDavid Daney default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 27377820b84bSDavid Daney 27381723b4a3SAtsushi Nemoto# 27391723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 27401723b4a3SAtsushi Nemoto# 27411723b4a3SAtsushi Nemoto 27421723b4a3SAtsushi Nemotochoice 27431723b4a3SAtsushi Nemoto prompt "Timer frequency" 27441723b4a3SAtsushi Nemoto default HZ_250 27451723b4a3SAtsushi Nemoto help 27461723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 27471723b4a3SAtsushi Nemoto 274867596573SPaul Burton config HZ_24 274967596573SPaul Burton bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 275067596573SPaul Burton 27511723b4a3SAtsushi Nemoto config HZ_48 27520f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 27531723b4a3SAtsushi Nemoto 27541723b4a3SAtsushi Nemoto config HZ_100 27551723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 27561723b4a3SAtsushi Nemoto 27571723b4a3SAtsushi Nemoto config HZ_128 27581723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 27591723b4a3SAtsushi Nemoto 27601723b4a3SAtsushi Nemoto config HZ_250 27611723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 27621723b4a3SAtsushi Nemoto 27631723b4a3SAtsushi Nemoto config HZ_256 27641723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 27651723b4a3SAtsushi Nemoto 27661723b4a3SAtsushi Nemoto config HZ_1000 27671723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 27681723b4a3SAtsushi Nemoto 27691723b4a3SAtsushi Nemoto config HZ_1024 27701723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 27711723b4a3SAtsushi Nemoto 27721723b4a3SAtsushi Nemotoendchoice 27731723b4a3SAtsushi Nemoto 277467596573SPaul Burtonconfig SYS_SUPPORTS_24HZ 277567596573SPaul Burton bool 277667596573SPaul Burton 27771723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 27781723b4a3SAtsushi Nemoto bool 27791723b4a3SAtsushi Nemoto 27801723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 27811723b4a3SAtsushi Nemoto bool 27821723b4a3SAtsushi Nemoto 27831723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 27841723b4a3SAtsushi Nemoto bool 27851723b4a3SAtsushi Nemoto 27861723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 27871723b4a3SAtsushi Nemoto bool 27881723b4a3SAtsushi Nemoto 27891723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 27901723b4a3SAtsushi Nemoto bool 27911723b4a3SAtsushi Nemoto 27921723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 27931723b4a3SAtsushi Nemoto bool 27941723b4a3SAtsushi Nemoto 27951723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 27961723b4a3SAtsushi Nemoto bool 27971723b4a3SAtsushi Nemoto 27981723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 27991723b4a3SAtsushi Nemoto bool 280067596573SPaul Burton default y if !SYS_SUPPORTS_24HZ && \ 280167596573SPaul Burton !SYS_SUPPORTS_48HZ && \ 280267596573SPaul Burton !SYS_SUPPORTS_100HZ && \ 280367596573SPaul Burton !SYS_SUPPORTS_128HZ && \ 280467596573SPaul Burton !SYS_SUPPORTS_250HZ && \ 280567596573SPaul Burton !SYS_SUPPORTS_256HZ && \ 280667596573SPaul Burton !SYS_SUPPORTS_1000HZ && \ 28071723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 28081723b4a3SAtsushi Nemoto 28091723b4a3SAtsushi Nemotoconfig HZ 28101723b4a3SAtsushi Nemoto int 281167596573SPaul Burton default 24 if HZ_24 28121723b4a3SAtsushi Nemoto default 48 if HZ_48 28131723b4a3SAtsushi Nemoto default 100 if HZ_100 28141723b4a3SAtsushi Nemoto default 128 if HZ_128 28151723b4a3SAtsushi Nemoto default 250 if HZ_250 28161723b4a3SAtsushi Nemoto default 256 if HZ_256 28171723b4a3SAtsushi Nemoto default 1000 if HZ_1000 28181723b4a3SAtsushi Nemoto default 1024 if HZ_1024 28191723b4a3SAtsushi Nemoto 282096685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 282196685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 282296685b17SDeng-Cheng Zhu 2823e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 28241da177e4SLinus Torvalds 2825ea6e942bSAtsushi Nemotoconfig KEXEC 28267d60717eSKees Cook bool "Kexec system call" 28272965faa5SDave Young select KEXEC_CORE 2828ea6e942bSAtsushi Nemoto help 2829ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2830ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 28313dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2832ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2833ea6e942bSAtsushi Nemoto 283401dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2835ea6e942bSAtsushi Nemoto 2836ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2837ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2838bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2839bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2840bf220695SGeert Uytterhoeven made. 2841ea6e942bSAtsushi Nemoto 28427aa1c8f4SRalf Baechleconfig CRASH_DUMP 28437aa1c8f4SRalf Baechle bool "Kernel crash dumps" 28447aa1c8f4SRalf Baechle help 28457aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 28467aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 28477aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 28487aa1c8f4SRalf Baechle a specially reserved region and then later executed after 28497aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 28507aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 28517aa1c8f4SRalf Baechle PHYSICAL_START. 28527aa1c8f4SRalf Baechle 28537aa1c8f4SRalf Baechleconfig PHYSICAL_START 28547aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 28558bda3e26SMaciej W. Rozycki default "0xffffffff84000000" 28567aa1c8f4SRalf Baechle depends on CRASH_DUMP 28577aa1c8f4SRalf Baechle help 28587aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 28597aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 28607aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 28617aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 28627aa1c8f4SRalf Baechle passed to the panic-ed kernel). 28637aa1c8f4SRalf Baechle 2864ea6e942bSAtsushi Nemotoconfig SECCOMP 2865ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2866293c5bd1SRalf Baechle depends on PROC_FS 2867ea6e942bSAtsushi Nemoto default y 2868ea6e942bSAtsushi Nemoto help 2869ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2870ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2871ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2872ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2873ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2874ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2875ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2876ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2877ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2878ea6e942bSAtsushi Nemoto 2879ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2880ea6e942bSAtsushi Nemoto 2881597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 28820ce3417eSPaul Burton bool "Support for O32 binaries using 64-bit FP" 2883597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2884597ce172SPaul Burton help 2885597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2886597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2887597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2888597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2889597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2890597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2891597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2892597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2893597ce172SPaul Burton saying N here. 2894597ce172SPaul Burton 289506e2e882SPaul Burton Although binutils currently supports use of this flag the details 289606e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 289706e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 289806e2e882SPaul Burton behaviour before the details have been finalised, this option should 289906e2e882SPaul Burton be considered experimental and only enabled by those working upon 290006e2e882SPaul Burton said details. 290106e2e882SPaul Burton 290206e2e882SPaul Burton If unsure, say N. 2903597ce172SPaul Burton 2904f2ffa5abSDezhong Diaoconfig USE_OF 29050b3e06fdSJonas Gorski bool 2906f2ffa5abSDezhong Diao select OF 2907e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2908abd2363fSGrant Likely select IRQ_DOMAIN 2909f2ffa5abSDezhong Diao 29107fafb068SAndrew Brestickerconfig BUILTIN_DTB 29117fafb068SAndrew Bresticker bool 29127fafb068SAndrew Bresticker 29131da8f179SJonas Gorskichoice 29145b24d52cSJonas Gorski prompt "Kernel appended dtb support" if USE_OF 29151da8f179SJonas Gorski default MIPS_NO_APPENDED_DTB 29161da8f179SJonas Gorski 29171da8f179SJonas Gorski config MIPS_NO_APPENDED_DTB 29181da8f179SJonas Gorski bool "None" 29191da8f179SJonas Gorski help 29201da8f179SJonas Gorski Do not enable appended dtb support. 29211da8f179SJonas Gorski 292287db537dSAaro Koskinen config MIPS_ELF_APPENDED_DTB 292387db537dSAaro Koskinen bool "vmlinux" 292487db537dSAaro Koskinen help 292587db537dSAaro Koskinen With this option, the boot code will look for a device tree binary 292687db537dSAaro Koskinen DTB) included in the vmlinux ELF section .appended_dtb. By default 292787db537dSAaro Koskinen it is empty and the DTB can be appended using binutils command 292887db537dSAaro Koskinen objcopy: 292987db537dSAaro Koskinen 293087db537dSAaro Koskinen objcopy --update-section .appended_dtb=<filename>.dtb vmlinux 293187db537dSAaro Koskinen 293287db537dSAaro Koskinen This is meant as a backward compatiblity convenience for those 293387db537dSAaro Koskinen systems with a bootloader that can't be upgraded to accommodate 293487db537dSAaro Koskinen the documented boot protocol using a device tree. 293587db537dSAaro Koskinen 29361da8f179SJonas Gorski config MIPS_RAW_APPENDED_DTB 2937b8f54f2cSJonas Gorski bool "vmlinux.bin or vmlinuz.bin" 29381da8f179SJonas Gorski help 29391da8f179SJonas Gorski With this option, the boot code will look for a device tree binary 2940b8f54f2cSJonas Gorski DTB) appended to raw vmlinux.bin or vmlinuz.bin. 29411da8f179SJonas Gorski (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 29421da8f179SJonas Gorski 29431da8f179SJonas Gorski This is meant as a backward compatibility convenience for those 29441da8f179SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 29451da8f179SJonas Gorski the documented boot protocol using a device tree. 29461da8f179SJonas Gorski 29471da8f179SJonas Gorski Beware that there is very little in terms of protection against 29481da8f179SJonas Gorski this option being confused by leftover garbage in memory that might 29491da8f179SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 29501da8f179SJonas Gorski to vmlinux.bin. Do not leave this option active in a production kernel 29511da8f179SJonas Gorski if you don't intend to always append a DTB. 29521da8f179SJonas Gorskiendchoice 29531da8f179SJonas Gorski 29542024972eSJonas Gorskichoice 29552024972eSJonas Gorski prompt "Kernel command line type" if !CMDLINE_OVERRIDE 29562bcef9b4SJonas Gorski default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 29573f5f0a44SPaul Burton !MIPS_MALTA && \ 29582bcef9b4SJonas Gorski !CAVIUM_OCTEON_SOC 29592024972eSJonas Gorski default MIPS_CMDLINE_FROM_BOOTLOADER 29602024972eSJonas Gorski 29612024972eSJonas Gorski config MIPS_CMDLINE_FROM_DTB 29622024972eSJonas Gorski depends on USE_OF 29632024972eSJonas Gorski bool "Dtb kernel arguments if available" 29642024972eSJonas Gorski 29652024972eSJonas Gorski config MIPS_CMDLINE_DTB_EXTEND 29662024972eSJonas Gorski depends on USE_OF 29672024972eSJonas Gorski bool "Extend dtb kernel arguments with bootloader arguments" 29682024972eSJonas Gorski 29692024972eSJonas Gorski config MIPS_CMDLINE_FROM_BOOTLOADER 29702024972eSJonas Gorski bool "Bootloader kernel arguments if available" 2971ed47e153SRabin Vincent 2972ed47e153SRabin Vincent config MIPS_CMDLINE_BUILTIN_EXTEND 2973ed47e153SRabin Vincent depends on CMDLINE_BOOL 2974ed47e153SRabin Vincent bool "Extend builtin kernel arguments with bootloader arguments" 29752024972eSJonas Gorskiendchoice 29762024972eSJonas Gorski 29775e83d430SRalf Baechleendmenu 29785e83d430SRalf Baechle 29791df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 29801df0f0ffSAtsushi Nemoto bool 29811df0f0ffSAtsushi Nemoto default y 29821df0f0ffSAtsushi Nemoto 29831df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 29841df0f0ffSAtsushi Nemoto bool 29851df0f0ffSAtsushi Nemoto default y 29861df0f0ffSAtsushi Nemoto 2987e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT 2988e1e16115SAaro Koskinen bool 2989e1e16115SAaro Koskinen default y 2990e1e16115SAaro Koskinen 2991a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 2992a728ab52SKirill A. Shutemov int 29933377e227SAlex Belits default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 2994a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 2995a728ab52SKirill A. Shutemov default 2 2996a728ab52SKirill A. Shutemov 2997b6c3539bSRalf Baechlesource "init/Kconfig" 2998b6c3539bSRalf Baechle 2999dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 3000dc52ddc0SMatt Helsley 30011da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 30021da177e4SLinus Torvalds 30035e83d430SRalf Baechleconfig HW_HAS_EISA 30045e83d430SRalf Baechle bool 30051da177e4SLinus Torvaldsconfig HW_HAS_PCI 30061da177e4SLinus Torvalds bool 30071da177e4SLinus Torvalds 30081da177e4SLinus Torvaldsconfig PCI 30091da177e4SLinus Torvalds bool "Support for PCI controller" 30101da177e4SLinus Torvalds depends on HW_HAS_PCI 3011abb4ae46SRalf Baechle select PCI_DOMAINS 30121da177e4SLinus Torvalds help 30131da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 30141da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 30151da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 30161da177e4SLinus Torvalds say Y, otherwise N. 30171da177e4SLinus Torvalds 30180e476d91SHuacai Chenconfig HT_PCI 30190e476d91SHuacai Chen bool "Support for HT-linked PCI" 30200e476d91SHuacai Chen default y 30210e476d91SHuacai Chen depends on CPU_LOONGSON3 30220e476d91SHuacai Chen select PCI 30230e476d91SHuacai Chen select PCI_DOMAINS 30240e476d91SHuacai Chen help 30250e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 30260e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 30270e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 30280e476d91SHuacai Chen 30291da177e4SLinus Torvaldsconfig PCI_DOMAINS 30301da177e4SLinus Torvalds bool 30311da177e4SLinus Torvalds 303288555b48SPaul Burtonconfig PCI_DOMAINS_GENERIC 303388555b48SPaul Burton bool 303488555b48SPaul Burton 3035c5611df9SPaul Burtonconfig PCI_DRIVERS_GENERIC 303687dd9a4dSPaul Burton select PCI_DOMAINS_GENERIC if PCI_DOMAINS 3037c5611df9SPaul Burton bool 3038c5611df9SPaul Burton 3039c5611df9SPaul Burtonconfig PCI_DRIVERS_LEGACY 3040c5611df9SPaul Burton def_bool !PCI_DRIVERS_GENERIC 3041c5611df9SPaul Burton select NO_GENERIC_PCI_IOPORT_MAP 3042c5611df9SPaul Burton 30431da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 30441da177e4SLinus Torvalds 30451da177e4SLinus Torvalds# 30461da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 30471da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 30481da177e4SLinus Torvalds# users to choose the right thing ... 30491da177e4SLinus Torvalds# 30501da177e4SLinus Torvaldsconfig ISA 30511da177e4SLinus Torvalds bool 30521da177e4SLinus Torvalds 30531da177e4SLinus Torvaldsconfig EISA 30541da177e4SLinus Torvalds bool "EISA support" 30555e83d430SRalf Baechle depends on HW_HAS_EISA 30561da177e4SLinus Torvalds select ISA 3057aa414dffSRalf Baechle select GENERIC_ISA_DMA 30581da177e4SLinus Torvalds ---help--- 30591da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 30601da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 30611da177e4SLinus Torvalds 30621da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 30631da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 30641da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 30651da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 30661da177e4SLinus Torvalds 30671da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 30681da177e4SLinus Torvalds 30691da177e4SLinus Torvalds Otherwise, say N. 30701da177e4SLinus Torvalds 30711da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 30721da177e4SLinus Torvalds 30731da177e4SLinus Torvaldsconfig TC 30741da177e4SLinus Torvalds bool "TURBOchannel support" 30751da177e4SLinus Torvalds depends on MACH_DECSTATION 30761da177e4SLinus Torvalds help 307750a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 307850a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 307950a23e6eSJustin P. Mattock at: 308050a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 308150a23e6eSJustin P. Mattock and: 308250a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 308350a23e6eSJustin P. Mattock Linux driver support status is documented at: 308450a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 30851da177e4SLinus Torvalds 30861da177e4SLinus Torvaldsconfig MMU 30871da177e4SLinus Torvalds bool 30881da177e4SLinus Torvalds default y 30891da177e4SLinus Torvalds 3090109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MIN 3091109c32ffSMatt Redfearn default 12 if 64BIT 3092109c32ffSMatt Redfearn default 8 3093109c32ffSMatt Redfearn 3094109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MAX 3095109c32ffSMatt Redfearn default 18 if 64BIT 3096109c32ffSMatt Redfearn default 15 3097109c32ffSMatt Redfearn 3098109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3099109c32ffSMatt Redfearn default 8 3100109c32ffSMatt Redfearn 3101109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3102109c32ffSMatt Redfearn default 15 3103109c32ffSMatt Redfearn 3104d865bea4SRalf Baechleconfig I8253 3105d865bea4SRalf Baechle bool 3106798778b8SRussell King select CLKSRC_I8253 31072d02612fSThomas Gleixner select CLKEVT_I8253 31089726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 3109d865bea4SRalf Baechle 3110e05eb3f8SRalf Baechleconfig ZONE_DMA 3111e05eb3f8SRalf Baechle bool 3112e05eb3f8SRalf Baechle 3113cce335aeSRalf Baechleconfig ZONE_DMA32 3114cce335aeSRalf Baechle bool 3115cce335aeSRalf Baechle 31161da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 31171da177e4SLinus Torvalds 3118388b78adSAlexandre Bounineconfig RAPIDIO 311956abde72SAlexandre Bounine tristate "RapidIO support" 3120388b78adSAlexandre Bounine depends on PCI 3121388b78adSAlexandre Bounine default n 3122388b78adSAlexandre Bounine help 3123388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 3124388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 3125388b78adSAlexandre Bounine 3126388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 3127388b78adSAlexandre Bounine 31281da177e4SLinus Torvaldsendmenu 31291da177e4SLinus Torvalds 31301da177e4SLinus Torvaldsmenu "Executable file formats" 31311da177e4SLinus Torvalds 31321da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 31331da177e4SLinus Torvalds 31341da177e4SLinus Torvaldsconfig TRAD_SIGNALS 31351da177e4SLinus Torvalds bool 31361da177e4SLinus Torvalds 31371da177e4SLinus Torvaldsconfig MIPS32_COMPAT 313878aaf956SRalf Baechle bool 31391da177e4SLinus Torvalds 31401da177e4SLinus Torvaldsconfig COMPAT 31411da177e4SLinus Torvalds bool 31421da177e4SLinus Torvalds 314305e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 314405e43966SAtsushi Nemoto bool 314505e43966SAtsushi Nemoto 31461da177e4SLinus Torvaldsconfig MIPS32_O32 31471da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 314878aaf956SRalf Baechle depends on 64BIT 314978aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 315078aaf956SRalf Baechle select COMPAT 315178aaf956SRalf Baechle select MIPS32_COMPAT 315278aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31531da177e4SLinus Torvalds help 31541da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 31551da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 31561da177e4SLinus Torvalds existing binaries are in this format. 31571da177e4SLinus Torvalds 31581da177e4SLinus Torvalds If unsure, say Y. 31591da177e4SLinus Torvalds 31601da177e4SLinus Torvaldsconfig MIPS32_N32 31611da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 3162c22eacfeSRalf Baechle depends on 64BIT 316378aaf956SRalf Baechle select COMPAT 316478aaf956SRalf Baechle select MIPS32_COMPAT 316578aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31661da177e4SLinus Torvalds help 31671da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 31681da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 31691da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 31701da177e4SLinus Torvalds cases. 31711da177e4SLinus Torvalds 31721da177e4SLinus Torvalds If unsure, say N. 31731da177e4SLinus Torvalds 31741da177e4SLinus Torvaldsconfig BINFMT_ELF32 31751da177e4SLinus Torvalds bool 31761da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 3177f43edca7SRalf Baechle select ELFCORE 31781da177e4SLinus Torvalds 31792116245eSRalf Baechleendmenu 31801da177e4SLinus Torvalds 31812116245eSRalf Baechlemenu "Power management options" 3182952fa954SRodolfo Giometti 3183363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 3184363c55caSWu Zhangjin def_bool y 31853f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3186363c55caSWu Zhangjin 3187f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 3188f4cb5700SJohannes Berg def_bool y 31893f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3190f4cb5700SJohannes Berg 31912116245eSRalf Baechlesource "kernel/power/Kconfig" 3192952fa954SRodolfo Giometti 31931da177e4SLinus Torvaldsendmenu 31941da177e4SLinus Torvalds 31957a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 31967a998935SViresh Kumar bool 31977a998935SViresh Kumar 31987a998935SViresh Kumarmenu "CPU Power Management" 3199c095ebafSPaul Burton 3200c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 32017a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 32027a998935SViresh Kumarendif 32039726b43aSWu Zhangjin 3204c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 3205c095ebafSPaul Burton 3206c095ebafSPaul Burtonendmenu 3207c095ebafSPaul Burton 3208d5950b43SSam Ravnborgsource "net/Kconfig" 3209d5950b43SSam Ravnborg 32101da177e4SLinus Torvaldssource "drivers/Kconfig" 32111da177e4SLinus Torvalds 321298cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 321398cdee0eSRalf Baechle 32141da177e4SLinus Torvaldssource "fs/Kconfig" 32151da177e4SLinus Torvalds 32161da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 32171da177e4SLinus Torvalds 32181da177e4SLinus Torvaldssource "security/Kconfig" 32191da177e4SLinus Torvalds 32201da177e4SLinus Torvaldssource "crypto/Kconfig" 32211da177e4SLinus Torvalds 32221da177e4SLinus Torvaldssource "lib/Kconfig" 32232235a54dSSanjay Lal 32242235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 3225