11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 5393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 6c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 7f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 8ec7748b5SSam Ravnborg select HAVE_IDE 942d4b839SMathieu Desnoyers select HAVE_OPROFILE 107f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 117f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1288547001SJason Wessel select HAVE_ARCH_KGDB 13490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 14c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 157563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 16d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 1769a7d1b3SWu Zhangjin select HAVE_FUNCTION_TRACE_MCOUNT_TEST 18538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 19538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2064575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2129c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 22c1bf207dSDavid Daney select HAVE_KPROBES 23c1bf207dSDavid Daney select HAVE_KRETPROBES 24b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 251d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 26e26d196cSDavid Daney select ARCH_BINFMT_ELF_RANDOMIZE_PIE 27383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 2821a41faaSWu Zhangjin select RTC_LIB if !MACH_LOONGSON 292b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 307463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3148e1fd5aSDavid Daney select HAVE_DMA_ATTRS 3248e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 333bd27e32SDavid Daney select GENERIC_IRQ_PROBE 34f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3578857614SMarkos Chandras select GENERIC_PCI_IOMAP 3694bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 37c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 380f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 399d15ffc8STejun Heo select HAVE_MEMBLOCK 409d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 419d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 42360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 434b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 44cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 45cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 46786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 474febd95aSStephen Rothwell select VIRT_TO_BUS 482f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 492f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5050150d2bSAl Viro select CLONE_BACKWARDS 51d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5219952a92SKees Cook select HAVE_CC_STACKPROTECTOR 531da177e4SLinus Torvalds 541da177e4SLinus Torvaldsmenu "Machine selection" 551da177e4SLinus Torvalds 565e83d430SRalf Baechlechoice 575e83d430SRalf Baechle prompt "System type" 585e83d430SRalf Baechle default SGI_IP22 591da177e4SLinus Torvalds 6042a4f17dSManuel Laussconfig MIPS_ALCHEMY 61c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 6242a4f17dSManuel Lauss select 64BIT_PHYS_ADDR 63f772cdb2SRalf Baechle select CEVT_R4K 64d7ea335cSSteven J. Hill select CSRC_R4K 6542a4f17dSManuel Lauss select IRQ_CPU 66*88e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 6742a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 6842a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 6942a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 70efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 711b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 7237663860SManuel Lauss select USB_ARCH_HAS_OHCI 7337663860SManuel Lauss select USB_ARCH_HAS_EHCI 741da177e4SLinus Torvalds 757ca5dc14SFlorian Fainelliconfig AR7 767ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 777ca5dc14SFlorian Fainelli select BOOT_ELF32 787ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 797ca5dc14SFlorian Fainelli select CEVT_R4K 807ca5dc14SFlorian Fainelli select CSRC_R4K 817ca5dc14SFlorian Fainelli select IRQ_CPU 827ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 837ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 847ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 857ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 867ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 877ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 881b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 895f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 907ca5dc14SFlorian Fainelli select VLYNQ 918551fb64SYoichi Yuasa select HAVE_CLK 927ca5dc14SFlorian Fainelli help 937ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 947ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 957ca5dc14SFlorian Fainelli 96d4a67d9dSGabor Juhosconfig ATH79 97d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 986eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 99d4a67d9dSGabor Juhos select BOOT_RAW 100d4a67d9dSGabor Juhos select CEVT_R4K 101d4a67d9dSGabor Juhos select CSRC_R4K 102d4a67d9dSGabor Juhos select DMA_NONCOHERENT 10394638067SGabor Juhos select HAVE_CLK 1042c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 105d4a67d9dSGabor Juhos select IRQ_CPU 1060aabf1a4SGabor Juhos select MIPS_MACHINE 107d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 108d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 109d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 110d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 111d4a67d9dSGabor Juhos help 112d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 113d4a67d9dSGabor Juhos 1141c0c13ebSAurelien Jarnoconfig BCM47XX 115c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1162da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 117fe08f8c2SHauke Mehrtens select BOOT_RAW 11842f77542SRalf Baechle select CEVT_R4K 119940f6b48SRalf Baechle select CSRC_R4K 1201c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1211c0c13ebSAurelien Jarno select HW_HAS_PCI 1221c0c13ebSAurelien Jarno select IRQ_CPU 123314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 124dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1251c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1261c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 12725e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 128e1ccbb65SHauke Mehrtens select EARLY_PRINTK_8250 if EARLY_PRINTK 1291c0c13ebSAurelien Jarno help 1301c0c13ebSAurelien Jarno Support for BCM47XX based boards 1311c0c13ebSAurelien Jarno 132e7300d04SMaxime Bizonconfig BCM63XX 133e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 134ae8de61cSFlorian Fainelli select BOOT_RAW 135e7300d04SMaxime Bizon select CEVT_R4K 136e7300d04SMaxime Bizon select CSRC_R4K 137e7300d04SMaxime Bizon select DMA_NONCOHERENT 138e7300d04SMaxime Bizon select IRQ_CPU 139e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 140e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 141e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 142e7300d04SMaxime Bizon select SWAP_IO_SPACE 143e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 1443e82eeebSYoichi Yuasa select HAVE_CLK 145af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 146e7300d04SMaxime Bizon help 147e7300d04SMaxime Bizon Support for BCM63XX based boards 148e7300d04SMaxime Bizon 1491da177e4SLinus Torvaldsconfig MIPS_COBALT 1503fa986faSMartin Michlmayr bool "Cobalt Server" 15142f77542SRalf Baechle select CEVT_R4K 152940f6b48SRalf Baechle select CSRC_R4K 1531097c6acSYoichi Yuasa select CEVT_GT641XX 1541da177e4SLinus Torvalds select DMA_NONCOHERENT 1558a8594a7SYoichi Yuasa select EARLY_PRINTK_8250 if EARLY_PRINTK 1561da177e4SLinus Torvalds select HW_HAS_PCI 157d865bea4SRalf Baechle select I8253 1581da177e4SLinus Torvalds select I8259 1591da177e4SLinus Torvalds select IRQ_CPU 160d5ab1a69SYoichi Yuasa select IRQ_GT641XX 161252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 162e25bfc92SYoichi Yuasa select PCI 1637cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 1640a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 165ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1660e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 1675e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1681da177e4SLinus Torvalds 1691da177e4SLinus Torvaldsconfig MACH_DECSTATION 1703fa986faSMartin Michlmayr bool "DECstations" 1711da177e4SLinus Torvalds select BOOT_ELF32 1726457d9fcSYoichi Yuasa select CEVT_DS1287 17342f77542SRalf Baechle select CEVT_R4K 1744247417dSYoichi Yuasa select CSRC_IOASIC 175940f6b48SRalf Baechle select CSRC_R4K 17620d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 17720d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 17820d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 1791da177e4SLinus Torvalds select DMA_NONCOHERENT 180d388d685SMaciej W. Rozycki select NO_IOPORT 1811da177e4SLinus Torvalds select IRQ_CPU 1827cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 1837cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 184ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1857d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 1865e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1871723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 1881723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 1891723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 190930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 1915e83d430SRalf Baechle help 1921da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 1931da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 1941da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 1951da177e4SLinus Torvalds 1961da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 1971da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 1981da177e4SLinus Torvalds 1991da177e4SLinus Torvalds DECstation 5000/50 2001da177e4SLinus Torvalds DECstation 5000/150 2011da177e4SLinus Torvalds DECstation 5000/260 2021da177e4SLinus Torvalds DECsystem 5900/260 2031da177e4SLinus Torvalds 2041da177e4SLinus Torvalds otherwise choose R3000. 2051da177e4SLinus Torvalds 2065e83d430SRalf Baechleconfig MACH_JAZZ 2073fa986faSMartin Michlmayr bool "Jazz family of machines" 2080e2794b0SRalf Baechle select FW_ARC 2090e2794b0SRalf Baechle select FW_ARC32 2105e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 21142f77542SRalf Baechle select CEVT_R4K 212940f6b48SRalf Baechle select CSRC_R4K 213e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2145e83d430SRalf Baechle select GENERIC_ISA_DMA 2158a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 216ea202c63SThomas Bogendoerfer select IRQ_CPU 217d865bea4SRalf Baechle select I8253 2185e83d430SRalf Baechle select I8259 2195e83d430SRalf Baechle select ISA 2207cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2215e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2227d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2231723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2241da177e4SLinus Torvalds help 2255e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2265e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 227692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2285e83d430SRalf Baechle Olivetti M700-10 workstations. 2295e83d430SRalf Baechle 2305ebabe59SLars-Peter Clausenconfig MACH_JZ4740 2315ebabe59SLars-Peter Clausen bool "Ingenic JZ4740 based machines" 2325ebabe59SLars-Peter Clausen select SYS_HAS_CPU_MIPS32_R1 2335ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2345ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 235f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 2365ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 2375ebabe59SLars-Peter Clausen select IRQ_CPU 2385ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 2395ebabe59SLars-Peter Clausen select SYS_HAS_EARLY_PRINTK 2405ebabe59SLars-Peter Clausen select HAVE_PWM 241ab5330ebSMaurus Cuelenaere select HAVE_CLK 24283bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 2435ebabe59SLars-Peter Clausen 244171bb2f1SJohn Crispinconfig LANTIQ 245171bb2f1SJohn Crispin bool "Lantiq based platforms" 246171bb2f1SJohn Crispin select DMA_NONCOHERENT 247171bb2f1SJohn Crispin select IRQ_CPU 248171bb2f1SJohn Crispin select CEVT_R4K 249171bb2f1SJohn Crispin select CSRC_R4K 250171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 251171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 252171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 253171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 254171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 255171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 256171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 257171bb2f1SJohn Crispin select SWAP_IO_SPACE 258171bb2f1SJohn Crispin select BOOT_RAW 259287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 260287e3f3fSJohn Crispin select CLKDEV_LOOKUP 261a0392222SJohn Crispin select USE_OF 2623f8c50c9SJohn Crispin select PINCTRL 2633f8c50c9SJohn Crispin select PINCTRL_LANTIQ 264171bb2f1SJohn Crispin 2651f21d2bdSBrian Murphyconfig LASAT 2661f21d2bdSBrian Murphy bool "LASAT Networks platforms" 26742f77542SRalf Baechle select CEVT_R4K 268940f6b48SRalf Baechle select CSRC_R4K 2691f21d2bdSBrian Murphy select DMA_NONCOHERENT 2701f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 2711f21d2bdSBrian Murphy select HW_HAS_PCI 272a5ccfe5cSRalf Baechle select IRQ_CPU 2731f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 2741f21d2bdSBrian Murphy select MIPS_NILE4 2751f21d2bdSBrian Murphy select R5000_CPU_SCACHE 2761f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 2771f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 2781f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 2791f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 2801f21d2bdSBrian Murphy 28185749d24SWu Zhangjinconfig MACH_LOONGSON 28285749d24SWu Zhangjin bool "Loongson family of machines" 283c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 284ade299d8SYoichi Yuasa help 28585749d24SWu Zhangjin This enables the support of Loongson family of machines. 28685749d24SWu Zhangjin 28785749d24SWu Zhangjin Loongson is a family of general-purpose MIPS-compatible CPUs. 28885749d24SWu Zhangjin developed at Institute of Computing Technology (ICT), 28985749d24SWu Zhangjin Chinese Academy of Sciences (CAS) in the People's Republic 29085749d24SWu Zhangjin of China. The chief architect is Professor Weiwu Hu. 291ade299d8SYoichi Yuasa 292ca585cf9SKelvin Cheungconfig MACH_LOONGSON1 293ca585cf9SKelvin Cheung bool "Loongson 1 family of machines" 294ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 295ca585cf9SKelvin Cheung help 296ca585cf9SKelvin Cheung This enables support for the Loongson 1 based machines. 297ca585cf9SKelvin Cheung 298ca585cf9SKelvin Cheung Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by 299ca585cf9SKelvin Cheung the ICT (Institute of Computing Technology) and the Chinese Academy 300ca585cf9SKelvin Cheung of Sciences. 301ca585cf9SKelvin Cheung 3021da177e4SLinus Torvaldsconfig MIPS_MALTA 3033fa986faSMartin Michlmayr bool "MIPS Malta board" 30461ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 3051da177e4SLinus Torvalds select BOOT_ELF32 306fa71c960SRalf Baechle select BOOT_RAW 30742f77542SRalf Baechle select CEVT_R4K 308940f6b48SRalf Baechle select CSRC_R4K 309778eeb1bSSteven J. Hill select CSRC_GIC 310885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 3111da177e4SLinus Torvalds select GENERIC_ISA_DMA 3128a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 313aa414dffSRalf Baechle select IRQ_CPU 31439b8d525SRalf Baechle select IRQ_GIC 3151da177e4SLinus Torvalds select HW_HAS_PCI 316d865bea4SRalf Baechle select I8253 3171da177e4SLinus Torvalds select I8259 3185e83d430SRalf Baechle select MIPS_BONITO64 3199318c51aSChris Dearman select MIPS_CPU_SCACHE 320252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 3215e83d430SRalf Baechle select MIPS_MSC 3221da177e4SLinus Torvalds select SWAP_IO_SPACE 3237cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 3247cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 325bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 3267cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 3275d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 3287cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3297cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 330ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 331ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 3325e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 3335e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3340365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 335e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 336f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 3379693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 3381b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 3391da177e4SLinus Torvalds help 340f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 3411da177e4SLinus Torvalds board. 3421da177e4SLinus Torvalds 343ec47b274SSteven J. Hillconfig MIPS_SEAD3 344ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 345ec47b274SSteven J. Hill select BOOT_ELF32 346ec47b274SSteven J. Hill select BOOT_RAW 347ec47b274SSteven J. Hill select CEVT_R4K 348ec47b274SSteven J. Hill select CSRC_R4K 349dfa762e1SSteven J. Hill select CSRC_GIC 350ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 351ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 352ec47b274SSteven J. Hill select DMA_NONCOHERENT 353ec47b274SSteven J. Hill select IRQ_CPU 354ec47b274SSteven J. Hill select IRQ_GIC 35544327236SQais Yousef select LIBFDT 356ec47b274SSteven J. Hill select MIPS_MSC 357ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 358ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 359ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 360ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 361ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 362ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 363ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 364ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 365ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 366a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 367ec47b274SSteven J. Hill select USB_ARCH_HAS_EHCI 368ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 369ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 3709b731009SSteven J. Hill select USE_OF 371ec47b274SSteven J. Hill help 372ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 373ec47b274SSteven J. Hill board. 374ec47b274SSteven J. Hill 375a83860c2SRalf Baechleconfig NEC_MARKEINS 376a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 377a83860c2SRalf Baechle select SOC_EMMA2RH 378a83860c2SRalf Baechle select HW_HAS_PCI 379a83860c2SRalf Baechle help 380a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 381ade299d8SYoichi Yuasa 3825e83d430SRalf Baechleconfig MACH_VR41XX 38374142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 38442f77542SRalf Baechle select CEVT_R4K 385940f6b48SRalf Baechle select CSRC_R4K 3867cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 38727fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 3885e83d430SRalf Baechle 389edb6310aSDaniel Lairdconfig NXP_STB220 390edb6310aSDaniel Laird bool "NXP STB220 board" 391edb6310aSDaniel Laird select SOC_PNX833X 392edb6310aSDaniel Laird help 393edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 394edb6310aSDaniel Laird 395edb6310aSDaniel Lairdconfig NXP_STB225 396edb6310aSDaniel Laird bool "NXP 225 board" 397edb6310aSDaniel Laird select SOC_PNX833X 398edb6310aSDaniel Laird select SOC_PNX8335 399edb6310aSDaniel Laird help 400edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 401edb6310aSDaniel Laird 4029267a30dSMarc St-Jeanconfig PMC_MSP 4039267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 40439d30c13SAnoop P A select CEVT_R4K 40539d30c13SAnoop P A select CSRC_R4K 4069267a30dSMarc St-Jean select DMA_NONCOHERENT 4079267a30dSMarc St-Jean select SWAP_IO_SPACE 4089267a30dSMarc St-Jean select NO_EXCEPT_FILL 4099267a30dSMarc St-Jean select BOOT_RAW 4109267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 4119267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 4129267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 4139267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 4149267a30dSMarc St-Jean select IRQ_CPU 4159267a30dSMarc St-Jean select SERIAL_8250 4169267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 4179296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 4189296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 4199267a30dSMarc St-Jean help 4209267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 4219267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 4229267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 4239267a30dSMarc St-Jean a variety of MIPS cores. 4249267a30dSMarc St-Jean 425ae2b5bb6SJohn Crispinconfig RALINK 426ae2b5bb6SJohn Crispin bool "Ralink based machines" 427ae2b5bb6SJohn Crispin select CEVT_R4K 428ae2b5bb6SJohn Crispin select CSRC_R4K 429ae2b5bb6SJohn Crispin select BOOT_RAW 430ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 431ae2b5bb6SJohn Crispin select IRQ_CPU 432ae2b5bb6SJohn Crispin select USE_OF 433ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 434ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 435ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 436ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 437ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 438ae2b5bb6SJohn Crispin select HAVE_MACH_CLKDEV 439ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 4402a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 4412a153f1cSJohn Crispin select RESET_CONTROLLER 442ae2b5bb6SJohn Crispin 4431da177e4SLinus Torvaldsconfig SGI_IP22 4443fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 4450e2794b0SRalf Baechle select FW_ARC 4460e2794b0SRalf Baechle select FW_ARC32 4471da177e4SLinus Torvalds select BOOT_ELF32 44842f77542SRalf Baechle select CEVT_R4K 449940f6b48SRalf Baechle select CSRC_R4K 450e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 4511da177e4SLinus Torvalds select DMA_NONCOHERENT 4525e83d430SRalf Baechle select HW_HAS_EISA 453d865bea4SRalf Baechle select I8253 45468de4803SThomas Bogendoerfer select I8259 4551da177e4SLinus Torvalds select IP22_CPU_SCACHE 4561da177e4SLinus Torvalds select IRQ_CPU 457aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 458e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 459e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 46036e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 461e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 462e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 463e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 4641da177e4SLinus Torvalds select SWAP_IO_SPACE 4657cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 4667cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 4672b5e63f6SMartin Michlmayr # 4682b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 4692b5e63f6SMartin Michlmayr # memory during early boot on some machines. 4702b5e63f6SMartin Michlmayr # 4712b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 4722b5e63f6SMartin Michlmayr # for a more details discussion 4732b5e63f6SMartin Michlmayr # 4742b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 475ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 476ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4775e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 478930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 4791da177e4SLinus Torvalds help 4801da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 4811da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 4821da177e4SLinus Torvalds that runs on these, say Y here. 4831da177e4SLinus Torvalds 4841da177e4SLinus Torvaldsconfig SGI_IP27 4853fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 4860e2794b0SRalf Baechle select FW_ARC 4870e2794b0SRalf Baechle select FW_ARC64 4885e83d430SRalf Baechle select BOOT_ELF64 489e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 490634286f1SRalf Baechle select DMA_COHERENT 49136a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 4921da177e4SLinus Torvalds select HW_HAS_PCI 493130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 4947cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 495ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4965e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 497d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 4981a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 499930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 5001da177e4SLinus Torvalds help 5011da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 5021da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 5031da177e4SLinus Torvalds here. 5041da177e4SLinus Torvalds 505e2defae5SThomas Bogendoerferconfig SGI_IP28 5067d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 5070e2794b0SRalf Baechle select FW_ARC 5080e2794b0SRalf Baechle select FW_ARC64 509e2defae5SThomas Bogendoerfer select BOOT_ELF64 510e2defae5SThomas Bogendoerfer select CEVT_R4K 511e2defae5SThomas Bogendoerfer select CSRC_R4K 512e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 513e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 514e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 515e2defae5SThomas Bogendoerfer select IRQ_CPU 516e2defae5SThomas Bogendoerfer select HW_HAS_EISA 517e2defae5SThomas Bogendoerfer select I8253 518e2defae5SThomas Bogendoerfer select I8259 519e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 520e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 5215b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 522e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 523e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 524e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 525e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 526e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 5272b5e63f6SMartin Michlmayr # 5282b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5292b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5302b5e63f6SMartin Michlmayr # 5312b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5322b5e63f6SMartin Michlmayr # for a more details discussion 5332b5e63f6SMartin Michlmayr # 5342b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 535e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 536e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 537e2defae5SThomas Bogendoerfer help 538e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 539e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 540e2defae5SThomas Bogendoerfer 5411da177e4SLinus Torvaldsconfig SGI_IP32 542cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 5430e2794b0SRalf Baechle select FW_ARC 5440e2794b0SRalf Baechle select FW_ARC32 5451da177e4SLinus Torvalds select BOOT_ELF32 54642f77542SRalf Baechle select CEVT_R4K 547940f6b48SRalf Baechle select CSRC_R4K 5481da177e4SLinus Torvalds select DMA_NONCOHERENT 5491da177e4SLinus Torvalds select HW_HAS_PCI 550dd67b155SRalf Baechle select IRQ_CPU 5511da177e4SLinus Torvalds select R5000_CPU_SCACHE 5521da177e4SLinus Torvalds select RM7000_CPU_SCACHE 5537cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5547cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 5557cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 556dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 557ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5585e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5591da177e4SLinus Torvalds help 5601da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 5611da177e4SLinus Torvalds 562ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 563ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 5645e83d430SRalf Baechle select BOOT_ELF32 5655e83d430SRalf Baechle select DMA_COHERENT 5665e83d430SRalf Baechle select SIBYTE_BCM1120 5675e83d430SRalf Baechle select SWAP_IO_SPACE 5687cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5695e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5705e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5715e83d430SRalf Baechle 572ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 573ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 5745e83d430SRalf Baechle select BOOT_ELF32 5755e83d430SRalf Baechle select DMA_COHERENT 5765e83d430SRalf Baechle select SIBYTE_BCM1120 5775e83d430SRalf Baechle select SWAP_IO_SPACE 5787cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5795e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5805e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5815e83d430SRalf Baechle 5825e83d430SRalf Baechleconfig SIBYTE_CRHONE 5833fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 5845e83d430SRalf Baechle select BOOT_ELF32 5855e83d430SRalf Baechle select DMA_COHERENT 5865e83d430SRalf Baechle select SIBYTE_BCM1125 5875e83d430SRalf Baechle select SWAP_IO_SPACE 5887cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5895e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5905e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 5915e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5925e83d430SRalf Baechle 593ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 594ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 595ade299d8SYoichi Yuasa select BOOT_ELF32 596ade299d8SYoichi Yuasa select DMA_COHERENT 597ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 598ade299d8SYoichi Yuasa select SWAP_IO_SPACE 599ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 600ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 601ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 602ade299d8SYoichi Yuasa 603ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 604ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 605ade299d8SYoichi Yuasa select BOOT_ELF32 606ade299d8SYoichi Yuasa select DMA_COHERENT 607fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 608ade299d8SYoichi Yuasa select SIBYTE_SB1250 609ade299d8SYoichi Yuasa select SWAP_IO_SPACE 610ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 611ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 612ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 613ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 614cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 615ade299d8SYoichi Yuasa 616ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 617ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 618ade299d8SYoichi Yuasa select BOOT_ELF32 619ade299d8SYoichi Yuasa select DMA_COHERENT 620fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 621ade299d8SYoichi Yuasa select SIBYTE_SB1250 622ade299d8SYoichi Yuasa select SWAP_IO_SPACE 623ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 624ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 625ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 626ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 627ade299d8SYoichi Yuasa 628ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 629ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 630ade299d8SYoichi Yuasa select BOOT_ELF32 631ade299d8SYoichi Yuasa select DMA_COHERENT 632ade299d8SYoichi Yuasa select SIBYTE_SB1250 633ade299d8SYoichi Yuasa select SWAP_IO_SPACE 634ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 635ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 636ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 637ade299d8SYoichi Yuasa 638ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 639ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 640ade299d8SYoichi Yuasa select BOOT_ELF32 641ade299d8SYoichi Yuasa select DMA_COHERENT 642ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 643ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 644ade299d8SYoichi Yuasa select SWAP_IO_SPACE 645ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 646ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 647651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 648ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 649cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 650ade299d8SYoichi Yuasa 65114b36af4SThomas Bogendoerferconfig SNI_RM 65214b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 6530e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 6540e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 655aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 6565e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 6575e83d430SRalf Baechle select BOOT_ELF32 65842f77542SRalf Baechle select CEVT_R4K 659940f6b48SRalf Baechle select CSRC_R4K 660e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 6615e83d430SRalf Baechle select DMA_NONCOHERENT 6625e83d430SRalf Baechle select GENERIC_ISA_DMA 6638a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 6645e83d430SRalf Baechle select HW_HAS_EISA 6655e83d430SRalf Baechle select HW_HAS_PCI 666c066a32aSThomas Bogendoerfer select IRQ_CPU 667d865bea4SRalf Baechle select I8253 6685e83d430SRalf Baechle select I8259 6695e83d430SRalf Baechle select ISA 6704a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 6717cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6724a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 673c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 6744a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 67536a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 676ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 6777d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 6784a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 6795e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 6805e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6811da177e4SLinus Torvalds help 68214b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 68314b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 6845e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 6855e83d430SRalf Baechle support this machine type. 6861da177e4SLinus Torvalds 687edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 688edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 6895e83d430SRalf Baechle 690edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 691edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 69223fbee9dSRalf Baechle 69373b4390fSRalf Baechleconfig MIKROTIK_RB532 69473b4390fSRalf Baechle bool "Mikrotik RB532 boards" 69573b4390fSRalf Baechle select CEVT_R4K 69673b4390fSRalf Baechle select CSRC_R4K 69773b4390fSRalf Baechle select DMA_NONCOHERENT 69873b4390fSRalf Baechle select HW_HAS_PCI 69973b4390fSRalf Baechle select IRQ_CPU 70073b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 70173b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 70273b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 70373b4390fSRalf Baechle select SWAP_IO_SPACE 70473b4390fSRalf Baechle select BOOT_RAW 705d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 706930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 70773b4390fSRalf Baechle help 70873b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 70973b4390fSRalf Baechle based on the IDT RC32434 SoC. 71073b4390fSRalf Baechle 7119ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 7129ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 713a86c7f72SDavid Daney select CEVT_R4K 714a86c7f72SDavid Daney select 64BIT_PHYS_ADDR 715a86c7f72SDavid Daney select DMA_COHERENT 716a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 717a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 718f65aad41SRalf Baechle select EDAC_SUPPORT 719773cb77dSRalf Baechle select SYS_SUPPORTS_HOTPLUG_CPU 720a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 7215e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 722a86c7f72SDavid Daney select SWAP_IO_SPACE 723e8635b48SDavid Daney select HW_HAS_PCI 724f00e001eSDavid Daney select ZONE_DMA32 725340fbb8bSDavid Daney select USB_ARCH_HAS_OHCI 726340fbb8bSDavid Daney select USB_ARCH_HAS_EHCI 727465aaed0SDavid Daney select HOLES_IN_ZONE 72899cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 729a86c7f72SDavid Daney help 730a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 731a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 732a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 733a86c7f72SDavid Daney Some of the supported boards are: 734a86c7f72SDavid Daney EBT3000 735a86c7f72SDavid Daney EBH3000 736a86c7f72SDavid Daney EBH3100 737a86c7f72SDavid Daney Thunder 738a86c7f72SDavid Daney Kodama 739a86c7f72SDavid Daney Hikari 740a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 741a86c7f72SDavid Daney 7427f058e85SJayachandran Cconfig NLM_XLR_BOARD 7437f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 7447f058e85SJayachandran C select BOOT_ELF32 7457f058e85SJayachandran C select NLM_COMMON 7467f058e85SJayachandran C select SYS_HAS_CPU_XLR 7477f058e85SJayachandran C select SYS_SUPPORTS_SMP 7487f058e85SJayachandran C select HW_HAS_PCI 7497f058e85SJayachandran C select SWAP_IO_SPACE 7507f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7517f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7527f058e85SJayachandran C select 64BIT_PHYS_ADDR 7537f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7547f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 7557f058e85SJayachandran C select DMA_COHERENT 7567f058e85SJayachandran C select NR_CPUS_DEFAULT_32 7577f058e85SJayachandran C select CEVT_R4K 7587f058e85SJayachandran C select CSRC_R4K 7597f058e85SJayachandran C select IRQ_CPU 760b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7617f058e85SJayachandran C select SYNC_R4K 7627f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 763f35574a3SJayachandran C select USB_ARCH_HAS_OHCI if USB_SUPPORT 764f35574a3SJayachandran C select USB_ARCH_HAS_EHCI if USB_SUPPORT 7658f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7668f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7677f058e85SJayachandran C help 7687f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 7697f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 7707f058e85SJayachandran C 7711c773ea4SJayachandran Cconfig NLM_XLP_BOARD 7721c773ea4SJayachandran C bool "Netlogic XLP based systems" 7731c773ea4SJayachandran C select BOOT_ELF32 7741c773ea4SJayachandran C select NLM_COMMON 7751c773ea4SJayachandran C select SYS_HAS_CPU_XLP 7761c773ea4SJayachandran C select SYS_SUPPORTS_SMP 7771c773ea4SJayachandran C select HW_HAS_PCI 7781c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7791c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7801c773ea4SJayachandran C select 64BIT_PHYS_ADDR 7811c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7821c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 7831c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 7841c773ea4SJayachandran C select DMA_COHERENT 7851c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 7861c773ea4SJayachandran C select CEVT_R4K 7871c773ea4SJayachandran C select CSRC_R4K 7881c773ea4SJayachandran C select IRQ_CPU 789c24a8a7aSJayachandran C select ARCH_SUPPORTS_MSI 790b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7911c773ea4SJayachandran C select SYNC_R4K 7921c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 7932f6528e1SJayachandran C select USE_OF 7948f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7958f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7961c773ea4SJayachandran C help 7971c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 7981c773ea4SJayachandran C Say Y here if you have a XLP based board. 7991c773ea4SJayachandran C 8001da177e4SLinus Torvaldsendchoice 8011da177e4SLinus Torvalds 802e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 803d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 804a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 805e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 8065e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 8075ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 8088ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 8091f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 8100f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 811ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 81229c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 81338b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 81422b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 8155e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 816a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 81785749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig" 818ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig" 8197f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 82038b18f72SRalf Baechle 8215e83d430SRalf Baechleendmenu 8225e83d430SRalf Baechle 8231da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 8241da177e4SLinus Torvalds bool 8251da177e4SLinus Torvalds default y 8261da177e4SLinus Torvalds 8271da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 8281da177e4SLinus Torvalds bool 8291da177e4SLinus Torvalds 830f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 831f0d1b0b3SDavid Howells bool 832f0d1b0b3SDavid Howells default n 833f0d1b0b3SDavid Howells 834f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 835f0d1b0b3SDavid Howells bool 836f0d1b0b3SDavid Howells default n 837f0d1b0b3SDavid Howells 8383c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 8393c9ee7efSAkinobu Mita bool 8403c9ee7efSAkinobu Mita default y 8413c9ee7efSAkinobu Mita 8421da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 8431da177e4SLinus Torvalds bool 8441da177e4SLinus Torvalds default y 8451da177e4SLinus Torvalds 846ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 8471cc89038SAtsushi Nemoto bool 8481cc89038SAtsushi Nemoto default y 8491cc89038SAtsushi Nemoto 8501da177e4SLinus Torvalds# 8511da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 8521da177e4SLinus Torvalds# 8530e2794b0SRalf Baechleconfig FW_ARC 8541da177e4SLinus Torvalds bool 8551da177e4SLinus Torvalds 85661ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 85761ed242dSRalf Baechle bool 85861ed242dSRalf Baechle 8599267a30dSMarc St-Jeanconfig BOOT_RAW 8609267a30dSMarc St-Jean bool 8619267a30dSMarc St-Jean 862217dd11eSRalf Baechleconfig CEVT_BCM1480 863217dd11eSRalf Baechle bool 864217dd11eSRalf Baechle 8656457d9fcSYoichi Yuasaconfig CEVT_DS1287 8666457d9fcSYoichi Yuasa bool 8676457d9fcSYoichi Yuasa 8681097c6acSYoichi Yuasaconfig CEVT_GT641XX 8691097c6acSYoichi Yuasa bool 8701097c6acSYoichi Yuasa 87142f77542SRalf Baechleconfig CEVT_R4K 87242f77542SRalf Baechle bool 87342f77542SRalf Baechle 8740ab2b7d0SRaghu Gandhamconfig CEVT_GIC 875237036deSPaul Burton select MIPS_CM 8760ab2b7d0SRaghu Gandham bool 8770ab2b7d0SRaghu Gandham 878217dd11eSRalf Baechleconfig CEVT_SB1250 879217dd11eSRalf Baechle bool 880217dd11eSRalf Baechle 881229f773eSAtsushi Nemotoconfig CEVT_TXX9 882229f773eSAtsushi Nemoto bool 883229f773eSAtsushi Nemoto 884217dd11eSRalf Baechleconfig CSRC_BCM1480 885217dd11eSRalf Baechle bool 886217dd11eSRalf Baechle 8874247417dSYoichi Yuasaconfig CSRC_IOASIC 8884247417dSYoichi Yuasa bool 8894247417dSYoichi Yuasa 890940f6b48SRalf Baechleconfig CSRC_R4K 891940f6b48SRalf Baechle bool 892940f6b48SRalf Baechle 893778eeb1bSSteven J. Hillconfig CSRC_GIC 894237036deSPaul Burton select MIPS_CM 895778eeb1bSSteven J. Hill bool 896778eeb1bSSteven J. Hill 897217dd11eSRalf Baechleconfig CSRC_SB1250 898217dd11eSRalf Baechle bool 899217dd11eSRalf Baechle 900a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 9017444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 902a9aec7feSAtsushi Nemoto bool 903a9aec7feSAtsushi Nemoto 9040e2794b0SRalf Baechleconfig FW_CFE 905df78b5c8SAurelien Jarno bool 906df78b5c8SAurelien Jarno 9074bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 9084bafad92SFUJITA Tomonori def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT 9094bafad92SFUJITA Tomonori 910885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 911885014bcSFelix Fietkau select DMA_NONCOHERENT 912885014bcSFelix Fietkau bool 913885014bcSFelix Fietkau 9141da177e4SLinus Torvaldsconfig DMA_COHERENT 9151da177e4SLinus Torvalds bool 9161da177e4SLinus Torvalds 9171da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 9181da177e4SLinus Torvalds bool 919e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 9204ce588cdSRalf Baechle 921e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 9224ce588cdSRalf Baechle bool 9231da177e4SLinus Torvalds 92436a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 9251da177e4SLinus Torvalds bool 9261da177e4SLinus Torvalds 927dbb74540SRalf Baechleconfig HOTPLUG_CPU 9281b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 92940b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 9301b2bc75cSRalf Baechle help 9311b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 9321b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 9331b2bc75cSRalf Baechle (Note: power management support will enable this option 9341b2bc75cSRalf Baechle automatically on SMP systems. ) 9351b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 9361b2bc75cSRalf Baechle 9371b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 938dbb74540SRalf Baechle bool 939dbb74540SRalf Baechle 9401da177e4SLinus Torvaldsconfig I8259 9411da177e4SLinus Torvalds bool 9421da177e4SLinus Torvalds 9431da177e4SLinus Torvaldsconfig MIPS_BONITO64 9441da177e4SLinus Torvalds bool 9451da177e4SLinus Torvalds 9461da177e4SLinus Torvaldsconfig MIPS_MSC 9471da177e4SLinus Torvalds bool 9481da177e4SLinus Torvalds 9491f21d2bdSBrian Murphyconfig MIPS_NILE4 9501f21d2bdSBrian Murphy bool 9511f21d2bdSBrian Murphy 95239b8d525SRalf Baechleconfig SYNC_R4K 95339b8d525SRalf Baechle bool 95439b8d525SRalf Baechle 955487d70d0SGabor Juhosconfig MIPS_MACHINE 956487d70d0SGabor Juhos def_bool n 957487d70d0SGabor Juhos 958d388d685SMaciej W. Rozyckiconfig NO_IOPORT 959d388d685SMaciej W. Rozycki def_bool n 960d388d685SMaciej W. Rozycki 9618313da30SRalf Baechleconfig GENERIC_ISA_DMA 9628313da30SRalf Baechle bool 9638313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 964a35bee8aSNamhyung Kim select ISA_DMA_API 9658313da30SRalf Baechle 966aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 967aa414dffSRalf Baechle bool 9688313da30SRalf Baechle select GENERIC_ISA_DMA 969aa414dffSRalf Baechle 970a35bee8aSNamhyung Kimconfig ISA_DMA_API 971a35bee8aSNamhyung Kim bool 972a35bee8aSNamhyung Kim 973465aaed0SDavid Daneyconfig HOLES_IN_ZONE 974465aaed0SDavid Daney bool 975465aaed0SDavid Daney 9765e83d430SRalf Baechle# 9776b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 9785e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 9795e83d430SRalf Baechle# choice statement should be more obvious to the user. 9805e83d430SRalf Baechle# 9815e83d430SRalf Baechlechoice 9826b2aac42SMasanari Iida prompt "Endianness selection" 9831da177e4SLinus Torvalds help 9841da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 9855e83d430SRalf Baechle byte order. These modes require different kernels and a different 9863cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 9875e83d430SRalf Baechle particular system but some systems are just as commonly used in the 9883dde6ad8SDavid Sterba one or the other endianness. 9895e83d430SRalf Baechle 9905e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 9915e83d430SRalf Baechle bool "Big endian" 9925e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 9935e83d430SRalf Baechle 9945e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 9955e83d430SRalf Baechle bool "Little endian" 9965e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 9975e83d430SRalf Baechle 9985e83d430SRalf Baechleendchoice 9995e83d430SRalf Baechle 100022b0763aSDavid Daneyconfig EXPORT_UASM 100122b0763aSDavid Daney bool 100222b0763aSDavid Daney 10032116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 10042116245eSRalf Baechle bool 10052116245eSRalf Baechle 10065e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 10075e83d430SRalf Baechle bool 10085e83d430SRalf Baechle 10095e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 10105e83d430SRalf Baechle bool 10111da177e4SLinus Torvalds 10129cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 10139cffd154SDavid Daney bool 10149cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 10159cffd154SDavid Daney default y 10169cffd154SDavid Daney 1017aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1018aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1019aa1762f4SDavid Daney 10201da177e4SLinus Torvaldsconfig IRQ_CPU 10211da177e4SLinus Torvalds bool 10221da177e4SLinus Torvalds 10231da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 10241da177e4SLinus Torvalds bool 10251da177e4SLinus Torvalds 10269267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 10279267a30dSMarc St-Jean bool 10289267a30dSMarc St-Jean 10299267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 10309267a30dSMarc St-Jean bool 10319267a30dSMarc St-Jean 10328420fd00SAtsushi Nemotoconfig IRQ_TXX9 10338420fd00SAtsushi Nemoto bool 10348420fd00SAtsushi Nemoto 1035d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1036d5ab1a69SYoichi Yuasa bool 1037d5ab1a69SYoichi Yuasa 103839b8d525SRalf Baechleconfig IRQ_GIC 1039237036deSPaul Burton select MIPS_CM 104039b8d525SRalf Baechle bool 104139b8d525SRalf Baechle 1042252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 10431da177e4SLinus Torvalds bool 10441da177e4SLinus Torvalds 10459267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 10469267a30dSMarc St-Jean bool 10479267a30dSMarc St-Jean 1048a83860c2SRalf Baechleconfig SOC_EMMA2RH 1049a83860c2SRalf Baechle bool 1050a83860c2SRalf Baechle select CEVT_R4K 1051a83860c2SRalf Baechle select CSRC_R4K 1052a83860c2SRalf Baechle select DMA_NONCOHERENT 1053a83860c2SRalf Baechle select IRQ_CPU 1054a83860c2SRalf Baechle select SWAP_IO_SPACE 1055a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1056a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1057a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1058a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1059a83860c2SRalf Baechle 1060edb6310aSDaniel Lairdconfig SOC_PNX833X 1061edb6310aSDaniel Laird bool 1062edb6310aSDaniel Laird select CEVT_R4K 1063edb6310aSDaniel Laird select CSRC_R4K 1064edb6310aSDaniel Laird select IRQ_CPU 1065edb6310aSDaniel Laird select DMA_NONCOHERENT 1066edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1067edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1068edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1069edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1070edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1071edb6310aSDaniel Laird 1072edb6310aSDaniel Lairdconfig SOC_PNX8335 1073edb6310aSDaniel Laird bool 1074edb6310aSDaniel Laird select SOC_PNX833X 1075edb6310aSDaniel Laird 10761da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 10771da177e4SLinus Torvalds bool 10781da177e4SLinus Torvalds 1079e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1080e2defae5SThomas Bogendoerfer bool 1081e2defae5SThomas Bogendoerfer 10825b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 10835b438c44SThomas Bogendoerfer bool 10845b438c44SThomas Bogendoerfer 1085e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1086e2defae5SThomas Bogendoerfer bool 1087e2defae5SThomas Bogendoerfer 1088e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1089e2defae5SThomas Bogendoerfer bool 1090e2defae5SThomas Bogendoerfer 1091e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1092e2defae5SThomas Bogendoerfer bool 1093e2defae5SThomas Bogendoerfer 1094e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1095e2defae5SThomas Bogendoerfer bool 1096e2defae5SThomas Bogendoerfer 1097e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1098e2defae5SThomas Bogendoerfer bool 1099e2defae5SThomas Bogendoerfer 11000e2794b0SRalf Baechleconfig FW_ARC32 11015e83d430SRalf Baechle bool 11025e83d430SRalf Baechle 1103aaa9fad3SPaul Bolleconfig FW_SNIPROM 1104231a35d3SThomas Bogendoerfer bool 1105231a35d3SThomas Bogendoerfer 11061da177e4SLinus Torvaldsconfig BOOT_ELF32 11071da177e4SLinus Torvalds bool 11081da177e4SLinus Torvalds 1109930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1110930beb5aSFlorian Fainelli bool 1111930beb5aSFlorian Fainelli 1112930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1113930beb5aSFlorian Fainelli bool 1114930beb5aSFlorian Fainelli 1115930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1116930beb5aSFlorian Fainelli bool 1117930beb5aSFlorian Fainelli 1118930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1119930beb5aSFlorian Fainelli bool 1120930beb5aSFlorian Fainelli 11211da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 11221da177e4SLinus Torvalds int 1123a4c0201eSFlorian Fainelli default "4" if MIPS_L1_CACHE_SHIFT_4 1124a4c0201eSFlorian Fainelli default "5" if MIPS_L1_CACHE_SHIFT_5 1125a4c0201eSFlorian Fainelli default "6" if MIPS_L1_CACHE_SHIFT_6 1126a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 11271da177e4SLinus Torvalds default "5" 11281da177e4SLinus Torvalds 11291da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 11301da177e4SLinus Torvalds bool 11311da177e4SLinus Torvalds 11321da177e4SLinus Torvaldsconfig ARC_CONSOLE 11331da177e4SLinus Torvalds bool "ARC console support" 1134e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 11351da177e4SLinus Torvalds 11361da177e4SLinus Torvaldsconfig ARC_MEMORY 11371da177e4SLinus Torvalds bool 113814b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 11391da177e4SLinus Torvalds default y 11401da177e4SLinus Torvalds 11411da177e4SLinus Torvaldsconfig ARC_PROMLIB 11421da177e4SLinus Torvalds bool 1143e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 11441da177e4SLinus Torvalds default y 11451da177e4SLinus Torvalds 11460e2794b0SRalf Baechleconfig FW_ARC64 11471da177e4SLinus Torvalds bool 11481da177e4SLinus Torvalds 11491da177e4SLinus Torvaldsconfig BOOT_ELF64 11501da177e4SLinus Torvalds bool 11511da177e4SLinus Torvalds 11521da177e4SLinus Torvaldsmenu "CPU selection" 11531da177e4SLinus Torvalds 11541da177e4SLinus Torvaldschoice 11551da177e4SLinus Torvalds prompt "CPU type" 11561da177e4SLinus Torvalds default CPU_R4X00 11571da177e4SLinus Torvalds 11583702bba5SWu Zhangjinconfig CPU_LOONGSON2E 11593702bba5SWu Zhangjin bool "Loongson 2E" 11603702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 11613702bba5SWu Zhangjin select CPU_LOONGSON2 11622a21c730SFuxin Zhang help 11632a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 11642a21c730SFuxin Zhang with many extensions. 11652a21c730SFuxin Zhang 116625985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 11676f7a251aSWu Zhangjin bonito64. 11686f7a251aSWu Zhangjin 11696f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 11706f7a251aSWu Zhangjin bool "Loongson 2F" 11716f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 11726f7a251aSWu Zhangjin select CPU_LOONGSON2 1173c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 11746f7a251aSWu Zhangjin help 11756f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 11766f7a251aSWu Zhangjin with many extensions. 11776f7a251aSWu Zhangjin 11786f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 11796f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 11806f7a251aSWu Zhangjin Loongson2E. 11816f7a251aSWu Zhangjin 1182ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1183ca585cf9SKelvin Cheung bool "Loongson 1B" 1184ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1185ca585cf9SKelvin Cheung select CPU_LOONGSON1 1186ca585cf9SKelvin Cheung help 1187ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1188ca585cf9SKelvin Cheung release 2 instruction set. 1189ca585cf9SKelvin Cheung 11906e760c8dSRalf Baechleconfig CPU_MIPS32_R1 11916e760c8dSRalf Baechle bool "MIPS32 Release 1" 11927cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 11936e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1194797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1195ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 11966e760c8dSRalf Baechle help 11975e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 11981e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 11991e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12001e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12011e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12021e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 12031e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 12041e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 12051e5f1caaSRalf Baechle performance. 12061e5f1caaSRalf Baechle 12071e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 12081e5f1caaSRalf Baechle bool "MIPS32 Release 2" 12097cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 12101e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1211797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1212ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1213a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 12142235a54dSSanjay Lal select HAVE_KVM 12151e5f1caaSRalf Baechle help 12165e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 12176e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12186e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12196e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12206e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12211da177e4SLinus Torvalds 12226e760c8dSRalf Baechleconfig CPU_MIPS64_R1 12236e760c8dSRalf Baechle bool "MIPS64 Release 1" 12247cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1225797798c1SRalf Baechle select CPU_HAS_PREFETCH 1226ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1227ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1228ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12299cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 12306e760c8dSRalf Baechle help 12316e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 12326e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12336e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12346e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12356e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12361e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 12371e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 12381e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 12391e5f1caaSRalf Baechle performance. 12401e5f1caaSRalf Baechle 12411e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 12421e5f1caaSRalf Baechle bool "MIPS64 Release 2" 12437cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1244797798c1SRalf Baechle select CPU_HAS_PREFETCH 12451e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 12461e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1247ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12489cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1249a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 12501e5f1caaSRalf Baechle help 12511e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 12521e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12531e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12541e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12551e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12561da177e4SLinus Torvalds 12571da177e4SLinus Torvaldsconfig CPU_R3000 12581da177e4SLinus Torvalds bool "R3000" 12597cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1260f7062ddbSRalf Baechle select CPU_HAS_WB 1261ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1262797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12631da177e4SLinus Torvalds help 12641da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 12651da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 12661da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 12671da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 12681da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 12691da177e4SLinus Torvalds try to recompile with R3000. 12701da177e4SLinus Torvalds 12711da177e4SLinus Torvaldsconfig CPU_TX39XX 12721da177e4SLinus Torvalds bool "R39XX" 12737cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1274ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 12751da177e4SLinus Torvalds 12761da177e4SLinus Torvaldsconfig CPU_VR41XX 12771da177e4SLinus Torvalds bool "R41xx" 12787cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1279ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1280ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 12811da177e4SLinus Torvalds help 12825e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 12831da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 12841da177e4SLinus Torvalds kernel built with this option will not run on any other type of 12851da177e4SLinus Torvalds processor or vice versa. 12861da177e4SLinus Torvalds 12871da177e4SLinus Torvaldsconfig CPU_R4300 12881da177e4SLinus Torvalds bool "R4300" 12897cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1290ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1291ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 12921da177e4SLinus Torvalds help 12931da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 12941da177e4SLinus Torvalds 12951da177e4SLinus Torvaldsconfig CPU_R4X00 12961da177e4SLinus Torvalds bool "R4x00" 12977cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1298ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1299ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1300970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13011da177e4SLinus Torvalds help 13021da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 13031da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 13041da177e4SLinus Torvalds 13051da177e4SLinus Torvaldsconfig CPU_TX49XX 13061da177e4SLinus Torvalds bool "R49XX" 13077cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1308de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1309ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1310ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1311970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13121da177e4SLinus Torvalds 13131da177e4SLinus Torvaldsconfig CPU_R5000 13141da177e4SLinus Torvalds bool "R5000" 13157cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1316ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1317ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1318970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13191da177e4SLinus Torvalds help 13201da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 13211da177e4SLinus Torvalds 13221da177e4SLinus Torvaldsconfig CPU_R5432 13231da177e4SLinus Torvalds bool "R5432" 13247cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 13255e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 13265e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1327970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13281da177e4SLinus Torvalds 1329542c1020SShinya Kuribayashiconfig CPU_R5500 1330542c1020SShinya Kuribayashi bool "R5500" 1331542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1332542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1333542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 13349cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1335542c1020SShinya Kuribayashi help 1336542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1337542c1020SShinya Kuribayashi instruction set. 1338542c1020SShinya Kuribayashi 13391da177e4SLinus Torvaldsconfig CPU_R6000 13401da177e4SLinus Torvalds bool "R6000" 13417cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1342ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 13431da177e4SLinus Torvalds help 13441da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1345c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 13461da177e4SLinus Torvalds 13471da177e4SLinus Torvaldsconfig CPU_NEVADA 13481da177e4SLinus Torvalds bool "RM52xx" 13497cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1350ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1351ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1352970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13531da177e4SLinus Torvalds help 13541da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 13551da177e4SLinus Torvalds 13561da177e4SLinus Torvaldsconfig CPU_R8000 13571da177e4SLinus Torvalds bool "R8000" 13587cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 13595e83d430SRalf Baechle select CPU_HAS_PREFETCH 1360ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 13611da177e4SLinus Torvalds help 13621da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 13631da177e4SLinus Torvalds uncommon and the support for them is incomplete. 13641da177e4SLinus Torvalds 13651da177e4SLinus Torvaldsconfig CPU_R10000 13661da177e4SLinus Torvalds bool "R10000" 13677cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 13685e83d430SRalf Baechle select CPU_HAS_PREFETCH 1369ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1370ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1371797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1372970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13731da177e4SLinus Torvalds help 13741da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 13751da177e4SLinus Torvalds 13761da177e4SLinus Torvaldsconfig CPU_RM7000 13771da177e4SLinus Torvalds bool "RM7000" 13787cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 13795e83d430SRalf Baechle select CPU_HAS_PREFETCH 1380ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1381ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1382797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1383970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13841da177e4SLinus Torvalds 13851da177e4SLinus Torvaldsconfig CPU_SB1 13861da177e4SLinus Torvalds bool "SB1" 13877cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1388ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1389ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1390797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1391970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13920004a9dfSRalf Baechle select WEAK_ORDERING 13931da177e4SLinus Torvalds 1394a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1395a86c7f72SDavid Daney bool "Cavium Octeon processor" 13965e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 13977ee91de4SYoichi Yuasa select ARCH_SPARSEMEM_ENABLE 1398a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1399a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1400a86c7f72SDavid Daney select SYS_SUPPORTS_SMP 1401a86c7f72SDavid Daney select NR_CPUS_DEFAULT_16 1402a86c7f72SDavid Daney select WEAK_ORDERING 1403a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 14049cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14057ed18152SDavid Daney select LIBFDT 14067ed18152SDavid Daney select USE_OF 14079296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 1408930beb5aSFlorian Fainelli select SYS_HAS_DMA_OPS 1409930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1410a86c7f72SDavid Daney help 1411a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1412a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1413a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1414a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1415a86c7f72SDavid Daney 1416cd746249SJonas Gorskiconfig CPU_BMIPS 1417cd746249SJonas Gorski bool "Broadcom BMIPS" 1418cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1419cd746249SJonas Gorski select CPU_MIPS32 1420fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1421cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1422cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1423cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1424cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1425cd746249SJonas Gorski select DMA_NONCOHERENT 1426cd746249SJonas Gorski select IRQ_CPU 1427cd746249SJonas Gorski select SWAP_IO_SPACE 1428cd746249SJonas Gorski select WEAK_ORDERING 1429c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 143069aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1431c1c0c461SKevin Cernekee help 1432fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1433c1c0c461SKevin Cernekee 14347f058e85SJayachandran Cconfig CPU_XLR 14357f058e85SJayachandran C bool "Netlogic XLR SoC" 14367f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 14377f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14387f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14397f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1440970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14417f058e85SJayachandran C select WEAK_ORDERING 14427f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14437f058e85SJayachandran C help 14447f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 14451c773ea4SJayachandran C 14461c773ea4SJayachandran Cconfig CPU_XLP 14471c773ea4SJayachandran C bool "Netlogic XLP SoC" 14481c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 14491c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14501c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14511c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 14521c773ea4SJayachandran C select WEAK_ORDERING 14531c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14541c773ea4SJayachandran C select CPU_HAS_PREFETCH 1455d6504846SJayachandran C select CPU_MIPSR2 14561c773ea4SJayachandran C help 14571c773ea4SJayachandran C Netlogic Microsystems XLP processors. 14581da177e4SLinus Torvaldsendchoice 14591da177e4SLinus Torvalds 1460a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1461a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1462a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 1463a6e18781SLeonid Yegoshin depends on CPU_MIPS32_R2 1464a6e18781SLeonid Yegoshin help 1465a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1466a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1467a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1468a6e18781SLeonid Yegoshin 1469a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1470a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1471a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1472a6e18781SLeonid Yegoshin select EVA 1473a6e18781SLeonid Yegoshin default y 1474a6e18781SLeonid Yegoshin help 1475a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1476a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1477a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1478a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1479a6e18781SLeonid Yegoshin 1480622844bfSWu Zhangjinif CPU_LOONGSON2F 1481622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1482622844bfSWu Zhangjin bool 1483622844bfSWu Zhangjin 1484622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1485622844bfSWu Zhangjin bool 1486622844bfSWu Zhangjin 1487622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1488622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1489622844bfSWu Zhangjin default y 1490622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1491622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1492622844bfSWu Zhangjin help 1493622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1494622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1495622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1496622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1497622844bfSWu Zhangjin 1498622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1499622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1500622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1501622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1502622844bfSWu Zhangjin systems. 1503622844bfSWu Zhangjin 1504622844bfSWu Zhangjin If unsure, please say Y. 1505622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1506622844bfSWu Zhangjin 15071b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 15081b93b3c3SWu Zhangjin bool 15091b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 15101b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 151131c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 15121b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1513fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 15144e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 15151b93b3c3SWu Zhangjin 15161b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 15171b93b3c3SWu Zhangjin bool 15181b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 15191b93b3c3SWu Zhangjin 15203702bba5SWu Zhangjinconfig CPU_LOONGSON2 15213702bba5SWu Zhangjin bool 15223702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 15233702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 15243702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1525970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15263702bba5SWu Zhangjin 1527ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1528ca585cf9SKelvin Cheung bool 1529ca585cf9SKelvin Cheung select CPU_MIPS32 1530ca585cf9SKelvin Cheung select CPU_MIPSR2 1531ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1532ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1533ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1534ca585cf9SKelvin Cheung 1535fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 153604fa8bf7SJonas Gorski select SMP_UP if SMP 15371bbb6c1bSKevin Cernekee bool 1538cd746249SJonas Gorski 1539cd746249SJonas Gorskiconfig CPU_BMIPS4350 1540cd746249SJonas Gorski bool 1541cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1542cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1543cd746249SJonas Gorski 1544cd746249SJonas Gorskiconfig CPU_BMIPS4380 1545cd746249SJonas Gorski bool 1546cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1547cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1548cd746249SJonas Gorski 1549cd746249SJonas Gorskiconfig CPU_BMIPS5000 1550cd746249SJonas Gorski bool 1551cd746249SJonas Gorski select MIPS_CPU_SCACHE 1552cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1553cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 15541bbb6c1bSKevin Cernekee 15553702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 15562a21c730SFuxin Zhang bool 15572a21c730SFuxin Zhang 15586f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 15596f7a251aSWu Zhangjin bool 156055045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 156155045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 156222f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 15636f7a251aSWu Zhangjin 1564ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1565ca585cf9SKelvin Cheung bool 1566ca585cf9SKelvin Cheung 15677cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 15687cf8053bSRalf Baechle bool 15697cf8053bSRalf Baechle 15707cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 15717cf8053bSRalf Baechle bool 15727cf8053bSRalf Baechle 1573a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1574a6e18781SLeonid Yegoshin bool 1575a6e18781SLeonid Yegoshin 15767cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 15777cf8053bSRalf Baechle bool 15787cf8053bSRalf Baechle 15797cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 15807cf8053bSRalf Baechle bool 15817cf8053bSRalf Baechle 15827cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 15837cf8053bSRalf Baechle bool 15847cf8053bSRalf Baechle 15857cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 15867cf8053bSRalf Baechle bool 15877cf8053bSRalf Baechle 15887cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 15897cf8053bSRalf Baechle bool 15907cf8053bSRalf Baechle 15917cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 15927cf8053bSRalf Baechle bool 15937cf8053bSRalf Baechle 15947cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 15957cf8053bSRalf Baechle bool 15967cf8053bSRalf Baechle 15977cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 15987cf8053bSRalf Baechle bool 15997cf8053bSRalf Baechle 16007cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 16017cf8053bSRalf Baechle bool 16027cf8053bSRalf Baechle 16037cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 16047cf8053bSRalf Baechle bool 16057cf8053bSRalf Baechle 1606542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1607542c1020SShinya Kuribayashi bool 1608542c1020SShinya Kuribayashi 16097cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 16107cf8053bSRalf Baechle bool 16117cf8053bSRalf Baechle 16127cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 16137cf8053bSRalf Baechle bool 16147cf8053bSRalf Baechle 16157cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 16167cf8053bSRalf Baechle bool 16177cf8053bSRalf Baechle 16187cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 16197cf8053bSRalf Baechle bool 16207cf8053bSRalf Baechle 16217cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 16227cf8053bSRalf Baechle bool 16237cf8053bSRalf Baechle 16247cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 16257cf8053bSRalf Baechle bool 16267cf8053bSRalf Baechle 16275e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 16285e683389SDavid Daney bool 16295e683389SDavid Daney 1630cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1631c1c0c461SKevin Cernekee bool 1632c1c0c461SKevin Cernekee 1633fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1634c1c0c461SKevin Cernekee bool 1635cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1636c1c0c461SKevin Cernekee 1637c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1638c1c0c461SKevin Cernekee bool 1639cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1640c1c0c461SKevin Cernekee 1641c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1642c1c0c461SKevin Cernekee bool 1643cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1644c1c0c461SKevin Cernekee 1645c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1646c1c0c461SKevin Cernekee bool 1647cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1648c1c0c461SKevin Cernekee 16497f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 16507f058e85SJayachandran C bool 16517f058e85SJayachandran C 16521c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 16531c773ea4SJayachandran C bool 16541c773ea4SJayachandran C 165517099b11SRalf Baechle# 165617099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 165717099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 165817099b11SRalf Baechle# 16590004a9dfSRalf Baechleconfig WEAK_ORDERING 16600004a9dfSRalf Baechle bool 166117099b11SRalf Baechle 166217099b11SRalf Baechle# 166317099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 166417099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 166517099b11SRalf Baechle# 166617099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 166717099b11SRalf Baechle bool 16685e83d430SRalf Baechleendmenu 16695e83d430SRalf Baechle 16705e83d430SRalf Baechle# 16715e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 16725e83d430SRalf Baechle# 16735e83d430SRalf Baechleconfig CPU_MIPS32 16745e83d430SRalf Baechle bool 16755e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 16765e83d430SRalf Baechle 16775e83d430SRalf Baechleconfig CPU_MIPS64 16785e83d430SRalf Baechle bool 16795e83d430SRalf Baechle default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 16805e83d430SRalf Baechle 16815e83d430SRalf Baechle# 1682c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 16835e83d430SRalf Baechle# 16845e83d430SRalf Baechleconfig CPU_MIPSR1 16855e83d430SRalf Baechle bool 16865e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 16875e83d430SRalf Baechle 16885e83d430SRalf Baechleconfig CPU_MIPSR2 16895e83d430SRalf Baechle bool 1690a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 16915e83d430SRalf Baechle 1692a6e18781SLeonid Yegoshinconfig EVA 1693a6e18781SLeonid Yegoshin bool 1694a6e18781SLeonid Yegoshin 16955e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 16965e83d430SRalf Baechle bool 16975e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 16985e83d430SRalf Baechle bool 16995e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 17005e83d430SRalf Baechle bool 17015e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 17025e83d430SRalf Baechle bool 170355045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 170455045ff5SWu Zhangjin bool 170555045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 170655045ff5SWu Zhangjin bool 17079cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 17089cffd154SDavid Daney bool 170922f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 171022f1fdfdSWu Zhangjin bool 171182622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 171282622284SDavid Daney bool 1713d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 17145e83d430SRalf Baechle 17158192c9eaSDavid Daney# 17168192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 17178192c9eaSDavid Daney# 17188192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 17198192c9eaSDavid Daney bool 1720f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 17218192c9eaSDavid Daney 17225e83d430SRalf Baechlemenu "Kernel type" 17235e83d430SRalf Baechle 17245e83d430SRalf Baechlechoice 17255e83d430SRalf Baechle prompt "Kernel code model" 17265e83d430SRalf Baechle help 17275e83d430SRalf Baechle You should only select this option if you have a workload that 17285e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 17295e83d430SRalf Baechle large memory. You will only be presented a single option in this 17305e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 17315e83d430SRalf Baechle 17325e83d430SRalf Baechleconfig 32BIT 17335e83d430SRalf Baechle bool "32-bit kernel" 17345e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 17355e83d430SRalf Baechle select TRAD_SIGNALS 17365e83d430SRalf Baechle help 17375e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 17385e83d430SRalf Baechleconfig 64BIT 17395e83d430SRalf Baechle bool "64-bit kernel" 17405e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 17415e83d430SRalf Baechle help 17425e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 17435e83d430SRalf Baechle 17445e83d430SRalf Baechleendchoice 17455e83d430SRalf Baechle 17462235a54dSSanjay Lalconfig KVM_GUEST 17472235a54dSSanjay Lal bool "KVM Guest Kernel" 1748f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 17492235a54dSSanjay Lal help 17502235a54dSSanjay Lal Select this option if building a guest kernel for KVM (Trap & Emulate) mode 17512235a54dSSanjay Lal 17522235a54dSSanjay Lalconfig KVM_HOST_FREQ 17532235a54dSSanjay Lal int "KVM Host Processor Frequency (MHz)" 17542235a54dSSanjay Lal depends on KVM_GUEST 17552235a54dSSanjay Lal default 500 17562235a54dSSanjay Lal help 17572235a54dSSanjay Lal Select this option if building a guest kernel for KVM to skip 17582235a54dSSanjay Lal RTC emulation when determining guest CPU Frequency. Instead, the guest 17592235a54dSSanjay Lal processor frequency is automatically derived from the host frequency. 17602235a54dSSanjay Lal 17611da177e4SLinus Torvaldschoice 17621da177e4SLinus Torvalds prompt "Kernel page size" 17631da177e4SLinus Torvalds default PAGE_SIZE_4KB 17641da177e4SLinus Torvalds 17651da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 17661da177e4SLinus Torvalds bool "4kB" 1767315fe625SWu Zhangjin depends on !CPU_LOONGSON2 17681da177e4SLinus Torvalds help 17691da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 17701da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 17711da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 17721da177e4SLinus Torvalds recommended for low memory systems. 17731da177e4SLinus Torvalds 17741da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 17751da177e4SLinus Torvalds bool "8kB" 17767d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 17771da177e4SLinus Torvalds help 17781da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 17791da177e4SLinus Torvalds the price of higher memory consumption. This option is available 1780c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 1781c52399beSRalf Baechle suitable Linux distribution to support this. 17821da177e4SLinus Torvalds 17831da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 17841da177e4SLinus Torvalds bool "16kB" 1785714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 17861da177e4SLinus Torvalds help 17871da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 17881da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 1789714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 1790714bfad6SRalf Baechle Linux distribution to support this. 17911da177e4SLinus Torvalds 1792c52399beSRalf Baechleconfig PAGE_SIZE_32KB 1793c52399beSRalf Baechle bool "32kB" 1794c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 1795c52399beSRalf Baechle help 1796c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 1797c52399beSRalf Baechle the price of higher memory consumption. This option is available 1798c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 1799c52399beSRalf Baechle distribution to support this. 1800c52399beSRalf Baechle 18011da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 18021da177e4SLinus Torvalds bool "64kB" 18037d60717eSKees Cook depends on !CPU_R3000 && !CPU_TX39XX 18041da177e4SLinus Torvalds help 18051da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 18061da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 18071da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 1808714bfad6SRalf Baechle writing this option is still high experimental. 18091da177e4SLinus Torvalds 18101da177e4SLinus Torvaldsendchoice 18111da177e4SLinus Torvalds 1812c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 1813c9bace7cSDavid Daney int "Maximum zone order" 181485f993b8SDavid Daney range 14 64 if HUGETLB_PAGE && PAGE_SIZE_64KB 181585f993b8SDavid Daney default "14" if HUGETLB_PAGE && PAGE_SIZE_64KB 181685f993b8SDavid Daney range 13 64 if HUGETLB_PAGE && PAGE_SIZE_32KB 181785f993b8SDavid Daney default "13" if HUGETLB_PAGE && PAGE_SIZE_32KB 181885f993b8SDavid Daney range 12 64 if HUGETLB_PAGE && PAGE_SIZE_16KB 181985f993b8SDavid Daney default "12" if HUGETLB_PAGE && PAGE_SIZE_16KB 1820c9bace7cSDavid Daney range 11 64 1821c9bace7cSDavid Daney default "11" 1822c9bace7cSDavid Daney help 1823c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 1824c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 1825c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 1826c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 1827c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 1828c9bace7cSDavid Daney increase this value. 1829c9bace7cSDavid Daney 1830c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 1831c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 1832c9bace7cSDavid Daney 1833c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 1834c9bace7cSDavid Daney when choosing a value for this option. 1835c9bace7cSDavid Daney 18360ab2b7d0SRaghu Gandhamconfig CEVT_GIC 18370ab2b7d0SRaghu Gandham bool "Use GIC global counter for clock events" 18380ab2b7d0SRaghu Gandham depends on IRQ_GIC && !(MIPS_SEAD3 || MIPS_MT_SMTC) 18390ab2b7d0SRaghu Gandham help 18400ab2b7d0SRaghu Gandham Use the GIC global counter for the clock events. The R4K clock 18410ab2b7d0SRaghu Gandham event driver is always present, so if the platform ends up not 18420ab2b7d0SRaghu Gandham detecting a GIC, it will fall back to the R4K timer for the 18430ab2b7d0SRaghu Gandham generation of clock events. 18440ab2b7d0SRaghu Gandham 18451da177e4SLinus Torvaldsconfig BOARD_SCACHE 18461da177e4SLinus Torvalds bool 18471da177e4SLinus Torvalds 18481da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 18491da177e4SLinus Torvalds bool 18501da177e4SLinus Torvalds select BOARD_SCACHE 18511da177e4SLinus Torvalds 18529318c51aSChris Dearman# 18539318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 18549318c51aSChris Dearman# 18559318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 18569318c51aSChris Dearman bool 18579318c51aSChris Dearman select BOARD_SCACHE 1858930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_6 18599318c51aSChris Dearman 18601da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 18611da177e4SLinus Torvalds bool 18621da177e4SLinus Torvalds select BOARD_SCACHE 18631da177e4SLinus Torvalds 18641da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 18651da177e4SLinus Torvalds bool 18661da177e4SLinus Torvalds select BOARD_SCACHE 18671da177e4SLinus Torvalds 18681da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 18691da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 18701da177e4SLinus Torvalds depends on CPU_SB1 18711da177e4SLinus Torvalds help 18721da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 18731da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 18741da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 18751da177e4SLinus Torvalds 18761da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 1877c8094b53SRalf Baechle bool 18781da177e4SLinus Torvalds 18793165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 18803165c846SFlorian Fainelli bool 18813165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 18823165c846SFlorian Fainelli 188391405eb6SFlorian Fainelliconfig CPU_R4K_FPU 188491405eb6SFlorian Fainelli bool 188591405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 188691405eb6SFlorian Fainelli 188762cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 188862cedc4fSFlorian Fainelli bool 188962cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 189062cedc4fSFlorian Fainelli 1891340ee4b9SRalf Baechlechoice 1892340ee4b9SRalf Baechle prompt "MIPS MT options" 1893f41ae0b2SRalf Baechle 1894f41ae0b2SRalf Baechleconfig MIPS_MT_DISABLED 1895c080faa5SSteven J. Hill bool "Disable multithreading support" 1896f41ae0b2SRalf Baechle help 1897c080faa5SSteven J. Hill Use this option if your platform does not support the MT ASE 1898c080faa5SSteven J. Hill which is hardware multithreading support. On systems without 1899c080faa5SSteven J. Hill an MT-enabled processor, this will be the only option that is 1900c080faa5SSteven J. Hill available in this menu. 1901340ee4b9SRalf Baechle 190259d6ab86SRalf Baechleconfig MIPS_MT_SMP 190359d6ab86SRalf Baechle bool "Use 1 TC on each available VPE for SMP" 190459d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 190559d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 1906d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1907c080faa5SSteven J. Hill select SYNC_R4K 190859d6ab86SRalf Baechle select MIPS_MT 190959d6ab86SRalf Baechle select SMP 191087353d8aSRalf Baechle select SMP_UP 1911c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 1912c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 1913399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 191459d6ab86SRalf Baechle help 1915c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 1916c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 1917c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 1918c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 1919c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 192059d6ab86SRalf Baechle 192141c594abSRalf Baechleconfig MIPS_MT_SMTC 1922c080faa5SSteven J. Hill bool "Use all TCs on all VPEs for SMP (DEPRECATED)" 1923f41ae0b2SRalf Baechle depends on CPU_MIPS32_R2 1924f41ae0b2SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 19250ee958e1SPaul Burton depends on !MIPS_CPS 1926f7062ddbSRalf Baechle select CPU_MIPSR2_IRQ_VI 1927d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1928f41ae0b2SRalf Baechle select MIPS_MT 192941c594abSRalf Baechle select SMP 193087353d8aSRalf Baechle select SMP_UP 1931c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 1932c080faa5SSteven J. Hill select NR_CPUS_DEFAULT_8 1933f41ae0b2SRalf Baechle help 1934c080faa5SSteven J. Hill This is a kernel model which is known as SMTC. This is 1935c080faa5SSteven J. Hill supported on cores with the MT ASE and presents all TCs 1936c080faa5SSteven J. Hill available on all VPEs to support SMP. For further 1937c080faa5SSteven J. Hill information see <http://www.linux-mips.org/wiki/34K#SMTC>. 193841c594abSRalf Baechle 1939340ee4b9SRalf Baechleendchoice 1940340ee4b9SRalf Baechle 1941f41ae0b2SRalf Baechleconfig MIPS_MT 1942f41ae0b2SRalf Baechle bool 1943f41ae0b2SRalf Baechle 19440ab7aefcSRalf Baechleconfig SCHED_SMT 19450ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 19460ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 19470ab7aefcSRalf Baechle default n 19480ab7aefcSRalf Baechle help 19490ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 19500ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 19510ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 19520ab7aefcSRalf Baechle 19530ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 19540ab7aefcSRalf Baechle bool 19550ab7aefcSRalf Baechle 1956f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 1957f41ae0b2SRalf Baechle bool 1958f41ae0b2SRalf Baechle 1959f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 1960f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 1961f088fc84SRalf Baechle default y 196207cc0c9eSRalf Baechle depends on MIPS_MT_SMP || MIPS_MT_SMTC 196307cc0c9eSRalf Baechle 196407cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 196507cc0c9eSRalf Baechle bool "VPE loader support." 1966704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 196707cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 196807cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 196907cc0c9eSRalf Baechle select MIPS_MT 197007cc0c9eSRalf Baechle help 197107cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 197207cc0c9eSRalf Baechle onto another VPE and running it. 1973f088fc84SRalf Baechle 197417a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 197517a1d523SDeng-Cheng Zhu bool 197617a1d523SDeng-Cheng Zhu default "y" 197717a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 197817a1d523SDeng-Cheng Zhu 19791a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 19801a2a6d7eSDeng-Cheng Zhu bool 19811a2a6d7eSDeng-Cheng Zhu default "y" 19821a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 19831a2a6d7eSDeng-Cheng Zhu 19840db34215SKevin D. Kissellconfig MIPS_MT_SMTC_IM_BACKSTOP 19850db34215SKevin D. Kissell bool "Use per-TC register bits as backstop for inhibited IM bits" 19860db34215SKevin D. Kissell depends on MIPS_MT_SMTC 19878531a35eSKevin D. Kissell default n 19880db34215SKevin D. Kissell help 19890db34215SKevin D. Kissell To support multiple TC microthreads acting as "CPUs" within 19900db34215SKevin D. Kissell a VPE, VPE-wide interrupt mask bits must be specially manipulated 19910db34215SKevin D. Kissell during interrupt handling. To support legacy drivers and interrupt 19920db34215SKevin D. Kissell controller management code, SMTC has a "backstop" to track and 19930db34215SKevin D. Kissell if necessary restore the interrupt mask. This has some performance 19948531a35eSKevin D. Kissell impact on interrupt service overhead. 19950db34215SKevin D. Kissell 1996f571eff0SKevin D. Kissellconfig MIPS_MT_SMTC_IRQAFF 1997f571eff0SKevin D. Kissell bool "Support IRQ affinity API" 1998f571eff0SKevin D. Kissell depends on MIPS_MT_SMTC 1999f571eff0SKevin D. Kissell default n 2000f571eff0SKevin D. Kissell help 2001f571eff0SKevin D. Kissell Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.) 2002f571eff0SKevin D. Kissell for SMTC Linux kernel. Requires platform support, of which 2003f571eff0SKevin D. Kissell an example can be found in the MIPS kernel i8259 and Malta 20048531a35eSKevin D. Kissell platform code. Adds some overhead to interrupt dispatch, and 20058531a35eSKevin D. Kissell should be used only if you know what you are doing. 2006f571eff0SKevin D. Kissell 2007e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2008e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2009e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2010e01402b1SRalf Baechle default y 2011e01402b1SRalf Baechle help 2012e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2013e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2014e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2015e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2016e01402b1SRalf Baechle 2017e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2018e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2019e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 20205e83d430SRalf Baechle help 2021e01402b1SRalf Baechle 2022da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2023da615cf6SDeng-Cheng Zhu bool 2024da615cf6SDeng-Cheng Zhu default "y" 2025da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2026da615cf6SDeng-Cheng Zhu 20272c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 20282c973ef0SDeng-Cheng Zhu bool 20292c973ef0SDeng-Cheng Zhu default "y" 20302c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 20312c973ef0SDeng-Cheng Zhu 20324a16ff4cSRalf Baechleconfig MIPS_CMP 20335cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 2034a6ce202eSPaul Burton depends on SYS_SUPPORTS_MIPS_CMP && !MIPS_MT_SMTC 203572e20142SPaul Burton select MIPS_GIC_IPI 2036eb9b5141STim Anderson select SYNC_R4K 20374a16ff4cSRalf Baechle select WEAK_ORDERING 20384a16ff4cSRalf Baechle default n 20394a16ff4cSRalf Baechle help 2040044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2041044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2042044505c7SPaul Burton its ability to start secondary CPUs. 20434a16ff4cSRalf Baechle 20445cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 20455cac93b3SPaul Burton instead of this. 20465cac93b3SPaul Burton 20470ee958e1SPaul Burtonconfig MIPS_CPS 20480ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 20490ee958e1SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 20500ee958e1SPaul Burton select MIPS_CM 20510ee958e1SPaul Burton select MIPS_CPC 20520ee958e1SPaul Burton select MIPS_GIC_IPI 20530ee958e1SPaul Burton select SMP 20540ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 20550ee958e1SPaul Burton select SYS_SUPPORTS_SMP 20560ee958e1SPaul Burton select WEAK_ORDERING 20570ee958e1SPaul Burton help 20580ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 20590ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 20600ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 20610ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 20620ee958e1SPaul Burton support is unavailable. 20630ee958e1SPaul Burton 206472e20142SPaul Burtonconfig MIPS_GIC_IPI 206572e20142SPaul Burton bool 206672e20142SPaul Burton 20679f98f3ddSPaul Burtonconfig MIPS_CM 20689f98f3ddSPaul Burton bool 20699f98f3ddSPaul Burton 20709c38cf44SPaul Burtonconfig MIPS_CPC 20719c38cf44SPaul Burton bool 20729c38cf44SPaul Burton 20731da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 20741da177e4SLinus Torvalds bool 20751da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 20761da177e4SLinus Torvalds default y 20771da177e4SLinus Torvalds 20781da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 20791da177e4SLinus Torvalds bool 20801da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 20811da177e4SLinus Torvalds default y 20821da177e4SLinus Torvalds 20831da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 20841da177e4SLinus Torvalds bool 20851da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 20861da177e4SLinus Torvalds default y 20871da177e4SLinus Torvalds 20882235a54dSSanjay Lal 20891da177e4SLinus Torvaldsconfig 64BIT_PHYS_ADDR 2090d806cb2bSRalf Baechle bool 20911da177e4SLinus Torvalds 209260ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 209360ec6571Spascal@pabr.org def_bool 64BIT_PHYS_ADDR 209460ec6571Spascal@pabr.org 20959693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 20969693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 20979693a853SFranck Bui-Huu bool "Support for the SmartMIPS ASE" 20989693a853SFranck Bui-Huu help 20999693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 21009693a853SFranck Bui-Huu increased security at both hardware and software level for 21019693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 21029693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 21039693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 21049693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 21059693a853SFranck Bui-Huu here. 21069693a853SFranck Bui-Huu 2107bce86083SSteven J. Hillconfig CPU_MICROMIPS 2108bce86083SSteven J. Hill depends on SYS_SUPPORTS_MICROMIPS 2109bce86083SSteven J. Hill bool "Build kernel using microMIPS ISA" 2110bce86083SSteven J. Hill help 2111bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2112bce86083SSteven J. Hill microMIPS ISA 2113bce86083SSteven J. Hill 2114a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 2115a5e9a69eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2116a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 2117a5e9a69eSPaul Burton default y 2118a5e9a69eSPaul Burton help 2119a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2120a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 21211db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 21221db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 21231db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 21241db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 21251db1af84SPaul Burton the size & complexity of your kernel. 2126a5e9a69eSPaul Burton 2127a5e9a69eSPaul Burton If unsure, say Y. 2128a5e9a69eSPaul Burton 21291da177e4SLinus Torvaldsconfig CPU_HAS_WB 2130f7062ddbSRalf Baechle bool 2131e01402b1SRalf Baechle 2132df0ac8a4SKevin Cernekeeconfig XKS01 2133df0ac8a4SKevin Cernekee bool 2134df0ac8a4SKevin Cernekee 2135f41ae0b2SRalf Baechle# 2136f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2137f41ae0b2SRalf Baechle# 2138e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2139f41ae0b2SRalf Baechle bool 2140e01402b1SRalf Baechle 2141f41ae0b2SRalf Baechle# 2142f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2143f41ae0b2SRalf Baechle# 2144e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2145f41ae0b2SRalf Baechle bool 2146e01402b1SRalf Baechle 21471da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 21481da177e4SLinus Torvalds bool 21491da177e4SLinus Torvalds depends on !CPU_R3000 21501da177e4SLinus Torvalds default y 21511da177e4SLinus Torvalds 21521da177e4SLinus Torvalds# 215320d60d99SMaciej W. Rozycki# CPU non-features 215420d60d99SMaciej W. Rozycki# 215520d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 215620d60d99SMaciej W. Rozycki bool 215720d60d99SMaciej W. Rozycki 215820d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 215920d60d99SMaciej W. Rozycki bool 216020d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 216120d60d99SMaciej W. Rozycki 216220d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 216320d60d99SMaciej W. Rozycki bool 216420d60d99SMaciej W. Rozycki 216520d60d99SMaciej W. Rozycki# 21661da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 21671da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 21681da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 21691da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 21701da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 21711da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 21721da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 21731da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2174797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2175797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2176797798c1SRalf Baechle# support. 21771da177e4SLinus Torvalds# 21781da177e4SLinus Torvaldsconfig HIGHMEM 21791da177e4SLinus Torvalds bool "High Memory Support" 2180a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2181797798c1SRalf Baechle 2182797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2183797798c1SRalf Baechle bool 2184797798c1SRalf Baechle 2185797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2186797798c1SRalf Baechle bool 21871da177e4SLinus Torvalds 21889693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 21899693a853SFranck Bui-Huu bool 21909693a853SFranck Bui-Huu 2191a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2192a6a4834cSSteven J. Hill bool 2193a6a4834cSSteven J. Hill 2194a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2195a5e9a69eSPaul Burton bool 2196a5e9a69eSPaul Burton 2197b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2198b4819b59SYoichi Yuasa def_bool y 2199f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2200b4819b59SYoichi Yuasa 2201d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2202d8cb4e11SRalf Baechle bool 2203d8cb4e11SRalf Baechle default y if SGI_IP27 2204d8cb4e11SRalf Baechle help 22053dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2206d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2207d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2208d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2209d8cb4e11SRalf Baechle 2210b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2211b1c6cd42SAtsushi Nemoto bool 22127de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 221331473747SAtsushi Nemoto 2214d8cb4e11SRalf Baechleconfig NUMA 2215d8cb4e11SRalf Baechle bool "NUMA Support" 2216d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2217d8cb4e11SRalf Baechle help 2218d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2219d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2220d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2221d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2222d8cb4e11SRalf Baechle disabled. 2223d8cb4e11SRalf Baechle 2224d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2225d8cb4e11SRalf Baechle bool 2226d8cb4e11SRalf Baechle 2227c80d79d7SYasunori Gotoconfig NODES_SHIFT 2228c80d79d7SYasunori Goto int 2229c80d79d7SYasunori Goto default "6" 2230c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2231c80d79d7SYasunori Goto 223214f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 223314f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 22344be3d2f3SZi Shen Lim depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) 223514f70012SDeng-Cheng Zhu default y 223614f70012SDeng-Cheng Zhu help 223714f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 223814f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 223914f70012SDeng-Cheng Zhu 2240b4819b59SYoichi Yuasasource "mm/Kconfig" 2241b4819b59SYoichi Yuasa 22421da177e4SLinus Torvaldsconfig SMP 22431da177e4SLinus Torvalds bool "Multi-Processing support" 2244e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2245e73ea273SRalf Baechle help 22461da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 22474a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 22484a474157SRobert Graffham than one CPU, say Y. 22491da177e4SLinus Torvalds 22504a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 22511da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 22521da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 22534a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 22541da177e4SLinus Torvalds will run faster if you say N here. 22551da177e4SLinus Torvalds 22561da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 22571da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 22581da177e4SLinus Torvalds 225903502faaSAdrian Bunk See also the SMP-HOWTO available at 226003502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 22611da177e4SLinus Torvalds 22621da177e4SLinus Torvalds If you don't know what to do here, say N. 22631da177e4SLinus Torvalds 226487353d8aSRalf Baechleconfig SMP_UP 226587353d8aSRalf Baechle bool 226687353d8aSRalf Baechle 22674a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 22684a16ff4cSRalf Baechle bool 22694a16ff4cSRalf Baechle 22700ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 22710ee958e1SPaul Burton bool 22720ee958e1SPaul Burton 2273e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2274e73ea273SRalf Baechle bool 2275e73ea273SRalf Baechle 2276130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2277130e2fb7SRalf Baechle bool 2278130e2fb7SRalf Baechle 2279130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2280130e2fb7SRalf Baechle bool 2281130e2fb7SRalf Baechle 2282130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2283130e2fb7SRalf Baechle bool 2284130e2fb7SRalf Baechle 2285130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2286130e2fb7SRalf Baechle bool 2287130e2fb7SRalf Baechle 2288130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2289130e2fb7SRalf Baechle bool 2290130e2fb7SRalf Baechle 22911da177e4SLinus Torvaldsconfig NR_CPUS 22921da177e4SLinus Torvalds int "Maximum number of CPUs (2-64)" 2293c5eaff3eSMarkos Chandras range 2 64 22941da177e4SLinus Torvalds depends on SMP 2295130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2296130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2297130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2298130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2299130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 23001da177e4SLinus Torvalds help 23011da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 23021da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 23031da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 230472ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 230572ede9b1SAtsushi Nemoto and 2 for all others. 23061da177e4SLinus Torvalds 23071da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 230872ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 230972ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 231072ede9b1SAtsushi Nemoto power of two. 23111da177e4SLinus Torvalds 2312399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2313399aaa25SAl Cooper bool 2314399aaa25SAl Cooper 23151723b4a3SAtsushi Nemoto# 23161723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 23171723b4a3SAtsushi Nemoto# 23181723b4a3SAtsushi Nemoto 23191723b4a3SAtsushi Nemotochoice 23201723b4a3SAtsushi Nemoto prompt "Timer frequency" 23211723b4a3SAtsushi Nemoto default HZ_250 23221723b4a3SAtsushi Nemoto help 23231723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 23241723b4a3SAtsushi Nemoto 23251723b4a3SAtsushi Nemoto config HZ_48 23260f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 23271723b4a3SAtsushi Nemoto 23281723b4a3SAtsushi Nemoto config HZ_100 23291723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 23301723b4a3SAtsushi Nemoto 23311723b4a3SAtsushi Nemoto config HZ_128 23321723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 23331723b4a3SAtsushi Nemoto 23341723b4a3SAtsushi Nemoto config HZ_250 23351723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 23361723b4a3SAtsushi Nemoto 23371723b4a3SAtsushi Nemoto config HZ_256 23381723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 23391723b4a3SAtsushi Nemoto 23401723b4a3SAtsushi Nemoto config HZ_1000 23411723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 23421723b4a3SAtsushi Nemoto 23431723b4a3SAtsushi Nemoto config HZ_1024 23441723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 23451723b4a3SAtsushi Nemoto 23461723b4a3SAtsushi Nemotoendchoice 23471723b4a3SAtsushi Nemoto 23481723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 23491723b4a3SAtsushi Nemoto bool 23501723b4a3SAtsushi Nemoto 23511723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 23521723b4a3SAtsushi Nemoto bool 23531723b4a3SAtsushi Nemoto 23541723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 23551723b4a3SAtsushi Nemoto bool 23561723b4a3SAtsushi Nemoto 23571723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 23581723b4a3SAtsushi Nemoto bool 23591723b4a3SAtsushi Nemoto 23601723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 23611723b4a3SAtsushi Nemoto bool 23621723b4a3SAtsushi Nemoto 23631723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 23641723b4a3SAtsushi Nemoto bool 23651723b4a3SAtsushi Nemoto 23661723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 23671723b4a3SAtsushi Nemoto bool 23681723b4a3SAtsushi Nemoto 23691723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 23701723b4a3SAtsushi Nemoto bool 23711723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 23721723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 23731723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 23741723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 23751723b4a3SAtsushi Nemoto 23761723b4a3SAtsushi Nemotoconfig HZ 23771723b4a3SAtsushi Nemoto int 23781723b4a3SAtsushi Nemoto default 48 if HZ_48 23791723b4a3SAtsushi Nemoto default 100 if HZ_100 23801723b4a3SAtsushi Nemoto default 128 if HZ_128 23811723b4a3SAtsushi Nemoto default 250 if HZ_250 23821723b4a3SAtsushi Nemoto default 256 if HZ_256 23831723b4a3SAtsushi Nemoto default 1000 if HZ_1000 23841723b4a3SAtsushi Nemoto default 1024 if HZ_1024 23851723b4a3SAtsushi Nemoto 2386e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 23871da177e4SLinus Torvalds 2388ea6e942bSAtsushi Nemotoconfig KEXEC 23897d60717eSKees Cook bool "Kexec system call" 2390ea6e942bSAtsushi Nemoto help 2391ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2392ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 23933dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2394ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2395ea6e942bSAtsushi Nemoto 239601dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2397ea6e942bSAtsushi Nemoto 2398ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2399ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2400bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2401bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2402bf220695SGeert Uytterhoeven made. 2403ea6e942bSAtsushi Nemoto 24047aa1c8f4SRalf Baechleconfig CRASH_DUMP 24057aa1c8f4SRalf Baechle bool "Kernel crash dumps" 24067aa1c8f4SRalf Baechle help 24077aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 24087aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 24097aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 24107aa1c8f4SRalf Baechle a specially reserved region and then later executed after 24117aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 24127aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 24137aa1c8f4SRalf Baechle PHYSICAL_START. 24147aa1c8f4SRalf Baechle 24157aa1c8f4SRalf Baechleconfig PHYSICAL_START 24167aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 24177aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 24187aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 24197aa1c8f4SRalf Baechle depends on CRASH_DUMP 24207aa1c8f4SRalf Baechle help 24217aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 24227aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 24237aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 24247aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 24257aa1c8f4SRalf Baechle passed to the panic-ed kernel). 24267aa1c8f4SRalf Baechle 2427ea6e942bSAtsushi Nemotoconfig SECCOMP 2428ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2429293c5bd1SRalf Baechle depends on PROC_FS 2430ea6e942bSAtsushi Nemoto default y 2431ea6e942bSAtsushi Nemoto help 2432ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2433ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2434ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2435ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2436ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2437ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2438ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2439ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2440ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2441ea6e942bSAtsushi Nemoto 2442ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2443ea6e942bSAtsushi Nemoto 2444597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 2445597ce172SPaul Burton bool "Support for O32 binaries using 64-bit FP" 2446597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2447597ce172SPaul Burton default y 2448597ce172SPaul Burton help 2449597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2450597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2451597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2452597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2453597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2454597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2455597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2456597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2457597ce172SPaul Burton saying N here. 2458597ce172SPaul Burton 2459597ce172SPaul Burton If unsure, say Y. 2460597ce172SPaul Burton 2461f2ffa5abSDezhong Diaoconfig USE_OF 24620b3e06fdSJonas Gorski bool 2463f2ffa5abSDezhong Diao select OF 2464e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2465abd2363fSGrant Likely select IRQ_DOMAIN 2466f2ffa5abSDezhong Diao 24675e83d430SRalf Baechleendmenu 24685e83d430SRalf Baechle 24691df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 24701df0f0ffSAtsushi Nemoto bool 24711df0f0ffSAtsushi Nemoto default y 24721df0f0ffSAtsushi Nemoto 24731df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 24741df0f0ffSAtsushi Nemoto bool 24751df0f0ffSAtsushi Nemoto default y 24761df0f0ffSAtsushi Nemoto 2477b6c3539bSRalf Baechlesource "init/Kconfig" 2478b6c3539bSRalf Baechle 2479dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2480dc52ddc0SMatt Helsley 24811da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 24821da177e4SLinus Torvalds 24835e83d430SRalf Baechleconfig HW_HAS_EISA 24845e83d430SRalf Baechle bool 24851da177e4SLinus Torvaldsconfig HW_HAS_PCI 24861da177e4SLinus Torvalds bool 24871da177e4SLinus Torvalds 24881da177e4SLinus Torvaldsconfig PCI 24891da177e4SLinus Torvalds bool "Support for PCI controller" 24901da177e4SLinus Torvalds depends on HW_HAS_PCI 2491abb4ae46SRalf Baechle select PCI_DOMAINS 24920f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 24931da177e4SLinus Torvalds help 24941da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 24951da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 24961da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 24971da177e4SLinus Torvalds say Y, otherwise N. 24981da177e4SLinus Torvalds 24991da177e4SLinus Torvaldsconfig PCI_DOMAINS 25001da177e4SLinus Torvalds bool 25011da177e4SLinus Torvalds 25021da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 25031da177e4SLinus Torvalds 25043f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 25053f787ca4SJonas Gorski 25061da177e4SLinus Torvalds# 25071da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 25081da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 25091da177e4SLinus Torvalds# users to choose the right thing ... 25101da177e4SLinus Torvalds# 25111da177e4SLinus Torvaldsconfig ISA 25121da177e4SLinus Torvalds bool 25131da177e4SLinus Torvalds 25141da177e4SLinus Torvaldsconfig EISA 25151da177e4SLinus Torvalds bool "EISA support" 25165e83d430SRalf Baechle depends on HW_HAS_EISA 25171da177e4SLinus Torvalds select ISA 2518aa414dffSRalf Baechle select GENERIC_ISA_DMA 25191da177e4SLinus Torvalds ---help--- 25201da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 25211da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 25221da177e4SLinus Torvalds 25231da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 25241da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 25251da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 25261da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 25271da177e4SLinus Torvalds 25281da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 25291da177e4SLinus Torvalds 25301da177e4SLinus Torvalds Otherwise, say N. 25311da177e4SLinus Torvalds 25321da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 25331da177e4SLinus Torvalds 25341da177e4SLinus Torvaldsconfig TC 25351da177e4SLinus Torvalds bool "TURBOchannel support" 25361da177e4SLinus Torvalds depends on MACH_DECSTATION 25371da177e4SLinus Torvalds help 253850a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 253950a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 254050a23e6eSJustin P. Mattock at: 254150a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 254250a23e6eSJustin P. Mattock and: 254350a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 254450a23e6eSJustin P. Mattock Linux driver support status is documented at: 254550a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 25461da177e4SLinus Torvalds 25471da177e4SLinus Torvaldsconfig MMU 25481da177e4SLinus Torvalds bool 25491da177e4SLinus Torvalds default y 25501da177e4SLinus Torvalds 2551d865bea4SRalf Baechleconfig I8253 2552d865bea4SRalf Baechle bool 2553798778b8SRussell King select CLKSRC_I8253 25542d02612fSThomas Gleixner select CLKEVT_I8253 25559726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2556d865bea4SRalf Baechle 2557e05eb3f8SRalf Baechleconfig ZONE_DMA 2558e05eb3f8SRalf Baechle bool 2559e05eb3f8SRalf Baechle 2560cce335aeSRalf Baechleconfig ZONE_DMA32 2561cce335aeSRalf Baechle bool 2562cce335aeSRalf Baechle 25631da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 25641da177e4SLinus Torvalds 25651da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 25661da177e4SLinus Torvalds 2567388b78adSAlexandre Bounineconfig RAPIDIO 256856abde72SAlexandre Bounine tristate "RapidIO support" 2569388b78adSAlexandre Bounine depends on PCI 2570388b78adSAlexandre Bounine default n 2571388b78adSAlexandre Bounine help 2572388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2573388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2574388b78adSAlexandre Bounine 2575388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2576388b78adSAlexandre Bounine 25771da177e4SLinus Torvaldsendmenu 25781da177e4SLinus Torvalds 25791da177e4SLinus Torvaldsmenu "Executable file formats" 25801da177e4SLinus Torvalds 25811da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 25821da177e4SLinus Torvalds 25831da177e4SLinus Torvaldsconfig TRAD_SIGNALS 25841da177e4SLinus Torvalds bool 25851da177e4SLinus Torvalds 25861da177e4SLinus Torvaldsconfig MIPS32_COMPAT 25871da177e4SLinus Torvalds bool "Kernel support for Linux/MIPS 32-bit binary compatibility" 2588875d43e7SRalf Baechle depends on 64BIT 25891da177e4SLinus Torvalds help 25901da177e4SLinus Torvalds Select this option if you want Linux/MIPS 32-bit binary 25911da177e4SLinus Torvalds compatibility. Since all software available for Linux/MIPS is 25921da177e4SLinus Torvalds currently 32-bit you should say Y here. 25931da177e4SLinus Torvalds 25941da177e4SLinus Torvaldsconfig COMPAT 25951da177e4SLinus Torvalds bool 25961da177e4SLinus Torvalds depends on MIPS32_COMPAT 259748b25c43SChris Metcalf select ARCH_WANT_OLD_COMPAT_IPC 25981da177e4SLinus Torvalds default y 25991da177e4SLinus Torvalds 260005e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 260105e43966SAtsushi Nemoto bool 260205e43966SAtsushi Nemoto depends on COMPAT && SYSVIPC 260305e43966SAtsushi Nemoto default y 260405e43966SAtsushi Nemoto 26051da177e4SLinus Torvaldsconfig MIPS32_O32 26061da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 26071da177e4SLinus Torvalds depends on MIPS32_COMPAT 26081da177e4SLinus Torvalds help 26091da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 26101da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 26111da177e4SLinus Torvalds existing binaries are in this format. 26121da177e4SLinus Torvalds 26131da177e4SLinus Torvalds If unsure, say Y. 26141da177e4SLinus Torvalds 26151da177e4SLinus Torvaldsconfig MIPS32_N32 26161da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 26171da177e4SLinus Torvalds depends on MIPS32_COMPAT 26181da177e4SLinus Torvalds help 26191da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 26201da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 26211da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 26221da177e4SLinus Torvalds cases. 26231da177e4SLinus Torvalds 26241da177e4SLinus Torvalds If unsure, say N. 26251da177e4SLinus Torvalds 26261da177e4SLinus Torvaldsconfig BINFMT_ELF32 26271da177e4SLinus Torvalds bool 26281da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 26291da177e4SLinus Torvalds 26302116245eSRalf Baechleendmenu 26311da177e4SLinus Torvalds 26322116245eSRalf Baechlemenu "Power management options" 2633952fa954SRodolfo Giometti 2634363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2635363c55caSWu Zhangjin def_bool y 26363f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2637363c55caSWu Zhangjin 2638f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2639f4cb5700SJohannes Berg def_bool y 26403f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2641f4cb5700SJohannes Berg 26422116245eSRalf Baechlesource "kernel/power/Kconfig" 2643952fa954SRodolfo Giometti 26441da177e4SLinus Torvaldsendmenu 26451da177e4SLinus Torvalds 26467a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 26477a998935SViresh Kumar bool 26487a998935SViresh Kumar 26497a998935SViresh Kumarif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 26507a998935SViresh Kumarmenu "CPU Power Management" 26517a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 26527a998935SViresh Kumarendmenu 26537a998935SViresh Kumarendif 26549726b43aSWu Zhangjin 2655d5950b43SSam Ravnborgsource "net/Kconfig" 2656d5950b43SSam Ravnborg 26571da177e4SLinus Torvaldssource "drivers/Kconfig" 26581da177e4SLinus Torvalds 265998cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 266098cdee0eSRalf Baechle 26611da177e4SLinus Torvaldssource "fs/Kconfig" 26621da177e4SLinus Torvalds 26631da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 26641da177e4SLinus Torvalds 26651da177e4SLinus Torvaldssource "security/Kconfig" 26661da177e4SLinus Torvalds 26671da177e4SLinus Torvaldssource "crypto/Kconfig" 26681da177e4SLinus Torvalds 26691da177e4SLinus Torvaldssource "lib/Kconfig" 26702235a54dSSanjay Lal 26712235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 2672