xref: /linux/arch/mips/Kconfig (revision 73569d87e2cc5fdc0010e612a3c94f919228e301)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
4a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
5393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
6c3fc5cd5SRalf Baechle	select HAVE_CONTEXT_TRACKING
7f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
8ec7748b5SSam Ravnborg	select HAVE_IDE
942d4b839SMathieu Desnoyers	select HAVE_OPROFILE
107f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
117f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
1288547001SJason Wessel	select HAVE_ARCH_KGDB
13490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
14c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
153f5fdb4bSMarkos Chandras	select HAVE_BPF_JIT if !CPU_MICROMIPS
167563bbf8SMark Brown	select ARCH_HAVE_CUSTOM_GPIO_H
17d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
18538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
19538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
2064575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
2129c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
22c1bf207dSDavid Daney	select HAVE_KPROBES
23c1bf207dSDavid Daney	select HAVE_KRETPROBES
24b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
251d7bf993SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
26e26d196cSDavid Daney	select ARCH_BINFMT_ELF_RANDOMIZE_PIE
27383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
2821a41faaSWu Zhangjin	select RTC_LIB if !MACH_LOONGSON
292b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
307463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
3148e1fd5aSDavid Daney	select HAVE_DMA_ATTRS
32f4649382SZubair Lutfullah Kakakhel	select HAVE_DMA_CONTIGUOUS
3348e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
343bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
35f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3678857614SMarkos Chandras	select GENERIC_PCI_IOMAP
3794bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
38c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
390f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
409d15ffc8STejun Heo	select HAVE_MEMBLOCK
419d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
429d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
43360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
444b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
45cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
46cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
47786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
484febd95aSStephen Rothwell	select VIRT_TO_BUS
492f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
502f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
5150150d2bSAl Viro	select CLONE_BACKWARDS
52d1a1dc0bSDave Hansen	select HAVE_DEBUG_STACKOVERFLOW
5319952a92SKees Cook	select HAVE_CC_STACKPROTECTOR
54b1d4c6caSJames Hogan	select CPU_PM if CPU_IDLE
55cc7964afSPaul Burton	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
5690cee759SPaul Burton	select ARCH_BINFMT_ELF_STATE
57d79d853dSMarkos Chandras	select SYSCTL_EXCEPTION_TRACE
581da177e4SLinus Torvalds
591da177e4SLinus Torvaldsmenu "Machine selection"
601da177e4SLinus Torvalds
615e83d430SRalf Baechlechoice
625e83d430SRalf Baechle	prompt "System type"
635e83d430SRalf Baechle	default SGI_IP22
641da177e4SLinus Torvalds
6542a4f17dSManuel Laussconfig MIPS_ALCHEMY
66c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
6734adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
68f772cdb2SRalf Baechle	select CEVT_R4K
69d7ea335cSSteven J. Hill	select CSRC_R4K
7042a4f17dSManuel Lauss	select IRQ_CPU
7188e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
7242a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
7342a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
7442a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
75efb12436SAlexandre Courbot	select ARCH_REQUIRE_GPIOLIB
761b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
7747440229SManuel Lauss	select COMMON_CLK
781da177e4SLinus Torvalds
797ca5dc14SFlorian Fainelliconfig AR7
807ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
817ca5dc14SFlorian Fainelli	select BOOT_ELF32
827ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
837ca5dc14SFlorian Fainelli	select CEVT_R4K
847ca5dc14SFlorian Fainelli	select CSRC_R4K
857ca5dc14SFlorian Fainelli	select IRQ_CPU
867ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
877ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
887ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
897ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
907ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
917ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
92377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
931b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
945f3c9098SFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
957ca5dc14SFlorian Fainelli	select VLYNQ
968551fb64SYoichi Yuasa	select HAVE_CLK
977ca5dc14SFlorian Fainelli	help
987ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
997ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1007ca5dc14SFlorian Fainelli
10143cc739fSSergey Ryazanovconfig ATH25
10243cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
10343cc739fSSergey Ryazanov	select CEVT_R4K
10443cc739fSSergey Ryazanov	select CSRC_R4K
10543cc739fSSergey Ryazanov	select DMA_NONCOHERENT
10643cc739fSSergey Ryazanov	select IRQ_CPU
1071753e74eSSergey Ryazanov	select IRQ_DOMAIN
10843cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
10943cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
11043cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
1118aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
11243cc739fSSergey Ryazanov	help
11343cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
11443cc739fSSergey Ryazanov
115d4a67d9dSGabor Juhosconfig ATH79
116d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
1176eae43c5SGabor Juhos	select ARCH_REQUIRE_GPIOLIB
118d4a67d9dSGabor Juhos	select BOOT_RAW
119d4a67d9dSGabor Juhos	select CEVT_R4K
120d4a67d9dSGabor Juhos	select CSRC_R4K
121d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
12294638067SGabor Juhos	select HAVE_CLK
1232c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
124d4a67d9dSGabor Juhos	select IRQ_CPU
1250aabf1a4SGabor Juhos	select MIPS_MACHINE
126d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
127d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
128d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
129d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
130377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
131d4a67d9dSGabor Juhos	help
132d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
133d4a67d9dSGabor Juhos
134d666cd02SKevin Cernekeeconfig BCM3384
135d666cd02SKevin Cernekee	bool "Broadcom BCM3384 based boards"
136d666cd02SKevin Cernekee	select BOOT_RAW
137d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
138d666cd02SKevin Cernekee	select USE_OF
139d666cd02SKevin Cernekee	select CEVT_R4K
140d666cd02SKevin Cernekee	select CSRC_R4K
141d666cd02SKevin Cernekee	select SYNC_R4K
142d666cd02SKevin Cernekee	select COMMON_CLK
143d666cd02SKevin Cernekee	select DMA_NONCOHERENT
144d666cd02SKevin Cernekee	select IRQ_CPU
145d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
146d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
147d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
148d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
149d666cd02SKevin Cernekee	select SWAP_IO_SPACE
150d666cd02SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC
151d666cd02SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO
152d666cd02SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC
153d666cd02SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO
154d666cd02SKevin Cernekee	help
155d666cd02SKevin Cernekee	  Support for BCM3384 based boards.  BCM3384/BCM33843 is a cable modem
156d666cd02SKevin Cernekee	  chipset with a Linux application processor that is often used to
157d666cd02SKevin Cernekee	  provide Samba services, a CUPS print server, and/or advanced routing
158d666cd02SKevin Cernekee	  features.
159d666cd02SKevin Cernekee
1601c0c13ebSAurelien Jarnoconfig BCM47XX
161c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
1622da4c74dSHauke Mehrtens	select ARCH_WANT_OPTIONAL_GPIOLIB
163fe08f8c2SHauke Mehrtens	select BOOT_RAW
16442f77542SRalf Baechle	select CEVT_R4K
165940f6b48SRalf Baechle	select CSRC_R4K
1661c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1671c0c13ebSAurelien Jarno	select HW_HAS_PCI
1681c0c13ebSAurelien Jarno	select IRQ_CPU
169314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
170dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1711c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1721c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
173377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
17425e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
175e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
176c949c0bcSRafał Miłecki	select GPIOLIB
177c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
1781c0c13ebSAurelien Jarno	help
1791c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
1801c0c13ebSAurelien Jarno
181e7300d04SMaxime Bizonconfig BCM63XX
182e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
183ae8de61cSFlorian Fainelli	select BOOT_RAW
184e7300d04SMaxime Bizon	select CEVT_R4K
185e7300d04SMaxime Bizon	select CSRC_R4K
186fc264022SJonas Gorski	select SYNC_R4K
187e7300d04SMaxime Bizon	select DMA_NONCOHERENT
188e7300d04SMaxime Bizon	select IRQ_CPU
189e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
190e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
191e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
192e7300d04SMaxime Bizon	select SWAP_IO_SPACE
193e7300d04SMaxime Bizon	select ARCH_REQUIRE_GPIOLIB
1943e82eeebSYoichi Yuasa	select HAVE_CLK
195af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
196e7300d04SMaxime Bizon	help
197e7300d04SMaxime Bizon	 Support for BCM63XX based boards
198e7300d04SMaxime Bizon
1991da177e4SLinus Torvaldsconfig MIPS_COBALT
2003fa986faSMartin Michlmayr	bool "Cobalt Server"
20142f77542SRalf Baechle	select CEVT_R4K
202940f6b48SRalf Baechle	select CSRC_R4K
2031097c6acSYoichi Yuasa	select CEVT_GT641XX
2041da177e4SLinus Torvalds	select DMA_NONCOHERENT
2051da177e4SLinus Torvalds	select HW_HAS_PCI
206d865bea4SRalf Baechle	select I8253
2071da177e4SLinus Torvalds	select I8259
2081da177e4SLinus Torvalds	select IRQ_CPU
209d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
210252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
211e25bfc92SYoichi Yuasa	select PCI
2127cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
2130a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
214ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2150e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
2165e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
217e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
2181da177e4SLinus Torvalds
2191da177e4SLinus Torvaldsconfig MACH_DECSTATION
2203fa986faSMartin Michlmayr	bool "DECstations"
2211da177e4SLinus Torvalds	select BOOT_ELF32
2226457d9fcSYoichi Yuasa	select CEVT_DS1287
22381d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
2244247417dSYoichi Yuasa	select CSRC_IOASIC
22581d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
22620d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
22720d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
22820d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
2291da177e4SLinus Torvalds	select DMA_NONCOHERENT
230ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
2311da177e4SLinus Torvalds	select IRQ_CPU
2327cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
2337cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
234ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2357d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2365e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
2371723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
2381723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
2391723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
240930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
2415e83d430SRalf Baechle	help
2421da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
2431da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
2441da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
2451da177e4SLinus Torvalds
2461da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
2471da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
2481da177e4SLinus Torvalds
2491da177e4SLinus Torvalds		DECstation 5000/50
2501da177e4SLinus Torvalds		DECstation 5000/150
2511da177e4SLinus Torvalds		DECstation 5000/260
2521da177e4SLinus Torvalds		DECsystem 5900/260
2531da177e4SLinus Torvalds
2541da177e4SLinus Torvalds	  otherwise choose R3000.
2551da177e4SLinus Torvalds
2565e83d430SRalf Baechleconfig MACH_JAZZ
2573fa986faSMartin Michlmayr	bool "Jazz family of machines"
2580e2794b0SRalf Baechle	select FW_ARC
2590e2794b0SRalf Baechle	select FW_ARC32
2605e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
26142f77542SRalf Baechle	select CEVT_R4K
262940f6b48SRalf Baechle	select CSRC_R4K
263e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2645e83d430SRalf Baechle	select GENERIC_ISA_DMA
2658a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
266ea202c63SThomas Bogendoerfer	select IRQ_CPU
267d865bea4SRalf Baechle	select I8253
2685e83d430SRalf Baechle	select I8259
2695e83d430SRalf Baechle	select ISA
2707cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2715e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2727d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2731723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2741da177e4SLinus Torvalds	help
2755e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
2765e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
277692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
2785e83d430SRalf Baechle	 Olivetti M700-10 workstations.
2795e83d430SRalf Baechle
2805ebabe59SLars-Peter Clausenconfig MACH_JZ4740
2815ebabe59SLars-Peter Clausen	bool "Ingenic JZ4740 based machines"
2825ebabe59SLars-Peter Clausen	select SYS_HAS_CPU_MIPS32_R1
2835ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
2845ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
285f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
2865ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
2875ebabe59SLars-Peter Clausen	select IRQ_CPU
2885ebabe59SLars-Peter Clausen	select ARCH_REQUIRE_GPIOLIB
2895ebabe59SLars-Peter Clausen	select SYS_HAS_EARLY_PRINTK
290ab5330ebSMaurus Cuelenaere	select HAVE_CLK
29183bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
2925ebabe59SLars-Peter Clausen
293171bb2f1SJohn Crispinconfig LANTIQ
294171bb2f1SJohn Crispin	bool "Lantiq based platforms"
295171bb2f1SJohn Crispin	select DMA_NONCOHERENT
296171bb2f1SJohn Crispin	select IRQ_CPU
297171bb2f1SJohn Crispin	select CEVT_R4K
298171bb2f1SJohn Crispin	select CSRC_R4K
299171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
300171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
301171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
302171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
303377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
304171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
305171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
306171bb2f1SJohn Crispin	select ARCH_REQUIRE_GPIOLIB
307171bb2f1SJohn Crispin	select SWAP_IO_SPACE
308171bb2f1SJohn Crispin	select BOOT_RAW
309287e3f3fSJohn Crispin	select HAVE_MACH_CLKDEV
310287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
311a0392222SJohn Crispin	select USE_OF
3123f8c50c9SJohn Crispin	select PINCTRL
3133f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
314c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
315c530781cSJohn Crispin	select RESET_CONTROLLER
316171bb2f1SJohn Crispin
3171f21d2bdSBrian Murphyconfig LASAT
3181f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
31942f77542SRalf Baechle	select CEVT_R4K
32016f0bbbcSRalf Baechle	select CRC32
321940f6b48SRalf Baechle	select CSRC_R4K
3221f21d2bdSBrian Murphy	select DMA_NONCOHERENT
3231f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
3241f21d2bdSBrian Murphy	select HW_HAS_PCI
325a5ccfe5cSRalf Baechle	select IRQ_CPU
3261f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
3271f21d2bdSBrian Murphy	select MIPS_NILE4
3281f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
3291f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
3301f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
3311f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
3321f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
3331f21d2bdSBrian Murphy
33485749d24SWu Zhangjinconfig MACH_LOONGSON
33585749d24SWu Zhangjin	bool "Loongson family of machines"
336c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
337ade299d8SYoichi Yuasa	help
33885749d24SWu Zhangjin	  This enables the support of Loongson family of machines.
33985749d24SWu Zhangjin
34085749d24SWu Zhangjin	  Loongson is a family of general-purpose MIPS-compatible CPUs.
34185749d24SWu Zhangjin	  developed at Institute of Computing Technology (ICT),
34285749d24SWu Zhangjin	  Chinese Academy of Sciences (CAS) in the People's Republic
34385749d24SWu Zhangjin	  of China. The chief architect is Professor Weiwu Hu.
344ade299d8SYoichi Yuasa
345ca585cf9SKelvin Cheungconfig MACH_LOONGSON1
346ca585cf9SKelvin Cheung	bool "Loongson 1 family of machines"
347ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
348ca585cf9SKelvin Cheung	help
349ca585cf9SKelvin Cheung	  This enables support for the Loongson 1 based machines.
350ca585cf9SKelvin Cheung
351ca585cf9SKelvin Cheung	  Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by
352ca585cf9SKelvin Cheung	  the ICT (Institute of Computing Technology) and the Chinese Academy
353ca585cf9SKelvin Cheung	  of Sciences.
354ca585cf9SKelvin Cheung
3556a438309SAndrew Brestickerconfig MACH_PISTACHIO
3566a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
3576a438309SAndrew Bresticker	select ARCH_REQUIRE_GPIOLIB
3586a438309SAndrew Bresticker	select BOOT_ELF32
3596a438309SAndrew Bresticker	select BOOT_RAW
3606a438309SAndrew Bresticker	select CEVT_R4K
3616a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
3626a438309SAndrew Bresticker	select COMMON_CLK
3636a438309SAndrew Bresticker	select CSRC_R4K
3646a438309SAndrew Bresticker	select DMA_MAYBE_COHERENT
3656a438309SAndrew Bresticker	select IRQ_CPU
3666a438309SAndrew Bresticker	select LIBFDT
3676a438309SAndrew Bresticker	select MFD_SYSCON
3686a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
3696a438309SAndrew Bresticker	select MIPS_GIC
3706a438309SAndrew Bresticker	select PINCTRL
3716a438309SAndrew Bresticker	select REGULATOR
3726a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
3736a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
3746a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
3756a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
3766a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
3776a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
3786a438309SAndrew Bresticker	select USE_OF
3796a438309SAndrew Bresticker	help
3806a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
3816a438309SAndrew Bresticker
3821da177e4SLinus Torvaldsconfig MIPS_MALTA
3833fa986faSMartin Michlmayr	bool "MIPS Malta board"
38461ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
3851da177e4SLinus Torvalds	select BOOT_ELF32
386fa71c960SRalf Baechle	select BOOT_RAW
38742f77542SRalf Baechle	select CEVT_R4K
388940f6b48SRalf Baechle	select CSRC_R4K
389fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
390885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
3911da177e4SLinus Torvalds	select GENERIC_ISA_DMA
3928a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
393aa414dffSRalf Baechle	select IRQ_CPU
3948a19b8f1SAndrew Bresticker	select MIPS_GIC
3951da177e4SLinus Torvalds	select HW_HAS_PCI
396d865bea4SRalf Baechle	select I8253
3971da177e4SLinus Torvalds	select I8259
3985e83d430SRalf Baechle	select MIPS_BONITO64
3999318c51aSChris Dearman	select MIPS_CPU_SCACHE
400a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
401252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
4025e83d430SRalf Baechle	select MIPS_MSC
4031da177e4SLinus Torvalds	select SWAP_IO_SPACE
4047cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
4057cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
406bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
407575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
4087cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
4095d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
410575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
4117cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
4127cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
413ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
414ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4155e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
4165e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
417424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
4180365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
419e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
420377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
421f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
4229693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
4231b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
4241da177e4SLinus Torvalds	help
425f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
4261da177e4SLinus Torvalds	  board.
4271da177e4SLinus Torvalds
428ec47b274SSteven J. Hillconfig MIPS_SEAD3
429ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
430ec47b274SSteven J. Hill	select BOOT_ELF32
431ec47b274SSteven J. Hill	select BOOT_RAW
432f262b5f2SAndrew Bresticker	select BUILTIN_DTB
433ec47b274SSteven J. Hill	select CEVT_R4K
434ec47b274SSteven J. Hill	select CSRC_R4K
435fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
436ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
437ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
438ec47b274SSteven J. Hill	select DMA_NONCOHERENT
439ec47b274SSteven J. Hill	select IRQ_CPU
4408a19b8f1SAndrew Bresticker	select MIPS_GIC
44144327236SQais Yousef	select LIBFDT
442ec47b274SSteven J. Hill	select MIPS_MSC
443ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
444ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
445ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
446ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
447ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
448ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
449ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
450ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
451ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
452a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
453377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
454ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
455ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
4569b731009SSteven J. Hill	select USE_OF
457ec47b274SSteven J. Hill	help
458ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
459ec47b274SSteven J. Hill	  board.
460ec47b274SSteven J. Hill
461a83860c2SRalf Baechleconfig NEC_MARKEINS
462a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
463a83860c2SRalf Baechle	select SOC_EMMA2RH
464a83860c2SRalf Baechle	select HW_HAS_PCI
465a83860c2SRalf Baechle	help
466a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
467ade299d8SYoichi Yuasa
4685e83d430SRalf Baechleconfig MACH_VR41XX
46974142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
47042f77542SRalf Baechle	select CEVT_R4K
471940f6b48SRalf Baechle	select CSRC_R4K
4727cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
473377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
47427fdd325SYoichi Yuasa	select ARCH_REQUIRE_GPIOLIB
4755e83d430SRalf Baechle
476edb6310aSDaniel Lairdconfig NXP_STB220
477edb6310aSDaniel Laird	bool "NXP STB220 board"
478edb6310aSDaniel Laird	select SOC_PNX833X
479edb6310aSDaniel Laird	help
480edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
481edb6310aSDaniel Laird
482edb6310aSDaniel Lairdconfig NXP_STB225
483edb6310aSDaniel Laird	bool "NXP 225 board"
484edb6310aSDaniel Laird	select SOC_PNX833X
485edb6310aSDaniel Laird	select SOC_PNX8335
486edb6310aSDaniel Laird	help
487edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
488edb6310aSDaniel Laird
4899267a30dSMarc St-Jeanconfig PMC_MSP
4909267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
49139d30c13SAnoop P A	select CEVT_R4K
49239d30c13SAnoop P A	select CSRC_R4K
4939267a30dSMarc St-Jean	select DMA_NONCOHERENT
4949267a30dSMarc St-Jean	select SWAP_IO_SPACE
4959267a30dSMarc St-Jean	select NO_EXCEPT_FILL
4969267a30dSMarc St-Jean	select BOOT_RAW
4979267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
4989267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
4999267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
5009267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
501377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
5029267a30dSMarc St-Jean	select IRQ_CPU
5039267a30dSMarc St-Jean	select SERIAL_8250
5049267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
5059296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
5069296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
5079267a30dSMarc St-Jean	help
5089267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
5099267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
5109267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
5119267a30dSMarc St-Jean	  a variety of MIPS cores.
5129267a30dSMarc St-Jean
513ae2b5bb6SJohn Crispinconfig RALINK
514ae2b5bb6SJohn Crispin	bool "Ralink based machines"
515ae2b5bb6SJohn Crispin	select CEVT_R4K
516ae2b5bb6SJohn Crispin	select CSRC_R4K
517ae2b5bb6SJohn Crispin	select BOOT_RAW
518ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
519ae2b5bb6SJohn Crispin	select IRQ_CPU
520ae2b5bb6SJohn Crispin	select USE_OF
521ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
522ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
523ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
524ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
525377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
526ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
527ae2b5bb6SJohn Crispin	select HAVE_MACH_CLKDEV
528ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
5292a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
5302a153f1cSJohn Crispin	select RESET_CONTROLLER
531ae2b5bb6SJohn Crispin
5321da177e4SLinus Torvaldsconfig SGI_IP22
5333fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
5340e2794b0SRalf Baechle	select FW_ARC
5350e2794b0SRalf Baechle	select FW_ARC32
5361da177e4SLinus Torvalds	select BOOT_ELF32
53742f77542SRalf Baechle	select CEVT_R4K
538940f6b48SRalf Baechle	select CSRC_R4K
539e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
5401da177e4SLinus Torvalds	select DMA_NONCOHERENT
5415e83d430SRalf Baechle	select HW_HAS_EISA
542d865bea4SRalf Baechle	select I8253
54368de4803SThomas Bogendoerfer	select I8259
5441da177e4SLinus Torvalds	select IP22_CPU_SCACHE
5451da177e4SLinus Torvalds	select IRQ_CPU
546aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
547e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
548e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
54936e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
550e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
551e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
552e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
5531da177e4SLinus Torvalds	select SWAP_IO_SPACE
5547cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
5557cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
5562b5e63f6SMartin Michlmayr	#
5572b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
5582b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
5592b5e63f6SMartin Michlmayr	#
5602b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
5612b5e63f6SMartin Michlmayr	# for a more details discussion
5622b5e63f6SMartin Michlmayr	#
5632b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
564ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
565ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5665e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
567930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
5681da177e4SLinus Torvalds	help
5691da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
5701da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
5711da177e4SLinus Torvalds	  that runs on these, say Y here.
5721da177e4SLinus Torvalds
5731da177e4SLinus Torvaldsconfig SGI_IP27
5743fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
5750e2794b0SRalf Baechle	select FW_ARC
5760e2794b0SRalf Baechle	select FW_ARC64
5775e83d430SRalf Baechle	select BOOT_ELF64
578e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
579634286f1SRalf Baechle	select DMA_COHERENT
58036a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
5811da177e4SLinus Torvalds	select HW_HAS_PCI
582130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
5837cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
584ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5855e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
586d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
5871a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
588930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
5891da177e4SLinus Torvalds	help
5901da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
5911da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
5921da177e4SLinus Torvalds	  here.
5931da177e4SLinus Torvalds
594e2defae5SThomas Bogendoerferconfig SGI_IP28
5957d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
5960e2794b0SRalf Baechle	select FW_ARC
5970e2794b0SRalf Baechle	select FW_ARC64
598e2defae5SThomas Bogendoerfer	select BOOT_ELF64
599e2defae5SThomas Bogendoerfer	select CEVT_R4K
600e2defae5SThomas Bogendoerfer	select CSRC_R4K
601e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
602e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
603e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
604e2defae5SThomas Bogendoerfer	select IRQ_CPU
605e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
606e2defae5SThomas Bogendoerfer	select I8253
607e2defae5SThomas Bogendoerfer	select I8259
608e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
609e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6105b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
611e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
612e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
613e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
614e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
615e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6162b5e63f6SMartin Michlmayr	#
6172b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6182b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6192b5e63f6SMartin Michlmayr	#
6202b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6212b5e63f6SMartin Michlmayr	# for a more details discussion
6222b5e63f6SMartin Michlmayr	#
6232b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
624e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
625e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
626dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
627e2defae5SThomas Bogendoerfer      help
628e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
629e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
630e2defae5SThomas Bogendoerfer
6311da177e4SLinus Torvaldsconfig SGI_IP32
632cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
6330e2794b0SRalf Baechle	select FW_ARC
6340e2794b0SRalf Baechle	select FW_ARC32
6351da177e4SLinus Torvalds	select BOOT_ELF32
63642f77542SRalf Baechle	select CEVT_R4K
637940f6b48SRalf Baechle	select CSRC_R4K
6381da177e4SLinus Torvalds	select DMA_NONCOHERENT
6391da177e4SLinus Torvalds	select HW_HAS_PCI
640dd67b155SRalf Baechle	select IRQ_CPU
6411da177e4SLinus Torvalds	select R5000_CPU_SCACHE
6421da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
6437cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
6447cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
6457cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
646dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
647ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6485e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6491da177e4SLinus Torvalds	help
6501da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
6511da177e4SLinus Torvalds
652ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
653ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
6545e83d430SRalf Baechle	select BOOT_ELF32
6555e83d430SRalf Baechle	select DMA_COHERENT
6565e83d430SRalf Baechle	select SIBYTE_BCM1120
6575e83d430SRalf Baechle	select SWAP_IO_SPACE
6587cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
6595e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6605e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6615e83d430SRalf Baechle
662ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
663ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
6645e83d430SRalf Baechle	select BOOT_ELF32
6655e83d430SRalf Baechle	select DMA_COHERENT
6665e83d430SRalf Baechle	select SIBYTE_BCM1120
6675e83d430SRalf Baechle	select SWAP_IO_SPACE
6687cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
6695e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6705e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6715e83d430SRalf Baechle
6725e83d430SRalf Baechleconfig SIBYTE_CRHONE
6733fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
6745e83d430SRalf Baechle	select BOOT_ELF32
6755e83d430SRalf Baechle	select DMA_COHERENT
6765e83d430SRalf Baechle	select SIBYTE_BCM1125
6775e83d430SRalf Baechle	select SWAP_IO_SPACE
6787cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
6795e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6805e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
6815e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6825e83d430SRalf Baechle
683ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
684ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
685ade299d8SYoichi Yuasa	select BOOT_ELF32
686ade299d8SYoichi Yuasa	select DMA_COHERENT
687ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
688ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
689ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
690ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
691ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
692ade299d8SYoichi Yuasa
693ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
694ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
695ade299d8SYoichi Yuasa	select BOOT_ELF32
696ade299d8SYoichi Yuasa	select DMA_COHERENT
697fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
698ade299d8SYoichi Yuasa	select SIBYTE_SB1250
699ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
700ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
701ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
702ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
703ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
704cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
705ade299d8SYoichi Yuasa
706ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
707ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
708ade299d8SYoichi Yuasa	select BOOT_ELF32
709ade299d8SYoichi Yuasa	select DMA_COHERENT
710fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
711ade299d8SYoichi Yuasa	select SIBYTE_SB1250
712ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
713ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
714ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
715ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
716ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
717ade299d8SYoichi Yuasa
718ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
719ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
720ade299d8SYoichi Yuasa	select BOOT_ELF32
721ade299d8SYoichi Yuasa	select DMA_COHERENT
722ade299d8SYoichi Yuasa	select SIBYTE_SB1250
723ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
724ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
725ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
726ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
727ade299d8SYoichi Yuasa
728ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
729ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
730ade299d8SYoichi Yuasa	select BOOT_ELF32
731ade299d8SYoichi Yuasa	select DMA_COHERENT
732ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
733ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
734ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
735ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
736ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
737651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
738ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
739cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
740ade299d8SYoichi Yuasa
74114b36af4SThomas Bogendoerferconfig SNI_RM
74214b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
7430e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
7440e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
745aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
7465e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
7475e83d430SRalf Baechle	select BOOT_ELF32
74842f77542SRalf Baechle	select CEVT_R4K
749940f6b48SRalf Baechle	select CSRC_R4K
750e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
7515e83d430SRalf Baechle	select DMA_NONCOHERENT
7525e83d430SRalf Baechle	select GENERIC_ISA_DMA
7538a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
7545e83d430SRalf Baechle	select HW_HAS_EISA
7555e83d430SRalf Baechle	select HW_HAS_PCI
756c066a32aSThomas Bogendoerfer	select IRQ_CPU
757d865bea4SRalf Baechle	select I8253
7585e83d430SRalf Baechle	select I8259
7595e83d430SRalf Baechle	select ISA
7604a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
7617cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
7624a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
763c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
7644a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
76536a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
766ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
7677d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
7684a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
7695e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7705e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7711da177e4SLinus Torvalds	help
77214b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
77314b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
7745e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
7755e83d430SRalf Baechle	  support this machine type.
7761da177e4SLinus Torvalds
777edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
778edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
7795e83d430SRalf Baechle
780edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
781edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
78223fbee9dSRalf Baechle
78373b4390fSRalf Baechleconfig MIKROTIK_RB532
78473b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
78573b4390fSRalf Baechle	select CEVT_R4K
78673b4390fSRalf Baechle	select CSRC_R4K
78773b4390fSRalf Baechle	select DMA_NONCOHERENT
78873b4390fSRalf Baechle	select HW_HAS_PCI
78973b4390fSRalf Baechle	select IRQ_CPU
79073b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
79173b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
79273b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
79373b4390fSRalf Baechle	select SWAP_IO_SPACE
79473b4390fSRalf Baechle	select BOOT_RAW
795d888e25bSFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
796930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
79773b4390fSRalf Baechle	help
79873b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
79973b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
80073b4390fSRalf Baechle
8019ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
8029ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
803a86c7f72SDavid Daney	select CEVT_R4K
80434adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
805a86c7f72SDavid Daney	select DMA_COHERENT
806a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
807a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
808f65aad41SRalf Baechle	select EDAC_SUPPORT
809*73569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
810*73569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
811a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
8125e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
813a86c7f72SDavid Daney	select SWAP_IO_SPACE
814e8635b48SDavid Daney	select HW_HAS_PCI
815f00e001eSDavid Daney	select ZONE_DMA32
816465aaed0SDavid Daney	select HOLES_IN_ZONE
81799cab4bbSDavid Daney	select ARCH_REQUIRE_GPIOLIB
8186e511163SDavid Daney	select LIBFDT
8196e511163SDavid Daney	select USE_OF
8206e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
8216e511163SDavid Daney	select SYS_SUPPORTS_SMP
8226e511163SDavid Daney	select NR_CPUS_DEFAULT_16
823e326479fSAndrew Bresticker	select BUILTIN_DTB
824a86c7f72SDavid Daney	help
825a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
826a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
827a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
828a86c7f72SDavid Daney	  Some of the supported boards are:
829a86c7f72SDavid Daney		EBT3000
830a86c7f72SDavid Daney		EBH3000
831a86c7f72SDavid Daney		EBH3100
832a86c7f72SDavid Daney		Thunder
833a86c7f72SDavid Daney		Kodama
834a86c7f72SDavid Daney		Hikari
835a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
836a86c7f72SDavid Daney
8377f058e85SJayachandran Cconfig NLM_XLR_BOARD
8387f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
8397f058e85SJayachandran C	select BOOT_ELF32
8407f058e85SJayachandran C	select NLM_COMMON
8417f058e85SJayachandran C	select SYS_HAS_CPU_XLR
8427f058e85SJayachandran C	select SYS_SUPPORTS_SMP
8437f058e85SJayachandran C	select HW_HAS_PCI
8447f058e85SJayachandran C	select SWAP_IO_SPACE
8457f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
8467f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
84734adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
8487f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
8497f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
8507f058e85SJayachandran C	select DMA_COHERENT
8517f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
8527f058e85SJayachandran C	select CEVT_R4K
8537f058e85SJayachandran C	select CSRC_R4K
8547f058e85SJayachandran C	select IRQ_CPU
855b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
8567f058e85SJayachandran C	select SYNC_R4K
8577f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
8588f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
8598f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
8607f058e85SJayachandran C	help
8617f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
8627f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
8637f058e85SJayachandran C
8641c773ea4SJayachandran Cconfig NLM_XLP_BOARD
8651c773ea4SJayachandran C	bool "Netlogic XLP based systems"
8661c773ea4SJayachandran C	select BOOT_ELF32
8671c773ea4SJayachandran C	select NLM_COMMON
8681c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
8691c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
8701c773ea4SJayachandran C	select HW_HAS_PCI
8711c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
8721c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
87334adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
8741c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
8751c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
8761c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
8771c773ea4SJayachandran C	select DMA_COHERENT
8781c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
8791c773ea4SJayachandran C	select CEVT_R4K
8801c773ea4SJayachandran C	select CSRC_R4K
8811c773ea4SJayachandran C	select IRQ_CPU
882b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
8831c773ea4SJayachandran C	select SYNC_R4K
8841c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
8852f6528e1SJayachandran C	select USE_OF
8868f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
8878f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
8881c773ea4SJayachandran C	help
8891c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
8901c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
8911c773ea4SJayachandran C
8929bc463beSDavid Daneyconfig MIPS_PARAVIRT
8939bc463beSDavid Daney	bool "Para-Virtualized guest system"
8949bc463beSDavid Daney	select CEVT_R4K
8959bc463beSDavid Daney	select CSRC_R4K
8969bc463beSDavid Daney	select DMA_COHERENT
8979bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
8989bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
8999bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
9009bc463beSDavid Daney	select SYS_SUPPORTS_SMP
9019bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
9029bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
9039bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
9049bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
9059bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
9069bc463beSDavid Daney	select HW_HAS_PCI
9079bc463beSDavid Daney	select SWAP_IO_SPACE
9089bc463beSDavid Daney	help
9099bc463beSDavid Daney	  This option supports guest running under ????
9109bc463beSDavid Daney
9111da177e4SLinus Torvaldsendchoice
9121da177e4SLinus Torvalds
913e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
9143b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
915d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
916a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
917e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
9185e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
9195ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
9208ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
9211f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
9220f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
923ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
92429c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
92538b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
92622b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
9275e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
928a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
92985749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig"
930ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig"
9317f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
932ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
93338b18f72SRalf Baechle
9345e83d430SRalf Baechleendmenu
9355e83d430SRalf Baechle
9361da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
9371da177e4SLinus Torvalds	bool
9381da177e4SLinus Torvalds	default y
9391da177e4SLinus Torvalds
9401da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
9411da177e4SLinus Torvalds	bool
9421da177e4SLinus Torvalds
943f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
944f0d1b0b3SDavid Howells	bool
945f0d1b0b3SDavid Howells	default n
946f0d1b0b3SDavid Howells
947f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
948f0d1b0b3SDavid Howells	bool
949f0d1b0b3SDavid Howells	default n
950f0d1b0b3SDavid Howells
9513c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
9523c9ee7efSAkinobu Mita	bool
9533c9ee7efSAkinobu Mita	default y
9543c9ee7efSAkinobu Mita
9551da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
9561da177e4SLinus Torvalds	bool
9571da177e4SLinus Torvalds	default y
9581da177e4SLinus Torvalds
959ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
9601cc89038SAtsushi Nemoto	bool
9611cc89038SAtsushi Nemoto	default y
9621cc89038SAtsushi Nemoto
9631da177e4SLinus Torvalds#
9641da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
9651da177e4SLinus Torvalds#
9660e2794b0SRalf Baechleconfig FW_ARC
9671da177e4SLinus Torvalds	bool
9681da177e4SLinus Torvalds
96961ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
97061ed242dSRalf Baechle	bool
97161ed242dSRalf Baechle
9729267a30dSMarc St-Jeanconfig BOOT_RAW
9739267a30dSMarc St-Jean	bool
9749267a30dSMarc St-Jean
975217dd11eSRalf Baechleconfig CEVT_BCM1480
976217dd11eSRalf Baechle	bool
977217dd11eSRalf Baechle
9786457d9fcSYoichi Yuasaconfig CEVT_DS1287
9796457d9fcSYoichi Yuasa	bool
9806457d9fcSYoichi Yuasa
9811097c6acSYoichi Yuasaconfig CEVT_GT641XX
9821097c6acSYoichi Yuasa	bool
9831097c6acSYoichi Yuasa
98442f77542SRalf Baechleconfig CEVT_R4K
98542f77542SRalf Baechle	bool
98642f77542SRalf Baechle
987217dd11eSRalf Baechleconfig CEVT_SB1250
988217dd11eSRalf Baechle	bool
989217dd11eSRalf Baechle
990229f773eSAtsushi Nemotoconfig CEVT_TXX9
991229f773eSAtsushi Nemoto	bool
992229f773eSAtsushi Nemoto
993217dd11eSRalf Baechleconfig CSRC_BCM1480
994217dd11eSRalf Baechle	bool
995217dd11eSRalf Baechle
9964247417dSYoichi Yuasaconfig CSRC_IOASIC
9974247417dSYoichi Yuasa	bool
9984247417dSYoichi Yuasa
999940f6b48SRalf Baechleconfig CSRC_R4K
1000940f6b48SRalf Baechle	bool
1001940f6b48SRalf Baechle
1002217dd11eSRalf Baechleconfig CSRC_SB1250
1003217dd11eSRalf Baechle	bool
1004217dd11eSRalf Baechle
1005a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
10067444a72eSMichael Buesch	select ARCH_REQUIRE_GPIOLIB
1007a9aec7feSAtsushi Nemoto	bool
1008a9aec7feSAtsushi Nemoto
10090e2794b0SRalf Baechleconfig FW_CFE
1010df78b5c8SAurelien Jarno	bool
1011df78b5c8SAurelien Jarno
10124bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
101334adb28dSRalf Baechle	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
10144bafad92SFUJITA Tomonori
1015885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1016885014bcSFelix Fietkau	select DMA_NONCOHERENT
1017885014bcSFelix Fietkau	bool
1018885014bcSFelix Fietkau
10191da177e4SLinus Torvaldsconfig DMA_COHERENT
10201da177e4SLinus Torvalds	bool
10211da177e4SLinus Torvalds
10221da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
10231da177e4SLinus Torvalds	bool
1024e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
10254ce588cdSRalf Baechle
1026e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
10274ce588cdSRalf Baechle	bool
10281da177e4SLinus Torvalds
102936a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
10301da177e4SLinus Torvalds	bool
10311da177e4SLinus Torvalds
1032dbb74540SRalf Baechleconfig HOTPLUG_CPU
10331b2bc75cSRalf Baechle	bool "Support for hot-pluggable CPUs"
103440b31360SStephen Rothwell	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
10351b2bc75cSRalf Baechle	help
10361b2bc75cSRalf Baechle	  Say Y here to allow turning CPUs off and on. CPUs can be
10371b2bc75cSRalf Baechle	  controlled through /sys/devices/system/cpu.
10381b2bc75cSRalf Baechle	  (Note: power management support will enable this option
10391b2bc75cSRalf Baechle	    automatically on SMP systems. )
10401b2bc75cSRalf Baechle	  Say N if you want to disable CPU hotplug.
10411b2bc75cSRalf Baechle
10421b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1043dbb74540SRalf Baechle	bool
1044dbb74540SRalf Baechle
10451da177e4SLinus Torvaldsconfig I8259
10461da177e4SLinus Torvalds	bool
1047079a4601SAndrew Bresticker	select IRQ_DOMAIN
10481da177e4SLinus Torvalds
10491da177e4SLinus Torvaldsconfig MIPS_BONITO64
10501da177e4SLinus Torvalds	bool
10511da177e4SLinus Torvalds
10521da177e4SLinus Torvaldsconfig MIPS_MSC
10531da177e4SLinus Torvalds	bool
10541da177e4SLinus Torvalds
10551f21d2bdSBrian Murphyconfig MIPS_NILE4
10561f21d2bdSBrian Murphy	bool
10571f21d2bdSBrian Murphy
105839b8d525SRalf Baechleconfig SYNC_R4K
105939b8d525SRalf Baechle	bool
106039b8d525SRalf Baechle
1061487d70d0SGabor Juhosconfig MIPS_MACHINE
1062487d70d0SGabor Juhos	def_bool n
1063487d70d0SGabor Juhos
1064ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1065d388d685SMaciej W. Rozycki	def_bool n
1066d388d685SMaciej W. Rozycki
10674e0748f5SMarkos Chandrasconfig GENERIC_CSUM
10684e0748f5SMarkos Chandras	bool
10694e0748f5SMarkos Chandras
10708313da30SRalf Baechleconfig GENERIC_ISA_DMA
10718313da30SRalf Baechle	bool
10728313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1073a35bee8aSNamhyung Kim	select ISA_DMA_API
10748313da30SRalf Baechle
1075aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1076aa414dffSRalf Baechle	bool
10778313da30SRalf Baechle	select GENERIC_ISA_DMA
1078aa414dffSRalf Baechle
1079a35bee8aSNamhyung Kimconfig ISA_DMA_API
1080a35bee8aSNamhyung Kim	bool
1081a35bee8aSNamhyung Kim
1082465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1083465aaed0SDavid Daney	bool
1084465aaed0SDavid Daney
10855e83d430SRalf Baechle#
10866b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
10875e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
10885e83d430SRalf Baechle# choice statement should be more obvious to the user.
10895e83d430SRalf Baechle#
10905e83d430SRalf Baechlechoice
10916b2aac42SMasanari Iida	prompt "Endianness selection"
10921da177e4SLinus Torvalds	help
10931da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
10945e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
10953cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
10965e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
10973dde6ad8SDavid Sterba	  one or the other endianness.
10985e83d430SRalf Baechle
10995e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
11005e83d430SRalf Baechle	bool "Big endian"
11015e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
11025e83d430SRalf Baechle
11035e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
11045e83d430SRalf Baechle	bool "Little endian"
11055e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
11065e83d430SRalf Baechle
11075e83d430SRalf Baechleendchoice
11085e83d430SRalf Baechle
110922b0763aSDavid Daneyconfig EXPORT_UASM
111022b0763aSDavid Daney	bool
111122b0763aSDavid Daney
11122116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
11132116245eSRalf Baechle	bool
11142116245eSRalf Baechle
11155e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
11165e83d430SRalf Baechle	bool
11175e83d430SRalf Baechle
11185e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
11195e83d430SRalf Baechle	bool
11201da177e4SLinus Torvalds
11219cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
11229cffd154SDavid Daney	bool
11239cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
11249cffd154SDavid Daney	default y
11259cffd154SDavid Daney
1126aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1127aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1128aa1762f4SDavid Daney
11291da177e4SLinus Torvaldsconfig IRQ_CPU
11301da177e4SLinus Torvalds	bool
11310f84c305SAndrew Bresticker	select IRQ_DOMAIN
11321da177e4SLinus Torvalds
11331da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
11341da177e4SLinus Torvalds	bool
11351da177e4SLinus Torvalds
11369267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
11379267a30dSMarc St-Jean	bool
11389267a30dSMarc St-Jean
11399267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
11409267a30dSMarc St-Jean	bool
11419267a30dSMarc St-Jean
11428420fd00SAtsushi Nemotoconfig IRQ_TXX9
11438420fd00SAtsushi Nemoto	bool
11448420fd00SAtsushi Nemoto
1145d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1146d5ab1a69SYoichi Yuasa	bool
1147d5ab1a69SYoichi Yuasa
1148252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
11491da177e4SLinus Torvalds	bool
11501da177e4SLinus Torvalds
11519267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
11529267a30dSMarc St-Jean	bool
11539267a30dSMarc St-Jean
1154a83860c2SRalf Baechleconfig SOC_EMMA2RH
1155a83860c2SRalf Baechle	bool
1156a83860c2SRalf Baechle	select CEVT_R4K
1157a83860c2SRalf Baechle	select CSRC_R4K
1158a83860c2SRalf Baechle	select DMA_NONCOHERENT
1159a83860c2SRalf Baechle	select IRQ_CPU
1160a83860c2SRalf Baechle	select SWAP_IO_SPACE
1161a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1162a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1163a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1164a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1165a83860c2SRalf Baechle
1166edb6310aSDaniel Lairdconfig SOC_PNX833X
1167edb6310aSDaniel Laird	bool
1168edb6310aSDaniel Laird	select CEVT_R4K
1169edb6310aSDaniel Laird	select CSRC_R4K
1170edb6310aSDaniel Laird	select IRQ_CPU
1171edb6310aSDaniel Laird	select DMA_NONCOHERENT
1172edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1173edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1174edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1175edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1176377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1177edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1178edb6310aSDaniel Laird
1179edb6310aSDaniel Lairdconfig SOC_PNX8335
1180edb6310aSDaniel Laird	bool
1181edb6310aSDaniel Laird	select SOC_PNX833X
1182edb6310aSDaniel Laird
1183a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1184a7e07b1aSMarkos Chandras	bool
1185a7e07b1aSMarkos Chandras
11861da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
11871da177e4SLinus Torvalds	bool
11881da177e4SLinus Torvalds
1189e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1190e2defae5SThomas Bogendoerfer	bool
1191e2defae5SThomas Bogendoerfer
11925b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
11935b438c44SThomas Bogendoerfer	bool
11945b438c44SThomas Bogendoerfer
1195e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1196e2defae5SThomas Bogendoerfer	bool
1197e2defae5SThomas Bogendoerfer
1198e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1199e2defae5SThomas Bogendoerfer	bool
1200e2defae5SThomas Bogendoerfer
1201e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1202e2defae5SThomas Bogendoerfer	bool
1203e2defae5SThomas Bogendoerfer
1204e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1205e2defae5SThomas Bogendoerfer	bool
1206e2defae5SThomas Bogendoerfer
1207e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1208e2defae5SThomas Bogendoerfer	bool
1209e2defae5SThomas Bogendoerfer
12100e2794b0SRalf Baechleconfig FW_ARC32
12115e83d430SRalf Baechle	bool
12125e83d430SRalf Baechle
1213aaa9fad3SPaul Bolleconfig FW_SNIPROM
1214231a35d3SThomas Bogendoerfer	bool
1215231a35d3SThomas Bogendoerfer
12161da177e4SLinus Torvaldsconfig BOOT_ELF32
12171da177e4SLinus Torvalds	bool
12181da177e4SLinus Torvalds
1219930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1220930beb5aSFlorian Fainelli	bool
1221930beb5aSFlorian Fainelli
1222930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1223930beb5aSFlorian Fainelli	bool
1224930beb5aSFlorian Fainelli
1225930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1226930beb5aSFlorian Fainelli	bool
1227930beb5aSFlorian Fainelli
1228930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1229930beb5aSFlorian Fainelli	bool
1230930beb5aSFlorian Fainelli
12311da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
12321da177e4SLinus Torvalds	int
1233a4c0201eSFlorian Fainelli	default "4" if MIPS_L1_CACHE_SHIFT_4
1234a4c0201eSFlorian Fainelli	default "5" if MIPS_L1_CACHE_SHIFT_5
1235a4c0201eSFlorian Fainelli	default "6" if MIPS_L1_CACHE_SHIFT_6
1236a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
12371da177e4SLinus Torvalds	default "5"
12381da177e4SLinus Torvalds
12391da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
12401da177e4SLinus Torvalds	bool
12411da177e4SLinus Torvalds
12421da177e4SLinus Torvaldsconfig ARC_CONSOLE
12431da177e4SLinus Torvalds	bool "ARC console support"
1244e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
12451da177e4SLinus Torvalds
12461da177e4SLinus Torvaldsconfig ARC_MEMORY
12471da177e4SLinus Torvalds	bool
124814b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
12491da177e4SLinus Torvalds	default y
12501da177e4SLinus Torvalds
12511da177e4SLinus Torvaldsconfig ARC_PROMLIB
12521da177e4SLinus Torvalds	bool
1253e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
12541da177e4SLinus Torvalds	default y
12551da177e4SLinus Torvalds
12560e2794b0SRalf Baechleconfig FW_ARC64
12571da177e4SLinus Torvalds	bool
12581da177e4SLinus Torvalds
12591da177e4SLinus Torvaldsconfig BOOT_ELF64
12601da177e4SLinus Torvalds	bool
12611da177e4SLinus Torvalds
12621da177e4SLinus Torvaldsmenu "CPU selection"
12631da177e4SLinus Torvalds
12641da177e4SLinus Torvaldschoice
12651da177e4SLinus Torvalds	prompt "CPU type"
12661da177e4SLinus Torvalds	default CPU_R4X00
12671da177e4SLinus Torvalds
12680e476d91SHuacai Chenconfig CPU_LOONGSON3
12690e476d91SHuacai Chen	bool "Loongson 3 CPU"
12700e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
12710e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
12720e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
12730e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
12740e476d91SHuacai Chen	select WEAK_ORDERING
12750e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
12760e476d91SHuacai Chen	help
12770e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
12780e476d91SHuacai Chen		set with many extensions.
12790e476d91SHuacai Chen
12803702bba5SWu Zhangjinconfig CPU_LOONGSON2E
12813702bba5SWu Zhangjin	bool "Loongson 2E"
12823702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
12833702bba5SWu Zhangjin	select CPU_LOONGSON2
12842a21c730SFuxin Zhang	help
12852a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
12862a21c730SFuxin Zhang	  with many extensions.
12872a21c730SFuxin Zhang
128825985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
12896f7a251aSWu Zhangjin	  bonito64.
12906f7a251aSWu Zhangjin
12916f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
12926f7a251aSWu Zhangjin	bool "Loongson 2F"
12936f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
12946f7a251aSWu Zhangjin	select CPU_LOONGSON2
1295c197da91SArnaud Patard	select ARCH_REQUIRE_GPIOLIB
12966f7a251aSWu Zhangjin	help
12976f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
12986f7a251aSWu Zhangjin	  with many extensions.
12996f7a251aSWu Zhangjin
13006f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
13016f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
13026f7a251aSWu Zhangjin	  Loongson2E.
13036f7a251aSWu Zhangjin
1304ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1305ca585cf9SKelvin Cheung	bool "Loongson 1B"
1306ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1307ca585cf9SKelvin Cheung	select CPU_LOONGSON1
1308ca585cf9SKelvin Cheung	help
1309ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1310ca585cf9SKelvin Cheung	  release 2 instruction set.
1311ca585cf9SKelvin Cheung
13126e760c8dSRalf Baechleconfig CPU_MIPS32_R1
13136e760c8dSRalf Baechle	bool "MIPS32 Release 1"
13147cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
13156e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1316797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1317ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13186e760c8dSRalf Baechle	help
13195e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13201e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13211e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13221e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
13231e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13241e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
13251e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
13261e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
13271e5f1caaSRalf Baechle	  performance.
13281e5f1caaSRalf Baechle
13291e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
13301e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
13317cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
13321e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1333797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1334ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1335a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
13362235a54dSSanjay Lal	select HAVE_KVM
13371e5f1caaSRalf Baechle	help
13385e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
13396e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13406e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13416e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
13426e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13431da177e4SLinus Torvalds
13447fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
13457fd08ca5SLeonid Yegoshin	bool "MIPS32 Release 6 (EXPERIMENTAL)"
13467fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
13477fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
13487fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
13497fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
13507fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
13514e0748f5SMarkos Chandras	select GENERIC_CSUM
13527fd08ca5SLeonid Yegoshin	select HAVE_KVM
13537fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
13547fd08ca5SLeonid Yegoshin	help
13557fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
13567fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
13577fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
13587fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
13597fd08ca5SLeonid Yegoshin
13606e760c8dSRalf Baechleconfig CPU_MIPS64_R1
13616e760c8dSRalf Baechle	bool "MIPS64 Release 1"
13627cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1363797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1364ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1365ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1366ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13679cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
13686e760c8dSRalf Baechle	help
13696e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13706e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
13716e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
13726e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
13736e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
13741e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
13751e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
13761e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
13771e5f1caaSRalf Baechle	  performance.
13781e5f1caaSRalf Baechle
13791e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
13801e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
13817cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1382797798c1SRalf Baechle	select CPU_HAS_PREFETCH
13831e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
13841e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1385ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13869cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1387a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
13881e5f1caaSRalf Baechle	help
13891e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
13901e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
13911e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
13921e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
13931e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
13941da177e4SLinus Torvalds
13957fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
13967fd08ca5SLeonid Yegoshin	bool "MIPS64 Release 6 (EXPERIMENTAL)"
13977fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
13987fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
13997fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14007fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
14017fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14027fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14034e0748f5SMarkos Chandras	select GENERIC_CSUM
14047fd08ca5SLeonid Yegoshin	help
14057fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14067fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
14077fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
14087fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
14097fd08ca5SLeonid Yegoshin
14101da177e4SLinus Torvaldsconfig CPU_R3000
14111da177e4SLinus Torvalds	bool "R3000"
14127cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1413f7062ddbSRalf Baechle	select CPU_HAS_WB
1414ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1415797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14161da177e4SLinus Torvalds	help
14171da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
14181da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
14191da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
14201da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
14211da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
14221da177e4SLinus Torvalds	  try to recompile with R3000.
14231da177e4SLinus Torvalds
14241da177e4SLinus Torvaldsconfig CPU_TX39XX
14251da177e4SLinus Torvalds	bool "R39XX"
14267cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1427ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
14281da177e4SLinus Torvalds
14291da177e4SLinus Torvaldsconfig CPU_VR41XX
14301da177e4SLinus Torvalds	bool "R41xx"
14317cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1432ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1433ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
14341da177e4SLinus Torvalds	help
14355e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
14361da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
14371da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
14381da177e4SLinus Torvalds	  processor or vice versa.
14391da177e4SLinus Torvalds
14401da177e4SLinus Torvaldsconfig CPU_R4300
14411da177e4SLinus Torvalds	bool "R4300"
14427cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1443ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1444ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
14451da177e4SLinus Torvalds	help
14461da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
14471da177e4SLinus Torvalds
14481da177e4SLinus Torvaldsconfig CPU_R4X00
14491da177e4SLinus Torvalds	bool "R4x00"
14507cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1451ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1452ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1453970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14541da177e4SLinus Torvalds	help
14551da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
14561da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
14571da177e4SLinus Torvalds
14581da177e4SLinus Torvaldsconfig CPU_TX49XX
14591da177e4SLinus Torvalds	bool "R49XX"
14607cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1461de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1462ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1463ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1464970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14651da177e4SLinus Torvalds
14661da177e4SLinus Torvaldsconfig CPU_R5000
14671da177e4SLinus Torvalds	bool "R5000"
14687cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1469ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1470ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1471970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14721da177e4SLinus Torvalds	help
14731da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
14741da177e4SLinus Torvalds
14751da177e4SLinus Torvaldsconfig CPU_R5432
14761da177e4SLinus Torvalds	bool "R5432"
14777cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
14785e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
14795e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1480970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14811da177e4SLinus Torvalds
1482542c1020SShinya Kuribayashiconfig CPU_R5500
1483542c1020SShinya Kuribayashi	bool "R5500"
1484542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1485542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1486542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
14879cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1488542c1020SShinya Kuribayashi	help
1489542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1490542c1020SShinya Kuribayashi	  instruction set.
1491542c1020SShinya Kuribayashi
14921da177e4SLinus Torvaldsconfig CPU_R6000
14931da177e4SLinus Torvalds	bool "R6000"
14947cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1495ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
14961da177e4SLinus Torvalds	help
14971da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1498c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
14991da177e4SLinus Torvalds
15001da177e4SLinus Torvaldsconfig CPU_NEVADA
15011da177e4SLinus Torvalds	bool "RM52xx"
15027cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1503ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1504ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1505970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15061da177e4SLinus Torvalds	help
15071da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
15081da177e4SLinus Torvalds
15091da177e4SLinus Torvaldsconfig CPU_R8000
15101da177e4SLinus Torvalds	bool "R8000"
15117cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
15125e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1513ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15141da177e4SLinus Torvalds	help
15151da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
15161da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
15171da177e4SLinus Torvalds
15181da177e4SLinus Torvaldsconfig CPU_R10000
15191da177e4SLinus Torvalds	bool "R10000"
15207cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
15215e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1522ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1523ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1524797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1525970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15261da177e4SLinus Torvalds	help
15271da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
15281da177e4SLinus Torvalds
15291da177e4SLinus Torvaldsconfig CPU_RM7000
15301da177e4SLinus Torvalds	bool "RM7000"
15317cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
15325e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1533ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1534ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1535797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1536970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15371da177e4SLinus Torvalds
15381da177e4SLinus Torvaldsconfig CPU_SB1
15391da177e4SLinus Torvalds	bool "SB1"
15407cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1541ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1542ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1543797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1544970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15450004a9dfSRalf Baechle	select WEAK_ORDERING
15461da177e4SLinus Torvalds
1547a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1548a86c7f72SDavid Daney	bool "Cavium Octeon processor"
15495e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1550a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1551a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1552a86c7f72SDavid Daney	select WEAK_ORDERING
1553a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
15549cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
15559296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
1556930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
1557a86c7f72SDavid Daney	help
1558a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1559a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1560a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1561a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1562a86c7f72SDavid Daney
1563cd746249SJonas Gorskiconfig CPU_BMIPS
1564cd746249SJonas Gorski	bool "Broadcom BMIPS"
1565cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1566cd746249SJonas Gorski	select CPU_MIPS32
1567fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1568cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1569cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1570cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1571cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1572cd746249SJonas Gorski	select DMA_NONCOHERENT
1573cd746249SJonas Gorski	select IRQ_CPU
1574cd746249SJonas Gorski	select SWAP_IO_SPACE
1575cd746249SJonas Gorski	select WEAK_ORDERING
1576c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
157769aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1578c1c0c461SKevin Cernekee	help
1579fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1580c1c0c461SKevin Cernekee
15817f058e85SJayachandran Cconfig CPU_XLR
15827f058e85SJayachandran C	bool "Netlogic XLR SoC"
15837f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
15847f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
15857f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
15867f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1587970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15887f058e85SJayachandran C	select WEAK_ORDERING
15897f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
15907f058e85SJayachandran C	help
15917f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
15921c773ea4SJayachandran C
15931c773ea4SJayachandran Cconfig CPU_XLP
15941c773ea4SJayachandran C	bool "Netlogic XLP SoC"
15951c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
15961c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
15971c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
15981c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
15991c773ea4SJayachandran C	select WEAK_ORDERING
16001c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16011c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1602d6504846SJayachandran C	select CPU_MIPSR2
16031c773ea4SJayachandran C	help
16041c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
16051da177e4SLinus Torvaldsendchoice
16061da177e4SLinus Torvalds
1607a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1608a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1609a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
16107fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1611a6e18781SLeonid Yegoshin	help
1612a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1613a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1614a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1615a6e18781SLeonid Yegoshin
1616a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1617a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1618a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1619a6e18781SLeonid Yegoshin	select EVA
1620a6e18781SLeonid Yegoshin	default y
1621a6e18781SLeonid Yegoshin	help
1622a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1623a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1624a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1625a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1626a6e18781SLeonid Yegoshin
1627622844bfSWu Zhangjinif CPU_LOONGSON2F
1628622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1629622844bfSWu Zhangjin	bool
1630622844bfSWu Zhangjin
1631622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1632622844bfSWu Zhangjin	bool
1633622844bfSWu Zhangjin
1634622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1635622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1636622844bfSWu Zhangjin	default y
1637622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1638622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1639622844bfSWu Zhangjin	help
1640622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1641622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1642622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1643622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1644622844bfSWu Zhangjin
1645622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1646622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1647622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1648622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1649622844bfSWu Zhangjin	  systems.
1650622844bfSWu Zhangjin
1651622844bfSWu Zhangjin	  If unsure, please say Y.
1652622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1653622844bfSWu Zhangjin
16541b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
16551b93b3c3SWu Zhangjin	bool
16561b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
16571b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
165831c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
16591b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1660fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
16614e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
16621b93b3c3SWu Zhangjin
16631b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
16641b93b3c3SWu Zhangjin	bool
16651b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
16661b93b3c3SWu Zhangjin
16673702bba5SWu Zhangjinconfig CPU_LOONGSON2
16683702bba5SWu Zhangjin	bool
16693702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
16703702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
16713702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1672970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16733702bba5SWu Zhangjin
1674ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1675ca585cf9SKelvin Cheung	bool
1676ca585cf9SKelvin Cheung	select CPU_MIPS32
1677ca585cf9SKelvin Cheung	select CPU_MIPSR2
1678ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1679ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1680ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1681f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1682ca585cf9SKelvin Cheung
1683fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
168404fa8bf7SJonas Gorski	select SMP_UP if SMP
16851bbb6c1bSKevin Cernekee	bool
1686cd746249SJonas Gorski
1687cd746249SJonas Gorskiconfig CPU_BMIPS4350
1688cd746249SJonas Gorski	bool
1689cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1690cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1691cd746249SJonas Gorski
1692cd746249SJonas Gorskiconfig CPU_BMIPS4380
1693cd746249SJonas Gorski	bool
1694bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1695cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1696cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1697cd746249SJonas Gorski
1698cd746249SJonas Gorskiconfig CPU_BMIPS5000
1699cd746249SJonas Gorski	bool
1700cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1701bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1702cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1703cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
17041bbb6c1bSKevin Cernekee
17050e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
17060e476d91SHuacai Chen	bool
17070e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
17080e476d91SHuacai Chen
17093702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
17102a21c730SFuxin Zhang	bool
17112a21c730SFuxin Zhang
17126f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
17136f7a251aSWu Zhangjin	bool
171455045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
171555045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
171622f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
17176f7a251aSWu Zhangjin
1718ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1719ca585cf9SKelvin Cheung	bool
1720ca585cf9SKelvin Cheung
17217cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
17227cf8053bSRalf Baechle	bool
17237cf8053bSRalf Baechle
17247cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
17257cf8053bSRalf Baechle	bool
17267cf8053bSRalf Baechle
1727a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1728a6e18781SLeonid Yegoshin	bool
1729a6e18781SLeonid Yegoshin
17307fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
17317fd08ca5SLeonid Yegoshin	bool
17327fd08ca5SLeonid Yegoshin
17337cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
17347cf8053bSRalf Baechle	bool
17357cf8053bSRalf Baechle
17367cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
17377cf8053bSRalf Baechle	bool
17387cf8053bSRalf Baechle
17397fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
17407fd08ca5SLeonid Yegoshin	bool
17417fd08ca5SLeonid Yegoshin
17427cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
17437cf8053bSRalf Baechle	bool
17447cf8053bSRalf Baechle
17457cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
17467cf8053bSRalf Baechle	bool
17477cf8053bSRalf Baechle
17487cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
17497cf8053bSRalf Baechle	bool
17507cf8053bSRalf Baechle
17517cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
17527cf8053bSRalf Baechle	bool
17537cf8053bSRalf Baechle
17547cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
17557cf8053bSRalf Baechle	bool
17567cf8053bSRalf Baechle
17577cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
17587cf8053bSRalf Baechle	bool
17597cf8053bSRalf Baechle
17607cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
17617cf8053bSRalf Baechle	bool
17627cf8053bSRalf Baechle
17637cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
17647cf8053bSRalf Baechle	bool
17657cf8053bSRalf Baechle
1766542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1767542c1020SShinya Kuribayashi	bool
1768542c1020SShinya Kuribayashi
17697cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
17707cf8053bSRalf Baechle	bool
17717cf8053bSRalf Baechle
17727cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
17737cf8053bSRalf Baechle	bool
17747cf8053bSRalf Baechle
17757cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
17767cf8053bSRalf Baechle	bool
17777cf8053bSRalf Baechle
17787cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
17797cf8053bSRalf Baechle	bool
17807cf8053bSRalf Baechle
17817cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
17827cf8053bSRalf Baechle	bool
17837cf8053bSRalf Baechle
17847cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
17857cf8053bSRalf Baechle	bool
17867cf8053bSRalf Baechle
17875e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
17885e683389SDavid Daney	bool
17895e683389SDavid Daney
1790cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1791c1c0c461SKevin Cernekee	bool
1792c1c0c461SKevin Cernekee
1793fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1794c1c0c461SKevin Cernekee	bool
1795cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1796c1c0c461SKevin Cernekee
1797c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1798c1c0c461SKevin Cernekee	bool
1799cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1800c1c0c461SKevin Cernekee
1801c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1802c1c0c461SKevin Cernekee	bool
1803cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1804c1c0c461SKevin Cernekee
1805c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1806c1c0c461SKevin Cernekee	bool
1807cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1808c1c0c461SKevin Cernekee
18097f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
18107f058e85SJayachandran C	bool
18117f058e85SJayachandran C
18121c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
18131c773ea4SJayachandran C	bool
18141c773ea4SJayachandran C
1815b6911bbaSPaul Burtonconfig MIPS_MALTA_PM
1816b6911bbaSPaul Burton	depends on MIPS_MALTA
1817b6911bbaSPaul Burton	depends on PCI
1818b6911bbaSPaul Burton	bool
1819b6911bbaSPaul Burton	default y
1820b6911bbaSPaul Burton
182117099b11SRalf Baechle#
182217099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
182317099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
182417099b11SRalf Baechle#
18250004a9dfSRalf Baechleconfig WEAK_ORDERING
18260004a9dfSRalf Baechle	bool
182717099b11SRalf Baechle
182817099b11SRalf Baechle#
182917099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
183017099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
183117099b11SRalf Baechle#
183217099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
183317099b11SRalf Baechle	bool
18345e83d430SRalf Baechleendmenu
18355e83d430SRalf Baechle
18365e83d430SRalf Baechle#
18375e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
18385e83d430SRalf Baechle#
18395e83d430SRalf Baechleconfig CPU_MIPS32
18405e83d430SRalf Baechle	bool
18417fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
18425e83d430SRalf Baechle
18435e83d430SRalf Baechleconfig CPU_MIPS64
18445e83d430SRalf Baechle	bool
18457fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
18465e83d430SRalf Baechle
18475e83d430SRalf Baechle#
1848c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
18495e83d430SRalf Baechle#
18505e83d430SRalf Baechleconfig CPU_MIPSR1
18515e83d430SRalf Baechle	bool
18525e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
18535e83d430SRalf Baechle
18545e83d430SRalf Baechleconfig CPU_MIPSR2
18555e83d430SRalf Baechle	bool
1856a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1857a7e07b1aSMarkos Chandras	select MIPS_SPRAM
18585e83d430SRalf Baechle
18597fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
18607fd08ca5SLeonid Yegoshin	bool
18617fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1862a7e07b1aSMarkos Chandras	select MIPS_SPRAM
18635e83d430SRalf Baechle
1864a6e18781SLeonid Yegoshinconfig EVA
1865a6e18781SLeonid Yegoshin	bool
1866a6e18781SLeonid Yegoshin
18675e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
18685e83d430SRalf Baechle	bool
18695e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
18705e83d430SRalf Baechle	bool
18715e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
18725e83d430SRalf Baechle	bool
18735e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
18745e83d430SRalf Baechle	bool
187555045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
187655045ff5SWu Zhangjin	bool
187755045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
187855045ff5SWu Zhangjin	bool
18799cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
18809cffd154SDavid Daney	bool
188122f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
188222f1fdfdSWu Zhangjin	bool
188382622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
188482622284SDavid Daney	bool
1885d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
18865e83d430SRalf Baechle
18878192c9eaSDavid Daney#
18888192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
18898192c9eaSDavid Daney#
18908192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
18918192c9eaSDavid Daney       bool
1892f839490aSDavid Daney       default y if CPU_MIPSR1 || CPU_MIPSR2
18938192c9eaSDavid Daney
18945e83d430SRalf Baechlemenu "Kernel type"
18955e83d430SRalf Baechle
18965e83d430SRalf Baechlechoice
18975e83d430SRalf Baechle	prompt "Kernel code model"
18985e83d430SRalf Baechle	help
18995e83d430SRalf Baechle	  You should only select this option if you have a workload that
19005e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
19015e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
19025e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
19035e83d430SRalf Baechle
19045e83d430SRalf Baechleconfig 32BIT
19055e83d430SRalf Baechle	bool "32-bit kernel"
19065e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
19075e83d430SRalf Baechle	select TRAD_SIGNALS
19085e83d430SRalf Baechle	help
19095e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
19105e83d430SRalf Baechleconfig 64BIT
19115e83d430SRalf Baechle	bool "64-bit kernel"
19125e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
19135e83d430SRalf Baechle	help
19145e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
19155e83d430SRalf Baechle
19165e83d430SRalf Baechleendchoice
19175e83d430SRalf Baechle
19182235a54dSSanjay Lalconfig KVM_GUEST
19192235a54dSSanjay Lal	bool "KVM Guest Kernel"
1920f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
19212235a54dSSanjay Lal	help
19222235a54dSSanjay Lal	  Select this option if building a guest kernel for KVM (Trap & Emulate) mode
19232235a54dSSanjay Lal
1924eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
1925eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
19262235a54dSSanjay Lal	depends on KVM_GUEST
1927eda3d33cSJames Hogan	default 100
19282235a54dSSanjay Lal	help
1929eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
1930eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
1931eda3d33cSJames Hogan	  timer frequency is specified directly.
19322235a54dSSanjay Lal
19331da177e4SLinus Torvaldschoice
19341da177e4SLinus Torvalds	prompt "Kernel page size"
19351da177e4SLinus Torvalds	default PAGE_SIZE_4KB
19361da177e4SLinus Torvalds
19371da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
19381da177e4SLinus Torvalds	bool "4kB"
19390e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
19401da177e4SLinus Torvalds	help
19411da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
19421da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
19431da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
19441da177e4SLinus Torvalds	 recommended for low memory systems.
19451da177e4SLinus Torvalds
19461da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
19471da177e4SLinus Torvalds	bool "8kB"
19487d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
19491da177e4SLinus Torvalds	help
19501da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
19511da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
1952c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
1953c52399beSRalf Baechle	  suitable Linux distribution to support this.
19541da177e4SLinus Torvalds
19551da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
19561da177e4SLinus Torvalds	bool "16kB"
1957714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
19581da177e4SLinus Torvalds	help
19591da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
19601da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
1961714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
1962714bfad6SRalf Baechle	  Linux distribution to support this.
19631da177e4SLinus Torvalds
1964c52399beSRalf Baechleconfig PAGE_SIZE_32KB
1965c52399beSRalf Baechle	bool "32kB"
1966c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
1967c52399beSRalf Baechle	help
1968c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
1969c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
1970c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
1971c52399beSRalf Baechle	  distribution to support this.
1972c52399beSRalf Baechle
19731da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
19741da177e4SLinus Torvalds	bool "64kB"
19757d60717eSKees Cook	depends on !CPU_R3000 && !CPU_TX39XX
19761da177e4SLinus Torvalds	help
19771da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
19781da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
19791da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
1980714bfad6SRalf Baechle	  writing this option is still high experimental.
19811da177e4SLinus Torvalds
19821da177e4SLinus Torvaldsendchoice
19831da177e4SLinus Torvalds
1984c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
1985c9bace7cSDavid Daney	int "Maximum zone order"
1986e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
1987e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
1988e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
1989e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
1990e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
1991e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
1992c9bace7cSDavid Daney	range 11 64
1993c9bace7cSDavid Daney	default "11"
1994c9bace7cSDavid Daney	help
1995c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
1996c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
1997c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
1998c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
1999c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2000c9bace7cSDavid Daney	  increase this value.
2001c9bace7cSDavid Daney
2002c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2003c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2004c9bace7cSDavid Daney
2005c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2006c9bace7cSDavid Daney	  when choosing a value for this option.
2007c9bace7cSDavid Daney
20081da177e4SLinus Torvaldsconfig BOARD_SCACHE
20091da177e4SLinus Torvalds	bool
20101da177e4SLinus Torvalds
20111da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
20121da177e4SLinus Torvalds	bool
20131da177e4SLinus Torvalds	select BOARD_SCACHE
20141da177e4SLinus Torvalds
20159318c51aSChris Dearman#
20169318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
20179318c51aSChris Dearman#
20189318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
20199318c51aSChris Dearman	bool
20209318c51aSChris Dearman	select BOARD_SCACHE
20219318c51aSChris Dearman
20221da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
20231da177e4SLinus Torvalds	bool
20241da177e4SLinus Torvalds	select BOARD_SCACHE
20251da177e4SLinus Torvalds
20261da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
20271da177e4SLinus Torvalds	bool
20281da177e4SLinus Torvalds	select BOARD_SCACHE
20291da177e4SLinus Torvalds
20301da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
20311da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
20321da177e4SLinus Torvalds	depends on CPU_SB1
20331da177e4SLinus Torvalds	help
20341da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
20351da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
20361da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
20371da177e4SLinus Torvalds
20381da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2039c8094b53SRalf Baechle	bool
20401da177e4SLinus Torvalds
20413165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
20423165c846SFlorian Fainelli	bool
20433165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
20443165c846SFlorian Fainelli
204591405eb6SFlorian Fainelliconfig CPU_R4K_FPU
204691405eb6SFlorian Fainelli	bool
204791405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
204891405eb6SFlorian Fainelli
204962cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
205062cedc4fSFlorian Fainelli	bool
205162cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
205262cedc4fSFlorian Fainelli
205359d6ab86SRalf Baechleconfig MIPS_MT_SMP
2054a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
205559d6ab86SRalf Baechle	depends on SYS_SUPPORTS_MULTITHREADING
205659d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2057d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2058c080faa5SSteven J. Hill	select SYNC_R4K
20590c2cb004SPaul Burton	select MIPS_GIC_IPI
206059d6ab86SRalf Baechle	select MIPS_MT
206159d6ab86SRalf Baechle	select SMP
206287353d8aSRalf Baechle	select SMP_UP
2063c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2064c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2065399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
206659d6ab86SRalf Baechle	help
2067c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2068c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2069c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2070c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2071c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
207259d6ab86SRalf Baechle
2073f41ae0b2SRalf Baechleconfig MIPS_MT
2074f41ae0b2SRalf Baechle	bool
2075f41ae0b2SRalf Baechle
20760ab7aefcSRalf Baechleconfig SCHED_SMT
20770ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
20780ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
20790ab7aefcSRalf Baechle	default n
20800ab7aefcSRalf Baechle	help
20810ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
20820ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
20830ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
20840ab7aefcSRalf Baechle
20850ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
20860ab7aefcSRalf Baechle	bool
20870ab7aefcSRalf Baechle
2088f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2089f41ae0b2SRalf Baechle	bool
2090f41ae0b2SRalf Baechle
2091f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2092f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2093f088fc84SRalf Baechle	default y
2094b633648cSRalf Baechle	depends on MIPS_MT_SMP
209507cc0c9eSRalf Baechle
2096b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2097b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
2098b0a668fbSLeonid Yegoshin	depends on CPU_MIPSR6 && !SMP
2099b0a668fbSLeonid Yegoshin	default y
2100b0a668fbSLeonid Yegoshin	help
2101b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2102b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
2103b0a668fbSLeonid Yegoshin	  default. You can enable it using the 'mipsr2emul' kernel option.
2104b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2105b0a668fbSLeonid Yegoshin	  final kernel image.
2106b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels"
2107b0a668fbSLeonid Yegoshin	depends on SMP && CPU_MIPSR6
2108b0a668fbSLeonid Yegoshin
210907cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
211007cc0c9eSRalf Baechle	bool "VPE loader support."
2111704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
211207cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
211307cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
211407cc0c9eSRalf Baechle	select MIPS_MT
211507cc0c9eSRalf Baechle	help
211607cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
211707cc0c9eSRalf Baechle	  onto another VPE and running it.
2118f088fc84SRalf Baechle
211917a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
212017a1d523SDeng-Cheng Zhu	bool
212117a1d523SDeng-Cheng Zhu	default "y"
212217a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
212317a1d523SDeng-Cheng Zhu
21241a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
21251a2a6d7eSDeng-Cheng Zhu	bool
21261a2a6d7eSDeng-Cheng Zhu	default "y"
21271a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
21281a2a6d7eSDeng-Cheng Zhu
2129e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2130e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2131e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2132e01402b1SRalf Baechle	default y
2133e01402b1SRalf Baechle	help
2134e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2135e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2136e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2137e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2138e01402b1SRalf Baechle
2139e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2140e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2141e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
21425e83d430SRalf Baechle	help
2143e01402b1SRalf Baechle
2144da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2145da615cf6SDeng-Cheng Zhu	bool
2146da615cf6SDeng-Cheng Zhu	default "y"
2147da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2148da615cf6SDeng-Cheng Zhu
21492c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
21502c973ef0SDeng-Cheng Zhu	bool
21512c973ef0SDeng-Cheng Zhu	default "y"
21522c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
21532c973ef0SDeng-Cheng Zhu
21544a16ff4cSRalf Baechleconfig MIPS_CMP
21555cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
2156b633648cSRalf Baechle	depends on SYS_SUPPORTS_MIPS_CMP
215772e20142SPaul Burton	select MIPS_GIC_IPI
2158b10b43baSMarkos Chandras	select SMP
2159eb9b5141STim Anderson	select SYNC_R4K
2160b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
21614a16ff4cSRalf Baechle	select WEAK_ORDERING
21624a16ff4cSRalf Baechle	default n
21634a16ff4cSRalf Baechle	help
2164044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2165044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2166044505c7SPaul Burton	  its ability to start secondary CPUs.
21674a16ff4cSRalf Baechle
21685cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
21695cac93b3SPaul Burton	  instead of this.
21705cac93b3SPaul Burton
21710ee958e1SPaul Burtonconfig MIPS_CPS
21720ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
21730ee958e1SPaul Burton	depends on SYS_SUPPORTS_MIPS_CPS
21740ee958e1SPaul Burton	select MIPS_CM
21750ee958e1SPaul Burton	select MIPS_CPC
21761d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
21770ee958e1SPaul Burton	select MIPS_GIC_IPI
21780ee958e1SPaul Burton	select SMP
21790ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
21801d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
21810ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
21820ee958e1SPaul Burton	select WEAK_ORDERING
21830ee958e1SPaul Burton	help
21840ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
21850ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
21860ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
21870ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
21880ee958e1SPaul Burton	  support is unavailable.
21890ee958e1SPaul Burton
21903179d37eSPaul Burtonconfig MIPS_CPS_PM
219139a59593SMarkos Chandras	depends on MIPS_CPS
2192a8b84677SPaul Burton	select MIPS_CPC
21933179d37eSPaul Burton	bool
21943179d37eSPaul Burton
219572e20142SPaul Burtonconfig MIPS_GIC_IPI
219672e20142SPaul Burton	bool
219772e20142SPaul Burton
21989f98f3ddSPaul Burtonconfig MIPS_CM
21999f98f3ddSPaul Burton	bool
22009f98f3ddSPaul Burton
22019c38cf44SPaul Burtonconfig MIPS_CPC
22029c38cf44SPaul Burton	bool
22032600990eSRalf Baechle
22041da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS
22051da177e4SLinus Torvalds	bool
22061da177e4SLinus Torvalds	depends on CPU_SB1_PASS_1
22071da177e4SLinus Torvalds	default y
22081da177e4SLinus Torvalds
22091da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
22101da177e4SLinus Torvalds	bool
22111da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
22121da177e4SLinus Torvalds	default y
22131da177e4SLinus Torvalds
22141da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
22151da177e4SLinus Torvalds	bool
22161da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
22171da177e4SLinus Torvalds	default y
22181da177e4SLinus Torvalds
22192235a54dSSanjay Lal
222060ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
222134adb28dSRalf Baechle       bool
222260ec6571Spascal@pabr.org
22239e2b5372SMarkos Chandraschoice
22249e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
22259e2b5372SMarkos Chandras
22269e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
22279e2b5372SMarkos Chandras	bool "None"
22289e2b5372SMarkos Chandras	help
22299e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
22309e2b5372SMarkos Chandras
22319693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
22329693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
22339e2b5372SMarkos Chandras	bool "SmartMIPS"
22349693a853SFranck Bui-Huu	help
22359693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
22369693a853SFranck Bui-Huu	  increased security at both hardware and software level for
22379693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
22389693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
22399693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
22409693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
22419693a853SFranck Bui-Huu	  here.
22429693a853SFranck Bui-Huu
2243bce86083SSteven J. Hillconfig CPU_MICROMIPS
22447fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
22459e2b5372SMarkos Chandras	bool "microMIPS"
2246bce86083SSteven J. Hill	help
2247bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2248bce86083SSteven J. Hill	  microMIPS ISA
2249bce86083SSteven J. Hill
22509e2b5372SMarkos Chandrasendchoice
22519e2b5372SMarkos Chandras
2252a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
22534af94d5dSPaul Burton	bool "Support for the MIPS SIMD Architecture (EXPERIMENTAL)"
2254a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
22552a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2256a5e9a69eSPaul Burton	help
2257a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2258a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
22591db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
22601db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
22611db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
22621db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
22631db1af84SPaul Burton	  the size & complexity of your kernel.
2264a5e9a69eSPaul Burton
2265a5e9a69eSPaul Burton	  If unsure, say Y.
2266a5e9a69eSPaul Burton
22671da177e4SLinus Torvaldsconfig CPU_HAS_WB
2268f7062ddbSRalf Baechle	bool
2269e01402b1SRalf Baechle
2270df0ac8a4SKevin Cernekeeconfig XKS01
2271df0ac8a4SKevin Cernekee	bool
2272df0ac8a4SKevin Cernekee
2273f41ae0b2SRalf Baechle#
2274f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2275f41ae0b2SRalf Baechle#
2276e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2277f41ae0b2SRalf Baechle	bool
2278e01402b1SRalf Baechle
2279f41ae0b2SRalf Baechle#
2280f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2281f41ae0b2SRalf Baechle#
2282e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2283f41ae0b2SRalf Baechle	bool
2284e01402b1SRalf Baechle
22851da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
22861da177e4SLinus Torvalds	bool
22871da177e4SLinus Torvalds	depends on !CPU_R3000
22881da177e4SLinus Torvalds	default y
22891da177e4SLinus Torvalds
22901da177e4SLinus Torvalds#
229120d60d99SMaciej W. Rozycki# CPU non-features
229220d60d99SMaciej W. Rozycki#
229320d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
229420d60d99SMaciej W. Rozycki	bool
229520d60d99SMaciej W. Rozycki
229620d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
229720d60d99SMaciej W. Rozycki	bool
229820d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
229920d60d99SMaciej W. Rozycki
230020d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
230120d60d99SMaciej W. Rozycki	bool
230220d60d99SMaciej W. Rozycki
230320d60d99SMaciej W. Rozycki#
23041da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
23051da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
23061da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
23071da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
23081da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
23091da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
23101da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
23111da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2312797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2313797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2314797798c1SRalf Baechle#   support.
23151da177e4SLinus Torvalds#
23161da177e4SLinus Torvaldsconfig HIGHMEM
23171da177e4SLinus Torvalds	bool "High Memory Support"
2318a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2319797798c1SRalf Baechle
2320797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2321797798c1SRalf Baechle	bool
2322797798c1SRalf Baechle
2323797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2324797798c1SRalf Baechle	bool
23251da177e4SLinus Torvalds
23269693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
23279693a853SFranck Bui-Huu	bool
23289693a853SFranck Bui-Huu
2329a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2330a6a4834cSSteven J. Hill	bool
2331a6a4834cSSteven J. Hill
2332377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2333377cb1b6SRalf Baechle	bool
2334377cb1b6SRalf Baechle	help
2335377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2336377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2337377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2338377cb1b6SRalf Baechle
2339a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2340a5e9a69eSPaul Burton	bool
2341a5e9a69eSPaul Burton
2342b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2343b4819b59SYoichi Yuasa	def_bool y
2344f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2345b4819b59SYoichi Yuasa
2346d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2347d8cb4e11SRalf Baechle	bool
2348d8cb4e11SRalf Baechle	default y if SGI_IP27
2349d8cb4e11SRalf Baechle	help
23503dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2351d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2352d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2353d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2354d8cb4e11SRalf Baechle
2355b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2356b1c6cd42SAtsushi Nemoto	bool
23577de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
235831473747SAtsushi Nemoto
2359d8cb4e11SRalf Baechleconfig NUMA
2360d8cb4e11SRalf Baechle	bool "NUMA Support"
2361d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2362d8cb4e11SRalf Baechle	help
2363d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2364d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2365d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2366d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2367d8cb4e11SRalf Baechle	  disabled.
2368d8cb4e11SRalf Baechle
2369d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2370d8cb4e11SRalf Baechle	bool
2371d8cb4e11SRalf Baechle
2372c80d79d7SYasunori Gotoconfig NODES_SHIFT
2373c80d79d7SYasunori Goto	int
2374c80d79d7SYasunori Goto	default "6"
2375c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2376c80d79d7SYasunori Goto
237714f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
237814f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
2379b633648cSRalf Baechle	depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP)
238014f70012SDeng-Cheng Zhu	default y
238114f70012SDeng-Cheng Zhu	help
238214f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
238314f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
238414f70012SDeng-Cheng Zhu
2385b4819b59SYoichi Yuasasource "mm/Kconfig"
2386b4819b59SYoichi Yuasa
23871da177e4SLinus Torvaldsconfig SMP
23881da177e4SLinus Torvalds	bool "Multi-Processing support"
2389e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2390e73ea273SRalf Baechle	help
23911da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
23924a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
23934a474157SRobert Graffham	  than one CPU, say Y.
23941da177e4SLinus Torvalds
23954a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
23961da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
23971da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
23984a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
23991da177e4SLinus Torvalds	  will run faster if you say N here.
24001da177e4SLinus Torvalds
24011da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
24021da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
24031da177e4SLinus Torvalds
240403502faaSAdrian Bunk	  See also the SMP-HOWTO available at
240503502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
24061da177e4SLinus Torvalds
24071da177e4SLinus Torvalds	  If you don't know what to do here, say N.
24081da177e4SLinus Torvalds
240987353d8aSRalf Baechleconfig SMP_UP
241087353d8aSRalf Baechle	bool
241187353d8aSRalf Baechle
24124a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
24134a16ff4cSRalf Baechle	bool
24144a16ff4cSRalf Baechle
24150ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
24160ee958e1SPaul Burton	bool
24170ee958e1SPaul Burton
2418e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2419e73ea273SRalf Baechle	bool
2420e73ea273SRalf Baechle
2421130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2422130e2fb7SRalf Baechle	bool
2423130e2fb7SRalf Baechle
2424130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2425130e2fb7SRalf Baechle	bool
2426130e2fb7SRalf Baechle
2427130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2428130e2fb7SRalf Baechle	bool
2429130e2fb7SRalf Baechle
2430130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2431130e2fb7SRalf Baechle	bool
2432130e2fb7SRalf Baechle
2433130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2434130e2fb7SRalf Baechle	bool
2435130e2fb7SRalf Baechle
24361da177e4SLinus Torvaldsconfig NR_CPUS
2437a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2438a91796a9SJayachandran C	range 2 256
24391da177e4SLinus Torvalds	depends on SMP
2440130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2441130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2442130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2443130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2444130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
24451da177e4SLinus Torvalds	help
24461da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
24471da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
24481da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
244972ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
245072ede9b1SAtsushi Nemoto	  and 2 for all others.
24511da177e4SLinus Torvalds
24521da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
245372ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
245472ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
245572ede9b1SAtsushi Nemoto	  power of two.
24561da177e4SLinus Torvalds
2457399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2458399aaa25SAl Cooper	bool
2459399aaa25SAl Cooper
24601723b4a3SAtsushi Nemoto#
24611723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
24621723b4a3SAtsushi Nemoto#
24631723b4a3SAtsushi Nemoto
24641723b4a3SAtsushi Nemotochoice
24651723b4a3SAtsushi Nemoto	prompt "Timer frequency"
24661723b4a3SAtsushi Nemoto	default HZ_250
24671723b4a3SAtsushi Nemoto	help
24681723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
24691723b4a3SAtsushi Nemoto
24701723b4a3SAtsushi Nemoto	config HZ_48
24710f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
24721723b4a3SAtsushi Nemoto
24731723b4a3SAtsushi Nemoto	config HZ_100
24741723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
24751723b4a3SAtsushi Nemoto
24761723b4a3SAtsushi Nemoto	config HZ_128
24771723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
24781723b4a3SAtsushi Nemoto
24791723b4a3SAtsushi Nemoto	config HZ_250
24801723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
24811723b4a3SAtsushi Nemoto
24821723b4a3SAtsushi Nemoto	config HZ_256
24831723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
24841723b4a3SAtsushi Nemoto
24851723b4a3SAtsushi Nemoto	config HZ_1000
24861723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
24871723b4a3SAtsushi Nemoto
24881723b4a3SAtsushi Nemoto	config HZ_1024
24891723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
24901723b4a3SAtsushi Nemoto
24911723b4a3SAtsushi Nemotoendchoice
24921723b4a3SAtsushi Nemoto
24931723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
24941723b4a3SAtsushi Nemoto	bool
24951723b4a3SAtsushi Nemoto
24961723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
24971723b4a3SAtsushi Nemoto	bool
24981723b4a3SAtsushi Nemoto
24991723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
25001723b4a3SAtsushi Nemoto	bool
25011723b4a3SAtsushi Nemoto
25021723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
25031723b4a3SAtsushi Nemoto	bool
25041723b4a3SAtsushi Nemoto
25051723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
25061723b4a3SAtsushi Nemoto	bool
25071723b4a3SAtsushi Nemoto
25081723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
25091723b4a3SAtsushi Nemoto	bool
25101723b4a3SAtsushi Nemoto
25111723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
25121723b4a3SAtsushi Nemoto	bool
25131723b4a3SAtsushi Nemoto
25141723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
25151723b4a3SAtsushi Nemoto	bool
25161723b4a3SAtsushi Nemoto	default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
25171723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
25181723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
25191723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
25201723b4a3SAtsushi Nemoto
25211723b4a3SAtsushi Nemotoconfig HZ
25221723b4a3SAtsushi Nemoto	int
25231723b4a3SAtsushi Nemoto	default 48 if HZ_48
25241723b4a3SAtsushi Nemoto	default 100 if HZ_100
25251723b4a3SAtsushi Nemoto	default 128 if HZ_128
25261723b4a3SAtsushi Nemoto	default 250 if HZ_250
25271723b4a3SAtsushi Nemoto	default 256 if HZ_256
25281723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
25291723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
25301723b4a3SAtsushi Nemoto
2531e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
25321da177e4SLinus Torvalds
2533ea6e942bSAtsushi Nemotoconfig KEXEC
25347d60717eSKees Cook	bool "Kexec system call"
2535ea6e942bSAtsushi Nemoto	help
2536ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2537ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
25383dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2539ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2540ea6e942bSAtsushi Nemoto
254101dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2542ea6e942bSAtsushi Nemoto
2543ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2544ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2545bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2546bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2547bf220695SGeert Uytterhoeven	  made.
2548ea6e942bSAtsushi Nemoto
25497aa1c8f4SRalf Baechleconfig CRASH_DUMP
25507aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
25517aa1c8f4SRalf Baechle	  help
25527aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
25537aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
25547aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
25557aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
25567aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
25577aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
25587aa1c8f4SRalf Baechle	  PHYSICAL_START.
25597aa1c8f4SRalf Baechle
25607aa1c8f4SRalf Baechleconfig PHYSICAL_START
25617aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
25627aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
25637aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
25647aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
25657aa1c8f4SRalf Baechle	  help
25667aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
25677aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
25687aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
25697aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
25707aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
25717aa1c8f4SRalf Baechle
2572ea6e942bSAtsushi Nemotoconfig SECCOMP
2573ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2574293c5bd1SRalf Baechle	depends on PROC_FS
2575ea6e942bSAtsushi Nemoto	default y
2576ea6e942bSAtsushi Nemoto	help
2577ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2578ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2579ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2580ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2581ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2582ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2583ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2584ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2585ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2586ea6e942bSAtsushi Nemoto
2587ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2588ea6e942bSAtsushi Nemoto
2589597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
259006e2e882SPaul Burton	bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)"
2591597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2592597ce172SPaul Burton	help
2593597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2594597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2595597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2596597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2597597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2598597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2599597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2600597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2601597ce172SPaul Burton	  saying N here.
2602597ce172SPaul Burton
260306e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
260406e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
260506e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
260606e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
260706e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
260806e2e882SPaul Burton	  said details.
260906e2e882SPaul Burton
261006e2e882SPaul Burton	  If unsure, say N.
2611597ce172SPaul Burton
2612f2ffa5abSDezhong Diaoconfig USE_OF
26130b3e06fdSJonas Gorski	bool
2614f2ffa5abSDezhong Diao	select OF
2615e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2616abd2363fSGrant Likely	select IRQ_DOMAIN
2617f2ffa5abSDezhong Diao
26187fafb068SAndrew Brestickerconfig BUILTIN_DTB
26197fafb068SAndrew Bresticker	bool
26207fafb068SAndrew Bresticker
26215e83d430SRalf Baechleendmenu
26225e83d430SRalf Baechle
26231df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
26241df0f0ffSAtsushi Nemoto	bool
26251df0f0ffSAtsushi Nemoto	default y
26261df0f0ffSAtsushi Nemoto
26271df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
26281df0f0ffSAtsushi Nemoto	bool
26291df0f0ffSAtsushi Nemoto	default y
26301df0f0ffSAtsushi Nemoto
2631b6c3539bSRalf Baechlesource "init/Kconfig"
2632b6c3539bSRalf Baechle
2633dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2634dc52ddc0SMatt Helsley
26351da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
26361da177e4SLinus Torvalds
26375e83d430SRalf Baechleconfig HW_HAS_EISA
26385e83d430SRalf Baechle	bool
26391da177e4SLinus Torvaldsconfig HW_HAS_PCI
26401da177e4SLinus Torvalds	bool
26411da177e4SLinus Torvalds
26421da177e4SLinus Torvaldsconfig PCI
26431da177e4SLinus Torvalds	bool "Support for PCI controller"
26441da177e4SLinus Torvalds	depends on HW_HAS_PCI
2645abb4ae46SRalf Baechle	select PCI_DOMAINS
26460f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
26471da177e4SLinus Torvalds	help
26481da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
26491da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
26501da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
26511da177e4SLinus Torvalds	  say Y, otherwise N.
26521da177e4SLinus Torvalds
26530e476d91SHuacai Chenconfig HT_PCI
26540e476d91SHuacai Chen	bool "Support for HT-linked PCI"
26550e476d91SHuacai Chen	default y
26560e476d91SHuacai Chen	depends on CPU_LOONGSON3
26570e476d91SHuacai Chen	select PCI
26580e476d91SHuacai Chen	select PCI_DOMAINS
26590e476d91SHuacai Chen	help
26600e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
26610e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
26620e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
26630e476d91SHuacai Chen
26641da177e4SLinus Torvaldsconfig PCI_DOMAINS
26651da177e4SLinus Torvalds	bool
26661da177e4SLinus Torvalds
26671da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
26681da177e4SLinus Torvalds
26693f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig"
26703f787ca4SJonas Gorski
26711da177e4SLinus Torvalds#
26721da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
26731da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
26741da177e4SLinus Torvalds# users to choose the right thing ...
26751da177e4SLinus Torvalds#
26761da177e4SLinus Torvaldsconfig ISA
26771da177e4SLinus Torvalds	bool
26781da177e4SLinus Torvalds
26791da177e4SLinus Torvaldsconfig EISA
26801da177e4SLinus Torvalds	bool "EISA support"
26815e83d430SRalf Baechle	depends on HW_HAS_EISA
26821da177e4SLinus Torvalds	select ISA
2683aa414dffSRalf Baechle	select GENERIC_ISA_DMA
26841da177e4SLinus Torvalds	---help---
26851da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
26861da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
26871da177e4SLinus Torvalds
26881da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
26891da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
26901da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
26911da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
26921da177e4SLinus Torvalds
26931da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
26941da177e4SLinus Torvalds
26951da177e4SLinus Torvalds	  Otherwise, say N.
26961da177e4SLinus Torvalds
26971da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
26981da177e4SLinus Torvalds
26991da177e4SLinus Torvaldsconfig TC
27001da177e4SLinus Torvalds	bool "TURBOchannel support"
27011da177e4SLinus Torvalds	depends on MACH_DECSTATION
27021da177e4SLinus Torvalds	help
270350a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
270450a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
270550a23e6eSJustin P. Mattock	  at:
270650a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
270750a23e6eSJustin P. Mattock	  and:
270850a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
270950a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
271050a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
27111da177e4SLinus Torvalds
27121da177e4SLinus Torvaldsconfig MMU
27131da177e4SLinus Torvalds	bool
27141da177e4SLinus Torvalds	default y
27151da177e4SLinus Torvalds
2716d865bea4SRalf Baechleconfig I8253
2717d865bea4SRalf Baechle	bool
2718798778b8SRussell King	select CLKSRC_I8253
27192d02612fSThomas Gleixner	select CLKEVT_I8253
27209726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
2721d865bea4SRalf Baechle
2722e05eb3f8SRalf Baechleconfig ZONE_DMA
2723e05eb3f8SRalf Baechle	bool
2724e05eb3f8SRalf Baechle
2725cce335aeSRalf Baechleconfig ZONE_DMA32
2726cce335aeSRalf Baechle	bool
2727cce335aeSRalf Baechle
27281da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
27291da177e4SLinus Torvalds
27301da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig"
27311da177e4SLinus Torvalds
2732388b78adSAlexandre Bounineconfig RAPIDIO
273356abde72SAlexandre Bounine	tristate "RapidIO support"
2734388b78adSAlexandre Bounine	depends on PCI
2735388b78adSAlexandre Bounine	default n
2736388b78adSAlexandre Bounine	help
2737388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
2738388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
2739388b78adSAlexandre Bounine
2740388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
2741388b78adSAlexandre Bounine
27421da177e4SLinus Torvaldsendmenu
27431da177e4SLinus Torvalds
27441da177e4SLinus Torvaldsmenu "Executable file formats"
27451da177e4SLinus Torvalds
27461da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
27471da177e4SLinus Torvalds
27481da177e4SLinus Torvaldsconfig TRAD_SIGNALS
27491da177e4SLinus Torvalds	bool
27501da177e4SLinus Torvalds
27511da177e4SLinus Torvaldsconfig MIPS32_COMPAT
275278aaf956SRalf Baechle	bool
27531da177e4SLinus Torvalds
27541da177e4SLinus Torvaldsconfig COMPAT
27551da177e4SLinus Torvalds	bool
27561da177e4SLinus Torvalds
275705e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
275805e43966SAtsushi Nemoto	bool
275905e43966SAtsushi Nemoto
27601da177e4SLinus Torvaldsconfig MIPS32_O32
27611da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
276278aaf956SRalf Baechle	depends on 64BIT
276378aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
276478aaf956SRalf Baechle	select COMPAT
276578aaf956SRalf Baechle	select MIPS32_COMPAT
276678aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
27671da177e4SLinus Torvalds	help
27681da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
27691da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
27701da177e4SLinus Torvalds	  existing binaries are in this format.
27711da177e4SLinus Torvalds
27721da177e4SLinus Torvalds	  If unsure, say Y.
27731da177e4SLinus Torvalds
27741da177e4SLinus Torvaldsconfig MIPS32_N32
27751da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
2776c22eacfeSRalf Baechle	depends on 64BIT
277778aaf956SRalf Baechle	select COMPAT
277878aaf956SRalf Baechle	select MIPS32_COMPAT
277978aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
27801da177e4SLinus Torvalds	help
27811da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
27821da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
27831da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
27841da177e4SLinus Torvalds	  cases.
27851da177e4SLinus Torvalds
27861da177e4SLinus Torvalds	  If unsure, say N.
27871da177e4SLinus Torvalds
27881da177e4SLinus Torvaldsconfig BINFMT_ELF32
27891da177e4SLinus Torvalds	bool
27901da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
27911da177e4SLinus Torvalds
27922116245eSRalf Baechleendmenu
27931da177e4SLinus Torvalds
27942116245eSRalf Baechlemenu "Power management options"
2795952fa954SRodolfo Giometti
2796363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
2797363c55caSWu Zhangjin	def_bool y
27983f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2799363c55caSWu Zhangjin
2800f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
2801f4cb5700SJohannes Berg	def_bool y
28023f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2803f4cb5700SJohannes Berg
28042116245eSRalf Baechlesource "kernel/power/Kconfig"
2805952fa954SRodolfo Giometti
28061da177e4SLinus Torvaldsendmenu
28071da177e4SLinus Torvalds
28087a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
28097a998935SViresh Kumar	bool
28107a998935SViresh Kumar
28117a998935SViresh Kumarmenu "CPU Power Management"
2812c095ebafSPaul Burton
2813c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
28147a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
28157a998935SViresh Kumarendif
28169726b43aSWu Zhangjin
2817c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
2818c095ebafSPaul Burton
2819c095ebafSPaul Burtonendmenu
2820c095ebafSPaul Burton
2821d5950b43SSam Ravnborgsource "net/Kconfig"
2822d5950b43SSam Ravnborg
28231da177e4SLinus Torvaldssource "drivers/Kconfig"
28241da177e4SLinus Torvalds
282598cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
282698cdee0eSRalf Baechle
28271da177e4SLinus Torvaldssource "fs/Kconfig"
28281da177e4SLinus Torvalds
28291da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
28301da177e4SLinus Torvalds
28311da177e4SLinus Torvaldssource "security/Kconfig"
28321da177e4SLinus Torvalds
28331da177e4SLinus Torvaldssource "crypto/Kconfig"
28341da177e4SLinus Torvalds
28351da177e4SLinus Torvaldssource "lib/Kconfig"
28362235a54dSSanjay Lal
28372235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
2838