11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 5393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 6c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 7f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 8ec7748b5SSam Ravnborg select HAVE_IDE 942d4b839SMathieu Desnoyers select HAVE_OPROFILE 107f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 117f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1288547001SJason Wessel select HAVE_ARCH_KGDB 13490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 14c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 153f5fdb4bSMarkos Chandras select HAVE_BPF_JIT if !CPU_MICROMIPS 167563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 17d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 18538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 19538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2064575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2129c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 22c1bf207dSDavid Daney select HAVE_KPROBES 23c1bf207dSDavid Daney select HAVE_KRETPROBES 24b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 251d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 26e26d196cSDavid Daney select ARCH_BINFMT_ELF_RANDOMIZE_PIE 27383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 2821a41faaSWu Zhangjin select RTC_LIB if !MACH_LOONGSON 292b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 307463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3148e1fd5aSDavid Daney select HAVE_DMA_ATTRS 32f4649382SZubair Lutfullah Kakakhel select HAVE_DMA_CONTIGUOUS 3348e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 343bd27e32SDavid Daney select GENERIC_IRQ_PROBE 35f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3678857614SMarkos Chandras select GENERIC_PCI_IOMAP 3794bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 38c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 390f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 409d15ffc8STejun Heo select HAVE_MEMBLOCK 419d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 429d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 43360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 444b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 45cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 46cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 47786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 484febd95aSStephen Rothwell select VIRT_TO_BUS 492f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 502f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5150150d2bSAl Viro select CLONE_BACKWARDS 52d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5319952a92SKees Cook select HAVE_CC_STACKPROTECTOR 54b1d4c6caSJames Hogan select CPU_PM if CPU_IDLE 55cc7964afSPaul Burton select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 5690cee759SPaul Burton select ARCH_BINFMT_ELF_STATE 57d79d853dSMarkos Chandras select SYSCTL_EXCEPTION_TRACE 581da177e4SLinus Torvalds 591da177e4SLinus Torvaldsmenu "Machine selection" 601da177e4SLinus Torvalds 615e83d430SRalf Baechlechoice 625e83d430SRalf Baechle prompt "System type" 635e83d430SRalf Baechle default SGI_IP22 641da177e4SLinus Torvalds 6542a4f17dSManuel Laussconfig MIPS_ALCHEMY 66c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 6734adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 68f772cdb2SRalf Baechle select CEVT_R4K 69d7ea335cSSteven J. Hill select CSRC_R4K 7042a4f17dSManuel Lauss select IRQ_CPU 7188e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 7242a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 7342a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 7442a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 75efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 761b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 7747440229SManuel Lauss select COMMON_CLK 781da177e4SLinus Torvalds 797ca5dc14SFlorian Fainelliconfig AR7 807ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 817ca5dc14SFlorian Fainelli select BOOT_ELF32 827ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 837ca5dc14SFlorian Fainelli select CEVT_R4K 847ca5dc14SFlorian Fainelli select CSRC_R4K 857ca5dc14SFlorian Fainelli select IRQ_CPU 867ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 877ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 887ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 897ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 907ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 917ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 92377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 931b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 945f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 957ca5dc14SFlorian Fainelli select VLYNQ 968551fb64SYoichi Yuasa select HAVE_CLK 977ca5dc14SFlorian Fainelli help 987ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 997ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1007ca5dc14SFlorian Fainelli 10143cc739fSSergey Ryazanovconfig ATH25 10243cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 10343cc739fSSergey Ryazanov select CEVT_R4K 10443cc739fSSergey Ryazanov select CSRC_R4K 10543cc739fSSergey Ryazanov select DMA_NONCOHERENT 10643cc739fSSergey Ryazanov select IRQ_CPU 1071753e74eSSergey Ryazanov select IRQ_DOMAIN 10843cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 10943cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 11043cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1118aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 11243cc739fSSergey Ryazanov help 11343cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 11443cc739fSSergey Ryazanov 115d4a67d9dSGabor Juhosconfig ATH79 116d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 1176eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 118d4a67d9dSGabor Juhos select BOOT_RAW 119d4a67d9dSGabor Juhos select CEVT_R4K 120d4a67d9dSGabor Juhos select CSRC_R4K 121d4a67d9dSGabor Juhos select DMA_NONCOHERENT 12294638067SGabor Juhos select HAVE_CLK 1232c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 124d4a67d9dSGabor Juhos select IRQ_CPU 1250aabf1a4SGabor Juhos select MIPS_MACHINE 126d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 127d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 128d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 129d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 130377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 131d4a67d9dSGabor Juhos help 132d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 133d4a67d9dSGabor Juhos 134d666cd02SKevin Cernekeeconfig BCM3384 135d666cd02SKevin Cernekee bool "Broadcom BCM3384 based boards" 136d666cd02SKevin Cernekee select BOOT_RAW 137d666cd02SKevin Cernekee select NO_EXCEPT_FILL 138d666cd02SKevin Cernekee select USE_OF 139d666cd02SKevin Cernekee select CEVT_R4K 140d666cd02SKevin Cernekee select CSRC_R4K 141d666cd02SKevin Cernekee select SYNC_R4K 142d666cd02SKevin Cernekee select COMMON_CLK 143d666cd02SKevin Cernekee select DMA_NONCOHERENT 144d666cd02SKevin Cernekee select IRQ_CPU 145d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 146d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 147d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 148d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 149d666cd02SKevin Cernekee select SWAP_IO_SPACE 150d666cd02SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC 151d666cd02SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO 152d666cd02SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC 153d666cd02SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO 154d666cd02SKevin Cernekee help 155d666cd02SKevin Cernekee Support for BCM3384 based boards. BCM3384/BCM33843 is a cable modem 156d666cd02SKevin Cernekee chipset with a Linux application processor that is often used to 157d666cd02SKevin Cernekee provide Samba services, a CUPS print server, and/or advanced routing 158d666cd02SKevin Cernekee features. 159d666cd02SKevin Cernekee 1601c0c13ebSAurelien Jarnoconfig BCM47XX 161c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1622da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 163fe08f8c2SHauke Mehrtens select BOOT_RAW 16442f77542SRalf Baechle select CEVT_R4K 165940f6b48SRalf Baechle select CSRC_R4K 1661c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1671c0c13ebSAurelien Jarno select HW_HAS_PCI 1681c0c13ebSAurelien Jarno select IRQ_CPU 169314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 170dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1711c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1721c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 173377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 17425e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 175e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 176c949c0bcSRafał Miłecki select GPIOLIB 177c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 1781c0c13ebSAurelien Jarno help 1791c0c13ebSAurelien Jarno Support for BCM47XX based boards 1801c0c13ebSAurelien Jarno 181e7300d04SMaxime Bizonconfig BCM63XX 182e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 183ae8de61cSFlorian Fainelli select BOOT_RAW 184e7300d04SMaxime Bizon select CEVT_R4K 185e7300d04SMaxime Bizon select CSRC_R4K 186fc264022SJonas Gorski select SYNC_R4K 187e7300d04SMaxime Bizon select DMA_NONCOHERENT 188e7300d04SMaxime Bizon select IRQ_CPU 189e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 190e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 191e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 192e7300d04SMaxime Bizon select SWAP_IO_SPACE 193e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 1943e82eeebSYoichi Yuasa select HAVE_CLK 195af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 196e7300d04SMaxime Bizon help 197e7300d04SMaxime Bizon Support for BCM63XX based boards 198e7300d04SMaxime Bizon 1991da177e4SLinus Torvaldsconfig MIPS_COBALT 2003fa986faSMartin Michlmayr bool "Cobalt Server" 20142f77542SRalf Baechle select CEVT_R4K 202940f6b48SRalf Baechle select CSRC_R4K 2031097c6acSYoichi Yuasa select CEVT_GT641XX 2041da177e4SLinus Torvalds select DMA_NONCOHERENT 2051da177e4SLinus Torvalds select HW_HAS_PCI 206d865bea4SRalf Baechle select I8253 2071da177e4SLinus Torvalds select I8259 2081da177e4SLinus Torvalds select IRQ_CPU 209d5ab1a69SYoichi Yuasa select IRQ_GT641XX 210252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 211e25bfc92SYoichi Yuasa select PCI 2127cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 2130a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 214ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2150e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 2165e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 217e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 2181da177e4SLinus Torvalds 2191da177e4SLinus Torvaldsconfig MACH_DECSTATION 2203fa986faSMartin Michlmayr bool "DECstations" 2211da177e4SLinus Torvalds select BOOT_ELF32 2226457d9fcSYoichi Yuasa select CEVT_DS1287 22381d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 2244247417dSYoichi Yuasa select CSRC_IOASIC 22581d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 22620d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 22720d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 22820d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 2291da177e4SLinus Torvalds select DMA_NONCOHERENT 230ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 2311da177e4SLinus Torvalds select IRQ_CPU 2327cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 2337cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 234ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2357d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2365e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 2371723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 2381723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 2391723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 240930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 2415e83d430SRalf Baechle help 2421da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 2431da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 2441da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 2451da177e4SLinus Torvalds 2461da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 2471da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 2481da177e4SLinus Torvalds 2491da177e4SLinus Torvalds DECstation 5000/50 2501da177e4SLinus Torvalds DECstation 5000/150 2511da177e4SLinus Torvalds DECstation 5000/260 2521da177e4SLinus Torvalds DECsystem 5900/260 2531da177e4SLinus Torvalds 2541da177e4SLinus Torvalds otherwise choose R3000. 2551da177e4SLinus Torvalds 2565e83d430SRalf Baechleconfig MACH_JAZZ 2573fa986faSMartin Michlmayr bool "Jazz family of machines" 2580e2794b0SRalf Baechle select FW_ARC 2590e2794b0SRalf Baechle select FW_ARC32 2605e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 26142f77542SRalf Baechle select CEVT_R4K 262940f6b48SRalf Baechle select CSRC_R4K 263e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2645e83d430SRalf Baechle select GENERIC_ISA_DMA 2658a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 266ea202c63SThomas Bogendoerfer select IRQ_CPU 267d865bea4SRalf Baechle select I8253 2685e83d430SRalf Baechle select I8259 2695e83d430SRalf Baechle select ISA 2707cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2715e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2727d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2731723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2741da177e4SLinus Torvalds help 2755e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2765e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 277692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2785e83d430SRalf Baechle Olivetti M700-10 workstations. 2795e83d430SRalf Baechle 2805ebabe59SLars-Peter Clausenconfig MACH_JZ4740 2815ebabe59SLars-Peter Clausen bool "Ingenic JZ4740 based machines" 2825ebabe59SLars-Peter Clausen select SYS_HAS_CPU_MIPS32_R1 2835ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2845ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 285f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 2865ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 2875ebabe59SLars-Peter Clausen select IRQ_CPU 2885ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 2895ebabe59SLars-Peter Clausen select SYS_HAS_EARLY_PRINTK 290ab5330ebSMaurus Cuelenaere select HAVE_CLK 29183bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 2925ebabe59SLars-Peter Clausen 293171bb2f1SJohn Crispinconfig LANTIQ 294171bb2f1SJohn Crispin bool "Lantiq based platforms" 295171bb2f1SJohn Crispin select DMA_NONCOHERENT 296171bb2f1SJohn Crispin select IRQ_CPU 297171bb2f1SJohn Crispin select CEVT_R4K 298171bb2f1SJohn Crispin select CSRC_R4K 299171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 300171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 301171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 302171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 303377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 304171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 305171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 306171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 307171bb2f1SJohn Crispin select SWAP_IO_SPACE 308171bb2f1SJohn Crispin select BOOT_RAW 309287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 310287e3f3fSJohn Crispin select CLKDEV_LOOKUP 311a0392222SJohn Crispin select USE_OF 3123f8c50c9SJohn Crispin select PINCTRL 3133f8c50c9SJohn Crispin select PINCTRL_LANTIQ 314c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 315c530781cSJohn Crispin select RESET_CONTROLLER 316171bb2f1SJohn Crispin 3171f21d2bdSBrian Murphyconfig LASAT 3181f21d2bdSBrian Murphy bool "LASAT Networks platforms" 31942f77542SRalf Baechle select CEVT_R4K 32016f0bbbcSRalf Baechle select CRC32 321940f6b48SRalf Baechle select CSRC_R4K 3221f21d2bdSBrian Murphy select DMA_NONCOHERENT 3231f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 3241f21d2bdSBrian Murphy select HW_HAS_PCI 325a5ccfe5cSRalf Baechle select IRQ_CPU 3261f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 3271f21d2bdSBrian Murphy select MIPS_NILE4 3281f21d2bdSBrian Murphy select R5000_CPU_SCACHE 3291f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 3301f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 3311f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 3321f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 3331f21d2bdSBrian Murphy 33485749d24SWu Zhangjinconfig MACH_LOONGSON 33585749d24SWu Zhangjin bool "Loongson family of machines" 336c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 337ade299d8SYoichi Yuasa help 33885749d24SWu Zhangjin This enables the support of Loongson family of machines. 33985749d24SWu Zhangjin 34085749d24SWu Zhangjin Loongson is a family of general-purpose MIPS-compatible CPUs. 34185749d24SWu Zhangjin developed at Institute of Computing Technology (ICT), 34285749d24SWu Zhangjin Chinese Academy of Sciences (CAS) in the People's Republic 34385749d24SWu Zhangjin of China. The chief architect is Professor Weiwu Hu. 344ade299d8SYoichi Yuasa 345ca585cf9SKelvin Cheungconfig MACH_LOONGSON1 346ca585cf9SKelvin Cheung bool "Loongson 1 family of machines" 347ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 348ca585cf9SKelvin Cheung help 349ca585cf9SKelvin Cheung This enables support for the Loongson 1 based machines. 350ca585cf9SKelvin Cheung 351ca585cf9SKelvin Cheung Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by 352ca585cf9SKelvin Cheung the ICT (Institute of Computing Technology) and the Chinese Academy 353ca585cf9SKelvin Cheung of Sciences. 354ca585cf9SKelvin Cheung 3551da177e4SLinus Torvaldsconfig MIPS_MALTA 3563fa986faSMartin Michlmayr bool "MIPS Malta board" 35761ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 3581da177e4SLinus Torvalds select BOOT_ELF32 359fa71c960SRalf Baechle select BOOT_RAW 36042f77542SRalf Baechle select CEVT_R4K 361940f6b48SRalf Baechle select CSRC_R4K 362fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 363885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 3641da177e4SLinus Torvalds select GENERIC_ISA_DMA 3658a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 366aa414dffSRalf Baechle select IRQ_CPU 3678a19b8f1SAndrew Bresticker select MIPS_GIC 3681da177e4SLinus Torvalds select HW_HAS_PCI 369d865bea4SRalf Baechle select I8253 3701da177e4SLinus Torvalds select I8259 3715e83d430SRalf Baechle select MIPS_BONITO64 3729318c51aSChris Dearman select MIPS_CPU_SCACHE 373a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 374252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 3755e83d430SRalf Baechle select MIPS_MSC 3761da177e4SLinus Torvalds select SWAP_IO_SPACE 3777cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 3787cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 379bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 380c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 381575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 3827cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 3835d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 384575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 3857cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3867cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 387ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 388ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 3895e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 390c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 3915e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 392424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 3930365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 394e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 395377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 396f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 3979693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 3981b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 3991da177e4SLinus Torvalds help 400f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 4011da177e4SLinus Torvalds board. 4021da177e4SLinus Torvalds 403ec47b274SSteven J. Hillconfig MIPS_SEAD3 404ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 405ec47b274SSteven J. Hill select BOOT_ELF32 406ec47b274SSteven J. Hill select BOOT_RAW 407f262b5f2SAndrew Bresticker select BUILTIN_DTB 408ec47b274SSteven J. Hill select CEVT_R4K 409ec47b274SSteven J. Hill select CSRC_R4K 410fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 411ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 412ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 413ec47b274SSteven J. Hill select DMA_NONCOHERENT 414ec47b274SSteven J. Hill select IRQ_CPU 4158a19b8f1SAndrew Bresticker select MIPS_GIC 41644327236SQais Yousef select LIBFDT 417ec47b274SSteven J. Hill select MIPS_MSC 418ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 419ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 420ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 421ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 422ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 423ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 424ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 425ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 426ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 427a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 428377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 429ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 430ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 4319b731009SSteven J. Hill select USE_OF 432ec47b274SSteven J. Hill help 433ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 434ec47b274SSteven J. Hill board. 435ec47b274SSteven J. Hill 436a83860c2SRalf Baechleconfig NEC_MARKEINS 437a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 438a83860c2SRalf Baechle select SOC_EMMA2RH 439a83860c2SRalf Baechle select HW_HAS_PCI 440a83860c2SRalf Baechle help 441a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 442ade299d8SYoichi Yuasa 4435e83d430SRalf Baechleconfig MACH_VR41XX 44474142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 44542f77542SRalf Baechle select CEVT_R4K 446940f6b48SRalf Baechle select CSRC_R4K 4477cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 448377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 44927fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 4505e83d430SRalf Baechle 451edb6310aSDaniel Lairdconfig NXP_STB220 452edb6310aSDaniel Laird bool "NXP STB220 board" 453edb6310aSDaniel Laird select SOC_PNX833X 454edb6310aSDaniel Laird help 455edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 456edb6310aSDaniel Laird 457edb6310aSDaniel Lairdconfig NXP_STB225 458edb6310aSDaniel Laird bool "NXP 225 board" 459edb6310aSDaniel Laird select SOC_PNX833X 460edb6310aSDaniel Laird select SOC_PNX8335 461edb6310aSDaniel Laird help 462edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 463edb6310aSDaniel Laird 4649267a30dSMarc St-Jeanconfig PMC_MSP 4659267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 46639d30c13SAnoop P A select CEVT_R4K 46739d30c13SAnoop P A select CSRC_R4K 4689267a30dSMarc St-Jean select DMA_NONCOHERENT 4699267a30dSMarc St-Jean select SWAP_IO_SPACE 4709267a30dSMarc St-Jean select NO_EXCEPT_FILL 4719267a30dSMarc St-Jean select BOOT_RAW 4729267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 4739267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 4749267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 4759267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 476377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 4779267a30dSMarc St-Jean select IRQ_CPU 4789267a30dSMarc St-Jean select SERIAL_8250 4799267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 4809296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 4819296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 4829267a30dSMarc St-Jean help 4839267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 4849267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 4859267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 4869267a30dSMarc St-Jean a variety of MIPS cores. 4879267a30dSMarc St-Jean 488ae2b5bb6SJohn Crispinconfig RALINK 489ae2b5bb6SJohn Crispin bool "Ralink based machines" 490ae2b5bb6SJohn Crispin select CEVT_R4K 491ae2b5bb6SJohn Crispin select CSRC_R4K 492ae2b5bb6SJohn Crispin select BOOT_RAW 493ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 494ae2b5bb6SJohn Crispin select IRQ_CPU 495ae2b5bb6SJohn Crispin select USE_OF 496ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 497ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 498ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 499ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 500377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 501ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 502ae2b5bb6SJohn Crispin select HAVE_MACH_CLKDEV 503ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 5042a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 5052a153f1cSJohn Crispin select RESET_CONTROLLER 506ae2b5bb6SJohn Crispin 5071da177e4SLinus Torvaldsconfig SGI_IP22 5083fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 5090e2794b0SRalf Baechle select FW_ARC 5100e2794b0SRalf Baechle select FW_ARC32 5111da177e4SLinus Torvalds select BOOT_ELF32 51242f77542SRalf Baechle select CEVT_R4K 513940f6b48SRalf Baechle select CSRC_R4K 514e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 5151da177e4SLinus Torvalds select DMA_NONCOHERENT 5165e83d430SRalf Baechle select HW_HAS_EISA 517d865bea4SRalf Baechle select I8253 51868de4803SThomas Bogendoerfer select I8259 5191da177e4SLinus Torvalds select IP22_CPU_SCACHE 5201da177e4SLinus Torvalds select IRQ_CPU 521aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 522e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 523e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 52436e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 525e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 526e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 527e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 5281da177e4SLinus Torvalds select SWAP_IO_SPACE 5297cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 5307cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5312b5e63f6SMartin Michlmayr # 5322b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5332b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5342b5e63f6SMartin Michlmayr # 5352b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5362b5e63f6SMartin Michlmayr # for a more details discussion 5372b5e63f6SMartin Michlmayr # 5382b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 539ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 540ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5415e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 542930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 5431da177e4SLinus Torvalds help 5441da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 5451da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 5461da177e4SLinus Torvalds that runs on these, say Y here. 5471da177e4SLinus Torvalds 5481da177e4SLinus Torvaldsconfig SGI_IP27 5493fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 5500e2794b0SRalf Baechle select FW_ARC 5510e2794b0SRalf Baechle select FW_ARC64 5525e83d430SRalf Baechle select BOOT_ELF64 553e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 554634286f1SRalf Baechle select DMA_COHERENT 55536a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 5561da177e4SLinus Torvalds select HW_HAS_PCI 557130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 5587cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 559ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5605e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 561d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 5621a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 563930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 5641da177e4SLinus Torvalds help 5651da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 5661da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 5671da177e4SLinus Torvalds here. 5681da177e4SLinus Torvalds 569e2defae5SThomas Bogendoerferconfig SGI_IP28 5707d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 5710e2794b0SRalf Baechle select FW_ARC 5720e2794b0SRalf Baechle select FW_ARC64 573e2defae5SThomas Bogendoerfer select BOOT_ELF64 574e2defae5SThomas Bogendoerfer select CEVT_R4K 575e2defae5SThomas Bogendoerfer select CSRC_R4K 576e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 577e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 578e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 579e2defae5SThomas Bogendoerfer select IRQ_CPU 580e2defae5SThomas Bogendoerfer select HW_HAS_EISA 581e2defae5SThomas Bogendoerfer select I8253 582e2defae5SThomas Bogendoerfer select I8259 583e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 584e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 5855b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 586e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 587e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 588e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 589e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 590e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 5912b5e63f6SMartin Michlmayr # 5922b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5932b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5942b5e63f6SMartin Michlmayr # 5952b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5962b5e63f6SMartin Michlmayr # for a more details discussion 5972b5e63f6SMartin Michlmayr # 5982b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 599e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 600e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 601dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 602e2defae5SThomas Bogendoerfer help 603e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 604e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 605e2defae5SThomas Bogendoerfer 6061da177e4SLinus Torvaldsconfig SGI_IP32 607cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 6080e2794b0SRalf Baechle select FW_ARC 6090e2794b0SRalf Baechle select FW_ARC32 6101da177e4SLinus Torvalds select BOOT_ELF32 61142f77542SRalf Baechle select CEVT_R4K 612940f6b48SRalf Baechle select CSRC_R4K 6131da177e4SLinus Torvalds select DMA_NONCOHERENT 6141da177e4SLinus Torvalds select HW_HAS_PCI 615dd67b155SRalf Baechle select IRQ_CPU 6161da177e4SLinus Torvalds select R5000_CPU_SCACHE 6171da177e4SLinus Torvalds select RM7000_CPU_SCACHE 6187cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6197cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 6207cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 621dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 622ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6235e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6241da177e4SLinus Torvalds help 6251da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 6261da177e4SLinus Torvalds 627ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 628ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 6295e83d430SRalf Baechle select BOOT_ELF32 6305e83d430SRalf Baechle select DMA_COHERENT 6315e83d430SRalf Baechle select SIBYTE_BCM1120 6325e83d430SRalf Baechle select SWAP_IO_SPACE 6337cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6345e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6355e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6365e83d430SRalf Baechle 637ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 638ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 6395e83d430SRalf Baechle select BOOT_ELF32 6405e83d430SRalf Baechle select DMA_COHERENT 6415e83d430SRalf Baechle select SIBYTE_BCM1120 6425e83d430SRalf Baechle select SWAP_IO_SPACE 6437cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6445e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6455e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6465e83d430SRalf Baechle 6475e83d430SRalf Baechleconfig SIBYTE_CRHONE 6483fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 6495e83d430SRalf Baechle select BOOT_ELF32 6505e83d430SRalf Baechle select DMA_COHERENT 6515e83d430SRalf Baechle select SIBYTE_BCM1125 6525e83d430SRalf Baechle select SWAP_IO_SPACE 6537cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6545e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6555e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 6565e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6575e83d430SRalf Baechle 658ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 659ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 660ade299d8SYoichi Yuasa select BOOT_ELF32 661ade299d8SYoichi Yuasa select DMA_COHERENT 662ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 663ade299d8SYoichi Yuasa select SWAP_IO_SPACE 664ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 665ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 666ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 667ade299d8SYoichi Yuasa 668ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 669ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 670ade299d8SYoichi Yuasa select BOOT_ELF32 671ade299d8SYoichi Yuasa select DMA_COHERENT 672fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 673ade299d8SYoichi Yuasa select SIBYTE_SB1250 674ade299d8SYoichi Yuasa select SWAP_IO_SPACE 675ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 676ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 677ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 678ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 679cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 680ade299d8SYoichi Yuasa 681ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 682ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 683ade299d8SYoichi Yuasa select BOOT_ELF32 684ade299d8SYoichi Yuasa select DMA_COHERENT 685fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 686ade299d8SYoichi Yuasa select SIBYTE_SB1250 687ade299d8SYoichi Yuasa select SWAP_IO_SPACE 688ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 689ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 690ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 691ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 692ade299d8SYoichi Yuasa 693ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 694ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 695ade299d8SYoichi Yuasa select BOOT_ELF32 696ade299d8SYoichi Yuasa select DMA_COHERENT 697ade299d8SYoichi Yuasa select SIBYTE_SB1250 698ade299d8SYoichi Yuasa select SWAP_IO_SPACE 699ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 700ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 701ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 702ade299d8SYoichi Yuasa 703ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 704ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 705ade299d8SYoichi Yuasa select BOOT_ELF32 706ade299d8SYoichi Yuasa select DMA_COHERENT 707ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 708ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 709ade299d8SYoichi Yuasa select SWAP_IO_SPACE 710ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 711ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 712651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 713ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 714cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 715ade299d8SYoichi Yuasa 71614b36af4SThomas Bogendoerferconfig SNI_RM 71714b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 7180e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 7190e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 720aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 7215e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 7225e83d430SRalf Baechle select BOOT_ELF32 72342f77542SRalf Baechle select CEVT_R4K 724940f6b48SRalf Baechle select CSRC_R4K 725e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 7265e83d430SRalf Baechle select DMA_NONCOHERENT 7275e83d430SRalf Baechle select GENERIC_ISA_DMA 7288a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 7295e83d430SRalf Baechle select HW_HAS_EISA 7305e83d430SRalf Baechle select HW_HAS_PCI 731c066a32aSThomas Bogendoerfer select IRQ_CPU 732d865bea4SRalf Baechle select I8253 7335e83d430SRalf Baechle select I8259 7345e83d430SRalf Baechle select ISA 7354a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 7367cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 7374a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 738c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 7394a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 74036a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 741ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 7427d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 7434a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 7445e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7455e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7461da177e4SLinus Torvalds help 74714b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 74814b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 7495e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 7505e83d430SRalf Baechle support this machine type. 7511da177e4SLinus Torvalds 752edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 753edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 7545e83d430SRalf Baechle 755edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 756edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 75723fbee9dSRalf Baechle 75873b4390fSRalf Baechleconfig MIKROTIK_RB532 75973b4390fSRalf Baechle bool "Mikrotik RB532 boards" 76073b4390fSRalf Baechle select CEVT_R4K 76173b4390fSRalf Baechle select CSRC_R4K 76273b4390fSRalf Baechle select DMA_NONCOHERENT 76373b4390fSRalf Baechle select HW_HAS_PCI 76473b4390fSRalf Baechle select IRQ_CPU 76573b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 76673b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 76773b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 76873b4390fSRalf Baechle select SWAP_IO_SPACE 76973b4390fSRalf Baechle select BOOT_RAW 770d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 771930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 77273b4390fSRalf Baechle help 77373b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 77473b4390fSRalf Baechle based on the IDT RC32434 SoC. 77573b4390fSRalf Baechle 7769ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 7779ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 778a86c7f72SDavid Daney select CEVT_R4K 77934adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 780a86c7f72SDavid Daney select DMA_COHERENT 781a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 782a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 783f65aad41SRalf Baechle select EDAC_SUPPORT 784773cb77dSRalf Baechle select SYS_SUPPORTS_HOTPLUG_CPU 785a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 7865e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 787a86c7f72SDavid Daney select SWAP_IO_SPACE 788e8635b48SDavid Daney select HW_HAS_PCI 789f00e001eSDavid Daney select ZONE_DMA32 790465aaed0SDavid Daney select HOLES_IN_ZONE 79199cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 7926e511163SDavid Daney select LIBFDT 7936e511163SDavid Daney select USE_OF 7946e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 7956e511163SDavid Daney select SYS_SUPPORTS_SMP 7966e511163SDavid Daney select NR_CPUS_DEFAULT_16 797e326479fSAndrew Bresticker select BUILTIN_DTB 798a86c7f72SDavid Daney help 799a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 800a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 801a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 802a86c7f72SDavid Daney Some of the supported boards are: 803a86c7f72SDavid Daney EBT3000 804a86c7f72SDavid Daney EBH3000 805a86c7f72SDavid Daney EBH3100 806a86c7f72SDavid Daney Thunder 807a86c7f72SDavid Daney Kodama 808a86c7f72SDavid Daney Hikari 809a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 810a86c7f72SDavid Daney 8117f058e85SJayachandran Cconfig NLM_XLR_BOARD 8127f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 8137f058e85SJayachandran C select BOOT_ELF32 8147f058e85SJayachandran C select NLM_COMMON 8157f058e85SJayachandran C select SYS_HAS_CPU_XLR 8167f058e85SJayachandran C select SYS_SUPPORTS_SMP 8177f058e85SJayachandran C select HW_HAS_PCI 8187f058e85SJayachandran C select SWAP_IO_SPACE 8197f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 8207f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 82134adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 8227f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 8237f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 8247f058e85SJayachandran C select DMA_COHERENT 8257f058e85SJayachandran C select NR_CPUS_DEFAULT_32 8267f058e85SJayachandran C select CEVT_R4K 8277f058e85SJayachandran C select CSRC_R4K 8287f058e85SJayachandran C select IRQ_CPU 829b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 8307f058e85SJayachandran C select SYNC_R4K 8317f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 8328f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 8338f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 8347f058e85SJayachandran C help 8357f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 8367f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 8377f058e85SJayachandran C 8381c773ea4SJayachandran Cconfig NLM_XLP_BOARD 8391c773ea4SJayachandran C bool "Netlogic XLP based systems" 8401c773ea4SJayachandran C select BOOT_ELF32 8411c773ea4SJayachandran C select NLM_COMMON 8421c773ea4SJayachandran C select SYS_HAS_CPU_XLP 8431c773ea4SJayachandran C select SYS_SUPPORTS_SMP 8441c773ea4SJayachandran C select HW_HAS_PCI 8451c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 8461c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 84734adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 8481c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 8491c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 8501c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 8511c773ea4SJayachandran C select DMA_COHERENT 8521c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 8531c773ea4SJayachandran C select CEVT_R4K 8541c773ea4SJayachandran C select CSRC_R4K 8551c773ea4SJayachandran C select IRQ_CPU 856b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 8571c773ea4SJayachandran C select SYNC_R4K 8581c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 8592f6528e1SJayachandran C select USE_OF 8608f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 8618f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 8621c773ea4SJayachandran C help 8631c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 8641c773ea4SJayachandran C Say Y here if you have a XLP based board. 8651c773ea4SJayachandran C 8669bc463beSDavid Daneyconfig MIPS_PARAVIRT 8679bc463beSDavid Daney bool "Para-Virtualized guest system" 8689bc463beSDavid Daney select CEVT_R4K 8699bc463beSDavid Daney select CSRC_R4K 8709bc463beSDavid Daney select DMA_COHERENT 8719bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 8729bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 8739bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 8749bc463beSDavid Daney select SYS_SUPPORTS_SMP 8759bc463beSDavid Daney select NR_CPUS_DEFAULT_4 8769bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 8779bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 8789bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 8799bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 8809bc463beSDavid Daney select HW_HAS_PCI 8819bc463beSDavid Daney select SWAP_IO_SPACE 8829bc463beSDavid Daney help 8839bc463beSDavid Daney This option supports guest running under ???? 8849bc463beSDavid Daney 8851da177e4SLinus Torvaldsendchoice 8861da177e4SLinus Torvalds 887e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 8883b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 889d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 890a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 891e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 8925e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 8935ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 8948ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 8951f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 8960f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 897ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 89829c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 89938b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 90022b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 9015e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 902a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 90385749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig" 904ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig" 9057f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 906ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 90738b18f72SRalf Baechle 9085e83d430SRalf Baechleendmenu 9095e83d430SRalf Baechle 9101da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 9111da177e4SLinus Torvalds bool 9121da177e4SLinus Torvalds default y 9131da177e4SLinus Torvalds 9141da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 9151da177e4SLinus Torvalds bool 9161da177e4SLinus Torvalds 917f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 918f0d1b0b3SDavid Howells bool 919f0d1b0b3SDavid Howells default n 920f0d1b0b3SDavid Howells 921f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 922f0d1b0b3SDavid Howells bool 923f0d1b0b3SDavid Howells default n 924f0d1b0b3SDavid Howells 9253c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 9263c9ee7efSAkinobu Mita bool 9273c9ee7efSAkinobu Mita default y 9283c9ee7efSAkinobu Mita 9291da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 9301da177e4SLinus Torvalds bool 9311da177e4SLinus Torvalds default y 9321da177e4SLinus Torvalds 933ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 9341cc89038SAtsushi Nemoto bool 9351cc89038SAtsushi Nemoto default y 9361cc89038SAtsushi Nemoto 9371da177e4SLinus Torvalds# 9381da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 9391da177e4SLinus Torvalds# 9400e2794b0SRalf Baechleconfig FW_ARC 9411da177e4SLinus Torvalds bool 9421da177e4SLinus Torvalds 94361ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 94461ed242dSRalf Baechle bool 94561ed242dSRalf Baechle 9469267a30dSMarc St-Jeanconfig BOOT_RAW 9479267a30dSMarc St-Jean bool 9489267a30dSMarc St-Jean 949217dd11eSRalf Baechleconfig CEVT_BCM1480 950217dd11eSRalf Baechle bool 951217dd11eSRalf Baechle 9526457d9fcSYoichi Yuasaconfig CEVT_DS1287 9536457d9fcSYoichi Yuasa bool 9546457d9fcSYoichi Yuasa 9551097c6acSYoichi Yuasaconfig CEVT_GT641XX 9561097c6acSYoichi Yuasa bool 9571097c6acSYoichi Yuasa 95842f77542SRalf Baechleconfig CEVT_R4K 95942f77542SRalf Baechle bool 96042f77542SRalf Baechle 961217dd11eSRalf Baechleconfig CEVT_SB1250 962217dd11eSRalf Baechle bool 963217dd11eSRalf Baechle 964229f773eSAtsushi Nemotoconfig CEVT_TXX9 965229f773eSAtsushi Nemoto bool 966229f773eSAtsushi Nemoto 967217dd11eSRalf Baechleconfig CSRC_BCM1480 968217dd11eSRalf Baechle bool 969217dd11eSRalf Baechle 9704247417dSYoichi Yuasaconfig CSRC_IOASIC 9714247417dSYoichi Yuasa bool 9724247417dSYoichi Yuasa 973940f6b48SRalf Baechleconfig CSRC_R4K 974940f6b48SRalf Baechle bool 975940f6b48SRalf Baechle 976217dd11eSRalf Baechleconfig CSRC_SB1250 977217dd11eSRalf Baechle bool 978217dd11eSRalf Baechle 979a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 9807444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 981a9aec7feSAtsushi Nemoto bool 982a9aec7feSAtsushi Nemoto 9830e2794b0SRalf Baechleconfig FW_CFE 984df78b5c8SAurelien Jarno bool 985df78b5c8SAurelien Jarno 9864bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 98734adb28dSRalf Baechle def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 9884bafad92SFUJITA Tomonori 989885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 990885014bcSFelix Fietkau select DMA_NONCOHERENT 991885014bcSFelix Fietkau bool 992885014bcSFelix Fietkau 9931da177e4SLinus Torvaldsconfig DMA_COHERENT 9941da177e4SLinus Torvalds bool 9951da177e4SLinus Torvalds 9961da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 9971da177e4SLinus Torvalds bool 998e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 9994ce588cdSRalf Baechle 1000e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 10014ce588cdSRalf Baechle bool 10021da177e4SLinus Torvalds 100336a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 10041da177e4SLinus Torvalds bool 10051da177e4SLinus Torvalds 1006dbb74540SRalf Baechleconfig HOTPLUG_CPU 10071b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 100840b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 10091b2bc75cSRalf Baechle help 10101b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 10111b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 10121b2bc75cSRalf Baechle (Note: power management support will enable this option 10131b2bc75cSRalf Baechle automatically on SMP systems. ) 10141b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 10151b2bc75cSRalf Baechle 10161b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1017dbb74540SRalf Baechle bool 1018dbb74540SRalf Baechle 10191da177e4SLinus Torvaldsconfig I8259 10201da177e4SLinus Torvalds bool 1021079a4601SAndrew Bresticker select IRQ_DOMAIN 10221da177e4SLinus Torvalds 10231da177e4SLinus Torvaldsconfig MIPS_BONITO64 10241da177e4SLinus Torvalds bool 10251da177e4SLinus Torvalds 10261da177e4SLinus Torvaldsconfig MIPS_MSC 10271da177e4SLinus Torvalds bool 10281da177e4SLinus Torvalds 10291f21d2bdSBrian Murphyconfig MIPS_NILE4 10301f21d2bdSBrian Murphy bool 10311f21d2bdSBrian Murphy 103239b8d525SRalf Baechleconfig SYNC_R4K 103339b8d525SRalf Baechle bool 103439b8d525SRalf Baechle 1035487d70d0SGabor Juhosconfig MIPS_MACHINE 1036487d70d0SGabor Juhos def_bool n 1037487d70d0SGabor Juhos 1038ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1039d388d685SMaciej W. Rozycki def_bool n 1040d388d685SMaciej W. Rozycki 10414e0748f5SMarkos Chandrasconfig GENERIC_CSUM 10424e0748f5SMarkos Chandras bool 10434e0748f5SMarkos Chandras 10448313da30SRalf Baechleconfig GENERIC_ISA_DMA 10458313da30SRalf Baechle bool 10468313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1047a35bee8aSNamhyung Kim select ISA_DMA_API 10488313da30SRalf Baechle 1049aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1050aa414dffSRalf Baechle bool 10518313da30SRalf Baechle select GENERIC_ISA_DMA 1052aa414dffSRalf Baechle 1053a35bee8aSNamhyung Kimconfig ISA_DMA_API 1054a35bee8aSNamhyung Kim bool 1055a35bee8aSNamhyung Kim 1056465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1057465aaed0SDavid Daney bool 1058465aaed0SDavid Daney 10595e83d430SRalf Baechle# 10606b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 10615e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 10625e83d430SRalf Baechle# choice statement should be more obvious to the user. 10635e83d430SRalf Baechle# 10645e83d430SRalf Baechlechoice 10656b2aac42SMasanari Iida prompt "Endianness selection" 10661da177e4SLinus Torvalds help 10671da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 10685e83d430SRalf Baechle byte order. These modes require different kernels and a different 10693cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 10705e83d430SRalf Baechle particular system but some systems are just as commonly used in the 10713dde6ad8SDavid Sterba one or the other endianness. 10725e83d430SRalf Baechle 10735e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 10745e83d430SRalf Baechle bool "Big endian" 10755e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 10765e83d430SRalf Baechle 10775e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 10785e83d430SRalf Baechle bool "Little endian" 10795e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 10805e83d430SRalf Baechle 10815e83d430SRalf Baechleendchoice 10825e83d430SRalf Baechle 108322b0763aSDavid Daneyconfig EXPORT_UASM 108422b0763aSDavid Daney bool 108522b0763aSDavid Daney 10862116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 10872116245eSRalf Baechle bool 10882116245eSRalf Baechle 10895e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 10905e83d430SRalf Baechle bool 10915e83d430SRalf Baechle 10925e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 10935e83d430SRalf Baechle bool 10941da177e4SLinus Torvalds 10959cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 10969cffd154SDavid Daney bool 10979cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 10989cffd154SDavid Daney default y 10999cffd154SDavid Daney 1100aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1101aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1102aa1762f4SDavid Daney 11031da177e4SLinus Torvaldsconfig IRQ_CPU 11041da177e4SLinus Torvalds bool 11050f84c305SAndrew Bresticker select IRQ_DOMAIN 11061da177e4SLinus Torvalds 11071da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 11081da177e4SLinus Torvalds bool 11091da177e4SLinus Torvalds 11109267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 11119267a30dSMarc St-Jean bool 11129267a30dSMarc St-Jean 11139267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 11149267a30dSMarc St-Jean bool 11159267a30dSMarc St-Jean 11168420fd00SAtsushi Nemotoconfig IRQ_TXX9 11178420fd00SAtsushi Nemoto bool 11188420fd00SAtsushi Nemoto 1119d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1120d5ab1a69SYoichi Yuasa bool 1121d5ab1a69SYoichi Yuasa 1122252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 11231da177e4SLinus Torvalds bool 11241da177e4SLinus Torvalds 11259267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 11269267a30dSMarc St-Jean bool 11279267a30dSMarc St-Jean 1128a83860c2SRalf Baechleconfig SOC_EMMA2RH 1129a83860c2SRalf Baechle bool 1130a83860c2SRalf Baechle select CEVT_R4K 1131a83860c2SRalf Baechle select CSRC_R4K 1132a83860c2SRalf Baechle select DMA_NONCOHERENT 1133a83860c2SRalf Baechle select IRQ_CPU 1134a83860c2SRalf Baechle select SWAP_IO_SPACE 1135a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1136a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1137a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1138a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1139a83860c2SRalf Baechle 1140edb6310aSDaniel Lairdconfig SOC_PNX833X 1141edb6310aSDaniel Laird bool 1142edb6310aSDaniel Laird select CEVT_R4K 1143edb6310aSDaniel Laird select CSRC_R4K 1144edb6310aSDaniel Laird select IRQ_CPU 1145edb6310aSDaniel Laird select DMA_NONCOHERENT 1146edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1147edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1148edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1149edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1150377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1151edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1152edb6310aSDaniel Laird 1153edb6310aSDaniel Lairdconfig SOC_PNX8335 1154edb6310aSDaniel Laird bool 1155edb6310aSDaniel Laird select SOC_PNX833X 1156edb6310aSDaniel Laird 1157a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1158a7e07b1aSMarkos Chandras bool 1159a7e07b1aSMarkos Chandras 11601da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 11611da177e4SLinus Torvalds bool 11621da177e4SLinus Torvalds 1163e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1164e2defae5SThomas Bogendoerfer bool 1165e2defae5SThomas Bogendoerfer 11665b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 11675b438c44SThomas Bogendoerfer bool 11685b438c44SThomas Bogendoerfer 1169e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1170e2defae5SThomas Bogendoerfer bool 1171e2defae5SThomas Bogendoerfer 1172e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1173e2defae5SThomas Bogendoerfer bool 1174e2defae5SThomas Bogendoerfer 1175e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1176e2defae5SThomas Bogendoerfer bool 1177e2defae5SThomas Bogendoerfer 1178e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1179e2defae5SThomas Bogendoerfer bool 1180e2defae5SThomas Bogendoerfer 1181e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1182e2defae5SThomas Bogendoerfer bool 1183e2defae5SThomas Bogendoerfer 11840e2794b0SRalf Baechleconfig FW_ARC32 11855e83d430SRalf Baechle bool 11865e83d430SRalf Baechle 1187aaa9fad3SPaul Bolleconfig FW_SNIPROM 1188231a35d3SThomas Bogendoerfer bool 1189231a35d3SThomas Bogendoerfer 11901da177e4SLinus Torvaldsconfig BOOT_ELF32 11911da177e4SLinus Torvalds bool 11921da177e4SLinus Torvalds 1193930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1194930beb5aSFlorian Fainelli bool 1195930beb5aSFlorian Fainelli 1196930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1197930beb5aSFlorian Fainelli bool 1198930beb5aSFlorian Fainelli 1199930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1200930beb5aSFlorian Fainelli bool 1201930beb5aSFlorian Fainelli 1202930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1203930beb5aSFlorian Fainelli bool 1204930beb5aSFlorian Fainelli 12051da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 12061da177e4SLinus Torvalds int 1207a4c0201eSFlorian Fainelli default "4" if MIPS_L1_CACHE_SHIFT_4 1208a4c0201eSFlorian Fainelli default "5" if MIPS_L1_CACHE_SHIFT_5 1209a4c0201eSFlorian Fainelli default "6" if MIPS_L1_CACHE_SHIFT_6 1210a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 12111da177e4SLinus Torvalds default "5" 12121da177e4SLinus Torvalds 12131da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 12141da177e4SLinus Torvalds bool 12151da177e4SLinus Torvalds 12161da177e4SLinus Torvaldsconfig ARC_CONSOLE 12171da177e4SLinus Torvalds bool "ARC console support" 1218e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 12191da177e4SLinus Torvalds 12201da177e4SLinus Torvaldsconfig ARC_MEMORY 12211da177e4SLinus Torvalds bool 122214b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 12231da177e4SLinus Torvalds default y 12241da177e4SLinus Torvalds 12251da177e4SLinus Torvaldsconfig ARC_PROMLIB 12261da177e4SLinus Torvalds bool 1227e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 12281da177e4SLinus Torvalds default y 12291da177e4SLinus Torvalds 12300e2794b0SRalf Baechleconfig FW_ARC64 12311da177e4SLinus Torvalds bool 12321da177e4SLinus Torvalds 12331da177e4SLinus Torvaldsconfig BOOT_ELF64 12341da177e4SLinus Torvalds bool 12351da177e4SLinus Torvalds 12361da177e4SLinus Torvaldsmenu "CPU selection" 12371da177e4SLinus Torvalds 12381da177e4SLinus Torvaldschoice 12391da177e4SLinus Torvalds prompt "CPU type" 12401da177e4SLinus Torvalds default CPU_R4X00 12411da177e4SLinus Torvalds 12420e476d91SHuacai Chenconfig CPU_LOONGSON3 12430e476d91SHuacai Chen bool "Loongson 3 CPU" 12440e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 12450e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 12460e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 12470e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 12480e476d91SHuacai Chen select WEAK_ORDERING 12490e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 12500e476d91SHuacai Chen help 12510e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 12520e476d91SHuacai Chen set with many extensions. 12530e476d91SHuacai Chen 12543702bba5SWu Zhangjinconfig CPU_LOONGSON2E 12553702bba5SWu Zhangjin bool "Loongson 2E" 12563702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 12573702bba5SWu Zhangjin select CPU_LOONGSON2 12582a21c730SFuxin Zhang help 12592a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 12602a21c730SFuxin Zhang with many extensions. 12612a21c730SFuxin Zhang 126225985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 12636f7a251aSWu Zhangjin bonito64. 12646f7a251aSWu Zhangjin 12656f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 12666f7a251aSWu Zhangjin bool "Loongson 2F" 12676f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 12686f7a251aSWu Zhangjin select CPU_LOONGSON2 1269c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 12706f7a251aSWu Zhangjin help 12716f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 12726f7a251aSWu Zhangjin with many extensions. 12736f7a251aSWu Zhangjin 12746f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 12756f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 12766f7a251aSWu Zhangjin Loongson2E. 12776f7a251aSWu Zhangjin 1278ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1279ca585cf9SKelvin Cheung bool "Loongson 1B" 1280ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1281ca585cf9SKelvin Cheung select CPU_LOONGSON1 1282ca585cf9SKelvin Cheung help 1283ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1284ca585cf9SKelvin Cheung release 2 instruction set. 1285ca585cf9SKelvin Cheung 12866e760c8dSRalf Baechleconfig CPU_MIPS32_R1 12876e760c8dSRalf Baechle bool "MIPS32 Release 1" 12887cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 12896e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1290797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1291ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12926e760c8dSRalf Baechle help 12935e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 12941e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12951e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12961e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12971e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12981e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 12991e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 13001e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 13011e5f1caaSRalf Baechle performance. 13021e5f1caaSRalf Baechle 13031e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 13041e5f1caaSRalf Baechle bool "MIPS32 Release 2" 13057cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 13061e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1307797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1308ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1309a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 13102235a54dSSanjay Lal select HAVE_KVM 13111e5f1caaSRalf Baechle help 13125e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 13136e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 13146e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 13156e760c8dSRalf Baechle specific type of processor in your system, choose those that one 13166e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 13171da177e4SLinus Torvalds 13187fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 13197fd08ca5SLeonid Yegoshin bool "MIPS32 Release 6 (EXPERIMENTAL)" 13207fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 13217fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 13227fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 13237fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 13247fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 13254e0748f5SMarkos Chandras select GENERIC_CSUM 13267fd08ca5SLeonid Yegoshin select HAVE_KVM 13277fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 13287fd08ca5SLeonid Yegoshin help 13297fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 13307fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 13317fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 13327fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 13337fd08ca5SLeonid Yegoshin 13346e760c8dSRalf Baechleconfig CPU_MIPS64_R1 13356e760c8dSRalf Baechle bool "MIPS64 Release 1" 13367cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1337797798c1SRalf Baechle select CPU_HAS_PREFETCH 1338ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1339ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1340ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13419cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 13426e760c8dSRalf Baechle help 13436e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 13446e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 13456e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 13466e760c8dSRalf Baechle specific type of processor in your system, choose those that one 13476e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 13481e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 13491e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 13501e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 13511e5f1caaSRalf Baechle performance. 13521e5f1caaSRalf Baechle 13531e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 13541e5f1caaSRalf Baechle bool "MIPS64 Release 2" 13557cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1356797798c1SRalf Baechle select CPU_HAS_PREFETCH 13571e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 13581e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1359ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13609cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1361a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 13621e5f1caaSRalf Baechle help 13631e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 13641e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 13651e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 13661e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 13671e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 13681da177e4SLinus Torvalds 13697fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 13707fd08ca5SLeonid Yegoshin bool "MIPS64 Release 6 (EXPERIMENTAL)" 13717fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 13727fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 13737fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 13747fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 13757fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 13767fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 13774e0748f5SMarkos Chandras select GENERIC_CSUM 13787fd08ca5SLeonid Yegoshin help 13797fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 13807fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 13817fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 13827fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 13837fd08ca5SLeonid Yegoshin 13841da177e4SLinus Torvaldsconfig CPU_R3000 13851da177e4SLinus Torvalds bool "R3000" 13867cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1387f7062ddbSRalf Baechle select CPU_HAS_WB 1388ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1389797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13901da177e4SLinus Torvalds help 13911da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 13921da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 13931da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 13941da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 13951da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 13961da177e4SLinus Torvalds try to recompile with R3000. 13971da177e4SLinus Torvalds 13981da177e4SLinus Torvaldsconfig CPU_TX39XX 13991da177e4SLinus Torvalds bool "R39XX" 14007cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1401ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 14021da177e4SLinus Torvalds 14031da177e4SLinus Torvaldsconfig CPU_VR41XX 14041da177e4SLinus Torvalds bool "R41xx" 14057cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1406ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1407ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 14081da177e4SLinus Torvalds help 14095e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 14101da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 14111da177e4SLinus Torvalds kernel built with this option will not run on any other type of 14121da177e4SLinus Torvalds processor or vice versa. 14131da177e4SLinus Torvalds 14141da177e4SLinus Torvaldsconfig CPU_R4300 14151da177e4SLinus Torvalds bool "R4300" 14167cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1417ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1418ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 14191da177e4SLinus Torvalds help 14201da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 14211da177e4SLinus Torvalds 14221da177e4SLinus Torvaldsconfig CPU_R4X00 14231da177e4SLinus Torvalds bool "R4x00" 14247cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1425ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1426ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1427970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14281da177e4SLinus Torvalds help 14291da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 14301da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 14311da177e4SLinus Torvalds 14321da177e4SLinus Torvaldsconfig CPU_TX49XX 14331da177e4SLinus Torvalds bool "R49XX" 14347cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1435de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1436ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1437ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1438970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14391da177e4SLinus Torvalds 14401da177e4SLinus Torvaldsconfig CPU_R5000 14411da177e4SLinus Torvalds bool "R5000" 14427cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1443ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1444ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1445970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14461da177e4SLinus Torvalds help 14471da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 14481da177e4SLinus Torvalds 14491da177e4SLinus Torvaldsconfig CPU_R5432 14501da177e4SLinus Torvalds bool "R5432" 14517cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 14525e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 14535e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1454970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14551da177e4SLinus Torvalds 1456542c1020SShinya Kuribayashiconfig CPU_R5500 1457542c1020SShinya Kuribayashi bool "R5500" 1458542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1459542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1460542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 14619cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1462542c1020SShinya Kuribayashi help 1463542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1464542c1020SShinya Kuribayashi instruction set. 1465542c1020SShinya Kuribayashi 14661da177e4SLinus Torvaldsconfig CPU_R6000 14671da177e4SLinus Torvalds bool "R6000" 14687cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1469ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 14701da177e4SLinus Torvalds help 14711da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1472c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 14731da177e4SLinus Torvalds 14741da177e4SLinus Torvaldsconfig CPU_NEVADA 14751da177e4SLinus Torvalds bool "RM52xx" 14767cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1477ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1478ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1479970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14801da177e4SLinus Torvalds help 14811da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 14821da177e4SLinus Torvalds 14831da177e4SLinus Torvaldsconfig CPU_R8000 14841da177e4SLinus Torvalds bool "R8000" 14857cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 14865e83d430SRalf Baechle select CPU_HAS_PREFETCH 1487ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 14881da177e4SLinus Torvalds help 14891da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 14901da177e4SLinus Torvalds uncommon and the support for them is incomplete. 14911da177e4SLinus Torvalds 14921da177e4SLinus Torvaldsconfig CPU_R10000 14931da177e4SLinus Torvalds bool "R10000" 14947cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 14955e83d430SRalf Baechle select CPU_HAS_PREFETCH 1496ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1497ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1498797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1499970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15001da177e4SLinus Torvalds help 15011da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 15021da177e4SLinus Torvalds 15031da177e4SLinus Torvaldsconfig CPU_RM7000 15041da177e4SLinus Torvalds bool "RM7000" 15057cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 15065e83d430SRalf Baechle select CPU_HAS_PREFETCH 1507ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1508ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1509797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1510970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15111da177e4SLinus Torvalds 15121da177e4SLinus Torvaldsconfig CPU_SB1 15131da177e4SLinus Torvalds bool "SB1" 15147cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1515ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1516ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1517797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1518970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15190004a9dfSRalf Baechle select WEAK_ORDERING 15201da177e4SLinus Torvalds 1521a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1522a86c7f72SDavid Daney bool "Cavium Octeon processor" 15235e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1524a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1525a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1526a86c7f72SDavid Daney select WEAK_ORDERING 1527a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 15289cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 15299296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 1530930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1531a86c7f72SDavid Daney help 1532a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1533a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1534a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1535a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1536a86c7f72SDavid Daney 1537cd746249SJonas Gorskiconfig CPU_BMIPS 1538cd746249SJonas Gorski bool "Broadcom BMIPS" 1539cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1540cd746249SJonas Gorski select CPU_MIPS32 1541fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1542cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1543cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1544cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1545cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1546cd746249SJonas Gorski select DMA_NONCOHERENT 1547cd746249SJonas Gorski select IRQ_CPU 1548cd746249SJonas Gorski select SWAP_IO_SPACE 1549cd746249SJonas Gorski select WEAK_ORDERING 1550c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 155169aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1552c1c0c461SKevin Cernekee help 1553fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1554c1c0c461SKevin Cernekee 15557f058e85SJayachandran Cconfig CPU_XLR 15567f058e85SJayachandran C bool "Netlogic XLR SoC" 15577f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 15587f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 15597f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 15607f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1561970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15627f058e85SJayachandran C select WEAK_ORDERING 15637f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 15647f058e85SJayachandran C help 15657f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 15661c773ea4SJayachandran C 15671c773ea4SJayachandran Cconfig CPU_XLP 15681c773ea4SJayachandran C bool "Netlogic XLP SoC" 15691c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 15701c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 15711c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 15721c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 15731c773ea4SJayachandran C select WEAK_ORDERING 15741c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 15751c773ea4SJayachandran C select CPU_HAS_PREFETCH 1576d6504846SJayachandran C select CPU_MIPSR2 15771c773ea4SJayachandran C help 15781c773ea4SJayachandran C Netlogic Microsystems XLP processors. 15791da177e4SLinus Torvaldsendchoice 15801da177e4SLinus Torvalds 1581a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1582a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1583a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 15847fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1585a6e18781SLeonid Yegoshin help 1586a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1587a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1588a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1589a6e18781SLeonid Yegoshin 1590a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1591a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1592a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1593a6e18781SLeonid Yegoshin select EVA 1594a6e18781SLeonid Yegoshin default y 1595a6e18781SLeonid Yegoshin help 1596a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1597a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1598a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1599a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1600a6e18781SLeonid Yegoshin 1601c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1602c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1603c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1604c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1605c5b36783SSteven J. Hill help 1606c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1607c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1608c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1609c5b36783SSteven J. Hill 1610c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1611c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1612c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1613c5b36783SSteven J. Hill depends on !EVA 1614c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1615c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1616c5b36783SSteven J. Hill select XPA 1617c5b36783SSteven J. Hill select HIGHMEM 1618c5b36783SSteven J. Hill select ARCH_PHYS_ADDR_T_64BIT 1619c5b36783SSteven J. Hill default n 1620c5b36783SSteven J. Hill help 1621c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1622c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1623c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1624c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1625c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1626c5b36783SSteven J. Hill If unsure, say 'N' here. 1627c5b36783SSteven J. Hill 1628622844bfSWu Zhangjinif CPU_LOONGSON2F 1629622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1630622844bfSWu Zhangjin bool 1631622844bfSWu Zhangjin 1632622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1633622844bfSWu Zhangjin bool 1634622844bfSWu Zhangjin 1635622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1636622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1637622844bfSWu Zhangjin default y 1638622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1639622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1640622844bfSWu Zhangjin help 1641622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1642622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1643622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1644622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1645622844bfSWu Zhangjin 1646622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1647622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1648622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1649622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1650622844bfSWu Zhangjin systems. 1651622844bfSWu Zhangjin 1652622844bfSWu Zhangjin If unsure, please say Y. 1653622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1654622844bfSWu Zhangjin 16551b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 16561b93b3c3SWu Zhangjin bool 16571b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 16581b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 165931c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 16601b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1661fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 16624e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 16631b93b3c3SWu Zhangjin 16641b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 16651b93b3c3SWu Zhangjin bool 16661b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 16671b93b3c3SWu Zhangjin 16683702bba5SWu Zhangjinconfig CPU_LOONGSON2 16693702bba5SWu Zhangjin bool 16703702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 16713702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 16723702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1673970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16743702bba5SWu Zhangjin 1675ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1676ca585cf9SKelvin Cheung bool 1677ca585cf9SKelvin Cheung select CPU_MIPS32 1678ca585cf9SKelvin Cheung select CPU_MIPSR2 1679ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1680ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1681ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1682f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1683ca585cf9SKelvin Cheung 1684fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 168504fa8bf7SJonas Gorski select SMP_UP if SMP 16861bbb6c1bSKevin Cernekee bool 1687cd746249SJonas Gorski 1688cd746249SJonas Gorskiconfig CPU_BMIPS4350 1689cd746249SJonas Gorski bool 1690cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1691cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1692cd746249SJonas Gorski 1693cd746249SJonas Gorskiconfig CPU_BMIPS4380 1694cd746249SJonas Gorski bool 1695bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1696cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1697cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1698cd746249SJonas Gorski 1699cd746249SJonas Gorskiconfig CPU_BMIPS5000 1700cd746249SJonas Gorski bool 1701cd746249SJonas Gorski select MIPS_CPU_SCACHE 1702bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1703cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1704cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 17051bbb6c1bSKevin Cernekee 17060e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 17070e476d91SHuacai Chen bool 17080e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 17090e476d91SHuacai Chen 17103702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 17112a21c730SFuxin Zhang bool 17122a21c730SFuxin Zhang 17136f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 17146f7a251aSWu Zhangjin bool 171555045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 171655045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 171722f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 17186f7a251aSWu Zhangjin 1719ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1720ca585cf9SKelvin Cheung bool 1721ca585cf9SKelvin Cheung 17227cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 17237cf8053bSRalf Baechle bool 17247cf8053bSRalf Baechle 17257cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 17267cf8053bSRalf Baechle bool 17277cf8053bSRalf Baechle 1728a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1729a6e18781SLeonid Yegoshin bool 1730a6e18781SLeonid Yegoshin 1731c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1732c5b36783SSteven J. Hill bool 1733c5b36783SSteven J. Hill 17347fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 17357fd08ca5SLeonid Yegoshin bool 17367fd08ca5SLeonid Yegoshin 17377cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 17387cf8053bSRalf Baechle bool 17397cf8053bSRalf Baechle 17407cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 17417cf8053bSRalf Baechle bool 17427cf8053bSRalf Baechle 17437fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 17447fd08ca5SLeonid Yegoshin bool 17457fd08ca5SLeonid Yegoshin 17467cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 17477cf8053bSRalf Baechle bool 17487cf8053bSRalf Baechle 17497cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 17507cf8053bSRalf Baechle bool 17517cf8053bSRalf Baechle 17527cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 17537cf8053bSRalf Baechle bool 17547cf8053bSRalf Baechle 17557cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 17567cf8053bSRalf Baechle bool 17577cf8053bSRalf Baechle 17587cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 17597cf8053bSRalf Baechle bool 17607cf8053bSRalf Baechle 17617cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 17627cf8053bSRalf Baechle bool 17637cf8053bSRalf Baechle 17647cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 17657cf8053bSRalf Baechle bool 17667cf8053bSRalf Baechle 17677cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 17687cf8053bSRalf Baechle bool 17697cf8053bSRalf Baechle 1770542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1771542c1020SShinya Kuribayashi bool 1772542c1020SShinya Kuribayashi 17737cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 17747cf8053bSRalf Baechle bool 17757cf8053bSRalf Baechle 17767cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 17777cf8053bSRalf Baechle bool 17787cf8053bSRalf Baechle 17797cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 17807cf8053bSRalf Baechle bool 17817cf8053bSRalf Baechle 17827cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 17837cf8053bSRalf Baechle bool 17847cf8053bSRalf Baechle 17857cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 17867cf8053bSRalf Baechle bool 17877cf8053bSRalf Baechle 17887cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 17897cf8053bSRalf Baechle bool 17907cf8053bSRalf Baechle 17915e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 17925e683389SDavid Daney bool 17935e683389SDavid Daney 1794cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1795c1c0c461SKevin Cernekee bool 1796c1c0c461SKevin Cernekee 1797fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1798c1c0c461SKevin Cernekee bool 1799cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1800c1c0c461SKevin Cernekee 1801c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1802c1c0c461SKevin Cernekee bool 1803cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1804c1c0c461SKevin Cernekee 1805c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1806c1c0c461SKevin Cernekee bool 1807cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1808c1c0c461SKevin Cernekee 1809c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1810c1c0c461SKevin Cernekee bool 1811cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1812c1c0c461SKevin Cernekee 18137f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 18147f058e85SJayachandran C bool 18157f058e85SJayachandran C 18161c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 18171c773ea4SJayachandran C bool 18181c773ea4SJayachandran C 1819b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 1820b6911bbaSPaul Burton depends on MIPS_MALTA 1821b6911bbaSPaul Burton depends on PCI 1822b6911bbaSPaul Burton bool 1823b6911bbaSPaul Burton default y 1824b6911bbaSPaul Burton 182517099b11SRalf Baechle# 182617099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 182717099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 182817099b11SRalf Baechle# 18290004a9dfSRalf Baechleconfig WEAK_ORDERING 18300004a9dfSRalf Baechle bool 183117099b11SRalf Baechle 183217099b11SRalf Baechle# 183317099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 183417099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 183517099b11SRalf Baechle# 183617099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 183717099b11SRalf Baechle bool 18385e83d430SRalf Baechleendmenu 18395e83d430SRalf Baechle 18405e83d430SRalf Baechle# 18415e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 18425e83d430SRalf Baechle# 18435e83d430SRalf Baechleconfig CPU_MIPS32 18445e83d430SRalf Baechle bool 18457fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 18465e83d430SRalf Baechle 18475e83d430SRalf Baechleconfig CPU_MIPS64 18485e83d430SRalf Baechle bool 18497fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 18505e83d430SRalf Baechle 18515e83d430SRalf Baechle# 1852c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 18535e83d430SRalf Baechle# 18545e83d430SRalf Baechleconfig CPU_MIPSR1 18555e83d430SRalf Baechle bool 18565e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 18575e83d430SRalf Baechle 18585e83d430SRalf Baechleconfig CPU_MIPSR2 18595e83d430SRalf Baechle bool 1860a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 1861a7e07b1aSMarkos Chandras select MIPS_SPRAM 18625e83d430SRalf Baechle 18637fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 18647fd08ca5SLeonid Yegoshin bool 18657fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 1866a7e07b1aSMarkos Chandras select MIPS_SPRAM 18675e83d430SRalf Baechle 1868a6e18781SLeonid Yegoshinconfig EVA 1869a6e18781SLeonid Yegoshin bool 1870a6e18781SLeonid Yegoshin 1871c5b36783SSteven J. Hillconfig XPA 1872c5b36783SSteven J. Hill bool 1873c5b36783SSteven J. Hill 18745e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 18755e83d430SRalf Baechle bool 18765e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 18775e83d430SRalf Baechle bool 18785e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 18795e83d430SRalf Baechle bool 18805e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 18815e83d430SRalf Baechle bool 188255045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 188355045ff5SWu Zhangjin bool 188455045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 188555045ff5SWu Zhangjin bool 18869cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 18879cffd154SDavid Daney bool 188822f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 188922f1fdfdSWu Zhangjin bool 189082622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 189182622284SDavid Daney bool 1892d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 18935e83d430SRalf Baechle 18948192c9eaSDavid Daney# 18958192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 18968192c9eaSDavid Daney# 18978192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 18988192c9eaSDavid Daney bool 1899f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 19008192c9eaSDavid Daney 19015e83d430SRalf Baechlemenu "Kernel type" 19025e83d430SRalf Baechle 19035e83d430SRalf Baechlechoice 19045e83d430SRalf Baechle prompt "Kernel code model" 19055e83d430SRalf Baechle help 19065e83d430SRalf Baechle You should only select this option if you have a workload that 19075e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 19085e83d430SRalf Baechle large memory. You will only be presented a single option in this 19095e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 19105e83d430SRalf Baechle 19115e83d430SRalf Baechleconfig 32BIT 19125e83d430SRalf Baechle bool "32-bit kernel" 19135e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 19145e83d430SRalf Baechle select TRAD_SIGNALS 19155e83d430SRalf Baechle help 19165e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 19175e83d430SRalf Baechleconfig 64BIT 19185e83d430SRalf Baechle bool "64-bit kernel" 19195e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 19205e83d430SRalf Baechle help 19215e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 19225e83d430SRalf Baechle 19235e83d430SRalf Baechleendchoice 19245e83d430SRalf Baechle 19252235a54dSSanjay Lalconfig KVM_GUEST 19262235a54dSSanjay Lal bool "KVM Guest Kernel" 1927f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 19282235a54dSSanjay Lal help 19292235a54dSSanjay Lal Select this option if building a guest kernel for KVM (Trap & Emulate) mode 19302235a54dSSanjay Lal 1931eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 1932eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 19332235a54dSSanjay Lal depends on KVM_GUEST 1934eda3d33cSJames Hogan default 100 19352235a54dSSanjay Lal help 1936eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 1937eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 1938eda3d33cSJames Hogan timer frequency is specified directly. 19392235a54dSSanjay Lal 19401da177e4SLinus Torvaldschoice 19411da177e4SLinus Torvalds prompt "Kernel page size" 19421da177e4SLinus Torvalds default PAGE_SIZE_4KB 19431da177e4SLinus Torvalds 19441da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 19451da177e4SLinus Torvalds bool "4kB" 19460e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 19471da177e4SLinus Torvalds help 19481da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 19491da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 19501da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 19511da177e4SLinus Torvalds recommended for low memory systems. 19521da177e4SLinus Torvalds 19531da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 19541da177e4SLinus Torvalds bool "8kB" 19557d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 19561da177e4SLinus Torvalds help 19571da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 19581da177e4SLinus Torvalds the price of higher memory consumption. This option is available 1959c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 1960c52399beSRalf Baechle suitable Linux distribution to support this. 19611da177e4SLinus Torvalds 19621da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 19631da177e4SLinus Torvalds bool "16kB" 1964714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 19651da177e4SLinus Torvalds help 19661da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 19671da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 1968714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 1969714bfad6SRalf Baechle Linux distribution to support this. 19701da177e4SLinus Torvalds 1971c52399beSRalf Baechleconfig PAGE_SIZE_32KB 1972c52399beSRalf Baechle bool "32kB" 1973c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 1974c52399beSRalf Baechle help 1975c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 1976c52399beSRalf Baechle the price of higher memory consumption. This option is available 1977c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 1978c52399beSRalf Baechle distribution to support this. 1979c52399beSRalf Baechle 19801da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 19811da177e4SLinus Torvalds bool "64kB" 19827d60717eSKees Cook depends on !CPU_R3000 && !CPU_TX39XX 19831da177e4SLinus Torvalds help 19841da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 19851da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 19861da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 1987714bfad6SRalf Baechle writing this option is still high experimental. 19881da177e4SLinus Torvalds 19891da177e4SLinus Torvaldsendchoice 19901da177e4SLinus Torvalds 1991c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 1992c9bace7cSDavid Daney int "Maximum zone order" 1993e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 1994e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 1995e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 1996e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 1997e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 1998e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 1999c9bace7cSDavid Daney range 11 64 2000c9bace7cSDavid Daney default "11" 2001c9bace7cSDavid Daney help 2002c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2003c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2004c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2005c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2006c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2007c9bace7cSDavid Daney increase this value. 2008c9bace7cSDavid Daney 2009c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2010c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2011c9bace7cSDavid Daney 2012c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2013c9bace7cSDavid Daney when choosing a value for this option. 2014c9bace7cSDavid Daney 20151da177e4SLinus Torvaldsconfig BOARD_SCACHE 20161da177e4SLinus Torvalds bool 20171da177e4SLinus Torvalds 20181da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 20191da177e4SLinus Torvalds bool 20201da177e4SLinus Torvalds select BOARD_SCACHE 20211da177e4SLinus Torvalds 20229318c51aSChris Dearman# 20239318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 20249318c51aSChris Dearman# 20259318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 20269318c51aSChris Dearman bool 20279318c51aSChris Dearman select BOARD_SCACHE 20289318c51aSChris Dearman 20291da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 20301da177e4SLinus Torvalds bool 20311da177e4SLinus Torvalds select BOARD_SCACHE 20321da177e4SLinus Torvalds 20331da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 20341da177e4SLinus Torvalds bool 20351da177e4SLinus Torvalds select BOARD_SCACHE 20361da177e4SLinus Torvalds 20371da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 20381da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 20391da177e4SLinus Torvalds depends on CPU_SB1 20401da177e4SLinus Torvalds help 20411da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 20421da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 20431da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 20441da177e4SLinus Torvalds 20451da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2046c8094b53SRalf Baechle bool 20471da177e4SLinus Torvalds 20483165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 20493165c846SFlorian Fainelli bool 20503165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 20513165c846SFlorian Fainelli 205291405eb6SFlorian Fainelliconfig CPU_R4K_FPU 205391405eb6SFlorian Fainelli bool 205491405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 205591405eb6SFlorian Fainelli 205662cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 205762cedc4fSFlorian Fainelli bool 205862cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 205962cedc4fSFlorian Fainelli 206059d6ab86SRalf Baechleconfig MIPS_MT_SMP 2061a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 206259d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 206359d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2064d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2065c080faa5SSteven J. Hill select SYNC_R4K 20660c2cb004SPaul Burton select MIPS_GIC_IPI 206759d6ab86SRalf Baechle select MIPS_MT 206859d6ab86SRalf Baechle select SMP 206987353d8aSRalf Baechle select SMP_UP 2070c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2071c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2072399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 207359d6ab86SRalf Baechle help 2074c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2075c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2076c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2077c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2078c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 207959d6ab86SRalf Baechle 2080f41ae0b2SRalf Baechleconfig MIPS_MT 2081f41ae0b2SRalf Baechle bool 2082f41ae0b2SRalf Baechle 20830ab7aefcSRalf Baechleconfig SCHED_SMT 20840ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 20850ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 20860ab7aefcSRalf Baechle default n 20870ab7aefcSRalf Baechle help 20880ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 20890ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 20900ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 20910ab7aefcSRalf Baechle 20920ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 20930ab7aefcSRalf Baechle bool 20940ab7aefcSRalf Baechle 2095f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2096f41ae0b2SRalf Baechle bool 2097f41ae0b2SRalf Baechle 2098f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2099f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2100f088fc84SRalf Baechle default y 2101b633648cSRalf Baechle depends on MIPS_MT_SMP 210207cc0c9eSRalf Baechle 2103b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2104b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 2105b0a668fbSLeonid Yegoshin depends on CPU_MIPSR6 && !SMP 2106b0a668fbSLeonid Yegoshin default y 2107b0a668fbSLeonid Yegoshin help 2108b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2109b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 211007edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2111b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2112b0a668fbSLeonid Yegoshin final kernel image. 2113b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels" 2114b0a668fbSLeonid Yegoshin depends on SMP && CPU_MIPSR6 2115b0a668fbSLeonid Yegoshin 211607cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 211707cc0c9eSRalf Baechle bool "VPE loader support." 2118704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 211907cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 212007cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 212107cc0c9eSRalf Baechle select MIPS_MT 212207cc0c9eSRalf Baechle help 212307cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 212407cc0c9eSRalf Baechle onto another VPE and running it. 2125f088fc84SRalf Baechle 212617a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 212717a1d523SDeng-Cheng Zhu bool 212817a1d523SDeng-Cheng Zhu default "y" 212917a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 213017a1d523SDeng-Cheng Zhu 21311a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 21321a2a6d7eSDeng-Cheng Zhu bool 21331a2a6d7eSDeng-Cheng Zhu default "y" 21341a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 21351a2a6d7eSDeng-Cheng Zhu 2136e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2137e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2138e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2139e01402b1SRalf Baechle default y 2140e01402b1SRalf Baechle help 2141e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2142e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2143e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2144e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2145e01402b1SRalf Baechle 2146e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2147e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2148e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 21495e83d430SRalf Baechle help 2150e01402b1SRalf Baechle 2151da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2152da615cf6SDeng-Cheng Zhu bool 2153da615cf6SDeng-Cheng Zhu default "y" 2154da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2155da615cf6SDeng-Cheng Zhu 21562c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 21572c973ef0SDeng-Cheng Zhu bool 21582c973ef0SDeng-Cheng Zhu default "y" 21592c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 21602c973ef0SDeng-Cheng Zhu 21614a16ff4cSRalf Baechleconfig MIPS_CMP 21625cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 2163b633648cSRalf Baechle depends on SYS_SUPPORTS_MIPS_CMP 216472e20142SPaul Burton select MIPS_GIC_IPI 2165b10b43baSMarkos Chandras select SMP 2166eb9b5141STim Anderson select SYNC_R4K 2167b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 21684a16ff4cSRalf Baechle select WEAK_ORDERING 21694a16ff4cSRalf Baechle default n 21704a16ff4cSRalf Baechle help 2171044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2172044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2173044505c7SPaul Burton its ability to start secondary CPUs. 21744a16ff4cSRalf Baechle 21755cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 21765cac93b3SPaul Burton instead of this. 21775cac93b3SPaul Burton 21780ee958e1SPaul Burtonconfig MIPS_CPS 21790ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 2180*6ca716f2SMarkos Chandras depends on SYS_SUPPORTS_MIPS_CPS && !64BIT 21810ee958e1SPaul Burton select MIPS_CM 21820ee958e1SPaul Burton select MIPS_CPC 21831d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 21840ee958e1SPaul Burton select MIPS_GIC_IPI 21850ee958e1SPaul Burton select SMP 21860ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 21871d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 21880ee958e1SPaul Burton select SYS_SUPPORTS_SMP 21890ee958e1SPaul Burton select WEAK_ORDERING 21900ee958e1SPaul Burton help 21910ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 21920ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 21930ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 21940ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 21950ee958e1SPaul Burton support is unavailable. 21960ee958e1SPaul Burton 21973179d37eSPaul Burtonconfig MIPS_CPS_PM 219839a59593SMarkos Chandras depends on MIPS_CPS 2199a8b84677SPaul Burton select MIPS_CPC 22003179d37eSPaul Burton bool 22013179d37eSPaul Burton 220272e20142SPaul Burtonconfig MIPS_GIC_IPI 220372e20142SPaul Burton bool 220472e20142SPaul Burton 22059f98f3ddSPaul Burtonconfig MIPS_CM 22069f98f3ddSPaul Burton bool 22079f98f3ddSPaul Burton 22089c38cf44SPaul Burtonconfig MIPS_CPC 22099c38cf44SPaul Burton bool 22102600990eSRalf Baechle 22111da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 22121da177e4SLinus Torvalds bool 22131da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 22141da177e4SLinus Torvalds default y 22151da177e4SLinus Torvalds 22161da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 22171da177e4SLinus Torvalds bool 22181da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 22191da177e4SLinus Torvalds default y 22201da177e4SLinus Torvalds 22211da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 22221da177e4SLinus Torvalds bool 22231da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 22241da177e4SLinus Torvalds default y 22251da177e4SLinus Torvalds 22262235a54dSSanjay Lal 222760ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 222834adb28dSRalf Baechle bool 222960ec6571Spascal@pabr.org 22309e2b5372SMarkos Chandraschoice 22319e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 22329e2b5372SMarkos Chandras 22339e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 22349e2b5372SMarkos Chandras bool "None" 22359e2b5372SMarkos Chandras help 22369e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 22379e2b5372SMarkos Chandras 22389693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 22399693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 22409e2b5372SMarkos Chandras bool "SmartMIPS" 22419693a853SFranck Bui-Huu help 22429693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 22439693a853SFranck Bui-Huu increased security at both hardware and software level for 22449693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 22459693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 22469693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 22479693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 22489693a853SFranck Bui-Huu here. 22499693a853SFranck Bui-Huu 2250bce86083SSteven J. Hillconfig CPU_MICROMIPS 22517fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 22529e2b5372SMarkos Chandras bool "microMIPS" 2253bce86083SSteven J. Hill help 2254bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2255bce86083SSteven J. Hill microMIPS ISA 2256bce86083SSteven J. Hill 22579e2b5372SMarkos Chandrasendchoice 22589e2b5372SMarkos Chandras 2259a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 22604af94d5dSPaul Burton bool "Support for the MIPS SIMD Architecture (EXPERIMENTAL)" 2261a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 22622a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2263a5e9a69eSPaul Burton help 2264a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2265a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 22661db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 22671db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 22681db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 22691db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 22701db1af84SPaul Burton the size & complexity of your kernel. 2271a5e9a69eSPaul Burton 2272a5e9a69eSPaul Burton If unsure, say Y. 2273a5e9a69eSPaul Burton 22741da177e4SLinus Torvaldsconfig CPU_HAS_WB 2275f7062ddbSRalf Baechle bool 2276e01402b1SRalf Baechle 2277df0ac8a4SKevin Cernekeeconfig XKS01 2278df0ac8a4SKevin Cernekee bool 2279df0ac8a4SKevin Cernekee 2280f41ae0b2SRalf Baechle# 2281f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2282f41ae0b2SRalf Baechle# 2283e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2284f41ae0b2SRalf Baechle bool 2285e01402b1SRalf Baechle 2286f41ae0b2SRalf Baechle# 2287f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2288f41ae0b2SRalf Baechle# 2289e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2290f41ae0b2SRalf Baechle bool 2291e01402b1SRalf Baechle 22921da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 22931da177e4SLinus Torvalds bool 22941da177e4SLinus Torvalds depends on !CPU_R3000 22951da177e4SLinus Torvalds default y 22961da177e4SLinus Torvalds 22971da177e4SLinus Torvalds# 229820d60d99SMaciej W. Rozycki# CPU non-features 229920d60d99SMaciej W. Rozycki# 230020d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 230120d60d99SMaciej W. Rozycki bool 230220d60d99SMaciej W. Rozycki 230320d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 230420d60d99SMaciej W. Rozycki bool 230520d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 230620d60d99SMaciej W. Rozycki 230720d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 230820d60d99SMaciej W. Rozycki bool 230920d60d99SMaciej W. Rozycki 231020d60d99SMaciej W. Rozycki# 23111da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 23121da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 23131da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 23141da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 23151da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 23161da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 23171da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 23181da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2319797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2320797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2321797798c1SRalf Baechle# support. 23221da177e4SLinus Torvalds# 23231da177e4SLinus Torvaldsconfig HIGHMEM 23241da177e4SLinus Torvalds bool "High Memory Support" 2325a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2326797798c1SRalf Baechle 2327797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2328797798c1SRalf Baechle bool 2329797798c1SRalf Baechle 2330797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2331797798c1SRalf Baechle bool 23321da177e4SLinus Torvalds 23339693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 23349693a853SFranck Bui-Huu bool 23359693a853SFranck Bui-Huu 2336a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2337a6a4834cSSteven J. Hill bool 2338a6a4834cSSteven J. Hill 2339377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2340377cb1b6SRalf Baechle bool 2341377cb1b6SRalf Baechle help 2342377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2343377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2344377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2345377cb1b6SRalf Baechle 2346a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2347a5e9a69eSPaul Burton bool 2348a5e9a69eSPaul Burton 2349b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2350b4819b59SYoichi Yuasa def_bool y 2351f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2352b4819b59SYoichi Yuasa 2353d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2354d8cb4e11SRalf Baechle bool 2355d8cb4e11SRalf Baechle default y if SGI_IP27 2356d8cb4e11SRalf Baechle help 23573dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2358d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2359d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2360d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2361d8cb4e11SRalf Baechle 2362b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2363b1c6cd42SAtsushi Nemoto bool 23647de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 236531473747SAtsushi Nemoto 2366d8cb4e11SRalf Baechleconfig NUMA 2367d8cb4e11SRalf Baechle bool "NUMA Support" 2368d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2369d8cb4e11SRalf Baechle help 2370d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2371d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2372d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2373d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2374d8cb4e11SRalf Baechle disabled. 2375d8cb4e11SRalf Baechle 2376d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2377d8cb4e11SRalf Baechle bool 2378d8cb4e11SRalf Baechle 2379c80d79d7SYasunori Gotoconfig NODES_SHIFT 2380c80d79d7SYasunori Goto int 2381c80d79d7SYasunori Goto default "6" 2382c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2383c80d79d7SYasunori Goto 238414f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 238514f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 2386b633648cSRalf Baechle depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) 238714f70012SDeng-Cheng Zhu default y 238814f70012SDeng-Cheng Zhu help 238914f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 239014f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 239114f70012SDeng-Cheng Zhu 2392b4819b59SYoichi Yuasasource "mm/Kconfig" 2393b4819b59SYoichi Yuasa 23941da177e4SLinus Torvaldsconfig SMP 23951da177e4SLinus Torvalds bool "Multi-Processing support" 2396e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2397e73ea273SRalf Baechle help 23981da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 23994a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 24004a474157SRobert Graffham than one CPU, say Y. 24011da177e4SLinus Torvalds 24024a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 24031da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 24041da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 24054a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 24061da177e4SLinus Torvalds will run faster if you say N here. 24071da177e4SLinus Torvalds 24081da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 24091da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 24101da177e4SLinus Torvalds 241103502faaSAdrian Bunk See also the SMP-HOWTO available at 241203502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 24131da177e4SLinus Torvalds 24141da177e4SLinus Torvalds If you don't know what to do here, say N. 24151da177e4SLinus Torvalds 241687353d8aSRalf Baechleconfig SMP_UP 241787353d8aSRalf Baechle bool 241887353d8aSRalf Baechle 24194a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 24204a16ff4cSRalf Baechle bool 24214a16ff4cSRalf Baechle 24220ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 24230ee958e1SPaul Burton bool 24240ee958e1SPaul Burton 2425e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2426e73ea273SRalf Baechle bool 2427e73ea273SRalf Baechle 2428130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2429130e2fb7SRalf Baechle bool 2430130e2fb7SRalf Baechle 2431130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2432130e2fb7SRalf Baechle bool 2433130e2fb7SRalf Baechle 2434130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2435130e2fb7SRalf Baechle bool 2436130e2fb7SRalf Baechle 2437130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2438130e2fb7SRalf Baechle bool 2439130e2fb7SRalf Baechle 2440130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2441130e2fb7SRalf Baechle bool 2442130e2fb7SRalf Baechle 24431da177e4SLinus Torvaldsconfig NR_CPUS 2444a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2445a91796a9SJayachandran C range 2 256 24461da177e4SLinus Torvalds depends on SMP 2447130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2448130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2449130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2450130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2451130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 24521da177e4SLinus Torvalds help 24531da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 24541da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 24551da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 245672ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 245772ede9b1SAtsushi Nemoto and 2 for all others. 24581da177e4SLinus Torvalds 24591da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 246072ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 246172ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 246272ede9b1SAtsushi Nemoto power of two. 24631da177e4SLinus Torvalds 2464399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2465399aaa25SAl Cooper bool 2466399aaa25SAl Cooper 24671723b4a3SAtsushi Nemoto# 24681723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 24691723b4a3SAtsushi Nemoto# 24701723b4a3SAtsushi Nemoto 24711723b4a3SAtsushi Nemotochoice 24721723b4a3SAtsushi Nemoto prompt "Timer frequency" 24731723b4a3SAtsushi Nemoto default HZ_250 24741723b4a3SAtsushi Nemoto help 24751723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 24761723b4a3SAtsushi Nemoto 24771723b4a3SAtsushi Nemoto config HZ_48 24780f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 24791723b4a3SAtsushi Nemoto 24801723b4a3SAtsushi Nemoto config HZ_100 24811723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 24821723b4a3SAtsushi Nemoto 24831723b4a3SAtsushi Nemoto config HZ_128 24841723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 24851723b4a3SAtsushi Nemoto 24861723b4a3SAtsushi Nemoto config HZ_250 24871723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 24881723b4a3SAtsushi Nemoto 24891723b4a3SAtsushi Nemoto config HZ_256 24901723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 24911723b4a3SAtsushi Nemoto 24921723b4a3SAtsushi Nemoto config HZ_1000 24931723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 24941723b4a3SAtsushi Nemoto 24951723b4a3SAtsushi Nemoto config HZ_1024 24961723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 24971723b4a3SAtsushi Nemoto 24981723b4a3SAtsushi Nemotoendchoice 24991723b4a3SAtsushi Nemoto 25001723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 25011723b4a3SAtsushi Nemoto bool 25021723b4a3SAtsushi Nemoto 25031723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 25041723b4a3SAtsushi Nemoto bool 25051723b4a3SAtsushi Nemoto 25061723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 25071723b4a3SAtsushi Nemoto bool 25081723b4a3SAtsushi Nemoto 25091723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 25101723b4a3SAtsushi Nemoto bool 25111723b4a3SAtsushi Nemoto 25121723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 25131723b4a3SAtsushi Nemoto bool 25141723b4a3SAtsushi Nemoto 25151723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 25161723b4a3SAtsushi Nemoto bool 25171723b4a3SAtsushi Nemoto 25181723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 25191723b4a3SAtsushi Nemoto bool 25201723b4a3SAtsushi Nemoto 25211723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 25221723b4a3SAtsushi Nemoto bool 25231723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 25241723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 25251723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 25261723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 25271723b4a3SAtsushi Nemoto 25281723b4a3SAtsushi Nemotoconfig HZ 25291723b4a3SAtsushi Nemoto int 25301723b4a3SAtsushi Nemoto default 48 if HZ_48 25311723b4a3SAtsushi Nemoto default 100 if HZ_100 25321723b4a3SAtsushi Nemoto default 128 if HZ_128 25331723b4a3SAtsushi Nemoto default 250 if HZ_250 25341723b4a3SAtsushi Nemoto default 256 if HZ_256 25351723b4a3SAtsushi Nemoto default 1000 if HZ_1000 25361723b4a3SAtsushi Nemoto default 1024 if HZ_1024 25371723b4a3SAtsushi Nemoto 2538e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 25391da177e4SLinus Torvalds 2540ea6e942bSAtsushi Nemotoconfig KEXEC 25417d60717eSKees Cook bool "Kexec system call" 2542ea6e942bSAtsushi Nemoto help 2543ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2544ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 25453dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2546ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2547ea6e942bSAtsushi Nemoto 254801dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2549ea6e942bSAtsushi Nemoto 2550ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2551ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2552bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2553bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2554bf220695SGeert Uytterhoeven made. 2555ea6e942bSAtsushi Nemoto 25567aa1c8f4SRalf Baechleconfig CRASH_DUMP 25577aa1c8f4SRalf Baechle bool "Kernel crash dumps" 25587aa1c8f4SRalf Baechle help 25597aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 25607aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 25617aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 25627aa1c8f4SRalf Baechle a specially reserved region and then later executed after 25637aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 25647aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 25657aa1c8f4SRalf Baechle PHYSICAL_START. 25667aa1c8f4SRalf Baechle 25677aa1c8f4SRalf Baechleconfig PHYSICAL_START 25687aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 25697aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 25707aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 25717aa1c8f4SRalf Baechle depends on CRASH_DUMP 25727aa1c8f4SRalf Baechle help 25737aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 25747aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 25757aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 25767aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 25777aa1c8f4SRalf Baechle passed to the panic-ed kernel). 25787aa1c8f4SRalf Baechle 2579ea6e942bSAtsushi Nemotoconfig SECCOMP 2580ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2581293c5bd1SRalf Baechle depends on PROC_FS 2582ea6e942bSAtsushi Nemoto default y 2583ea6e942bSAtsushi Nemoto help 2584ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2585ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2586ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2587ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2588ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2589ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2590ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2591ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2592ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2593ea6e942bSAtsushi Nemoto 2594ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2595ea6e942bSAtsushi Nemoto 2596597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 259706e2e882SPaul Burton bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)" 2598597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2599597ce172SPaul Burton help 2600597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2601597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2602597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2603597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2604597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2605597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2606597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2607597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2608597ce172SPaul Burton saying N here. 2609597ce172SPaul Burton 261006e2e882SPaul Burton Although binutils currently supports use of this flag the details 261106e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 261206e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 261306e2e882SPaul Burton behaviour before the details have been finalised, this option should 261406e2e882SPaul Burton be considered experimental and only enabled by those working upon 261506e2e882SPaul Burton said details. 261606e2e882SPaul Burton 261706e2e882SPaul Burton If unsure, say N. 2618597ce172SPaul Burton 2619f2ffa5abSDezhong Diaoconfig USE_OF 26200b3e06fdSJonas Gorski bool 2621f2ffa5abSDezhong Diao select OF 2622e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2623abd2363fSGrant Likely select IRQ_DOMAIN 2624f2ffa5abSDezhong Diao 26257fafb068SAndrew Brestickerconfig BUILTIN_DTB 26267fafb068SAndrew Bresticker bool 26277fafb068SAndrew Bresticker 26285e83d430SRalf Baechleendmenu 26295e83d430SRalf Baechle 26301df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 26311df0f0ffSAtsushi Nemoto bool 26321df0f0ffSAtsushi Nemoto default y 26331df0f0ffSAtsushi Nemoto 26341df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 26351df0f0ffSAtsushi Nemoto bool 26361df0f0ffSAtsushi Nemoto default y 26371df0f0ffSAtsushi Nemoto 2638b6c3539bSRalf Baechlesource "init/Kconfig" 2639b6c3539bSRalf Baechle 2640dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2641dc52ddc0SMatt Helsley 26421da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 26431da177e4SLinus Torvalds 26445e83d430SRalf Baechleconfig HW_HAS_EISA 26455e83d430SRalf Baechle bool 26461da177e4SLinus Torvaldsconfig HW_HAS_PCI 26471da177e4SLinus Torvalds bool 26481da177e4SLinus Torvalds 26491da177e4SLinus Torvaldsconfig PCI 26501da177e4SLinus Torvalds bool "Support for PCI controller" 26511da177e4SLinus Torvalds depends on HW_HAS_PCI 2652abb4ae46SRalf Baechle select PCI_DOMAINS 26530f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 26541da177e4SLinus Torvalds help 26551da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 26561da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 26571da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 26581da177e4SLinus Torvalds say Y, otherwise N. 26591da177e4SLinus Torvalds 26600e476d91SHuacai Chenconfig HT_PCI 26610e476d91SHuacai Chen bool "Support for HT-linked PCI" 26620e476d91SHuacai Chen default y 26630e476d91SHuacai Chen depends on CPU_LOONGSON3 26640e476d91SHuacai Chen select PCI 26650e476d91SHuacai Chen select PCI_DOMAINS 26660e476d91SHuacai Chen help 26670e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 26680e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 26690e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 26700e476d91SHuacai Chen 26711da177e4SLinus Torvaldsconfig PCI_DOMAINS 26721da177e4SLinus Torvalds bool 26731da177e4SLinus Torvalds 26741da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 26751da177e4SLinus Torvalds 26763f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 26773f787ca4SJonas Gorski 26781da177e4SLinus Torvalds# 26791da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 26801da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 26811da177e4SLinus Torvalds# users to choose the right thing ... 26821da177e4SLinus Torvalds# 26831da177e4SLinus Torvaldsconfig ISA 26841da177e4SLinus Torvalds bool 26851da177e4SLinus Torvalds 26861da177e4SLinus Torvaldsconfig EISA 26871da177e4SLinus Torvalds bool "EISA support" 26885e83d430SRalf Baechle depends on HW_HAS_EISA 26891da177e4SLinus Torvalds select ISA 2690aa414dffSRalf Baechle select GENERIC_ISA_DMA 26911da177e4SLinus Torvalds ---help--- 26921da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 26931da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 26941da177e4SLinus Torvalds 26951da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 26961da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 26971da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 26981da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 26991da177e4SLinus Torvalds 27001da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 27011da177e4SLinus Torvalds 27021da177e4SLinus Torvalds Otherwise, say N. 27031da177e4SLinus Torvalds 27041da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 27051da177e4SLinus Torvalds 27061da177e4SLinus Torvaldsconfig TC 27071da177e4SLinus Torvalds bool "TURBOchannel support" 27081da177e4SLinus Torvalds depends on MACH_DECSTATION 27091da177e4SLinus Torvalds help 271050a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 271150a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 271250a23e6eSJustin P. Mattock at: 271350a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 271450a23e6eSJustin P. Mattock and: 271550a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 271650a23e6eSJustin P. Mattock Linux driver support status is documented at: 271750a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 27181da177e4SLinus Torvalds 27191da177e4SLinus Torvaldsconfig MMU 27201da177e4SLinus Torvalds bool 27211da177e4SLinus Torvalds default y 27221da177e4SLinus Torvalds 2723d865bea4SRalf Baechleconfig I8253 2724d865bea4SRalf Baechle bool 2725798778b8SRussell King select CLKSRC_I8253 27262d02612fSThomas Gleixner select CLKEVT_I8253 27279726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2728d865bea4SRalf Baechle 2729e05eb3f8SRalf Baechleconfig ZONE_DMA 2730e05eb3f8SRalf Baechle bool 2731e05eb3f8SRalf Baechle 2732cce335aeSRalf Baechleconfig ZONE_DMA32 2733cce335aeSRalf Baechle bool 2734cce335aeSRalf Baechle 27351da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 27361da177e4SLinus Torvalds 27371da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 27381da177e4SLinus Torvalds 2739388b78adSAlexandre Bounineconfig RAPIDIO 274056abde72SAlexandre Bounine tristate "RapidIO support" 2741388b78adSAlexandre Bounine depends on PCI 2742388b78adSAlexandre Bounine default n 2743388b78adSAlexandre Bounine help 2744388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2745388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2746388b78adSAlexandre Bounine 2747388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2748388b78adSAlexandre Bounine 27491da177e4SLinus Torvaldsendmenu 27501da177e4SLinus Torvalds 27511da177e4SLinus Torvaldsmenu "Executable file formats" 27521da177e4SLinus Torvalds 27531da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 27541da177e4SLinus Torvalds 27551da177e4SLinus Torvaldsconfig TRAD_SIGNALS 27561da177e4SLinus Torvalds bool 27571da177e4SLinus Torvalds 27581da177e4SLinus Torvaldsconfig MIPS32_COMPAT 275978aaf956SRalf Baechle bool 27601da177e4SLinus Torvalds 27611da177e4SLinus Torvaldsconfig COMPAT 27621da177e4SLinus Torvalds bool 27631da177e4SLinus Torvalds 276405e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 276505e43966SAtsushi Nemoto bool 276605e43966SAtsushi Nemoto 27671da177e4SLinus Torvaldsconfig MIPS32_O32 27681da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 276978aaf956SRalf Baechle depends on 64BIT 277078aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 277178aaf956SRalf Baechle select COMPAT 277278aaf956SRalf Baechle select MIPS32_COMPAT 277378aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 27741da177e4SLinus Torvalds help 27751da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 27761da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 27771da177e4SLinus Torvalds existing binaries are in this format. 27781da177e4SLinus Torvalds 27791da177e4SLinus Torvalds If unsure, say Y. 27801da177e4SLinus Torvalds 27811da177e4SLinus Torvaldsconfig MIPS32_N32 27821da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 2783c22eacfeSRalf Baechle depends on 64BIT 278478aaf956SRalf Baechle select COMPAT 278578aaf956SRalf Baechle select MIPS32_COMPAT 278678aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 27871da177e4SLinus Torvalds help 27881da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 27891da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 27901da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 27911da177e4SLinus Torvalds cases. 27921da177e4SLinus Torvalds 27931da177e4SLinus Torvalds If unsure, say N. 27941da177e4SLinus Torvalds 27951da177e4SLinus Torvaldsconfig BINFMT_ELF32 27961da177e4SLinus Torvalds bool 27971da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 27981da177e4SLinus Torvalds 27992116245eSRalf Baechleendmenu 28001da177e4SLinus Torvalds 28012116245eSRalf Baechlemenu "Power management options" 2802952fa954SRodolfo Giometti 2803363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2804363c55caSWu Zhangjin def_bool y 28053f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2806363c55caSWu Zhangjin 2807f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2808f4cb5700SJohannes Berg def_bool y 28093f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2810f4cb5700SJohannes Berg 28112116245eSRalf Baechlesource "kernel/power/Kconfig" 2812952fa954SRodolfo Giometti 28131da177e4SLinus Torvaldsendmenu 28141da177e4SLinus Torvalds 28157a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 28167a998935SViresh Kumar bool 28177a998935SViresh Kumar 28187a998935SViresh Kumarmenu "CPU Power Management" 2819c095ebafSPaul Burton 2820c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 28217a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 28227a998935SViresh Kumarendif 28239726b43aSWu Zhangjin 2824c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 2825c095ebafSPaul Burton 2826c095ebafSPaul Burtonendmenu 2827c095ebafSPaul Burton 2828d5950b43SSam Ravnborgsource "net/Kconfig" 2829d5950b43SSam Ravnborg 28301da177e4SLinus Torvaldssource "drivers/Kconfig" 28311da177e4SLinus Torvalds 283298cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 283398cdee0eSRalf Baechle 28341da177e4SLinus Torvaldssource "fs/Kconfig" 28351da177e4SLinus Torvalds 28361da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 28371da177e4SLinus Torvalds 28381da177e4SLinus Torvaldssource "security/Kconfig" 28391da177e4SLinus Torvalds 28401da177e4SLinus Torvaldssource "crypto/Kconfig" 28411da177e4SLinus Torvalds 28421da177e4SLinus Torvaldssource "lib/Kconfig" 28432235a54dSSanjay Lal 28442235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 2845