xref: /linux/arch/mips/Kconfig (revision 679eb63779dffbd1fc40d4c218a4ff7c04508a48)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
440e084a5SRalf Baechle	select ARCH_SUPPORTS_UPROBES
5a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
6393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
75fac4f7aSPaul Burton	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
81ee3630aSRalf Baechle	select ARCH_USE_BUILTIN_BSWAP
9c3fc5cd5SRalf Baechle	select HAVE_CONTEXT_TRACKING
10f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
11ec7748b5SSam Ravnborg	select HAVE_IDE
1242d4b839SMathieu Desnoyers	select HAVE_OPROFILE
137f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
147f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
1588547001SJason Wessel	select HAVE_ARCH_KGDB
16490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
17c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
183f5fdb4bSMarkos Chandras	select HAVE_BPF_JIT if !CPU_MICROMIPS
19d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
20538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
21538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
2264575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
2329c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
24c1bf207dSDavid Daney	select HAVE_KPROBES
25c1bf207dSDavid Daney	select HAVE_KRETPROBES
26fb59e394SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
27b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
281d7bf993SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
292b68f6caSKees Cook	select ARCH_HAS_ELF_RANDOMIZE
30383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
3130ad29bbSHuacai Chen	select RTC_LIB if !MACH_LOONGSON64
322b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
337463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
34f4649382SZubair Lutfullah Kakakhel	select HAVE_DMA_CONTIGUOUS
3548e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
363bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
37f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3878857614SMarkos Chandras	select GENERIC_PCI_IOMAP
3994bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
40c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
410f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
429d15ffc8STejun Heo	select HAVE_MEMBLOCK
439d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
449d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
45360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
464b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
47cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
48929de4ccSDeng-Cheng Zhu	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
49cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
50786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
514febd95aSStephen Rothwell	select VIRT_TO_BUS
522f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
532f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
5450150d2bSAl Viro	select CLONE_BACKWARDS
55d1a1dc0bSDave Hansen	select HAVE_DEBUG_STACKOVERFLOW
5619952a92SKees Cook	select HAVE_CC_STACKPROTECTOR
57b1d4c6caSJames Hogan	select CPU_PM if CPU_IDLE
58cc7964afSPaul Burton	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
5990cee759SPaul Burton	select ARCH_BINFMT_ELF_STATE
60d79d853dSMarkos Chandras	select SYSCTL_EXCEPTION_TRACE
61bb877e96SDeng-Cheng Zhu	select HAVE_VIRT_CPU_ACCOUNTING_GEN
62ec9ddad3SDeng-Cheng Zhu	select HAVE_IRQ_TIME_ACCOUNTING
63a7f4df4eSAlex Smith	select GENERIC_TIME_VSYSCALL
64a7f4df4eSAlex Smith	select ARCH_CLOCKSOURCE_DATA
651da177e4SLinus Torvalds
661da177e4SLinus Torvaldsmenu "Machine selection"
671da177e4SLinus Torvalds
685e83d430SRalf Baechlechoice
695e83d430SRalf Baechle	prompt "System type"
705e83d430SRalf Baechle	default SGI_IP22
711da177e4SLinus Torvalds
7242a4f17dSManuel Laussconfig MIPS_ALCHEMY
73c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
7434adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
75f772cdb2SRalf Baechle	select CEVT_R4K
76d7ea335cSSteven J. Hill	select CSRC_R4K
7767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7888e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
7942a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
8042a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
8142a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
82efb12436SAlexandre Courbot	select ARCH_REQUIRE_GPIOLIB
831b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
8447440229SManuel Lauss	select COMMON_CLK
851da177e4SLinus Torvalds
867ca5dc14SFlorian Fainelliconfig AR7
877ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
887ca5dc14SFlorian Fainelli	select BOOT_ELF32
897ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
907ca5dc14SFlorian Fainelli	select CEVT_R4K
917ca5dc14SFlorian Fainelli	select CSRC_R4K
9267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
937ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
947ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
957ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
967ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
977ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
987ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
99377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1001b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
1015f3c9098SFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
1027ca5dc14SFlorian Fainelli	select VLYNQ
1038551fb64SYoichi Yuasa	select HAVE_CLK
1047ca5dc14SFlorian Fainelli	help
1057ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1067ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1077ca5dc14SFlorian Fainelli
10843cc739fSSergey Ryazanovconfig ATH25
10943cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
11043cc739fSSergey Ryazanov	select CEVT_R4K
11143cc739fSSergey Ryazanov	select CSRC_R4K
11243cc739fSSergey Ryazanov	select DMA_NONCOHERENT
11367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1141753e74eSSergey Ryazanov	select IRQ_DOMAIN
11543cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
11643cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
11743cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
1188aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
11943cc739fSSergey Ryazanov	help
12043cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
12143cc739fSSergey Ryazanov
122d4a67d9dSGabor Juhosconfig ATH79
123d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
124ff591a91SAlban Bedel	select ARCH_HAS_RESET_CONTROLLER
1256eae43c5SGabor Juhos	select ARCH_REQUIRE_GPIOLIB
126d4a67d9dSGabor Juhos	select BOOT_RAW
127d4a67d9dSGabor Juhos	select CEVT_R4K
128d4a67d9dSGabor Juhos	select CSRC_R4K
129d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
13094638067SGabor Juhos	select HAVE_CLK
131411520afSAlban Bedel	select COMMON_CLK
1322c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
13367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1340aabf1a4SGabor Juhos	select MIPS_MACHINE
135d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
136d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
137d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
138d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
139377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
140da628e8bSAlban Bedel	select SYS_SUPPORTS_ZBOOT
14103c8c407SAlban Bedel	select USE_OF
142d4a67d9dSGabor Juhos	help
143d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
144d4a67d9dSGabor Juhos
1455f2d4459SKevin Cernekeeconfig BMIPS_GENERIC
1465f2d4459SKevin Cernekee	bool "Broadcom Generic BMIPS kernel"
147d666cd02SKevin Cernekee	select BOOT_RAW
148d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
149d666cd02SKevin Cernekee	select USE_OF
150d666cd02SKevin Cernekee	select CEVT_R4K
151d666cd02SKevin Cernekee	select CSRC_R4K
152d666cd02SKevin Cernekee	select SYNC_R4K
153d666cd02SKevin Cernekee	select COMMON_CLK
154c7c42ec2SSimon Arlott	select BCM6345_L1_IRQ
15560b858f2SKevin Cernekee	select BCM7038_L1_IRQ
15660b858f2SKevin Cernekee	select BCM7120_L2_IRQ
15760b858f2SKevin Cernekee	select BRCMSTB_L2_IRQ
15867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
15960b858f2SKevin Cernekee	select DMA_NONCOHERENT
160d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
16160b858f2SKevin Cernekee	select SYS_SUPPORTS_LITTLE_ENDIAN
162d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
163d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
16460b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS32_3300
16560b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4350
16660b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4380
167d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
168d666cd02SKevin Cernekee	select SWAP_IO_SPACE
16960b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17060b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
17160b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17260b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
173a7b43812SFlorian Fainelli	select ARCH_WANT_OPTIONAL_GPIOLIB
174d666cd02SKevin Cernekee	help
1755f2d4459SKevin Cernekee	  Build a generic DT-based kernel image that boots on select
1765f2d4459SKevin Cernekee	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
1775f2d4459SKevin Cernekee	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
1785f2d4459SKevin Cernekee	  must be set appropriately for your board.
179d666cd02SKevin Cernekee
1801c0c13ebSAurelien Jarnoconfig BCM47XX
181c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
1822da4c74dSHauke Mehrtens	select ARCH_WANT_OPTIONAL_GPIOLIB
183fe08f8c2SHauke Mehrtens	select BOOT_RAW
18442f77542SRalf Baechle	select CEVT_R4K
185940f6b48SRalf Baechle	select CSRC_R4K
1861c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1871c0c13ebSAurelien Jarno	select HW_HAS_PCI
18867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
189314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
190dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1911c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1921c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
193377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
19425e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
195e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
196c949c0bcSRafał Miłecki	select GPIOLIB
197c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
198f6e734a8SRafał Miłecki	select BCM47XX_NVRAM
1991c0c13ebSAurelien Jarno	help
2001c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
2011c0c13ebSAurelien Jarno
202e7300d04SMaxime Bizonconfig BCM63XX
203e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
204ae8de61cSFlorian Fainelli	select BOOT_RAW
205e7300d04SMaxime Bizon	select CEVT_R4K
206e7300d04SMaxime Bizon	select CSRC_R4K
207fc264022SJonas Gorski	select SYNC_R4K
208e7300d04SMaxime Bizon	select DMA_NONCOHERENT
20967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
210e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
211e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
212e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
213e7300d04SMaxime Bizon	select SWAP_IO_SPACE
214e7300d04SMaxime Bizon	select ARCH_REQUIRE_GPIOLIB
2153e82eeebSYoichi Yuasa	select HAVE_CLK
216af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
217e7300d04SMaxime Bizon	help
218e7300d04SMaxime Bizon	 Support for BCM63XX based boards
219e7300d04SMaxime Bizon
2201da177e4SLinus Torvaldsconfig MIPS_COBALT
2213fa986faSMartin Michlmayr	bool "Cobalt Server"
22242f77542SRalf Baechle	select CEVT_R4K
223940f6b48SRalf Baechle	select CSRC_R4K
2241097c6acSYoichi Yuasa	select CEVT_GT641XX
2251da177e4SLinus Torvalds	select DMA_NONCOHERENT
2261da177e4SLinus Torvalds	select HW_HAS_PCI
227d865bea4SRalf Baechle	select I8253
2281da177e4SLinus Torvalds	select I8259
22967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
230d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
231252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
232e25bfc92SYoichi Yuasa	select PCI
2337cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
2340a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
235ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2360e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
2375e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
238e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
2391da177e4SLinus Torvalds
2401da177e4SLinus Torvaldsconfig MACH_DECSTATION
2413fa986faSMartin Michlmayr	bool "DECstations"
2421da177e4SLinus Torvalds	select BOOT_ELF32
2436457d9fcSYoichi Yuasa	select CEVT_DS1287
24481d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
2454247417dSYoichi Yuasa	select CSRC_IOASIC
24681d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
24720d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
24820d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
24920d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
2501da177e4SLinus Torvalds	select DMA_NONCOHERENT
251ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
25267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
2537cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
2547cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
255ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2567d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2575e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
2581723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
2591723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
2601723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
261930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
2625e83d430SRalf Baechle	help
2631da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
2641da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
2651da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
2661da177e4SLinus Torvalds
2671da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
2681da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
2691da177e4SLinus Torvalds
2701da177e4SLinus Torvalds		DECstation 5000/50
2711da177e4SLinus Torvalds		DECstation 5000/150
2721da177e4SLinus Torvalds		DECstation 5000/260
2731da177e4SLinus Torvalds		DECsystem 5900/260
2741da177e4SLinus Torvalds
2751da177e4SLinus Torvalds	  otherwise choose R3000.
2761da177e4SLinus Torvalds
2775e83d430SRalf Baechleconfig MACH_JAZZ
2783fa986faSMartin Michlmayr	bool "Jazz family of machines"
2790e2794b0SRalf Baechle	select FW_ARC
2800e2794b0SRalf Baechle	select FW_ARC32
2815e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
28242f77542SRalf Baechle	select CEVT_R4K
283940f6b48SRalf Baechle	select CSRC_R4K
284e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2855e83d430SRalf Baechle	select GENERIC_ISA_DMA
2868a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
28767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
288d865bea4SRalf Baechle	select I8253
2895e83d430SRalf Baechle	select I8259
2905e83d430SRalf Baechle	select ISA
2917cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2925e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2937d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2941723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2951da177e4SLinus Torvalds	help
2965e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
2975e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
298692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
2995e83d430SRalf Baechle	 Olivetti M700-10 workstations.
3005e83d430SRalf Baechle
301de361e8bSPaul Burtonconfig MACH_INGENIC
302de361e8bSPaul Burton	bool "Ingenic SoC based machines"
3035ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
3045ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
305f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
3065ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
30767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3085ebabe59SLars-Peter Clausen	select ARCH_REQUIRE_GPIOLIB
309ff1930c6SPaul Burton	select COMMON_CLK
31083bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
311ffb1843dSPaul Burton	select BUILTIN_DTB
312ffb1843dSPaul Burton	select USE_OF
3136ec127fbSPaul Burton	select LIBFDT
3145ebabe59SLars-Peter Clausen
315171bb2f1SJohn Crispinconfig LANTIQ
316171bb2f1SJohn Crispin	bool "Lantiq based platforms"
317171bb2f1SJohn Crispin	select DMA_NONCOHERENT
31867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
319171bb2f1SJohn Crispin	select CEVT_R4K
320171bb2f1SJohn Crispin	select CSRC_R4K
321171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
322171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
323171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
324171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
325377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
326171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
327171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
328171bb2f1SJohn Crispin	select ARCH_REQUIRE_GPIOLIB
329171bb2f1SJohn Crispin	select SWAP_IO_SPACE
330171bb2f1SJohn Crispin	select BOOT_RAW
331287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
332a0392222SJohn Crispin	select USE_OF
3333f8c50c9SJohn Crispin	select PINCTRL
3343f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
335c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
336c530781cSJohn Crispin	select RESET_CONTROLLER
337171bb2f1SJohn Crispin
3381f21d2bdSBrian Murphyconfig LASAT
3391f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
34042f77542SRalf Baechle	select CEVT_R4K
34116f0bbbcSRalf Baechle	select CRC32
342940f6b48SRalf Baechle	select CSRC_R4K
3431f21d2bdSBrian Murphy	select DMA_NONCOHERENT
3441f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
3451f21d2bdSBrian Murphy	select HW_HAS_PCI
34667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3471f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
3481f21d2bdSBrian Murphy	select MIPS_NILE4
3491f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
3501f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
3511f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
3521f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
3531f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
3541f21d2bdSBrian Murphy
35530ad29bbSHuacai Chenconfig MACH_LOONGSON32
35630ad29bbSHuacai Chen	bool "Loongson-1 family of machines"
357c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
358ade299d8SYoichi Yuasa	help
35930ad29bbSHuacai Chen	  This enables support for the Loongson-1 family of machines.
36085749d24SWu Zhangjin
36130ad29bbSHuacai Chen	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
36230ad29bbSHuacai Chen	  the Institute of Computing Technology (ICT), Chinese Academy of
36330ad29bbSHuacai Chen	  Sciences (CAS).
364ade299d8SYoichi Yuasa
36530ad29bbSHuacai Chenconfig MACH_LOONGSON64
36630ad29bbSHuacai Chen	bool "Loongson-2/3 family of machines"
367ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
368ca585cf9SKelvin Cheung	help
36930ad29bbSHuacai Chen	  This enables the support of Loongson-2/3 family of machines.
370ca585cf9SKelvin Cheung
37130ad29bbSHuacai Chen	  Loongson-2 is a family of single-core CPUs and Loongson-3 is a
37230ad29bbSHuacai Chen	  family of multi-core CPUs. They are both 64-bit general-purpose
37330ad29bbSHuacai Chen	  MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
37430ad29bbSHuacai Chen	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
37530ad29bbSHuacai Chen	  in the People's Republic of China. The chief architect is Professor
37630ad29bbSHuacai Chen	  Weiwu Hu.
377ca585cf9SKelvin Cheung
3786a438309SAndrew Brestickerconfig MACH_PISTACHIO
3796a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
3806a438309SAndrew Bresticker	select ARCH_REQUIRE_GPIOLIB
3816a438309SAndrew Bresticker	select BOOT_ELF32
3826a438309SAndrew Bresticker	select BOOT_RAW
3836a438309SAndrew Bresticker	select CEVT_R4K
3846a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
3856a438309SAndrew Bresticker	select COMMON_CLK
3866a438309SAndrew Bresticker	select CSRC_R4K
3876a438309SAndrew Bresticker	select DMA_MAYBE_COHERENT
38867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3896a438309SAndrew Bresticker	select LIBFDT
3906a438309SAndrew Bresticker	select MFD_SYSCON
3916a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
3926a438309SAndrew Bresticker	select MIPS_GIC
3936a438309SAndrew Bresticker	select PINCTRL
3946a438309SAndrew Bresticker	select REGULATOR
3956a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
3966a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
3976a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
3986a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
3996a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
4006a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
401018f62eeSEzequiel Garcia	select SYS_HAS_EARLY_PRINTK
402018f62eeSEzequiel Garcia	select USE_GENERIC_EARLY_PRINTK_8250
4036a438309SAndrew Bresticker	select USE_OF
4046a438309SAndrew Bresticker	help
4056a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
4066a438309SAndrew Bresticker
4079937f5ffSZubair Lutfullah Kakakhelconfig MACH_XILFPGA
4089937f5ffSZubair Lutfullah Kakakhel	bool "MIPSfpga Xilinx based boards"
4099937f5ffSZubair Lutfullah Kakakhel	select ARCH_REQUIRE_GPIOLIB
4109937f5ffSZubair Lutfullah Kakakhel	select BOOT_ELF32
4119937f5ffSZubair Lutfullah Kakakhel	select BOOT_RAW
4129937f5ffSZubair Lutfullah Kakakhel	select BUILTIN_DTB
4139937f5ffSZubair Lutfullah Kakakhel	select CEVT_R4K
4149937f5ffSZubair Lutfullah Kakakhel	select COMMON_CLK
4159937f5ffSZubair Lutfullah Kakakhel	select CSRC_R4K
4169937f5ffSZubair Lutfullah Kakakhel	select IRQ_MIPS_CPU
4179937f5ffSZubair Lutfullah Kakakhel	select LIBFDT
4189937f5ffSZubair Lutfullah Kakakhel	select MIPS_CPU_SCACHE
4199937f5ffSZubair Lutfullah Kakakhel	select SYS_HAS_EARLY_PRINTK
4209937f5ffSZubair Lutfullah Kakakhel	select SYS_HAS_CPU_MIPS32_R2
4219937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_32BIT_KERNEL
4229937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_LITTLE_ENDIAN
4239937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_ZBOOT_UART16550
4249937f5ffSZubair Lutfullah Kakakhel	select USE_OF
4259937f5ffSZubair Lutfullah Kakakhel	select USE_GENERIC_EARLY_PRINTK_8250
4269937f5ffSZubair Lutfullah Kakakhel	help
4279937f5ffSZubair Lutfullah Kakakhel	  This enables support for the IMG University Program MIPSfpga platform.
4289937f5ffSZubair Lutfullah Kakakhel
4291da177e4SLinus Torvaldsconfig MIPS_MALTA
4303fa986faSMartin Michlmayr	bool "MIPS Malta board"
43161ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
4321da177e4SLinus Torvalds	select BOOT_ELF32
433fa71c960SRalf Baechle	select BOOT_RAW
434e8823d26SPaul Burton	select BUILTIN_DTB
43542f77542SRalf Baechle	select CEVT_R4K
436940f6b48SRalf Baechle	select CSRC_R4K
437fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
43842b002abSGuenter Roeck	select COMMON_CLK
439885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
4401da177e4SLinus Torvalds	select GENERIC_ISA_DMA
4418a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
44267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4438a19b8f1SAndrew Bresticker	select MIPS_GIC
4441da177e4SLinus Torvalds	select HW_HAS_PCI
445d865bea4SRalf Baechle	select I8253
4461da177e4SLinus Torvalds	select I8259
4475e83d430SRalf Baechle	select MIPS_BONITO64
4489318c51aSChris Dearman	select MIPS_CPU_SCACHE
449a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
450252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
4515e83d430SRalf Baechle	select MIPS_MSC
452ecafe3e9SPaul Burton	select SMP_UP if SMP
4531da177e4SLinus Torvalds	select SWAP_IO_SPACE
4547cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
4557cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
456bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
457c5b36783SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R5
458575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
4597cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
4605d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
461575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
4627cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
4637cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
464ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
465ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4665e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
467c5b36783SSteven J. Hill	select SYS_SUPPORTS_HIGHMEM
4685e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
469424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
4700365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
471e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
472377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
473f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
4749693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
4751b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
476e8823d26SPaul Burton	select USE_OF
477abcc82b1SJames Hogan	select ZONE_DMA32 if 64BIT
478e81a8c7dSPaul Burton	select BUILTIN_DTB
479e81a8c7dSPaul Burton	select LIBFDT
4801da177e4SLinus Torvalds	help
481f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
4821da177e4SLinus Torvalds	  board.
4831da177e4SLinus Torvalds
4842572f00dSJoshua Hendersonconfig MACH_PIC32
4852572f00dSJoshua Henderson	bool "Microchip PIC32 Family"
4862572f00dSJoshua Henderson	help
4872572f00dSJoshua Henderson	  This enables support for the Microchip PIC32 family of platforms.
4882572f00dSJoshua Henderson
4892572f00dSJoshua Henderson	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
4902572f00dSJoshua Henderson	  microcontrollers.
4912572f00dSJoshua Henderson
492ec47b274SSteven J. Hillconfig MIPS_SEAD3
493ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
494ec47b274SSteven J. Hill	select BOOT_ELF32
495ec47b274SSteven J. Hill	select BOOT_RAW
496f262b5f2SAndrew Bresticker	select BUILTIN_DTB
497ec47b274SSteven J. Hill	select CEVT_R4K
498ec47b274SSteven J. Hill	select CSRC_R4K
499fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
50042b002abSGuenter Roeck	select COMMON_CLK
501ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
502ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
503ec47b274SSteven J. Hill	select DMA_NONCOHERENT
50467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5058a19b8f1SAndrew Bresticker	select MIPS_GIC
50644327236SQais Yousef	select LIBFDT
507ec47b274SSteven J. Hill	select MIPS_MSC
508ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
509ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
510ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
511ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
512ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
513ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
514ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
515ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
516ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
517a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
518377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
519ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
520ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
5219b731009SSteven J. Hill	select USE_OF
522ec47b274SSteven J. Hill	help
523ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
524ec47b274SSteven J. Hill	  board.
525ec47b274SSteven J. Hill
526a83860c2SRalf Baechleconfig NEC_MARKEINS
527a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
528a83860c2SRalf Baechle	select SOC_EMMA2RH
529a83860c2SRalf Baechle	select HW_HAS_PCI
530a83860c2SRalf Baechle	help
531a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
532ade299d8SYoichi Yuasa
5335e83d430SRalf Baechleconfig MACH_VR41XX
53474142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
53542f77542SRalf Baechle	select CEVT_R4K
536940f6b48SRalf Baechle	select CSRC_R4K
5377cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
538377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
53927fdd325SYoichi Yuasa	select ARCH_REQUIRE_GPIOLIB
5405e83d430SRalf Baechle
541edb6310aSDaniel Lairdconfig NXP_STB220
542edb6310aSDaniel Laird	bool "NXP STB220 board"
543edb6310aSDaniel Laird	select SOC_PNX833X
544edb6310aSDaniel Laird	help
545edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
546edb6310aSDaniel Laird
547edb6310aSDaniel Lairdconfig NXP_STB225
548edb6310aSDaniel Laird	bool "NXP 225 board"
549edb6310aSDaniel Laird	select SOC_PNX833X
550edb6310aSDaniel Laird	select SOC_PNX8335
551edb6310aSDaniel Laird	help
552edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
553edb6310aSDaniel Laird
5549267a30dSMarc St-Jeanconfig PMC_MSP
5559267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
55639d30c13SAnoop P A	select CEVT_R4K
55739d30c13SAnoop P A	select CSRC_R4K
5589267a30dSMarc St-Jean	select DMA_NONCOHERENT
5599267a30dSMarc St-Jean	select SWAP_IO_SPACE
5609267a30dSMarc St-Jean	select NO_EXCEPT_FILL
5619267a30dSMarc St-Jean	select BOOT_RAW
5629267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
5639267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
5649267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
5659267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
566377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
56767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5689267a30dSMarc St-Jean	select SERIAL_8250
5699267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
5709296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
5719296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
5729267a30dSMarc St-Jean	help
5739267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
5749267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
5759267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
5769267a30dSMarc St-Jean	  a variety of MIPS cores.
5779267a30dSMarc St-Jean
578ae2b5bb6SJohn Crispinconfig RALINK
579ae2b5bb6SJohn Crispin	bool "Ralink based machines"
580ae2b5bb6SJohn Crispin	select CEVT_R4K
581ae2b5bb6SJohn Crispin	select CSRC_R4K
582ae2b5bb6SJohn Crispin	select BOOT_RAW
583ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
58467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
585ae2b5bb6SJohn Crispin	select USE_OF
586ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
587ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
588ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
589ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
590377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
591ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
592ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
5932a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
5942a153f1cSJohn Crispin	select RESET_CONTROLLER
595ae2b5bb6SJohn Crispin
5961da177e4SLinus Torvaldsconfig SGI_IP22
5973fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
5980e2794b0SRalf Baechle	select FW_ARC
5990e2794b0SRalf Baechle	select FW_ARC32
6001da177e4SLinus Torvalds	select BOOT_ELF32
60142f77542SRalf Baechle	select CEVT_R4K
602940f6b48SRalf Baechle	select CSRC_R4K
603e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
6041da177e4SLinus Torvalds	select DMA_NONCOHERENT
6055e83d430SRalf Baechle	select HW_HAS_EISA
606d865bea4SRalf Baechle	select I8253
60768de4803SThomas Bogendoerfer	select I8259
6081da177e4SLinus Torvalds	select IP22_CPU_SCACHE
60967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
610aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
611e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
612e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
61336e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
614e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
615e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
616e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
6171da177e4SLinus Torvalds	select SWAP_IO_SPACE
6187cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
6197cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
6202b5e63f6SMartin Michlmayr	#
6212b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6222b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6232b5e63f6SMartin Michlmayr	#
6242b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6252b5e63f6SMartin Michlmayr	# for a more details discussion
6262b5e63f6SMartin Michlmayr	#
6272b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
628ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
629ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6305e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
631930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6321da177e4SLinus Torvalds	help
6331da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
6341da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
6351da177e4SLinus Torvalds	  that runs on these, say Y here.
6361da177e4SLinus Torvalds
6371da177e4SLinus Torvaldsconfig SGI_IP27
6383fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
6390e2794b0SRalf Baechle	select FW_ARC
6400e2794b0SRalf Baechle	select FW_ARC64
6415e83d430SRalf Baechle	select BOOT_ELF64
642e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
643634286f1SRalf Baechle	select DMA_COHERENT
64436a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
6451da177e4SLinus Torvalds	select HW_HAS_PCI
646130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
6477cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
648ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6495e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
650d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
6511a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
652930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6531da177e4SLinus Torvalds	help
6541da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
6551da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
6561da177e4SLinus Torvalds	  here.
6571da177e4SLinus Torvalds
658e2defae5SThomas Bogendoerferconfig SGI_IP28
6597d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
6600e2794b0SRalf Baechle	select FW_ARC
6610e2794b0SRalf Baechle	select FW_ARC64
662e2defae5SThomas Bogendoerfer	select BOOT_ELF64
663e2defae5SThomas Bogendoerfer	select CEVT_R4K
664e2defae5SThomas Bogendoerfer	select CSRC_R4K
665e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
666e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
667e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
66867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
669e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
670e2defae5SThomas Bogendoerfer	select I8253
671e2defae5SThomas Bogendoerfer	select I8259
672e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
673e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6745b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
675e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
676e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
677e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
678e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
679e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6802b5e63f6SMartin Michlmayr	#
6812b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6822b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6832b5e63f6SMartin Michlmayr	#
6842b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6852b5e63f6SMartin Michlmayr	# for a more details discussion
6862b5e63f6SMartin Michlmayr	#
6872b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
688e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
689e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
690dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
691e2defae5SThomas Bogendoerfer      help
692e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
693e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
694e2defae5SThomas Bogendoerfer
6951da177e4SLinus Torvaldsconfig SGI_IP32
696cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
6970e2794b0SRalf Baechle	select FW_ARC
6980e2794b0SRalf Baechle	select FW_ARC32
6991da177e4SLinus Torvalds	select BOOT_ELF32
70042f77542SRalf Baechle	select CEVT_R4K
701940f6b48SRalf Baechle	select CSRC_R4K
7021da177e4SLinus Torvalds	select DMA_NONCOHERENT
7031da177e4SLinus Torvalds	select HW_HAS_PCI
70467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7051da177e4SLinus Torvalds	select R5000_CPU_SCACHE
7061da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
7077cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
7087cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
7097cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
710dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
711ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
7125e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7131da177e4SLinus Torvalds	help
7141da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
7151da177e4SLinus Torvalds
716ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
717ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
7185e83d430SRalf Baechle	select BOOT_ELF32
7195e83d430SRalf Baechle	select DMA_COHERENT
7205e83d430SRalf Baechle	select SIBYTE_BCM1120
7215e83d430SRalf Baechle	select SWAP_IO_SPACE
7227cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7235e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7245e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7255e83d430SRalf Baechle
726ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
727ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
7285e83d430SRalf Baechle	select BOOT_ELF32
7295e83d430SRalf Baechle	select DMA_COHERENT
7305e83d430SRalf Baechle	select SIBYTE_BCM1120
7315e83d430SRalf Baechle	select SWAP_IO_SPACE
7327cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7335e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7345e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7355e83d430SRalf Baechle
7365e83d430SRalf Baechleconfig SIBYTE_CRHONE
7373fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
7385e83d430SRalf Baechle	select BOOT_ELF32
7395e83d430SRalf Baechle	select DMA_COHERENT
7405e83d430SRalf Baechle	select SIBYTE_BCM1125
7415e83d430SRalf Baechle	select SWAP_IO_SPACE
7427cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7435e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7445e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7455e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7465e83d430SRalf Baechle
747ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
748ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
749ade299d8SYoichi Yuasa	select BOOT_ELF32
750ade299d8SYoichi Yuasa	select DMA_COHERENT
751ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
752ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
753ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
754ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
755ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
756ade299d8SYoichi Yuasa
757ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
758ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
759ade299d8SYoichi Yuasa	select BOOT_ELF32
760ade299d8SYoichi Yuasa	select DMA_COHERENT
761fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
762ade299d8SYoichi Yuasa	select SIBYTE_SB1250
763ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
764ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
765ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
766ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
767ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
768cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
769ade299d8SYoichi Yuasa
770ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
771ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
772ade299d8SYoichi Yuasa	select BOOT_ELF32
773ade299d8SYoichi Yuasa	select DMA_COHERENT
774fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
775ade299d8SYoichi Yuasa	select SIBYTE_SB1250
776ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
777ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
778ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
779ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
780ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
781ade299d8SYoichi Yuasa
782ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
783ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
784ade299d8SYoichi Yuasa	select BOOT_ELF32
785ade299d8SYoichi Yuasa	select DMA_COHERENT
786ade299d8SYoichi Yuasa	select SIBYTE_SB1250
787ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
788ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
789ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
790ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
791ade299d8SYoichi Yuasa
792ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
793ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
794ade299d8SYoichi Yuasa	select BOOT_ELF32
795ade299d8SYoichi Yuasa	select DMA_COHERENT
796ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
797ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
798ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
799ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
800ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
801651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
802ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
803cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
804ade299d8SYoichi Yuasa
80514b36af4SThomas Bogendoerferconfig SNI_RM
80614b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
8070e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
8080e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
809aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
8105e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
8115e83d430SRalf Baechle	select BOOT_ELF32
81242f77542SRalf Baechle	select CEVT_R4K
813940f6b48SRalf Baechle	select CSRC_R4K
814e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
8155e83d430SRalf Baechle	select DMA_NONCOHERENT
8165e83d430SRalf Baechle	select GENERIC_ISA_DMA
8178a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
8185e83d430SRalf Baechle	select HW_HAS_EISA
8195e83d430SRalf Baechle	select HW_HAS_PCI
82067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
821d865bea4SRalf Baechle	select I8253
8225e83d430SRalf Baechle	select I8259
8235e83d430SRalf Baechle	select ISA
8244a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
8257cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
8264a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
827c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
8284a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
82936a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
830ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
8317d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
8324a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
8335e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
8345e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8351da177e4SLinus Torvalds	help
83614b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
83714b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
8385e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
8395e83d430SRalf Baechle	  support this machine type.
8401da177e4SLinus Torvalds
841edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
842edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
8435e83d430SRalf Baechle
844edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
845edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
84623fbee9dSRalf Baechle
84773b4390fSRalf Baechleconfig MIKROTIK_RB532
84873b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
84973b4390fSRalf Baechle	select CEVT_R4K
85073b4390fSRalf Baechle	select CSRC_R4K
85173b4390fSRalf Baechle	select DMA_NONCOHERENT
85273b4390fSRalf Baechle	select HW_HAS_PCI
85367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
85473b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
85573b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
85673b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
85773b4390fSRalf Baechle	select SWAP_IO_SPACE
85873b4390fSRalf Baechle	select BOOT_RAW
859d888e25bSFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
860930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
86173b4390fSRalf Baechle	help
86273b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
86373b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
86473b4390fSRalf Baechle
8659ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
8669ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
867a86c7f72SDavid Daney	select CEVT_R4K
86834adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
869a86c7f72SDavid Daney	select DMA_COHERENT
870a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
871a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
872f65aad41SRalf Baechle	select EDAC_SUPPORT
873b01aec9bSBorislav Petkov	select EDAC_ATOMIC_SCRUB
87473569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
87573569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
876a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
8775e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
878a86c7f72SDavid Daney	select SWAP_IO_SPACE
879e8635b48SDavid Daney	select HW_HAS_PCI
880f00e001eSDavid Daney	select ZONE_DMA32
881465aaed0SDavid Daney	select HOLES_IN_ZONE
88299cab4bbSDavid Daney	select ARCH_REQUIRE_GPIOLIB
8836e511163SDavid Daney	select LIBFDT
8846e511163SDavid Daney	select USE_OF
8856e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
8866e511163SDavid Daney	select SYS_SUPPORTS_SMP
8876e511163SDavid Daney	select NR_CPUS_DEFAULT_16
888e326479fSAndrew Bresticker	select BUILTIN_DTB
8898c1e6b14SDavid Daney	select MTD_COMPLEX_MAPPINGS
890a86c7f72SDavid Daney	help
891a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
892a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
893a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
894a86c7f72SDavid Daney	  Some of the supported boards are:
895a86c7f72SDavid Daney		EBT3000
896a86c7f72SDavid Daney		EBH3000
897a86c7f72SDavid Daney		EBH3100
898a86c7f72SDavid Daney		Thunder
899a86c7f72SDavid Daney		Kodama
900a86c7f72SDavid Daney		Hikari
901a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
902a86c7f72SDavid Daney
9037f058e85SJayachandran Cconfig NLM_XLR_BOARD
9047f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
9057f058e85SJayachandran C	select BOOT_ELF32
9067f058e85SJayachandran C	select NLM_COMMON
9077f058e85SJayachandran C	select SYS_HAS_CPU_XLR
9087f058e85SJayachandran C	select SYS_SUPPORTS_SMP
9097f058e85SJayachandran C	select HW_HAS_PCI
9107f058e85SJayachandran C	select SWAP_IO_SPACE
9117f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9127f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
91334adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
9147f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9157f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9167f058e85SJayachandran C	select DMA_COHERENT
9177f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
9187f058e85SJayachandran C	select CEVT_R4K
9197f058e85SJayachandran C	select CSRC_R4K
92067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
921b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9227f058e85SJayachandran C	select SYNC_R4K
9237f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
9248f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9258f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9267f058e85SJayachandran C	help
9277f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
9287f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
9297f058e85SJayachandran C
9301c773ea4SJayachandran Cconfig NLM_XLP_BOARD
9311c773ea4SJayachandran C	bool "Netlogic XLP based systems"
9321c773ea4SJayachandran C	select BOOT_ELF32
9331c773ea4SJayachandran C	select NLM_COMMON
9341c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
9351c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
9361c773ea4SJayachandran C	select HW_HAS_PCI
9371c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9381c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
93934adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
940079e3160SKamlakant Patel	select ARCH_REQUIRE_GPIOLIB
9411c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9421c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
9431c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9441c773ea4SJayachandran C	select DMA_COHERENT
9451c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
9461c773ea4SJayachandran C	select CEVT_R4K
9471c773ea4SJayachandran C	select CSRC_R4K
94867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
949b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9501c773ea4SJayachandran C	select SYNC_R4K
9511c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
9522f6528e1SJayachandran C	select USE_OF
9538f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9548f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9551c773ea4SJayachandran C	help
9561c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
9571c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
9581c773ea4SJayachandran C
9599bc463beSDavid Daneyconfig MIPS_PARAVIRT
9609bc463beSDavid Daney	bool "Para-Virtualized guest system"
9619bc463beSDavid Daney	select CEVT_R4K
9629bc463beSDavid Daney	select CSRC_R4K
9639bc463beSDavid Daney	select DMA_COHERENT
9649bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
9659bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
9669bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
9679bc463beSDavid Daney	select SYS_SUPPORTS_SMP
9689bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
9699bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
9709bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
9719bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
9729bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
9739bc463beSDavid Daney	select HW_HAS_PCI
9749bc463beSDavid Daney	select SWAP_IO_SPACE
9759bc463beSDavid Daney	help
9769bc463beSDavid Daney	  This option supports guest running under ????
9779bc463beSDavid Daney
9781da177e4SLinus Torvaldsendchoice
9791da177e4SLinus Torvalds
980e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
9813b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
982d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
983a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
984e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
9858945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig"
9865e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
9875ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
9888ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
9891f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
9902572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig"
991af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig"
9920f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
993ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
99429c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
99538b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
99622b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
9975e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
998a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
99930ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig"
100030ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig"
10017f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
1002ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
10039937f5ffSZubair Lutfullah Kakakhelsource "arch/mips/xilfpga/Kconfig"
100438b18f72SRalf Baechle
10055e83d430SRalf Baechleendmenu
10065e83d430SRalf Baechle
10071da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
10081da177e4SLinus Torvalds	bool
10091da177e4SLinus Torvalds	default y
10101da177e4SLinus Torvalds
10111da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
10121da177e4SLinus Torvalds	bool
10131da177e4SLinus Torvalds
1014f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
1015f0d1b0b3SDavid Howells	bool
1016f0d1b0b3SDavid Howells	default n
1017f0d1b0b3SDavid Howells
1018f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
1019f0d1b0b3SDavid Howells	bool
1020f0d1b0b3SDavid Howells	default n
1021f0d1b0b3SDavid Howells
10223c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
10233c9ee7efSAkinobu Mita	bool
10243c9ee7efSAkinobu Mita	default y
10253c9ee7efSAkinobu Mita
10261da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
10271da177e4SLinus Torvalds	bool
10281da177e4SLinus Torvalds	default y
10291da177e4SLinus Torvalds
1030ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
10311cc89038SAtsushi Nemoto	bool
10321cc89038SAtsushi Nemoto	default y
10331cc89038SAtsushi Nemoto
10341da177e4SLinus Torvalds#
10351da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
10361da177e4SLinus Torvalds#
10370e2794b0SRalf Baechleconfig FW_ARC
10381da177e4SLinus Torvalds	bool
10391da177e4SLinus Torvalds
104061ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
104161ed242dSRalf Baechle	bool
104261ed242dSRalf Baechle
10439267a30dSMarc St-Jeanconfig BOOT_RAW
10449267a30dSMarc St-Jean	bool
10459267a30dSMarc St-Jean
1046217dd11eSRalf Baechleconfig CEVT_BCM1480
1047217dd11eSRalf Baechle	bool
1048217dd11eSRalf Baechle
10496457d9fcSYoichi Yuasaconfig CEVT_DS1287
10506457d9fcSYoichi Yuasa	bool
10516457d9fcSYoichi Yuasa
10521097c6acSYoichi Yuasaconfig CEVT_GT641XX
10531097c6acSYoichi Yuasa	bool
10541097c6acSYoichi Yuasa
105542f77542SRalf Baechleconfig CEVT_R4K
105642f77542SRalf Baechle	bool
105742f77542SRalf Baechle
1058217dd11eSRalf Baechleconfig CEVT_SB1250
1059217dd11eSRalf Baechle	bool
1060217dd11eSRalf Baechle
1061229f773eSAtsushi Nemotoconfig CEVT_TXX9
1062229f773eSAtsushi Nemoto	bool
1063229f773eSAtsushi Nemoto
1064217dd11eSRalf Baechleconfig CSRC_BCM1480
1065217dd11eSRalf Baechle	bool
1066217dd11eSRalf Baechle
10674247417dSYoichi Yuasaconfig CSRC_IOASIC
10684247417dSYoichi Yuasa	bool
10694247417dSYoichi Yuasa
1070940f6b48SRalf Baechleconfig CSRC_R4K
1071940f6b48SRalf Baechle	bool
1072940f6b48SRalf Baechle
1073217dd11eSRalf Baechleconfig CSRC_SB1250
1074217dd11eSRalf Baechle	bool
1075217dd11eSRalf Baechle
1076a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL
1077a7f4df4eSAlex Smith	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1078a7f4df4eSAlex Smith
1079a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
10807444a72eSMichael Buesch	select ARCH_REQUIRE_GPIOLIB
1081a9aec7feSAtsushi Nemoto	bool
1082a9aec7feSAtsushi Nemoto
10830e2794b0SRalf Baechleconfig FW_CFE
1084df78b5c8SAurelien Jarno	bool
1085df78b5c8SAurelien Jarno
10864bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
108734adb28dSRalf Baechle	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
10884bafad92SFUJITA Tomonori
108940e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES
109040e084a5SRalf Baechle	bool
109140e084a5SRalf Baechle
1092885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1093885014bcSFelix Fietkau	select DMA_NONCOHERENT
1094885014bcSFelix Fietkau	bool
1095885014bcSFelix Fietkau
10961da177e4SLinus Torvaldsconfig DMA_COHERENT
10971da177e4SLinus Torvalds	bool
10981da177e4SLinus Torvalds
10991da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
11001da177e4SLinus Torvalds	bool
1101e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
11024ce588cdSRalf Baechle
1103e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
11044ce588cdSRalf Baechle	bool
11051da177e4SLinus Torvalds
110636a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
11071da177e4SLinus Torvalds	bool
11081da177e4SLinus Torvalds
1109dbb74540SRalf Baechleconfig HOTPLUG_CPU
11101b2bc75cSRalf Baechle	bool "Support for hot-pluggable CPUs"
111140b31360SStephen Rothwell	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
11121b2bc75cSRalf Baechle	help
11131b2bc75cSRalf Baechle	  Say Y here to allow turning CPUs off and on. CPUs can be
11141b2bc75cSRalf Baechle	  controlled through /sys/devices/system/cpu.
11151b2bc75cSRalf Baechle	  (Note: power management support will enable this option
11161b2bc75cSRalf Baechle	    automatically on SMP systems. )
11171b2bc75cSRalf Baechle	  Say N if you want to disable CPU hotplug.
11181b2bc75cSRalf Baechle
11191b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1120dbb74540SRalf Baechle	bool
1121dbb74540SRalf Baechle
11221da177e4SLinus Torvaldsconfig MIPS_BONITO64
11231da177e4SLinus Torvalds	bool
11241da177e4SLinus Torvalds
11251da177e4SLinus Torvaldsconfig MIPS_MSC
11261da177e4SLinus Torvalds	bool
11271da177e4SLinus Torvalds
11281f21d2bdSBrian Murphyconfig MIPS_NILE4
11291f21d2bdSBrian Murphy	bool
11301f21d2bdSBrian Murphy
113139b8d525SRalf Baechleconfig SYNC_R4K
113239b8d525SRalf Baechle	bool
113339b8d525SRalf Baechle
1134487d70d0SGabor Juhosconfig MIPS_MACHINE
1135487d70d0SGabor Juhos	def_bool n
1136487d70d0SGabor Juhos
1137ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1138d388d685SMaciej W. Rozycki	def_bool n
1139d388d685SMaciej W. Rozycki
11404e0748f5SMarkos Chandrasconfig GENERIC_CSUM
11414e0748f5SMarkos Chandras	bool
11424e0748f5SMarkos Chandras
11438313da30SRalf Baechleconfig GENERIC_ISA_DMA
11448313da30SRalf Baechle	bool
11458313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1146a35bee8aSNamhyung Kim	select ISA_DMA_API
11478313da30SRalf Baechle
1148aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1149aa414dffSRalf Baechle	bool
11508313da30SRalf Baechle	select GENERIC_ISA_DMA
1151aa414dffSRalf Baechle
1152a35bee8aSNamhyung Kimconfig ISA_DMA_API
1153a35bee8aSNamhyung Kim	bool
1154a35bee8aSNamhyung Kim
1155465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1156465aaed0SDavid Daney	bool
1157465aaed0SDavid Daney
11585e83d430SRalf Baechle#
11596b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
11605e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
11615e83d430SRalf Baechle# choice statement should be more obvious to the user.
11625e83d430SRalf Baechle#
11635e83d430SRalf Baechlechoice
11646b2aac42SMasanari Iida	prompt "Endianness selection"
11651da177e4SLinus Torvalds	help
11661da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
11675e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
11683cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
11695e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
11703dde6ad8SDavid Sterba	  one or the other endianness.
11715e83d430SRalf Baechle
11725e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
11735e83d430SRalf Baechle	bool "Big endian"
11745e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
11755e83d430SRalf Baechle
11765e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
11775e83d430SRalf Baechle	bool "Little endian"
11785e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
11795e83d430SRalf Baechle
11805e83d430SRalf Baechleendchoice
11815e83d430SRalf Baechle
118222b0763aSDavid Daneyconfig EXPORT_UASM
118322b0763aSDavid Daney	bool
118422b0763aSDavid Daney
11852116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
11862116245eSRalf Baechle	bool
11872116245eSRalf Baechle
11885e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
11895e83d430SRalf Baechle	bool
11905e83d430SRalf Baechle
11915e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
11925e83d430SRalf Baechle	bool
11931da177e4SLinus Torvalds
11949cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
11959cffd154SDavid Daney	bool
11969cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
11979cffd154SDavid Daney	default y
11989cffd154SDavid Daney
1199aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1200aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1201aa1762f4SDavid Daney
12021da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
12031da177e4SLinus Torvalds	bool
12041da177e4SLinus Torvalds
12059267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
12069267a30dSMarc St-Jean	bool
12079267a30dSMarc St-Jean
12089267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
12099267a30dSMarc St-Jean	bool
12109267a30dSMarc St-Jean
12118420fd00SAtsushi Nemotoconfig IRQ_TXX9
12128420fd00SAtsushi Nemoto	bool
12138420fd00SAtsushi Nemoto
1214d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1215d5ab1a69SYoichi Yuasa	bool
1216d5ab1a69SYoichi Yuasa
1217252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
12181da177e4SLinus Torvalds	bool
12191da177e4SLinus Torvalds
12209267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
12219267a30dSMarc St-Jean	bool
12229267a30dSMarc St-Jean
1223a83860c2SRalf Baechleconfig SOC_EMMA2RH
1224a83860c2SRalf Baechle	bool
1225a83860c2SRalf Baechle	select CEVT_R4K
1226a83860c2SRalf Baechle	select CSRC_R4K
1227a83860c2SRalf Baechle	select DMA_NONCOHERENT
122867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1229a83860c2SRalf Baechle	select SWAP_IO_SPACE
1230a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1231a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1232a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1233a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1234a83860c2SRalf Baechle
1235edb6310aSDaniel Lairdconfig SOC_PNX833X
1236edb6310aSDaniel Laird	bool
1237edb6310aSDaniel Laird	select CEVT_R4K
1238edb6310aSDaniel Laird	select CSRC_R4K
123967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1240edb6310aSDaniel Laird	select DMA_NONCOHERENT
1241edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1242edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1243edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1244edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1245377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1246edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1247edb6310aSDaniel Laird
1248edb6310aSDaniel Lairdconfig SOC_PNX8335
1249edb6310aSDaniel Laird	bool
1250edb6310aSDaniel Laird	select SOC_PNX833X
1251edb6310aSDaniel Laird
1252a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1253a7e07b1aSMarkos Chandras	bool
1254a7e07b1aSMarkos Chandras
12551da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
12561da177e4SLinus Torvalds	bool
12571da177e4SLinus Torvalds
1258e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1259e2defae5SThomas Bogendoerfer	bool
1260e2defae5SThomas Bogendoerfer
12615b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
12625b438c44SThomas Bogendoerfer	bool
12635b438c44SThomas Bogendoerfer
1264e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1265e2defae5SThomas Bogendoerfer	bool
1266e2defae5SThomas Bogendoerfer
1267e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1268e2defae5SThomas Bogendoerfer	bool
1269e2defae5SThomas Bogendoerfer
1270e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1271e2defae5SThomas Bogendoerfer	bool
1272e2defae5SThomas Bogendoerfer
1273e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1274e2defae5SThomas Bogendoerfer	bool
1275e2defae5SThomas Bogendoerfer
1276e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1277e2defae5SThomas Bogendoerfer	bool
1278e2defae5SThomas Bogendoerfer
12790e2794b0SRalf Baechleconfig FW_ARC32
12805e83d430SRalf Baechle	bool
12815e83d430SRalf Baechle
1282aaa9fad3SPaul Bolleconfig FW_SNIPROM
1283231a35d3SThomas Bogendoerfer	bool
1284231a35d3SThomas Bogendoerfer
12851da177e4SLinus Torvaldsconfig BOOT_ELF32
12861da177e4SLinus Torvalds	bool
12871da177e4SLinus Torvalds
1288930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1289930beb5aSFlorian Fainelli	bool
1290930beb5aSFlorian Fainelli
1291930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1292930beb5aSFlorian Fainelli	bool
1293930beb5aSFlorian Fainelli
1294930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1295930beb5aSFlorian Fainelli	bool
1296930beb5aSFlorian Fainelli
1297930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1298930beb5aSFlorian Fainelli	bool
1299930beb5aSFlorian Fainelli
13001da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
13011da177e4SLinus Torvalds	int
1302a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
13035432eeb6SKevin Cernekee	default "6" if MIPS_L1_CACHE_SHIFT_6
13045432eeb6SKevin Cernekee	default "5" if MIPS_L1_CACHE_SHIFT_5
13055432eeb6SKevin Cernekee	default "4" if MIPS_L1_CACHE_SHIFT_4
13061da177e4SLinus Torvalds	default "5"
13071da177e4SLinus Torvalds
13081da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
13091da177e4SLinus Torvalds	bool
13101da177e4SLinus Torvalds
13111da177e4SLinus Torvaldsconfig ARC_CONSOLE
13121da177e4SLinus Torvalds	bool "ARC console support"
1313e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
13141da177e4SLinus Torvalds
13151da177e4SLinus Torvaldsconfig ARC_MEMORY
13161da177e4SLinus Torvalds	bool
131714b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
13181da177e4SLinus Torvalds	default y
13191da177e4SLinus Torvalds
13201da177e4SLinus Torvaldsconfig ARC_PROMLIB
13211da177e4SLinus Torvalds	bool
1322e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
13231da177e4SLinus Torvalds	default y
13241da177e4SLinus Torvalds
13250e2794b0SRalf Baechleconfig FW_ARC64
13261da177e4SLinus Torvalds	bool
13271da177e4SLinus Torvalds
13281da177e4SLinus Torvaldsconfig BOOT_ELF64
13291da177e4SLinus Torvalds	bool
13301da177e4SLinus Torvalds
13311da177e4SLinus Torvaldsmenu "CPU selection"
13321da177e4SLinus Torvalds
13331da177e4SLinus Torvaldschoice
13341da177e4SLinus Torvalds	prompt "CPU type"
13351da177e4SLinus Torvalds	default CPU_R4X00
13361da177e4SLinus Torvalds
13370e476d91SHuacai Chenconfig CPU_LOONGSON3
13380e476d91SHuacai Chen	bool "Loongson 3 CPU"
13390e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
13400e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
13410e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
13420e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
13430e476d91SHuacai Chen	select WEAK_ORDERING
13440e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
1345cbfb3ea7SHuacai Chen	select ARCH_REQUIRE_GPIOLIB
13460e476d91SHuacai Chen	help
13470e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
13480e476d91SHuacai Chen		set with many extensions.
13490e476d91SHuacai Chen
13503702bba5SWu Zhangjinconfig CPU_LOONGSON2E
13513702bba5SWu Zhangjin	bool "Loongson 2E"
13523702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
13533702bba5SWu Zhangjin	select CPU_LOONGSON2
13542a21c730SFuxin Zhang	help
13552a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
13562a21c730SFuxin Zhang	  with many extensions.
13572a21c730SFuxin Zhang
135825985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
13596f7a251aSWu Zhangjin	  bonito64.
13606f7a251aSWu Zhangjin
13616f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
13626f7a251aSWu Zhangjin	bool "Loongson 2F"
13636f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
13646f7a251aSWu Zhangjin	select CPU_LOONGSON2
1365c197da91SArnaud Patard	select ARCH_REQUIRE_GPIOLIB
13666f7a251aSWu Zhangjin	help
13676f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
13686f7a251aSWu Zhangjin	  with many extensions.
13696f7a251aSWu Zhangjin
13706f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
13716f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
13726f7a251aSWu Zhangjin	  Loongson2E.
13736f7a251aSWu Zhangjin
1374ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1375ca585cf9SKelvin Cheung	bool "Loongson 1B"
1376ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1377ca585cf9SKelvin Cheung	select CPU_LOONGSON1
1378ca585cf9SKelvin Cheung	help
1379ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1380ca585cf9SKelvin Cheung	  release 2 instruction set.
1381ca585cf9SKelvin Cheung
13826e760c8dSRalf Baechleconfig CPU_MIPS32_R1
13836e760c8dSRalf Baechle	bool "MIPS32 Release 1"
13847cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
13856e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1386797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1387ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13886e760c8dSRalf Baechle	help
13895e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13901e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13911e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13921e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
13931e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13941e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
13951e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
13961e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
13971e5f1caaSRalf Baechle	  performance.
13981e5f1caaSRalf Baechle
13991e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
14001e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
14017cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
14021e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1403797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1404ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1405a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14062235a54dSSanjay Lal	select HAVE_KVM
14071e5f1caaSRalf Baechle	help
14085e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14096e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
14106e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
14116e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14126e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
14131da177e4SLinus Torvalds
14147fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
1415674d10e2SMarkos Chandras	bool "MIPS32 Release 6"
14167fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
14177fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14187fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14197fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14207fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14214e0748f5SMarkos Chandras	select GENERIC_CSUM
14227fd08ca5SLeonid Yegoshin	select HAVE_KVM
14237fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
14247fd08ca5SLeonid Yegoshin	help
14257fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14267fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
14277fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
14287fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
14297fd08ca5SLeonid Yegoshin
14306e760c8dSRalf Baechleconfig CPU_MIPS64_R1
14316e760c8dSRalf Baechle	bool "MIPS64 Release 1"
14327cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1433797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1434ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1435ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1436ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14379cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
14386e760c8dSRalf Baechle	help
14396e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
14406e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14416e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14426e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14436e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14441e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
14451e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
14461e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
14471e5f1caaSRalf Baechle	  performance.
14481e5f1caaSRalf Baechle
14491e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
14501e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
14517cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1452797798c1SRalf Baechle	select CPU_HAS_PREFETCH
14531e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
14541e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1455ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14569cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1457a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14581e5f1caaSRalf Baechle	help
14591e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14601e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14611e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14621e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
14631e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14641da177e4SLinus Torvalds
14657fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
1466674d10e2SMarkos Chandras	bool "MIPS64 Release 6"
14677fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
14687fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14697fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14707fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
14717fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14727fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14734e0748f5SMarkos Chandras	select GENERIC_CSUM
14744e9d324dSPaul Burton	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
14757fd08ca5SLeonid Yegoshin	help
14767fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14777fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
14787fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
14797fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
14807fd08ca5SLeonid Yegoshin
14811da177e4SLinus Torvaldsconfig CPU_R3000
14821da177e4SLinus Torvalds	bool "R3000"
14837cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1484f7062ddbSRalf Baechle	select CPU_HAS_WB
1485ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1486797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14871da177e4SLinus Torvalds	help
14881da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
14891da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
14901da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
14911da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
14921da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
14931da177e4SLinus Torvalds	  try to recompile with R3000.
14941da177e4SLinus Torvalds
14951da177e4SLinus Torvaldsconfig CPU_TX39XX
14961da177e4SLinus Torvalds	bool "R39XX"
14977cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1498ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
14991da177e4SLinus Torvalds
15001da177e4SLinus Torvaldsconfig CPU_VR41XX
15011da177e4SLinus Torvalds	bool "R41xx"
15027cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1503ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1504ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15051da177e4SLinus Torvalds	help
15065e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
15071da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
15081da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
15091da177e4SLinus Torvalds	  processor or vice versa.
15101da177e4SLinus Torvalds
15111da177e4SLinus Torvaldsconfig CPU_R4300
15121da177e4SLinus Torvalds	bool "R4300"
15137cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1514ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1515ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15161da177e4SLinus Torvalds	help
15171da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
15181da177e4SLinus Torvalds
15191da177e4SLinus Torvaldsconfig CPU_R4X00
15201da177e4SLinus Torvalds	bool "R4x00"
15217cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1522ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1523ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1524970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15251da177e4SLinus Torvalds	help
15261da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
15271da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
15281da177e4SLinus Torvalds
15291da177e4SLinus Torvaldsconfig CPU_TX49XX
15301da177e4SLinus Torvalds	bool "R49XX"
15317cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1532de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1533ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1534ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1535970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15361da177e4SLinus Torvalds
15371da177e4SLinus Torvaldsconfig CPU_R5000
15381da177e4SLinus Torvalds	bool "R5000"
15397cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1540ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1541ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1542970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15431da177e4SLinus Torvalds	help
15441da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
15451da177e4SLinus Torvalds
15461da177e4SLinus Torvaldsconfig CPU_R5432
15471da177e4SLinus Torvalds	bool "R5432"
15487cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
15495e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
15505e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1551970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15521da177e4SLinus Torvalds
1553542c1020SShinya Kuribayashiconfig CPU_R5500
1554542c1020SShinya Kuribayashi	bool "R5500"
1555542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1556542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1557542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
15589cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1559542c1020SShinya Kuribayashi	help
1560542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1561542c1020SShinya Kuribayashi	  instruction set.
1562542c1020SShinya Kuribayashi
15631da177e4SLinus Torvaldsconfig CPU_R6000
15641da177e4SLinus Torvalds	bool "R6000"
15657cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1566ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
15671da177e4SLinus Torvalds	help
15681da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1569c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
15701da177e4SLinus Torvalds
15711da177e4SLinus Torvaldsconfig CPU_NEVADA
15721da177e4SLinus Torvalds	bool "RM52xx"
15737cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1574ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1575ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1576970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15771da177e4SLinus Torvalds	help
15781da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
15791da177e4SLinus Torvalds
15801da177e4SLinus Torvaldsconfig CPU_R8000
15811da177e4SLinus Torvalds	bool "R8000"
15827cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
15835e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1584ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15851da177e4SLinus Torvalds	help
15861da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
15871da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
15881da177e4SLinus Torvalds
15891da177e4SLinus Torvaldsconfig CPU_R10000
15901da177e4SLinus Torvalds	bool "R10000"
15917cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
15925e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1593ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1594ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1595797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1596970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15971da177e4SLinus Torvalds	help
15981da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
15991da177e4SLinus Torvalds
16001da177e4SLinus Torvaldsconfig CPU_RM7000
16011da177e4SLinus Torvalds	bool "RM7000"
16027cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
16035e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1604ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1605ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1606797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1607970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16081da177e4SLinus Torvalds
16091da177e4SLinus Torvaldsconfig CPU_SB1
16101da177e4SLinus Torvalds	bool "SB1"
16117cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1612ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1613ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1614797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1615970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16160004a9dfSRalf Baechle	select WEAK_ORDERING
16171da177e4SLinus Torvalds
1618a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1619a86c7f72SDavid Daney	bool "Cavium Octeon processor"
16205e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1621a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1622a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1623a86c7f72SDavid Daney	select WEAK_ORDERING
1624a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
16259cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1626df115f3eSBen Hutchings	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1627df115f3eSBen Hutchings	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1628930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
1629a86c7f72SDavid Daney	help
1630a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1631a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1632a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1633a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1634a86c7f72SDavid Daney
1635cd746249SJonas Gorskiconfig CPU_BMIPS
1636cd746249SJonas Gorski	bool "Broadcom BMIPS"
1637cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1638cd746249SJonas Gorski	select CPU_MIPS32
1639fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1640cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1641cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1642cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1643cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1644cd746249SJonas Gorski	select DMA_NONCOHERENT
164567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1646cd746249SJonas Gorski	select SWAP_IO_SPACE
1647cd746249SJonas Gorski	select WEAK_ORDERING
1648c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
164969aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1650c1c0c461SKevin Cernekee	help
1651fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1652c1c0c461SKevin Cernekee
16537f058e85SJayachandran Cconfig CPU_XLR
16547f058e85SJayachandran C	bool "Netlogic XLR SoC"
16557f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
16567f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16577f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16587f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1659970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16607f058e85SJayachandran C	select WEAK_ORDERING
16617f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16627f058e85SJayachandran C	help
16637f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
16641c773ea4SJayachandran C
16651c773ea4SJayachandran Cconfig CPU_XLP
16661c773ea4SJayachandran C	bool "Netlogic XLP SoC"
16671c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
16681c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16691c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16701c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
16711c773ea4SJayachandran C	select WEAK_ORDERING
16721c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16731c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1674d6504846SJayachandran C	select CPU_MIPSR2
1675ddba6833SPrem Mallappa	select CPU_SUPPORTS_HUGEPAGES
16761c773ea4SJayachandran C	help
16771c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
16781da177e4SLinus Torvaldsendchoice
16791da177e4SLinus Torvalds
1680a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1681a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1682a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
16837fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1684a6e18781SLeonid Yegoshin	help
1685a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1686a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1687a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1688a6e18781SLeonid Yegoshin
1689a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1690a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1691a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1692a6e18781SLeonid Yegoshin	select EVA
1693a6e18781SLeonid Yegoshin	default y
1694a6e18781SLeonid Yegoshin	help
1695a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1696a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1697a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1698a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1699a6e18781SLeonid Yegoshin
1700c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES
1701c5b36783SSteven J. Hill	bool "MIPS32 Release 5 Features"
1702c5b36783SSteven J. Hill	depends on SYS_HAS_CPU_MIPS32_R5
1703c5b36783SSteven J. Hill	depends on CPU_MIPS32_R2
1704c5b36783SSteven J. Hill	help
1705c5b36783SSteven J. Hill	  Choose this option to build a kernel for release 2 or later of the
1706c5b36783SSteven J. Hill	  MIPS32 architecture including features from release 5 such as
1707c5b36783SSteven J. Hill	  support for Extended Physical Addressing (XPA).
1708c5b36783SSteven J. Hill
1709c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA
1710c5b36783SSteven J. Hill	bool "Extended Physical Addressing (XPA)"
1711c5b36783SSteven J. Hill	depends on CPU_MIPS32_R5_FEATURES
1712c5b36783SSteven J. Hill	depends on !EVA
1713c5b36783SSteven J. Hill	depends on !PAGE_SIZE_4KB
1714c5b36783SSteven J. Hill	depends on SYS_SUPPORTS_HIGHMEM
1715c5b36783SSteven J. Hill	select XPA
1716c5b36783SSteven J. Hill	select HIGHMEM
1717c5b36783SSteven J. Hill	select ARCH_PHYS_ADDR_T_64BIT
1718c5b36783SSteven J. Hill	default n
1719c5b36783SSteven J. Hill	help
1720c5b36783SSteven J. Hill	  Choose this option if you want to enable the Extended Physical
1721c5b36783SSteven J. Hill	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1722c5b36783SSteven J. Hill	  benefit is to increase physical addressing equal to or greater
1723c5b36783SSteven J. Hill	  than 40 bits. Note that this has the side effect of turning on
1724c5b36783SSteven J. Hill	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1725c5b36783SSteven J. Hill	  If unsure, say 'N' here.
1726c5b36783SSteven J. Hill
1727622844bfSWu Zhangjinif CPU_LOONGSON2F
1728622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1729622844bfSWu Zhangjin	bool
1730622844bfSWu Zhangjin
1731622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1732622844bfSWu Zhangjin	bool
1733622844bfSWu Zhangjin
1734622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1735622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1736622844bfSWu Zhangjin	default y
1737622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1738622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1739622844bfSWu Zhangjin	help
1740622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1741622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1742622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1743622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1744622844bfSWu Zhangjin
1745622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1746622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1747622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1748622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1749622844bfSWu Zhangjin	  systems.
1750622844bfSWu Zhangjin
1751622844bfSWu Zhangjin	  If unsure, please say Y.
1752622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1753622844bfSWu Zhangjin
17541b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
17551b93b3c3SWu Zhangjin	bool
17561b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
17571b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
175831c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
17591b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1760fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
17614e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
17621b93b3c3SWu Zhangjin
17631b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
17641b93b3c3SWu Zhangjin	bool
17651b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
17661b93b3c3SWu Zhangjin
1767dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM
1768dbb98314SAlban Bedel	bool
1769dbb98314SAlban Bedel	select SYS_SUPPORTS_ZBOOT
1770dbb98314SAlban Bedel
17713702bba5SWu Zhangjinconfig CPU_LOONGSON2
17723702bba5SWu Zhangjin	bool
17733702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
17743702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
17753702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1776970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17773702bba5SWu Zhangjin
1778ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1779ca585cf9SKelvin Cheung	bool
1780ca585cf9SKelvin Cheung	select CPU_MIPS32
1781ca585cf9SKelvin Cheung	select CPU_MIPSR2
1782ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1783ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1784ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1785f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1786ca585cf9SKelvin Cheung
1787fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
178804fa8bf7SJonas Gorski	select SMP_UP if SMP
17891bbb6c1bSKevin Cernekee	bool
1790cd746249SJonas Gorski
1791cd746249SJonas Gorskiconfig CPU_BMIPS4350
1792cd746249SJonas Gorski	bool
1793cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1794cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1795cd746249SJonas Gorski
1796cd746249SJonas Gorskiconfig CPU_BMIPS4380
1797cd746249SJonas Gorski	bool
1798bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1799cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1800cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1801cd746249SJonas Gorski
1802cd746249SJonas Gorskiconfig CPU_BMIPS5000
1803cd746249SJonas Gorski	bool
1804cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1805bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1806cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1807cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
18081bbb6c1bSKevin Cernekee
18090e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
18100e476d91SHuacai Chen	bool
18110e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
18120e476d91SHuacai Chen
18133702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
18142a21c730SFuxin Zhang	bool
18152a21c730SFuxin Zhang
18166f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
18176f7a251aSWu Zhangjin	bool
181855045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
181955045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
182022f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
18216f7a251aSWu Zhangjin
1822ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1823ca585cf9SKelvin Cheung	bool
1824ca585cf9SKelvin Cheung
18257cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
18267cf8053bSRalf Baechle	bool
18277cf8053bSRalf Baechle
18287cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
18297cf8053bSRalf Baechle	bool
18307cf8053bSRalf Baechle
1831a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1832a6e18781SLeonid Yegoshin	bool
1833a6e18781SLeonid Yegoshin
1834c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5
1835c5b36783SSteven J. Hill	bool
1836c5b36783SSteven J. Hill
18377fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
18387fd08ca5SLeonid Yegoshin	bool
18397fd08ca5SLeonid Yegoshin
18407cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
18417cf8053bSRalf Baechle	bool
18427cf8053bSRalf Baechle
18437cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
18447cf8053bSRalf Baechle	bool
18457cf8053bSRalf Baechle
18467fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
18477fd08ca5SLeonid Yegoshin	bool
18487fd08ca5SLeonid Yegoshin
18497cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
18507cf8053bSRalf Baechle	bool
18517cf8053bSRalf Baechle
18527cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
18537cf8053bSRalf Baechle	bool
18547cf8053bSRalf Baechle
18557cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
18567cf8053bSRalf Baechle	bool
18577cf8053bSRalf Baechle
18587cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
18597cf8053bSRalf Baechle	bool
18607cf8053bSRalf Baechle
18617cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
18627cf8053bSRalf Baechle	bool
18637cf8053bSRalf Baechle
18647cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
18657cf8053bSRalf Baechle	bool
18667cf8053bSRalf Baechle
18677cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
18687cf8053bSRalf Baechle	bool
18697cf8053bSRalf Baechle
18707cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
18717cf8053bSRalf Baechle	bool
18727cf8053bSRalf Baechle
1873542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1874542c1020SShinya Kuribayashi	bool
1875542c1020SShinya Kuribayashi
18767cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
18777cf8053bSRalf Baechle	bool
18787cf8053bSRalf Baechle
18797cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
18807cf8053bSRalf Baechle	bool
18817cf8053bSRalf Baechle
18827cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
18837cf8053bSRalf Baechle	bool
18847cf8053bSRalf Baechle
18857cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
18867cf8053bSRalf Baechle	bool
18877cf8053bSRalf Baechle
18887cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
18897cf8053bSRalf Baechle	bool
18907cf8053bSRalf Baechle
18917cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
18927cf8053bSRalf Baechle	bool
18937cf8053bSRalf Baechle
18945e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
18955e683389SDavid Daney	bool
18965e683389SDavid Daney
1897cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1898c1c0c461SKevin Cernekee	bool
1899c1c0c461SKevin Cernekee
1900fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1901c1c0c461SKevin Cernekee	bool
1902cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1903c1c0c461SKevin Cernekee
1904c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1905c1c0c461SKevin Cernekee	bool
1906cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1907c1c0c461SKevin Cernekee
1908c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1909c1c0c461SKevin Cernekee	bool
1910cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1911c1c0c461SKevin Cernekee
1912c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1913c1c0c461SKevin Cernekee	bool
1914cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1915c1c0c461SKevin Cernekee
19167f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
19177f058e85SJayachandran C	bool
19187f058e85SJayachandran C
19191c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
19201c773ea4SJayachandran C	bool
19211c773ea4SJayachandran C
1922b6911bbaSPaul Burtonconfig MIPS_MALTA_PM
1923b6911bbaSPaul Burton	depends on MIPS_MALTA
1924b6911bbaSPaul Burton	depends on PCI
1925b6911bbaSPaul Burton	bool
1926b6911bbaSPaul Burton	default y
1927b6911bbaSPaul Burton
192817099b11SRalf Baechle#
192917099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
193017099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
193117099b11SRalf Baechle#
19320004a9dfSRalf Baechleconfig WEAK_ORDERING
19330004a9dfSRalf Baechle	bool
193417099b11SRalf Baechle
193517099b11SRalf Baechle#
193617099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
193717099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
193817099b11SRalf Baechle#
193917099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
194017099b11SRalf Baechle	bool
19415e83d430SRalf Baechleendmenu
19425e83d430SRalf Baechle
19435e83d430SRalf Baechle#
19445e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
19455e83d430SRalf Baechle#
19465e83d430SRalf Baechleconfig CPU_MIPS32
19475e83d430SRalf Baechle	bool
19487fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
19495e83d430SRalf Baechle
19505e83d430SRalf Baechleconfig CPU_MIPS64
19515e83d430SRalf Baechle	bool
19527fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
19535e83d430SRalf Baechle
19545e83d430SRalf Baechle#
1955c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
19565e83d430SRalf Baechle#
19575e83d430SRalf Baechleconfig CPU_MIPSR1
19585e83d430SRalf Baechle	bool
19595e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
19605e83d430SRalf Baechle
19615e83d430SRalf Baechleconfig CPU_MIPSR2
19625e83d430SRalf Baechle	bool
1963a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1964a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19655e83d430SRalf Baechle
19667fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
19677fd08ca5SLeonid Yegoshin	bool
19687fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1969a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19705e83d430SRalf Baechle
1971a6e18781SLeonid Yegoshinconfig EVA
1972a6e18781SLeonid Yegoshin	bool
1973a6e18781SLeonid Yegoshin
1974c5b36783SSteven J. Hillconfig XPA
1975c5b36783SSteven J. Hill	bool
1976c5b36783SSteven J. Hill
19775e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
19785e83d430SRalf Baechle	bool
19795e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
19805e83d430SRalf Baechle	bool
19815e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
19825e83d430SRalf Baechle	bool
19835e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
19845e83d430SRalf Baechle	bool
198555045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
198655045ff5SWu Zhangjin	bool
198755045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
198855045ff5SWu Zhangjin	bool
19899cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
19909cffd154SDavid Daney	bool
199122f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
199222f1fdfdSWu Zhangjin	bool
199382622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
199482622284SDavid Daney	bool
1995d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
19965e83d430SRalf Baechle
19978192c9eaSDavid Daney#
19988192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
19998192c9eaSDavid Daney#
20008192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
20018192c9eaSDavid Daney       bool
2002*679eb637SJames Hogan       default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
20038192c9eaSDavid Daney
20045e83d430SRalf Baechlemenu "Kernel type"
20055e83d430SRalf Baechle
20065e83d430SRalf Baechlechoice
20075e83d430SRalf Baechle	prompt "Kernel code model"
20085e83d430SRalf Baechle	help
20095e83d430SRalf Baechle	  You should only select this option if you have a workload that
20105e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
20115e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
20125e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
20135e83d430SRalf Baechle
20145e83d430SRalf Baechleconfig 32BIT
20155e83d430SRalf Baechle	bool "32-bit kernel"
20165e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
20175e83d430SRalf Baechle	select TRAD_SIGNALS
20185e83d430SRalf Baechle	help
20195e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
2020f17c4ca3SRalf Baechle
20215e83d430SRalf Baechleconfig 64BIT
20225e83d430SRalf Baechle	bool "64-bit kernel"
20235e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
20245e83d430SRalf Baechle	help
20255e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
20265e83d430SRalf Baechle
20275e83d430SRalf Baechleendchoice
20285e83d430SRalf Baechle
20292235a54dSSanjay Lalconfig KVM_GUEST
20302235a54dSSanjay Lal	bool "KVM Guest Kernel"
2031f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
20322235a54dSSanjay Lal	help
2033caa1faa7SJames Hogan	  Select this option if building a guest kernel for KVM (Trap & Emulate)
2034caa1faa7SJames Hogan	  mode.
20352235a54dSSanjay Lal
2036eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
2037eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
20382235a54dSSanjay Lal	depends on KVM_GUEST
2039eda3d33cSJames Hogan	default 100
20402235a54dSSanjay Lal	help
2041eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
2042eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
2043eda3d33cSJames Hogan	  timer frequency is specified directly.
20442235a54dSSanjay Lal
20451da177e4SLinus Torvaldschoice
20461da177e4SLinus Torvalds	prompt "Kernel page size"
20471da177e4SLinus Torvalds	default PAGE_SIZE_4KB
20481da177e4SLinus Torvalds
20491da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
20501da177e4SLinus Torvalds	bool "4kB"
20510e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
20521da177e4SLinus Torvalds	help
20531da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
20541da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
20551da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
20561da177e4SLinus Torvalds	 recommended for low memory systems.
20571da177e4SLinus Torvalds
20581da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
20591da177e4SLinus Torvalds	bool "8kB"
20607d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
20611da177e4SLinus Torvalds	help
20621da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
20631da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
2064c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
2065c52399beSRalf Baechle	  suitable Linux distribution to support this.
20661da177e4SLinus Torvalds
20671da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
20681da177e4SLinus Torvalds	bool "16kB"
2069714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
20701da177e4SLinus Torvalds	help
20711da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
20721da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
2073714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
2074714bfad6SRalf Baechle	  Linux distribution to support this.
20751da177e4SLinus Torvalds
2076c52399beSRalf Baechleconfig PAGE_SIZE_32KB
2077c52399beSRalf Baechle	bool "32kB"
2078c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
2079c52399beSRalf Baechle	help
2080c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
2081c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
2082c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
2083c52399beSRalf Baechle	  distribution to support this.
2084c52399beSRalf Baechle
20851da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
20861da177e4SLinus Torvalds	bool "64kB"
208774c81ecdSRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
20881da177e4SLinus Torvalds	help
20891da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
20901da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
20911da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
2092714bfad6SRalf Baechle	  writing this option is still high experimental.
20931da177e4SLinus Torvalds
20941da177e4SLinus Torvaldsendchoice
20951da177e4SLinus Torvalds
2096c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
2097c9bace7cSDavid Daney	int "Maximum zone order"
2098e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2099e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2100e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2101e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2102e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2103e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2104c9bace7cSDavid Daney	range 11 64
2105c9bace7cSDavid Daney	default "11"
2106c9bace7cSDavid Daney	help
2107c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
2108c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
2109c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
2110c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2111c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2112c9bace7cSDavid Daney	  increase this value.
2113c9bace7cSDavid Daney
2114c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2115c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2116c9bace7cSDavid Daney
2117c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2118c9bace7cSDavid Daney	  when choosing a value for this option.
2119c9bace7cSDavid Daney
21201da177e4SLinus Torvaldsconfig BOARD_SCACHE
21211da177e4SLinus Torvalds	bool
21221da177e4SLinus Torvalds
21231da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
21241da177e4SLinus Torvalds	bool
21251da177e4SLinus Torvalds	select BOARD_SCACHE
21261da177e4SLinus Torvalds
21279318c51aSChris Dearman#
21289318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
21299318c51aSChris Dearman#
21309318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
21319318c51aSChris Dearman	bool
21329318c51aSChris Dearman	select BOARD_SCACHE
21339318c51aSChris Dearman
21341da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
21351da177e4SLinus Torvalds	bool
21361da177e4SLinus Torvalds	select BOARD_SCACHE
21371da177e4SLinus Torvalds
21381da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
21391da177e4SLinus Torvalds	bool
21401da177e4SLinus Torvalds	select BOARD_SCACHE
21411da177e4SLinus Torvalds
21421da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
21431da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
21441da177e4SLinus Torvalds	depends on CPU_SB1
21451da177e4SLinus Torvalds	help
21461da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
21471da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
21481da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
21491da177e4SLinus Torvalds
21501da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2151c8094b53SRalf Baechle	bool
21521da177e4SLinus Torvalds
21533165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
21543165c846SFlorian Fainelli	bool
21553165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
21563165c846SFlorian Fainelli
215791405eb6SFlorian Fainelliconfig CPU_R4K_FPU
215891405eb6SFlorian Fainelli	bool
215991405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
216091405eb6SFlorian Fainelli
216162cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
216262cedc4fSFlorian Fainelli	bool
216362cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
216462cedc4fSFlorian Fainelli
216559d6ab86SRalf Baechleconfig MIPS_MT_SMP
2166a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
21675676319cSMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
216859d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2169d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2170c080faa5SSteven J. Hill	select SYNC_R4K
217159d6ab86SRalf Baechle	select MIPS_MT
217259d6ab86SRalf Baechle	select SMP
217387353d8aSRalf Baechle	select SMP_UP
2174c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2175c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2176399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
217759d6ab86SRalf Baechle	help
2178c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2179c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2180c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2181c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2182c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
218359d6ab86SRalf Baechle
2184f41ae0b2SRalf Baechleconfig MIPS_MT
2185f41ae0b2SRalf Baechle	bool
2186f41ae0b2SRalf Baechle
21870ab7aefcSRalf Baechleconfig SCHED_SMT
21880ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
21890ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
21900ab7aefcSRalf Baechle	default n
21910ab7aefcSRalf Baechle	help
21920ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
21930ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
21940ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
21950ab7aefcSRalf Baechle
21960ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
21970ab7aefcSRalf Baechle	bool
21980ab7aefcSRalf Baechle
2199f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2200f41ae0b2SRalf Baechle	bool
2201f41ae0b2SRalf Baechle
2202f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2203f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2204f088fc84SRalf Baechle	default y
2205b633648cSRalf Baechle	depends on MIPS_MT_SMP
220607cc0c9eSRalf Baechle
2207b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2208b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
2209b0a668fbSLeonid Yegoshin	depends on CPU_MIPSR6 && !SMP
2210b0a668fbSLeonid Yegoshin	default y
2211b0a668fbSLeonid Yegoshin	help
2212b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2213b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
221407edf0d4SMarkos Chandras	  default. You can enable it using the 'mipsr2emu' kernel option.
2215b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2216b0a668fbSLeonid Yegoshin	  final kernel image.
2217b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels"
2218b0a668fbSLeonid Yegoshin	depends on SMP && CPU_MIPSR6
2219b0a668fbSLeonid Yegoshin
222007cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
222107cc0c9eSRalf Baechle	bool "VPE loader support."
2222704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
222307cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
222407cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
222507cc0c9eSRalf Baechle	select MIPS_MT
222607cc0c9eSRalf Baechle	help
222707cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
222807cc0c9eSRalf Baechle	  onto another VPE and running it.
2229f088fc84SRalf Baechle
223017a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
223117a1d523SDeng-Cheng Zhu	bool
223217a1d523SDeng-Cheng Zhu	default "y"
223317a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
223417a1d523SDeng-Cheng Zhu
22351a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
22361a2a6d7eSDeng-Cheng Zhu	bool
22371a2a6d7eSDeng-Cheng Zhu	default "y"
22381a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
22391a2a6d7eSDeng-Cheng Zhu
2240e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2241e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2242e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2243e01402b1SRalf Baechle	default y
2244e01402b1SRalf Baechle	help
2245e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2246e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2247e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2248e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2249e01402b1SRalf Baechle
2250e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2251e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2252e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
22535e83d430SRalf Baechle	help
2254e01402b1SRalf Baechle
2255da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2256da615cf6SDeng-Cheng Zhu	bool
2257da615cf6SDeng-Cheng Zhu	default "y"
2258da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2259da615cf6SDeng-Cheng Zhu
22602c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
22612c973ef0SDeng-Cheng Zhu	bool
22622c973ef0SDeng-Cheng Zhu	default "y"
22632c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
22642c973ef0SDeng-Cheng Zhu
22654a16ff4cSRalf Baechleconfig MIPS_CMP
22665cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
22675676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2268b10b43baSMarkos Chandras	select SMP
2269eb9b5141STim Anderson	select SYNC_R4K
2270b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
22714a16ff4cSRalf Baechle	select WEAK_ORDERING
22724a16ff4cSRalf Baechle	default n
22734a16ff4cSRalf Baechle	help
2274044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2275044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2276044505c7SPaul Burton	  its ability to start secondary CPUs.
22774a16ff4cSRalf Baechle
22785cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
22795cac93b3SPaul Burton	  instead of this.
22805cac93b3SPaul Burton
22810ee958e1SPaul Burtonconfig MIPS_CPS
22820ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
22835676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CPS && !CPU_MIPSR6
22840ee958e1SPaul Burton	select MIPS_CM
22850ee958e1SPaul Burton	select MIPS_CPC
22861d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
22870ee958e1SPaul Burton	select SMP
22880ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
22891d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
22900ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
22910ee958e1SPaul Burton	select WEAK_ORDERING
22920ee958e1SPaul Burton	help
22930ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
22940ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
22950ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
22960ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
22970ee958e1SPaul Burton	  support is unavailable.
22980ee958e1SPaul Burton
22993179d37eSPaul Burtonconfig MIPS_CPS_PM
230039a59593SMarkos Chandras	depends on MIPS_CPS
2301a8b84677SPaul Burton	select MIPS_CPC
23023179d37eSPaul Burton	bool
23033179d37eSPaul Burton
23049f98f3ddSPaul Burtonconfig MIPS_CM
23059f98f3ddSPaul Burton	bool
23069f98f3ddSPaul Burton
23079c38cf44SPaul Burtonconfig MIPS_CPC
23089c38cf44SPaul Burton	bool
23092600990eSRalf Baechle
23101da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
23111da177e4SLinus Torvalds	bool
23121da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
23131da177e4SLinus Torvalds	default y
23141da177e4SLinus Torvalds
23151da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
23161da177e4SLinus Torvalds	bool
23171da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
23181da177e4SLinus Torvalds	default y
23191da177e4SLinus Torvalds
23202235a54dSSanjay Lal
232160ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
232234adb28dSRalf Baechle       bool
232360ec6571Spascal@pabr.org
23249e2b5372SMarkos Chandraschoice
23259e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
23269e2b5372SMarkos Chandras
23279e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
23289e2b5372SMarkos Chandras	bool "None"
23299e2b5372SMarkos Chandras	help
23309e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
23319e2b5372SMarkos Chandras
23329693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
23339693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
23349e2b5372SMarkos Chandras	bool "SmartMIPS"
23359693a853SFranck Bui-Huu	help
23369693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
23379693a853SFranck Bui-Huu	  increased security at both hardware and software level for
23389693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
23399693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
23409693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
23419693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
23429693a853SFranck Bui-Huu	  here.
23439693a853SFranck Bui-Huu
2344bce86083SSteven J. Hillconfig CPU_MICROMIPS
23457fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
23469e2b5372SMarkos Chandras	bool "microMIPS"
2347bce86083SSteven J. Hill	help
2348bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2349bce86083SSteven J. Hill	  microMIPS ISA
2350bce86083SSteven J. Hill
23519e2b5372SMarkos Chandrasendchoice
23529e2b5372SMarkos Chandras
2353a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
23540ce3417eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2355a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
23562a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2357a5e9a69eSPaul Burton	help
2358a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2359a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
23601db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
23611db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
23621db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
23631db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
23641db1af84SPaul Burton	  the size & complexity of your kernel.
2365a5e9a69eSPaul Burton
2366a5e9a69eSPaul Burton	  If unsure, say Y.
2367a5e9a69eSPaul Burton
23681da177e4SLinus Torvaldsconfig CPU_HAS_WB
2369f7062ddbSRalf Baechle	bool
2370e01402b1SRalf Baechle
2371df0ac8a4SKevin Cernekeeconfig XKS01
2372df0ac8a4SKevin Cernekee	bool
2373df0ac8a4SKevin Cernekee
2374f41ae0b2SRalf Baechle#
2375f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2376f41ae0b2SRalf Baechle#
2377e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2378f41ae0b2SRalf Baechle	bool
2379e01402b1SRalf Baechle
2380f41ae0b2SRalf Baechle#
2381f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2382f41ae0b2SRalf Baechle#
2383e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2384f41ae0b2SRalf Baechle	bool
2385e01402b1SRalf Baechle
23861da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
23871da177e4SLinus Torvalds	bool
23881da177e4SLinus Torvalds	depends on !CPU_R3000
23891da177e4SLinus Torvalds	default y
23901da177e4SLinus Torvalds
23911da177e4SLinus Torvalds#
239220d60d99SMaciej W. Rozycki# CPU non-features
239320d60d99SMaciej W. Rozycki#
239420d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
239520d60d99SMaciej W. Rozycki	bool
239620d60d99SMaciej W. Rozycki
239720d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
239820d60d99SMaciej W. Rozycki	bool
239920d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
240020d60d99SMaciej W. Rozycki
240120d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
240220d60d99SMaciej W. Rozycki	bool
240320d60d99SMaciej W. Rozycki
240420d60d99SMaciej W. Rozycki#
24051da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
24061da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
24071da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
24081da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
24091da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
24101da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
24111da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
24121da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2413797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2414797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2415797798c1SRalf Baechle#   support.
24161da177e4SLinus Torvalds#
24171da177e4SLinus Torvaldsconfig HIGHMEM
24181da177e4SLinus Torvalds	bool "High Memory Support"
2419a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2420797798c1SRalf Baechle
2421797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2422797798c1SRalf Baechle	bool
2423797798c1SRalf Baechle
2424797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2425797798c1SRalf Baechle	bool
24261da177e4SLinus Torvalds
24279693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
24289693a853SFranck Bui-Huu	bool
24299693a853SFranck Bui-Huu
2430a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2431a6a4834cSSteven J. Hill	bool
2432a6a4834cSSteven J. Hill
2433377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2434377cb1b6SRalf Baechle	bool
2435377cb1b6SRalf Baechle	help
2436377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2437377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2438377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2439377cb1b6SRalf Baechle
2440a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2441a5e9a69eSPaul Burton	bool
2442a5e9a69eSPaul Burton
2443b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2444b4819b59SYoichi Yuasa	def_bool y
2445f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2446b4819b59SYoichi Yuasa
2447d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2448d8cb4e11SRalf Baechle	bool
2449d8cb4e11SRalf Baechle	default y if SGI_IP27
2450d8cb4e11SRalf Baechle	help
24513dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2452d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2453d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2454d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2455d8cb4e11SRalf Baechle
2456b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2457b1c6cd42SAtsushi Nemoto	bool
24587de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
245931473747SAtsushi Nemoto
2460d8cb4e11SRalf Baechleconfig NUMA
2461d8cb4e11SRalf Baechle	bool "NUMA Support"
2462d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2463d8cb4e11SRalf Baechle	help
2464d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2465d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2466d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2467d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2468d8cb4e11SRalf Baechle	  disabled.
2469d8cb4e11SRalf Baechle
2470d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2471d8cb4e11SRalf Baechle	bool
2472d8cb4e11SRalf Baechle
2473c80d79d7SYasunori Gotoconfig NODES_SHIFT
2474c80d79d7SYasunori Goto	int
2475c80d79d7SYasunori Goto	default "6"
2476c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2477c80d79d7SYasunori Goto
247814f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
247914f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
2480f14ceff7SHuacai Chen	depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
248114f70012SDeng-Cheng Zhu	default y
248214f70012SDeng-Cheng Zhu	help
248314f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
248414f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
248514f70012SDeng-Cheng Zhu
2486b4819b59SYoichi Yuasasource "mm/Kconfig"
2487b4819b59SYoichi Yuasa
24881da177e4SLinus Torvaldsconfig SMP
24891da177e4SLinus Torvalds	bool "Multi-Processing support"
2490e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2491e73ea273SRalf Baechle	help
24921da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
24934a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
24944a474157SRobert Graffham	  than one CPU, say Y.
24951da177e4SLinus Torvalds
24964a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
24971da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
24981da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
24994a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
25001da177e4SLinus Torvalds	  will run faster if you say N here.
25011da177e4SLinus Torvalds
25021da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
25031da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
25041da177e4SLinus Torvalds
250503502faaSAdrian Bunk	  See also the SMP-HOWTO available at
250603502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
25071da177e4SLinus Torvalds
25081da177e4SLinus Torvalds	  If you don't know what to do here, say N.
25091da177e4SLinus Torvalds
251087353d8aSRalf Baechleconfig SMP_UP
251187353d8aSRalf Baechle	bool
251287353d8aSRalf Baechle
25134a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
25144a16ff4cSRalf Baechle	bool
25154a16ff4cSRalf Baechle
25160ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
25170ee958e1SPaul Burton	bool
25180ee958e1SPaul Burton
2519e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2520e73ea273SRalf Baechle	bool
2521e73ea273SRalf Baechle
2522130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2523130e2fb7SRalf Baechle	bool
2524130e2fb7SRalf Baechle
2525130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2526130e2fb7SRalf Baechle	bool
2527130e2fb7SRalf Baechle
2528130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2529130e2fb7SRalf Baechle	bool
2530130e2fb7SRalf Baechle
2531130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2532130e2fb7SRalf Baechle	bool
2533130e2fb7SRalf Baechle
2534130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2535130e2fb7SRalf Baechle	bool
2536130e2fb7SRalf Baechle
25371da177e4SLinus Torvaldsconfig NR_CPUS
2538a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2539a91796a9SJayachandran C	range 2 256
25401da177e4SLinus Torvalds	depends on SMP
2541130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2542130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2543130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2544130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2545130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
25461da177e4SLinus Torvalds	help
25471da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
25481da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
25491da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
255072ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
255172ede9b1SAtsushi Nemoto	  and 2 for all others.
25521da177e4SLinus Torvalds
25531da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
255472ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
255572ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
255672ede9b1SAtsushi Nemoto	  power of two.
25571da177e4SLinus Torvalds
2558399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2559399aaa25SAl Cooper	bool
2560399aaa25SAl Cooper
25611723b4a3SAtsushi Nemoto#
25621723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
25631723b4a3SAtsushi Nemoto#
25641723b4a3SAtsushi Nemoto
25651723b4a3SAtsushi Nemotochoice
25661723b4a3SAtsushi Nemoto	prompt "Timer frequency"
25671723b4a3SAtsushi Nemoto	default HZ_250
25681723b4a3SAtsushi Nemoto	help
25691723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
25701723b4a3SAtsushi Nemoto
257167596573SPaul Burton	config HZ_24
257267596573SPaul Burton		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
257367596573SPaul Burton
25741723b4a3SAtsushi Nemoto	config HZ_48
25750f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
25761723b4a3SAtsushi Nemoto
25771723b4a3SAtsushi Nemoto	config HZ_100
25781723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
25791723b4a3SAtsushi Nemoto
25801723b4a3SAtsushi Nemoto	config HZ_128
25811723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
25821723b4a3SAtsushi Nemoto
25831723b4a3SAtsushi Nemoto	config HZ_250
25841723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
25851723b4a3SAtsushi Nemoto
25861723b4a3SAtsushi Nemoto	config HZ_256
25871723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
25881723b4a3SAtsushi Nemoto
25891723b4a3SAtsushi Nemoto	config HZ_1000
25901723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
25911723b4a3SAtsushi Nemoto
25921723b4a3SAtsushi Nemoto	config HZ_1024
25931723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
25941723b4a3SAtsushi Nemoto
25951723b4a3SAtsushi Nemotoendchoice
25961723b4a3SAtsushi Nemoto
259767596573SPaul Burtonconfig SYS_SUPPORTS_24HZ
259867596573SPaul Burton	bool
259967596573SPaul Burton
26001723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
26011723b4a3SAtsushi Nemoto	bool
26021723b4a3SAtsushi Nemoto
26031723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
26041723b4a3SAtsushi Nemoto	bool
26051723b4a3SAtsushi Nemoto
26061723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
26071723b4a3SAtsushi Nemoto	bool
26081723b4a3SAtsushi Nemoto
26091723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
26101723b4a3SAtsushi Nemoto	bool
26111723b4a3SAtsushi Nemoto
26121723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
26131723b4a3SAtsushi Nemoto	bool
26141723b4a3SAtsushi Nemoto
26151723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
26161723b4a3SAtsushi Nemoto	bool
26171723b4a3SAtsushi Nemoto
26181723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
26191723b4a3SAtsushi Nemoto	bool
26201723b4a3SAtsushi Nemoto
26211723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
26221723b4a3SAtsushi Nemoto	bool
262367596573SPaul Burton	default y if !SYS_SUPPORTS_24HZ && \
262467596573SPaul Burton		     !SYS_SUPPORTS_48HZ && \
262567596573SPaul Burton		     !SYS_SUPPORTS_100HZ && \
262667596573SPaul Burton		     !SYS_SUPPORTS_128HZ && \
262767596573SPaul Burton		     !SYS_SUPPORTS_250HZ && \
262867596573SPaul Burton		     !SYS_SUPPORTS_256HZ && \
262967596573SPaul Burton		     !SYS_SUPPORTS_1000HZ && \
26301723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
26311723b4a3SAtsushi Nemoto
26321723b4a3SAtsushi Nemotoconfig HZ
26331723b4a3SAtsushi Nemoto	int
263467596573SPaul Burton	default 24 if HZ_24
26351723b4a3SAtsushi Nemoto	default 48 if HZ_48
26361723b4a3SAtsushi Nemoto	default 100 if HZ_100
26371723b4a3SAtsushi Nemoto	default 128 if HZ_128
26381723b4a3SAtsushi Nemoto	default 250 if HZ_250
26391723b4a3SAtsushi Nemoto	default 256 if HZ_256
26401723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
26411723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
26421723b4a3SAtsushi Nemoto
264396685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
264496685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
264596685b17SDeng-Cheng Zhu
2646e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
26471da177e4SLinus Torvalds
2648ea6e942bSAtsushi Nemotoconfig KEXEC
26497d60717eSKees Cook	bool "Kexec system call"
26502965faa5SDave Young	select KEXEC_CORE
2651ea6e942bSAtsushi Nemoto	help
2652ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2653ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
26543dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2655ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2656ea6e942bSAtsushi Nemoto
265701dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2658ea6e942bSAtsushi Nemoto
2659ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2660ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2661bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2662bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2663bf220695SGeert Uytterhoeven	  made.
2664ea6e942bSAtsushi Nemoto
26657aa1c8f4SRalf Baechleconfig CRASH_DUMP
26667aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
26677aa1c8f4SRalf Baechle	  help
26687aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
26697aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
26707aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
26717aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
26727aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
26737aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
26747aa1c8f4SRalf Baechle	  PHYSICAL_START.
26757aa1c8f4SRalf Baechle
26767aa1c8f4SRalf Baechleconfig PHYSICAL_START
26777aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
26787aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
26797aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
26807aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
26817aa1c8f4SRalf Baechle	  help
26827aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
26837aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
26847aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
26857aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
26867aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
26877aa1c8f4SRalf Baechle
2688ea6e942bSAtsushi Nemotoconfig SECCOMP
2689ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2690293c5bd1SRalf Baechle	depends on PROC_FS
2691ea6e942bSAtsushi Nemoto	default y
2692ea6e942bSAtsushi Nemoto	help
2693ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2694ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2695ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2696ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2697ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2698ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2699ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2700ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2701ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2702ea6e942bSAtsushi Nemoto
2703ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2704ea6e942bSAtsushi Nemoto
2705597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
27060ce3417eSPaul Burton	bool "Support for O32 binaries using 64-bit FP"
2707597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2708597ce172SPaul Burton	help
2709597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2710597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2711597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2712597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2713597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2714597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2715597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2716597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2717597ce172SPaul Burton	  saying N here.
2718597ce172SPaul Burton
271906e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
272006e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
272106e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
272206e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
272306e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
272406e2e882SPaul Burton	  said details.
272506e2e882SPaul Burton
272606e2e882SPaul Burton	  If unsure, say N.
2727597ce172SPaul Burton
2728f2ffa5abSDezhong Diaoconfig USE_OF
27290b3e06fdSJonas Gorski	bool
2730f2ffa5abSDezhong Diao	select OF
2731e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2732abd2363fSGrant Likely	select IRQ_DOMAIN
2733f2ffa5abSDezhong Diao
27347fafb068SAndrew Brestickerconfig BUILTIN_DTB
27357fafb068SAndrew Bresticker	bool
27367fafb068SAndrew Bresticker
27371da8f179SJonas Gorskichoice
27385b24d52cSJonas Gorski	prompt "Kernel appended dtb support" if USE_OF
27391da8f179SJonas Gorski	default MIPS_NO_APPENDED_DTB
27401da8f179SJonas Gorski
27411da8f179SJonas Gorski	config MIPS_NO_APPENDED_DTB
27421da8f179SJonas Gorski		bool "None"
27431da8f179SJonas Gorski		help
27441da8f179SJonas Gorski		  Do not enable appended dtb support.
27451da8f179SJonas Gorski
274687db537dSAaro Koskinen	config MIPS_ELF_APPENDED_DTB
274787db537dSAaro Koskinen		bool "vmlinux"
274887db537dSAaro Koskinen		help
274987db537dSAaro Koskinen		  With this option, the boot code will look for a device tree binary
275087db537dSAaro Koskinen		  DTB) included in the vmlinux ELF section .appended_dtb. By default
275187db537dSAaro Koskinen		  it is empty and the DTB can be appended using binutils command
275287db537dSAaro Koskinen		  objcopy:
275387db537dSAaro Koskinen
275487db537dSAaro Koskinen		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
275587db537dSAaro Koskinen
275687db537dSAaro Koskinen		  This is meant as a backward compatiblity convenience for those
275787db537dSAaro Koskinen		  systems with a bootloader that can't be upgraded to accommodate
275887db537dSAaro Koskinen		  the documented boot protocol using a device tree.
275987db537dSAaro Koskinen
27601da8f179SJonas Gorski	config MIPS_RAW_APPENDED_DTB
27611da8f179SJonas Gorski		bool "vmlinux.bin"
27621da8f179SJonas Gorski		help
27631da8f179SJonas Gorski		  With this option, the boot code will look for a device tree binary
27641da8f179SJonas Gorski		  DTB) appended to raw vmlinux.bin (without decompressor).
27651da8f179SJonas Gorski		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
27661da8f179SJonas Gorski
27671da8f179SJonas Gorski		  This is meant as a backward compatibility convenience for those
27681da8f179SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
27691da8f179SJonas Gorski		  the documented boot protocol using a device tree.
27701da8f179SJonas Gorski
27711da8f179SJonas Gorski		  Beware that there is very little in terms of protection against
27721da8f179SJonas Gorski		  this option being confused by leftover garbage in memory that might
27731da8f179SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
27741da8f179SJonas Gorski		  to vmlinux.bin.  Do not leave this option active in a production kernel
27751da8f179SJonas Gorski		  if you don't intend to always append a DTB.
2776c0b4e101SJonas Gorski
2777c0b4e101SJonas Gorski	config MIPS_ZBOOT_APPENDED_DTB
2778c0b4e101SJonas Gorski		bool "vmlinuz.bin"
2779c0b4e101SJonas Gorski		depends on SYS_SUPPORTS_ZBOOT
2780c0b4e101SJonas Gorski		help
2781c0b4e101SJonas Gorski		  With this option, the boot code will look for a device tree binary
2782c0b4e101SJonas Gorski		  DTB) appended to raw vmlinuz.bin (with decompressor).
2783c0b4e101SJonas Gorski		  (e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb).
2784c0b4e101SJonas Gorski
2785c0b4e101SJonas Gorski		  This is meant as a backward compatibility convenience for those
2786c0b4e101SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
2787c0b4e101SJonas Gorski		  the documented boot protocol using a device tree.
2788c0b4e101SJonas Gorski
2789c0b4e101SJonas Gorski		  Beware that there is very little in terms of protection against
2790c0b4e101SJonas Gorski		  this option being confused by leftover garbage in memory that might
2791c0b4e101SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
2792c0b4e101SJonas Gorski		  to vmlinuz.bin.  Do not leave this option active in a production kernel
2793c0b4e101SJonas Gorski		  if you don't intend to always append a DTB.
27941da8f179SJonas Gorskiendchoice
27951da8f179SJonas Gorski
27962024972eSJonas Gorskichoice
27972024972eSJonas Gorski	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
27982bcef9b4SJonas Gorski	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
27992bcef9b4SJonas Gorski					 !MIPS_MALTA && !MIPS_SEAD3 && \
28002bcef9b4SJonas Gorski					 !CAVIUM_OCTEON_SOC
28012024972eSJonas Gorski	default MIPS_CMDLINE_FROM_BOOTLOADER
28022024972eSJonas Gorski
28032024972eSJonas Gorski	config MIPS_CMDLINE_FROM_DTB
28042024972eSJonas Gorski		depends on USE_OF
28052024972eSJonas Gorski		bool "Dtb kernel arguments if available"
28062024972eSJonas Gorski
28072024972eSJonas Gorski	config MIPS_CMDLINE_DTB_EXTEND
28082024972eSJonas Gorski		depends on USE_OF
28092024972eSJonas Gorski		bool "Extend dtb kernel arguments with bootloader arguments"
28102024972eSJonas Gorski
28112024972eSJonas Gorski	config MIPS_CMDLINE_FROM_BOOTLOADER
28122024972eSJonas Gorski		bool "Bootloader kernel arguments if available"
28132024972eSJonas Gorskiendchoice
28142024972eSJonas Gorski
28155e83d430SRalf Baechleendmenu
28165e83d430SRalf Baechle
28171df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
28181df0f0ffSAtsushi Nemoto	bool
28191df0f0ffSAtsushi Nemoto	default y
28201df0f0ffSAtsushi Nemoto
28211df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
28221df0f0ffSAtsushi Nemoto	bool
28231df0f0ffSAtsushi Nemoto	default y
28241df0f0ffSAtsushi Nemoto
2825e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT
2826e1e16115SAaro Koskinen	bool
2827e1e16115SAaro Koskinen	default y
2828e1e16115SAaro Koskinen
2829a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS
2830a728ab52SKirill A. Shutemov	int
2831a728ab52SKirill A. Shutemov	default 3 if 64BIT && !PAGE_SIZE_64KB
2832a728ab52SKirill A. Shutemov	default 2
2833a728ab52SKirill A. Shutemov
2834b6c3539bSRalf Baechlesource "init/Kconfig"
2835b6c3539bSRalf Baechle
2836dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2837dc52ddc0SMatt Helsley
28381da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
28391da177e4SLinus Torvalds
28405e83d430SRalf Baechleconfig HW_HAS_EISA
28415e83d430SRalf Baechle	bool
28421da177e4SLinus Torvaldsconfig HW_HAS_PCI
28431da177e4SLinus Torvalds	bool
28441da177e4SLinus Torvalds
28451da177e4SLinus Torvaldsconfig PCI
28461da177e4SLinus Torvalds	bool "Support for PCI controller"
28471da177e4SLinus Torvalds	depends on HW_HAS_PCI
2848abb4ae46SRalf Baechle	select PCI_DOMAINS
28490f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
28501da177e4SLinus Torvalds	help
28511da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
28521da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
28531da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
28541da177e4SLinus Torvalds	  say Y, otherwise N.
28551da177e4SLinus Torvalds
28560e476d91SHuacai Chenconfig HT_PCI
28570e476d91SHuacai Chen	bool "Support for HT-linked PCI"
28580e476d91SHuacai Chen	default y
28590e476d91SHuacai Chen	depends on CPU_LOONGSON3
28600e476d91SHuacai Chen	select PCI
28610e476d91SHuacai Chen	select PCI_DOMAINS
28620e476d91SHuacai Chen	help
28630e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
28640e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
28650e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
28660e476d91SHuacai Chen
28671da177e4SLinus Torvaldsconfig PCI_DOMAINS
28681da177e4SLinus Torvalds	bool
28691da177e4SLinus Torvalds
28701da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
28711da177e4SLinus Torvalds
28721da177e4SLinus Torvalds#
28731da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
28741da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
28751da177e4SLinus Torvalds# users to choose the right thing ...
28761da177e4SLinus Torvalds#
28771da177e4SLinus Torvaldsconfig ISA
28781da177e4SLinus Torvalds	bool
28791da177e4SLinus Torvalds
28801da177e4SLinus Torvaldsconfig EISA
28811da177e4SLinus Torvalds	bool "EISA support"
28825e83d430SRalf Baechle	depends on HW_HAS_EISA
28831da177e4SLinus Torvalds	select ISA
2884aa414dffSRalf Baechle	select GENERIC_ISA_DMA
28851da177e4SLinus Torvalds	---help---
28861da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
28871da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
28881da177e4SLinus Torvalds
28891da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
28901da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
28911da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
28921da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
28931da177e4SLinus Torvalds
28941da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
28951da177e4SLinus Torvalds
28961da177e4SLinus Torvalds	  Otherwise, say N.
28971da177e4SLinus Torvalds
28981da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
28991da177e4SLinus Torvalds
29001da177e4SLinus Torvaldsconfig TC
29011da177e4SLinus Torvalds	bool "TURBOchannel support"
29021da177e4SLinus Torvalds	depends on MACH_DECSTATION
29031da177e4SLinus Torvalds	help
290450a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
290550a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
290650a23e6eSJustin P. Mattock	  at:
290750a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
290850a23e6eSJustin P. Mattock	  and:
290950a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
291050a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
291150a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
29121da177e4SLinus Torvalds
29131da177e4SLinus Torvaldsconfig MMU
29141da177e4SLinus Torvalds	bool
29151da177e4SLinus Torvalds	default y
29161da177e4SLinus Torvalds
2917d865bea4SRalf Baechleconfig I8253
2918d865bea4SRalf Baechle	bool
2919798778b8SRussell King	select CLKSRC_I8253
29202d02612fSThomas Gleixner	select CLKEVT_I8253
29219726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
2922d865bea4SRalf Baechle
2923e05eb3f8SRalf Baechleconfig ZONE_DMA
2924e05eb3f8SRalf Baechle	bool
2925e05eb3f8SRalf Baechle
2926cce335aeSRalf Baechleconfig ZONE_DMA32
2927cce335aeSRalf Baechle	bool
2928cce335aeSRalf Baechle
29291da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
29301da177e4SLinus Torvalds
2931388b78adSAlexandre Bounineconfig RAPIDIO
293256abde72SAlexandre Bounine	tristate "RapidIO support"
2933388b78adSAlexandre Bounine	depends on PCI
2934388b78adSAlexandre Bounine	default n
2935388b78adSAlexandre Bounine	help
2936388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
2937388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
2938388b78adSAlexandre Bounine
2939388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
2940388b78adSAlexandre Bounine
29411da177e4SLinus Torvaldsendmenu
29421da177e4SLinus Torvalds
29431da177e4SLinus Torvaldsmenu "Executable file formats"
29441da177e4SLinus Torvalds
29451da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
29461da177e4SLinus Torvalds
29471da177e4SLinus Torvaldsconfig TRAD_SIGNALS
29481da177e4SLinus Torvalds	bool
29491da177e4SLinus Torvalds
29501da177e4SLinus Torvaldsconfig MIPS32_COMPAT
295178aaf956SRalf Baechle	bool
29521da177e4SLinus Torvalds
29531da177e4SLinus Torvaldsconfig COMPAT
29541da177e4SLinus Torvalds	bool
29551da177e4SLinus Torvalds
295605e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
295705e43966SAtsushi Nemoto	bool
295805e43966SAtsushi Nemoto
29591da177e4SLinus Torvaldsconfig MIPS32_O32
29601da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
296178aaf956SRalf Baechle	depends on 64BIT
296278aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
296378aaf956SRalf Baechle	select COMPAT
296478aaf956SRalf Baechle	select MIPS32_COMPAT
296578aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
29661da177e4SLinus Torvalds	help
29671da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
29681da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
29691da177e4SLinus Torvalds	  existing binaries are in this format.
29701da177e4SLinus Torvalds
29711da177e4SLinus Torvalds	  If unsure, say Y.
29721da177e4SLinus Torvalds
29731da177e4SLinus Torvaldsconfig MIPS32_N32
29741da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
2975c22eacfeSRalf Baechle	depends on 64BIT
297678aaf956SRalf Baechle	select COMPAT
297778aaf956SRalf Baechle	select MIPS32_COMPAT
297878aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
29791da177e4SLinus Torvalds	help
29801da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
29811da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
29821da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
29831da177e4SLinus Torvalds	  cases.
29841da177e4SLinus Torvalds
29851da177e4SLinus Torvalds	  If unsure, say N.
29861da177e4SLinus Torvalds
29871da177e4SLinus Torvaldsconfig BINFMT_ELF32
29881da177e4SLinus Torvalds	bool
29891da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
29901da177e4SLinus Torvalds
29912116245eSRalf Baechleendmenu
29921da177e4SLinus Torvalds
29932116245eSRalf Baechlemenu "Power management options"
2994952fa954SRodolfo Giometti
2995363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
2996363c55caSWu Zhangjin	def_bool y
29973f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2998363c55caSWu Zhangjin
2999f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
3000f4cb5700SJohannes Berg	def_bool y
30013f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3002f4cb5700SJohannes Berg
30032116245eSRalf Baechlesource "kernel/power/Kconfig"
3004952fa954SRodolfo Giometti
30051da177e4SLinus Torvaldsendmenu
30061da177e4SLinus Torvalds
30077a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
30087a998935SViresh Kumar	bool
30097a998935SViresh Kumar
30107a998935SViresh Kumarmenu "CPU Power Management"
3011c095ebafSPaul Burton
3012c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
30137a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
30147a998935SViresh Kumarendif
30159726b43aSWu Zhangjin
3016c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
3017c095ebafSPaul Burton
3018c095ebafSPaul Burtonendmenu
3019c095ebafSPaul Burton
3020d5950b43SSam Ravnborgsource "net/Kconfig"
3021d5950b43SSam Ravnborg
30221da177e4SLinus Torvaldssource "drivers/Kconfig"
30231da177e4SLinus Torvalds
302498cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
302598cdee0eSRalf Baechle
30261da177e4SLinus Torvaldssource "fs/Kconfig"
30271da177e4SLinus Torvalds
30281da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
30291da177e4SLinus Torvalds
30301da177e4SLinus Torvaldssource "security/Kconfig"
30311da177e4SLinus Torvalds
30321da177e4SLinus Torvaldssource "crypto/Kconfig"
30331da177e4SLinus Torvalds
30341da177e4SLinus Torvaldssource "lib/Kconfig"
30352235a54dSSanjay Lal
30362235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
3037