xref: /linux/arch/mips/Kconfig (revision 5fac4f7ac067b2eee3aaf19eff8bd1d7d8e9a91e)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
4a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
5393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
6*5fac4f7aSPaul Burton	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
7c3fc5cd5SRalf Baechle	select HAVE_CONTEXT_TRACKING
8f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
9ec7748b5SSam Ravnborg	select HAVE_IDE
1042d4b839SMathieu Desnoyers	select HAVE_OPROFILE
117f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
127f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
1388547001SJason Wessel	select HAVE_ARCH_KGDB
14490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
15c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
163f5fdb4bSMarkos Chandras	select HAVE_BPF_JIT if !CPU_MICROMIPS
177563bbf8SMark Brown	select ARCH_HAVE_CUSTOM_GPIO_H
18d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
19538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
20538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
2164575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
2229c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
23c1bf207dSDavid Daney	select HAVE_KPROBES
24c1bf207dSDavid Daney	select HAVE_KRETPROBES
25fb59e394SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
26b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
271d7bf993SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
282b68f6caSKees Cook	select ARCH_HAS_ELF_RANDOMIZE
29383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
3030ad29bbSHuacai Chen	select RTC_LIB if !MACH_LOONGSON64
312b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
327463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
3348e1fd5aSDavid Daney	select HAVE_DMA_ATTRS
34f4649382SZubair Lutfullah Kakakhel	select HAVE_DMA_CONTIGUOUS
3548e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
363bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
37f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3878857614SMarkos Chandras	select GENERIC_PCI_IOMAP
3994bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
40c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
410f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
429d15ffc8STejun Heo	select HAVE_MEMBLOCK
439d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
449d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
45360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
464b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
47cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
48929de4ccSDeng-Cheng Zhu	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
49cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
50786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
514febd95aSStephen Rothwell	select VIRT_TO_BUS
522f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
532f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
5450150d2bSAl Viro	select CLONE_BACKWARDS
55d1a1dc0bSDave Hansen	select HAVE_DEBUG_STACKOVERFLOW
5619952a92SKees Cook	select HAVE_CC_STACKPROTECTOR
57b1d4c6caSJames Hogan	select CPU_PM if CPU_IDLE
58cc7964afSPaul Burton	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
5990cee759SPaul Burton	select ARCH_BINFMT_ELF_STATE
60d79d853dSMarkos Chandras	select SYSCTL_EXCEPTION_TRACE
61bb877e96SDeng-Cheng Zhu	select HAVE_VIRT_CPU_ACCOUNTING_GEN
62ec9ddad3SDeng-Cheng Zhu	select HAVE_IRQ_TIME_ACCOUNTING
631da177e4SLinus Torvalds
641da177e4SLinus Torvaldsmenu "Machine selection"
651da177e4SLinus Torvalds
665e83d430SRalf Baechlechoice
675e83d430SRalf Baechle	prompt "System type"
685e83d430SRalf Baechle	default SGI_IP22
691da177e4SLinus Torvalds
7042a4f17dSManuel Laussconfig MIPS_ALCHEMY
71c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
7234adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
73f772cdb2SRalf Baechle	select CEVT_R4K
74d7ea335cSSteven J. Hill	select CSRC_R4K
7567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7688e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
7742a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
7842a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
7942a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
80efb12436SAlexandre Courbot	select ARCH_REQUIRE_GPIOLIB
811b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
8247440229SManuel Lauss	select COMMON_CLK
831da177e4SLinus Torvalds
847ca5dc14SFlorian Fainelliconfig AR7
857ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
867ca5dc14SFlorian Fainelli	select BOOT_ELF32
877ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
887ca5dc14SFlorian Fainelli	select CEVT_R4K
897ca5dc14SFlorian Fainelli	select CSRC_R4K
9067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
917ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
927ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
937ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
947ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
957ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
967ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
97377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
981b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
995f3c9098SFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
1007ca5dc14SFlorian Fainelli	select VLYNQ
1018551fb64SYoichi Yuasa	select HAVE_CLK
1027ca5dc14SFlorian Fainelli	help
1037ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1047ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1057ca5dc14SFlorian Fainelli
10643cc739fSSergey Ryazanovconfig ATH25
10743cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
10843cc739fSSergey Ryazanov	select CEVT_R4K
10943cc739fSSergey Ryazanov	select CSRC_R4K
11043cc739fSSergey Ryazanov	select DMA_NONCOHERENT
11167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1121753e74eSSergey Ryazanov	select IRQ_DOMAIN
11343cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
11443cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
11543cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
1168aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
11743cc739fSSergey Ryazanov	help
11843cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
11943cc739fSSergey Ryazanov
120d4a67d9dSGabor Juhosconfig ATH79
121d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
1226eae43c5SGabor Juhos	select ARCH_REQUIRE_GPIOLIB
123d4a67d9dSGabor Juhos	select BOOT_RAW
124d4a67d9dSGabor Juhos	select CEVT_R4K
125d4a67d9dSGabor Juhos	select CSRC_R4K
126d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
12794638067SGabor Juhos	select HAVE_CLK
128411520afSAlban Bedel	select COMMON_CLK
1292c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
13067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1310aabf1a4SGabor Juhos	select MIPS_MACHINE
132d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
133d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
134d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
135d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
136377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
137da628e8bSAlban Bedel	select SYS_SUPPORTS_ZBOOT
13803c8c407SAlban Bedel	select USE_OF
139d4a67d9dSGabor Juhos	help
140d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
141d4a67d9dSGabor Juhos
1425f2d4459SKevin Cernekeeconfig BMIPS_GENERIC
1435f2d4459SKevin Cernekee	bool "Broadcom Generic BMIPS kernel"
144d666cd02SKevin Cernekee	select BOOT_RAW
145d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
146d666cd02SKevin Cernekee	select USE_OF
147d666cd02SKevin Cernekee	select CEVT_R4K
148d666cd02SKevin Cernekee	select CSRC_R4K
149d666cd02SKevin Cernekee	select SYNC_R4K
150d666cd02SKevin Cernekee	select COMMON_CLK
15160b858f2SKevin Cernekee	select BCM7038_L1_IRQ
15260b858f2SKevin Cernekee	select BCM7120_L2_IRQ
15360b858f2SKevin Cernekee	select BRCMSTB_L2_IRQ
15467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
15560b858f2SKevin Cernekee	select DMA_NONCOHERENT
156d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
15760b858f2SKevin Cernekee	select SYS_SUPPORTS_LITTLE_ENDIAN
158d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
159d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
16060b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS32_3300
16160b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4350
16260b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4380
163d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
164d666cd02SKevin Cernekee	select SWAP_IO_SPACE
16560b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
16660b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
16760b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
16860b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
169d666cd02SKevin Cernekee	help
1705f2d4459SKevin Cernekee	  Build a generic DT-based kernel image that boots on select
1715f2d4459SKevin Cernekee	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
1725f2d4459SKevin Cernekee	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
1735f2d4459SKevin Cernekee	  must be set appropriately for your board.
174d666cd02SKevin Cernekee
1751c0c13ebSAurelien Jarnoconfig BCM47XX
176c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
1772da4c74dSHauke Mehrtens	select ARCH_WANT_OPTIONAL_GPIOLIB
178fe08f8c2SHauke Mehrtens	select BOOT_RAW
17942f77542SRalf Baechle	select CEVT_R4K
180940f6b48SRalf Baechle	select CSRC_R4K
1811c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1821c0c13ebSAurelien Jarno	select HW_HAS_PCI
18367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
184314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
185dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1861c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1871c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
188377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
18925e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
190e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
191c949c0bcSRafał Miłecki	select GPIOLIB
192c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
193f6e734a8SRafał Miłecki	select BCM47XX_NVRAM
1941c0c13ebSAurelien Jarno	help
1951c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
1961c0c13ebSAurelien Jarno
197e7300d04SMaxime Bizonconfig BCM63XX
198e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
199ae8de61cSFlorian Fainelli	select BOOT_RAW
200e7300d04SMaxime Bizon	select CEVT_R4K
201e7300d04SMaxime Bizon	select CSRC_R4K
202fc264022SJonas Gorski	select SYNC_R4K
203e7300d04SMaxime Bizon	select DMA_NONCOHERENT
20467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
205e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
206e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
207e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
208e7300d04SMaxime Bizon	select SWAP_IO_SPACE
209e7300d04SMaxime Bizon	select ARCH_REQUIRE_GPIOLIB
2103e82eeebSYoichi Yuasa	select HAVE_CLK
211af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
212e7300d04SMaxime Bizon	help
213e7300d04SMaxime Bizon	 Support for BCM63XX based boards
214e7300d04SMaxime Bizon
2151da177e4SLinus Torvaldsconfig MIPS_COBALT
2163fa986faSMartin Michlmayr	bool "Cobalt Server"
21742f77542SRalf Baechle	select CEVT_R4K
218940f6b48SRalf Baechle	select CSRC_R4K
2191097c6acSYoichi Yuasa	select CEVT_GT641XX
2201da177e4SLinus Torvalds	select DMA_NONCOHERENT
2211da177e4SLinus Torvalds	select HW_HAS_PCI
222d865bea4SRalf Baechle	select I8253
2231da177e4SLinus Torvalds	select I8259
22467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
225d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
226252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
227e25bfc92SYoichi Yuasa	select PCI
2287cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
2290a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
230ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2310e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
2325e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
233e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
2341da177e4SLinus Torvalds
2351da177e4SLinus Torvaldsconfig MACH_DECSTATION
2363fa986faSMartin Michlmayr	bool "DECstations"
2371da177e4SLinus Torvalds	select BOOT_ELF32
2386457d9fcSYoichi Yuasa	select CEVT_DS1287
23981d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
2404247417dSYoichi Yuasa	select CSRC_IOASIC
24181d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
24220d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
24320d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
24420d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
2451da177e4SLinus Torvalds	select DMA_NONCOHERENT
246ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
24767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
2487cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
2497cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
250ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2517d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2525e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
2531723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
2541723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
2551723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
256930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
2575e83d430SRalf Baechle	help
2581da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
2591da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
2601da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
2611da177e4SLinus Torvalds
2621da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
2631da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
2641da177e4SLinus Torvalds
2651da177e4SLinus Torvalds		DECstation 5000/50
2661da177e4SLinus Torvalds		DECstation 5000/150
2671da177e4SLinus Torvalds		DECstation 5000/260
2681da177e4SLinus Torvalds		DECsystem 5900/260
2691da177e4SLinus Torvalds
2701da177e4SLinus Torvalds	  otherwise choose R3000.
2711da177e4SLinus Torvalds
2725e83d430SRalf Baechleconfig MACH_JAZZ
2733fa986faSMartin Michlmayr	bool "Jazz family of machines"
2740e2794b0SRalf Baechle	select FW_ARC
2750e2794b0SRalf Baechle	select FW_ARC32
2765e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
27742f77542SRalf Baechle	select CEVT_R4K
278940f6b48SRalf Baechle	select CSRC_R4K
279e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2805e83d430SRalf Baechle	select GENERIC_ISA_DMA
2818a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
28267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
283d865bea4SRalf Baechle	select I8253
2845e83d430SRalf Baechle	select I8259
2855e83d430SRalf Baechle	select ISA
2867cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2875e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2887d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2891723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2901da177e4SLinus Torvalds	help
2915e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
2925e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
293692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
2945e83d430SRalf Baechle	 Olivetti M700-10 workstations.
2955e83d430SRalf Baechle
296de361e8bSPaul Burtonconfig MACH_INGENIC
297de361e8bSPaul Burton	bool "Ingenic SoC based machines"
2985ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
2995ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
300f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
3015ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
30267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3035ebabe59SLars-Peter Clausen	select ARCH_REQUIRE_GPIOLIB
304ff1930c6SPaul Burton	select COMMON_CLK
30583bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
306ffb1843dSPaul Burton	select BUILTIN_DTB
307ffb1843dSPaul Burton	select USE_OF
3086ec127fbSPaul Burton	select LIBFDT
3095ebabe59SLars-Peter Clausen
310171bb2f1SJohn Crispinconfig LANTIQ
311171bb2f1SJohn Crispin	bool "Lantiq based platforms"
312171bb2f1SJohn Crispin	select DMA_NONCOHERENT
31367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
314171bb2f1SJohn Crispin	select CEVT_R4K
315171bb2f1SJohn Crispin	select CSRC_R4K
316171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
317171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
318171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
319171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
320377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
321171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
322171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
323171bb2f1SJohn Crispin	select ARCH_REQUIRE_GPIOLIB
324171bb2f1SJohn Crispin	select SWAP_IO_SPACE
325171bb2f1SJohn Crispin	select BOOT_RAW
326287e3f3fSJohn Crispin	select HAVE_MACH_CLKDEV
327287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
328a0392222SJohn Crispin	select USE_OF
3293f8c50c9SJohn Crispin	select PINCTRL
3303f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
331c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
332c530781cSJohn Crispin	select RESET_CONTROLLER
333171bb2f1SJohn Crispin
3341f21d2bdSBrian Murphyconfig LASAT
3351f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
33642f77542SRalf Baechle	select CEVT_R4K
33716f0bbbcSRalf Baechle	select CRC32
338940f6b48SRalf Baechle	select CSRC_R4K
3391f21d2bdSBrian Murphy	select DMA_NONCOHERENT
3401f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
3411f21d2bdSBrian Murphy	select HW_HAS_PCI
34267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3431f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
3441f21d2bdSBrian Murphy	select MIPS_NILE4
3451f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
3461f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
3471f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
3481f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
3491f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
3501f21d2bdSBrian Murphy
35130ad29bbSHuacai Chenconfig MACH_LOONGSON32
35230ad29bbSHuacai Chen	bool "Loongson-1 family of machines"
353c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
354ade299d8SYoichi Yuasa	help
35530ad29bbSHuacai Chen	  This enables support for the Loongson-1 family of machines.
35685749d24SWu Zhangjin
35730ad29bbSHuacai Chen	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
35830ad29bbSHuacai Chen	  the Institute of Computing Technology (ICT), Chinese Academy of
35930ad29bbSHuacai Chen	  Sciences (CAS).
360ade299d8SYoichi Yuasa
36130ad29bbSHuacai Chenconfig MACH_LOONGSON64
36230ad29bbSHuacai Chen	bool "Loongson-2/3 family of machines"
363ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
364ca585cf9SKelvin Cheung	help
36530ad29bbSHuacai Chen	  This enables the support of Loongson-2/3 family of machines.
366ca585cf9SKelvin Cheung
36730ad29bbSHuacai Chen	  Loongson-2 is a family of single-core CPUs and Loongson-3 is a
36830ad29bbSHuacai Chen	  family of multi-core CPUs. They are both 64-bit general-purpose
36930ad29bbSHuacai Chen	  MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
37030ad29bbSHuacai Chen	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
37130ad29bbSHuacai Chen	  in the People's Republic of China. The chief architect is Professor
37230ad29bbSHuacai Chen	  Weiwu Hu.
373ca585cf9SKelvin Cheung
3746a438309SAndrew Brestickerconfig MACH_PISTACHIO
3756a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
3766a438309SAndrew Bresticker	select ARCH_REQUIRE_GPIOLIB
3776a438309SAndrew Bresticker	select BOOT_ELF32
3786a438309SAndrew Bresticker	select BOOT_RAW
3796a438309SAndrew Bresticker	select CEVT_R4K
3806a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
3816a438309SAndrew Bresticker	select COMMON_CLK
3826a438309SAndrew Bresticker	select CSRC_R4K
3836a438309SAndrew Bresticker	select DMA_MAYBE_COHERENT
38467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3856a438309SAndrew Bresticker	select LIBFDT
3866a438309SAndrew Bresticker	select MFD_SYSCON
3876a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
3886a438309SAndrew Bresticker	select MIPS_GIC
3896a438309SAndrew Bresticker	select PINCTRL
3906a438309SAndrew Bresticker	select REGULATOR
3916a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
3926a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
3936a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
3946a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
3956a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
3966a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
397018f62eeSEzequiel Garcia	select SYS_HAS_EARLY_PRINTK
398018f62eeSEzequiel Garcia	select USE_GENERIC_EARLY_PRINTK_8250
3996a438309SAndrew Bresticker	select USE_OF
4006a438309SAndrew Bresticker	help
4016a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
4026a438309SAndrew Bresticker
4031da177e4SLinus Torvaldsconfig MIPS_MALTA
4043fa986faSMartin Michlmayr	bool "MIPS Malta board"
40561ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
4061da177e4SLinus Torvalds	select BOOT_ELF32
407fa71c960SRalf Baechle	select BOOT_RAW
408e8823d26SPaul Burton	select BUILTIN_DTB
40942f77542SRalf Baechle	select CEVT_R4K
410940f6b48SRalf Baechle	select CSRC_R4K
411fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
412885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
4131da177e4SLinus Torvalds	select GENERIC_ISA_DMA
4148a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
41567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4168a19b8f1SAndrew Bresticker	select MIPS_GIC
4171da177e4SLinus Torvalds	select HW_HAS_PCI
418d865bea4SRalf Baechle	select I8253
4191da177e4SLinus Torvalds	select I8259
4205e83d430SRalf Baechle	select MIPS_BONITO64
4219318c51aSChris Dearman	select MIPS_CPU_SCACHE
422a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
423252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
4245e83d430SRalf Baechle	select MIPS_MSC
4251da177e4SLinus Torvalds	select SWAP_IO_SPACE
4267cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
4277cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
428bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
429c5b36783SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R5
430575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
4317cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
4325d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
433575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
4347cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
4357cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
436ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
437ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4385e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
439c5b36783SSteven J. Hill	select SYS_SUPPORTS_HIGHMEM
4405e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
441424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
4420365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
443e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
444377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
445f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
4469693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
4471b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
448e8823d26SPaul Burton	select USE_OF
449abcc82b1SJames Hogan	select ZONE_DMA32 if 64BIT
4501da177e4SLinus Torvalds	help
451f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
4521da177e4SLinus Torvalds	  board.
4531da177e4SLinus Torvalds
454ec47b274SSteven J. Hillconfig MIPS_SEAD3
455ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
456ec47b274SSteven J. Hill	select BOOT_ELF32
457ec47b274SSteven J. Hill	select BOOT_RAW
458f262b5f2SAndrew Bresticker	select BUILTIN_DTB
459ec47b274SSteven J. Hill	select CEVT_R4K
460ec47b274SSteven J. Hill	select CSRC_R4K
461fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
462ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
463ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
464ec47b274SSteven J. Hill	select DMA_NONCOHERENT
46567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4668a19b8f1SAndrew Bresticker	select MIPS_GIC
46744327236SQais Yousef	select LIBFDT
468ec47b274SSteven J. Hill	select MIPS_MSC
469ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
470ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
471ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
472ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
473ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
474ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
475ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
476ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
477ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
478a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
479377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
480ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
481ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
4829b731009SSteven J. Hill	select USE_OF
483ec47b274SSteven J. Hill	help
484ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
485ec47b274SSteven J. Hill	  board.
486ec47b274SSteven J. Hill
487a83860c2SRalf Baechleconfig NEC_MARKEINS
488a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
489a83860c2SRalf Baechle	select SOC_EMMA2RH
490a83860c2SRalf Baechle	select HW_HAS_PCI
491a83860c2SRalf Baechle	help
492a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
493ade299d8SYoichi Yuasa
4945e83d430SRalf Baechleconfig MACH_VR41XX
49574142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
49642f77542SRalf Baechle	select CEVT_R4K
497940f6b48SRalf Baechle	select CSRC_R4K
4987cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
499377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
50027fdd325SYoichi Yuasa	select ARCH_REQUIRE_GPIOLIB
5015e83d430SRalf Baechle
502edb6310aSDaniel Lairdconfig NXP_STB220
503edb6310aSDaniel Laird	bool "NXP STB220 board"
504edb6310aSDaniel Laird	select SOC_PNX833X
505edb6310aSDaniel Laird	help
506edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
507edb6310aSDaniel Laird
508edb6310aSDaniel Lairdconfig NXP_STB225
509edb6310aSDaniel Laird	bool "NXP 225 board"
510edb6310aSDaniel Laird	select SOC_PNX833X
511edb6310aSDaniel Laird	select SOC_PNX8335
512edb6310aSDaniel Laird	help
513edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
514edb6310aSDaniel Laird
5159267a30dSMarc St-Jeanconfig PMC_MSP
5169267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
51739d30c13SAnoop P A	select CEVT_R4K
51839d30c13SAnoop P A	select CSRC_R4K
5199267a30dSMarc St-Jean	select DMA_NONCOHERENT
5209267a30dSMarc St-Jean	select SWAP_IO_SPACE
5219267a30dSMarc St-Jean	select NO_EXCEPT_FILL
5229267a30dSMarc St-Jean	select BOOT_RAW
5239267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
5249267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
5259267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
5269267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
527377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
52867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5299267a30dSMarc St-Jean	select SERIAL_8250
5309267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
5319296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
5329296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
5339267a30dSMarc St-Jean	help
5349267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
5359267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
5369267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
5379267a30dSMarc St-Jean	  a variety of MIPS cores.
5389267a30dSMarc St-Jean
539ae2b5bb6SJohn Crispinconfig RALINK
540ae2b5bb6SJohn Crispin	bool "Ralink based machines"
541ae2b5bb6SJohn Crispin	select CEVT_R4K
542ae2b5bb6SJohn Crispin	select CSRC_R4K
543ae2b5bb6SJohn Crispin	select BOOT_RAW
544ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
54567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
546ae2b5bb6SJohn Crispin	select USE_OF
547ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
548ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
549ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
550ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
551377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
552ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
553ae2b5bb6SJohn Crispin	select HAVE_MACH_CLKDEV
554ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
5552a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
5562a153f1cSJohn Crispin	select RESET_CONTROLLER
557ae2b5bb6SJohn Crispin
5581da177e4SLinus Torvaldsconfig SGI_IP22
5593fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
5600e2794b0SRalf Baechle	select FW_ARC
5610e2794b0SRalf Baechle	select FW_ARC32
5621da177e4SLinus Torvalds	select BOOT_ELF32
56342f77542SRalf Baechle	select CEVT_R4K
564940f6b48SRalf Baechle	select CSRC_R4K
565e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
5661da177e4SLinus Torvalds	select DMA_NONCOHERENT
5675e83d430SRalf Baechle	select HW_HAS_EISA
568d865bea4SRalf Baechle	select I8253
56968de4803SThomas Bogendoerfer	select I8259
5701da177e4SLinus Torvalds	select IP22_CPU_SCACHE
57167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
572aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
573e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
574e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
57536e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
576e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
577e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
578e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
5791da177e4SLinus Torvalds	select SWAP_IO_SPACE
5807cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
5817cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
5822b5e63f6SMartin Michlmayr	#
5832b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
5842b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
5852b5e63f6SMartin Michlmayr	#
5862b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
5872b5e63f6SMartin Michlmayr	# for a more details discussion
5882b5e63f6SMartin Michlmayr	#
5892b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
590ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
591ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5925e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
593930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
5941da177e4SLinus Torvalds	help
5951da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
5961da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
5971da177e4SLinus Torvalds	  that runs on these, say Y here.
5981da177e4SLinus Torvalds
5991da177e4SLinus Torvaldsconfig SGI_IP27
6003fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
6010e2794b0SRalf Baechle	select FW_ARC
6020e2794b0SRalf Baechle	select FW_ARC64
6035e83d430SRalf Baechle	select BOOT_ELF64
604e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
605634286f1SRalf Baechle	select DMA_COHERENT
60636a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
6071da177e4SLinus Torvalds	select HW_HAS_PCI
608130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
6097cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
610ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6115e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
612d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
6131a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
614930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6151da177e4SLinus Torvalds	help
6161da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
6171da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
6181da177e4SLinus Torvalds	  here.
6191da177e4SLinus Torvalds
620e2defae5SThomas Bogendoerferconfig SGI_IP28
6217d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
6220e2794b0SRalf Baechle	select FW_ARC
6230e2794b0SRalf Baechle	select FW_ARC64
624e2defae5SThomas Bogendoerfer	select BOOT_ELF64
625e2defae5SThomas Bogendoerfer	select CEVT_R4K
626e2defae5SThomas Bogendoerfer	select CSRC_R4K
627e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
628e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
629e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
63067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
631e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
632e2defae5SThomas Bogendoerfer	select I8253
633e2defae5SThomas Bogendoerfer	select I8259
634e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
635e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6365b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
637e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
638e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
639e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
640e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
641e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6422b5e63f6SMartin Michlmayr	#
6432b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6442b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6452b5e63f6SMartin Michlmayr	#
6462b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6472b5e63f6SMartin Michlmayr	# for a more details discussion
6482b5e63f6SMartin Michlmayr	#
6492b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
650e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
651e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
652dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
653e2defae5SThomas Bogendoerfer      help
654e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
655e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
656e2defae5SThomas Bogendoerfer
6571da177e4SLinus Torvaldsconfig SGI_IP32
658cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
6590e2794b0SRalf Baechle	select FW_ARC
6600e2794b0SRalf Baechle	select FW_ARC32
6611da177e4SLinus Torvalds	select BOOT_ELF32
66242f77542SRalf Baechle	select CEVT_R4K
663940f6b48SRalf Baechle	select CSRC_R4K
6641da177e4SLinus Torvalds	select DMA_NONCOHERENT
6651da177e4SLinus Torvalds	select HW_HAS_PCI
66667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
6671da177e4SLinus Torvalds	select R5000_CPU_SCACHE
6681da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
6697cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
6707cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
6717cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
672dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
673ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6745e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6751da177e4SLinus Torvalds	help
6761da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
6771da177e4SLinus Torvalds
678ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
679ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
6805e83d430SRalf Baechle	select BOOT_ELF32
6815e83d430SRalf Baechle	select DMA_COHERENT
6825e83d430SRalf Baechle	select SIBYTE_BCM1120
6835e83d430SRalf Baechle	select SWAP_IO_SPACE
6847cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
6855e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6865e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6875e83d430SRalf Baechle
688ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
689ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
6905e83d430SRalf Baechle	select BOOT_ELF32
6915e83d430SRalf Baechle	select DMA_COHERENT
6925e83d430SRalf Baechle	select SIBYTE_BCM1120
6935e83d430SRalf Baechle	select SWAP_IO_SPACE
6947cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
6955e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6965e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6975e83d430SRalf Baechle
6985e83d430SRalf Baechleconfig SIBYTE_CRHONE
6993fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
7005e83d430SRalf Baechle	select BOOT_ELF32
7015e83d430SRalf Baechle	select DMA_COHERENT
7025e83d430SRalf Baechle	select SIBYTE_BCM1125
7035e83d430SRalf Baechle	select SWAP_IO_SPACE
7047cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7055e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7065e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7075e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7085e83d430SRalf Baechle
709ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
710ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
711ade299d8SYoichi Yuasa	select BOOT_ELF32
712ade299d8SYoichi Yuasa	select DMA_COHERENT
713ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
714ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
715ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
716ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
717ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
718ade299d8SYoichi Yuasa
719ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
720ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
721ade299d8SYoichi Yuasa	select BOOT_ELF32
722ade299d8SYoichi Yuasa	select DMA_COHERENT
723fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
724ade299d8SYoichi Yuasa	select SIBYTE_SB1250
725ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
726ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
727ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
728ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
729ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
730cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
731ade299d8SYoichi Yuasa
732ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
733ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
734ade299d8SYoichi Yuasa	select BOOT_ELF32
735ade299d8SYoichi Yuasa	select DMA_COHERENT
736fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
737ade299d8SYoichi Yuasa	select SIBYTE_SB1250
738ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
739ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
740ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
741ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
742ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
743ade299d8SYoichi Yuasa
744ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
745ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
746ade299d8SYoichi Yuasa	select BOOT_ELF32
747ade299d8SYoichi Yuasa	select DMA_COHERENT
748ade299d8SYoichi Yuasa	select SIBYTE_SB1250
749ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
750ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
751ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
752ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
753ade299d8SYoichi Yuasa
754ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
755ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
756ade299d8SYoichi Yuasa	select BOOT_ELF32
757ade299d8SYoichi Yuasa	select DMA_COHERENT
758ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
759ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
760ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
761ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
762ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
763651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
764ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
765cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
766ade299d8SYoichi Yuasa
76714b36af4SThomas Bogendoerferconfig SNI_RM
76814b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
7690e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
7700e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
771aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
7725e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
7735e83d430SRalf Baechle	select BOOT_ELF32
77442f77542SRalf Baechle	select CEVT_R4K
775940f6b48SRalf Baechle	select CSRC_R4K
776e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
7775e83d430SRalf Baechle	select DMA_NONCOHERENT
7785e83d430SRalf Baechle	select GENERIC_ISA_DMA
7798a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
7805e83d430SRalf Baechle	select HW_HAS_EISA
7815e83d430SRalf Baechle	select HW_HAS_PCI
78267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
783d865bea4SRalf Baechle	select I8253
7845e83d430SRalf Baechle	select I8259
7855e83d430SRalf Baechle	select ISA
7864a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
7877cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
7884a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
789c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
7904a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
79136a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
792ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
7937d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
7944a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
7955e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7965e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7971da177e4SLinus Torvalds	help
79814b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
79914b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
8005e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
8015e83d430SRalf Baechle	  support this machine type.
8021da177e4SLinus Torvalds
803edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
804edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
8055e83d430SRalf Baechle
806edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
807edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
80823fbee9dSRalf Baechle
80973b4390fSRalf Baechleconfig MIKROTIK_RB532
81073b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
81173b4390fSRalf Baechle	select CEVT_R4K
81273b4390fSRalf Baechle	select CSRC_R4K
81373b4390fSRalf Baechle	select DMA_NONCOHERENT
81473b4390fSRalf Baechle	select HW_HAS_PCI
81567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
81673b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
81773b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
81873b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
81973b4390fSRalf Baechle	select SWAP_IO_SPACE
82073b4390fSRalf Baechle	select BOOT_RAW
821d888e25bSFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
822930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
82373b4390fSRalf Baechle	help
82473b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
82573b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
82673b4390fSRalf Baechle
8279ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
8289ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
829a86c7f72SDavid Daney	select CEVT_R4K
83034adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
831a86c7f72SDavid Daney	select DMA_COHERENT
832a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
833a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
834f65aad41SRalf Baechle	select EDAC_SUPPORT
835b01aec9bSBorislav Petkov	select EDAC_ATOMIC_SCRUB
83673569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
83773569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
838a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
8395e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
840a86c7f72SDavid Daney	select SWAP_IO_SPACE
841e8635b48SDavid Daney	select HW_HAS_PCI
842f00e001eSDavid Daney	select ZONE_DMA32
843465aaed0SDavid Daney	select HOLES_IN_ZONE
84499cab4bbSDavid Daney	select ARCH_REQUIRE_GPIOLIB
8456e511163SDavid Daney	select LIBFDT
8466e511163SDavid Daney	select USE_OF
8476e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
8486e511163SDavid Daney	select SYS_SUPPORTS_SMP
8496e511163SDavid Daney	select NR_CPUS_DEFAULT_16
850e326479fSAndrew Bresticker	select BUILTIN_DTB
8518c1e6b14SDavid Daney	select MTD_COMPLEX_MAPPINGS
852a86c7f72SDavid Daney	help
853a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
854a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
855a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
856a86c7f72SDavid Daney	  Some of the supported boards are:
857a86c7f72SDavid Daney		EBT3000
858a86c7f72SDavid Daney		EBH3000
859a86c7f72SDavid Daney		EBH3100
860a86c7f72SDavid Daney		Thunder
861a86c7f72SDavid Daney		Kodama
862a86c7f72SDavid Daney		Hikari
863a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
864a86c7f72SDavid Daney
8657f058e85SJayachandran Cconfig NLM_XLR_BOARD
8667f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
8677f058e85SJayachandran C	select BOOT_ELF32
8687f058e85SJayachandran C	select NLM_COMMON
8697f058e85SJayachandran C	select SYS_HAS_CPU_XLR
8707f058e85SJayachandran C	select SYS_SUPPORTS_SMP
8717f058e85SJayachandran C	select HW_HAS_PCI
8727f058e85SJayachandran C	select SWAP_IO_SPACE
8737f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
8747f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
87534adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
8767f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
8777f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
8787f058e85SJayachandran C	select DMA_COHERENT
8797f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
8807f058e85SJayachandran C	select CEVT_R4K
8817f058e85SJayachandran C	select CSRC_R4K
88267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
883b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
8847f058e85SJayachandran C	select SYNC_R4K
8857f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
8868f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
8878f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
8887f058e85SJayachandran C	help
8897f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
8907f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
8917f058e85SJayachandran C
8921c773ea4SJayachandran Cconfig NLM_XLP_BOARD
8931c773ea4SJayachandran C	bool "Netlogic XLP based systems"
8941c773ea4SJayachandran C	select BOOT_ELF32
8951c773ea4SJayachandran C	select NLM_COMMON
8961c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
8971c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
8981c773ea4SJayachandran C	select HW_HAS_PCI
8991c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9001c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
90134adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
9021c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9031c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
9041c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9051c773ea4SJayachandran C	select DMA_COHERENT
9061c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
9071c773ea4SJayachandran C	select CEVT_R4K
9081c773ea4SJayachandran C	select CSRC_R4K
90967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
910b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9111c773ea4SJayachandran C	select SYNC_R4K
9121c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
9132f6528e1SJayachandran C	select USE_OF
9148f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9158f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9161c773ea4SJayachandran C	help
9171c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
9181c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
9191c773ea4SJayachandran C
9209bc463beSDavid Daneyconfig MIPS_PARAVIRT
9219bc463beSDavid Daney	bool "Para-Virtualized guest system"
9229bc463beSDavid Daney	select CEVT_R4K
9239bc463beSDavid Daney	select CSRC_R4K
9249bc463beSDavid Daney	select DMA_COHERENT
9259bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
9269bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
9279bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
9289bc463beSDavid Daney	select SYS_SUPPORTS_SMP
9299bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
9309bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
9319bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
9329bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
9339bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
9349bc463beSDavid Daney	select HW_HAS_PCI
9359bc463beSDavid Daney	select SWAP_IO_SPACE
9369bc463beSDavid Daney	help
9379bc463beSDavid Daney	  This option supports guest running under ????
9389bc463beSDavid Daney
9391da177e4SLinus Torvaldsendchoice
9401da177e4SLinus Torvalds
941e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
9423b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
943d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
944a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
945e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
9468945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig"
9475e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
9485ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
9498ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
9501f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
9510f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
952ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
95329c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
95438b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
95522b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
9565e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
957a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
95830ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig"
95930ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig"
9607f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
961ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
96238b18f72SRalf Baechle
9635e83d430SRalf Baechleendmenu
9645e83d430SRalf Baechle
9651da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
9661da177e4SLinus Torvalds	bool
9671da177e4SLinus Torvalds	default y
9681da177e4SLinus Torvalds
9691da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
9701da177e4SLinus Torvalds	bool
9711da177e4SLinus Torvalds
972f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
973f0d1b0b3SDavid Howells	bool
974f0d1b0b3SDavid Howells	default n
975f0d1b0b3SDavid Howells
976f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
977f0d1b0b3SDavid Howells	bool
978f0d1b0b3SDavid Howells	default n
979f0d1b0b3SDavid Howells
9803c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
9813c9ee7efSAkinobu Mita	bool
9823c9ee7efSAkinobu Mita	default y
9833c9ee7efSAkinobu Mita
9841da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
9851da177e4SLinus Torvalds	bool
9861da177e4SLinus Torvalds	default y
9871da177e4SLinus Torvalds
988ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
9891cc89038SAtsushi Nemoto	bool
9901cc89038SAtsushi Nemoto	default y
9911cc89038SAtsushi Nemoto
9921da177e4SLinus Torvalds#
9931da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
9941da177e4SLinus Torvalds#
9950e2794b0SRalf Baechleconfig FW_ARC
9961da177e4SLinus Torvalds	bool
9971da177e4SLinus Torvalds
99861ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
99961ed242dSRalf Baechle	bool
100061ed242dSRalf Baechle
10019267a30dSMarc St-Jeanconfig BOOT_RAW
10029267a30dSMarc St-Jean	bool
10039267a30dSMarc St-Jean
1004217dd11eSRalf Baechleconfig CEVT_BCM1480
1005217dd11eSRalf Baechle	bool
1006217dd11eSRalf Baechle
10076457d9fcSYoichi Yuasaconfig CEVT_DS1287
10086457d9fcSYoichi Yuasa	bool
10096457d9fcSYoichi Yuasa
10101097c6acSYoichi Yuasaconfig CEVT_GT641XX
10111097c6acSYoichi Yuasa	bool
10121097c6acSYoichi Yuasa
101342f77542SRalf Baechleconfig CEVT_R4K
101442f77542SRalf Baechle	bool
101542f77542SRalf Baechle
1016217dd11eSRalf Baechleconfig CEVT_SB1250
1017217dd11eSRalf Baechle	bool
1018217dd11eSRalf Baechle
1019229f773eSAtsushi Nemotoconfig CEVT_TXX9
1020229f773eSAtsushi Nemoto	bool
1021229f773eSAtsushi Nemoto
1022217dd11eSRalf Baechleconfig CSRC_BCM1480
1023217dd11eSRalf Baechle	bool
1024217dd11eSRalf Baechle
10254247417dSYoichi Yuasaconfig CSRC_IOASIC
10264247417dSYoichi Yuasa	bool
10274247417dSYoichi Yuasa
1028940f6b48SRalf Baechleconfig CSRC_R4K
1029940f6b48SRalf Baechle	bool
1030940f6b48SRalf Baechle
1031217dd11eSRalf Baechleconfig CSRC_SB1250
1032217dd11eSRalf Baechle	bool
1033217dd11eSRalf Baechle
1034a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
10357444a72eSMichael Buesch	select ARCH_REQUIRE_GPIOLIB
1036a9aec7feSAtsushi Nemoto	bool
1037a9aec7feSAtsushi Nemoto
10380e2794b0SRalf Baechleconfig FW_CFE
1039df78b5c8SAurelien Jarno	bool
1040df78b5c8SAurelien Jarno
10414bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
104234adb28dSRalf Baechle	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
10434bafad92SFUJITA Tomonori
1044885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1045885014bcSFelix Fietkau	select DMA_NONCOHERENT
1046885014bcSFelix Fietkau	bool
1047885014bcSFelix Fietkau
10481da177e4SLinus Torvaldsconfig DMA_COHERENT
10491da177e4SLinus Torvalds	bool
10501da177e4SLinus Torvalds
10511da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
10521da177e4SLinus Torvalds	bool
1053e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
10544ce588cdSRalf Baechle
1055e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
10564ce588cdSRalf Baechle	bool
10571da177e4SLinus Torvalds
105836a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
10591da177e4SLinus Torvalds	bool
10601da177e4SLinus Torvalds
1061dbb74540SRalf Baechleconfig HOTPLUG_CPU
10621b2bc75cSRalf Baechle	bool "Support for hot-pluggable CPUs"
106340b31360SStephen Rothwell	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
10641b2bc75cSRalf Baechle	help
10651b2bc75cSRalf Baechle	  Say Y here to allow turning CPUs off and on. CPUs can be
10661b2bc75cSRalf Baechle	  controlled through /sys/devices/system/cpu.
10671b2bc75cSRalf Baechle	  (Note: power management support will enable this option
10681b2bc75cSRalf Baechle	    automatically on SMP systems. )
10691b2bc75cSRalf Baechle	  Say N if you want to disable CPU hotplug.
10701b2bc75cSRalf Baechle
10711b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1072dbb74540SRalf Baechle	bool
1073dbb74540SRalf Baechle
10741da177e4SLinus Torvaldsconfig I8259
10751da177e4SLinus Torvalds	bool
1076079a4601SAndrew Bresticker	select IRQ_DOMAIN
10771da177e4SLinus Torvalds
10781da177e4SLinus Torvaldsconfig MIPS_BONITO64
10791da177e4SLinus Torvalds	bool
10801da177e4SLinus Torvalds
10811da177e4SLinus Torvaldsconfig MIPS_MSC
10821da177e4SLinus Torvalds	bool
10831da177e4SLinus Torvalds
10841f21d2bdSBrian Murphyconfig MIPS_NILE4
10851f21d2bdSBrian Murphy	bool
10861f21d2bdSBrian Murphy
108739b8d525SRalf Baechleconfig SYNC_R4K
108839b8d525SRalf Baechle	bool
108939b8d525SRalf Baechle
1090487d70d0SGabor Juhosconfig MIPS_MACHINE
1091487d70d0SGabor Juhos	def_bool n
1092487d70d0SGabor Juhos
1093ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1094d388d685SMaciej W. Rozycki	def_bool n
1095d388d685SMaciej W. Rozycki
10964e0748f5SMarkos Chandrasconfig GENERIC_CSUM
10974e0748f5SMarkos Chandras	bool
10984e0748f5SMarkos Chandras
10998313da30SRalf Baechleconfig GENERIC_ISA_DMA
11008313da30SRalf Baechle	bool
11018313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1102a35bee8aSNamhyung Kim	select ISA_DMA_API
11038313da30SRalf Baechle
1104aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1105aa414dffSRalf Baechle	bool
11068313da30SRalf Baechle	select GENERIC_ISA_DMA
1107aa414dffSRalf Baechle
1108a35bee8aSNamhyung Kimconfig ISA_DMA_API
1109a35bee8aSNamhyung Kim	bool
1110a35bee8aSNamhyung Kim
1111465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1112465aaed0SDavid Daney	bool
1113465aaed0SDavid Daney
11145e83d430SRalf Baechle#
11156b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
11165e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
11175e83d430SRalf Baechle# choice statement should be more obvious to the user.
11185e83d430SRalf Baechle#
11195e83d430SRalf Baechlechoice
11206b2aac42SMasanari Iida	prompt "Endianness selection"
11211da177e4SLinus Torvalds	help
11221da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
11235e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
11243cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
11255e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
11263dde6ad8SDavid Sterba	  one or the other endianness.
11275e83d430SRalf Baechle
11285e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
11295e83d430SRalf Baechle	bool "Big endian"
11305e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
11315e83d430SRalf Baechle
11325e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
11335e83d430SRalf Baechle	bool "Little endian"
11345e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
11355e83d430SRalf Baechle
11365e83d430SRalf Baechleendchoice
11375e83d430SRalf Baechle
113822b0763aSDavid Daneyconfig EXPORT_UASM
113922b0763aSDavid Daney	bool
114022b0763aSDavid Daney
11412116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
11422116245eSRalf Baechle	bool
11432116245eSRalf Baechle
11445e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
11455e83d430SRalf Baechle	bool
11465e83d430SRalf Baechle
11475e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
11485e83d430SRalf Baechle	bool
11491da177e4SLinus Torvalds
11509cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
11519cffd154SDavid Daney	bool
11529cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
11539cffd154SDavid Daney	default y
11549cffd154SDavid Daney
1155aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1156aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1157aa1762f4SDavid Daney
11581da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
11591da177e4SLinus Torvalds	bool
11601da177e4SLinus Torvalds
11619267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
11629267a30dSMarc St-Jean	bool
11639267a30dSMarc St-Jean
11649267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
11659267a30dSMarc St-Jean	bool
11669267a30dSMarc St-Jean
11678420fd00SAtsushi Nemotoconfig IRQ_TXX9
11688420fd00SAtsushi Nemoto	bool
11698420fd00SAtsushi Nemoto
1170d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1171d5ab1a69SYoichi Yuasa	bool
1172d5ab1a69SYoichi Yuasa
1173252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
11741da177e4SLinus Torvalds	bool
11751da177e4SLinus Torvalds
11769267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
11779267a30dSMarc St-Jean	bool
11789267a30dSMarc St-Jean
1179a83860c2SRalf Baechleconfig SOC_EMMA2RH
1180a83860c2SRalf Baechle	bool
1181a83860c2SRalf Baechle	select CEVT_R4K
1182a83860c2SRalf Baechle	select CSRC_R4K
1183a83860c2SRalf Baechle	select DMA_NONCOHERENT
118467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1185a83860c2SRalf Baechle	select SWAP_IO_SPACE
1186a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1187a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1188a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1189a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1190a83860c2SRalf Baechle
1191edb6310aSDaniel Lairdconfig SOC_PNX833X
1192edb6310aSDaniel Laird	bool
1193edb6310aSDaniel Laird	select CEVT_R4K
1194edb6310aSDaniel Laird	select CSRC_R4K
119567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1196edb6310aSDaniel Laird	select DMA_NONCOHERENT
1197edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1198edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1199edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1200edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1201377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1202edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1203edb6310aSDaniel Laird
1204edb6310aSDaniel Lairdconfig SOC_PNX8335
1205edb6310aSDaniel Laird	bool
1206edb6310aSDaniel Laird	select SOC_PNX833X
1207edb6310aSDaniel Laird
1208a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1209a7e07b1aSMarkos Chandras	bool
1210a7e07b1aSMarkos Chandras
12111da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
12121da177e4SLinus Torvalds	bool
12131da177e4SLinus Torvalds
1214e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1215e2defae5SThomas Bogendoerfer	bool
1216e2defae5SThomas Bogendoerfer
12175b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
12185b438c44SThomas Bogendoerfer	bool
12195b438c44SThomas Bogendoerfer
1220e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1221e2defae5SThomas Bogendoerfer	bool
1222e2defae5SThomas Bogendoerfer
1223e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1224e2defae5SThomas Bogendoerfer	bool
1225e2defae5SThomas Bogendoerfer
1226e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1227e2defae5SThomas Bogendoerfer	bool
1228e2defae5SThomas Bogendoerfer
1229e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1230e2defae5SThomas Bogendoerfer	bool
1231e2defae5SThomas Bogendoerfer
1232e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1233e2defae5SThomas Bogendoerfer	bool
1234e2defae5SThomas Bogendoerfer
12350e2794b0SRalf Baechleconfig FW_ARC32
12365e83d430SRalf Baechle	bool
12375e83d430SRalf Baechle
1238aaa9fad3SPaul Bolleconfig FW_SNIPROM
1239231a35d3SThomas Bogendoerfer	bool
1240231a35d3SThomas Bogendoerfer
12411da177e4SLinus Torvaldsconfig BOOT_ELF32
12421da177e4SLinus Torvalds	bool
12431da177e4SLinus Torvalds
1244930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1245930beb5aSFlorian Fainelli	bool
1246930beb5aSFlorian Fainelli
1247930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1248930beb5aSFlorian Fainelli	bool
1249930beb5aSFlorian Fainelli
1250930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1251930beb5aSFlorian Fainelli	bool
1252930beb5aSFlorian Fainelli
1253930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1254930beb5aSFlorian Fainelli	bool
1255930beb5aSFlorian Fainelli
12561da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
12571da177e4SLinus Torvalds	int
1258a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
12595432eeb6SKevin Cernekee	default "6" if MIPS_L1_CACHE_SHIFT_6
12605432eeb6SKevin Cernekee	default "5" if MIPS_L1_CACHE_SHIFT_5
12615432eeb6SKevin Cernekee	default "4" if MIPS_L1_CACHE_SHIFT_4
12621da177e4SLinus Torvalds	default "5"
12631da177e4SLinus Torvalds
12641da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
12651da177e4SLinus Torvalds	bool
12661da177e4SLinus Torvalds
12671da177e4SLinus Torvaldsconfig ARC_CONSOLE
12681da177e4SLinus Torvalds	bool "ARC console support"
1269e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
12701da177e4SLinus Torvalds
12711da177e4SLinus Torvaldsconfig ARC_MEMORY
12721da177e4SLinus Torvalds	bool
127314b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
12741da177e4SLinus Torvalds	default y
12751da177e4SLinus Torvalds
12761da177e4SLinus Torvaldsconfig ARC_PROMLIB
12771da177e4SLinus Torvalds	bool
1278e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
12791da177e4SLinus Torvalds	default y
12801da177e4SLinus Torvalds
12810e2794b0SRalf Baechleconfig FW_ARC64
12821da177e4SLinus Torvalds	bool
12831da177e4SLinus Torvalds
12841da177e4SLinus Torvaldsconfig BOOT_ELF64
12851da177e4SLinus Torvalds	bool
12861da177e4SLinus Torvalds
12871da177e4SLinus Torvaldsmenu "CPU selection"
12881da177e4SLinus Torvalds
12891da177e4SLinus Torvaldschoice
12901da177e4SLinus Torvalds	prompt "CPU type"
12911da177e4SLinus Torvalds	default CPU_R4X00
12921da177e4SLinus Torvalds
12930e476d91SHuacai Chenconfig CPU_LOONGSON3
12940e476d91SHuacai Chen	bool "Loongson 3 CPU"
12950e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
12960e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
12970e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
12980e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
12990e476d91SHuacai Chen	select WEAK_ORDERING
13000e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
1301cbfb3ea7SHuacai Chen	select ARCH_REQUIRE_GPIOLIB
13020e476d91SHuacai Chen	help
13030e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
13040e476d91SHuacai Chen		set with many extensions.
13050e476d91SHuacai Chen
13063702bba5SWu Zhangjinconfig CPU_LOONGSON2E
13073702bba5SWu Zhangjin	bool "Loongson 2E"
13083702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
13093702bba5SWu Zhangjin	select CPU_LOONGSON2
13102a21c730SFuxin Zhang	help
13112a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
13122a21c730SFuxin Zhang	  with many extensions.
13132a21c730SFuxin Zhang
131425985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
13156f7a251aSWu Zhangjin	  bonito64.
13166f7a251aSWu Zhangjin
13176f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
13186f7a251aSWu Zhangjin	bool "Loongson 2F"
13196f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
13206f7a251aSWu Zhangjin	select CPU_LOONGSON2
1321c197da91SArnaud Patard	select ARCH_REQUIRE_GPIOLIB
13226f7a251aSWu Zhangjin	help
13236f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
13246f7a251aSWu Zhangjin	  with many extensions.
13256f7a251aSWu Zhangjin
13266f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
13276f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
13286f7a251aSWu Zhangjin	  Loongson2E.
13296f7a251aSWu Zhangjin
1330ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1331ca585cf9SKelvin Cheung	bool "Loongson 1B"
1332ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1333ca585cf9SKelvin Cheung	select CPU_LOONGSON1
1334ca585cf9SKelvin Cheung	help
1335ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1336ca585cf9SKelvin Cheung	  release 2 instruction set.
1337ca585cf9SKelvin Cheung
13386e760c8dSRalf Baechleconfig CPU_MIPS32_R1
13396e760c8dSRalf Baechle	bool "MIPS32 Release 1"
13407cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
13416e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1342797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1343ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13446e760c8dSRalf Baechle	help
13455e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13461e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13471e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13481e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
13491e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13501e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
13511e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
13521e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
13531e5f1caaSRalf Baechle	  performance.
13541e5f1caaSRalf Baechle
13551e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
13561e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
13577cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
13581e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1359797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1360ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1361a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
13622235a54dSSanjay Lal	select HAVE_KVM
13631e5f1caaSRalf Baechle	help
13645e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
13656e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13666e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13676e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
13686e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13691da177e4SLinus Torvalds
13707fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
1371674d10e2SMarkos Chandras	bool "MIPS32 Release 6"
13727fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
13737fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
13747fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
13757fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
13767fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
13774e0748f5SMarkos Chandras	select GENERIC_CSUM
13787fd08ca5SLeonid Yegoshin	select HAVE_KVM
13797fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
13807fd08ca5SLeonid Yegoshin	help
13817fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
13827fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
13837fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
13847fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
13857fd08ca5SLeonid Yegoshin
13866e760c8dSRalf Baechleconfig CPU_MIPS64_R1
13876e760c8dSRalf Baechle	bool "MIPS64 Release 1"
13887cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1389797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1390ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1391ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1392ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13939cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
13946e760c8dSRalf Baechle	help
13956e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13966e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
13976e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
13986e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
13996e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14001e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
14011e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
14021e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
14031e5f1caaSRalf Baechle	  performance.
14041e5f1caaSRalf Baechle
14051e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
14061e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
14077cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1408797798c1SRalf Baechle	select CPU_HAS_PREFETCH
14091e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
14101e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1411ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14129cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1413a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14141e5f1caaSRalf Baechle	help
14151e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14161e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14171e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14181e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
14191e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14201da177e4SLinus Torvalds
14217fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
1422674d10e2SMarkos Chandras	bool "MIPS64 Release 6"
14237fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
14247fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14257fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14267fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
14277fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14287fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14294e0748f5SMarkos Chandras	select GENERIC_CSUM
14304e9d324dSPaul Burton	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
14317fd08ca5SLeonid Yegoshin	help
14327fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14337fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
14347fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
14357fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
14367fd08ca5SLeonid Yegoshin
14371da177e4SLinus Torvaldsconfig CPU_R3000
14381da177e4SLinus Torvalds	bool "R3000"
14397cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1440f7062ddbSRalf Baechle	select CPU_HAS_WB
1441ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1442797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14431da177e4SLinus Torvalds	help
14441da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
14451da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
14461da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
14471da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
14481da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
14491da177e4SLinus Torvalds	  try to recompile with R3000.
14501da177e4SLinus Torvalds
14511da177e4SLinus Torvaldsconfig CPU_TX39XX
14521da177e4SLinus Torvalds	bool "R39XX"
14537cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1454ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
14551da177e4SLinus Torvalds
14561da177e4SLinus Torvaldsconfig CPU_VR41XX
14571da177e4SLinus Torvalds	bool "R41xx"
14587cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1459ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1460ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
14611da177e4SLinus Torvalds	help
14625e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
14631da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
14641da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
14651da177e4SLinus Torvalds	  processor or vice versa.
14661da177e4SLinus Torvalds
14671da177e4SLinus Torvaldsconfig CPU_R4300
14681da177e4SLinus Torvalds	bool "R4300"
14697cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1470ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1471ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
14721da177e4SLinus Torvalds	help
14731da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
14741da177e4SLinus Torvalds
14751da177e4SLinus Torvaldsconfig CPU_R4X00
14761da177e4SLinus Torvalds	bool "R4x00"
14777cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1478ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1479ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1480970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14811da177e4SLinus Torvalds	help
14821da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
14831da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
14841da177e4SLinus Torvalds
14851da177e4SLinus Torvaldsconfig CPU_TX49XX
14861da177e4SLinus Torvalds	bool "R49XX"
14877cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1488de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1489ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1490ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1491970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14921da177e4SLinus Torvalds
14931da177e4SLinus Torvaldsconfig CPU_R5000
14941da177e4SLinus Torvalds	bool "R5000"
14957cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1496ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1497ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1498970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14991da177e4SLinus Torvalds	help
15001da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
15011da177e4SLinus Torvalds
15021da177e4SLinus Torvaldsconfig CPU_R5432
15031da177e4SLinus Torvalds	bool "R5432"
15047cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
15055e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
15065e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1507970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15081da177e4SLinus Torvalds
1509542c1020SShinya Kuribayashiconfig CPU_R5500
1510542c1020SShinya Kuribayashi	bool "R5500"
1511542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1512542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1513542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
15149cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1515542c1020SShinya Kuribayashi	help
1516542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1517542c1020SShinya Kuribayashi	  instruction set.
1518542c1020SShinya Kuribayashi
15191da177e4SLinus Torvaldsconfig CPU_R6000
15201da177e4SLinus Torvalds	bool "R6000"
15217cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1522ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
15231da177e4SLinus Torvalds	help
15241da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1525c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
15261da177e4SLinus Torvalds
15271da177e4SLinus Torvaldsconfig CPU_NEVADA
15281da177e4SLinus Torvalds	bool "RM52xx"
15297cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1530ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1531ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1532970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15331da177e4SLinus Torvalds	help
15341da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
15351da177e4SLinus Torvalds
15361da177e4SLinus Torvaldsconfig CPU_R8000
15371da177e4SLinus Torvalds	bool "R8000"
15387cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
15395e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1540ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15411da177e4SLinus Torvalds	help
15421da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
15431da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
15441da177e4SLinus Torvalds
15451da177e4SLinus Torvaldsconfig CPU_R10000
15461da177e4SLinus Torvalds	bool "R10000"
15477cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
15485e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1549ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1550ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1551797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1552970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15531da177e4SLinus Torvalds	help
15541da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
15551da177e4SLinus Torvalds
15561da177e4SLinus Torvaldsconfig CPU_RM7000
15571da177e4SLinus Torvalds	bool "RM7000"
15587cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
15595e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1560ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1561ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1562797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1563970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15641da177e4SLinus Torvalds
15651da177e4SLinus Torvaldsconfig CPU_SB1
15661da177e4SLinus Torvalds	bool "SB1"
15677cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1568ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1569ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1570797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1571970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15720004a9dfSRalf Baechle	select WEAK_ORDERING
15731da177e4SLinus Torvalds
1574a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1575a86c7f72SDavid Daney	bool "Cavium Octeon processor"
15765e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1577a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1578a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1579a86c7f72SDavid Daney	select WEAK_ORDERING
1580a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
15819cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1582df115f3eSBen Hutchings	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1583df115f3eSBen Hutchings	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1584930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
1585a86c7f72SDavid Daney	help
1586a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1587a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1588a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1589a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1590a86c7f72SDavid Daney
1591cd746249SJonas Gorskiconfig CPU_BMIPS
1592cd746249SJonas Gorski	bool "Broadcom BMIPS"
1593cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1594cd746249SJonas Gorski	select CPU_MIPS32
1595fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1596cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1597cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1598cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1599cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1600cd746249SJonas Gorski	select DMA_NONCOHERENT
160167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1602cd746249SJonas Gorski	select SWAP_IO_SPACE
1603cd746249SJonas Gorski	select WEAK_ORDERING
1604c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
160569aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1606c1c0c461SKevin Cernekee	help
1607fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1608c1c0c461SKevin Cernekee
16097f058e85SJayachandran Cconfig CPU_XLR
16107f058e85SJayachandran C	bool "Netlogic XLR SoC"
16117f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
16127f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16137f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16147f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1615970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16167f058e85SJayachandran C	select WEAK_ORDERING
16177f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16187f058e85SJayachandran C	help
16197f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
16201c773ea4SJayachandran C
16211c773ea4SJayachandran Cconfig CPU_XLP
16221c773ea4SJayachandran C	bool "Netlogic XLP SoC"
16231c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
16241c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16251c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16261c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
16271c773ea4SJayachandran C	select WEAK_ORDERING
16281c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16291c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1630d6504846SJayachandran C	select CPU_MIPSR2
1631ddba6833SPrem Mallappa	select CPU_SUPPORTS_HUGEPAGES
16321c773ea4SJayachandran C	help
16331c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
16341da177e4SLinus Torvaldsendchoice
16351da177e4SLinus Torvalds
1636a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1637a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1638a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
16397fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1640a6e18781SLeonid Yegoshin	help
1641a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1642a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1643a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1644a6e18781SLeonid Yegoshin
1645a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1646a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1647a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1648a6e18781SLeonid Yegoshin	select EVA
1649a6e18781SLeonid Yegoshin	default y
1650a6e18781SLeonid Yegoshin	help
1651a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1652a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1653a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1654a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1655a6e18781SLeonid Yegoshin
1656c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES
1657c5b36783SSteven J. Hill	bool "MIPS32 Release 5 Features"
1658c5b36783SSteven J. Hill	depends on SYS_HAS_CPU_MIPS32_R5
1659c5b36783SSteven J. Hill	depends on CPU_MIPS32_R2
1660c5b36783SSteven J. Hill	help
1661c5b36783SSteven J. Hill	  Choose this option to build a kernel for release 2 or later of the
1662c5b36783SSteven J. Hill	  MIPS32 architecture including features from release 5 such as
1663c5b36783SSteven J. Hill	  support for Extended Physical Addressing (XPA).
1664c5b36783SSteven J. Hill
1665c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA
1666c5b36783SSteven J. Hill	bool "Extended Physical Addressing (XPA)"
1667c5b36783SSteven J. Hill	depends on CPU_MIPS32_R5_FEATURES
1668c5b36783SSteven J. Hill	depends on !EVA
1669c5b36783SSteven J. Hill	depends on !PAGE_SIZE_4KB
1670c5b36783SSteven J. Hill	depends on SYS_SUPPORTS_HIGHMEM
1671c5b36783SSteven J. Hill	select XPA
1672c5b36783SSteven J. Hill	select HIGHMEM
1673c5b36783SSteven J. Hill	select ARCH_PHYS_ADDR_T_64BIT
1674c5b36783SSteven J. Hill	default n
1675c5b36783SSteven J. Hill	help
1676c5b36783SSteven J. Hill	  Choose this option if you want to enable the Extended Physical
1677c5b36783SSteven J. Hill	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1678c5b36783SSteven J. Hill	  benefit is to increase physical addressing equal to or greater
1679c5b36783SSteven J. Hill	  than 40 bits. Note that this has the side effect of turning on
1680c5b36783SSteven J. Hill	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1681c5b36783SSteven J. Hill	  If unsure, say 'N' here.
1682c5b36783SSteven J. Hill
1683622844bfSWu Zhangjinif CPU_LOONGSON2F
1684622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1685622844bfSWu Zhangjin	bool
1686622844bfSWu Zhangjin
1687622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1688622844bfSWu Zhangjin	bool
1689622844bfSWu Zhangjin
1690622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1691622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1692622844bfSWu Zhangjin	default y
1693622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1694622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1695622844bfSWu Zhangjin	help
1696622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1697622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1698622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1699622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1700622844bfSWu Zhangjin
1701622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1702622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1703622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1704622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1705622844bfSWu Zhangjin	  systems.
1706622844bfSWu Zhangjin
1707622844bfSWu Zhangjin	  If unsure, please say Y.
1708622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1709622844bfSWu Zhangjin
17101b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
17111b93b3c3SWu Zhangjin	bool
17121b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
17131b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
171431c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
17151b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1716fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
17174e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
17181b93b3c3SWu Zhangjin
17191b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
17201b93b3c3SWu Zhangjin	bool
17211b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
17221b93b3c3SWu Zhangjin
17233702bba5SWu Zhangjinconfig CPU_LOONGSON2
17243702bba5SWu Zhangjin	bool
17253702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
17263702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
17273702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1728970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17293702bba5SWu Zhangjin
1730ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1731ca585cf9SKelvin Cheung	bool
1732ca585cf9SKelvin Cheung	select CPU_MIPS32
1733ca585cf9SKelvin Cheung	select CPU_MIPSR2
1734ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1735ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1736ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1737f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1738ca585cf9SKelvin Cheung
1739fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
174004fa8bf7SJonas Gorski	select SMP_UP if SMP
17411bbb6c1bSKevin Cernekee	bool
1742cd746249SJonas Gorski
1743cd746249SJonas Gorskiconfig CPU_BMIPS4350
1744cd746249SJonas Gorski	bool
1745cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1746cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1747cd746249SJonas Gorski
1748cd746249SJonas Gorskiconfig CPU_BMIPS4380
1749cd746249SJonas Gorski	bool
1750bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1751cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1752cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1753cd746249SJonas Gorski
1754cd746249SJonas Gorskiconfig CPU_BMIPS5000
1755cd746249SJonas Gorski	bool
1756cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1757bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1758cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1759cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
17601bbb6c1bSKevin Cernekee
17610e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
17620e476d91SHuacai Chen	bool
17630e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
17640e476d91SHuacai Chen
17653702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
17662a21c730SFuxin Zhang	bool
17672a21c730SFuxin Zhang
17686f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
17696f7a251aSWu Zhangjin	bool
177055045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
177155045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
177222f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
17736f7a251aSWu Zhangjin
1774ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1775ca585cf9SKelvin Cheung	bool
1776ca585cf9SKelvin Cheung
17777cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
17787cf8053bSRalf Baechle	bool
17797cf8053bSRalf Baechle
17807cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
17817cf8053bSRalf Baechle	bool
17827cf8053bSRalf Baechle
1783a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1784a6e18781SLeonid Yegoshin	bool
1785a6e18781SLeonid Yegoshin
1786c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5
1787c5b36783SSteven J. Hill	bool
1788c5b36783SSteven J. Hill
17897fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
17907fd08ca5SLeonid Yegoshin	bool
17917fd08ca5SLeonid Yegoshin
17927cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
17937cf8053bSRalf Baechle	bool
17947cf8053bSRalf Baechle
17957cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
17967cf8053bSRalf Baechle	bool
17977cf8053bSRalf Baechle
17987fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
17997fd08ca5SLeonid Yegoshin	bool
18007fd08ca5SLeonid Yegoshin
18017cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
18027cf8053bSRalf Baechle	bool
18037cf8053bSRalf Baechle
18047cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
18057cf8053bSRalf Baechle	bool
18067cf8053bSRalf Baechle
18077cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
18087cf8053bSRalf Baechle	bool
18097cf8053bSRalf Baechle
18107cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
18117cf8053bSRalf Baechle	bool
18127cf8053bSRalf Baechle
18137cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
18147cf8053bSRalf Baechle	bool
18157cf8053bSRalf Baechle
18167cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
18177cf8053bSRalf Baechle	bool
18187cf8053bSRalf Baechle
18197cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
18207cf8053bSRalf Baechle	bool
18217cf8053bSRalf Baechle
18227cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
18237cf8053bSRalf Baechle	bool
18247cf8053bSRalf Baechle
1825542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1826542c1020SShinya Kuribayashi	bool
1827542c1020SShinya Kuribayashi
18287cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
18297cf8053bSRalf Baechle	bool
18307cf8053bSRalf Baechle
18317cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
18327cf8053bSRalf Baechle	bool
18337cf8053bSRalf Baechle
18347cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
18357cf8053bSRalf Baechle	bool
18367cf8053bSRalf Baechle
18377cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
18387cf8053bSRalf Baechle	bool
18397cf8053bSRalf Baechle
18407cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
18417cf8053bSRalf Baechle	bool
18427cf8053bSRalf Baechle
18437cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
18447cf8053bSRalf Baechle	bool
18457cf8053bSRalf Baechle
18465e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
18475e683389SDavid Daney	bool
18485e683389SDavid Daney
1849cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1850c1c0c461SKevin Cernekee	bool
1851c1c0c461SKevin Cernekee
1852fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1853c1c0c461SKevin Cernekee	bool
1854cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1855c1c0c461SKevin Cernekee
1856c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1857c1c0c461SKevin Cernekee	bool
1858cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1859c1c0c461SKevin Cernekee
1860c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1861c1c0c461SKevin Cernekee	bool
1862cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1863c1c0c461SKevin Cernekee
1864c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1865c1c0c461SKevin Cernekee	bool
1866cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1867c1c0c461SKevin Cernekee
18687f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
18697f058e85SJayachandran C	bool
18707f058e85SJayachandran C
18711c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
18721c773ea4SJayachandran C	bool
18731c773ea4SJayachandran C
1874b6911bbaSPaul Burtonconfig MIPS_MALTA_PM
1875b6911bbaSPaul Burton	depends on MIPS_MALTA
1876b6911bbaSPaul Burton	depends on PCI
1877b6911bbaSPaul Burton	bool
1878b6911bbaSPaul Burton	default y
1879b6911bbaSPaul Burton
188017099b11SRalf Baechle#
188117099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
188217099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
188317099b11SRalf Baechle#
18840004a9dfSRalf Baechleconfig WEAK_ORDERING
18850004a9dfSRalf Baechle	bool
188617099b11SRalf Baechle
188717099b11SRalf Baechle#
188817099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
188917099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
189017099b11SRalf Baechle#
189117099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
189217099b11SRalf Baechle	bool
18935e83d430SRalf Baechleendmenu
18945e83d430SRalf Baechle
18955e83d430SRalf Baechle#
18965e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
18975e83d430SRalf Baechle#
18985e83d430SRalf Baechleconfig CPU_MIPS32
18995e83d430SRalf Baechle	bool
19007fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
19015e83d430SRalf Baechle
19025e83d430SRalf Baechleconfig CPU_MIPS64
19035e83d430SRalf Baechle	bool
19047fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
19055e83d430SRalf Baechle
19065e83d430SRalf Baechle#
1907c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
19085e83d430SRalf Baechle#
19095e83d430SRalf Baechleconfig CPU_MIPSR1
19105e83d430SRalf Baechle	bool
19115e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
19125e83d430SRalf Baechle
19135e83d430SRalf Baechleconfig CPU_MIPSR2
19145e83d430SRalf Baechle	bool
1915a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1916a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19175e83d430SRalf Baechle
19187fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
19197fd08ca5SLeonid Yegoshin	bool
19207fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1921a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19225e83d430SRalf Baechle
1923a6e18781SLeonid Yegoshinconfig EVA
1924a6e18781SLeonid Yegoshin	bool
1925a6e18781SLeonid Yegoshin
1926c5b36783SSteven J. Hillconfig XPA
1927c5b36783SSteven J. Hill	bool
1928c5b36783SSteven J. Hill
19295e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
19305e83d430SRalf Baechle	bool
19315e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
19325e83d430SRalf Baechle	bool
19335e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
19345e83d430SRalf Baechle	bool
19355e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
19365e83d430SRalf Baechle	bool
193755045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
193855045ff5SWu Zhangjin	bool
193955045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
194055045ff5SWu Zhangjin	bool
19419cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
19429cffd154SDavid Daney	bool
194322f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
194422f1fdfdSWu Zhangjin	bool
194582622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
194682622284SDavid Daney	bool
1947d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
19485e83d430SRalf Baechle
19498192c9eaSDavid Daney#
19508192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
19518192c9eaSDavid Daney#
19528192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
19538192c9eaSDavid Daney       bool
1954f839490aSDavid Daney       default y if CPU_MIPSR1 || CPU_MIPSR2
19558192c9eaSDavid Daney
19565e83d430SRalf Baechlemenu "Kernel type"
19575e83d430SRalf Baechle
19585e83d430SRalf Baechlechoice
19595e83d430SRalf Baechle	prompt "Kernel code model"
19605e83d430SRalf Baechle	help
19615e83d430SRalf Baechle	  You should only select this option if you have a workload that
19625e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
19635e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
19645e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
19655e83d430SRalf Baechle
19665e83d430SRalf Baechleconfig 32BIT
19675e83d430SRalf Baechle	bool "32-bit kernel"
19685e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
19695e83d430SRalf Baechle	select TRAD_SIGNALS
19705e83d430SRalf Baechle	help
19715e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
1972f17c4ca3SRalf Baechle
19735e83d430SRalf Baechleconfig 64BIT
19745e83d430SRalf Baechle	bool "64-bit kernel"
19755e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
19765e83d430SRalf Baechle	help
19775e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
19785e83d430SRalf Baechle
19795e83d430SRalf Baechleendchoice
19805e83d430SRalf Baechle
19812235a54dSSanjay Lalconfig KVM_GUEST
19822235a54dSSanjay Lal	bool "KVM Guest Kernel"
1983f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
19842235a54dSSanjay Lal	help
19852235a54dSSanjay Lal	  Select this option if building a guest kernel for KVM (Trap & Emulate) mode
19862235a54dSSanjay Lal
1987eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
1988eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
19892235a54dSSanjay Lal	depends on KVM_GUEST
1990eda3d33cSJames Hogan	default 100
19912235a54dSSanjay Lal	help
1992eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
1993eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
1994eda3d33cSJames Hogan	  timer frequency is specified directly.
19952235a54dSSanjay Lal
19961da177e4SLinus Torvaldschoice
19971da177e4SLinus Torvalds	prompt "Kernel page size"
19981da177e4SLinus Torvalds	default PAGE_SIZE_4KB
19991da177e4SLinus Torvalds
20001da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
20011da177e4SLinus Torvalds	bool "4kB"
20020e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
20031da177e4SLinus Torvalds	help
20041da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
20051da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
20061da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
20071da177e4SLinus Torvalds	 recommended for low memory systems.
20081da177e4SLinus Torvalds
20091da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
20101da177e4SLinus Torvalds	bool "8kB"
20117d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
20121da177e4SLinus Torvalds	help
20131da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
20141da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
2015c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
2016c52399beSRalf Baechle	  suitable Linux distribution to support this.
20171da177e4SLinus Torvalds
20181da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
20191da177e4SLinus Torvalds	bool "16kB"
2020714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
20211da177e4SLinus Torvalds	help
20221da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
20231da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
2024714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
2025714bfad6SRalf Baechle	  Linux distribution to support this.
20261da177e4SLinus Torvalds
2027c52399beSRalf Baechleconfig PAGE_SIZE_32KB
2028c52399beSRalf Baechle	bool "32kB"
2029c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
2030c52399beSRalf Baechle	help
2031c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
2032c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
2033c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
2034c52399beSRalf Baechle	  distribution to support this.
2035c52399beSRalf Baechle
20361da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
20371da177e4SLinus Torvalds	bool "64kB"
20387d60717eSKees Cook	depends on !CPU_R3000 && !CPU_TX39XX
20391da177e4SLinus Torvalds	help
20401da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
20411da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
20421da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
2043714bfad6SRalf Baechle	  writing this option is still high experimental.
20441da177e4SLinus Torvalds
20451da177e4SLinus Torvaldsendchoice
20461da177e4SLinus Torvalds
2047c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
2048c9bace7cSDavid Daney	int "Maximum zone order"
2049e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2050e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2051e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2052e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2053e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2054e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2055c9bace7cSDavid Daney	range 11 64
2056c9bace7cSDavid Daney	default "11"
2057c9bace7cSDavid Daney	help
2058c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
2059c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
2060c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
2061c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2062c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2063c9bace7cSDavid Daney	  increase this value.
2064c9bace7cSDavid Daney
2065c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2066c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2067c9bace7cSDavid Daney
2068c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2069c9bace7cSDavid Daney	  when choosing a value for this option.
2070c9bace7cSDavid Daney
20711da177e4SLinus Torvaldsconfig BOARD_SCACHE
20721da177e4SLinus Torvalds	bool
20731da177e4SLinus Torvalds
20741da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
20751da177e4SLinus Torvalds	bool
20761da177e4SLinus Torvalds	select BOARD_SCACHE
20771da177e4SLinus Torvalds
20789318c51aSChris Dearman#
20799318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
20809318c51aSChris Dearman#
20819318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
20829318c51aSChris Dearman	bool
20839318c51aSChris Dearman	select BOARD_SCACHE
20849318c51aSChris Dearman
20851da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
20861da177e4SLinus Torvalds	bool
20871da177e4SLinus Torvalds	select BOARD_SCACHE
20881da177e4SLinus Torvalds
20891da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
20901da177e4SLinus Torvalds	bool
20911da177e4SLinus Torvalds	select BOARD_SCACHE
20921da177e4SLinus Torvalds
20931da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
20941da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
20951da177e4SLinus Torvalds	depends on CPU_SB1
20961da177e4SLinus Torvalds	help
20971da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
20981da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
20991da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
21001da177e4SLinus Torvalds
21011da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2102c8094b53SRalf Baechle	bool
21031da177e4SLinus Torvalds
21043165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
21053165c846SFlorian Fainelli	bool
21063165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
21073165c846SFlorian Fainelli
210891405eb6SFlorian Fainelliconfig CPU_R4K_FPU
210991405eb6SFlorian Fainelli	bool
211091405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
211191405eb6SFlorian Fainelli
211262cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
211362cedc4fSFlorian Fainelli	bool
211462cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
211562cedc4fSFlorian Fainelli
211659d6ab86SRalf Baechleconfig MIPS_MT_SMP
2117a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
21185676319cSMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
211959d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2120d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2121c080faa5SSteven J. Hill	select SYNC_R4K
21220c2cb004SPaul Burton	select MIPS_GIC_IPI
212359d6ab86SRalf Baechle	select MIPS_MT
212459d6ab86SRalf Baechle	select SMP
212587353d8aSRalf Baechle	select SMP_UP
2126c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2127c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2128399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
212959d6ab86SRalf Baechle	help
2130c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2131c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2132c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2133c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2134c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
213559d6ab86SRalf Baechle
2136f41ae0b2SRalf Baechleconfig MIPS_MT
2137f41ae0b2SRalf Baechle	bool
2138f41ae0b2SRalf Baechle
21390ab7aefcSRalf Baechleconfig SCHED_SMT
21400ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
21410ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
21420ab7aefcSRalf Baechle	default n
21430ab7aefcSRalf Baechle	help
21440ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
21450ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
21460ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
21470ab7aefcSRalf Baechle
21480ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
21490ab7aefcSRalf Baechle	bool
21500ab7aefcSRalf Baechle
2151f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2152f41ae0b2SRalf Baechle	bool
2153f41ae0b2SRalf Baechle
2154f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2155f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2156f088fc84SRalf Baechle	default y
2157b633648cSRalf Baechle	depends on MIPS_MT_SMP
215807cc0c9eSRalf Baechle
2159b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2160b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
2161b0a668fbSLeonid Yegoshin	depends on CPU_MIPSR6 && !SMP
2162b0a668fbSLeonid Yegoshin	default y
2163b0a668fbSLeonid Yegoshin	help
2164b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2165b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
216607edf0d4SMarkos Chandras	  default. You can enable it using the 'mipsr2emu' kernel option.
2167b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2168b0a668fbSLeonid Yegoshin	  final kernel image.
2169b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels"
2170b0a668fbSLeonid Yegoshin	depends on SMP && CPU_MIPSR6
2171b0a668fbSLeonid Yegoshin
217207cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
217307cc0c9eSRalf Baechle	bool "VPE loader support."
2174704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
217507cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
217607cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
217707cc0c9eSRalf Baechle	select MIPS_MT
217807cc0c9eSRalf Baechle	help
217907cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
218007cc0c9eSRalf Baechle	  onto another VPE and running it.
2181f088fc84SRalf Baechle
218217a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
218317a1d523SDeng-Cheng Zhu	bool
218417a1d523SDeng-Cheng Zhu	default "y"
218517a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
218617a1d523SDeng-Cheng Zhu
21871a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
21881a2a6d7eSDeng-Cheng Zhu	bool
21891a2a6d7eSDeng-Cheng Zhu	default "y"
21901a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
21911a2a6d7eSDeng-Cheng Zhu
2192e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2193e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2194e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2195e01402b1SRalf Baechle	default y
2196e01402b1SRalf Baechle	help
2197e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2198e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2199e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2200e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2201e01402b1SRalf Baechle
2202e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2203e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2204e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
22055e83d430SRalf Baechle	help
2206e01402b1SRalf Baechle
2207da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2208da615cf6SDeng-Cheng Zhu	bool
2209da615cf6SDeng-Cheng Zhu	default "y"
2210da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2211da615cf6SDeng-Cheng Zhu
22122c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
22132c973ef0SDeng-Cheng Zhu	bool
22142c973ef0SDeng-Cheng Zhu	default "y"
22152c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
22162c973ef0SDeng-Cheng Zhu
22174a16ff4cSRalf Baechleconfig MIPS_CMP
22185cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
22195676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
222072e20142SPaul Burton	select MIPS_GIC_IPI
2221b10b43baSMarkos Chandras	select SMP
2222eb9b5141STim Anderson	select SYNC_R4K
2223b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
22244a16ff4cSRalf Baechle	select WEAK_ORDERING
22254a16ff4cSRalf Baechle	default n
22264a16ff4cSRalf Baechle	help
2227044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2228044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2229044505c7SPaul Burton	  its ability to start secondary CPUs.
22304a16ff4cSRalf Baechle
22315cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
22325cac93b3SPaul Burton	  instead of this.
22335cac93b3SPaul Burton
22340ee958e1SPaul Burtonconfig MIPS_CPS
22350ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
22365676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CPS && !CPU_MIPSR6
22370ee958e1SPaul Burton	select MIPS_CM
22380ee958e1SPaul Burton	select MIPS_CPC
22391d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
22400ee958e1SPaul Burton	select MIPS_GIC_IPI
22410ee958e1SPaul Burton	select SMP
22420ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
22431d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
22440ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
22450ee958e1SPaul Burton	select WEAK_ORDERING
22460ee958e1SPaul Burton	help
22470ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
22480ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
22490ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
22500ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
22510ee958e1SPaul Burton	  support is unavailable.
22520ee958e1SPaul Burton
22533179d37eSPaul Burtonconfig MIPS_CPS_PM
225439a59593SMarkos Chandras	depends on MIPS_CPS
2255a8b84677SPaul Burton	select MIPS_CPC
22563179d37eSPaul Burton	bool
22573179d37eSPaul Burton
225872e20142SPaul Burtonconfig MIPS_GIC_IPI
225972e20142SPaul Burton	bool
226072e20142SPaul Burton
22619f98f3ddSPaul Burtonconfig MIPS_CM
22629f98f3ddSPaul Burton	bool
22639f98f3ddSPaul Burton
22649c38cf44SPaul Burtonconfig MIPS_CPC
22659c38cf44SPaul Burton	bool
22662600990eSRalf Baechle
22671da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
22681da177e4SLinus Torvalds	bool
22691da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
22701da177e4SLinus Torvalds	default y
22711da177e4SLinus Torvalds
22721da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
22731da177e4SLinus Torvalds	bool
22741da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
22751da177e4SLinus Torvalds	default y
22761da177e4SLinus Torvalds
22772235a54dSSanjay Lal
227860ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
227934adb28dSRalf Baechle       bool
228060ec6571Spascal@pabr.org
22819e2b5372SMarkos Chandraschoice
22829e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
22839e2b5372SMarkos Chandras
22849e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
22859e2b5372SMarkos Chandras	bool "None"
22869e2b5372SMarkos Chandras	help
22879e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
22889e2b5372SMarkos Chandras
22899693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
22909693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
22919e2b5372SMarkos Chandras	bool "SmartMIPS"
22929693a853SFranck Bui-Huu	help
22939693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
22949693a853SFranck Bui-Huu	  increased security at both hardware and software level for
22959693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
22969693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
22979693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
22989693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
22999693a853SFranck Bui-Huu	  here.
23009693a853SFranck Bui-Huu
2301bce86083SSteven J. Hillconfig CPU_MICROMIPS
23027fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
23039e2b5372SMarkos Chandras	bool "microMIPS"
2304bce86083SSteven J. Hill	help
2305bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2306bce86083SSteven J. Hill	  microMIPS ISA
2307bce86083SSteven J. Hill
23089e2b5372SMarkos Chandrasendchoice
23099e2b5372SMarkos Chandras
2310a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
23110ce3417eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2312a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
23132a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2314a5e9a69eSPaul Burton	help
2315a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2316a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
23171db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
23181db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
23191db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
23201db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
23211db1af84SPaul Burton	  the size & complexity of your kernel.
2322a5e9a69eSPaul Burton
2323a5e9a69eSPaul Burton	  If unsure, say Y.
2324a5e9a69eSPaul Burton
23251da177e4SLinus Torvaldsconfig CPU_HAS_WB
2326f7062ddbSRalf Baechle	bool
2327e01402b1SRalf Baechle
2328df0ac8a4SKevin Cernekeeconfig XKS01
2329df0ac8a4SKevin Cernekee	bool
2330df0ac8a4SKevin Cernekee
2331f41ae0b2SRalf Baechle#
2332f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2333f41ae0b2SRalf Baechle#
2334e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2335f41ae0b2SRalf Baechle	bool
2336e01402b1SRalf Baechle
2337f41ae0b2SRalf Baechle#
2338f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2339f41ae0b2SRalf Baechle#
2340e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2341f41ae0b2SRalf Baechle	bool
2342e01402b1SRalf Baechle
23431da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
23441da177e4SLinus Torvalds	bool
23451da177e4SLinus Torvalds	depends on !CPU_R3000
23461da177e4SLinus Torvalds	default y
23471da177e4SLinus Torvalds
23481da177e4SLinus Torvalds#
234920d60d99SMaciej W. Rozycki# CPU non-features
235020d60d99SMaciej W. Rozycki#
235120d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
235220d60d99SMaciej W. Rozycki	bool
235320d60d99SMaciej W. Rozycki
235420d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
235520d60d99SMaciej W. Rozycki	bool
235620d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
235720d60d99SMaciej W. Rozycki
235820d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
235920d60d99SMaciej W. Rozycki	bool
236020d60d99SMaciej W. Rozycki
236120d60d99SMaciej W. Rozycki#
23621da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
23631da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
23641da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
23651da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
23661da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
23671da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
23681da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
23691da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2370797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2371797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2372797798c1SRalf Baechle#   support.
23731da177e4SLinus Torvalds#
23741da177e4SLinus Torvaldsconfig HIGHMEM
23751da177e4SLinus Torvalds	bool "High Memory Support"
2376a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2377797798c1SRalf Baechle
2378797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2379797798c1SRalf Baechle	bool
2380797798c1SRalf Baechle
2381797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2382797798c1SRalf Baechle	bool
23831da177e4SLinus Torvalds
23849693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
23859693a853SFranck Bui-Huu	bool
23869693a853SFranck Bui-Huu
2387a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2388a6a4834cSSteven J. Hill	bool
2389a6a4834cSSteven J. Hill
2390377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2391377cb1b6SRalf Baechle	bool
2392377cb1b6SRalf Baechle	help
2393377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2394377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2395377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2396377cb1b6SRalf Baechle
2397a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2398a5e9a69eSPaul Burton	bool
2399a5e9a69eSPaul Burton
2400b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2401b4819b59SYoichi Yuasa	def_bool y
2402f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2403b4819b59SYoichi Yuasa
2404d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2405d8cb4e11SRalf Baechle	bool
2406d8cb4e11SRalf Baechle	default y if SGI_IP27
2407d8cb4e11SRalf Baechle	help
24083dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2409d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2410d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2411d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2412d8cb4e11SRalf Baechle
2413b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2414b1c6cd42SAtsushi Nemoto	bool
24157de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
241631473747SAtsushi Nemoto
2417d8cb4e11SRalf Baechleconfig NUMA
2418d8cb4e11SRalf Baechle	bool "NUMA Support"
2419d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2420d8cb4e11SRalf Baechle	help
2421d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2422d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2423d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2424d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2425d8cb4e11SRalf Baechle	  disabled.
2426d8cb4e11SRalf Baechle
2427d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2428d8cb4e11SRalf Baechle	bool
2429d8cb4e11SRalf Baechle
2430c80d79d7SYasunori Gotoconfig NODES_SHIFT
2431c80d79d7SYasunori Goto	int
2432c80d79d7SYasunori Goto	default "6"
2433c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2434c80d79d7SYasunori Goto
243514f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
243614f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
2437f14ceff7SHuacai Chen	depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
243814f70012SDeng-Cheng Zhu	default y
243914f70012SDeng-Cheng Zhu	help
244014f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
244114f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
244214f70012SDeng-Cheng Zhu
2443b4819b59SYoichi Yuasasource "mm/Kconfig"
2444b4819b59SYoichi Yuasa
24451da177e4SLinus Torvaldsconfig SMP
24461da177e4SLinus Torvalds	bool "Multi-Processing support"
2447e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2448e73ea273SRalf Baechle	help
24491da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
24504a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
24514a474157SRobert Graffham	  than one CPU, say Y.
24521da177e4SLinus Torvalds
24534a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
24541da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
24551da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
24564a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
24571da177e4SLinus Torvalds	  will run faster if you say N here.
24581da177e4SLinus Torvalds
24591da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
24601da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
24611da177e4SLinus Torvalds
246203502faaSAdrian Bunk	  See also the SMP-HOWTO available at
246303502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
24641da177e4SLinus Torvalds
24651da177e4SLinus Torvalds	  If you don't know what to do here, say N.
24661da177e4SLinus Torvalds
246787353d8aSRalf Baechleconfig SMP_UP
246887353d8aSRalf Baechle	bool
246987353d8aSRalf Baechle
24704a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
24714a16ff4cSRalf Baechle	bool
24724a16ff4cSRalf Baechle
24730ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
24740ee958e1SPaul Burton	bool
24750ee958e1SPaul Burton
2476e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2477e73ea273SRalf Baechle	bool
2478e73ea273SRalf Baechle
2479130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2480130e2fb7SRalf Baechle	bool
2481130e2fb7SRalf Baechle
2482130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2483130e2fb7SRalf Baechle	bool
2484130e2fb7SRalf Baechle
2485130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2486130e2fb7SRalf Baechle	bool
2487130e2fb7SRalf Baechle
2488130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2489130e2fb7SRalf Baechle	bool
2490130e2fb7SRalf Baechle
2491130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2492130e2fb7SRalf Baechle	bool
2493130e2fb7SRalf Baechle
24941da177e4SLinus Torvaldsconfig NR_CPUS
2495a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2496a91796a9SJayachandran C	range 2 256
24971da177e4SLinus Torvalds	depends on SMP
2498130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2499130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2500130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2501130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2502130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
25031da177e4SLinus Torvalds	help
25041da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
25051da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
25061da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
250772ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
250872ede9b1SAtsushi Nemoto	  and 2 for all others.
25091da177e4SLinus Torvalds
25101da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
251172ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
251272ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
251372ede9b1SAtsushi Nemoto	  power of two.
25141da177e4SLinus Torvalds
2515399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2516399aaa25SAl Cooper	bool
2517399aaa25SAl Cooper
25181723b4a3SAtsushi Nemoto#
25191723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
25201723b4a3SAtsushi Nemoto#
25211723b4a3SAtsushi Nemoto
25221723b4a3SAtsushi Nemotochoice
25231723b4a3SAtsushi Nemoto	prompt "Timer frequency"
25241723b4a3SAtsushi Nemoto	default HZ_250
25251723b4a3SAtsushi Nemoto	help
25261723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
25271723b4a3SAtsushi Nemoto
25281723b4a3SAtsushi Nemoto	config HZ_48
25290f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
25301723b4a3SAtsushi Nemoto
25311723b4a3SAtsushi Nemoto	config HZ_100
25321723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
25331723b4a3SAtsushi Nemoto
25341723b4a3SAtsushi Nemoto	config HZ_128
25351723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
25361723b4a3SAtsushi Nemoto
25371723b4a3SAtsushi Nemoto	config HZ_250
25381723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
25391723b4a3SAtsushi Nemoto
25401723b4a3SAtsushi Nemoto	config HZ_256
25411723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
25421723b4a3SAtsushi Nemoto
25431723b4a3SAtsushi Nemoto	config HZ_1000
25441723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
25451723b4a3SAtsushi Nemoto
25461723b4a3SAtsushi Nemoto	config HZ_1024
25471723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
25481723b4a3SAtsushi Nemoto
25491723b4a3SAtsushi Nemotoendchoice
25501723b4a3SAtsushi Nemoto
25511723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
25521723b4a3SAtsushi Nemoto	bool
25531723b4a3SAtsushi Nemoto
25541723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
25551723b4a3SAtsushi Nemoto	bool
25561723b4a3SAtsushi Nemoto
25571723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
25581723b4a3SAtsushi Nemoto	bool
25591723b4a3SAtsushi Nemoto
25601723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
25611723b4a3SAtsushi Nemoto	bool
25621723b4a3SAtsushi Nemoto
25631723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
25641723b4a3SAtsushi Nemoto	bool
25651723b4a3SAtsushi Nemoto
25661723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
25671723b4a3SAtsushi Nemoto	bool
25681723b4a3SAtsushi Nemoto
25691723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
25701723b4a3SAtsushi Nemoto	bool
25711723b4a3SAtsushi Nemoto
25721723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
25731723b4a3SAtsushi Nemoto	bool
25741723b4a3SAtsushi Nemoto	default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
25751723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
25761723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
25771723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
25781723b4a3SAtsushi Nemoto
25791723b4a3SAtsushi Nemotoconfig HZ
25801723b4a3SAtsushi Nemoto	int
25811723b4a3SAtsushi Nemoto	default 48 if HZ_48
25821723b4a3SAtsushi Nemoto	default 100 if HZ_100
25831723b4a3SAtsushi Nemoto	default 128 if HZ_128
25841723b4a3SAtsushi Nemoto	default 250 if HZ_250
25851723b4a3SAtsushi Nemoto	default 256 if HZ_256
25861723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
25871723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
25881723b4a3SAtsushi Nemoto
258996685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
259096685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
259196685b17SDeng-Cheng Zhu
2592e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
25931da177e4SLinus Torvalds
2594ea6e942bSAtsushi Nemotoconfig KEXEC
25957d60717eSKees Cook	bool "Kexec system call"
2596ea6e942bSAtsushi Nemoto	help
2597ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2598ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
25993dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2600ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2601ea6e942bSAtsushi Nemoto
260201dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2603ea6e942bSAtsushi Nemoto
2604ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2605ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2606bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2607bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2608bf220695SGeert Uytterhoeven	  made.
2609ea6e942bSAtsushi Nemoto
26107aa1c8f4SRalf Baechleconfig CRASH_DUMP
26117aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
26127aa1c8f4SRalf Baechle	  help
26137aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
26147aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
26157aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
26167aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
26177aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
26187aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
26197aa1c8f4SRalf Baechle	  PHYSICAL_START.
26207aa1c8f4SRalf Baechle
26217aa1c8f4SRalf Baechleconfig PHYSICAL_START
26227aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
26237aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
26247aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
26257aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
26267aa1c8f4SRalf Baechle	  help
26277aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
26287aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
26297aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
26307aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
26317aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
26327aa1c8f4SRalf Baechle
2633ea6e942bSAtsushi Nemotoconfig SECCOMP
2634ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2635293c5bd1SRalf Baechle	depends on PROC_FS
2636ea6e942bSAtsushi Nemoto	default y
2637ea6e942bSAtsushi Nemoto	help
2638ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2639ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2640ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2641ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2642ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2643ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2644ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2645ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2646ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2647ea6e942bSAtsushi Nemoto
2648ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2649ea6e942bSAtsushi Nemoto
2650597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
26510ce3417eSPaul Burton	bool "Support for O32 binaries using 64-bit FP"
2652597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2653597ce172SPaul Burton	help
2654597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2655597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2656597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2657597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2658597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2659597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2660597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2661597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2662597ce172SPaul Burton	  saying N here.
2663597ce172SPaul Burton
266406e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
266506e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
266606e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
266706e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
266806e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
266906e2e882SPaul Burton	  said details.
267006e2e882SPaul Burton
267106e2e882SPaul Burton	  If unsure, say N.
2672597ce172SPaul Burton
2673f2ffa5abSDezhong Diaoconfig USE_OF
26740b3e06fdSJonas Gorski	bool
2675f2ffa5abSDezhong Diao	select OF
2676e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2677abd2363fSGrant Likely	select IRQ_DOMAIN
2678f2ffa5abSDezhong Diao
26797fafb068SAndrew Brestickerconfig BUILTIN_DTB
26807fafb068SAndrew Bresticker	bool
26817fafb068SAndrew Bresticker
26821da8f179SJonas Gorskichoice
26831da8f179SJonas Gorski	prompt "Kernel appended dtb support" if OF
26841da8f179SJonas Gorski	default MIPS_NO_APPENDED_DTB
26851da8f179SJonas Gorski
26861da8f179SJonas Gorski	config MIPS_NO_APPENDED_DTB
26871da8f179SJonas Gorski		bool "None"
26881da8f179SJonas Gorski		help
26891da8f179SJonas Gorski		  Do not enable appended dtb support.
26901da8f179SJonas Gorski
26911da8f179SJonas Gorski	config MIPS_RAW_APPENDED_DTB
26921da8f179SJonas Gorski		bool "vmlinux.bin"
26931da8f179SJonas Gorski		help
26941da8f179SJonas Gorski		  With this option, the boot code will look for a device tree binary
26951da8f179SJonas Gorski		  DTB) appended to raw vmlinux.bin (without decompressor).
26961da8f179SJonas Gorski		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
26971da8f179SJonas Gorski
26981da8f179SJonas Gorski		  This is meant as a backward compatibility convenience for those
26991da8f179SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
27001da8f179SJonas Gorski		  the documented boot protocol using a device tree.
27011da8f179SJonas Gorski
27021da8f179SJonas Gorski		  Beware that there is very little in terms of protection against
27031da8f179SJonas Gorski		  this option being confused by leftover garbage in memory that might
27041da8f179SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
27051da8f179SJonas Gorski		  to vmlinux.bin.  Do not leave this option active in a production kernel
27061da8f179SJonas Gorski		  if you don't intend to always append a DTB.
2707c0b4e101SJonas Gorski
2708c0b4e101SJonas Gorski	config MIPS_ZBOOT_APPENDED_DTB
2709c0b4e101SJonas Gorski		bool "vmlinuz.bin"
2710c0b4e101SJonas Gorski		depends on SYS_SUPPORTS_ZBOOT
2711c0b4e101SJonas Gorski		help
2712c0b4e101SJonas Gorski		  With this option, the boot code will look for a device tree binary
2713c0b4e101SJonas Gorski		  DTB) appended to raw vmlinuz.bin (with decompressor).
2714c0b4e101SJonas Gorski		  (e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb).
2715c0b4e101SJonas Gorski
2716c0b4e101SJonas Gorski		  This is meant as a backward compatibility convenience for those
2717c0b4e101SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
2718c0b4e101SJonas Gorski		  the documented boot protocol using a device tree.
2719c0b4e101SJonas Gorski
2720c0b4e101SJonas Gorski		  Beware that there is very little in terms of protection against
2721c0b4e101SJonas Gorski		  this option being confused by leftover garbage in memory that might
2722c0b4e101SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
2723c0b4e101SJonas Gorski		  to vmlinuz.bin.  Do not leave this option active in a production kernel
2724c0b4e101SJonas Gorski		  if you don't intend to always append a DTB.
27251da8f179SJonas Gorskiendchoice
27261da8f179SJonas Gorski
27275e83d430SRalf Baechleendmenu
27285e83d430SRalf Baechle
27291df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
27301df0f0ffSAtsushi Nemoto	bool
27311df0f0ffSAtsushi Nemoto	default y
27321df0f0ffSAtsushi Nemoto
27331df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
27341df0f0ffSAtsushi Nemoto	bool
27351df0f0ffSAtsushi Nemoto	default y
27361df0f0ffSAtsushi Nemoto
2737a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS
2738a728ab52SKirill A. Shutemov	int
2739a728ab52SKirill A. Shutemov	default 3 if 64BIT && !PAGE_SIZE_64KB
2740a728ab52SKirill A. Shutemov	default 2
2741a728ab52SKirill A. Shutemov
2742b6c3539bSRalf Baechlesource "init/Kconfig"
2743b6c3539bSRalf Baechle
2744dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2745dc52ddc0SMatt Helsley
27461da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
27471da177e4SLinus Torvalds
27485e83d430SRalf Baechleconfig HW_HAS_EISA
27495e83d430SRalf Baechle	bool
27501da177e4SLinus Torvaldsconfig HW_HAS_PCI
27511da177e4SLinus Torvalds	bool
27521da177e4SLinus Torvalds
27531da177e4SLinus Torvaldsconfig PCI
27541da177e4SLinus Torvalds	bool "Support for PCI controller"
27551da177e4SLinus Torvalds	depends on HW_HAS_PCI
2756abb4ae46SRalf Baechle	select PCI_DOMAINS
27570f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
27581da177e4SLinus Torvalds	help
27591da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
27601da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
27611da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
27621da177e4SLinus Torvalds	  say Y, otherwise N.
27631da177e4SLinus Torvalds
27640e476d91SHuacai Chenconfig HT_PCI
27650e476d91SHuacai Chen	bool "Support for HT-linked PCI"
27660e476d91SHuacai Chen	default y
27670e476d91SHuacai Chen	depends on CPU_LOONGSON3
27680e476d91SHuacai Chen	select PCI
27690e476d91SHuacai Chen	select PCI_DOMAINS
27700e476d91SHuacai Chen	help
27710e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
27720e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
27730e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
27740e476d91SHuacai Chen
27751da177e4SLinus Torvaldsconfig PCI_DOMAINS
27761da177e4SLinus Torvalds	bool
27771da177e4SLinus Torvalds
27781da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
27791da177e4SLinus Torvalds
27803f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig"
27813f787ca4SJonas Gorski
27821da177e4SLinus Torvalds#
27831da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
27841da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
27851da177e4SLinus Torvalds# users to choose the right thing ...
27861da177e4SLinus Torvalds#
27871da177e4SLinus Torvaldsconfig ISA
27881da177e4SLinus Torvalds	bool
27891da177e4SLinus Torvalds
27901da177e4SLinus Torvaldsconfig EISA
27911da177e4SLinus Torvalds	bool "EISA support"
27925e83d430SRalf Baechle	depends on HW_HAS_EISA
27931da177e4SLinus Torvalds	select ISA
2794aa414dffSRalf Baechle	select GENERIC_ISA_DMA
27951da177e4SLinus Torvalds	---help---
27961da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
27971da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
27981da177e4SLinus Torvalds
27991da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
28001da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
28011da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
28021da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
28031da177e4SLinus Torvalds
28041da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
28051da177e4SLinus Torvalds
28061da177e4SLinus Torvalds	  Otherwise, say N.
28071da177e4SLinus Torvalds
28081da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
28091da177e4SLinus Torvalds
28101da177e4SLinus Torvaldsconfig TC
28111da177e4SLinus Torvalds	bool "TURBOchannel support"
28121da177e4SLinus Torvalds	depends on MACH_DECSTATION
28131da177e4SLinus Torvalds	help
281450a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
281550a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
281650a23e6eSJustin P. Mattock	  at:
281750a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
281850a23e6eSJustin P. Mattock	  and:
281950a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
282050a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
282150a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
28221da177e4SLinus Torvalds
28231da177e4SLinus Torvaldsconfig MMU
28241da177e4SLinus Torvalds	bool
28251da177e4SLinus Torvalds	default y
28261da177e4SLinus Torvalds
2827d865bea4SRalf Baechleconfig I8253
2828d865bea4SRalf Baechle	bool
2829798778b8SRussell King	select CLKSRC_I8253
28302d02612fSThomas Gleixner	select CLKEVT_I8253
28319726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
2832d865bea4SRalf Baechle
2833e05eb3f8SRalf Baechleconfig ZONE_DMA
2834e05eb3f8SRalf Baechle	bool
2835e05eb3f8SRalf Baechle
2836cce335aeSRalf Baechleconfig ZONE_DMA32
2837cce335aeSRalf Baechle	bool
2838cce335aeSRalf Baechle
28391da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
28401da177e4SLinus Torvalds
28411da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig"
28421da177e4SLinus Torvalds
2843388b78adSAlexandre Bounineconfig RAPIDIO
284456abde72SAlexandre Bounine	tristate "RapidIO support"
2845388b78adSAlexandre Bounine	depends on PCI
2846388b78adSAlexandre Bounine	default n
2847388b78adSAlexandre Bounine	help
2848388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
2849388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
2850388b78adSAlexandre Bounine
2851388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
2852388b78adSAlexandre Bounine
28531da177e4SLinus Torvaldsendmenu
28541da177e4SLinus Torvalds
28551da177e4SLinus Torvaldsmenu "Executable file formats"
28561da177e4SLinus Torvalds
28571da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
28581da177e4SLinus Torvalds
28591da177e4SLinus Torvaldsconfig TRAD_SIGNALS
28601da177e4SLinus Torvalds	bool
28611da177e4SLinus Torvalds
28621da177e4SLinus Torvaldsconfig MIPS32_COMPAT
286378aaf956SRalf Baechle	bool
28641da177e4SLinus Torvalds
28651da177e4SLinus Torvaldsconfig COMPAT
28661da177e4SLinus Torvalds	bool
28671da177e4SLinus Torvalds
286805e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
286905e43966SAtsushi Nemoto	bool
287005e43966SAtsushi Nemoto
28711da177e4SLinus Torvaldsconfig MIPS32_O32
28721da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
287378aaf956SRalf Baechle	depends on 64BIT
287478aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
287578aaf956SRalf Baechle	select COMPAT
287678aaf956SRalf Baechle	select MIPS32_COMPAT
287778aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
28781da177e4SLinus Torvalds	help
28791da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
28801da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
28811da177e4SLinus Torvalds	  existing binaries are in this format.
28821da177e4SLinus Torvalds
28831da177e4SLinus Torvalds	  If unsure, say Y.
28841da177e4SLinus Torvalds
28851da177e4SLinus Torvaldsconfig MIPS32_N32
28861da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
2887c22eacfeSRalf Baechle	depends on 64BIT
288878aaf956SRalf Baechle	select COMPAT
288978aaf956SRalf Baechle	select MIPS32_COMPAT
289078aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
28911da177e4SLinus Torvalds	help
28921da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
28931da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
28941da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
28951da177e4SLinus Torvalds	  cases.
28961da177e4SLinus Torvalds
28971da177e4SLinus Torvalds	  If unsure, say N.
28981da177e4SLinus Torvalds
28991da177e4SLinus Torvaldsconfig BINFMT_ELF32
29001da177e4SLinus Torvalds	bool
29011da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
29021da177e4SLinus Torvalds
29032116245eSRalf Baechleendmenu
29041da177e4SLinus Torvalds
29052116245eSRalf Baechlemenu "Power management options"
2906952fa954SRodolfo Giometti
2907363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
2908363c55caSWu Zhangjin	def_bool y
29093f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2910363c55caSWu Zhangjin
2911f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
2912f4cb5700SJohannes Berg	def_bool y
29133f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2914f4cb5700SJohannes Berg
29152116245eSRalf Baechlesource "kernel/power/Kconfig"
2916952fa954SRodolfo Giometti
29171da177e4SLinus Torvaldsendmenu
29181da177e4SLinus Torvalds
29197a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
29207a998935SViresh Kumar	bool
29217a998935SViresh Kumar
29227a998935SViresh Kumarmenu "CPU Power Management"
2923c095ebafSPaul Burton
2924c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
29257a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
29267a998935SViresh Kumarendif
29279726b43aSWu Zhangjin
2928c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
2929c095ebafSPaul Burton
2930c095ebafSPaul Burtonendmenu
2931c095ebafSPaul Burton
2932d5950b43SSam Ravnborgsource "net/Kconfig"
2933d5950b43SSam Ravnborg
29341da177e4SLinus Torvaldssource "drivers/Kconfig"
29351da177e4SLinus Torvalds
293698cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
293798cdee0eSRalf Baechle
29381da177e4SLinus Torvaldssource "fs/Kconfig"
29391da177e4SLinus Torvalds
29401da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
29411da177e4SLinus Torvalds
29421da177e4SLinus Torvaldssource "security/Kconfig"
29431da177e4SLinus Torvalds
29441da177e4SLinus Torvaldssource "crypto/Kconfig"
29451da177e4SLinus Torvalds
29461da177e4SLinus Torvaldssource "lib/Kconfig"
29472235a54dSSanjay Lal
29482235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
2949