11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 5393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 6c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 7f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 8ec7748b5SSam Ravnborg select HAVE_IDE 942d4b839SMathieu Desnoyers select HAVE_OPROFILE 107f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 117f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1288547001SJason Wessel select HAVE_ARCH_KGDB 13490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 14c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 153f5fdb4bSMarkos Chandras select HAVE_BPF_JIT if !CPU_MICROMIPS 167563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 17d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 18538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 19538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2064575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2129c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 22c1bf207dSDavid Daney select HAVE_KPROBES 23c1bf207dSDavid Daney select HAVE_KRETPROBES 24b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 251d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 26e26d196cSDavid Daney select ARCH_BINFMT_ELF_RANDOMIZE_PIE 27383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 2821a41faaSWu Zhangjin select RTC_LIB if !MACH_LOONGSON 292b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 307463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3148e1fd5aSDavid Daney select HAVE_DMA_ATTRS 32f4649382SZubair Lutfullah Kakakhel select HAVE_DMA_CONTIGUOUS 3348e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 343bd27e32SDavid Daney select GENERIC_IRQ_PROBE 35f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3678857614SMarkos Chandras select GENERIC_PCI_IOMAP 3794bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 38c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 390f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 409d15ffc8STejun Heo select HAVE_MEMBLOCK 419d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 429d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 43360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 444b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 45cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 46929de4ccSDeng-Cheng Zhu select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 47cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 48786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 494febd95aSStephen Rothwell select VIRT_TO_BUS 502f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 512f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5250150d2bSAl Viro select CLONE_BACKWARDS 53d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5419952a92SKees Cook select HAVE_CC_STACKPROTECTOR 55b1d4c6caSJames Hogan select CPU_PM if CPU_IDLE 56cc7964afSPaul Burton select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 5790cee759SPaul Burton select ARCH_BINFMT_ELF_STATE 58d79d853dSMarkos Chandras select SYSCTL_EXCEPTION_TRACE 59bb877e96SDeng-Cheng Zhu select HAVE_VIRT_CPU_ACCOUNTING_GEN 60ec9ddad3SDeng-Cheng Zhu select HAVE_IRQ_TIME_ACCOUNTING 611da177e4SLinus Torvalds 621da177e4SLinus Torvaldsmenu "Machine selection" 631da177e4SLinus Torvalds 645e83d430SRalf Baechlechoice 655e83d430SRalf Baechle prompt "System type" 665e83d430SRalf Baechle default SGI_IP22 671da177e4SLinus Torvalds 6842a4f17dSManuel Laussconfig MIPS_ALCHEMY 69c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 7034adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 71f772cdb2SRalf Baechle select CEVT_R4K 72d7ea335cSSteven J. Hill select CSRC_R4K 7342a4f17dSManuel Lauss select IRQ_CPU 7488e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 7542a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 7642a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 7742a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 78efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 791b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 8047440229SManuel Lauss select COMMON_CLK 811da177e4SLinus Torvalds 827ca5dc14SFlorian Fainelliconfig AR7 837ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 847ca5dc14SFlorian Fainelli select BOOT_ELF32 857ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 867ca5dc14SFlorian Fainelli select CEVT_R4K 877ca5dc14SFlorian Fainelli select CSRC_R4K 887ca5dc14SFlorian Fainelli select IRQ_CPU 897ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 907ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 917ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 927ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 937ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 947ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 95377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 961b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 975f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 987ca5dc14SFlorian Fainelli select VLYNQ 998551fb64SYoichi Yuasa select HAVE_CLK 1007ca5dc14SFlorian Fainelli help 1017ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1027ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1037ca5dc14SFlorian Fainelli 10443cc739fSSergey Ryazanovconfig ATH25 10543cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 10643cc739fSSergey Ryazanov select CEVT_R4K 10743cc739fSSergey Ryazanov select CSRC_R4K 10843cc739fSSergey Ryazanov select DMA_NONCOHERENT 10943cc739fSSergey Ryazanov select IRQ_CPU 1101753e74eSSergey Ryazanov select IRQ_DOMAIN 11143cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 11243cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 11343cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1148aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 11543cc739fSSergey Ryazanov help 11643cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 11743cc739fSSergey Ryazanov 118d4a67d9dSGabor Juhosconfig ATH79 119d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 1206eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 121d4a67d9dSGabor Juhos select BOOT_RAW 122d4a67d9dSGabor Juhos select CEVT_R4K 123d4a67d9dSGabor Juhos select CSRC_R4K 124d4a67d9dSGabor Juhos select DMA_NONCOHERENT 12594638067SGabor Juhos select HAVE_CLK 1262c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 127d4a67d9dSGabor Juhos select IRQ_CPU 1280aabf1a4SGabor Juhos select MIPS_MACHINE 129d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 130d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 131d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 132d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 133377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 134d4a67d9dSGabor Juhos help 135d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 136d4a67d9dSGabor Juhos 1375f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 1385f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 139d666cd02SKevin Cernekee select BOOT_RAW 140d666cd02SKevin Cernekee select NO_EXCEPT_FILL 141d666cd02SKevin Cernekee select USE_OF 142d666cd02SKevin Cernekee select CEVT_R4K 143d666cd02SKevin Cernekee select CSRC_R4K 144d666cd02SKevin Cernekee select SYNC_R4K 145d666cd02SKevin Cernekee select COMMON_CLK 146d666cd02SKevin Cernekee select DMA_NONCOHERENT 147d666cd02SKevin Cernekee select IRQ_CPU 148d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 149d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 150d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 151d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 152d666cd02SKevin Cernekee select SWAP_IO_SPACE 153d666cd02SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC 154d666cd02SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO 155d666cd02SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC 156d666cd02SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO 157d666cd02SKevin Cernekee help 1585f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 1595f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 1605f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 1615f2d4459SKevin Cernekee must be set appropriately for your board. 162d666cd02SKevin Cernekee 1631c0c13ebSAurelien Jarnoconfig BCM47XX 164c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1652da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 166fe08f8c2SHauke Mehrtens select BOOT_RAW 16742f77542SRalf Baechle select CEVT_R4K 168940f6b48SRalf Baechle select CSRC_R4K 1691c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1701c0c13ebSAurelien Jarno select HW_HAS_PCI 1711c0c13ebSAurelien Jarno select IRQ_CPU 172314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 173dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1741c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1751c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 176377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 17725e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 178e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 179c949c0bcSRafał Miłecki select GPIOLIB 180c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 1811c0c13ebSAurelien Jarno help 1821c0c13ebSAurelien Jarno Support for BCM47XX based boards 1831c0c13ebSAurelien Jarno 184e7300d04SMaxime Bizonconfig BCM63XX 185e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 186ae8de61cSFlorian Fainelli select BOOT_RAW 187e7300d04SMaxime Bizon select CEVT_R4K 188e7300d04SMaxime Bizon select CSRC_R4K 189fc264022SJonas Gorski select SYNC_R4K 190e7300d04SMaxime Bizon select DMA_NONCOHERENT 191e7300d04SMaxime Bizon select IRQ_CPU 192e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 193e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 194e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 195e7300d04SMaxime Bizon select SWAP_IO_SPACE 196e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 1973e82eeebSYoichi Yuasa select HAVE_CLK 198af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 199e7300d04SMaxime Bizon help 200e7300d04SMaxime Bizon Support for BCM63XX based boards 201e7300d04SMaxime Bizon 2021da177e4SLinus Torvaldsconfig MIPS_COBALT 2033fa986faSMartin Michlmayr bool "Cobalt Server" 20442f77542SRalf Baechle select CEVT_R4K 205940f6b48SRalf Baechle select CSRC_R4K 2061097c6acSYoichi Yuasa select CEVT_GT641XX 2071da177e4SLinus Torvalds select DMA_NONCOHERENT 2081da177e4SLinus Torvalds select HW_HAS_PCI 209d865bea4SRalf Baechle select I8253 2101da177e4SLinus Torvalds select I8259 2111da177e4SLinus Torvalds select IRQ_CPU 212d5ab1a69SYoichi Yuasa select IRQ_GT641XX 213252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 214e25bfc92SYoichi Yuasa select PCI 2157cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 2160a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 217ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2180e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 2195e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 220e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 2211da177e4SLinus Torvalds 2221da177e4SLinus Torvaldsconfig MACH_DECSTATION 2233fa986faSMartin Michlmayr bool "DECstations" 2241da177e4SLinus Torvalds select BOOT_ELF32 2256457d9fcSYoichi Yuasa select CEVT_DS1287 22681d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 2274247417dSYoichi Yuasa select CSRC_IOASIC 22881d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 22920d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 23020d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 23120d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 2321da177e4SLinus Torvalds select DMA_NONCOHERENT 233ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 2341da177e4SLinus Torvalds select IRQ_CPU 2357cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 2367cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 237ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2387d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2395e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 2401723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 2411723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 2421723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 243930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 2445e83d430SRalf Baechle help 2451da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 2461da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 2471da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 2481da177e4SLinus Torvalds 2491da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 2501da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 2511da177e4SLinus Torvalds 2521da177e4SLinus Torvalds DECstation 5000/50 2531da177e4SLinus Torvalds DECstation 5000/150 2541da177e4SLinus Torvalds DECstation 5000/260 2551da177e4SLinus Torvalds DECsystem 5900/260 2561da177e4SLinus Torvalds 2571da177e4SLinus Torvalds otherwise choose R3000. 2581da177e4SLinus Torvalds 2595e83d430SRalf Baechleconfig MACH_JAZZ 2603fa986faSMartin Michlmayr bool "Jazz family of machines" 2610e2794b0SRalf Baechle select FW_ARC 2620e2794b0SRalf Baechle select FW_ARC32 2635e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 26442f77542SRalf Baechle select CEVT_R4K 265940f6b48SRalf Baechle select CSRC_R4K 266e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2675e83d430SRalf Baechle select GENERIC_ISA_DMA 2688a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 269ea202c63SThomas Bogendoerfer select IRQ_CPU 270d865bea4SRalf Baechle select I8253 2715e83d430SRalf Baechle select I8259 2725e83d430SRalf Baechle select ISA 2737cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2745e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2757d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2761723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2771da177e4SLinus Torvalds help 2785e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2795e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 280692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2815e83d430SRalf Baechle Olivetti M700-10 workstations. 2825e83d430SRalf Baechle 2835ebabe59SLars-Peter Clausenconfig MACH_JZ4740 2845ebabe59SLars-Peter Clausen bool "Ingenic JZ4740 based machines" 2855ebabe59SLars-Peter Clausen select SYS_HAS_CPU_MIPS32_R1 2865ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2875ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 288f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 2895ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 2905ebabe59SLars-Peter Clausen select IRQ_CPU 2915ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 2925ebabe59SLars-Peter Clausen select SYS_HAS_EARLY_PRINTK 293ab5330ebSMaurus Cuelenaere select HAVE_CLK 29483bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 2955ebabe59SLars-Peter Clausen 296171bb2f1SJohn Crispinconfig LANTIQ 297171bb2f1SJohn Crispin bool "Lantiq based platforms" 298171bb2f1SJohn Crispin select DMA_NONCOHERENT 299171bb2f1SJohn Crispin select IRQ_CPU 300171bb2f1SJohn Crispin select CEVT_R4K 301171bb2f1SJohn Crispin select CSRC_R4K 302171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 303171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 304171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 305171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 306377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 307171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 308171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 309171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 310171bb2f1SJohn Crispin select SWAP_IO_SPACE 311171bb2f1SJohn Crispin select BOOT_RAW 312287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 313287e3f3fSJohn Crispin select CLKDEV_LOOKUP 314a0392222SJohn Crispin select USE_OF 3153f8c50c9SJohn Crispin select PINCTRL 3163f8c50c9SJohn Crispin select PINCTRL_LANTIQ 317c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 318c530781cSJohn Crispin select RESET_CONTROLLER 319171bb2f1SJohn Crispin 3201f21d2bdSBrian Murphyconfig LASAT 3211f21d2bdSBrian Murphy bool "LASAT Networks platforms" 32242f77542SRalf Baechle select CEVT_R4K 32316f0bbbcSRalf Baechle select CRC32 324940f6b48SRalf Baechle select CSRC_R4K 3251f21d2bdSBrian Murphy select DMA_NONCOHERENT 3261f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 3271f21d2bdSBrian Murphy select HW_HAS_PCI 328a5ccfe5cSRalf Baechle select IRQ_CPU 3291f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 3301f21d2bdSBrian Murphy select MIPS_NILE4 3311f21d2bdSBrian Murphy select R5000_CPU_SCACHE 3321f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 3331f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 3341f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 3351f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 3361f21d2bdSBrian Murphy 33785749d24SWu Zhangjinconfig MACH_LOONGSON 33885749d24SWu Zhangjin bool "Loongson family of machines" 339c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 340ade299d8SYoichi Yuasa help 34185749d24SWu Zhangjin This enables the support of Loongson family of machines. 34285749d24SWu Zhangjin 34385749d24SWu Zhangjin Loongson is a family of general-purpose MIPS-compatible CPUs. 34485749d24SWu Zhangjin developed at Institute of Computing Technology (ICT), 34585749d24SWu Zhangjin Chinese Academy of Sciences (CAS) in the People's Republic 34685749d24SWu Zhangjin of China. The chief architect is Professor Weiwu Hu. 347ade299d8SYoichi Yuasa 348ca585cf9SKelvin Cheungconfig MACH_LOONGSON1 349ca585cf9SKelvin Cheung bool "Loongson 1 family of machines" 350ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 351ca585cf9SKelvin Cheung help 352ca585cf9SKelvin Cheung This enables support for the Loongson 1 based machines. 353ca585cf9SKelvin Cheung 354ca585cf9SKelvin Cheung Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by 355ca585cf9SKelvin Cheung the ICT (Institute of Computing Technology) and the Chinese Academy 356ca585cf9SKelvin Cheung of Sciences. 357ca585cf9SKelvin Cheung 3586a438309SAndrew Brestickerconfig MACH_PISTACHIO 3596a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 3606a438309SAndrew Bresticker select ARCH_REQUIRE_GPIOLIB 3616a438309SAndrew Bresticker select BOOT_ELF32 3626a438309SAndrew Bresticker select BOOT_RAW 3636a438309SAndrew Bresticker select CEVT_R4K 3646a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 3656a438309SAndrew Bresticker select COMMON_CLK 3666a438309SAndrew Bresticker select CSRC_R4K 3676a438309SAndrew Bresticker select DMA_MAYBE_COHERENT 3686a438309SAndrew Bresticker select IRQ_CPU 3696a438309SAndrew Bresticker select LIBFDT 3706a438309SAndrew Bresticker select MFD_SYSCON 3716a438309SAndrew Bresticker select MIPS_CPU_SCACHE 3726a438309SAndrew Bresticker select MIPS_GIC 3736a438309SAndrew Bresticker select PINCTRL 3746a438309SAndrew Bresticker select REGULATOR 3756a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 3766a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 3776a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 3786a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 3796a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 3806a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 3816a438309SAndrew Bresticker select USE_OF 3826a438309SAndrew Bresticker help 3836a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 3846a438309SAndrew Bresticker 3851da177e4SLinus Torvaldsconfig MIPS_MALTA 3863fa986faSMartin Michlmayr bool "MIPS Malta board" 38761ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 3881da177e4SLinus Torvalds select BOOT_ELF32 389fa71c960SRalf Baechle select BOOT_RAW 39042f77542SRalf Baechle select CEVT_R4K 391940f6b48SRalf Baechle select CSRC_R4K 392fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 393885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 3941da177e4SLinus Torvalds select GENERIC_ISA_DMA 3958a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 396aa414dffSRalf Baechle select IRQ_CPU 3978a19b8f1SAndrew Bresticker select MIPS_GIC 3981da177e4SLinus Torvalds select HW_HAS_PCI 399d865bea4SRalf Baechle select I8253 4001da177e4SLinus Torvalds select I8259 4015e83d430SRalf Baechle select MIPS_BONITO64 4029318c51aSChris Dearman select MIPS_CPU_SCACHE 403a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 404252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 4055e83d430SRalf Baechle select MIPS_MSC 4061da177e4SLinus Torvalds select SWAP_IO_SPACE 4077cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 4087cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 409bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 410575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 4117cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 4125d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 413575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 4147cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 4157cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 416ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 417ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4185e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 4195e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 420424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 4210365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 422e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 423377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 424f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 4259693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 4261b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 4271da177e4SLinus Torvalds help 428f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 4291da177e4SLinus Torvalds board. 4301da177e4SLinus Torvalds 431ec47b274SSteven J. Hillconfig MIPS_SEAD3 432ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 433ec47b274SSteven J. Hill select BOOT_ELF32 434ec47b274SSteven J. Hill select BOOT_RAW 435f262b5f2SAndrew Bresticker select BUILTIN_DTB 436ec47b274SSteven J. Hill select CEVT_R4K 437ec47b274SSteven J. Hill select CSRC_R4K 438fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 439ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 440ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 441ec47b274SSteven J. Hill select DMA_NONCOHERENT 442ec47b274SSteven J. Hill select IRQ_CPU 4438a19b8f1SAndrew Bresticker select MIPS_GIC 44444327236SQais Yousef select LIBFDT 445ec47b274SSteven J. Hill select MIPS_MSC 446ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 447ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 448ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 449ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 450ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 451ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 452ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 453ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 454ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 455a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 456377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 457ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 458ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 4599b731009SSteven J. Hill select USE_OF 460ec47b274SSteven J. Hill help 461ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 462ec47b274SSteven J. Hill board. 463ec47b274SSteven J. Hill 464a83860c2SRalf Baechleconfig NEC_MARKEINS 465a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 466a83860c2SRalf Baechle select SOC_EMMA2RH 467a83860c2SRalf Baechle select HW_HAS_PCI 468a83860c2SRalf Baechle help 469a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 470ade299d8SYoichi Yuasa 4715e83d430SRalf Baechleconfig MACH_VR41XX 47274142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 47342f77542SRalf Baechle select CEVT_R4K 474940f6b48SRalf Baechle select CSRC_R4K 4757cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 476377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 47727fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 4785e83d430SRalf Baechle 479edb6310aSDaniel Lairdconfig NXP_STB220 480edb6310aSDaniel Laird bool "NXP STB220 board" 481edb6310aSDaniel Laird select SOC_PNX833X 482edb6310aSDaniel Laird help 483edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 484edb6310aSDaniel Laird 485edb6310aSDaniel Lairdconfig NXP_STB225 486edb6310aSDaniel Laird bool "NXP 225 board" 487edb6310aSDaniel Laird select SOC_PNX833X 488edb6310aSDaniel Laird select SOC_PNX8335 489edb6310aSDaniel Laird help 490edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 491edb6310aSDaniel Laird 4929267a30dSMarc St-Jeanconfig PMC_MSP 4939267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 49439d30c13SAnoop P A select CEVT_R4K 49539d30c13SAnoop P A select CSRC_R4K 4969267a30dSMarc St-Jean select DMA_NONCOHERENT 4979267a30dSMarc St-Jean select SWAP_IO_SPACE 4989267a30dSMarc St-Jean select NO_EXCEPT_FILL 4999267a30dSMarc St-Jean select BOOT_RAW 5009267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 5019267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 5029267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 5039267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 504377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 5059267a30dSMarc St-Jean select IRQ_CPU 5069267a30dSMarc St-Jean select SERIAL_8250 5079267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 5089296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 5099296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 5109267a30dSMarc St-Jean help 5119267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 5129267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 5139267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 5149267a30dSMarc St-Jean a variety of MIPS cores. 5159267a30dSMarc St-Jean 516ae2b5bb6SJohn Crispinconfig RALINK 517ae2b5bb6SJohn Crispin bool "Ralink based machines" 518ae2b5bb6SJohn Crispin select CEVT_R4K 519ae2b5bb6SJohn Crispin select CSRC_R4K 520ae2b5bb6SJohn Crispin select BOOT_RAW 521ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 522ae2b5bb6SJohn Crispin select IRQ_CPU 523ae2b5bb6SJohn Crispin select USE_OF 524ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 525ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 526ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 527ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 528377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 529ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 530ae2b5bb6SJohn Crispin select HAVE_MACH_CLKDEV 531ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 5322a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 5332a153f1cSJohn Crispin select RESET_CONTROLLER 534ae2b5bb6SJohn Crispin 5351da177e4SLinus Torvaldsconfig SGI_IP22 5363fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 5370e2794b0SRalf Baechle select FW_ARC 5380e2794b0SRalf Baechle select FW_ARC32 5391da177e4SLinus Torvalds select BOOT_ELF32 54042f77542SRalf Baechle select CEVT_R4K 541940f6b48SRalf Baechle select CSRC_R4K 542e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 5431da177e4SLinus Torvalds select DMA_NONCOHERENT 5445e83d430SRalf Baechle select HW_HAS_EISA 545d865bea4SRalf Baechle select I8253 54668de4803SThomas Bogendoerfer select I8259 5471da177e4SLinus Torvalds select IP22_CPU_SCACHE 5481da177e4SLinus Torvalds select IRQ_CPU 549aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 550e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 551e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 55236e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 553e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 554e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 555e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 5561da177e4SLinus Torvalds select SWAP_IO_SPACE 5577cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 5587cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5592b5e63f6SMartin Michlmayr # 5602b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5612b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5622b5e63f6SMartin Michlmayr # 5632b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5642b5e63f6SMartin Michlmayr # for a more details discussion 5652b5e63f6SMartin Michlmayr # 5662b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 567ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 568ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5695e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 570930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 5711da177e4SLinus Torvalds help 5721da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 5731da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 5741da177e4SLinus Torvalds that runs on these, say Y here. 5751da177e4SLinus Torvalds 5761da177e4SLinus Torvaldsconfig SGI_IP27 5773fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 5780e2794b0SRalf Baechle select FW_ARC 5790e2794b0SRalf Baechle select FW_ARC64 5805e83d430SRalf Baechle select BOOT_ELF64 581e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 582634286f1SRalf Baechle select DMA_COHERENT 58336a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 5841da177e4SLinus Torvalds select HW_HAS_PCI 585130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 5867cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 587ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5885e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 589d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 5901a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 591930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 5921da177e4SLinus Torvalds help 5931da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 5941da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 5951da177e4SLinus Torvalds here. 5961da177e4SLinus Torvalds 597e2defae5SThomas Bogendoerferconfig SGI_IP28 5987d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 5990e2794b0SRalf Baechle select FW_ARC 6000e2794b0SRalf Baechle select FW_ARC64 601e2defae5SThomas Bogendoerfer select BOOT_ELF64 602e2defae5SThomas Bogendoerfer select CEVT_R4K 603e2defae5SThomas Bogendoerfer select CSRC_R4K 604e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 605e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 606e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 607e2defae5SThomas Bogendoerfer select IRQ_CPU 608e2defae5SThomas Bogendoerfer select HW_HAS_EISA 609e2defae5SThomas Bogendoerfer select I8253 610e2defae5SThomas Bogendoerfer select I8259 611e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 612e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 6135b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 614e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 615e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 616e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 617e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 618e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 6192b5e63f6SMartin Michlmayr # 6202b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6212b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6222b5e63f6SMartin Michlmayr # 6232b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6242b5e63f6SMartin Michlmayr # for a more details discussion 6252b5e63f6SMartin Michlmayr # 6262b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 627e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 628e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 629dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 630e2defae5SThomas Bogendoerfer help 631e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 632e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 633e2defae5SThomas Bogendoerfer 6341da177e4SLinus Torvaldsconfig SGI_IP32 635cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 6360e2794b0SRalf Baechle select FW_ARC 6370e2794b0SRalf Baechle select FW_ARC32 6381da177e4SLinus Torvalds select BOOT_ELF32 63942f77542SRalf Baechle select CEVT_R4K 640940f6b48SRalf Baechle select CSRC_R4K 6411da177e4SLinus Torvalds select DMA_NONCOHERENT 6421da177e4SLinus Torvalds select HW_HAS_PCI 643dd67b155SRalf Baechle select IRQ_CPU 6441da177e4SLinus Torvalds select R5000_CPU_SCACHE 6451da177e4SLinus Torvalds select RM7000_CPU_SCACHE 6467cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6477cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 6487cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 649dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 650ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6515e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6521da177e4SLinus Torvalds help 6531da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 6541da177e4SLinus Torvalds 655ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 656ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 6575e83d430SRalf Baechle select BOOT_ELF32 6585e83d430SRalf Baechle select DMA_COHERENT 6595e83d430SRalf Baechle select SIBYTE_BCM1120 6605e83d430SRalf Baechle select SWAP_IO_SPACE 6617cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6625e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6635e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6645e83d430SRalf Baechle 665ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 666ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 6675e83d430SRalf Baechle select BOOT_ELF32 6685e83d430SRalf Baechle select DMA_COHERENT 6695e83d430SRalf Baechle select SIBYTE_BCM1120 6705e83d430SRalf Baechle select SWAP_IO_SPACE 6717cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6725e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6735e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6745e83d430SRalf Baechle 6755e83d430SRalf Baechleconfig SIBYTE_CRHONE 6763fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 6775e83d430SRalf Baechle select BOOT_ELF32 6785e83d430SRalf Baechle select DMA_COHERENT 6795e83d430SRalf Baechle select SIBYTE_BCM1125 6805e83d430SRalf Baechle select SWAP_IO_SPACE 6817cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6825e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6835e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 6845e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6855e83d430SRalf Baechle 686ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 687ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 688ade299d8SYoichi Yuasa select BOOT_ELF32 689ade299d8SYoichi Yuasa select DMA_COHERENT 690ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 691ade299d8SYoichi Yuasa select SWAP_IO_SPACE 692ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 693ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 694ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 695ade299d8SYoichi Yuasa 696ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 697ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 698ade299d8SYoichi Yuasa select BOOT_ELF32 699ade299d8SYoichi Yuasa select DMA_COHERENT 700fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 701ade299d8SYoichi Yuasa select SIBYTE_SB1250 702ade299d8SYoichi Yuasa select SWAP_IO_SPACE 703ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 704ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 705ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 706ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 707cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 708ade299d8SYoichi Yuasa 709ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 710ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 711ade299d8SYoichi Yuasa select BOOT_ELF32 712ade299d8SYoichi Yuasa select DMA_COHERENT 713fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 714ade299d8SYoichi Yuasa select SIBYTE_SB1250 715ade299d8SYoichi Yuasa select SWAP_IO_SPACE 716ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 717ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 718ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 719ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 720ade299d8SYoichi Yuasa 721ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 722ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 723ade299d8SYoichi Yuasa select BOOT_ELF32 724ade299d8SYoichi Yuasa select DMA_COHERENT 725ade299d8SYoichi Yuasa select SIBYTE_SB1250 726ade299d8SYoichi Yuasa select SWAP_IO_SPACE 727ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 728ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 729ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 730ade299d8SYoichi Yuasa 731ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 732ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 733ade299d8SYoichi Yuasa select BOOT_ELF32 734ade299d8SYoichi Yuasa select DMA_COHERENT 735ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 736ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 737ade299d8SYoichi Yuasa select SWAP_IO_SPACE 738ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 739ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 740651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 741ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 742cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 743ade299d8SYoichi Yuasa 74414b36af4SThomas Bogendoerferconfig SNI_RM 74514b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 7460e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 7470e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 748aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 7495e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 7505e83d430SRalf Baechle select BOOT_ELF32 75142f77542SRalf Baechle select CEVT_R4K 752940f6b48SRalf Baechle select CSRC_R4K 753e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 7545e83d430SRalf Baechle select DMA_NONCOHERENT 7555e83d430SRalf Baechle select GENERIC_ISA_DMA 7568a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 7575e83d430SRalf Baechle select HW_HAS_EISA 7585e83d430SRalf Baechle select HW_HAS_PCI 759c066a32aSThomas Bogendoerfer select IRQ_CPU 760d865bea4SRalf Baechle select I8253 7615e83d430SRalf Baechle select I8259 7625e83d430SRalf Baechle select ISA 7634a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 7647cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 7654a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 766c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 7674a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 76836a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 769ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 7707d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 7714a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 7725e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7735e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7741da177e4SLinus Torvalds help 77514b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 77614b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 7775e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 7785e83d430SRalf Baechle support this machine type. 7791da177e4SLinus Torvalds 780edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 781edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 7825e83d430SRalf Baechle 783edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 784edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 78523fbee9dSRalf Baechle 78673b4390fSRalf Baechleconfig MIKROTIK_RB532 78773b4390fSRalf Baechle bool "Mikrotik RB532 boards" 78873b4390fSRalf Baechle select CEVT_R4K 78973b4390fSRalf Baechle select CSRC_R4K 79073b4390fSRalf Baechle select DMA_NONCOHERENT 79173b4390fSRalf Baechle select HW_HAS_PCI 79273b4390fSRalf Baechle select IRQ_CPU 79373b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 79473b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 79573b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 79673b4390fSRalf Baechle select SWAP_IO_SPACE 79773b4390fSRalf Baechle select BOOT_RAW 798d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 799930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 80073b4390fSRalf Baechle help 80173b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 80273b4390fSRalf Baechle based on the IDT RC32434 SoC. 80373b4390fSRalf Baechle 8049ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 8059ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 806a86c7f72SDavid Daney select CEVT_R4K 80734adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 808a86c7f72SDavid Daney select DMA_COHERENT 809a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 810a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 811f65aad41SRalf Baechle select EDAC_SUPPORT 81273569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 81373569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 814a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 8155e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 816a86c7f72SDavid Daney select SWAP_IO_SPACE 817e8635b48SDavid Daney select HW_HAS_PCI 818f00e001eSDavid Daney select ZONE_DMA32 819465aaed0SDavid Daney select HOLES_IN_ZONE 82099cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 8216e511163SDavid Daney select LIBFDT 8226e511163SDavid Daney select USE_OF 8236e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 8246e511163SDavid Daney select SYS_SUPPORTS_SMP 8256e511163SDavid Daney select NR_CPUS_DEFAULT_16 826e326479fSAndrew Bresticker select BUILTIN_DTB 827a86c7f72SDavid Daney help 828a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 829a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 830a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 831a86c7f72SDavid Daney Some of the supported boards are: 832a86c7f72SDavid Daney EBT3000 833a86c7f72SDavid Daney EBH3000 834a86c7f72SDavid Daney EBH3100 835a86c7f72SDavid Daney Thunder 836a86c7f72SDavid Daney Kodama 837a86c7f72SDavid Daney Hikari 838a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 839a86c7f72SDavid Daney 8407f058e85SJayachandran Cconfig NLM_XLR_BOARD 8417f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 8427f058e85SJayachandran C select BOOT_ELF32 8437f058e85SJayachandran C select NLM_COMMON 8447f058e85SJayachandran C select SYS_HAS_CPU_XLR 8457f058e85SJayachandran C select SYS_SUPPORTS_SMP 8467f058e85SJayachandran C select HW_HAS_PCI 8477f058e85SJayachandran C select SWAP_IO_SPACE 8487f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 8497f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 85034adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 8517f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 8527f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 8537f058e85SJayachandran C select DMA_COHERENT 8547f058e85SJayachandran C select NR_CPUS_DEFAULT_32 8557f058e85SJayachandran C select CEVT_R4K 8567f058e85SJayachandran C select CSRC_R4K 8577f058e85SJayachandran C select IRQ_CPU 858b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 8597f058e85SJayachandran C select SYNC_R4K 8607f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 8618f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 8628f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 8637f058e85SJayachandran C help 8647f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 8657f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 8667f058e85SJayachandran C 8671c773ea4SJayachandran Cconfig NLM_XLP_BOARD 8681c773ea4SJayachandran C bool "Netlogic XLP based systems" 8691c773ea4SJayachandran C select BOOT_ELF32 8701c773ea4SJayachandran C select NLM_COMMON 8711c773ea4SJayachandran C select SYS_HAS_CPU_XLP 8721c773ea4SJayachandran C select SYS_SUPPORTS_SMP 8731c773ea4SJayachandran C select HW_HAS_PCI 8741c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 8751c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 87634adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 8771c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 8781c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 8791c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 8801c773ea4SJayachandran C select DMA_COHERENT 8811c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 8821c773ea4SJayachandran C select CEVT_R4K 8831c773ea4SJayachandran C select CSRC_R4K 8841c773ea4SJayachandran C select IRQ_CPU 885b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 8861c773ea4SJayachandran C select SYNC_R4K 8871c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 8882f6528e1SJayachandran C select USE_OF 8898f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 8908f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 8911c773ea4SJayachandran C help 8921c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 8931c773ea4SJayachandran C Say Y here if you have a XLP based board. 8941c773ea4SJayachandran C 8959bc463beSDavid Daneyconfig MIPS_PARAVIRT 8969bc463beSDavid Daney bool "Para-Virtualized guest system" 8979bc463beSDavid Daney select CEVT_R4K 8989bc463beSDavid Daney select CSRC_R4K 8999bc463beSDavid Daney select DMA_COHERENT 9009bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 9019bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 9029bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 9039bc463beSDavid Daney select SYS_SUPPORTS_SMP 9049bc463beSDavid Daney select NR_CPUS_DEFAULT_4 9059bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 9069bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 9079bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 9089bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 9099bc463beSDavid Daney select HW_HAS_PCI 9109bc463beSDavid Daney select SWAP_IO_SPACE 9119bc463beSDavid Daney help 9129bc463beSDavid Daney This option supports guest running under ???? 9139bc463beSDavid Daney 9141da177e4SLinus Torvaldsendchoice 9151da177e4SLinus Torvalds 916e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 9173b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 918d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 919a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 920e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 9215e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 9225ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 9238ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 9241f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 9250f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 926ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 92729c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 92838b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 92922b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 9305e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 931a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 93285749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig" 933ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig" 9347f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 935ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 93638b18f72SRalf Baechle 9375e83d430SRalf Baechleendmenu 9385e83d430SRalf Baechle 9391da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 9401da177e4SLinus Torvalds bool 9411da177e4SLinus Torvalds default y 9421da177e4SLinus Torvalds 9431da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 9441da177e4SLinus Torvalds bool 9451da177e4SLinus Torvalds 946f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 947f0d1b0b3SDavid Howells bool 948f0d1b0b3SDavid Howells default n 949f0d1b0b3SDavid Howells 950f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 951f0d1b0b3SDavid Howells bool 952f0d1b0b3SDavid Howells default n 953f0d1b0b3SDavid Howells 9543c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 9553c9ee7efSAkinobu Mita bool 9563c9ee7efSAkinobu Mita default y 9573c9ee7efSAkinobu Mita 9581da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 9591da177e4SLinus Torvalds bool 9601da177e4SLinus Torvalds default y 9611da177e4SLinus Torvalds 962ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 9631cc89038SAtsushi Nemoto bool 9641cc89038SAtsushi Nemoto default y 9651cc89038SAtsushi Nemoto 9661da177e4SLinus Torvalds# 9671da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 9681da177e4SLinus Torvalds# 9690e2794b0SRalf Baechleconfig FW_ARC 9701da177e4SLinus Torvalds bool 9711da177e4SLinus Torvalds 97261ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 97361ed242dSRalf Baechle bool 97461ed242dSRalf Baechle 9759267a30dSMarc St-Jeanconfig BOOT_RAW 9769267a30dSMarc St-Jean bool 9779267a30dSMarc St-Jean 978217dd11eSRalf Baechleconfig CEVT_BCM1480 979217dd11eSRalf Baechle bool 980217dd11eSRalf Baechle 9816457d9fcSYoichi Yuasaconfig CEVT_DS1287 9826457d9fcSYoichi Yuasa bool 9836457d9fcSYoichi Yuasa 9841097c6acSYoichi Yuasaconfig CEVT_GT641XX 9851097c6acSYoichi Yuasa bool 9861097c6acSYoichi Yuasa 98742f77542SRalf Baechleconfig CEVT_R4K 98842f77542SRalf Baechle bool 98942f77542SRalf Baechle 990217dd11eSRalf Baechleconfig CEVT_SB1250 991217dd11eSRalf Baechle bool 992217dd11eSRalf Baechle 993229f773eSAtsushi Nemotoconfig CEVT_TXX9 994229f773eSAtsushi Nemoto bool 995229f773eSAtsushi Nemoto 996217dd11eSRalf Baechleconfig CSRC_BCM1480 997217dd11eSRalf Baechle bool 998217dd11eSRalf Baechle 9994247417dSYoichi Yuasaconfig CSRC_IOASIC 10004247417dSYoichi Yuasa bool 10014247417dSYoichi Yuasa 1002940f6b48SRalf Baechleconfig CSRC_R4K 1003940f6b48SRalf Baechle bool 1004940f6b48SRalf Baechle 1005217dd11eSRalf Baechleconfig CSRC_SB1250 1006217dd11eSRalf Baechle bool 1007217dd11eSRalf Baechle 1008a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 10097444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 1010a9aec7feSAtsushi Nemoto bool 1011a9aec7feSAtsushi Nemoto 10120e2794b0SRalf Baechleconfig FW_CFE 1013df78b5c8SAurelien Jarno bool 1014df78b5c8SAurelien Jarno 10154bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 101634adb28dSRalf Baechle def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 10174bafad92SFUJITA Tomonori 1018885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1019885014bcSFelix Fietkau select DMA_NONCOHERENT 1020885014bcSFelix Fietkau bool 1021885014bcSFelix Fietkau 10221da177e4SLinus Torvaldsconfig DMA_COHERENT 10231da177e4SLinus Torvalds bool 10241da177e4SLinus Torvalds 10251da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 10261da177e4SLinus Torvalds bool 1027e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 10284ce588cdSRalf Baechle 1029e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 10304ce588cdSRalf Baechle bool 10311da177e4SLinus Torvalds 103236a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 10331da177e4SLinus Torvalds bool 10341da177e4SLinus Torvalds 1035dbb74540SRalf Baechleconfig HOTPLUG_CPU 10361b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 103740b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 10381b2bc75cSRalf Baechle help 10391b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 10401b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 10411b2bc75cSRalf Baechle (Note: power management support will enable this option 10421b2bc75cSRalf Baechle automatically on SMP systems. ) 10431b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 10441b2bc75cSRalf Baechle 10451b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1046dbb74540SRalf Baechle bool 1047dbb74540SRalf Baechle 10481da177e4SLinus Torvaldsconfig I8259 10491da177e4SLinus Torvalds bool 1050079a4601SAndrew Bresticker select IRQ_DOMAIN 10511da177e4SLinus Torvalds 10521da177e4SLinus Torvaldsconfig MIPS_BONITO64 10531da177e4SLinus Torvalds bool 10541da177e4SLinus Torvalds 10551da177e4SLinus Torvaldsconfig MIPS_MSC 10561da177e4SLinus Torvalds bool 10571da177e4SLinus Torvalds 10581f21d2bdSBrian Murphyconfig MIPS_NILE4 10591f21d2bdSBrian Murphy bool 10601f21d2bdSBrian Murphy 106139b8d525SRalf Baechleconfig SYNC_R4K 106239b8d525SRalf Baechle bool 106339b8d525SRalf Baechle 1064487d70d0SGabor Juhosconfig MIPS_MACHINE 1065487d70d0SGabor Juhos def_bool n 1066487d70d0SGabor Juhos 1067ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1068d388d685SMaciej W. Rozycki def_bool n 1069d388d685SMaciej W. Rozycki 10704e0748f5SMarkos Chandrasconfig GENERIC_CSUM 10714e0748f5SMarkos Chandras bool 10724e0748f5SMarkos Chandras 10738313da30SRalf Baechleconfig GENERIC_ISA_DMA 10748313da30SRalf Baechle bool 10758313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1076a35bee8aSNamhyung Kim select ISA_DMA_API 10778313da30SRalf Baechle 1078aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1079aa414dffSRalf Baechle bool 10808313da30SRalf Baechle select GENERIC_ISA_DMA 1081aa414dffSRalf Baechle 1082a35bee8aSNamhyung Kimconfig ISA_DMA_API 1083a35bee8aSNamhyung Kim bool 1084a35bee8aSNamhyung Kim 1085465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1086465aaed0SDavid Daney bool 1087465aaed0SDavid Daney 10885e83d430SRalf Baechle# 10896b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 10905e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 10915e83d430SRalf Baechle# choice statement should be more obvious to the user. 10925e83d430SRalf Baechle# 10935e83d430SRalf Baechlechoice 10946b2aac42SMasanari Iida prompt "Endianness selection" 10951da177e4SLinus Torvalds help 10961da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 10975e83d430SRalf Baechle byte order. These modes require different kernels and a different 10983cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 10995e83d430SRalf Baechle particular system but some systems are just as commonly used in the 11003dde6ad8SDavid Sterba one or the other endianness. 11015e83d430SRalf Baechle 11025e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 11035e83d430SRalf Baechle bool "Big endian" 11045e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 11055e83d430SRalf Baechle 11065e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 11075e83d430SRalf Baechle bool "Little endian" 11085e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 11095e83d430SRalf Baechle 11105e83d430SRalf Baechleendchoice 11115e83d430SRalf Baechle 111222b0763aSDavid Daneyconfig EXPORT_UASM 111322b0763aSDavid Daney bool 111422b0763aSDavid Daney 11152116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 11162116245eSRalf Baechle bool 11172116245eSRalf Baechle 11185e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 11195e83d430SRalf Baechle bool 11205e83d430SRalf Baechle 11215e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 11225e83d430SRalf Baechle bool 11231da177e4SLinus Torvalds 11249cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 11259cffd154SDavid Daney bool 11269cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 11279cffd154SDavid Daney default y 11289cffd154SDavid Daney 1129aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1130aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1131aa1762f4SDavid Daney 11321da177e4SLinus Torvaldsconfig IRQ_CPU 11331da177e4SLinus Torvalds bool 11340f84c305SAndrew Bresticker select IRQ_DOMAIN 11351da177e4SLinus Torvalds 11361da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 11371da177e4SLinus Torvalds bool 11381da177e4SLinus Torvalds 11399267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 11409267a30dSMarc St-Jean bool 11419267a30dSMarc St-Jean 11429267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 11439267a30dSMarc St-Jean bool 11449267a30dSMarc St-Jean 11458420fd00SAtsushi Nemotoconfig IRQ_TXX9 11468420fd00SAtsushi Nemoto bool 11478420fd00SAtsushi Nemoto 1148d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1149d5ab1a69SYoichi Yuasa bool 1150d5ab1a69SYoichi Yuasa 1151252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 11521da177e4SLinus Torvalds bool 11531da177e4SLinus Torvalds 11549267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 11559267a30dSMarc St-Jean bool 11569267a30dSMarc St-Jean 1157a83860c2SRalf Baechleconfig SOC_EMMA2RH 1158a83860c2SRalf Baechle bool 1159a83860c2SRalf Baechle select CEVT_R4K 1160a83860c2SRalf Baechle select CSRC_R4K 1161a83860c2SRalf Baechle select DMA_NONCOHERENT 1162a83860c2SRalf Baechle select IRQ_CPU 1163a83860c2SRalf Baechle select SWAP_IO_SPACE 1164a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1165a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1166a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1167a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1168a83860c2SRalf Baechle 1169edb6310aSDaniel Lairdconfig SOC_PNX833X 1170edb6310aSDaniel Laird bool 1171edb6310aSDaniel Laird select CEVT_R4K 1172edb6310aSDaniel Laird select CSRC_R4K 1173edb6310aSDaniel Laird select IRQ_CPU 1174edb6310aSDaniel Laird select DMA_NONCOHERENT 1175edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1176edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1177edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1178edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1179377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1180edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1181edb6310aSDaniel Laird 1182edb6310aSDaniel Lairdconfig SOC_PNX8335 1183edb6310aSDaniel Laird bool 1184edb6310aSDaniel Laird select SOC_PNX833X 1185edb6310aSDaniel Laird 1186a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1187a7e07b1aSMarkos Chandras bool 1188a7e07b1aSMarkos Chandras 11891da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 11901da177e4SLinus Torvalds bool 11911da177e4SLinus Torvalds 1192e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1193e2defae5SThomas Bogendoerfer bool 1194e2defae5SThomas Bogendoerfer 11955b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 11965b438c44SThomas Bogendoerfer bool 11975b438c44SThomas Bogendoerfer 1198e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1199e2defae5SThomas Bogendoerfer bool 1200e2defae5SThomas Bogendoerfer 1201e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1202e2defae5SThomas Bogendoerfer bool 1203e2defae5SThomas Bogendoerfer 1204e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1205e2defae5SThomas Bogendoerfer bool 1206e2defae5SThomas Bogendoerfer 1207e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1208e2defae5SThomas Bogendoerfer bool 1209e2defae5SThomas Bogendoerfer 1210e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1211e2defae5SThomas Bogendoerfer bool 1212e2defae5SThomas Bogendoerfer 12130e2794b0SRalf Baechleconfig FW_ARC32 12145e83d430SRalf Baechle bool 12155e83d430SRalf Baechle 1216aaa9fad3SPaul Bolleconfig FW_SNIPROM 1217231a35d3SThomas Bogendoerfer bool 1218231a35d3SThomas Bogendoerfer 12191da177e4SLinus Torvaldsconfig BOOT_ELF32 12201da177e4SLinus Torvalds bool 12211da177e4SLinus Torvalds 1222930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1223930beb5aSFlorian Fainelli bool 1224930beb5aSFlorian Fainelli 1225930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1226930beb5aSFlorian Fainelli bool 1227930beb5aSFlorian Fainelli 1228930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1229930beb5aSFlorian Fainelli bool 1230930beb5aSFlorian Fainelli 1231930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1232930beb5aSFlorian Fainelli bool 1233930beb5aSFlorian Fainelli 12341da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 12351da177e4SLinus Torvalds int 1236a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 1237*5432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 1238*5432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 1239*5432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 12401da177e4SLinus Torvalds default "5" 12411da177e4SLinus Torvalds 12421da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 12431da177e4SLinus Torvalds bool 12441da177e4SLinus Torvalds 12451da177e4SLinus Torvaldsconfig ARC_CONSOLE 12461da177e4SLinus Torvalds bool "ARC console support" 1247e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 12481da177e4SLinus Torvalds 12491da177e4SLinus Torvaldsconfig ARC_MEMORY 12501da177e4SLinus Torvalds bool 125114b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 12521da177e4SLinus Torvalds default y 12531da177e4SLinus Torvalds 12541da177e4SLinus Torvaldsconfig ARC_PROMLIB 12551da177e4SLinus Torvalds bool 1256e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 12571da177e4SLinus Torvalds default y 12581da177e4SLinus Torvalds 12590e2794b0SRalf Baechleconfig FW_ARC64 12601da177e4SLinus Torvalds bool 12611da177e4SLinus Torvalds 12621da177e4SLinus Torvaldsconfig BOOT_ELF64 12631da177e4SLinus Torvalds bool 12641da177e4SLinus Torvalds 12651da177e4SLinus Torvaldsmenu "CPU selection" 12661da177e4SLinus Torvalds 12671da177e4SLinus Torvaldschoice 12681da177e4SLinus Torvalds prompt "CPU type" 12691da177e4SLinus Torvalds default CPU_R4X00 12701da177e4SLinus Torvalds 12710e476d91SHuacai Chenconfig CPU_LOONGSON3 12720e476d91SHuacai Chen bool "Loongson 3 CPU" 12730e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 12740e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 12750e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 12760e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 12770e476d91SHuacai Chen select WEAK_ORDERING 12780e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 12790e476d91SHuacai Chen help 12800e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 12810e476d91SHuacai Chen set with many extensions. 12820e476d91SHuacai Chen 12833702bba5SWu Zhangjinconfig CPU_LOONGSON2E 12843702bba5SWu Zhangjin bool "Loongson 2E" 12853702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 12863702bba5SWu Zhangjin select CPU_LOONGSON2 12872a21c730SFuxin Zhang help 12882a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 12892a21c730SFuxin Zhang with many extensions. 12902a21c730SFuxin Zhang 129125985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 12926f7a251aSWu Zhangjin bonito64. 12936f7a251aSWu Zhangjin 12946f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 12956f7a251aSWu Zhangjin bool "Loongson 2F" 12966f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 12976f7a251aSWu Zhangjin select CPU_LOONGSON2 1298c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 12996f7a251aSWu Zhangjin help 13006f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 13016f7a251aSWu Zhangjin with many extensions. 13026f7a251aSWu Zhangjin 13036f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 13046f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 13056f7a251aSWu Zhangjin Loongson2E. 13066f7a251aSWu Zhangjin 1307ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1308ca585cf9SKelvin Cheung bool "Loongson 1B" 1309ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1310ca585cf9SKelvin Cheung select CPU_LOONGSON1 1311ca585cf9SKelvin Cheung help 1312ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1313ca585cf9SKelvin Cheung release 2 instruction set. 1314ca585cf9SKelvin Cheung 13156e760c8dSRalf Baechleconfig CPU_MIPS32_R1 13166e760c8dSRalf Baechle bool "MIPS32 Release 1" 13177cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 13186e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1319797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1320ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13216e760c8dSRalf Baechle help 13225e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 13231e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 13241e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 13251e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 13261e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 13271e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 13281e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 13291e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 13301e5f1caaSRalf Baechle performance. 13311e5f1caaSRalf Baechle 13321e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 13331e5f1caaSRalf Baechle bool "MIPS32 Release 2" 13347cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 13351e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1336797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1337ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1338a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 13392235a54dSSanjay Lal select HAVE_KVM 13401e5f1caaSRalf Baechle help 13415e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 13426e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 13436e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 13446e760c8dSRalf Baechle specific type of processor in your system, choose those that one 13456e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 13461da177e4SLinus Torvalds 13477fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 13487fd08ca5SLeonid Yegoshin bool "MIPS32 Release 6 (EXPERIMENTAL)" 13497fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 13507fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 13517fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 13527fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 13537fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 13544e0748f5SMarkos Chandras select GENERIC_CSUM 13557fd08ca5SLeonid Yegoshin select HAVE_KVM 13567fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 13577fd08ca5SLeonid Yegoshin help 13587fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 13597fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 13607fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 13617fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 13627fd08ca5SLeonid Yegoshin 13636e760c8dSRalf Baechleconfig CPU_MIPS64_R1 13646e760c8dSRalf Baechle bool "MIPS64 Release 1" 13657cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1366797798c1SRalf Baechle select CPU_HAS_PREFETCH 1367ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1368ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1369ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13709cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 13716e760c8dSRalf Baechle help 13726e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 13736e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 13746e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 13756e760c8dSRalf Baechle specific type of processor in your system, choose those that one 13766e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 13771e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 13781e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 13791e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 13801e5f1caaSRalf Baechle performance. 13811e5f1caaSRalf Baechle 13821e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 13831e5f1caaSRalf Baechle bool "MIPS64 Release 2" 13847cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1385797798c1SRalf Baechle select CPU_HAS_PREFETCH 13861e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 13871e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1388ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13899cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1390a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 13911e5f1caaSRalf Baechle help 13921e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 13931e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 13941e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 13951e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 13961e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 13971da177e4SLinus Torvalds 13987fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 13997fd08ca5SLeonid Yegoshin bool "MIPS64 Release 6 (EXPERIMENTAL)" 14007fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 14017fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14027fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14037fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 14047fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14057fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14064e0748f5SMarkos Chandras select GENERIC_CSUM 14077fd08ca5SLeonid Yegoshin help 14087fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14097fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 14107fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 14117fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 14127fd08ca5SLeonid Yegoshin 14131da177e4SLinus Torvaldsconfig CPU_R3000 14141da177e4SLinus Torvalds bool "R3000" 14157cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1416f7062ddbSRalf Baechle select CPU_HAS_WB 1417ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1418797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14191da177e4SLinus Torvalds help 14201da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 14211da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 14221da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 14231da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 14241da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 14251da177e4SLinus Torvalds try to recompile with R3000. 14261da177e4SLinus Torvalds 14271da177e4SLinus Torvaldsconfig CPU_TX39XX 14281da177e4SLinus Torvalds bool "R39XX" 14297cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1430ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 14311da177e4SLinus Torvalds 14321da177e4SLinus Torvaldsconfig CPU_VR41XX 14331da177e4SLinus Torvalds bool "R41xx" 14347cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1435ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1436ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 14371da177e4SLinus Torvalds help 14385e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 14391da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 14401da177e4SLinus Torvalds kernel built with this option will not run on any other type of 14411da177e4SLinus Torvalds processor or vice versa. 14421da177e4SLinus Torvalds 14431da177e4SLinus Torvaldsconfig CPU_R4300 14441da177e4SLinus Torvalds bool "R4300" 14457cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1446ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1447ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 14481da177e4SLinus Torvalds help 14491da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 14501da177e4SLinus Torvalds 14511da177e4SLinus Torvaldsconfig CPU_R4X00 14521da177e4SLinus Torvalds bool "R4x00" 14537cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1454ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1455ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1456970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14571da177e4SLinus Torvalds help 14581da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 14591da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 14601da177e4SLinus Torvalds 14611da177e4SLinus Torvaldsconfig CPU_TX49XX 14621da177e4SLinus Torvalds bool "R49XX" 14637cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1464de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1465ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1466ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1467970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14681da177e4SLinus Torvalds 14691da177e4SLinus Torvaldsconfig CPU_R5000 14701da177e4SLinus Torvalds bool "R5000" 14717cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1472ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1473ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1474970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14751da177e4SLinus Torvalds help 14761da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 14771da177e4SLinus Torvalds 14781da177e4SLinus Torvaldsconfig CPU_R5432 14791da177e4SLinus Torvalds bool "R5432" 14807cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 14815e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 14825e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1483970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14841da177e4SLinus Torvalds 1485542c1020SShinya Kuribayashiconfig CPU_R5500 1486542c1020SShinya Kuribayashi bool "R5500" 1487542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1488542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1489542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 14909cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1491542c1020SShinya Kuribayashi help 1492542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1493542c1020SShinya Kuribayashi instruction set. 1494542c1020SShinya Kuribayashi 14951da177e4SLinus Torvaldsconfig CPU_R6000 14961da177e4SLinus Torvalds bool "R6000" 14977cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1498ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 14991da177e4SLinus Torvalds help 15001da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1501c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 15021da177e4SLinus Torvalds 15031da177e4SLinus Torvaldsconfig CPU_NEVADA 15041da177e4SLinus Torvalds bool "RM52xx" 15057cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1506ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1507ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1508970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15091da177e4SLinus Torvalds help 15101da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 15111da177e4SLinus Torvalds 15121da177e4SLinus Torvaldsconfig CPU_R8000 15131da177e4SLinus Torvalds bool "R8000" 15147cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 15155e83d430SRalf Baechle select CPU_HAS_PREFETCH 1516ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15171da177e4SLinus Torvalds help 15181da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 15191da177e4SLinus Torvalds uncommon and the support for them is incomplete. 15201da177e4SLinus Torvalds 15211da177e4SLinus Torvaldsconfig CPU_R10000 15221da177e4SLinus Torvalds bool "R10000" 15237cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 15245e83d430SRalf Baechle select CPU_HAS_PREFETCH 1525ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1526ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1527797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1528970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15291da177e4SLinus Torvalds help 15301da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 15311da177e4SLinus Torvalds 15321da177e4SLinus Torvaldsconfig CPU_RM7000 15331da177e4SLinus Torvalds bool "RM7000" 15347cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 15355e83d430SRalf Baechle select CPU_HAS_PREFETCH 1536ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1537ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1538797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1539970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15401da177e4SLinus Torvalds 15411da177e4SLinus Torvaldsconfig CPU_SB1 15421da177e4SLinus Torvalds bool "SB1" 15437cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1544ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1545ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1546797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1547970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15480004a9dfSRalf Baechle select WEAK_ORDERING 15491da177e4SLinus Torvalds 1550a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1551a86c7f72SDavid Daney bool "Cavium Octeon processor" 15525e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1553a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1554a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1555a86c7f72SDavid Daney select WEAK_ORDERING 1556a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 15579cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 15589296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 1559930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1560a86c7f72SDavid Daney help 1561a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1562a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1563a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1564a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1565a86c7f72SDavid Daney 1566cd746249SJonas Gorskiconfig CPU_BMIPS 1567cd746249SJonas Gorski bool "Broadcom BMIPS" 1568cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1569cd746249SJonas Gorski select CPU_MIPS32 1570fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1571cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1572cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1573cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1574cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1575cd746249SJonas Gorski select DMA_NONCOHERENT 1576cd746249SJonas Gorski select IRQ_CPU 1577cd746249SJonas Gorski select SWAP_IO_SPACE 1578cd746249SJonas Gorski select WEAK_ORDERING 1579c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 158069aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1581c1c0c461SKevin Cernekee help 1582fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1583c1c0c461SKevin Cernekee 15847f058e85SJayachandran Cconfig CPU_XLR 15857f058e85SJayachandran C bool "Netlogic XLR SoC" 15867f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 15877f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 15887f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 15897f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1590970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15917f058e85SJayachandran C select WEAK_ORDERING 15927f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 15937f058e85SJayachandran C help 15947f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 15951c773ea4SJayachandran C 15961c773ea4SJayachandran Cconfig CPU_XLP 15971c773ea4SJayachandran C bool "Netlogic XLP SoC" 15981c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 15991c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 16001c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 16011c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 16021c773ea4SJayachandran C select WEAK_ORDERING 16031c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 16041c773ea4SJayachandran C select CPU_HAS_PREFETCH 1605d6504846SJayachandran C select CPU_MIPSR2 16061c773ea4SJayachandran C help 16071c773ea4SJayachandran C Netlogic Microsystems XLP processors. 16081da177e4SLinus Torvaldsendchoice 16091da177e4SLinus Torvalds 1610a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1611a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1612a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 16137fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1614a6e18781SLeonid Yegoshin help 1615a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1616a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1617a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1618a6e18781SLeonid Yegoshin 1619a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1620a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1621a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1622a6e18781SLeonid Yegoshin select EVA 1623a6e18781SLeonid Yegoshin default y 1624a6e18781SLeonid Yegoshin help 1625a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1626a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1627a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1628a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1629a6e18781SLeonid Yegoshin 1630622844bfSWu Zhangjinif CPU_LOONGSON2F 1631622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1632622844bfSWu Zhangjin bool 1633622844bfSWu Zhangjin 1634622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1635622844bfSWu Zhangjin bool 1636622844bfSWu Zhangjin 1637622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1638622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1639622844bfSWu Zhangjin default y 1640622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1641622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1642622844bfSWu Zhangjin help 1643622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1644622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1645622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1646622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1647622844bfSWu Zhangjin 1648622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1649622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1650622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1651622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1652622844bfSWu Zhangjin systems. 1653622844bfSWu Zhangjin 1654622844bfSWu Zhangjin If unsure, please say Y. 1655622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1656622844bfSWu Zhangjin 16571b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 16581b93b3c3SWu Zhangjin bool 16591b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 16601b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 166131c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 16621b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1663fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 16644e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 16651b93b3c3SWu Zhangjin 16661b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 16671b93b3c3SWu Zhangjin bool 16681b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 16691b93b3c3SWu Zhangjin 16703702bba5SWu Zhangjinconfig CPU_LOONGSON2 16713702bba5SWu Zhangjin bool 16723702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 16733702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 16743702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1675970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16763702bba5SWu Zhangjin 1677ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1678ca585cf9SKelvin Cheung bool 1679ca585cf9SKelvin Cheung select CPU_MIPS32 1680ca585cf9SKelvin Cheung select CPU_MIPSR2 1681ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1682ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1683ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1684f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1685ca585cf9SKelvin Cheung 1686fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 168704fa8bf7SJonas Gorski select SMP_UP if SMP 16881bbb6c1bSKevin Cernekee bool 1689cd746249SJonas Gorski 1690cd746249SJonas Gorskiconfig CPU_BMIPS4350 1691cd746249SJonas Gorski bool 1692cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1693cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1694cd746249SJonas Gorski 1695cd746249SJonas Gorskiconfig CPU_BMIPS4380 1696cd746249SJonas Gorski bool 1697bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1698cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1699cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1700cd746249SJonas Gorski 1701cd746249SJonas Gorskiconfig CPU_BMIPS5000 1702cd746249SJonas Gorski bool 1703cd746249SJonas Gorski select MIPS_CPU_SCACHE 1704bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1705cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1706cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 17071bbb6c1bSKevin Cernekee 17080e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 17090e476d91SHuacai Chen bool 17100e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 17110e476d91SHuacai Chen 17123702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 17132a21c730SFuxin Zhang bool 17142a21c730SFuxin Zhang 17156f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 17166f7a251aSWu Zhangjin bool 171755045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 171855045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 171922f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 17206f7a251aSWu Zhangjin 1721ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1722ca585cf9SKelvin Cheung bool 1723ca585cf9SKelvin Cheung 17247cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 17257cf8053bSRalf Baechle bool 17267cf8053bSRalf Baechle 17277cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 17287cf8053bSRalf Baechle bool 17297cf8053bSRalf Baechle 1730a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1731a6e18781SLeonid Yegoshin bool 1732a6e18781SLeonid Yegoshin 17337fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 17347fd08ca5SLeonid Yegoshin bool 17357fd08ca5SLeonid Yegoshin 17367cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 17377cf8053bSRalf Baechle bool 17387cf8053bSRalf Baechle 17397cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 17407cf8053bSRalf Baechle bool 17417cf8053bSRalf Baechle 17427fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 17437fd08ca5SLeonid Yegoshin bool 17447fd08ca5SLeonid Yegoshin 17457cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 17467cf8053bSRalf Baechle bool 17477cf8053bSRalf Baechle 17487cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 17497cf8053bSRalf Baechle bool 17507cf8053bSRalf Baechle 17517cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 17527cf8053bSRalf Baechle bool 17537cf8053bSRalf Baechle 17547cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 17557cf8053bSRalf Baechle bool 17567cf8053bSRalf Baechle 17577cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 17587cf8053bSRalf Baechle bool 17597cf8053bSRalf Baechle 17607cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 17617cf8053bSRalf Baechle bool 17627cf8053bSRalf Baechle 17637cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 17647cf8053bSRalf Baechle bool 17657cf8053bSRalf Baechle 17667cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 17677cf8053bSRalf Baechle bool 17687cf8053bSRalf Baechle 1769542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1770542c1020SShinya Kuribayashi bool 1771542c1020SShinya Kuribayashi 17727cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 17737cf8053bSRalf Baechle bool 17747cf8053bSRalf Baechle 17757cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 17767cf8053bSRalf Baechle bool 17777cf8053bSRalf Baechle 17787cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 17797cf8053bSRalf Baechle bool 17807cf8053bSRalf Baechle 17817cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 17827cf8053bSRalf Baechle bool 17837cf8053bSRalf Baechle 17847cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 17857cf8053bSRalf Baechle bool 17867cf8053bSRalf Baechle 17877cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 17887cf8053bSRalf Baechle bool 17897cf8053bSRalf Baechle 17905e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 17915e683389SDavid Daney bool 17925e683389SDavid Daney 1793cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1794c1c0c461SKevin Cernekee bool 1795c1c0c461SKevin Cernekee 1796fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1797c1c0c461SKevin Cernekee bool 1798cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1799c1c0c461SKevin Cernekee 1800c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1801c1c0c461SKevin Cernekee bool 1802cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1803c1c0c461SKevin Cernekee 1804c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1805c1c0c461SKevin Cernekee bool 1806cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1807c1c0c461SKevin Cernekee 1808c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1809c1c0c461SKevin Cernekee bool 1810cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1811c1c0c461SKevin Cernekee 18127f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 18137f058e85SJayachandran C bool 18147f058e85SJayachandran C 18151c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 18161c773ea4SJayachandran C bool 18171c773ea4SJayachandran C 1818b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 1819b6911bbaSPaul Burton depends on MIPS_MALTA 1820b6911bbaSPaul Burton depends on PCI 1821b6911bbaSPaul Burton bool 1822b6911bbaSPaul Burton default y 1823b6911bbaSPaul Burton 182417099b11SRalf Baechle# 182517099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 182617099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 182717099b11SRalf Baechle# 18280004a9dfSRalf Baechleconfig WEAK_ORDERING 18290004a9dfSRalf Baechle bool 183017099b11SRalf Baechle 183117099b11SRalf Baechle# 183217099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 183317099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 183417099b11SRalf Baechle# 183517099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 183617099b11SRalf Baechle bool 18375e83d430SRalf Baechleendmenu 18385e83d430SRalf Baechle 18395e83d430SRalf Baechle# 18405e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 18415e83d430SRalf Baechle# 18425e83d430SRalf Baechleconfig CPU_MIPS32 18435e83d430SRalf Baechle bool 18447fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 18455e83d430SRalf Baechle 18465e83d430SRalf Baechleconfig CPU_MIPS64 18475e83d430SRalf Baechle bool 18487fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 18495e83d430SRalf Baechle 18505e83d430SRalf Baechle# 1851c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 18525e83d430SRalf Baechle# 18535e83d430SRalf Baechleconfig CPU_MIPSR1 18545e83d430SRalf Baechle bool 18555e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 18565e83d430SRalf Baechle 18575e83d430SRalf Baechleconfig CPU_MIPSR2 18585e83d430SRalf Baechle bool 1859a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 1860a7e07b1aSMarkos Chandras select MIPS_SPRAM 18615e83d430SRalf Baechle 18627fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 18637fd08ca5SLeonid Yegoshin bool 18647fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 1865a7e07b1aSMarkos Chandras select MIPS_SPRAM 18665e83d430SRalf Baechle 1867a6e18781SLeonid Yegoshinconfig EVA 1868a6e18781SLeonid Yegoshin bool 1869a6e18781SLeonid Yegoshin 18705e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 18715e83d430SRalf Baechle bool 18725e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 18735e83d430SRalf Baechle bool 18745e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 18755e83d430SRalf Baechle bool 18765e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 18775e83d430SRalf Baechle bool 187855045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 187955045ff5SWu Zhangjin bool 188055045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 188155045ff5SWu Zhangjin bool 18829cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 18839cffd154SDavid Daney bool 188422f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 188522f1fdfdSWu Zhangjin bool 188682622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 188782622284SDavid Daney bool 1888d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 18895e83d430SRalf Baechle 18908192c9eaSDavid Daney# 18918192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 18928192c9eaSDavid Daney# 18938192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 18948192c9eaSDavid Daney bool 1895f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 18968192c9eaSDavid Daney 18975e83d430SRalf Baechlemenu "Kernel type" 18985e83d430SRalf Baechle 18995e83d430SRalf Baechlechoice 19005e83d430SRalf Baechle prompt "Kernel code model" 19015e83d430SRalf Baechle help 19025e83d430SRalf Baechle You should only select this option if you have a workload that 19035e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 19045e83d430SRalf Baechle large memory. You will only be presented a single option in this 19055e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 19065e83d430SRalf Baechle 19075e83d430SRalf Baechleconfig 32BIT 19085e83d430SRalf Baechle bool "32-bit kernel" 19095e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 19105e83d430SRalf Baechle select TRAD_SIGNALS 19115e83d430SRalf Baechle help 19125e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 19135e83d430SRalf Baechleconfig 64BIT 19145e83d430SRalf Baechle bool "64-bit kernel" 19155e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 19165e83d430SRalf Baechle help 19175e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 19185e83d430SRalf Baechle 19195e83d430SRalf Baechleendchoice 19205e83d430SRalf Baechle 19212235a54dSSanjay Lalconfig KVM_GUEST 19222235a54dSSanjay Lal bool "KVM Guest Kernel" 1923f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 19242235a54dSSanjay Lal help 19252235a54dSSanjay Lal Select this option if building a guest kernel for KVM (Trap & Emulate) mode 19262235a54dSSanjay Lal 1927eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 1928eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 19292235a54dSSanjay Lal depends on KVM_GUEST 1930eda3d33cSJames Hogan default 100 19312235a54dSSanjay Lal help 1932eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 1933eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 1934eda3d33cSJames Hogan timer frequency is specified directly. 19352235a54dSSanjay Lal 19361da177e4SLinus Torvaldschoice 19371da177e4SLinus Torvalds prompt "Kernel page size" 19381da177e4SLinus Torvalds default PAGE_SIZE_4KB 19391da177e4SLinus Torvalds 19401da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 19411da177e4SLinus Torvalds bool "4kB" 19420e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 19431da177e4SLinus Torvalds help 19441da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 19451da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 19461da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 19471da177e4SLinus Torvalds recommended for low memory systems. 19481da177e4SLinus Torvalds 19491da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 19501da177e4SLinus Torvalds bool "8kB" 19517d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 19521da177e4SLinus Torvalds help 19531da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 19541da177e4SLinus Torvalds the price of higher memory consumption. This option is available 1955c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 1956c52399beSRalf Baechle suitable Linux distribution to support this. 19571da177e4SLinus Torvalds 19581da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 19591da177e4SLinus Torvalds bool "16kB" 1960714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 19611da177e4SLinus Torvalds help 19621da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 19631da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 1964714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 1965714bfad6SRalf Baechle Linux distribution to support this. 19661da177e4SLinus Torvalds 1967c52399beSRalf Baechleconfig PAGE_SIZE_32KB 1968c52399beSRalf Baechle bool "32kB" 1969c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 1970c52399beSRalf Baechle help 1971c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 1972c52399beSRalf Baechle the price of higher memory consumption. This option is available 1973c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 1974c52399beSRalf Baechle distribution to support this. 1975c52399beSRalf Baechle 19761da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 19771da177e4SLinus Torvalds bool "64kB" 19787d60717eSKees Cook depends on !CPU_R3000 && !CPU_TX39XX 19791da177e4SLinus Torvalds help 19801da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 19811da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 19821da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 1983714bfad6SRalf Baechle writing this option is still high experimental. 19841da177e4SLinus Torvalds 19851da177e4SLinus Torvaldsendchoice 19861da177e4SLinus Torvalds 1987c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 1988c9bace7cSDavid Daney int "Maximum zone order" 1989e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 1990e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 1991e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 1992e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 1993e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 1994e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 1995c9bace7cSDavid Daney range 11 64 1996c9bace7cSDavid Daney default "11" 1997c9bace7cSDavid Daney help 1998c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 1999c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2000c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2001c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2002c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2003c9bace7cSDavid Daney increase this value. 2004c9bace7cSDavid Daney 2005c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2006c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2007c9bace7cSDavid Daney 2008c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2009c9bace7cSDavid Daney when choosing a value for this option. 2010c9bace7cSDavid Daney 20111da177e4SLinus Torvaldsconfig BOARD_SCACHE 20121da177e4SLinus Torvalds bool 20131da177e4SLinus Torvalds 20141da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 20151da177e4SLinus Torvalds bool 20161da177e4SLinus Torvalds select BOARD_SCACHE 20171da177e4SLinus Torvalds 20189318c51aSChris Dearman# 20199318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 20209318c51aSChris Dearman# 20219318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 20229318c51aSChris Dearman bool 20239318c51aSChris Dearman select BOARD_SCACHE 20249318c51aSChris Dearman 20251da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 20261da177e4SLinus Torvalds bool 20271da177e4SLinus Torvalds select BOARD_SCACHE 20281da177e4SLinus Torvalds 20291da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 20301da177e4SLinus Torvalds bool 20311da177e4SLinus Torvalds select BOARD_SCACHE 20321da177e4SLinus Torvalds 20331da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 20341da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 20351da177e4SLinus Torvalds depends on CPU_SB1 20361da177e4SLinus Torvalds help 20371da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 20381da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 20391da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 20401da177e4SLinus Torvalds 20411da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2042c8094b53SRalf Baechle bool 20431da177e4SLinus Torvalds 20443165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 20453165c846SFlorian Fainelli bool 20463165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 20473165c846SFlorian Fainelli 204891405eb6SFlorian Fainelliconfig CPU_R4K_FPU 204991405eb6SFlorian Fainelli bool 205091405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 205191405eb6SFlorian Fainelli 205262cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 205362cedc4fSFlorian Fainelli bool 205462cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 205562cedc4fSFlorian Fainelli 205659d6ab86SRalf Baechleconfig MIPS_MT_SMP 2057a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 205859d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 205959d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2060d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2061c080faa5SSteven J. Hill select SYNC_R4K 20620c2cb004SPaul Burton select MIPS_GIC_IPI 206359d6ab86SRalf Baechle select MIPS_MT 206459d6ab86SRalf Baechle select SMP 206587353d8aSRalf Baechle select SMP_UP 2066c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2067c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2068399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 206959d6ab86SRalf Baechle help 2070c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2071c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2072c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2073c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2074c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 207559d6ab86SRalf Baechle 2076f41ae0b2SRalf Baechleconfig MIPS_MT 2077f41ae0b2SRalf Baechle bool 2078f41ae0b2SRalf Baechle 20790ab7aefcSRalf Baechleconfig SCHED_SMT 20800ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 20810ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 20820ab7aefcSRalf Baechle default n 20830ab7aefcSRalf Baechle help 20840ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 20850ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 20860ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 20870ab7aefcSRalf Baechle 20880ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 20890ab7aefcSRalf Baechle bool 20900ab7aefcSRalf Baechle 2091f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2092f41ae0b2SRalf Baechle bool 2093f41ae0b2SRalf Baechle 2094f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2095f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2096f088fc84SRalf Baechle default y 2097b633648cSRalf Baechle depends on MIPS_MT_SMP 209807cc0c9eSRalf Baechle 2099b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2100b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 2101b0a668fbSLeonid Yegoshin depends on CPU_MIPSR6 && !SMP 2102b0a668fbSLeonid Yegoshin default y 2103b0a668fbSLeonid Yegoshin help 2104b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2105b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 2106b0a668fbSLeonid Yegoshin default. You can enable it using the 'mipsr2emul' kernel option. 2107b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2108b0a668fbSLeonid Yegoshin final kernel image. 2109b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels" 2110b0a668fbSLeonid Yegoshin depends on SMP && CPU_MIPSR6 2111b0a668fbSLeonid Yegoshin 211207cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 211307cc0c9eSRalf Baechle bool "VPE loader support." 2114704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 211507cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 211607cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 211707cc0c9eSRalf Baechle select MIPS_MT 211807cc0c9eSRalf Baechle help 211907cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 212007cc0c9eSRalf Baechle onto another VPE and running it. 2121f088fc84SRalf Baechle 212217a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 212317a1d523SDeng-Cheng Zhu bool 212417a1d523SDeng-Cheng Zhu default "y" 212517a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 212617a1d523SDeng-Cheng Zhu 21271a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 21281a2a6d7eSDeng-Cheng Zhu bool 21291a2a6d7eSDeng-Cheng Zhu default "y" 21301a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 21311a2a6d7eSDeng-Cheng Zhu 2132e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2133e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2134e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2135e01402b1SRalf Baechle default y 2136e01402b1SRalf Baechle help 2137e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2138e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2139e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2140e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2141e01402b1SRalf Baechle 2142e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2143e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2144e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 21455e83d430SRalf Baechle help 2146e01402b1SRalf Baechle 2147da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2148da615cf6SDeng-Cheng Zhu bool 2149da615cf6SDeng-Cheng Zhu default "y" 2150da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2151da615cf6SDeng-Cheng Zhu 21522c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 21532c973ef0SDeng-Cheng Zhu bool 21542c973ef0SDeng-Cheng Zhu default "y" 21552c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 21562c973ef0SDeng-Cheng Zhu 21574a16ff4cSRalf Baechleconfig MIPS_CMP 21585cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 2159b633648cSRalf Baechle depends on SYS_SUPPORTS_MIPS_CMP 216072e20142SPaul Burton select MIPS_GIC_IPI 2161b10b43baSMarkos Chandras select SMP 2162eb9b5141STim Anderson select SYNC_R4K 2163b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 21644a16ff4cSRalf Baechle select WEAK_ORDERING 21654a16ff4cSRalf Baechle default n 21664a16ff4cSRalf Baechle help 2167044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2168044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2169044505c7SPaul Burton its ability to start secondary CPUs. 21704a16ff4cSRalf Baechle 21715cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 21725cac93b3SPaul Burton instead of this. 21735cac93b3SPaul Burton 21740ee958e1SPaul Burtonconfig MIPS_CPS 21750ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 21760ee958e1SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 21770ee958e1SPaul Burton select MIPS_CM 21780ee958e1SPaul Burton select MIPS_CPC 21791d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 21800ee958e1SPaul Burton select MIPS_GIC_IPI 21810ee958e1SPaul Burton select SMP 21820ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 21831d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 21840ee958e1SPaul Burton select SYS_SUPPORTS_SMP 21850ee958e1SPaul Burton select WEAK_ORDERING 21860ee958e1SPaul Burton help 21870ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 21880ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 21890ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 21900ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 21910ee958e1SPaul Burton support is unavailable. 21920ee958e1SPaul Burton 21933179d37eSPaul Burtonconfig MIPS_CPS_PM 219439a59593SMarkos Chandras depends on MIPS_CPS 2195a8b84677SPaul Burton select MIPS_CPC 21963179d37eSPaul Burton bool 21973179d37eSPaul Burton 219872e20142SPaul Burtonconfig MIPS_GIC_IPI 219972e20142SPaul Burton bool 220072e20142SPaul Burton 22019f98f3ddSPaul Burtonconfig MIPS_CM 22029f98f3ddSPaul Burton bool 22039f98f3ddSPaul Burton 22049c38cf44SPaul Burtonconfig MIPS_CPC 22059c38cf44SPaul Burton bool 22062600990eSRalf Baechle 22071da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 22081da177e4SLinus Torvalds bool 22091da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 22101da177e4SLinus Torvalds default y 22111da177e4SLinus Torvalds 22121da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 22131da177e4SLinus Torvalds bool 22141da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 22151da177e4SLinus Torvalds default y 22161da177e4SLinus Torvalds 22171da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 22181da177e4SLinus Torvalds bool 22191da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 22201da177e4SLinus Torvalds default y 22211da177e4SLinus Torvalds 22222235a54dSSanjay Lal 222360ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 222434adb28dSRalf Baechle bool 222560ec6571Spascal@pabr.org 22269e2b5372SMarkos Chandraschoice 22279e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 22289e2b5372SMarkos Chandras 22299e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 22309e2b5372SMarkos Chandras bool "None" 22319e2b5372SMarkos Chandras help 22329e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 22339e2b5372SMarkos Chandras 22349693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 22359693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 22369e2b5372SMarkos Chandras bool "SmartMIPS" 22379693a853SFranck Bui-Huu help 22389693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 22399693a853SFranck Bui-Huu increased security at both hardware and software level for 22409693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 22419693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 22429693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 22439693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 22449693a853SFranck Bui-Huu here. 22459693a853SFranck Bui-Huu 2246bce86083SSteven J. Hillconfig CPU_MICROMIPS 22477fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 22489e2b5372SMarkos Chandras bool "microMIPS" 2249bce86083SSteven J. Hill help 2250bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2251bce86083SSteven J. Hill microMIPS ISA 2252bce86083SSteven J. Hill 22539e2b5372SMarkos Chandrasendchoice 22549e2b5372SMarkos Chandras 2255a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 22564af94d5dSPaul Burton bool "Support for the MIPS SIMD Architecture (EXPERIMENTAL)" 2257a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 22582a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2259a5e9a69eSPaul Burton help 2260a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2261a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 22621db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 22631db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 22641db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 22651db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 22661db1af84SPaul Burton the size & complexity of your kernel. 2267a5e9a69eSPaul Burton 2268a5e9a69eSPaul Burton If unsure, say Y. 2269a5e9a69eSPaul Burton 22701da177e4SLinus Torvaldsconfig CPU_HAS_WB 2271f7062ddbSRalf Baechle bool 2272e01402b1SRalf Baechle 2273df0ac8a4SKevin Cernekeeconfig XKS01 2274df0ac8a4SKevin Cernekee bool 2275df0ac8a4SKevin Cernekee 2276f41ae0b2SRalf Baechle# 2277f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2278f41ae0b2SRalf Baechle# 2279e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2280f41ae0b2SRalf Baechle bool 2281e01402b1SRalf Baechle 2282f41ae0b2SRalf Baechle# 2283f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2284f41ae0b2SRalf Baechle# 2285e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2286f41ae0b2SRalf Baechle bool 2287e01402b1SRalf Baechle 22881da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 22891da177e4SLinus Torvalds bool 22901da177e4SLinus Torvalds depends on !CPU_R3000 22911da177e4SLinus Torvalds default y 22921da177e4SLinus Torvalds 22931da177e4SLinus Torvalds# 229420d60d99SMaciej W. Rozycki# CPU non-features 229520d60d99SMaciej W. Rozycki# 229620d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 229720d60d99SMaciej W. Rozycki bool 229820d60d99SMaciej W. Rozycki 229920d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 230020d60d99SMaciej W. Rozycki bool 230120d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 230220d60d99SMaciej W. Rozycki 230320d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 230420d60d99SMaciej W. Rozycki bool 230520d60d99SMaciej W. Rozycki 230620d60d99SMaciej W. Rozycki# 23071da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 23081da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 23091da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 23101da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 23111da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 23121da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 23131da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 23141da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2315797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2316797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2317797798c1SRalf Baechle# support. 23181da177e4SLinus Torvalds# 23191da177e4SLinus Torvaldsconfig HIGHMEM 23201da177e4SLinus Torvalds bool "High Memory Support" 2321a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2322797798c1SRalf Baechle 2323797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2324797798c1SRalf Baechle bool 2325797798c1SRalf Baechle 2326797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2327797798c1SRalf Baechle bool 23281da177e4SLinus Torvalds 23299693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 23309693a853SFranck Bui-Huu bool 23319693a853SFranck Bui-Huu 2332a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2333a6a4834cSSteven J. Hill bool 2334a6a4834cSSteven J. Hill 2335377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2336377cb1b6SRalf Baechle bool 2337377cb1b6SRalf Baechle help 2338377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2339377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2340377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2341377cb1b6SRalf Baechle 2342a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2343a5e9a69eSPaul Burton bool 2344a5e9a69eSPaul Burton 2345b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2346b4819b59SYoichi Yuasa def_bool y 2347f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2348b4819b59SYoichi Yuasa 2349d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2350d8cb4e11SRalf Baechle bool 2351d8cb4e11SRalf Baechle default y if SGI_IP27 2352d8cb4e11SRalf Baechle help 23533dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2354d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2355d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2356d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2357d8cb4e11SRalf Baechle 2358b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2359b1c6cd42SAtsushi Nemoto bool 23607de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 236131473747SAtsushi Nemoto 2362d8cb4e11SRalf Baechleconfig NUMA 2363d8cb4e11SRalf Baechle bool "NUMA Support" 2364d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2365d8cb4e11SRalf Baechle help 2366d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2367d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2368d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2369d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2370d8cb4e11SRalf Baechle disabled. 2371d8cb4e11SRalf Baechle 2372d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2373d8cb4e11SRalf Baechle bool 2374d8cb4e11SRalf Baechle 2375c80d79d7SYasunori Gotoconfig NODES_SHIFT 2376c80d79d7SYasunori Goto int 2377c80d79d7SYasunori Goto default "6" 2378c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2379c80d79d7SYasunori Goto 238014f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 238114f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 2382b633648cSRalf Baechle depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) 238314f70012SDeng-Cheng Zhu default y 238414f70012SDeng-Cheng Zhu help 238514f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 238614f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 238714f70012SDeng-Cheng Zhu 2388b4819b59SYoichi Yuasasource "mm/Kconfig" 2389b4819b59SYoichi Yuasa 23901da177e4SLinus Torvaldsconfig SMP 23911da177e4SLinus Torvalds bool "Multi-Processing support" 2392e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2393e73ea273SRalf Baechle help 23941da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 23954a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 23964a474157SRobert Graffham than one CPU, say Y. 23971da177e4SLinus Torvalds 23984a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 23991da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 24001da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 24014a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 24021da177e4SLinus Torvalds will run faster if you say N here. 24031da177e4SLinus Torvalds 24041da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 24051da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 24061da177e4SLinus Torvalds 240703502faaSAdrian Bunk See also the SMP-HOWTO available at 240803502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 24091da177e4SLinus Torvalds 24101da177e4SLinus Torvalds If you don't know what to do here, say N. 24111da177e4SLinus Torvalds 241287353d8aSRalf Baechleconfig SMP_UP 241387353d8aSRalf Baechle bool 241487353d8aSRalf Baechle 24154a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 24164a16ff4cSRalf Baechle bool 24174a16ff4cSRalf Baechle 24180ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 24190ee958e1SPaul Burton bool 24200ee958e1SPaul Burton 2421e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2422e73ea273SRalf Baechle bool 2423e73ea273SRalf Baechle 2424130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2425130e2fb7SRalf Baechle bool 2426130e2fb7SRalf Baechle 2427130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2428130e2fb7SRalf Baechle bool 2429130e2fb7SRalf Baechle 2430130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2431130e2fb7SRalf Baechle bool 2432130e2fb7SRalf Baechle 2433130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2434130e2fb7SRalf Baechle bool 2435130e2fb7SRalf Baechle 2436130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2437130e2fb7SRalf Baechle bool 2438130e2fb7SRalf Baechle 24391da177e4SLinus Torvaldsconfig NR_CPUS 2440a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2441a91796a9SJayachandran C range 2 256 24421da177e4SLinus Torvalds depends on SMP 2443130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2444130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2445130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2446130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2447130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 24481da177e4SLinus Torvalds help 24491da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 24501da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 24511da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 245272ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 245372ede9b1SAtsushi Nemoto and 2 for all others. 24541da177e4SLinus Torvalds 24551da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 245672ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 245772ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 245872ede9b1SAtsushi Nemoto power of two. 24591da177e4SLinus Torvalds 2460399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2461399aaa25SAl Cooper bool 2462399aaa25SAl Cooper 24631723b4a3SAtsushi Nemoto# 24641723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 24651723b4a3SAtsushi Nemoto# 24661723b4a3SAtsushi Nemoto 24671723b4a3SAtsushi Nemotochoice 24681723b4a3SAtsushi Nemoto prompt "Timer frequency" 24691723b4a3SAtsushi Nemoto default HZ_250 24701723b4a3SAtsushi Nemoto help 24711723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 24721723b4a3SAtsushi Nemoto 24731723b4a3SAtsushi Nemoto config HZ_48 24740f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 24751723b4a3SAtsushi Nemoto 24761723b4a3SAtsushi Nemoto config HZ_100 24771723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 24781723b4a3SAtsushi Nemoto 24791723b4a3SAtsushi Nemoto config HZ_128 24801723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 24811723b4a3SAtsushi Nemoto 24821723b4a3SAtsushi Nemoto config HZ_250 24831723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 24841723b4a3SAtsushi Nemoto 24851723b4a3SAtsushi Nemoto config HZ_256 24861723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 24871723b4a3SAtsushi Nemoto 24881723b4a3SAtsushi Nemoto config HZ_1000 24891723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 24901723b4a3SAtsushi Nemoto 24911723b4a3SAtsushi Nemoto config HZ_1024 24921723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 24931723b4a3SAtsushi Nemoto 24941723b4a3SAtsushi Nemotoendchoice 24951723b4a3SAtsushi Nemoto 24961723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 24971723b4a3SAtsushi Nemoto bool 24981723b4a3SAtsushi Nemoto 24991723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 25001723b4a3SAtsushi Nemoto bool 25011723b4a3SAtsushi Nemoto 25021723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 25031723b4a3SAtsushi Nemoto bool 25041723b4a3SAtsushi Nemoto 25051723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 25061723b4a3SAtsushi Nemoto bool 25071723b4a3SAtsushi Nemoto 25081723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 25091723b4a3SAtsushi Nemoto bool 25101723b4a3SAtsushi Nemoto 25111723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 25121723b4a3SAtsushi Nemoto bool 25131723b4a3SAtsushi Nemoto 25141723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 25151723b4a3SAtsushi Nemoto bool 25161723b4a3SAtsushi Nemoto 25171723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 25181723b4a3SAtsushi Nemoto bool 25191723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 25201723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 25211723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 25221723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 25231723b4a3SAtsushi Nemoto 25241723b4a3SAtsushi Nemotoconfig HZ 25251723b4a3SAtsushi Nemoto int 25261723b4a3SAtsushi Nemoto default 48 if HZ_48 25271723b4a3SAtsushi Nemoto default 100 if HZ_100 25281723b4a3SAtsushi Nemoto default 128 if HZ_128 25291723b4a3SAtsushi Nemoto default 250 if HZ_250 25301723b4a3SAtsushi Nemoto default 256 if HZ_256 25311723b4a3SAtsushi Nemoto default 1000 if HZ_1000 25321723b4a3SAtsushi Nemoto default 1024 if HZ_1024 25331723b4a3SAtsushi Nemoto 253496685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 253596685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 253696685b17SDeng-Cheng Zhu 2537e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 25381da177e4SLinus Torvalds 2539ea6e942bSAtsushi Nemotoconfig KEXEC 25407d60717eSKees Cook bool "Kexec system call" 2541ea6e942bSAtsushi Nemoto help 2542ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2543ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 25443dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2545ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2546ea6e942bSAtsushi Nemoto 254701dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2548ea6e942bSAtsushi Nemoto 2549ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2550ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2551bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2552bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2553bf220695SGeert Uytterhoeven made. 2554ea6e942bSAtsushi Nemoto 25557aa1c8f4SRalf Baechleconfig CRASH_DUMP 25567aa1c8f4SRalf Baechle bool "Kernel crash dumps" 25577aa1c8f4SRalf Baechle help 25587aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 25597aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 25607aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 25617aa1c8f4SRalf Baechle a specially reserved region and then later executed after 25627aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 25637aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 25647aa1c8f4SRalf Baechle PHYSICAL_START. 25657aa1c8f4SRalf Baechle 25667aa1c8f4SRalf Baechleconfig PHYSICAL_START 25677aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 25687aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 25697aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 25707aa1c8f4SRalf Baechle depends on CRASH_DUMP 25717aa1c8f4SRalf Baechle help 25727aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 25737aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 25747aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 25757aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 25767aa1c8f4SRalf Baechle passed to the panic-ed kernel). 25777aa1c8f4SRalf Baechle 2578ea6e942bSAtsushi Nemotoconfig SECCOMP 2579ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2580293c5bd1SRalf Baechle depends on PROC_FS 2581ea6e942bSAtsushi Nemoto default y 2582ea6e942bSAtsushi Nemoto help 2583ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2584ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2585ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2586ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2587ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2588ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2589ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2590ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2591ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2592ea6e942bSAtsushi Nemoto 2593ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2594ea6e942bSAtsushi Nemoto 2595597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 259606e2e882SPaul Burton bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)" 2597597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2598597ce172SPaul Burton help 2599597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2600597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2601597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2602597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2603597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2604597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2605597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2606597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2607597ce172SPaul Burton saying N here. 2608597ce172SPaul Burton 260906e2e882SPaul Burton Although binutils currently supports use of this flag the details 261006e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 261106e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 261206e2e882SPaul Burton behaviour before the details have been finalised, this option should 261306e2e882SPaul Burton be considered experimental and only enabled by those working upon 261406e2e882SPaul Burton said details. 261506e2e882SPaul Burton 261606e2e882SPaul Burton If unsure, say N. 2617597ce172SPaul Burton 2618f2ffa5abSDezhong Diaoconfig USE_OF 26190b3e06fdSJonas Gorski bool 2620f2ffa5abSDezhong Diao select OF 2621e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2622abd2363fSGrant Likely select IRQ_DOMAIN 2623f2ffa5abSDezhong Diao 26247fafb068SAndrew Brestickerconfig BUILTIN_DTB 26257fafb068SAndrew Bresticker bool 26267fafb068SAndrew Bresticker 26275e83d430SRalf Baechleendmenu 26285e83d430SRalf Baechle 26291df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 26301df0f0ffSAtsushi Nemoto bool 26311df0f0ffSAtsushi Nemoto default y 26321df0f0ffSAtsushi Nemoto 26331df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 26341df0f0ffSAtsushi Nemoto bool 26351df0f0ffSAtsushi Nemoto default y 26361df0f0ffSAtsushi Nemoto 2637b6c3539bSRalf Baechlesource "init/Kconfig" 2638b6c3539bSRalf Baechle 2639dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2640dc52ddc0SMatt Helsley 26411da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 26421da177e4SLinus Torvalds 26435e83d430SRalf Baechleconfig HW_HAS_EISA 26445e83d430SRalf Baechle bool 26451da177e4SLinus Torvaldsconfig HW_HAS_PCI 26461da177e4SLinus Torvalds bool 26471da177e4SLinus Torvalds 26481da177e4SLinus Torvaldsconfig PCI 26491da177e4SLinus Torvalds bool "Support for PCI controller" 26501da177e4SLinus Torvalds depends on HW_HAS_PCI 2651abb4ae46SRalf Baechle select PCI_DOMAINS 26520f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 26531da177e4SLinus Torvalds help 26541da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 26551da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 26561da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 26571da177e4SLinus Torvalds say Y, otherwise N. 26581da177e4SLinus Torvalds 26590e476d91SHuacai Chenconfig HT_PCI 26600e476d91SHuacai Chen bool "Support for HT-linked PCI" 26610e476d91SHuacai Chen default y 26620e476d91SHuacai Chen depends on CPU_LOONGSON3 26630e476d91SHuacai Chen select PCI 26640e476d91SHuacai Chen select PCI_DOMAINS 26650e476d91SHuacai Chen help 26660e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 26670e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 26680e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 26690e476d91SHuacai Chen 26701da177e4SLinus Torvaldsconfig PCI_DOMAINS 26711da177e4SLinus Torvalds bool 26721da177e4SLinus Torvalds 26731da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 26741da177e4SLinus Torvalds 26753f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 26763f787ca4SJonas Gorski 26771da177e4SLinus Torvalds# 26781da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 26791da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 26801da177e4SLinus Torvalds# users to choose the right thing ... 26811da177e4SLinus Torvalds# 26821da177e4SLinus Torvaldsconfig ISA 26831da177e4SLinus Torvalds bool 26841da177e4SLinus Torvalds 26851da177e4SLinus Torvaldsconfig EISA 26861da177e4SLinus Torvalds bool "EISA support" 26875e83d430SRalf Baechle depends on HW_HAS_EISA 26881da177e4SLinus Torvalds select ISA 2689aa414dffSRalf Baechle select GENERIC_ISA_DMA 26901da177e4SLinus Torvalds ---help--- 26911da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 26921da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 26931da177e4SLinus Torvalds 26941da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 26951da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 26961da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 26971da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 26981da177e4SLinus Torvalds 26991da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 27001da177e4SLinus Torvalds 27011da177e4SLinus Torvalds Otherwise, say N. 27021da177e4SLinus Torvalds 27031da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 27041da177e4SLinus Torvalds 27051da177e4SLinus Torvaldsconfig TC 27061da177e4SLinus Torvalds bool "TURBOchannel support" 27071da177e4SLinus Torvalds depends on MACH_DECSTATION 27081da177e4SLinus Torvalds help 270950a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 271050a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 271150a23e6eSJustin P. Mattock at: 271250a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 271350a23e6eSJustin P. Mattock and: 271450a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 271550a23e6eSJustin P. Mattock Linux driver support status is documented at: 271650a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 27171da177e4SLinus Torvalds 27181da177e4SLinus Torvaldsconfig MMU 27191da177e4SLinus Torvalds bool 27201da177e4SLinus Torvalds default y 27211da177e4SLinus Torvalds 2722d865bea4SRalf Baechleconfig I8253 2723d865bea4SRalf Baechle bool 2724798778b8SRussell King select CLKSRC_I8253 27252d02612fSThomas Gleixner select CLKEVT_I8253 27269726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2727d865bea4SRalf Baechle 2728e05eb3f8SRalf Baechleconfig ZONE_DMA 2729e05eb3f8SRalf Baechle bool 2730e05eb3f8SRalf Baechle 2731cce335aeSRalf Baechleconfig ZONE_DMA32 2732cce335aeSRalf Baechle bool 2733cce335aeSRalf Baechle 27341da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 27351da177e4SLinus Torvalds 27361da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 27371da177e4SLinus Torvalds 2738388b78adSAlexandre Bounineconfig RAPIDIO 273956abde72SAlexandre Bounine tristate "RapidIO support" 2740388b78adSAlexandre Bounine depends on PCI 2741388b78adSAlexandre Bounine default n 2742388b78adSAlexandre Bounine help 2743388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2744388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2745388b78adSAlexandre Bounine 2746388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2747388b78adSAlexandre Bounine 27481da177e4SLinus Torvaldsendmenu 27491da177e4SLinus Torvalds 27501da177e4SLinus Torvaldsmenu "Executable file formats" 27511da177e4SLinus Torvalds 27521da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 27531da177e4SLinus Torvalds 27541da177e4SLinus Torvaldsconfig TRAD_SIGNALS 27551da177e4SLinus Torvalds bool 27561da177e4SLinus Torvalds 27571da177e4SLinus Torvaldsconfig MIPS32_COMPAT 275878aaf956SRalf Baechle bool 27591da177e4SLinus Torvalds 27601da177e4SLinus Torvaldsconfig COMPAT 27611da177e4SLinus Torvalds bool 27621da177e4SLinus Torvalds 276305e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 276405e43966SAtsushi Nemoto bool 276505e43966SAtsushi Nemoto 27661da177e4SLinus Torvaldsconfig MIPS32_O32 27671da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 276878aaf956SRalf Baechle depends on 64BIT 276978aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 277078aaf956SRalf Baechle select COMPAT 277178aaf956SRalf Baechle select MIPS32_COMPAT 277278aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 27731da177e4SLinus Torvalds help 27741da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 27751da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 27761da177e4SLinus Torvalds existing binaries are in this format. 27771da177e4SLinus Torvalds 27781da177e4SLinus Torvalds If unsure, say Y. 27791da177e4SLinus Torvalds 27801da177e4SLinus Torvaldsconfig MIPS32_N32 27811da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 2782c22eacfeSRalf Baechle depends on 64BIT 278378aaf956SRalf Baechle select COMPAT 278478aaf956SRalf Baechle select MIPS32_COMPAT 278578aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 27861da177e4SLinus Torvalds help 27871da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 27881da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 27891da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 27901da177e4SLinus Torvalds cases. 27911da177e4SLinus Torvalds 27921da177e4SLinus Torvalds If unsure, say N. 27931da177e4SLinus Torvalds 27941da177e4SLinus Torvaldsconfig BINFMT_ELF32 27951da177e4SLinus Torvalds bool 27961da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 27971da177e4SLinus Torvalds 27982116245eSRalf Baechleendmenu 27991da177e4SLinus Torvalds 28002116245eSRalf Baechlemenu "Power management options" 2801952fa954SRodolfo Giometti 2802363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2803363c55caSWu Zhangjin def_bool y 28043f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2805363c55caSWu Zhangjin 2806f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2807f4cb5700SJohannes Berg def_bool y 28083f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2809f4cb5700SJohannes Berg 28102116245eSRalf Baechlesource "kernel/power/Kconfig" 2811952fa954SRodolfo Giometti 28121da177e4SLinus Torvaldsendmenu 28131da177e4SLinus Torvalds 28147a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 28157a998935SViresh Kumar bool 28167a998935SViresh Kumar 28177a998935SViresh Kumarmenu "CPU Power Management" 2818c095ebafSPaul Burton 2819c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 28207a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 28217a998935SViresh Kumarendif 28229726b43aSWu Zhangjin 2823c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 2824c095ebafSPaul Burton 2825c095ebafSPaul Burtonendmenu 2826c095ebafSPaul Burton 2827d5950b43SSam Ravnborgsource "net/Kconfig" 2828d5950b43SSam Ravnborg 28291da177e4SLinus Torvaldssource "drivers/Kconfig" 28301da177e4SLinus Torvalds 283198cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 283298cdee0eSRalf Baechle 28331da177e4SLinus Torvaldssource "fs/Kconfig" 28341da177e4SLinus Torvalds 28351da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 28361da177e4SLinus Torvalds 28371da177e4SLinus Torvaldssource "security/Kconfig" 28381da177e4SLinus Torvalds 28391da177e4SLinus Torvaldssource "crypto/Kconfig" 28401da177e4SLinus Torvalds 28411da177e4SLinus Torvaldssource "lib/Kconfig" 28422235a54dSSanjay Lal 28432235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 2844