1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 21da177e4SLinus Torvaldsconfig MIPS 31da177e4SLinus Torvalds bool 41da177e4SLinus Torvalds default y 5942fa985SYury Norov select ARCH_32BIT_OFF_T if !64BIT 6ea6a3737SPaul Burton select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT 734c01e41SAlexander Lobakin select ARCH_HAS_FORTIFY_SOURCE 834c01e41SAlexander Lobakin select ARCH_HAS_KCOV 934c01e41SAlexander Lobakin select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) 1012597988SMatt Redfearn select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 111e35918aSHassan Naveed select ARCH_HAS_UBSAN_SANITIZE_ALL 1212597988SMatt Redfearn select ARCH_SUPPORTS_UPROBES 131ee3630aSRalf Baechle select ARCH_USE_BUILTIN_BSWAP 1412597988SMatt Redfearn select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 1525da4e9dSPaul Burton select ARCH_USE_QUEUED_RWLOCKS 160b17c967SPaul Burton select ARCH_USE_QUEUED_SPINLOCKS 179035bd29SAlexandre Ghiti select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU 1812597988SMatt Redfearn select ARCH_WANT_IPC_PARSE_VERSION 1910916706SShile Zhang select BUILDTIME_TABLE_SORT 2012597988SMatt Redfearn select CLONE_BACKWARDS 2157eeacedSPaul Burton select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) 2212597988SMatt Redfearn select CPU_PM if CPU_IDLE 2312597988SMatt Redfearn select GENERIC_ATOMIC64 if !64BIT 2412597988SMatt Redfearn select GENERIC_CLOCKEVENTS 2512597988SMatt Redfearn select GENERIC_CMOS_UPDATE 2612597988SMatt Redfearn select GENERIC_CPU_AUTOPROBE 2724640f23SVincenzo Frascino select GENERIC_GETTIMEOFDAY 28b962aeb0SPaul Burton select GENERIC_IOMAP 2912597988SMatt Redfearn select GENERIC_IRQ_PROBE 3012597988SMatt Redfearn select GENERIC_IRQ_SHOW 316630a8e5SChristoph Hellwig select GENERIC_ISA_DMA if EISA 32740129b3SAntony Pavlov select GENERIC_LIB_ASHLDI3 33740129b3SAntony Pavlov select GENERIC_LIB_ASHRDI3 34740129b3SAntony Pavlov select GENERIC_LIB_CMPDI2 35740129b3SAntony Pavlov select GENERIC_LIB_LSHRDI3 36740129b3SAntony Pavlov select GENERIC_LIB_UCMPDI2 3712597988SMatt Redfearn select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 3812597988SMatt Redfearn select GENERIC_SMP_IDLE_THREAD 3912597988SMatt Redfearn select GENERIC_TIME_VSYSCALL 40446f062bSChristoph Hellwig select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT 4112597988SMatt Redfearn select HANDLE_DOMAIN_IRQ 42906d441fSPaul Burton select HAVE_ARCH_COMPILER_H 4312597988SMatt Redfearn select HAVE_ARCH_JUMP_LABEL 4488547001SJason Wessel select HAVE_ARCH_KGDB 45109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_BITS if MMU 46109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 47490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 48c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 4945e03e62SDaniel Silsby select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES 502ff2b7ecSMasahiro Yamada select HAVE_ASM_MODVERSIONS 5136366e36SPaul Burton select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS 5212597988SMatt Redfearn select HAVE_CONTEXT_TRACKING 53490f561bSFrederic Weisbecker select HAVE_TIF_NOHZ 5412597988SMatt Redfearn select HAVE_COPY_THREAD_TLS 5564575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 5612597988SMatt Redfearn select HAVE_DEBUG_KMEMLEAK 5712597988SMatt Redfearn select HAVE_DEBUG_STACKOVERFLOW 5812597988SMatt Redfearn select HAVE_DMA_CONTIGUOUS 5912597988SMatt Redfearn select HAVE_DYNAMIC_FTRACE 6034c01e41SAlexander Lobakin select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2 6112597988SMatt Redfearn select HAVE_EXIT_THREAD 6267a929e0SChristoph Hellwig select HAVE_FAST_GUP 6312597988SMatt Redfearn select HAVE_FTRACE_MCOUNT_RECORD 6429c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 6512597988SMatt Redfearn select HAVE_FUNCTION_TRACER 6634c01e41SAlexander Lobakin select HAVE_GCC_PLUGINS 6734c01e41SAlexander Lobakin select HAVE_GENERIC_VDSO 6812597988SMatt Redfearn select HAVE_IDE 69b3a428b4SHassan Naveed select HAVE_IOREMAP_PROT 7012597988SMatt Redfearn select HAVE_IRQ_EXIT_ON_IRQ_STACK 7112597988SMatt Redfearn select HAVE_IRQ_TIME_ACCOUNTING 72c1bf207dSDavid Daney select HAVE_KPROBES 73c1bf207dSDavid Daney select HAVE_KRETPROBES 74c0436b50SPaul Burton select HAVE_LD_DEAD_CODE_DATA_ELIMINATION 759d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 76786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 7742a0bb3fSPetr Mladek select HAVE_NMI 7812597988SMatt Redfearn select HAVE_OPROFILE 7912597988SMatt Redfearn select HAVE_PERF_EVENTS 8008bccf43SMarcin Nowakowski select HAVE_REGS_AND_STACK_ACCESS_API 819ea141adSPaul Burton select HAVE_RSEQ 8216c0f03fSHassan Naveed select HAVE_SPARSE_SYSCALL_NR 83d148eac0SMasahiro Yamada select HAVE_STACKPROTECTOR 8412597988SMatt Redfearn select HAVE_SYSCALL_TRACEPOINTS 85a3f14310SBen Hutchings select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP 8612597988SMatt Redfearn select IRQ_FORCED_THREADING 876630a8e5SChristoph Hellwig select ISA if EISA 8812597988SMatt Redfearn select MODULES_USE_ELF_REL if MODULES 8934c01e41SAlexander Lobakin select MODULES_USE_ELF_RELA if MODULES && 64BIT 9012597988SMatt Redfearn select PERF_USE_VMALLOC 9105a0a344SArnd Bergmann select RTC_LIB 9212597988SMatt Redfearn select SYSCTL_EXCEPTION_TRACE 9312597988SMatt Redfearn select VIRT_TO_BUS 941da177e4SLinus Torvalds 951da177e4SLinus Torvaldsmenu "Machine selection" 961da177e4SLinus Torvalds 975e83d430SRalf Baechlechoice 985e83d430SRalf Baechle prompt "System type" 99d41e6858SMatt Redfearn default MIPS_GENERIC 1001da177e4SLinus Torvalds 101eed0eabdSPaul Burtonconfig MIPS_GENERIC 102eed0eabdSPaul Burton bool "Generic board-agnostic MIPS kernel" 103eed0eabdSPaul Burton select BOOT_RAW 104eed0eabdSPaul Burton select BUILTIN_DTB 105eed0eabdSPaul Burton select CEVT_R4K 106eed0eabdSPaul Burton select CLKSRC_MIPS_GIC 107eed0eabdSPaul Burton select COMMON_CLK 108eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_EI 10934c01e41SAlexander Lobakin select CPU_MIPSR2_IRQ_VI 110eed0eabdSPaul Burton select CSRC_R4K 111eed0eabdSPaul Burton select DMA_PERDEV_COHERENT 112eb01d42aSChristoph Hellwig select HAVE_PCI 113eed0eabdSPaul Burton select IRQ_MIPS_CPU 1140211d49eSPaul Burton select MIPS_AUTO_PFN_OFFSET 115eed0eabdSPaul Burton select MIPS_CPU_SCACHE 116eed0eabdSPaul Burton select MIPS_GIC 117eed0eabdSPaul Burton select MIPS_L1_CACHE_SHIFT_7 118eed0eabdSPaul Burton select NO_EXCEPT_FILL 119eed0eabdSPaul Burton select PCI_DRIVERS_GENERIC 120eed0eabdSPaul Burton select SMP_UP if SMP 121a3078e59SMatt Redfearn select SWAP_IO_SPACE 122eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R1 123eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R2 124eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R6 125eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R1 126eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R2 127eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R6 128eed0eabdSPaul Burton select SYS_SUPPORTS_32BIT_KERNEL 129eed0eabdSPaul Burton select SYS_SUPPORTS_64BIT_KERNEL 130eed0eabdSPaul Burton select SYS_SUPPORTS_BIG_ENDIAN 131eed0eabdSPaul Burton select SYS_SUPPORTS_HIGHMEM 132eed0eabdSPaul Burton select SYS_SUPPORTS_LITTLE_ENDIAN 133eed0eabdSPaul Burton select SYS_SUPPORTS_MICROMIPS 134eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS16 13534c01e41SAlexander Lobakin select SYS_SUPPORTS_MIPS_CPS 136eed0eabdSPaul Burton select SYS_SUPPORTS_MULTITHREADING 137eed0eabdSPaul Burton select SYS_SUPPORTS_RELOCATABLE 138eed0eabdSPaul Burton select SYS_SUPPORTS_SMARTMIPS 13934c01e41SAlexander Lobakin select UHI_BOOT 1402e6522c5SCorentin Labbe select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1412e6522c5SCorentin Labbe select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1422e6522c5SCorentin Labbe select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1432e6522c5SCorentin Labbe select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1442e6522c5SCorentin Labbe select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1452e6522c5SCorentin Labbe select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 146eed0eabdSPaul Burton select USE_OF 147eed0eabdSPaul Burton help 148eed0eabdSPaul Burton Select this to build a kernel which aims to support multiple boards, 149eed0eabdSPaul Burton generally using a flattened device tree passed from the bootloader 150eed0eabdSPaul Burton using the boot protocol defined in the UHI (Unified Hosting 151eed0eabdSPaul Burton Interface) specification. 152eed0eabdSPaul Burton 15342a4f17dSManuel Laussconfig MIPS_ALCHEMY 154c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 155d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 156f772cdb2SRalf Baechle select CEVT_R4K 157d7ea335cSSteven J. Hill select CSRC_R4K 15867e38cf2SRalf Baechle select IRQ_MIPS_CPU 15988e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 16042a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 16142a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 16242a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 163d30a2b47SLinus Walleij select GPIOLIB 1641b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 16547440229SManuel Lauss select COMMON_CLK 1661da177e4SLinus Torvalds 1677ca5dc14SFlorian Fainelliconfig AR7 1687ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 1697ca5dc14SFlorian Fainelli select BOOT_ELF32 1707ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 1717ca5dc14SFlorian Fainelli select CEVT_R4K 1727ca5dc14SFlorian Fainelli select CSRC_R4K 17367e38cf2SRalf Baechle select IRQ_MIPS_CPU 1747ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 1757ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 1767ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 1777ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 1787ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 1797ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 180377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1811b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 182d30a2b47SLinus Walleij select GPIOLIB 1837ca5dc14SFlorian Fainelli select VLYNQ 1848551fb64SYoichi Yuasa select HAVE_CLK 1857ca5dc14SFlorian Fainelli help 1867ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1877ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1887ca5dc14SFlorian Fainelli 18943cc739fSSergey Ryazanovconfig ATH25 19043cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 19143cc739fSSergey Ryazanov select CEVT_R4K 19243cc739fSSergey Ryazanov select CSRC_R4K 19343cc739fSSergey Ryazanov select DMA_NONCOHERENT 19467e38cf2SRalf Baechle select IRQ_MIPS_CPU 1951753e74eSSergey Ryazanov select IRQ_DOMAIN 19643cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 19743cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 19843cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1998aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 20043cc739fSSergey Ryazanov help 20143cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 20243cc739fSSergey Ryazanov 203d4a67d9dSGabor Juhosconfig ATH79 204d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 205ff591a91SAlban Bedel select ARCH_HAS_RESET_CONTROLLER 206d4a67d9dSGabor Juhos select BOOT_RAW 207d4a67d9dSGabor Juhos select CEVT_R4K 208d4a67d9dSGabor Juhos select CSRC_R4K 209d4a67d9dSGabor Juhos select DMA_NONCOHERENT 210d30a2b47SLinus Walleij select GPIOLIB 211a08227a2SJohn Crispin select PINCTRL 21294638067SGabor Juhos select HAVE_CLK 213411520afSAlban Bedel select COMMON_CLK 2142c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 21567e38cf2SRalf Baechle select IRQ_MIPS_CPU 216d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 217d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 218d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 219d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 220377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 221b3f0a250SAlban Bedel select SYS_SUPPORTS_ZBOOT_UART_PROM 22203c8c407SAlban Bedel select USE_OF 22353d473fcSAlban Bedel select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM 224d4a67d9dSGabor Juhos help 225d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 226d4a67d9dSGabor Juhos 2275f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 2285f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 229d59098a0SChristoph Hellwig select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL 230d59098a0SChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 231d666cd02SKevin Cernekee select BOOT_RAW 232d666cd02SKevin Cernekee select NO_EXCEPT_FILL 233d666cd02SKevin Cernekee select USE_OF 234d666cd02SKevin Cernekee select CEVT_R4K 235d666cd02SKevin Cernekee select CSRC_R4K 236d666cd02SKevin Cernekee select SYNC_R4K 237d666cd02SKevin Cernekee select COMMON_CLK 238c7c42ec2SSimon Arlott select BCM6345_L1_IRQ 23960b858f2SKevin Cernekee select BCM7038_L1_IRQ 24060b858f2SKevin Cernekee select BCM7120_L2_IRQ 24160b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 24267e38cf2SRalf Baechle select IRQ_MIPS_CPU 24360b858f2SKevin Cernekee select DMA_NONCOHERENT 244d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 24560b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 246d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 247d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 24860b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 24960b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 25060b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 251d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 252d666cd02SKevin Cernekee select SWAP_IO_SPACE 25360b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 25460b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 25560b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 25660b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 2574dc4704cSJustin Chen select HARDIRQS_SW_RESEND 258d666cd02SKevin Cernekee help 2595f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 2605f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 2615f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 2625f2d4459SKevin Cernekee must be set appropriately for your board. 263d666cd02SKevin Cernekee 2641c0c13ebSAurelien Jarnoconfig BCM47XX 265c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 266fe08f8c2SHauke Mehrtens select BOOT_RAW 26742f77542SRalf Baechle select CEVT_R4K 268940f6b48SRalf Baechle select CSRC_R4K 2691c0c13ebSAurelien Jarno select DMA_NONCOHERENT 270eb01d42aSChristoph Hellwig select HAVE_PCI 27167e38cf2SRalf Baechle select IRQ_MIPS_CPU 272314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 273dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 2741c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 2751c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 276377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 2776507831fSAaro Koskinen select SYS_SUPPORTS_ZBOOT 27825e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 279e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 280c949c0bcSRafał Miłecki select GPIOLIB 281c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 282f6e734a8SRafał Miłecki select BCM47XX_NVRAM 2832ab71a02SRafał Miłecki select BCM47XX_SPROM 284dfe00495SMatt Redfearn select BCM47XX_SSB if !BCM47XX_BCMA 2851c0c13ebSAurelien Jarno help 2861c0c13ebSAurelien Jarno Support for BCM47XX based boards 2871c0c13ebSAurelien Jarno 288e7300d04SMaxime Bizonconfig BCM63XX 289e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 290ae8de61cSFlorian Fainelli select BOOT_RAW 291e7300d04SMaxime Bizon select CEVT_R4K 292e7300d04SMaxime Bizon select CSRC_R4K 293fc264022SJonas Gorski select SYNC_R4K 294e7300d04SMaxime Bizon select DMA_NONCOHERENT 29567e38cf2SRalf Baechle select IRQ_MIPS_CPU 296e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 297e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 298e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 299e7300d04SMaxime Bizon select SWAP_IO_SPACE 300d30a2b47SLinus Walleij select GPIOLIB 3013e82eeebSYoichi Yuasa select HAVE_CLK 302af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 303c5af3c2dSJonas Gorski select CLKDEV_LOOKUP 304e7300d04SMaxime Bizon help 305e7300d04SMaxime Bizon Support for BCM63XX based boards 306e7300d04SMaxime Bizon 3071da177e4SLinus Torvaldsconfig MIPS_COBALT 3083fa986faSMartin Michlmayr bool "Cobalt Server" 30942f77542SRalf Baechle select CEVT_R4K 310940f6b48SRalf Baechle select CSRC_R4K 3111097c6acSYoichi Yuasa select CEVT_GT641XX 3121da177e4SLinus Torvalds select DMA_NONCOHERENT 313eb01d42aSChristoph Hellwig select FORCE_PCI 314d865bea4SRalf Baechle select I8253 3151da177e4SLinus Torvalds select I8259 31667e38cf2SRalf Baechle select IRQ_MIPS_CPU 317d5ab1a69SYoichi Yuasa select IRQ_GT641XX 318252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 3197cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3200a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 321ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3220e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 3235e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 324e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 3251da177e4SLinus Torvalds 3261da177e4SLinus Torvaldsconfig MACH_DECSTATION 3273fa986faSMartin Michlmayr bool "DECstations" 3281da177e4SLinus Torvalds select BOOT_ELF32 3296457d9fcSYoichi Yuasa select CEVT_DS1287 33081d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 3314247417dSYoichi Yuasa select CSRC_IOASIC 33281d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 33320d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 33420d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 33520d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 3361da177e4SLinus Torvalds select DMA_NONCOHERENT 337ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 33867e38cf2SRalf Baechle select IRQ_MIPS_CPU 3397cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 3407cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 341ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3427d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3435e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3441723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 3451723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 3461723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 347930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 3485e83d430SRalf Baechle help 3491da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 3501da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 3511da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 3521da177e4SLinus Torvalds 3531da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 3541da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 3551da177e4SLinus Torvalds 3561da177e4SLinus Torvalds DECstation 5000/50 3571da177e4SLinus Torvalds DECstation 5000/150 3581da177e4SLinus Torvalds DECstation 5000/260 3591da177e4SLinus Torvalds DECsystem 5900/260 3601da177e4SLinus Torvalds 3611da177e4SLinus Torvalds otherwise choose R3000. 3621da177e4SLinus Torvalds 3635e83d430SRalf Baechleconfig MACH_JAZZ 3643fa986faSMartin Michlmayr bool "Jazz family of machines" 36539b2d756SThomas Bogendoerfer select ARC_MEMORY 36639b2d756SThomas Bogendoerfer select ARC_PROMLIB 367a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 3687a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 3690e2794b0SRalf Baechle select FW_ARC 3700e2794b0SRalf Baechle select FW_ARC32 3715e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 37242f77542SRalf Baechle select CEVT_R4K 373940f6b48SRalf Baechle select CSRC_R4K 374e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 3755e83d430SRalf Baechle select GENERIC_ISA_DMA 3768a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 37767e38cf2SRalf Baechle select IRQ_MIPS_CPU 378d865bea4SRalf Baechle select I8253 3795e83d430SRalf Baechle select I8259 3805e83d430SRalf Baechle select ISA 3817cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 3825e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 3837d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3841723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 3851da177e4SLinus Torvalds help 3865e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 3875e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 388692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 3895e83d430SRalf Baechle Olivetti M700-10 workstations. 3905e83d430SRalf Baechle 391de361e8bSPaul Burtonconfig MACH_INGENIC 392de361e8bSPaul Burton bool "Ingenic SoC based machines" 3935ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 3945ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 395f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 396b35d2653SDaniel Silsby select CPU_SUPPORTS_HUGEPAGES 3975ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 39867e38cf2SRalf Baechle select IRQ_MIPS_CPU 39937b4c3caSPaul Cercueil select PINCTRL 400d30a2b47SLinus Walleij select GPIOLIB 401ff1930c6SPaul Burton select COMMON_CLK 40283bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 40315205fc0SPaul Cercueil select BUILTIN_DTB if MIPS_NO_APPENDED_DTB 404ffb1843dSPaul Burton select USE_OF 4055ebabe59SLars-Peter Clausen 406171bb2f1SJohn Crispinconfig LANTIQ 407171bb2f1SJohn Crispin bool "Lantiq based platforms" 408171bb2f1SJohn Crispin select DMA_NONCOHERENT 40967e38cf2SRalf Baechle select IRQ_MIPS_CPU 410171bb2f1SJohn Crispin select CEVT_R4K 411171bb2f1SJohn Crispin select CSRC_R4K 412171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 413171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 414171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 415171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 416377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 417171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 418f35764e7SJames Hogan select SYS_SUPPORTS_VPE_LOADER 419171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 420d30a2b47SLinus Walleij select GPIOLIB 421171bb2f1SJohn Crispin select SWAP_IO_SPACE 422171bb2f1SJohn Crispin select BOOT_RAW 423287e3f3fSJohn Crispin select CLKDEV_LOOKUP 424a0392222SJohn Crispin select USE_OF 4253f8c50c9SJohn Crispin select PINCTRL 4263f8c50c9SJohn Crispin select PINCTRL_LANTIQ 427c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 428c530781cSJohn Crispin select RESET_CONTROLLER 429171bb2f1SJohn Crispin 4301f21d2bdSBrian Murphyconfig LASAT 4311f21d2bdSBrian Murphy bool "LASAT Networks platforms" 43242f77542SRalf Baechle select CEVT_R4K 43316f0bbbcSRalf Baechle select CRC32 434940f6b48SRalf Baechle select CSRC_R4K 4351f21d2bdSBrian Murphy select DMA_NONCOHERENT 4361f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 437eb01d42aSChristoph Hellwig select HAVE_PCI 43867e38cf2SRalf Baechle select IRQ_MIPS_CPU 4391f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 4401f21d2bdSBrian Murphy select MIPS_NILE4 4411f21d2bdSBrian Murphy select R5000_CPU_SCACHE 4421f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 4431f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 4441f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 4451f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 4461f21d2bdSBrian Murphy 44730ad29bbSHuacai Chenconfig MACH_LOONGSON32 448caed1d1bSHuacai Chen bool "Loongson 32-bit family of machines" 449c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 450ade299d8SYoichi Yuasa help 45130ad29bbSHuacai Chen This enables support for the Loongson-1 family of machines. 45285749d24SWu Zhangjin 45330ad29bbSHuacai Chen Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 45430ad29bbSHuacai Chen the Institute of Computing Technology (ICT), Chinese Academy of 45530ad29bbSHuacai Chen Sciences (CAS). 456ade299d8SYoichi Yuasa 45771e2f4ddSJiaxun Yangconfig MACH_LOONGSON2EF 45871e2f4ddSJiaxun Yang bool "Loongson-2E/F family of machines" 459ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 460ca585cf9SKelvin Cheung help 46171e2f4ddSJiaxun Yang This enables the support of early Loongson-2E/F family of machines. 462ca585cf9SKelvin Cheung 46371e2f4ddSJiaxun Yangconfig MACH_LOONGSON64 464caed1d1bSHuacai Chen bool "Loongson 64-bit family of machines" 4656fbde6b4SJiaxun Yang select ARCH_SPARSEMEM_ENABLE 4666fbde6b4SJiaxun Yang select ARCH_MIGHT_HAVE_PC_PARPORT 4676fbde6b4SJiaxun Yang select ARCH_MIGHT_HAVE_PC_SERIO 4686fbde6b4SJiaxun Yang select GENERIC_ISA_DMA_SUPPORT_BROKEN 4696fbde6b4SJiaxun Yang select BOOT_ELF32 4706fbde6b4SJiaxun Yang select BOARD_SCACHE 4716fbde6b4SJiaxun Yang select CSRC_R4K 4726fbde6b4SJiaxun Yang select CEVT_R4K 4736fbde6b4SJiaxun Yang select CPU_HAS_WB 4746fbde6b4SJiaxun Yang select FORCE_PCI 4756fbde6b4SJiaxun Yang select ISA 4766fbde6b4SJiaxun Yang select I8259 4776fbde6b4SJiaxun Yang select IRQ_MIPS_CPU 478*5125bfeeSTiezhu Yang select NR_CPUS_DEFAULT_64 4796fbde6b4SJiaxun Yang select USE_GENERIC_EARLY_PRINTK_8250 4806fbde6b4SJiaxun Yang select SYS_HAS_CPU_LOONGSON64 4816fbde6b4SJiaxun Yang select SYS_HAS_EARLY_PRINTK 4826fbde6b4SJiaxun Yang select SYS_SUPPORTS_SMP 4836fbde6b4SJiaxun Yang select SYS_SUPPORTS_HOTPLUG_CPU 4846fbde6b4SJiaxun Yang select SYS_SUPPORTS_NUMA 4856fbde6b4SJiaxun Yang select SYS_SUPPORTS_64BIT_KERNEL 4866fbde6b4SJiaxun Yang select SYS_SUPPORTS_HIGHMEM 4876fbde6b4SJiaxun Yang select SYS_SUPPORTS_LITTLE_ENDIAN 48871e2f4ddSJiaxun Yang select SYS_SUPPORTS_ZBOOT 4896fbde6b4SJiaxun Yang select ZONE_DMA32 4906fbde6b4SJiaxun Yang select NUMA 49187fcfa7bSJiaxun Yang select COMMON_CLK 49287fcfa7bSJiaxun Yang select USE_OF 49387fcfa7bSJiaxun Yang select BUILTIN_DTB 49471e2f4ddSJiaxun Yang help 495caed1d1bSHuacai Chen This enables the support of Loongson-2/3 family of machines. 496caed1d1bSHuacai Chen 497caed1d1bSHuacai Chen Loongson-2 and Loongson-3 are 64-bit general-purpose processors with 498caed1d1bSHuacai Chen GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E 499caed1d1bSHuacai Chen and Loongson-2F which will be removed), developed by the Institute 500caed1d1bSHuacai Chen of Computing Technology (ICT), Chinese Academy of Sciences (CAS). 501ca585cf9SKelvin Cheung 5026a438309SAndrew Brestickerconfig MACH_PISTACHIO 5036a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 5046a438309SAndrew Bresticker select BOOT_ELF32 5056a438309SAndrew Bresticker select BOOT_RAW 5066a438309SAndrew Bresticker select CEVT_R4K 5076a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 5086a438309SAndrew Bresticker select COMMON_CLK 5096a438309SAndrew Bresticker select CSRC_R4K 510645c7827SZubair Lutfullah Kakakhel select DMA_NONCOHERENT 511d30a2b47SLinus Walleij select GPIOLIB 51267e38cf2SRalf Baechle select IRQ_MIPS_CPU 5136a438309SAndrew Bresticker select MFD_SYSCON 5146a438309SAndrew Bresticker select MIPS_CPU_SCACHE 5156a438309SAndrew Bresticker select MIPS_GIC 5166a438309SAndrew Bresticker select PINCTRL 5176a438309SAndrew Bresticker select REGULATOR 5186a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 5196a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 5206a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 5216a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 5226a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 52341cc07beSMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 5246a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 525018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 526018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 5276a438309SAndrew Bresticker select USE_OF 5286a438309SAndrew Bresticker help 5296a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 5306a438309SAndrew Bresticker 5311da177e4SLinus Torvaldsconfig MIPS_MALTA 5323fa986faSMartin Michlmayr bool "MIPS Malta board" 53361ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 534a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 5357a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 5361da177e4SLinus Torvalds select BOOT_ELF32 537fa71c960SRalf Baechle select BOOT_RAW 538e8823d26SPaul Burton select BUILTIN_DTB 53942f77542SRalf Baechle select CEVT_R4K 540fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 54142b002abSGuenter Roeck select COMMON_CLK 54247bf2b03SMaksym Kokhan select CSRC_R4K 543885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 5441da177e4SLinus Torvalds select GENERIC_ISA_DMA 5458a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 546eb01d42aSChristoph Hellwig select HAVE_PCI 547d865bea4SRalf Baechle select I8253 5481da177e4SLinus Torvalds select I8259 54947bf2b03SMaksym Kokhan select IRQ_MIPS_CPU 5505e83d430SRalf Baechle select MIPS_BONITO64 5519318c51aSChris Dearman select MIPS_CPU_SCACHE 55247bf2b03SMaksym Kokhan select MIPS_GIC 553a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 5545e83d430SRalf Baechle select MIPS_MSC 55547bf2b03SMaksym Kokhan select PCI_GT64XXX_PCI0 556ecafe3e9SPaul Burton select SMP_UP if SMP 5571da177e4SLinus Torvalds select SWAP_IO_SPACE 5587cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 5597cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 560bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 561c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 562575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 5637cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 5645d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 565575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 5667cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 5677cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 568ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 569ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5705e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 571c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 5725e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 573424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 57447bf2b03SMaksym Kokhan select SYS_SUPPORTS_MIPS16 5750365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 576e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 577f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 57847bf2b03SMaksym Kokhan select SYS_SUPPORTS_RELOCATABLE 5799693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 580f35764e7SJames Hogan select SYS_SUPPORTS_VPE_LOADER 5811b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 582e8823d26SPaul Burton select USE_OF 583abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 5841da177e4SLinus Torvalds help 585f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 5861da177e4SLinus Torvalds board. 5871da177e4SLinus Torvalds 5882572f00dSJoshua Hendersonconfig MACH_PIC32 5892572f00dSJoshua Henderson bool "Microchip PIC32 Family" 5902572f00dSJoshua Henderson help 5912572f00dSJoshua Henderson This enables support for the Microchip PIC32 family of platforms. 5922572f00dSJoshua Henderson 5932572f00dSJoshua Henderson Microchip PIC32 is a family of general-purpose 32 bit MIPS core 5942572f00dSJoshua Henderson microcontrollers. 5952572f00dSJoshua Henderson 596a83860c2SRalf Baechleconfig NEC_MARKEINS 597a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 598a83860c2SRalf Baechle select SOC_EMMA2RH 599eb01d42aSChristoph Hellwig select HAVE_PCI 600a83860c2SRalf Baechle help 601a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 602ade299d8SYoichi Yuasa 6035e83d430SRalf Baechleconfig MACH_VR41XX 60474142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 60542f77542SRalf Baechle select CEVT_R4K 606940f6b48SRalf Baechle select CSRC_R4K 6077cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 608377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 609d30a2b47SLinus Walleij select GPIOLIB 6105e83d430SRalf Baechle 611edb6310aSDaniel Lairdconfig NXP_STB220 612edb6310aSDaniel Laird bool "NXP STB220 board" 613edb6310aSDaniel Laird select SOC_PNX833X 614edb6310aSDaniel Laird help 615edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 616edb6310aSDaniel Laird 617edb6310aSDaniel Lairdconfig NXP_STB225 618edb6310aSDaniel Laird bool "NXP 225 board" 619edb6310aSDaniel Laird select SOC_PNX833X 620edb6310aSDaniel Laird select SOC_PNX8335 621edb6310aSDaniel Laird help 622edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 623edb6310aSDaniel Laird 6249267a30dSMarc St-Jeanconfig PMC_MSP 6259267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 62639d30c13SAnoop P A select CEVT_R4K 62739d30c13SAnoop P A select CSRC_R4K 6289267a30dSMarc St-Jean select DMA_NONCOHERENT 6299267a30dSMarc St-Jean select SWAP_IO_SPACE 6309267a30dSMarc St-Jean select NO_EXCEPT_FILL 6319267a30dSMarc St-Jean select BOOT_RAW 6329267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 6339267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 6349267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 6359267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 636377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 63767e38cf2SRalf Baechle select IRQ_MIPS_CPU 6389267a30dSMarc St-Jean select SERIAL_8250 6399267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 6409296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 6419296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 6429267a30dSMarc St-Jean help 6439267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 6449267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 6459267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 6469267a30dSMarc St-Jean a variety of MIPS cores. 6479267a30dSMarc St-Jean 648ae2b5bb6SJohn Crispinconfig RALINK 649ae2b5bb6SJohn Crispin bool "Ralink based machines" 650ae2b5bb6SJohn Crispin select CEVT_R4K 651ae2b5bb6SJohn Crispin select CSRC_R4K 652ae2b5bb6SJohn Crispin select BOOT_RAW 653ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 65467e38cf2SRalf Baechle select IRQ_MIPS_CPU 655ae2b5bb6SJohn Crispin select USE_OF 656ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 657ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 658ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 659ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 660377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 661ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 662ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 6632a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 6642a153f1cSJohn Crispin select RESET_CONTROLLER 665ae2b5bb6SJohn Crispin 6661da177e4SLinus Torvaldsconfig SGI_IP22 6673fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 668c0de00b2SThomas Bogendoerfer select ARC_MEMORY 66939b2d756SThomas Bogendoerfer select ARC_PROMLIB 6700e2794b0SRalf Baechle select FW_ARC 6710e2794b0SRalf Baechle select FW_ARC32 6727a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 6731da177e4SLinus Torvalds select BOOT_ELF32 67442f77542SRalf Baechle select CEVT_R4K 675940f6b48SRalf Baechle select CSRC_R4K 676e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 6771da177e4SLinus Torvalds select DMA_NONCOHERENT 6786630a8e5SChristoph Hellwig select HAVE_EISA 679d865bea4SRalf Baechle select I8253 68068de4803SThomas Bogendoerfer select I8259 6811da177e4SLinus Torvalds select IP22_CPU_SCACHE 68267e38cf2SRalf Baechle select IRQ_MIPS_CPU 683aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 684e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 685e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 68636e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 687e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 688e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 689e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 6901da177e4SLinus Torvalds select SWAP_IO_SPACE 6917cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6927cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 693c0de00b2SThomas Bogendoerfer select SYS_HAS_EARLY_PRINTK 694ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 695ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6965e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 697930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6981da177e4SLinus Torvalds help 6991da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 7001da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 7011da177e4SLinus Torvalds that runs on these, say Y here. 7021da177e4SLinus Torvalds 7031da177e4SLinus Torvaldsconfig SGI_IP27 7043fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 70554aed4ddSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 706397dc00eSMike Rapoport select ARCH_SPARSEMEM_ENABLE 7070e2794b0SRalf Baechle select FW_ARC 7080e2794b0SRalf Baechle select FW_ARC64 709e9422427SThomas Bogendoerfer select ARC_CMDLINE_ONLY 7105e83d430SRalf Baechle select BOOT_ELF64 711e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 71236a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 713eb01d42aSChristoph Hellwig select HAVE_PCI 71469a07a41SThomas Bogendoerfer select IRQ_MIPS_CPU 715e6308b6dSThomas Bogendoerfer select IRQ_DOMAIN_HIERARCHY 716130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 717a57140e9SThomas Bogendoerfer select PCI_DRIVERS_GENERIC 718a57140e9SThomas Bogendoerfer select PCI_XTALK_BRIDGE 7197cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 720ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 7215e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 722d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 7231a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 724930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 7251da177e4SLinus Torvalds help 7261da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 7271da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 7281da177e4SLinus Torvalds here. 7291da177e4SLinus Torvalds 730e2defae5SThomas Bogendoerferconfig SGI_IP28 7317d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 732c0de00b2SThomas Bogendoerfer select ARC_MEMORY 73339b2d756SThomas Bogendoerfer select ARC_PROMLIB 7340e2794b0SRalf Baechle select FW_ARC 7350e2794b0SRalf Baechle select FW_ARC64 7367a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 737e2defae5SThomas Bogendoerfer select BOOT_ELF64 738e2defae5SThomas Bogendoerfer select CEVT_R4K 739e2defae5SThomas Bogendoerfer select CSRC_R4K 740e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 741e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 742e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 74367e38cf2SRalf Baechle select IRQ_MIPS_CPU 7446630a8e5SChristoph Hellwig select HAVE_EISA 745e2defae5SThomas Bogendoerfer select I8253 746e2defae5SThomas Bogendoerfer select I8259 747e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 748e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 7495b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 750e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 751e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 752e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 753e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 754e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 755c0de00b2SThomas Bogendoerfer select SYS_HAS_EARLY_PRINTK 756e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 757e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 758dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 759e2defae5SThomas Bogendoerfer help 760e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 761e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 762e2defae5SThomas Bogendoerfer 7637505576dSThomas Bogendoerferconfig SGI_IP30 7647505576dSThomas Bogendoerfer bool "SGI IP30 (Octane/Octane2)" 7657505576dSThomas Bogendoerfer select ARCH_HAS_PHYS_TO_DMA 7667505576dSThomas Bogendoerfer select FW_ARC 7677505576dSThomas Bogendoerfer select FW_ARC64 7687505576dSThomas Bogendoerfer select BOOT_ELF64 7697505576dSThomas Bogendoerfer select CEVT_R4K 7707505576dSThomas Bogendoerfer select CSRC_R4K 7717505576dSThomas Bogendoerfer select SYNC_R4K if SMP 7727505576dSThomas Bogendoerfer select ZONE_DMA32 7737505576dSThomas Bogendoerfer select HAVE_PCI 7747505576dSThomas Bogendoerfer select IRQ_MIPS_CPU 7757505576dSThomas Bogendoerfer select IRQ_DOMAIN_HIERARCHY 7767505576dSThomas Bogendoerfer select NR_CPUS_DEFAULT_2 7777505576dSThomas Bogendoerfer select PCI_DRIVERS_GENERIC 7787505576dSThomas Bogendoerfer select PCI_XTALK_BRIDGE 7797505576dSThomas Bogendoerfer select SYS_HAS_EARLY_PRINTK 7807505576dSThomas Bogendoerfer select SYS_HAS_CPU_R10000 7817505576dSThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 7827505576dSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 7837505576dSThomas Bogendoerfer select SYS_SUPPORTS_SMP 7847505576dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 7857505576dSThomas Bogendoerfer select ARC_MEMORY 7867505576dSThomas Bogendoerfer help 7877505576dSThomas Bogendoerfer These are the SGI Octane and Octane2 graphics workstations. To 7887505576dSThomas Bogendoerfer compile a Linux kernel that runs on these, say Y here. 7897505576dSThomas Bogendoerfer 7901da177e4SLinus Torvaldsconfig SGI_IP32 791cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 79239b2d756SThomas Bogendoerfer select ARC_MEMORY 79339b2d756SThomas Bogendoerfer select ARC_PROMLIB 79403df8229SChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 7950e2794b0SRalf Baechle select FW_ARC 7960e2794b0SRalf Baechle select FW_ARC32 7971da177e4SLinus Torvalds select BOOT_ELF32 79842f77542SRalf Baechle select CEVT_R4K 799940f6b48SRalf Baechle select CSRC_R4K 8001da177e4SLinus Torvalds select DMA_NONCOHERENT 801eb01d42aSChristoph Hellwig select HAVE_PCI 80267e38cf2SRalf Baechle select IRQ_MIPS_CPU 8031da177e4SLinus Torvalds select R5000_CPU_SCACHE 8041da177e4SLinus Torvalds select RM7000_CPU_SCACHE 8057cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 8067cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 8077cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 808dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 809ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 8105e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 8111da177e4SLinus Torvalds help 8121da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 8131da177e4SLinus Torvalds 814ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 815ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 8165e83d430SRalf Baechle select BOOT_ELF32 8175e83d430SRalf Baechle select SIBYTE_BCM1120 8185e83d430SRalf Baechle select SWAP_IO_SPACE 8197cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 8205e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 8215e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8225e83d430SRalf Baechle 823ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 824ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 8255e83d430SRalf Baechle select BOOT_ELF32 8265e83d430SRalf Baechle select SIBYTE_BCM1120 8275e83d430SRalf Baechle select SWAP_IO_SPACE 8287cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 8295e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 8305e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8315e83d430SRalf Baechle 8325e83d430SRalf Baechleconfig SIBYTE_CRHONE 8333fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 8345e83d430SRalf Baechle select BOOT_ELF32 8355e83d430SRalf Baechle select SIBYTE_BCM1125 8365e83d430SRalf Baechle select SWAP_IO_SPACE 8377cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 8385e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 8395e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 8405e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8415e83d430SRalf Baechle 842ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 843ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 844ade299d8SYoichi Yuasa select BOOT_ELF32 845ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 846ade299d8SYoichi Yuasa select SWAP_IO_SPACE 847ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 848ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 849ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 850ade299d8SYoichi Yuasa 851ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 852ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 853ade299d8SYoichi Yuasa select BOOT_ELF32 854fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 855ade299d8SYoichi Yuasa select SIBYTE_SB1250 856ade299d8SYoichi Yuasa select SWAP_IO_SPACE 857ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 858ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 859ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 860ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 861cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 862e4849affSMaciej W. Rozycki select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI 863ade299d8SYoichi Yuasa 864ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 865ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 866ade299d8SYoichi Yuasa select BOOT_ELF32 867fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 868ade299d8SYoichi Yuasa select SIBYTE_SB1250 869ade299d8SYoichi Yuasa select SWAP_IO_SPACE 870ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 871ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 872ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 873ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 874756d6d83SMaciej W. Rozycki select ZONE_DMA32 if 64BIT 875ade299d8SYoichi Yuasa 876ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 877ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 878ade299d8SYoichi Yuasa select BOOT_ELF32 879ade299d8SYoichi Yuasa select SIBYTE_SB1250 880ade299d8SYoichi Yuasa select SWAP_IO_SPACE 881ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 882ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 883ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 884e4849affSMaciej W. Rozycki select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI 885ade299d8SYoichi Yuasa 886ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 887ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 888ade299d8SYoichi Yuasa select BOOT_ELF32 889ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 890ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 891ade299d8SYoichi Yuasa select SWAP_IO_SPACE 892ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 893ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 894651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 895ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 896cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 897e4849affSMaciej W. Rozycki select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI 898ade299d8SYoichi Yuasa 89914b36af4SThomas Bogendoerferconfig SNI_RM 90014b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 90139b2d756SThomas Bogendoerfer select ARC_MEMORY 90239b2d756SThomas Bogendoerfer select ARC_PROMLIB 9030e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 9040e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 905aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 9065e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 907a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 9087a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 9095e83d430SRalf Baechle select BOOT_ELF32 91042f77542SRalf Baechle select CEVT_R4K 911940f6b48SRalf Baechle select CSRC_R4K 912e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 9135e83d430SRalf Baechle select DMA_NONCOHERENT 9145e83d430SRalf Baechle select GENERIC_ISA_DMA 9156630a8e5SChristoph Hellwig select HAVE_EISA 9168a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 917eb01d42aSChristoph Hellwig select HAVE_PCI 91867e38cf2SRalf Baechle select IRQ_MIPS_CPU 919d865bea4SRalf Baechle select I8253 9205e83d430SRalf Baechle select I8259 9215e83d430SRalf Baechle select ISA 9224a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 9237cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 9244a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 925c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 9264a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 92736a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 928ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 9297d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 9304a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 9315e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 9325e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 9331da177e4SLinus Torvalds help 93414b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 93514b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 9365e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 9375e83d430SRalf Baechle support this machine type. 9381da177e4SLinus Torvalds 939edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 940edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 9415e83d430SRalf Baechle 942edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 943edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 94423fbee9dSRalf Baechle 94573b4390fSRalf Baechleconfig MIKROTIK_RB532 94673b4390fSRalf Baechle bool "Mikrotik RB532 boards" 94773b4390fSRalf Baechle select CEVT_R4K 94873b4390fSRalf Baechle select CSRC_R4K 94973b4390fSRalf Baechle select DMA_NONCOHERENT 950eb01d42aSChristoph Hellwig select HAVE_PCI 95167e38cf2SRalf Baechle select IRQ_MIPS_CPU 95273b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 95373b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 95473b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 95573b4390fSRalf Baechle select SWAP_IO_SPACE 95673b4390fSRalf Baechle select BOOT_RAW 957d30a2b47SLinus Walleij select GPIOLIB 958930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 95973b4390fSRalf Baechle help 96073b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 96173b4390fSRalf Baechle based on the IDT RC32434 SoC. 96273b4390fSRalf Baechle 9639ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 9649ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 965a86c7f72SDavid Daney select CEVT_R4K 966ea8c64acSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 9671753d50cSChristoph Hellwig select HAVE_RAPIDIO 968d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 969a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 970a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 971f65aad41SRalf Baechle select EDAC_SUPPORT 972b01aec9bSBorislav Petkov select EDAC_ATOMIC_SCRUB 97373569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 97473569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 975a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 9765e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 977eb01d42aSChristoph Hellwig select HAVE_PCI 97878bdbbacSMasahiro Yamada select HAVE_PLAT_DELAY 97978bdbbacSMasahiro Yamada select HAVE_PLAT_FW_INIT_CMDLINE 98078bdbbacSMasahiro Yamada select HAVE_PLAT_MEMCPY 981f00e001eSDavid Daney select ZONE_DMA32 982465aaed0SDavid Daney select HOLES_IN_ZONE 983d30a2b47SLinus Walleij select GPIOLIB 9846e511163SDavid Daney select USE_OF 9856e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 9866e511163SDavid Daney select SYS_SUPPORTS_SMP 9877820b84bSDavid Daney select NR_CPUS_DEFAULT_64 9887820b84bSDavid Daney select MIPS_NR_CPU_NR_MAP_1024 989e326479fSAndrew Bresticker select BUILTIN_DTB 9908c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 99109230cbcSChristoph Hellwig select SWIOTLB 9923ff72be4SSteven J. Hill select SYS_SUPPORTS_RELOCATABLE 993a86c7f72SDavid Daney help 994a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 995a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 996a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 997a86c7f72SDavid Daney Some of the supported boards are: 998a86c7f72SDavid Daney EBT3000 999a86c7f72SDavid Daney EBH3000 1000a86c7f72SDavid Daney EBH3100 1001a86c7f72SDavid Daney Thunder 1002a86c7f72SDavid Daney Kodama 1003a86c7f72SDavid Daney Hikari 1004a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 1005a86c7f72SDavid Daney 10067f058e85SJayachandran Cconfig NLM_XLR_BOARD 10077f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 10087f058e85SJayachandran C select BOOT_ELF32 10097f058e85SJayachandran C select NLM_COMMON 10107f058e85SJayachandran C select SYS_HAS_CPU_XLR 10117f058e85SJayachandran C select SYS_SUPPORTS_SMP 1012eb01d42aSChristoph Hellwig select HAVE_PCI 10137f058e85SJayachandran C select SWAP_IO_SPACE 10147f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 10157f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 1016d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 10177f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 10187f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 10197f058e85SJayachandran C select NR_CPUS_DEFAULT_32 10207f058e85SJayachandran C select CEVT_R4K 10217f058e85SJayachandran C select CSRC_R4K 102267e38cf2SRalf Baechle select IRQ_MIPS_CPU 1023b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 10247f058e85SJayachandran C select SYNC_R4K 10257f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 10268f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 10278f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 10287f058e85SJayachandran C help 10297f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 10307f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 10317f058e85SJayachandran C 10321c773ea4SJayachandran Cconfig NLM_XLP_BOARD 10331c773ea4SJayachandran C bool "Netlogic XLP based systems" 10341c773ea4SJayachandran C select BOOT_ELF32 10351c773ea4SJayachandran C select NLM_COMMON 10361c773ea4SJayachandran C select SYS_HAS_CPU_XLP 10371c773ea4SJayachandran C select SYS_SUPPORTS_SMP 1038eb01d42aSChristoph Hellwig select HAVE_PCI 10391c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 10401c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 1041d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 1042d30a2b47SLinus Walleij select GPIOLIB 10431c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 10441c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 10451c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 10461c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 10471c773ea4SJayachandran C select CEVT_R4K 10481c773ea4SJayachandran C select CSRC_R4K 104967e38cf2SRalf Baechle select IRQ_MIPS_CPU 1050b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 10511c773ea4SJayachandran C select SYNC_R4K 10521c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 10532f6528e1SJayachandran C select USE_OF 10548f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 10558f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 10561c773ea4SJayachandran C help 10571c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 10581c773ea4SJayachandran C Say Y here if you have a XLP based board. 10591c773ea4SJayachandran C 10609bc463beSDavid Daneyconfig MIPS_PARAVIRT 10619bc463beSDavid Daney bool "Para-Virtualized guest system" 10629bc463beSDavid Daney select CEVT_R4K 10639bc463beSDavid Daney select CSRC_R4K 10649bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 10659bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 10669bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 10679bc463beSDavid Daney select SYS_SUPPORTS_SMP 10689bc463beSDavid Daney select NR_CPUS_DEFAULT_4 10699bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 10709bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 10719bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 10729bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 1073eb01d42aSChristoph Hellwig select HAVE_PCI 10749bc463beSDavid Daney select SWAP_IO_SPACE 10759bc463beSDavid Daney help 10769bc463beSDavid Daney This option supports guest running under ???? 10779bc463beSDavid Daney 10781da177e4SLinus Torvaldsendchoice 10791da177e4SLinus Torvalds 1080e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 10813b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 1082d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 1083a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 1084e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 10858945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 1086eed0eabdSPaul Burtonsource "arch/mips/generic/Kconfig" 10875e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 10885ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 10898ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 10901f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 10912572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig" 1092af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig" 10930f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 1094ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 109529c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 109638b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 109722b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 10985e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 1099a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 110071e2f4ddSJiaxun Yangsource "arch/mips/loongson2ef/Kconfig" 110130ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig" 110230ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig" 11037f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 1104ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 110538b18f72SRalf Baechle 11065e83d430SRalf Baechleendmenu 11075e83d430SRalf Baechle 11083c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 11093c9ee7efSAkinobu Mita bool 11103c9ee7efSAkinobu Mita default y 11113c9ee7efSAkinobu Mita 11121da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 11131da177e4SLinus Torvalds bool 11141da177e4SLinus Torvalds default y 11151da177e4SLinus Torvalds 1116ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 11171cc89038SAtsushi Nemoto bool 11181cc89038SAtsushi Nemoto default y 11191cc89038SAtsushi Nemoto 11201da177e4SLinus Torvalds# 11211da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 11221da177e4SLinus Torvalds# 11230e2794b0SRalf Baechleconfig FW_ARC 11241da177e4SLinus Torvalds bool 11251da177e4SLinus Torvalds 112661ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 112761ed242dSRalf Baechle bool 112861ed242dSRalf Baechle 11299267a30dSMarc St-Jeanconfig BOOT_RAW 11309267a30dSMarc St-Jean bool 11319267a30dSMarc St-Jean 1132217dd11eSRalf Baechleconfig CEVT_BCM1480 1133217dd11eSRalf Baechle bool 1134217dd11eSRalf Baechle 11356457d9fcSYoichi Yuasaconfig CEVT_DS1287 11366457d9fcSYoichi Yuasa bool 11376457d9fcSYoichi Yuasa 11381097c6acSYoichi Yuasaconfig CEVT_GT641XX 11391097c6acSYoichi Yuasa bool 11401097c6acSYoichi Yuasa 114142f77542SRalf Baechleconfig CEVT_R4K 114242f77542SRalf Baechle bool 114342f77542SRalf Baechle 1144217dd11eSRalf Baechleconfig CEVT_SB1250 1145217dd11eSRalf Baechle bool 1146217dd11eSRalf Baechle 1147229f773eSAtsushi Nemotoconfig CEVT_TXX9 1148229f773eSAtsushi Nemoto bool 1149229f773eSAtsushi Nemoto 1150217dd11eSRalf Baechleconfig CSRC_BCM1480 1151217dd11eSRalf Baechle bool 1152217dd11eSRalf Baechle 11534247417dSYoichi Yuasaconfig CSRC_IOASIC 11544247417dSYoichi Yuasa bool 11554247417dSYoichi Yuasa 1156940f6b48SRalf Baechleconfig CSRC_R4K 1157940f6b48SRalf Baechle bool 1158940f6b48SRalf Baechle 1159217dd11eSRalf Baechleconfig CSRC_SB1250 1160217dd11eSRalf Baechle bool 1161217dd11eSRalf Baechle 1162a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL 1163a7f4df4eSAlex Smith def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1164a7f4df4eSAlex Smith 1165a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 1166d30a2b47SLinus Walleij select GPIOLIB 1167a9aec7feSAtsushi Nemoto bool 1168a9aec7feSAtsushi Nemoto 11690e2794b0SRalf Baechleconfig FW_CFE 1170df78b5c8SAurelien Jarno bool 1171df78b5c8SAurelien Jarno 117240e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES 117340e084a5SRalf Baechle bool 117440e084a5SRalf Baechle 1175885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1176f3ecc0ffSChristoph Hellwig select ARCH_HAS_DMA_COHERENCE_H 1177885014bcSFelix Fietkau select DMA_NONCOHERENT 1178885014bcSFelix Fietkau bool 1179885014bcSFelix Fietkau 118020d33064SPaul Burtonconfig DMA_PERDEV_COHERENT 118120d33064SPaul Burton bool 1182347cb6afSChristoph Hellwig select ARCH_HAS_SETUP_DMA_OPS 11835748e1b3SChristoph Hellwig select DMA_NONCOHERENT 118420d33064SPaul Burton 11851da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 11861da177e4SLinus Torvalds bool 1187db91427bSChristoph Hellwig # 1188db91427bSChristoph Hellwig # MIPS allows mixing "slightly different" Cacheability and Coherency 1189db91427bSChristoph Hellwig # Attribute bits. It is believed that the uncached access through 1190db91427bSChristoph Hellwig # KSEG1 and the implementation specific "uncached accelerated" used 1191db91427bSChristoph Hellwig # by pgprot_writcombine can be mixed, and the latter sometimes provides 1192db91427bSChristoph Hellwig # significant advantages. 1193db91427bSChristoph Hellwig # 1194419e2f18SChristoph Hellwig select ARCH_HAS_DMA_WRITE_COMBINE 1195fa7e2247SChristoph Hellwig select ARCH_HAS_DMA_PREP_COHERENT 1196f8c55dc6SChristoph Hellwig select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1197fa7e2247SChristoph Hellwig select ARCH_HAS_DMA_SET_UNCACHED 119834dc0ea6SChristoph Hellwig select DMA_NONCOHERENT_MMAP 1199f8c55dc6SChristoph Hellwig select DMA_NONCOHERENT_CACHE_SYNC 120034dc0ea6SChristoph Hellwig select NEED_DMA_MAP_STATE 12014ce588cdSRalf Baechle 120236a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 12031da177e4SLinus Torvalds bool 12041da177e4SLinus Torvalds 12051b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1206dbb74540SRalf Baechle bool 1207dbb74540SRalf Baechle 12081da177e4SLinus Torvaldsconfig MIPS_BONITO64 12091da177e4SLinus Torvalds bool 12101da177e4SLinus Torvalds 12111da177e4SLinus Torvaldsconfig MIPS_MSC 12121da177e4SLinus Torvalds bool 12131da177e4SLinus Torvalds 12141f21d2bdSBrian Murphyconfig MIPS_NILE4 12151f21d2bdSBrian Murphy bool 12161f21d2bdSBrian Murphy 121739b8d525SRalf Baechleconfig SYNC_R4K 121839b8d525SRalf Baechle bool 121939b8d525SRalf Baechle 1220487d70d0SGabor Juhosconfig MIPS_MACHINE 1221487d70d0SGabor Juhos def_bool n 1222487d70d0SGabor Juhos 1223ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1224d388d685SMaciej W. Rozycki def_bool n 1225d388d685SMaciej W. Rozycki 12264e0748f5SMarkos Chandrasconfig GENERIC_CSUM 122718d84e2eSAlexander Lobakin def_bool CPU_NO_LOAD_STORE_LR 12284e0748f5SMarkos Chandras 12298313da30SRalf Baechleconfig GENERIC_ISA_DMA 12308313da30SRalf Baechle bool 12318313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1232a35bee8aSNamhyung Kim select ISA_DMA_API 12338313da30SRalf Baechle 1234aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1235aa414dffSRalf Baechle bool 12368313da30SRalf Baechle select GENERIC_ISA_DMA 1237aa414dffSRalf Baechle 123878bdbbacSMasahiro Yamadaconfig HAVE_PLAT_DELAY 123978bdbbacSMasahiro Yamada bool 124078bdbbacSMasahiro Yamada 124178bdbbacSMasahiro Yamadaconfig HAVE_PLAT_FW_INIT_CMDLINE 124278bdbbacSMasahiro Yamada bool 124378bdbbacSMasahiro Yamada 124478bdbbacSMasahiro Yamadaconfig HAVE_PLAT_MEMCPY 124578bdbbacSMasahiro Yamada bool 124678bdbbacSMasahiro Yamada 1247a35bee8aSNamhyung Kimconfig ISA_DMA_API 1248a35bee8aSNamhyung Kim bool 1249a35bee8aSNamhyung Kim 1250465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1251465aaed0SDavid Daney bool 1252465aaed0SDavid Daney 12538c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE 12548c530ea3SMatt Redfearn bool 12558c530ea3SMatt Redfearn help 12568c530ea3SMatt Redfearn Selected if the platform supports relocating the kernel. 12578c530ea3SMatt Redfearn The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF 12588c530ea3SMatt Redfearn to allow access to command line and entropy sources. 12598c530ea3SMatt Redfearn 1260f381bf6dSDavid Daneyconfig MIPS_CBPF_JIT 1261f381bf6dSDavid Daney def_bool y 1262f381bf6dSDavid Daney depends on BPF_JIT && HAVE_CBPF_JIT 1263f381bf6dSDavid Daney 1264f381bf6dSDavid Daneyconfig MIPS_EBPF_JIT 1265f381bf6dSDavid Daney def_bool y 1266f381bf6dSDavid Daney depends on BPF_JIT && HAVE_EBPF_JIT 1267f381bf6dSDavid Daney 1268f381bf6dSDavid Daney 12695e83d430SRalf Baechle# 12706b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 12715e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 12725e83d430SRalf Baechle# choice statement should be more obvious to the user. 12735e83d430SRalf Baechle# 12745e83d430SRalf Baechlechoice 12756b2aac42SMasanari Iida prompt "Endianness selection" 12761da177e4SLinus Torvalds help 12771da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 12785e83d430SRalf Baechle byte order. These modes require different kernels and a different 12793cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 12805e83d430SRalf Baechle particular system but some systems are just as commonly used in the 12813dde6ad8SDavid Sterba one or the other endianness. 12825e83d430SRalf Baechle 12835e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 12845e83d430SRalf Baechle bool "Big endian" 12855e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 12865e83d430SRalf Baechle 12875e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 12885e83d430SRalf Baechle bool "Little endian" 12895e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 12905e83d430SRalf Baechle 12915e83d430SRalf Baechleendchoice 12925e83d430SRalf Baechle 129322b0763aSDavid Daneyconfig EXPORT_UASM 129422b0763aSDavid Daney bool 129522b0763aSDavid Daney 12962116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 12972116245eSRalf Baechle bool 12982116245eSRalf Baechle 12995e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 13005e83d430SRalf Baechle bool 13015e83d430SRalf Baechle 13025e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 13035e83d430SRalf Baechle bool 13041da177e4SLinus Torvalds 13059cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 13069cffd154SDavid Daney bool 130745e03e62SDaniel Silsby depends on CPU_SUPPORTS_HUGEPAGES 13089cffd154SDavid Daney default y 13099cffd154SDavid Daney 1310aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1311aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1312aa1762f4SDavid Daney 13131da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 13141da177e4SLinus Torvalds bool 13151da177e4SLinus Torvalds 13169267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 13179267a30dSMarc St-Jean bool 13189267a30dSMarc St-Jean 13199267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 13209267a30dSMarc St-Jean bool 13219267a30dSMarc St-Jean 13228420fd00SAtsushi Nemotoconfig IRQ_TXX9 13238420fd00SAtsushi Nemoto bool 13248420fd00SAtsushi Nemoto 1325d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1326d5ab1a69SYoichi Yuasa bool 1327d5ab1a69SYoichi Yuasa 1328252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 13291da177e4SLinus Torvalds bool 13301da177e4SLinus Torvalds 1331a57140e9SThomas Bogendoerferconfig PCI_XTALK_BRIDGE 1332a57140e9SThomas Bogendoerfer bool 1333a57140e9SThomas Bogendoerfer 13349267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 13359267a30dSMarc St-Jean bool 13369267a30dSMarc St-Jean 1337a83860c2SRalf Baechleconfig SOC_EMMA2RH 1338a83860c2SRalf Baechle bool 1339a83860c2SRalf Baechle select CEVT_R4K 1340a83860c2SRalf Baechle select CSRC_R4K 1341a83860c2SRalf Baechle select DMA_NONCOHERENT 134267e38cf2SRalf Baechle select IRQ_MIPS_CPU 1343a83860c2SRalf Baechle select SWAP_IO_SPACE 1344a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1345a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1346a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1347a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1348a83860c2SRalf Baechle 1349edb6310aSDaniel Lairdconfig SOC_PNX833X 1350edb6310aSDaniel Laird bool 1351edb6310aSDaniel Laird select CEVT_R4K 1352edb6310aSDaniel Laird select CSRC_R4K 135367e38cf2SRalf Baechle select IRQ_MIPS_CPU 1354edb6310aSDaniel Laird select DMA_NONCOHERENT 1355edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1356edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1357edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1358edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1359377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1360edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1361edb6310aSDaniel Laird 1362edb6310aSDaniel Lairdconfig SOC_PNX8335 1363edb6310aSDaniel Laird bool 1364edb6310aSDaniel Laird select SOC_PNX833X 1365edb6310aSDaniel Laird 1366a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1367a7e07b1aSMarkos Chandras bool 1368a7e07b1aSMarkos Chandras 13691da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 13701da177e4SLinus Torvalds bool 13711da177e4SLinus Torvalds 1372e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1373e2defae5SThomas Bogendoerfer bool 1374e2defae5SThomas Bogendoerfer 13755b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 13765b438c44SThomas Bogendoerfer bool 13775b438c44SThomas Bogendoerfer 1378e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1379e2defae5SThomas Bogendoerfer bool 1380e2defae5SThomas Bogendoerfer 1381e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1382e2defae5SThomas Bogendoerfer bool 1383e2defae5SThomas Bogendoerfer 1384e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1385e2defae5SThomas Bogendoerfer bool 1386e2defae5SThomas Bogendoerfer 1387e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1388e2defae5SThomas Bogendoerfer bool 1389e2defae5SThomas Bogendoerfer 1390e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1391e2defae5SThomas Bogendoerfer bool 1392e2defae5SThomas Bogendoerfer 13930e2794b0SRalf Baechleconfig FW_ARC32 13945e83d430SRalf Baechle bool 13955e83d430SRalf Baechle 1396aaa9fad3SPaul Bolleconfig FW_SNIPROM 1397231a35d3SThomas Bogendoerfer bool 1398231a35d3SThomas Bogendoerfer 13991da177e4SLinus Torvaldsconfig BOOT_ELF32 14001da177e4SLinus Torvalds bool 14011da177e4SLinus Torvalds 1402930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1403930beb5aSFlorian Fainelli bool 1404930beb5aSFlorian Fainelli 1405930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1406930beb5aSFlorian Fainelli bool 1407930beb5aSFlorian Fainelli 1408930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1409930beb5aSFlorian Fainelli bool 1410930beb5aSFlorian Fainelli 1411930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1412930beb5aSFlorian Fainelli bool 1413930beb5aSFlorian Fainelli 14141da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 14151da177e4SLinus Torvalds int 1416a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 14175432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 14185432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 14195432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 14201da177e4SLinus Torvalds default "5" 14211da177e4SLinus Torvalds 14221da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 14231da177e4SLinus Torvalds bool 14241da177e4SLinus Torvalds 1425e9422427SThomas Bogendoerferconfig ARC_CMDLINE_ONLY 1426e9422427SThomas Bogendoerfer bool 1427e9422427SThomas Bogendoerfer 14281da177e4SLinus Torvaldsconfig ARC_CONSOLE 14291da177e4SLinus Torvalds bool "ARC console support" 1430e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 14311da177e4SLinus Torvalds 14321da177e4SLinus Torvaldsconfig ARC_MEMORY 14331da177e4SLinus Torvalds bool 14341da177e4SLinus Torvalds 14351da177e4SLinus Torvaldsconfig ARC_PROMLIB 14361da177e4SLinus Torvalds bool 14371da177e4SLinus Torvalds 14380e2794b0SRalf Baechleconfig FW_ARC64 14391da177e4SLinus Torvalds bool 14401da177e4SLinus Torvalds 14411da177e4SLinus Torvaldsconfig BOOT_ELF64 14421da177e4SLinus Torvalds bool 14431da177e4SLinus Torvalds 14441da177e4SLinus Torvaldsmenu "CPU selection" 14451da177e4SLinus Torvalds 14461da177e4SLinus Torvaldschoice 14471da177e4SLinus Torvalds prompt "CPU type" 14481da177e4SLinus Torvalds default CPU_R4X00 14491da177e4SLinus Torvalds 1450268a2d60SJiaxun Yangconfig CPU_LOONGSON64 1451caed1d1bSHuacai Chen bool "Loongson 64-bit CPU" 1452268a2d60SJiaxun Yang depends on SYS_HAS_CPU_LOONGSON64 1453d3bc81beSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 145451522217SJiaxun Yang select CPU_MIPSR2 145551522217SJiaxun Yang select CPU_HAS_PREFETCH 14560e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 14570e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 14580e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 14597507445bSHuacai Chen select CPU_SUPPORTS_MSA 146051522217SJiaxun Yang select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT 146151522217SJiaxun Yang select CPU_MIPSR2_IRQ_VI 14620e476d91SHuacai Chen select WEAK_ORDERING 14630e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 14647507445bSHuacai Chen select MIPS_ASID_BITS_VARIABLE 1465b2edcfc8SHuacai Chen select MIPS_PGD_C0_CONTEXT 146617c99d94SHuacai Chen select MIPS_L1_CACHE_SHIFT_6 1467d30a2b47SLinus Walleij select GPIOLIB 146809230cbcSChristoph Hellwig select SWIOTLB 14690e476d91SHuacai Chen help 1470caed1d1bSHuacai Chen The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor 1471caed1d1bSHuacai Chen cores implements the MIPS64R2 instruction set with many extensions, 1472caed1d1bSHuacai Chen including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000, 1473caed1d1bSHuacai Chen 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old 1474caed1d1bSHuacai Chen Loongson-2E/2F is not covered here and will be removed in future. 14750e476d91SHuacai Chen 1476caed1d1bSHuacai Chenconfig LOONGSON3_ENHANCEMENT 1477caed1d1bSHuacai Chen bool "New Loongson-3 CPU Enhancements" 14781e820da3SHuacai Chen default n 1479268a2d60SJiaxun Yang depends on CPU_LOONGSON64 14801e820da3SHuacai Chen help 1481caed1d1bSHuacai Chen New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A 14821e820da3SHuacai Chen R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as 1483268a2d60SJiaxun Yang FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User 14841e820da3SHuacai Chen Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), 14851e820da3SHuacai Chen Fast TLB refill support, etc. 14861e820da3SHuacai Chen 14871e820da3SHuacai Chen This option enable those enhancements which are not probed at run 14881e820da3SHuacai Chen time. If you want a generic kernel to run on all Loongson 3 machines, 14891e820da3SHuacai Chen please say 'N' here. If you want a high-performance kernel to run on 1490caed1d1bSHuacai Chen new Loongson-3 machines only, please say 'Y' here. 14911e820da3SHuacai Chen 1492e02e07e3SHuacai Chenconfig CPU_LOONGSON3_WORKAROUNDS 1493caed1d1bSHuacai Chen bool "Old Loongson-3 LLSC Workarounds" 1494e02e07e3SHuacai Chen default y if SMP 1495268a2d60SJiaxun Yang depends on CPU_LOONGSON64 1496e02e07e3SHuacai Chen help 1497caed1d1bSHuacai Chen Loongson-3 processors have the llsc issues which require workarounds. 1498e02e07e3SHuacai Chen Without workarounds the system may hang unexpectedly. 1499e02e07e3SHuacai Chen 1500caed1d1bSHuacai Chen Newer Loongson-3 will fix these issues and no workarounds are needed. 1501e02e07e3SHuacai Chen The workarounds have no significant side effect on them but may 1502e02e07e3SHuacai Chen decrease the performance of the system so this option should be 1503e02e07e3SHuacai Chen disabled unless the kernel is intended to be run on old systems. 1504e02e07e3SHuacai Chen 1505e02e07e3SHuacai Chen If unsure, please say Y. 1506e02e07e3SHuacai Chen 15073702bba5SWu Zhangjinconfig CPU_LOONGSON2E 15083702bba5SWu Zhangjin bool "Loongson 2E" 15093702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 1510268a2d60SJiaxun Yang select CPU_LOONGSON2EF 15112a21c730SFuxin Zhang help 15122a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 15132a21c730SFuxin Zhang with many extensions. 15142a21c730SFuxin Zhang 151525985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 15166f7a251aSWu Zhangjin bonito64. 15176f7a251aSWu Zhangjin 15186f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 15196f7a251aSWu Zhangjin bool "Loongson 2F" 15206f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 1521268a2d60SJiaxun Yang select CPU_LOONGSON2EF 1522d30a2b47SLinus Walleij select GPIOLIB 15236f7a251aSWu Zhangjin help 15246f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 15256f7a251aSWu Zhangjin with many extensions. 15266f7a251aSWu Zhangjin 15276f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 15286f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 15296f7a251aSWu Zhangjin Loongson2E. 15306f7a251aSWu Zhangjin 1531ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1532ca585cf9SKelvin Cheung bool "Loongson 1B" 1533ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1534b2afb64cSHuacai Chen select CPU_LOONGSON32 15359ec88b60SKelvin Cheung select LEDS_GPIO_REGISTER 1536ca585cf9SKelvin Cheung help 1537ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1538968dc5a0S谢致邦 (XIE Zhibang) Release 1 instruction set and part of the MIPS32 Release 2 1539968dc5a0S谢致邦 (XIE Zhibang) instruction set. 1540ca585cf9SKelvin Cheung 154112e3280bSYang Lingconfig CPU_LOONGSON1C 154212e3280bSYang Ling bool "Loongson 1C" 154312e3280bSYang Ling depends on SYS_HAS_CPU_LOONGSON1C 1544b2afb64cSHuacai Chen select CPU_LOONGSON32 154512e3280bSYang Ling select LEDS_GPIO_REGISTER 154612e3280bSYang Ling help 154712e3280bSYang Ling The Loongson 1C is a 32-bit SoC, which implements the MIPS32 1548968dc5a0S谢致邦 (XIE Zhibang) Release 1 instruction set and part of the MIPS32 Release 2 1549968dc5a0S谢致邦 (XIE Zhibang) instruction set. 155012e3280bSYang Ling 15516e760c8dSRalf Baechleconfig CPU_MIPS32_R1 15526e760c8dSRalf Baechle bool "MIPS32 Release 1" 15537cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 15546e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1555797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1556ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15576e760c8dSRalf Baechle help 15585e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 15591e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 15601e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 15611e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 15621e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 15631e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 15641e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 15651e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 15661e5f1caaSRalf Baechle performance. 15671e5f1caaSRalf Baechle 15681e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 15691e5f1caaSRalf Baechle bool "MIPS32 Release 2" 15707cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 15711e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1572797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1573ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1574a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 15752235a54dSSanjay Lal select HAVE_KVM 15761e5f1caaSRalf Baechle help 15775e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 15786e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 15796e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 15806e760c8dSRalf Baechle specific type of processor in your system, choose those that one 15816e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 15821da177e4SLinus Torvalds 15837fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 1584674d10e2SMarkos Chandras bool "MIPS32 Release 6" 15857fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 15867fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 158718d84e2eSAlexander Lobakin select CPU_NO_LOAD_STORE_LR 15887fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 15897fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 15907fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 15917fd08ca5SLeonid Yegoshin select HAVE_KVM 15927fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 15937fd08ca5SLeonid Yegoshin help 15947fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 15957fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 15967fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 15977fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 15987fd08ca5SLeonid Yegoshin 15996e760c8dSRalf Baechleconfig CPU_MIPS64_R1 16006e760c8dSRalf Baechle bool "MIPS64 Release 1" 16017cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1602797798c1SRalf Baechle select CPU_HAS_PREFETCH 1603ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1604ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1605ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 16069cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 16076e760c8dSRalf Baechle help 16086e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 16096e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 16106e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 16116e760c8dSRalf Baechle specific type of processor in your system, choose those that one 16126e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 16131e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 16141e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 16151e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 16161e5f1caaSRalf Baechle performance. 16171e5f1caaSRalf Baechle 16181e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 16191e5f1caaSRalf Baechle bool "MIPS64 Release 2" 16207cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1621797798c1SRalf Baechle select CPU_HAS_PREFETCH 16221e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 16231e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1624ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 16259cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1626a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 162740a2df49SJames Hogan select HAVE_KVM 16281e5f1caaSRalf Baechle help 16291e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 16301e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 16311e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 16321e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 16331e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 16341da177e4SLinus Torvalds 16357fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 1636674d10e2SMarkos Chandras bool "MIPS64 Release 6" 16377fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 16387fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 163918d84e2eSAlexander Lobakin select CPU_NO_LOAD_STORE_LR 16407fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 16417fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 16427fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 1643afd375dcSPaul Burton select CPU_SUPPORTS_HUGEPAGES 16447fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 16452e6c7747SJames Hogan select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 164640a2df49SJames Hogan select HAVE_KVM 16477fd08ca5SLeonid Yegoshin help 16487fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 16497fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 16507fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 16517fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 16527fd08ca5SLeonid Yegoshin 16531da177e4SLinus Torvaldsconfig CPU_R3000 16541da177e4SLinus Torvalds bool "R3000" 16557cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1656f7062ddbSRalf Baechle select CPU_HAS_WB 165754746829SPaul Burton select CPU_R3K_TLB 1658ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1659797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 16601da177e4SLinus Torvalds help 16611da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 16621da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 16631da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 16641da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 16651da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 16661da177e4SLinus Torvalds try to recompile with R3000. 16671da177e4SLinus Torvalds 16681da177e4SLinus Torvaldsconfig CPU_TX39XX 16691da177e4SLinus Torvalds bool "R39XX" 16707cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1671ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 167254746829SPaul Burton select CPU_R3K_TLB 16731da177e4SLinus Torvalds 16741da177e4SLinus Torvaldsconfig CPU_VR41XX 16751da177e4SLinus Torvalds bool "R41xx" 16767cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1677ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1678ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 16791da177e4SLinus Torvalds help 16805e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 16811da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 16821da177e4SLinus Torvalds kernel built with this option will not run on any other type of 16831da177e4SLinus Torvalds processor or vice versa. 16841da177e4SLinus Torvalds 16851da177e4SLinus Torvaldsconfig CPU_R4X00 16861da177e4SLinus Torvalds bool "R4x00" 16877cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1688ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1689ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1690970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16911da177e4SLinus Torvalds help 16921da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 16931da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 16941da177e4SLinus Torvalds 16951da177e4SLinus Torvaldsconfig CPU_TX49XX 16961da177e4SLinus Torvalds bool "R49XX" 16977cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1698de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1699ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1700ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1701970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17021da177e4SLinus Torvalds 17031da177e4SLinus Torvaldsconfig CPU_R5000 17041da177e4SLinus Torvalds bool "R5000" 17057cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1706ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1707ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1708970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17091da177e4SLinus Torvalds help 17101da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 17111da177e4SLinus Torvalds 1712542c1020SShinya Kuribayashiconfig CPU_R5500 1713542c1020SShinya Kuribayashi bool "R5500" 1714542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1715542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1716542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 17179cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1718542c1020SShinya Kuribayashi help 1719542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1720542c1020SShinya Kuribayashi instruction set. 1721542c1020SShinya Kuribayashi 17221da177e4SLinus Torvaldsconfig CPU_NEVADA 17231da177e4SLinus Torvalds bool "RM52xx" 17247cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1725ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1726ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1727970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17281da177e4SLinus Torvalds help 17291da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 17301da177e4SLinus Torvalds 17311da177e4SLinus Torvaldsconfig CPU_R10000 17321da177e4SLinus Torvalds bool "R10000" 17337cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 17345e83d430SRalf Baechle select CPU_HAS_PREFETCH 1735ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1736ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1737797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1738970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17391da177e4SLinus Torvalds help 17401da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 17411da177e4SLinus Torvalds 17421da177e4SLinus Torvaldsconfig CPU_RM7000 17431da177e4SLinus Torvalds bool "RM7000" 17447cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 17455e83d430SRalf Baechle select CPU_HAS_PREFETCH 1746ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1747ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1748797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1749970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17501da177e4SLinus Torvalds 17511da177e4SLinus Torvaldsconfig CPU_SB1 17521da177e4SLinus Torvalds bool "SB1" 17537cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1754ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1755ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1756797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1757970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17580004a9dfSRalf Baechle select WEAK_ORDERING 17591da177e4SLinus Torvalds 1760a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1761a86c7f72SDavid Daney bool "Cavium Octeon processor" 17625e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1763a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1764a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1765a86c7f72SDavid Daney select WEAK_ORDERING 1766a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 17679cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1768df115f3eSBen Hutchings select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1769df115f3eSBen Hutchings select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1770930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 17710ae3abcdSJames Hogan select HAVE_KVM 1772a86c7f72SDavid Daney help 1773a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1774a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1775a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1776a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1777a86c7f72SDavid Daney 1778cd746249SJonas Gorskiconfig CPU_BMIPS 1779cd746249SJonas Gorski bool "Broadcom BMIPS" 1780cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1781cd746249SJonas Gorski select CPU_MIPS32 1782fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1783cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1784cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1785cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1786cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1787cd746249SJonas Gorski select DMA_NONCOHERENT 178867e38cf2SRalf Baechle select IRQ_MIPS_CPU 1789cd746249SJonas Gorski select SWAP_IO_SPACE 1790cd746249SJonas Gorski select WEAK_ORDERING 1791c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 179269aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1793a8d709b0SMarkus Mayer select CPU_SUPPORTS_CPUFREQ 1794a8d709b0SMarkus Mayer select MIPS_EXTERNAL_TIMER 1795c1c0c461SKevin Cernekee help 1796fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1797c1c0c461SKevin Cernekee 17987f058e85SJayachandran Cconfig CPU_XLR 17997f058e85SJayachandran C bool "Netlogic XLR SoC" 18007f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 18017f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 18027f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 18037f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1804970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 18057f058e85SJayachandran C select WEAK_ORDERING 18067f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 18077f058e85SJayachandran C help 18087f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 18091c773ea4SJayachandran C 18101c773ea4SJayachandran Cconfig CPU_XLP 18111c773ea4SJayachandran C bool "Netlogic XLP SoC" 18121c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 18131c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 18141c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 18151c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 18161c773ea4SJayachandran C select WEAK_ORDERING 18171c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 18181c773ea4SJayachandran C select CPU_HAS_PREFETCH 1819d6504846SJayachandran C select CPU_MIPSR2 1820ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 18212db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 18221c773ea4SJayachandran C help 18231c773ea4SJayachandran C Netlogic Microsystems XLP processors. 18241da177e4SLinus Torvaldsendchoice 18251da177e4SLinus Torvalds 1826a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1827a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1828a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 18297fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1830a6e18781SLeonid Yegoshin help 1831a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1832a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1833a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1834a6e18781SLeonid Yegoshin 1835a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1836a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1837a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1838a6e18781SLeonid Yegoshin select EVA 1839a6e18781SLeonid Yegoshin default y 1840a6e18781SLeonid Yegoshin help 1841a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1842a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1843a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1844a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1845a6e18781SLeonid Yegoshin 1846c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1847c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1848c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1849c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1850c5b36783SSteven J. Hill help 1851c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1852c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1853c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1854c5b36783SSteven J. Hill 1855c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1856c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1857c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1858c5b36783SSteven J. Hill depends on !EVA 1859c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1860c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1861c5b36783SSteven J. Hill select XPA 1862c5b36783SSteven J. Hill select HIGHMEM 1863d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 1864c5b36783SSteven J. Hill default n 1865c5b36783SSteven J. Hill help 1866c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1867c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1868c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1869c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1870c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1871c5b36783SSteven J. Hill If unsure, say 'N' here. 1872c5b36783SSteven J. Hill 1873622844bfSWu Zhangjinif CPU_LOONGSON2F 1874622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1875622844bfSWu Zhangjin bool 1876622844bfSWu Zhangjin 1877622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1878622844bfSWu Zhangjin bool 1879622844bfSWu Zhangjin 1880622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1881622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1882622844bfSWu Zhangjin default y 1883622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1884622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1885622844bfSWu Zhangjin help 1886622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1887622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1888622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1889622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1890622844bfSWu Zhangjin 1891622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1892622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1893622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1894622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1895622844bfSWu Zhangjin systems. 1896622844bfSWu Zhangjin 1897622844bfSWu Zhangjin If unsure, please say Y. 1898622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1899622844bfSWu Zhangjin 19001b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 19011b93b3c3SWu Zhangjin bool 19021b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 19031b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 190431c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 19051b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1906fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 19074e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 19081b93b3c3SWu Zhangjin 19091b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 19101b93b3c3SWu Zhangjin bool 19111b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 19121b93b3c3SWu Zhangjin 1913dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM 1914dbb98314SAlban Bedel bool 1915dbb98314SAlban Bedel select SYS_SUPPORTS_ZBOOT 1916dbb98314SAlban Bedel 1917268a2d60SJiaxun Yangconfig CPU_LOONGSON2EF 19183702bba5SWu Zhangjin bool 19193702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 19203702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 19213702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1922970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 1923e905086eSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 19243702bba5SWu Zhangjin 1925b2afb64cSHuacai Chenconfig CPU_LOONGSON32 1926ca585cf9SKelvin Cheung bool 1927ca585cf9SKelvin Cheung select CPU_MIPS32 19287e280f6bSJiaxun Yang select CPU_MIPSR2 1929ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1930ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1931ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1932f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1933ca585cf9SKelvin Cheung 1934fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 193504fa8bf7SJonas Gorski select SMP_UP if SMP 19361bbb6c1bSKevin Cernekee bool 1937cd746249SJonas Gorski 1938cd746249SJonas Gorskiconfig CPU_BMIPS4350 1939cd746249SJonas Gorski bool 1940cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1941cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1942cd746249SJonas Gorski 1943cd746249SJonas Gorskiconfig CPU_BMIPS4380 1944cd746249SJonas Gorski bool 1945bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1946cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1947cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1948b4720809SFlorian Fainelli select CPU_HAS_RIXI 1949cd746249SJonas Gorski 1950cd746249SJonas Gorskiconfig CPU_BMIPS5000 1951cd746249SJonas Gorski bool 1952cd746249SJonas Gorski select MIPS_CPU_SCACHE 1953bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1954cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1955cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1956b4720809SFlorian Fainelli select CPU_HAS_RIXI 19571bbb6c1bSKevin Cernekee 1958268a2d60SJiaxun Yangconfig SYS_HAS_CPU_LOONGSON64 19590e476d91SHuacai Chen bool 19600e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 1961b2edcfc8SHuacai Chen select CPU_HAS_RIXI 19620e476d91SHuacai Chen 19633702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 19642a21c730SFuxin Zhang bool 19652a21c730SFuxin Zhang 19666f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 19676f7a251aSWu Zhangjin bool 196855045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 196955045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 19706f7a251aSWu Zhangjin 1971ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1972ca585cf9SKelvin Cheung bool 1973ca585cf9SKelvin Cheung 197412e3280bSYang Lingconfig SYS_HAS_CPU_LOONGSON1C 197512e3280bSYang Ling bool 197612e3280bSYang Ling 19777cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 19787cf8053bSRalf Baechle bool 19797cf8053bSRalf Baechle 19807cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 19817cf8053bSRalf Baechle bool 19827cf8053bSRalf Baechle 1983a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1984a6e18781SLeonid Yegoshin bool 1985a6e18781SLeonid Yegoshin 1986c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1987c5b36783SSteven J. Hill bool 19889ae1f262SPaul Burton select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 1989c5b36783SSteven J. Hill 19907fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 19917fd08ca5SLeonid Yegoshin bool 19929ae1f262SPaul Burton select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 19937fd08ca5SLeonid Yegoshin 19947cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 19957cf8053bSRalf Baechle bool 19967cf8053bSRalf Baechle 19977cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 19987cf8053bSRalf Baechle bool 19997cf8053bSRalf Baechle 20007fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 20017fd08ca5SLeonid Yegoshin bool 20029ae1f262SPaul Burton select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 20037fd08ca5SLeonid Yegoshin 20047cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 20057cf8053bSRalf Baechle bool 20067cf8053bSRalf Baechle 20077cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 20087cf8053bSRalf Baechle bool 20097cf8053bSRalf Baechle 20107cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 20117cf8053bSRalf Baechle bool 20127cf8053bSRalf Baechle 20137cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 20147cf8053bSRalf Baechle bool 20157cf8053bSRalf Baechle 20167cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 20177cf8053bSRalf Baechle bool 20187cf8053bSRalf Baechle 20197cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 20207cf8053bSRalf Baechle bool 20217cf8053bSRalf Baechle 2022542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 2023542c1020SShinya Kuribayashi bool 2024542c1020SShinya Kuribayashi 20257cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 20267cf8053bSRalf Baechle bool 20277cf8053bSRalf Baechle 20287cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 20297cf8053bSRalf Baechle bool 20309ae1f262SPaul Burton select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 20317cf8053bSRalf Baechle 20327cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 20337cf8053bSRalf Baechle bool 20347cf8053bSRalf Baechle 20357cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 20367cf8053bSRalf Baechle bool 20377cf8053bSRalf Baechle 20385e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 20395e683389SDavid Daney bool 20405e683389SDavid Daney 2041cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 2042c1c0c461SKevin Cernekee bool 2043c1c0c461SKevin Cernekee 2044fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 2045c1c0c461SKevin Cernekee bool 2046cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 2047c1c0c461SKevin Cernekee 2048c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 2049c1c0c461SKevin Cernekee bool 2050cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 2051c1c0c461SKevin Cernekee 2052c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 2053c1c0c461SKevin Cernekee bool 2054cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 2055c1c0c461SKevin Cernekee 2056c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 2057c1c0c461SKevin Cernekee bool 2058cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 2059f263f2a2SHauke Mehrtens select ARCH_HAS_SYNC_DMA_FOR_CPU 2060c1c0c461SKevin Cernekee 20617f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 20627f058e85SJayachandran C bool 20637f058e85SJayachandran C 20641c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 20651c773ea4SJayachandran C bool 20661c773ea4SJayachandran C 206717099b11SRalf Baechle# 206817099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 206917099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 207017099b11SRalf Baechle# 20710004a9dfSRalf Baechleconfig WEAK_ORDERING 20720004a9dfSRalf Baechle bool 207317099b11SRalf Baechle 207417099b11SRalf Baechle# 207517099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 207617099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 207717099b11SRalf Baechle# 207817099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 207917099b11SRalf Baechle bool 20805e83d430SRalf Baechleendmenu 20815e83d430SRalf Baechle 20825e83d430SRalf Baechle# 20835e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 20845e83d430SRalf Baechle# 20855e83d430SRalf Baechleconfig CPU_MIPS32 20865e83d430SRalf Baechle bool 20877fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 20885e83d430SRalf Baechle 20895e83d430SRalf Baechleconfig CPU_MIPS64 20905e83d430SRalf Baechle bool 20917fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 20925e83d430SRalf Baechle 20935e83d430SRalf Baechle# 209457eeacedSPaul Burton# These indicate the revision of the architecture 20955e83d430SRalf Baechle# 20965e83d430SRalf Baechleconfig CPU_MIPSR1 20975e83d430SRalf Baechle bool 20985e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 20995e83d430SRalf Baechle 21005e83d430SRalf Baechleconfig CPU_MIPSR2 21015e83d430SRalf Baechle bool 2102a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 21038256b17eSFlorian Fainelli select CPU_HAS_RIXI 2104ba9196d2SJiaxun Yang select CPU_HAS_DIEI if !CPU_DIEI_BROKEN 2105a7e07b1aSMarkos Chandras select MIPS_SPRAM 21065e83d430SRalf Baechle 21077fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 21087fd08ca5SLeonid Yegoshin bool 21097fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 21108256b17eSFlorian Fainelli select CPU_HAS_RIXI 2111ba9196d2SJiaxun Yang select CPU_HAS_DIEI if !CPU_DIEI_BROKEN 211287321fddSPaul Burton select HAVE_ARCH_BITREVERSE 21132db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 21144a5dc51eSMarcin Nowakowski select MIPS_CRC_SUPPORT 2115a7e07b1aSMarkos Chandras select MIPS_SPRAM 21165e83d430SRalf Baechle 211757eeacedSPaul Burtonconfig TARGET_ISA_REV 211857eeacedSPaul Burton int 211957eeacedSPaul Burton default 1 if CPU_MIPSR1 212057eeacedSPaul Burton default 2 if CPU_MIPSR2 212157eeacedSPaul Burton default 6 if CPU_MIPSR6 212257eeacedSPaul Burton default 0 212357eeacedSPaul Burton help 212457eeacedSPaul Burton Reflects the ISA revision being targeted by the kernel build. This 212557eeacedSPaul Burton is effectively the Kconfig equivalent of MIPS_ISA_REV. 212657eeacedSPaul Burton 2127a6e18781SLeonid Yegoshinconfig EVA 2128a6e18781SLeonid Yegoshin bool 2129a6e18781SLeonid Yegoshin 2130c5b36783SSteven J. Hillconfig XPA 2131c5b36783SSteven J. Hill bool 2132c5b36783SSteven J. Hill 21335e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 21345e83d430SRalf Baechle bool 21355e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 21365e83d430SRalf Baechle bool 21375e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 21385e83d430SRalf Baechle bool 21395e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 21405e83d430SRalf Baechle bool 214155045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 214255045ff5SWu Zhangjin bool 214355045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 214455045ff5SWu Zhangjin bool 21459cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 21469cffd154SDavid Daney bool 2147171543e7SDaniel Silsby depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA)) 214882622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 214982622284SDavid Daney bool 2150cebf8c0fSPaul Burton default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP 21515e83d430SRalf Baechle 21528192c9eaSDavid Daney# 21538192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 21548192c9eaSDavid Daney# 21558192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 21568192c9eaSDavid Daney bool 2157679eb637SJames Hogan default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 21588192c9eaSDavid Daney 21595e83d430SRalf Baechlemenu "Kernel type" 21605e83d430SRalf Baechle 21615e83d430SRalf Baechlechoice 21625e83d430SRalf Baechle prompt "Kernel code model" 21635e83d430SRalf Baechle help 21645e83d430SRalf Baechle You should only select this option if you have a workload that 21655e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 21665e83d430SRalf Baechle large memory. You will only be presented a single option in this 21675e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 21685e83d430SRalf Baechle 21695e83d430SRalf Baechleconfig 32BIT 21705e83d430SRalf Baechle bool "32-bit kernel" 21715e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 21725e83d430SRalf Baechle select TRAD_SIGNALS 21735e83d430SRalf Baechle help 21745e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 2175f17c4ca3SRalf Baechle 21765e83d430SRalf Baechleconfig 64BIT 21775e83d430SRalf Baechle bool "64-bit kernel" 21785e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 21795e83d430SRalf Baechle help 21805e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 21815e83d430SRalf Baechle 21825e83d430SRalf Baechleendchoice 21835e83d430SRalf Baechle 21842235a54dSSanjay Lalconfig KVM_GUEST 21852235a54dSSanjay Lal bool "KVM Guest Kernel" 2186f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 21872235a54dSSanjay Lal help 2188caa1faa7SJames Hogan Select this option if building a guest kernel for KVM (Trap & Emulate) 2189caa1faa7SJames Hogan mode. 21902235a54dSSanjay Lal 2191eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 2192eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 21932235a54dSSanjay Lal depends on KVM_GUEST 2194eda3d33cSJames Hogan default 100 21952235a54dSSanjay Lal help 2196eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 2197eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 2198eda3d33cSJames Hogan timer frequency is specified directly. 21992235a54dSSanjay Lal 22001e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48 22011e321fa9SLeonid Yegoshin bool "48 bits virtual memory" 22021e321fa9SLeonid Yegoshin depends on 64BIT 22031e321fa9SLeonid Yegoshin help 22043377e227SAlex Belits Support a maximum at least 48 bits of application virtual 22053377e227SAlex Belits memory. Default is 40 bits or less, depending on the CPU. 22063377e227SAlex Belits For page sizes 16k and above, this option results in a small 22073377e227SAlex Belits memory overhead for page tables. For 4k page size, a fourth 22083377e227SAlex Belits level of page tables is added which imposes both a memory 22093377e227SAlex Belits overhead as well as slower TLB fault handling. 22103377e227SAlex Belits 22111e321fa9SLeonid Yegoshin If unsure, say N. 22121e321fa9SLeonid Yegoshin 22131da177e4SLinus Torvaldschoice 22141da177e4SLinus Torvalds prompt "Kernel page size" 22151da177e4SLinus Torvalds default PAGE_SIZE_4KB 22161da177e4SLinus Torvalds 22171da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 22181da177e4SLinus Torvalds bool "4kB" 2219268a2d60SJiaxun Yang depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64 22201da177e4SLinus Torvalds help 22211da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 22221da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 22231da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 22241da177e4SLinus Torvalds recommended for low memory systems. 22251da177e4SLinus Torvalds 22261da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 22271da177e4SLinus Torvalds bool "8kB" 2228c2aeaaeaSPaul Burton depends on CPU_CAVIUM_OCTEON 22291e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 22301da177e4SLinus Torvalds help 22311da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 22321da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2233c2aeaaeaSPaul Burton only on cnMIPS processors. Note that you will need a suitable Linux 2234c2aeaaeaSPaul Burton distribution to support this. 22351da177e4SLinus Torvalds 22361da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 22371da177e4SLinus Torvalds bool "16kB" 2238714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 22391da177e4SLinus Torvalds help 22401da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 22411da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2242714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2243714bfad6SRalf Baechle Linux distribution to support this. 22441da177e4SLinus Torvalds 2245c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2246c52399beSRalf Baechle bool "32kB" 2247c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 22481e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 2249c52399beSRalf Baechle help 2250c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2251c52399beSRalf Baechle the price of higher memory consumption. This option is available 2252c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2253c52399beSRalf Baechle distribution to support this. 2254c52399beSRalf Baechle 22551da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 22561da177e4SLinus Torvalds bool "64kB" 22573b2db173SPaul Burton depends on !CPU_R3000 && !CPU_TX39XX 22581da177e4SLinus Torvalds help 22591da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 22601da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 22611da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2262714bfad6SRalf Baechle writing this option is still high experimental. 22631da177e4SLinus Torvalds 22641da177e4SLinus Torvaldsendchoice 22651da177e4SLinus Torvalds 2266c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2267c9bace7cSDavid Daney int "Maximum zone order" 2268e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2269e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2270e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2271e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2272e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2273e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2274c9bace7cSDavid Daney range 11 64 2275c9bace7cSDavid Daney default "11" 2276c9bace7cSDavid Daney help 2277c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2278c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2279c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2280c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2281c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2282c9bace7cSDavid Daney increase this value. 2283c9bace7cSDavid Daney 2284c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2285c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2286c9bace7cSDavid Daney 2287c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2288c9bace7cSDavid Daney when choosing a value for this option. 2289c9bace7cSDavid Daney 22901da177e4SLinus Torvaldsconfig BOARD_SCACHE 22911da177e4SLinus Torvalds bool 22921da177e4SLinus Torvalds 22931da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 22941da177e4SLinus Torvalds bool 22951da177e4SLinus Torvalds select BOARD_SCACHE 22961da177e4SLinus Torvalds 22979318c51aSChris Dearman# 22989318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 22999318c51aSChris Dearman# 23009318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 23019318c51aSChris Dearman bool 23029318c51aSChris Dearman select BOARD_SCACHE 23039318c51aSChris Dearman 23041da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 23051da177e4SLinus Torvalds bool 23061da177e4SLinus Torvalds select BOARD_SCACHE 23071da177e4SLinus Torvalds 23081da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 23091da177e4SLinus Torvalds bool 23101da177e4SLinus Torvalds select BOARD_SCACHE 23111da177e4SLinus Torvalds 23121da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 23131da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 23141da177e4SLinus Torvalds depends on CPU_SB1 23151da177e4SLinus Torvalds help 23161da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 23171da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 23181da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 23191da177e4SLinus Torvalds 23201da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2321c8094b53SRalf Baechle bool 23221da177e4SLinus Torvalds 23233165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 23243165c846SFlorian Fainelli bool 2325c2aeaaeaSPaul Burton default y if !(CPU_R3000 || CPU_TX39XX) 23263165c846SFlorian Fainelli 2327c92e47e5SPaul Burtonconfig MIPS_FP_SUPPORT 2328183b40f9SPaul Burton bool "Floating Point support" if EXPERT 2329183b40f9SPaul Burton default y 2330183b40f9SPaul Burton help 2331183b40f9SPaul Burton Select y to include support for floating point in the kernel 2332183b40f9SPaul Burton including initialization of FPU hardware, FP context save & restore 2333183b40f9SPaul Burton and emulation of an FPU where necessary. Without this support any 2334183b40f9SPaul Burton userland program attempting to use floating point instructions will 2335183b40f9SPaul Burton receive a SIGILL. 2336183b40f9SPaul Burton 2337183b40f9SPaul Burton If you know that your userland will not attempt to use floating point 2338183b40f9SPaul Burton instructions then you can say n here to shrink the kernel a little. 2339183b40f9SPaul Burton 2340183b40f9SPaul Burton If unsure, say y. 2341c92e47e5SPaul Burton 234297f7dcbfSPaul Burtonconfig CPU_R2300_FPU 234397f7dcbfSPaul Burton bool 2344c92e47e5SPaul Burton depends on MIPS_FP_SUPPORT 234597f7dcbfSPaul Burton default y if CPU_R3000 || CPU_TX39XX 234697f7dcbfSPaul Burton 234754746829SPaul Burtonconfig CPU_R3K_TLB 234854746829SPaul Burton bool 234954746829SPaul Burton 235091405eb6SFlorian Fainelliconfig CPU_R4K_FPU 235191405eb6SFlorian Fainelli bool 2352c92e47e5SPaul Burton depends on MIPS_FP_SUPPORT 235397f7dcbfSPaul Burton default y if !CPU_R2300_FPU 235491405eb6SFlorian Fainelli 235562cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 235662cedc4fSFlorian Fainelli bool 235754746829SPaul Burton default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON) 235862cedc4fSFlorian Fainelli 235959d6ab86SRalf Baechleconfig MIPS_MT_SMP 2360a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 23615cbf9688SPaul Burton default y 2362527f1028SPaul Burton depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS 236359d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2364d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2365c080faa5SSteven J. Hill select SYNC_R4K 236659d6ab86SRalf Baechle select MIPS_MT 236759d6ab86SRalf Baechle select SMP 236887353d8aSRalf Baechle select SMP_UP 2369c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2370c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2371399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 237259d6ab86SRalf Baechle help 2373c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2374c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2375c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2376c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2377c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 237859d6ab86SRalf Baechle 2379f41ae0b2SRalf Baechleconfig MIPS_MT 2380f41ae0b2SRalf Baechle bool 2381f41ae0b2SRalf Baechle 23820ab7aefcSRalf Baechleconfig SCHED_SMT 23830ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 23840ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 23850ab7aefcSRalf Baechle default n 23860ab7aefcSRalf Baechle help 23870ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 23880ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 23890ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 23900ab7aefcSRalf Baechle 23910ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 23920ab7aefcSRalf Baechle bool 23930ab7aefcSRalf Baechle 2394f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2395f41ae0b2SRalf Baechle bool 2396f41ae0b2SRalf Baechle 2397f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2398f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2399f088fc84SRalf Baechle default y 2400b633648cSRalf Baechle depends on MIPS_MT_SMP 240107cc0c9eSRalf Baechle 2402b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2403b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 24049eaa9a82SPaul Burton depends on CPU_MIPSR6 2405c92e47e5SPaul Burton depends on MIPS_FP_SUPPORT 2406b0a668fbSLeonid Yegoshin default y 2407b0a668fbSLeonid Yegoshin help 2408b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2409b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 241007edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2411b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2412b0a668fbSLeonid Yegoshin final kernel image. 2413b0a668fbSLeonid Yegoshin 2414f35764e7SJames Hoganconfig SYS_SUPPORTS_VPE_LOADER 2415f35764e7SJames Hogan bool 2416f35764e7SJames Hogan depends on SYS_SUPPORTS_MULTITHREADING 2417f35764e7SJames Hogan help 2418f35764e7SJames Hogan Indicates that the platform supports the VPE loader, and provides 2419f35764e7SJames Hogan physical_memsize. 2420f35764e7SJames Hogan 242107cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 242207cc0c9eSRalf Baechle bool "VPE loader support." 2423f35764e7SJames Hogan depends on SYS_SUPPORTS_VPE_LOADER && MODULES 242407cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 242507cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 242607cc0c9eSRalf Baechle select MIPS_MT 242707cc0c9eSRalf Baechle help 242807cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 242907cc0c9eSRalf Baechle onto another VPE and running it. 2430f088fc84SRalf Baechle 243117a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 243217a1d523SDeng-Cheng Zhu bool 243317a1d523SDeng-Cheng Zhu default "y" 243417a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 243517a1d523SDeng-Cheng Zhu 24361a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 24371a2a6d7eSDeng-Cheng Zhu bool 24381a2a6d7eSDeng-Cheng Zhu default "y" 24391a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 24401a2a6d7eSDeng-Cheng Zhu 2441e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2442e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2443e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2444e01402b1SRalf Baechle default y 2445e01402b1SRalf Baechle help 2446e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2447e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2448e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2449e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2450e01402b1SRalf Baechle 2451e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2452e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2453e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2454e01402b1SRalf Baechle 2455da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2456da615cf6SDeng-Cheng Zhu bool 2457da615cf6SDeng-Cheng Zhu default "y" 2458da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2459da615cf6SDeng-Cheng Zhu 24602c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 24612c973ef0SDeng-Cheng Zhu bool 24622c973ef0SDeng-Cheng Zhu default "y" 24632c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 24642c973ef0SDeng-Cheng Zhu 24654a16ff4cSRalf Baechleconfig MIPS_CMP 24665cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 24675676319cSMarkos Chandras depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 2468b10b43baSMarkos Chandras select SMP 2469eb9b5141STim Anderson select SYNC_R4K 2470b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 24714a16ff4cSRalf Baechle select WEAK_ORDERING 24724a16ff4cSRalf Baechle default n 24734a16ff4cSRalf Baechle help 2474044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2475044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2476044505c7SPaul Burton its ability to start secondary CPUs. 24774a16ff4cSRalf Baechle 24785cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 24795cac93b3SPaul Burton instead of this. 24805cac93b3SPaul Burton 24810ee958e1SPaul Burtonconfig MIPS_CPS 24820ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 24835a3e7c02SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 24840ee958e1SPaul Burton select MIPS_CM 24851d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 24860ee958e1SPaul Burton select SMP 24870ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 24881d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 2489c8b7712cSPaul Burton select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 24900ee958e1SPaul Burton select SYS_SUPPORTS_SMP 24910ee958e1SPaul Burton select WEAK_ORDERING 24920ee958e1SPaul Burton help 24930ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 24940ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 24950ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 24960ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 24970ee958e1SPaul Burton support is unavailable. 24980ee958e1SPaul Burton 24993179d37eSPaul Burtonconfig MIPS_CPS_PM 250039a59593SMarkos Chandras depends on MIPS_CPS 25013179d37eSPaul Burton bool 25023179d37eSPaul Burton 25039f98f3ddSPaul Burtonconfig MIPS_CM 25049f98f3ddSPaul Burton bool 25053c9b4166SPaul Burton select MIPS_CPC 25069f98f3ddSPaul Burton 25079c38cf44SPaul Burtonconfig MIPS_CPC 25089c38cf44SPaul Burton bool 25092600990eSRalf Baechle 25101da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 25111da177e4SLinus Torvalds bool 25121da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 25131da177e4SLinus Torvalds default y 25141da177e4SLinus Torvalds 25151da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 25161da177e4SLinus Torvalds bool 25171da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 25181da177e4SLinus Torvalds default y 25191da177e4SLinus Torvalds 25209e2b5372SMarkos Chandraschoice 25219e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 25229e2b5372SMarkos Chandras 25239e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 25249e2b5372SMarkos Chandras bool "None" 25259e2b5372SMarkos Chandras help 25269e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 25279e2b5372SMarkos Chandras 25289693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 25299693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 25309e2b5372SMarkos Chandras bool "SmartMIPS" 25319693a853SFranck Bui-Huu help 25329693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 25339693a853SFranck Bui-Huu increased security at both hardware and software level for 25349693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 25359693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 25369693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 25379693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 25389693a853SFranck Bui-Huu here. 25399693a853SFranck Bui-Huu 2540bce86083SSteven J. Hillconfig CPU_MICROMIPS 25417fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 25429e2b5372SMarkos Chandras bool "microMIPS" 2543bce86083SSteven J. Hill help 2544bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2545bce86083SSteven J. Hill microMIPS ISA 2546bce86083SSteven J. Hill 25479e2b5372SMarkos Chandrasendchoice 25489e2b5372SMarkos Chandras 2549a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 25500ce3417eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2551a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 2552c92e47e5SPaul Burton depends on MIPS_FP_SUPPORT 25532a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2554a5e9a69eSPaul Burton help 2555a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2556a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 25571db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 25581db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 25591db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 25601db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 25611db1af84SPaul Burton the size & complexity of your kernel. 2562a5e9a69eSPaul Burton 2563a5e9a69eSPaul Burton If unsure, say Y. 2564a5e9a69eSPaul Burton 25651da177e4SLinus Torvaldsconfig CPU_HAS_WB 2566f7062ddbSRalf Baechle bool 2567e01402b1SRalf Baechle 2568df0ac8a4SKevin Cernekeeconfig XKS01 2569df0ac8a4SKevin Cernekee bool 2570df0ac8a4SKevin Cernekee 2571ba9196d2SJiaxun Yangconfig CPU_HAS_DIEI 2572ba9196d2SJiaxun Yang depends on !CPU_DIEI_BROKEN 2573ba9196d2SJiaxun Yang bool 2574ba9196d2SJiaxun Yang 2575ba9196d2SJiaxun Yangconfig CPU_DIEI_BROKEN 2576ba9196d2SJiaxun Yang bool 2577ba9196d2SJiaxun Yang 25788256b17eSFlorian Fainelliconfig CPU_HAS_RIXI 25798256b17eSFlorian Fainelli bool 25808256b17eSFlorian Fainelli 258118d84e2eSAlexander Lobakinconfig CPU_NO_LOAD_STORE_LR 2582932afdeeSYasha Cherikovsky bool 2583932afdeeSYasha Cherikovsky help 258418d84e2eSAlexander Lobakin CPU lacks support for unaligned load and store instructions: 2585932afdeeSYasha Cherikovsky LWL, LWR, SWL, SWR (Load/store word left/right). 258618d84e2eSAlexander Lobakin LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit 258718d84e2eSAlexander Lobakin systems). 2588932afdeeSYasha Cherikovsky 2589f41ae0b2SRalf Baechle# 2590f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2591f41ae0b2SRalf Baechle# 2592e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2593f41ae0b2SRalf Baechle bool 2594e01402b1SRalf Baechle 2595f41ae0b2SRalf Baechle# 2596f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2597f41ae0b2SRalf Baechle# 2598e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2599f41ae0b2SRalf Baechle bool 2600e01402b1SRalf Baechle 26011da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 26021da177e4SLinus Torvalds bool 26031da177e4SLinus Torvalds depends on !CPU_R3000 26041da177e4SLinus Torvalds default y 26051da177e4SLinus Torvalds 26061da177e4SLinus Torvalds# 260720d60d99SMaciej W. Rozycki# CPU non-features 260820d60d99SMaciej W. Rozycki# 260920d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 261020d60d99SMaciej W. Rozycki bool 261120d60d99SMaciej W. Rozycki 261220d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 261320d60d99SMaciej W. Rozycki bool 261420d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 261520d60d99SMaciej W. Rozycki 261620d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 261720d60d99SMaciej W. Rozycki bool 261820d60d99SMaciej W. Rozycki 2619071d2f0bSPaul Burtonconfig CPU_R4X00_BUGS64 2620071d2f0bSPaul Burton bool 2621071d2f0bSPaul Burton default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1) 2622071d2f0bSPaul Burton 26234edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT 26244edf00a4SPaul Burton int 26254edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 26264edf00a4SPaul Burton default 0 26274edf00a4SPaul Burton 26284edf00a4SPaul Burtonconfig MIPS_ASID_BITS 26294edf00a4SPaul Burton int 26302db003a5SPaul Burton default 0 if MIPS_ASID_BITS_VARIABLE 26314edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 26324edf00a4SPaul Burton default 8 26334edf00a4SPaul Burton 26342db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE 26352db003a5SPaul Burton bool 26362db003a5SPaul Burton 26374a5dc51eSMarcin Nowakowskiconfig MIPS_CRC_SUPPORT 26384a5dc51eSMarcin Nowakowski bool 26394a5dc51eSMarcin Nowakowski 264020d60d99SMaciej W. Rozycki# 26411da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 26421da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 26431da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 26441da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 26451da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 26461da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 26471da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 26481da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2649797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2650797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2651797798c1SRalf Baechle# support. 26521da177e4SLinus Torvalds# 26531da177e4SLinus Torvaldsconfig HIGHMEM 26541da177e4SLinus Torvalds bool "High Memory Support" 2655a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2656797798c1SRalf Baechle 2657797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2658797798c1SRalf Baechle bool 2659797798c1SRalf Baechle 2660797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2661797798c1SRalf Baechle bool 26621da177e4SLinus Torvalds 26639693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 26649693a853SFranck Bui-Huu bool 26659693a853SFranck Bui-Huu 2666a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2667a6a4834cSSteven J. Hill bool 2668a6a4834cSSteven J. Hill 2669377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2670377cb1b6SRalf Baechle bool 2671377cb1b6SRalf Baechle help 2672377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2673377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2674377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2675377cb1b6SRalf Baechle 2676a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2677a5e9a69eSPaul Burton bool 2678a5e9a69eSPaul Burton 2679b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2680b4819b59SYoichi Yuasa def_bool y 2681268a2d60SJiaxun Yang depends on !NUMA && !CPU_LOONGSON2EF 2682b4819b59SYoichi Yuasa 2683b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2684b1c6cd42SAtsushi Nemoto bool 2685397dc00eSMike Rapoport select SPARSEMEM_STATIC if !SGI_IP27 268631473747SAtsushi Nemoto 2687d8cb4e11SRalf Baechleconfig NUMA 2688d8cb4e11SRalf Baechle bool "NUMA Support" 2689d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2690d8cb4e11SRalf Baechle help 2691d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2692d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2693d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2694172a37e9SRandy Dunlap leave it disabled; on single node systems leave this option 2695d8cb4e11SRalf Baechle disabled. 2696d8cb4e11SRalf Baechle 2697d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2698d8cb4e11SRalf Baechle bool 2699d8cb4e11SRalf Baechle 2700f3c560a6SThomas Bogendoerferconfig HAVE_SETUP_PER_CPU_AREA 2701f3c560a6SThomas Bogendoerfer def_bool y 2702f3c560a6SThomas Bogendoerfer depends on NUMA 2703f3c560a6SThomas Bogendoerfer 2704f3c560a6SThomas Bogendoerferconfig NEED_PER_CPU_EMBED_FIRST_CHUNK 2705f3c560a6SThomas Bogendoerfer def_bool y 2706f3c560a6SThomas Bogendoerfer depends on NUMA 2707f3c560a6SThomas Bogendoerfer 27088c530ea3SMatt Redfearnconfig RELOCATABLE 27098c530ea3SMatt Redfearn bool "Relocatable kernel" 27103ff72be4SSteven J. Hill depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) 27118c530ea3SMatt Redfearn help 27128c530ea3SMatt Redfearn This builds a kernel image that retains relocation information 27138c530ea3SMatt Redfearn so it can be loaded someplace besides the default 1MB. 27148c530ea3SMatt Redfearn The relocations make the kernel binary about 15% larger, 27158c530ea3SMatt Redfearn but are discarded at runtime 27168c530ea3SMatt Redfearn 2717069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE 2718069fd766SMatt Redfearn hex "Relocation table size" 2719069fd766SMatt Redfearn depends on RELOCATABLE 2720069fd766SMatt Redfearn range 0x0 0x01000000 2721069fd766SMatt Redfearn default "0x00100000" 2722069fd766SMatt Redfearn ---help--- 2723069fd766SMatt Redfearn A table of relocation data will be appended to the kernel binary 2724069fd766SMatt Redfearn and parsed at boot to fix up the relocated kernel. 2725069fd766SMatt Redfearn 2726069fd766SMatt Redfearn This option allows the amount of space reserved for the table to be 2727069fd766SMatt Redfearn adjusted, although the default of 1Mb should be ok in most cases. 2728069fd766SMatt Redfearn 2729069fd766SMatt Redfearn The build will fail and a valid size suggested if this is too small. 2730069fd766SMatt Redfearn 2731069fd766SMatt Redfearn If unsure, leave at the default value. 2732069fd766SMatt Redfearn 2733405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE 2734405bc8fdSMatt Redfearn bool "Randomize the address of the kernel image" 2735405bc8fdSMatt Redfearn depends on RELOCATABLE 2736405bc8fdSMatt Redfearn ---help--- 2737405bc8fdSMatt Redfearn Randomizes the physical and virtual address at which the 2738405bc8fdSMatt Redfearn kernel image is loaded, as a security feature that 2739405bc8fdSMatt Redfearn deters exploit attempts relying on knowledge of the location 2740405bc8fdSMatt Redfearn of kernel internals. 2741405bc8fdSMatt Redfearn 2742405bc8fdSMatt Redfearn Entropy is generated using any coprocessor 0 registers available. 2743405bc8fdSMatt Redfearn 2744405bc8fdSMatt Redfearn The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2745405bc8fdSMatt Redfearn 2746405bc8fdSMatt Redfearn If unsure, say N. 2747405bc8fdSMatt Redfearn 2748405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET 2749405bc8fdSMatt Redfearn hex "Maximum kASLR offset" if EXPERT 2750405bc8fdSMatt Redfearn depends on RANDOMIZE_BASE 2751405bc8fdSMatt Redfearn range 0x0 0x40000000 if EVA || 64BIT 2752405bc8fdSMatt Redfearn range 0x0 0x08000000 2753405bc8fdSMatt Redfearn default "0x01000000" 2754405bc8fdSMatt Redfearn ---help--- 2755405bc8fdSMatt Redfearn When kASLR is active, this provides the maximum offset that will 2756405bc8fdSMatt Redfearn be applied to the kernel image. It should be set according to the 2757405bc8fdSMatt Redfearn amount of physical RAM available in the target system minus 2758405bc8fdSMatt Redfearn PHYSICAL_START and must be a power of 2. 2759405bc8fdSMatt Redfearn 2760405bc8fdSMatt Redfearn This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2761405bc8fdSMatt Redfearn EVA or 64-bit. The default is 16Mb. 2762405bc8fdSMatt Redfearn 2763c80d79d7SYasunori Gotoconfig NODES_SHIFT 2764c80d79d7SYasunori Goto int 2765c80d79d7SYasunori Goto default "6" 2766c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2767c80d79d7SYasunori Goto 276814f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 276914f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 2770268a2d60SJiaxun Yang depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64) 277114f70012SDeng-Cheng Zhu default y 277214f70012SDeng-Cheng Zhu help 277314f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 277414f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 277514f70012SDeng-Cheng Zhu 2776be8fa1cbSTiezhu Yangconfig DMI 2777be8fa1cbSTiezhu Yang bool "Enable DMI scanning" 2778be8fa1cbSTiezhu Yang depends on MACH_LOONGSON64 2779be8fa1cbSTiezhu Yang select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 2780be8fa1cbSTiezhu Yang default y 2781be8fa1cbSTiezhu Yang help 2782be8fa1cbSTiezhu Yang Enabled scanning of DMI to identify machine quirks. Say Y 2783be8fa1cbSTiezhu Yang here unless you have verified that your setup is not 2784be8fa1cbSTiezhu Yang affected by entries in the DMI blacklist. Required by PNP 2785be8fa1cbSTiezhu Yang BIOS code. 2786be8fa1cbSTiezhu Yang 27871da177e4SLinus Torvaldsconfig SMP 27881da177e4SLinus Torvalds bool "Multi-Processing support" 2789e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2790e73ea273SRalf Baechle help 27911da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 27924a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 27934a474157SRobert Graffham than one CPU, say Y. 27941da177e4SLinus Torvalds 27954a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 27961da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 27971da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 27984a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 27991da177e4SLinus Torvalds will run faster if you say N here. 28001da177e4SLinus Torvalds 28011da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 28021da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 28031da177e4SLinus Torvalds 280403502faaSAdrian Bunk See also the SMP-HOWTO available at 280503502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 28061da177e4SLinus Torvalds 28071da177e4SLinus Torvalds If you don't know what to do here, say N. 28081da177e4SLinus Torvalds 28097840d618SMatt Redfearnconfig HOTPLUG_CPU 28107840d618SMatt Redfearn bool "Support for hot-pluggable CPUs" 28117840d618SMatt Redfearn depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 28127840d618SMatt Redfearn help 28137840d618SMatt Redfearn Say Y here to allow turning CPUs off and on. CPUs can be 28147840d618SMatt Redfearn controlled through /sys/devices/system/cpu. 28157840d618SMatt Redfearn (Note: power management support will enable this option 28167840d618SMatt Redfearn automatically on SMP systems. ) 28177840d618SMatt Redfearn Say N if you want to disable CPU hotplug. 28187840d618SMatt Redfearn 281987353d8aSRalf Baechleconfig SMP_UP 282087353d8aSRalf Baechle bool 282187353d8aSRalf Baechle 28224a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 28234a16ff4cSRalf Baechle bool 28244a16ff4cSRalf Baechle 28250ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 28260ee958e1SPaul Burton bool 28270ee958e1SPaul Burton 2828e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2829e73ea273SRalf Baechle bool 2830e73ea273SRalf Baechle 2831130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2832130e2fb7SRalf Baechle bool 2833130e2fb7SRalf Baechle 2834130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2835130e2fb7SRalf Baechle bool 2836130e2fb7SRalf Baechle 2837130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2838130e2fb7SRalf Baechle bool 2839130e2fb7SRalf Baechle 2840130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2841130e2fb7SRalf Baechle bool 2842130e2fb7SRalf Baechle 2843130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2844130e2fb7SRalf Baechle bool 2845130e2fb7SRalf Baechle 28461da177e4SLinus Torvaldsconfig NR_CPUS 2847a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2848a91796a9SJayachandran C range 2 256 28491da177e4SLinus Torvalds depends on SMP 2850130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2851130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2852130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2853130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2854130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 28551da177e4SLinus Torvalds help 28561da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 28571da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 28581da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 285972ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 286072ede9b1SAtsushi Nemoto and 2 for all others. 28611da177e4SLinus Torvalds 28621da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 286372ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 286472ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 286572ede9b1SAtsushi Nemoto power of two. 28661da177e4SLinus Torvalds 2867399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2868399aaa25SAl Cooper bool 2869399aaa25SAl Cooper 28707820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP_1024 28717820b84bSDavid Daney bool 28727820b84bSDavid Daney 28737820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP 28747820b84bSDavid Daney int 28757820b84bSDavid Daney depends on SMP 28767820b84bSDavid Daney default 1024 if MIPS_NR_CPU_NR_MAP_1024 28777820b84bSDavid Daney default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 28787820b84bSDavid Daney 28791723b4a3SAtsushi Nemoto# 28801723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 28811723b4a3SAtsushi Nemoto# 28821723b4a3SAtsushi Nemoto 28831723b4a3SAtsushi Nemotochoice 28841723b4a3SAtsushi Nemoto prompt "Timer frequency" 28851723b4a3SAtsushi Nemoto default HZ_250 28861723b4a3SAtsushi Nemoto help 28871723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 28881723b4a3SAtsushi Nemoto 288967596573SPaul Burton config HZ_24 289067596573SPaul Burton bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 289167596573SPaul Burton 28921723b4a3SAtsushi Nemoto config HZ_48 28930f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 28941723b4a3SAtsushi Nemoto 28951723b4a3SAtsushi Nemoto config HZ_100 28961723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 28971723b4a3SAtsushi Nemoto 28981723b4a3SAtsushi Nemoto config HZ_128 28991723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 29001723b4a3SAtsushi Nemoto 29011723b4a3SAtsushi Nemoto config HZ_250 29021723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 29031723b4a3SAtsushi Nemoto 29041723b4a3SAtsushi Nemoto config HZ_256 29051723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 29061723b4a3SAtsushi Nemoto 29071723b4a3SAtsushi Nemoto config HZ_1000 29081723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 29091723b4a3SAtsushi Nemoto 29101723b4a3SAtsushi Nemoto config HZ_1024 29111723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 29121723b4a3SAtsushi Nemoto 29131723b4a3SAtsushi Nemotoendchoice 29141723b4a3SAtsushi Nemoto 291567596573SPaul Burtonconfig SYS_SUPPORTS_24HZ 291667596573SPaul Burton bool 291767596573SPaul Burton 29181723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 29191723b4a3SAtsushi Nemoto bool 29201723b4a3SAtsushi Nemoto 29211723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 29221723b4a3SAtsushi Nemoto bool 29231723b4a3SAtsushi Nemoto 29241723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 29251723b4a3SAtsushi Nemoto bool 29261723b4a3SAtsushi Nemoto 29271723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 29281723b4a3SAtsushi Nemoto bool 29291723b4a3SAtsushi Nemoto 29301723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 29311723b4a3SAtsushi Nemoto bool 29321723b4a3SAtsushi Nemoto 29331723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 29341723b4a3SAtsushi Nemoto bool 29351723b4a3SAtsushi Nemoto 29361723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 29371723b4a3SAtsushi Nemoto bool 29381723b4a3SAtsushi Nemoto 29391723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 29401723b4a3SAtsushi Nemoto bool 294167596573SPaul Burton default y if !SYS_SUPPORTS_24HZ && \ 294267596573SPaul Burton !SYS_SUPPORTS_48HZ && \ 294367596573SPaul Burton !SYS_SUPPORTS_100HZ && \ 294467596573SPaul Burton !SYS_SUPPORTS_128HZ && \ 294567596573SPaul Burton !SYS_SUPPORTS_250HZ && \ 294667596573SPaul Burton !SYS_SUPPORTS_256HZ && \ 294767596573SPaul Burton !SYS_SUPPORTS_1000HZ && \ 29481723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 29491723b4a3SAtsushi Nemoto 29501723b4a3SAtsushi Nemotoconfig HZ 29511723b4a3SAtsushi Nemoto int 295267596573SPaul Burton default 24 if HZ_24 29531723b4a3SAtsushi Nemoto default 48 if HZ_48 29541723b4a3SAtsushi Nemoto default 100 if HZ_100 29551723b4a3SAtsushi Nemoto default 128 if HZ_128 29561723b4a3SAtsushi Nemoto default 250 if HZ_250 29571723b4a3SAtsushi Nemoto default 256 if HZ_256 29581723b4a3SAtsushi Nemoto default 1000 if HZ_1000 29591723b4a3SAtsushi Nemoto default 1024 if HZ_1024 29601723b4a3SAtsushi Nemoto 296196685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 296296685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 296396685b17SDeng-Cheng Zhu 2964ea6e942bSAtsushi Nemotoconfig KEXEC 29657d60717eSKees Cook bool "Kexec system call" 29662965faa5SDave Young select KEXEC_CORE 2967ea6e942bSAtsushi Nemoto help 2968ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2969ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 29703dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2971ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2972ea6e942bSAtsushi Nemoto 297301dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2974ea6e942bSAtsushi Nemoto 2975ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2976ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2977bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2978bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2979bf220695SGeert Uytterhoeven made. 2980ea6e942bSAtsushi Nemoto 29817aa1c8f4SRalf Baechleconfig CRASH_DUMP 29827aa1c8f4SRalf Baechle bool "Kernel crash dumps" 29837aa1c8f4SRalf Baechle help 29847aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 29857aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 29867aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 29877aa1c8f4SRalf Baechle a specially reserved region and then later executed after 29887aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 29897aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 29907aa1c8f4SRalf Baechle PHYSICAL_START. 29917aa1c8f4SRalf Baechle 29927aa1c8f4SRalf Baechleconfig PHYSICAL_START 29937aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 29948bda3e26SMaciej W. Rozycki default "0xffffffff84000000" 29957aa1c8f4SRalf Baechle depends on CRASH_DUMP 29967aa1c8f4SRalf Baechle help 29977aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 29987aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 29997aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 30007aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 30017aa1c8f4SRalf Baechle passed to the panic-ed kernel). 30027aa1c8f4SRalf Baechle 3003ea6e942bSAtsushi Nemotoconfig SECCOMP 3004ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 3005293c5bd1SRalf Baechle depends on PROC_FS 3006ea6e942bSAtsushi Nemoto default y 3007ea6e942bSAtsushi Nemoto help 3008ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 3009ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 3010ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 3011ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 3012ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 3013ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 3014ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 3015ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 3016ea6e942bSAtsushi Nemoto defined by each seccomp mode. 3017ea6e942bSAtsushi Nemoto 3018ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 3019ea6e942bSAtsushi Nemoto 3020597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 3021b7f1e273SPaul Burton bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 3022597ce172SPaul Burton depends on 32BIT || MIPS32_O32 3023597ce172SPaul Burton help 3024597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 3025597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 3026597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 3027597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 3028597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 3029597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 3030597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 3031597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 3032597ce172SPaul Burton saying N here. 3033597ce172SPaul Burton 303406e2e882SPaul Burton Although binutils currently supports use of this flag the details 303506e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 303606e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 303706e2e882SPaul Burton behaviour before the details have been finalised, this option should 303806e2e882SPaul Burton be considered experimental and only enabled by those working upon 303906e2e882SPaul Burton said details. 304006e2e882SPaul Burton 304106e2e882SPaul Burton If unsure, say N. 3042597ce172SPaul Burton 3043f2ffa5abSDezhong Diaoconfig USE_OF 30440b3e06fdSJonas Gorski bool 3045f2ffa5abSDezhong Diao select OF 3046e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 3047abd2363fSGrant Likely select IRQ_DOMAIN 3048f2ffa5abSDezhong Diao 30492fe8ea39SDengcheng Zhuconfig UHI_BOOT 30502fe8ea39SDengcheng Zhu bool 30512fe8ea39SDengcheng Zhu 30527fafb068SAndrew Brestickerconfig BUILTIN_DTB 30537fafb068SAndrew Bresticker bool 30547fafb068SAndrew Bresticker 30551da8f179SJonas Gorskichoice 30565b24d52cSJonas Gorski prompt "Kernel appended dtb support" if USE_OF 30571da8f179SJonas Gorski default MIPS_NO_APPENDED_DTB 30581da8f179SJonas Gorski 30591da8f179SJonas Gorski config MIPS_NO_APPENDED_DTB 30601da8f179SJonas Gorski bool "None" 30611da8f179SJonas Gorski help 30621da8f179SJonas Gorski Do not enable appended dtb support. 30631da8f179SJonas Gorski 306487db537dSAaro Koskinen config MIPS_ELF_APPENDED_DTB 306587db537dSAaro Koskinen bool "vmlinux" 306687db537dSAaro Koskinen help 306787db537dSAaro Koskinen With this option, the boot code will look for a device tree binary 306887db537dSAaro Koskinen DTB) included in the vmlinux ELF section .appended_dtb. By default 306987db537dSAaro Koskinen it is empty and the DTB can be appended using binutils command 307087db537dSAaro Koskinen objcopy: 307187db537dSAaro Koskinen 307287db537dSAaro Koskinen objcopy --update-section .appended_dtb=<filename>.dtb vmlinux 307387db537dSAaro Koskinen 307487db537dSAaro Koskinen This is meant as a backward compatiblity convenience for those 307587db537dSAaro Koskinen systems with a bootloader that can't be upgraded to accommodate 307687db537dSAaro Koskinen the documented boot protocol using a device tree. 307787db537dSAaro Koskinen 30781da8f179SJonas Gorski config MIPS_RAW_APPENDED_DTB 3079b8f54f2cSJonas Gorski bool "vmlinux.bin or vmlinuz.bin" 30801da8f179SJonas Gorski help 30811da8f179SJonas Gorski With this option, the boot code will look for a device tree binary 3082b8f54f2cSJonas Gorski DTB) appended to raw vmlinux.bin or vmlinuz.bin. 30831da8f179SJonas Gorski (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 30841da8f179SJonas Gorski 30851da8f179SJonas Gorski This is meant as a backward compatibility convenience for those 30861da8f179SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 30871da8f179SJonas Gorski the documented boot protocol using a device tree. 30881da8f179SJonas Gorski 30891da8f179SJonas Gorski Beware that there is very little in terms of protection against 30901da8f179SJonas Gorski this option being confused by leftover garbage in memory that might 30911da8f179SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 30921da8f179SJonas Gorski to vmlinux.bin. Do not leave this option active in a production kernel 30931da8f179SJonas Gorski if you don't intend to always append a DTB. 30941da8f179SJonas Gorskiendchoice 30951da8f179SJonas Gorski 30962024972eSJonas Gorskichoice 30972024972eSJonas Gorski prompt "Kernel command line type" if !CMDLINE_OVERRIDE 30982bcef9b4SJonas Gorski default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 309987fcfa7bSJiaxun Yang !MACH_LOONGSON64 && !MIPS_MALTA && \ 31002bcef9b4SJonas Gorski !CAVIUM_OCTEON_SOC 31012024972eSJonas Gorski default MIPS_CMDLINE_FROM_BOOTLOADER 31022024972eSJonas Gorski 31032024972eSJonas Gorski config MIPS_CMDLINE_FROM_DTB 31042024972eSJonas Gorski depends on USE_OF 31052024972eSJonas Gorski bool "Dtb kernel arguments if available" 31062024972eSJonas Gorski 31072024972eSJonas Gorski config MIPS_CMDLINE_DTB_EXTEND 31082024972eSJonas Gorski depends on USE_OF 31092024972eSJonas Gorski bool "Extend dtb kernel arguments with bootloader arguments" 31102024972eSJonas Gorski 31112024972eSJonas Gorski config MIPS_CMDLINE_FROM_BOOTLOADER 31122024972eSJonas Gorski bool "Bootloader kernel arguments if available" 3113ed47e153SRabin Vincent 3114ed47e153SRabin Vincent config MIPS_CMDLINE_BUILTIN_EXTEND 3115ed47e153SRabin Vincent depends on CMDLINE_BOOL 3116ed47e153SRabin Vincent bool "Extend builtin kernel arguments with bootloader arguments" 31172024972eSJonas Gorskiendchoice 31182024972eSJonas Gorski 31195e83d430SRalf Baechleendmenu 31205e83d430SRalf Baechle 31211df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 31221df0f0ffSAtsushi Nemoto bool 31231df0f0ffSAtsushi Nemoto default y 31241df0f0ffSAtsushi Nemoto 31251df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 31261df0f0ffSAtsushi Nemoto bool 31271df0f0ffSAtsushi Nemoto default y 31281df0f0ffSAtsushi Nemoto 3129a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 3130a728ab52SKirill A. Shutemov int 31313377e227SAlex Belits default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 3132a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 3133a728ab52SKirill A. Shutemov default 2 3134a728ab52SKirill A. Shutemov 31356c359eb1SPaul Burtonconfig MIPS_AUTO_PFN_OFFSET 31366c359eb1SPaul Burton bool 31376c359eb1SPaul Burton 31381da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 31391da177e4SLinus Torvalds 3140c5611df9SPaul Burtonconfig PCI_DRIVERS_GENERIC 31412eac9c2dSChristoph Hellwig select PCI_DOMAINS_GENERIC if PCI 3142c5611df9SPaul Burton bool 3143c5611df9SPaul Burton 3144c5611df9SPaul Burtonconfig PCI_DRIVERS_LEGACY 3145c5611df9SPaul Burton def_bool !PCI_DRIVERS_GENERIC 3146c5611df9SPaul Burton select NO_GENERIC_PCI_IOPORT_MAP 31472eac9c2dSChristoph Hellwig select PCI_DOMAINS if PCI 31481da177e4SLinus Torvalds 31491da177e4SLinus Torvalds# 31501da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 31511da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 31521da177e4SLinus Torvalds# users to choose the right thing ... 31531da177e4SLinus Torvalds# 31541da177e4SLinus Torvaldsconfig ISA 31551da177e4SLinus Torvalds bool 31561da177e4SLinus Torvalds 31571da177e4SLinus Torvaldsconfig TC 31581da177e4SLinus Torvalds bool "TURBOchannel support" 31591da177e4SLinus Torvalds depends on MACH_DECSTATION 31601da177e4SLinus Torvalds help 316150a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 316250a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 316350a23e6eSJustin P. Mattock at: 316450a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 316550a23e6eSJustin P. Mattock and: 316650a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 316750a23e6eSJustin P. Mattock Linux driver support status is documented at: 316850a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 31691da177e4SLinus Torvalds 31701da177e4SLinus Torvaldsconfig MMU 31711da177e4SLinus Torvalds bool 31721da177e4SLinus Torvalds default y 31731da177e4SLinus Torvalds 3174109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MIN 3175109c32ffSMatt Redfearn default 12 if 64BIT 3176109c32ffSMatt Redfearn default 8 3177109c32ffSMatt Redfearn 3178109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MAX 3179109c32ffSMatt Redfearn default 18 if 64BIT 3180109c32ffSMatt Redfearn default 15 3181109c32ffSMatt Redfearn 3182109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3183109c32ffSMatt Redfearn default 8 3184109c32ffSMatt Redfearn 3185109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3186109c32ffSMatt Redfearn default 15 3187109c32ffSMatt Redfearn 3188d865bea4SRalf Baechleconfig I8253 3189d865bea4SRalf Baechle bool 3190798778b8SRussell King select CLKSRC_I8253 31912d02612fSThomas Gleixner select CLKEVT_I8253 31929726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 3193d865bea4SRalf Baechle 3194e05eb3f8SRalf Baechleconfig ZONE_DMA 3195e05eb3f8SRalf Baechle bool 3196e05eb3f8SRalf Baechle 3197cce335aeSRalf Baechleconfig ZONE_DMA32 3198cce335aeSRalf Baechle bool 3199cce335aeSRalf Baechle 32001da177e4SLinus Torvaldsendmenu 32011da177e4SLinus Torvalds 32021da177e4SLinus Torvaldsconfig TRAD_SIGNALS 32031da177e4SLinus Torvalds bool 32041da177e4SLinus Torvalds 32051da177e4SLinus Torvaldsconfig MIPS32_COMPAT 320678aaf956SRalf Baechle bool 32071da177e4SLinus Torvalds 32081da177e4SLinus Torvaldsconfig COMPAT 32091da177e4SLinus Torvalds bool 32101da177e4SLinus Torvalds 321105e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 321205e43966SAtsushi Nemoto bool 321305e43966SAtsushi Nemoto 32141da177e4SLinus Torvaldsconfig MIPS32_O32 32151da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 321678aaf956SRalf Baechle depends on 64BIT 321778aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 321878aaf956SRalf Baechle select COMPAT 321978aaf956SRalf Baechle select MIPS32_COMPAT 322078aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 32211da177e4SLinus Torvalds help 32221da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 32231da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 32241da177e4SLinus Torvalds existing binaries are in this format. 32251da177e4SLinus Torvalds 32261da177e4SLinus Torvalds If unsure, say Y. 32271da177e4SLinus Torvalds 32281da177e4SLinus Torvaldsconfig MIPS32_N32 32291da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 3230c22eacfeSRalf Baechle depends on 64BIT 32315a9372f7SArnd Bergmann select ARCH_WANT_COMPAT_IPC_PARSE_VERSION 323278aaf956SRalf Baechle select COMPAT 323378aaf956SRalf Baechle select MIPS32_COMPAT 323478aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 32351da177e4SLinus Torvalds help 32361da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 32371da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 32381da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 32391da177e4SLinus Torvalds cases. 32401da177e4SLinus Torvalds 32411da177e4SLinus Torvalds If unsure, say N. 32421da177e4SLinus Torvalds 32431da177e4SLinus Torvaldsconfig BINFMT_ELF32 32441da177e4SLinus Torvalds bool 32451da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 3246f43edca7SRalf Baechle select ELFCORE 32471da177e4SLinus Torvalds 32482116245eSRalf Baechlemenu "Power management options" 3249952fa954SRodolfo Giometti 3250363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 3251363c55caSWu Zhangjin def_bool y 32523f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3253363c55caSWu Zhangjin 3254f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 3255f4cb5700SJohannes Berg def_bool y 32563f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3257f4cb5700SJohannes Berg 32582116245eSRalf Baechlesource "kernel/power/Kconfig" 3259952fa954SRodolfo Giometti 32601da177e4SLinus Torvaldsendmenu 32611da177e4SLinus Torvalds 32627a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 32637a998935SViresh Kumar bool 32647a998935SViresh Kumar 32657a998935SViresh Kumarmenu "CPU Power Management" 3266c095ebafSPaul Burton 3267c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 32687a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 32697a998935SViresh Kumarendif 32709726b43aSWu Zhangjin 3271c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 3272c095ebafSPaul Burton 3273c095ebafSPaul Burtonendmenu 3274c095ebafSPaul Burton 327598cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 327698cdee0eSRalf Baechle 32772235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 3278