11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 440e084a5SRalf Baechle select ARCH_SUPPORTS_UPROBES 5a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 6393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 75fac4f7aSPaul Burton select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 81ee3630aSRalf Baechle select ARCH_USE_BUILTIN_BSWAP 9c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 10f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 11ec7748b5SSam Ravnborg select HAVE_IDE 1242d4b839SMathieu Desnoyers select HAVE_OPROFILE 137f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 147f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1588547001SJason Wessel select HAVE_ARCH_KGDB 16490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 17c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 183f5fdb4bSMarkos Chandras select HAVE_BPF_JIT if !CPU_MICROMIPS 19d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 20538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 21538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2264575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2329c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 24c1bf207dSDavid Daney select HAVE_KPROBES 25c1bf207dSDavid Daney select HAVE_KRETPROBES 26fb59e394SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 27b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 281d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 292b68f6caSKees Cook select ARCH_HAS_ELF_RANDOMIZE 30383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 3130ad29bbSHuacai Chen select RTC_LIB if !MACH_LOONGSON64 322b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 337463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 34f4649382SZubair Lutfullah Kakakhel select HAVE_DMA_CONTIGUOUS 3548e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 363bd27e32SDavid Daney select GENERIC_IRQ_PROBE 37f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3878857614SMarkos Chandras select GENERIC_PCI_IOMAP 3994bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 40c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 410f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 429d15ffc8STejun Heo select HAVE_MEMBLOCK 439d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 449d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 45360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 464b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 47cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 48929de4ccSDeng-Cheng Zhu select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 49cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 50786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 514febd95aSStephen Rothwell select VIRT_TO_BUS 522f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 532f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5450150d2bSAl Viro select CLONE_BACKWARDS 55d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5619952a92SKees Cook select HAVE_CC_STACKPROTECTOR 57b1d4c6caSJames Hogan select CPU_PM if CPU_IDLE 58cc7964afSPaul Burton select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 5990cee759SPaul Burton select ARCH_BINFMT_ELF_STATE 60d79d853dSMarkos Chandras select SYSCTL_EXCEPTION_TRACE 61bb877e96SDeng-Cheng Zhu select HAVE_VIRT_CPU_ACCOUNTING_GEN 62ec9ddad3SDeng-Cheng Zhu select HAVE_IRQ_TIME_ACCOUNTING 63a7f4df4eSAlex Smith select GENERIC_TIME_VSYSCALL 64a7f4df4eSAlex Smith select ARCH_CLOCKSOURCE_DATA 651d2753a6SDavid Daney select HANDLE_DOMAIN_IRQ 661da177e4SLinus Torvalds 671da177e4SLinus Torvaldsmenu "Machine selection" 681da177e4SLinus Torvalds 695e83d430SRalf Baechlechoice 705e83d430SRalf Baechle prompt "System type" 715e83d430SRalf Baechle default SGI_IP22 721da177e4SLinus Torvalds 7342a4f17dSManuel Laussconfig MIPS_ALCHEMY 74c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 7534adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 76f772cdb2SRalf Baechle select CEVT_R4K 77d7ea335cSSteven J. Hill select CSRC_R4K 7867e38cf2SRalf Baechle select IRQ_MIPS_CPU 7988e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 8042a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 8142a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 8242a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 83efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 841b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 8547440229SManuel Lauss select COMMON_CLK 861da177e4SLinus Torvalds 877ca5dc14SFlorian Fainelliconfig AR7 887ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 897ca5dc14SFlorian Fainelli select BOOT_ELF32 907ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 917ca5dc14SFlorian Fainelli select CEVT_R4K 927ca5dc14SFlorian Fainelli select CSRC_R4K 9367e38cf2SRalf Baechle select IRQ_MIPS_CPU 947ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 957ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 967ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 977ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 987ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 997ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 100377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1011b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 1025f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 1037ca5dc14SFlorian Fainelli select VLYNQ 1048551fb64SYoichi Yuasa select HAVE_CLK 1057ca5dc14SFlorian Fainelli help 1067ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1077ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1087ca5dc14SFlorian Fainelli 10943cc739fSSergey Ryazanovconfig ATH25 11043cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 11143cc739fSSergey Ryazanov select CEVT_R4K 11243cc739fSSergey Ryazanov select CSRC_R4K 11343cc739fSSergey Ryazanov select DMA_NONCOHERENT 11467e38cf2SRalf Baechle select IRQ_MIPS_CPU 1151753e74eSSergey Ryazanov select IRQ_DOMAIN 11643cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 11743cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 11843cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1198aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 12043cc739fSSergey Ryazanov help 12143cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 12243cc739fSSergey Ryazanov 123d4a67d9dSGabor Juhosconfig ATH79 124d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 125ff591a91SAlban Bedel select ARCH_HAS_RESET_CONTROLLER 1266eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 127d4a67d9dSGabor Juhos select BOOT_RAW 128d4a67d9dSGabor Juhos select CEVT_R4K 129d4a67d9dSGabor Juhos select CSRC_R4K 130d4a67d9dSGabor Juhos select DMA_NONCOHERENT 13194638067SGabor Juhos select HAVE_CLK 132411520afSAlban Bedel select COMMON_CLK 1332c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 13467e38cf2SRalf Baechle select IRQ_MIPS_CPU 1350aabf1a4SGabor Juhos select MIPS_MACHINE 136d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 137d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 138d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 139d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 140377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 141b3f0a250SAlban Bedel select SYS_SUPPORTS_ZBOOT_UART_PROM 14203c8c407SAlban Bedel select USE_OF 143d4a67d9dSGabor Juhos help 144d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 145d4a67d9dSGabor Juhos 1465f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 1475f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 148d666cd02SKevin Cernekee select BOOT_RAW 149d666cd02SKevin Cernekee select NO_EXCEPT_FILL 150d666cd02SKevin Cernekee select USE_OF 151d666cd02SKevin Cernekee select CEVT_R4K 152d666cd02SKevin Cernekee select CSRC_R4K 153d666cd02SKevin Cernekee select SYNC_R4K 154d666cd02SKevin Cernekee select COMMON_CLK 155c7c42ec2SSimon Arlott select BCM6345_L1_IRQ 15660b858f2SKevin Cernekee select BCM7038_L1_IRQ 15760b858f2SKevin Cernekee select BCM7120_L2_IRQ 15860b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 15967e38cf2SRalf Baechle select IRQ_MIPS_CPU 16060b858f2SKevin Cernekee select DMA_NONCOHERENT 161d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 16260b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 163d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 164d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 16560b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 16660b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 16760b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 168d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 169d666cd02SKevin Cernekee select SWAP_IO_SPACE 17060b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 17160b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 17260b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 17360b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 174a7b43812SFlorian Fainelli select ARCH_WANT_OPTIONAL_GPIOLIB 175d666cd02SKevin Cernekee help 1765f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 1775f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 1785f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 1795f2d4459SKevin Cernekee must be set appropriately for your board. 180d666cd02SKevin Cernekee 1811c0c13ebSAurelien Jarnoconfig BCM47XX 182c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1832da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 184fe08f8c2SHauke Mehrtens select BOOT_RAW 18542f77542SRalf Baechle select CEVT_R4K 186940f6b48SRalf Baechle select CSRC_R4K 1871c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1881c0c13ebSAurelien Jarno select HW_HAS_PCI 18967e38cf2SRalf Baechle select IRQ_MIPS_CPU 190314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 191dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1921c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1931c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 194377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 19525e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 196e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 197c949c0bcSRafał Miłecki select GPIOLIB 198c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 199f6e734a8SRafał Miłecki select BCM47XX_NVRAM 2002ab71a02SRafał Miłecki select BCM47XX_SPROM 2011c0c13ebSAurelien Jarno help 2021c0c13ebSAurelien Jarno Support for BCM47XX based boards 2031c0c13ebSAurelien Jarno 204e7300d04SMaxime Bizonconfig BCM63XX 205e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 206ae8de61cSFlorian Fainelli select BOOT_RAW 207e7300d04SMaxime Bizon select CEVT_R4K 208e7300d04SMaxime Bizon select CSRC_R4K 209fc264022SJonas Gorski select SYNC_R4K 210e7300d04SMaxime Bizon select DMA_NONCOHERENT 21167e38cf2SRalf Baechle select IRQ_MIPS_CPU 212e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 213e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 214e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 215e7300d04SMaxime Bizon select SWAP_IO_SPACE 216e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 2173e82eeebSYoichi Yuasa select HAVE_CLK 218af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 219e7300d04SMaxime Bizon help 220e7300d04SMaxime Bizon Support for BCM63XX based boards 221e7300d04SMaxime Bizon 2221da177e4SLinus Torvaldsconfig MIPS_COBALT 2233fa986faSMartin Michlmayr bool "Cobalt Server" 22442f77542SRalf Baechle select CEVT_R4K 225940f6b48SRalf Baechle select CSRC_R4K 2261097c6acSYoichi Yuasa select CEVT_GT641XX 2271da177e4SLinus Torvalds select DMA_NONCOHERENT 2281da177e4SLinus Torvalds select HW_HAS_PCI 229d865bea4SRalf Baechle select I8253 2301da177e4SLinus Torvalds select I8259 23167e38cf2SRalf Baechle select IRQ_MIPS_CPU 232d5ab1a69SYoichi Yuasa select IRQ_GT641XX 233252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 234e25bfc92SYoichi Yuasa select PCI 2357cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 2360a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 237ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2380e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 2395e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 240e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 2411da177e4SLinus Torvalds 2421da177e4SLinus Torvaldsconfig MACH_DECSTATION 2433fa986faSMartin Michlmayr bool "DECstations" 2441da177e4SLinus Torvalds select BOOT_ELF32 2456457d9fcSYoichi Yuasa select CEVT_DS1287 24681d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 2474247417dSYoichi Yuasa select CSRC_IOASIC 24881d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 24920d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 25020d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 25120d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 2521da177e4SLinus Torvalds select DMA_NONCOHERENT 253ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 25467e38cf2SRalf Baechle select IRQ_MIPS_CPU 2557cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 2567cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 257ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2587d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2595e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 2601723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 2611723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 2621723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 263930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 2645e83d430SRalf Baechle help 2651da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 2661da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 2671da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 2681da177e4SLinus Torvalds 2691da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 2701da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 2711da177e4SLinus Torvalds 2721da177e4SLinus Torvalds DECstation 5000/50 2731da177e4SLinus Torvalds DECstation 5000/150 2741da177e4SLinus Torvalds DECstation 5000/260 2751da177e4SLinus Torvalds DECsystem 5900/260 2761da177e4SLinus Torvalds 2771da177e4SLinus Torvalds otherwise choose R3000. 2781da177e4SLinus Torvalds 2795e83d430SRalf Baechleconfig MACH_JAZZ 2803fa986faSMartin Michlmayr bool "Jazz family of machines" 2810e2794b0SRalf Baechle select FW_ARC 2820e2794b0SRalf Baechle select FW_ARC32 2835e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 28442f77542SRalf Baechle select CEVT_R4K 285940f6b48SRalf Baechle select CSRC_R4K 286e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2875e83d430SRalf Baechle select GENERIC_ISA_DMA 2888a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 28967e38cf2SRalf Baechle select IRQ_MIPS_CPU 290d865bea4SRalf Baechle select I8253 2915e83d430SRalf Baechle select I8259 2925e83d430SRalf Baechle select ISA 2937cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2945e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2957d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2961723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2971da177e4SLinus Torvalds help 2985e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2995e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 300692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 3015e83d430SRalf Baechle Olivetti M700-10 workstations. 3025e83d430SRalf Baechle 303de361e8bSPaul Burtonconfig MACH_INGENIC 304de361e8bSPaul Burton bool "Ingenic SoC based machines" 3055ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 3065ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 307f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 3085ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 30967e38cf2SRalf Baechle select IRQ_MIPS_CPU 3105ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 311ff1930c6SPaul Burton select COMMON_CLK 31283bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 313ffb1843dSPaul Burton select BUILTIN_DTB 314ffb1843dSPaul Burton select USE_OF 3156ec127fbSPaul Burton select LIBFDT 3165ebabe59SLars-Peter Clausen 317171bb2f1SJohn Crispinconfig LANTIQ 318171bb2f1SJohn Crispin bool "Lantiq based platforms" 319171bb2f1SJohn Crispin select DMA_NONCOHERENT 32067e38cf2SRalf Baechle select IRQ_MIPS_CPU 321171bb2f1SJohn Crispin select CEVT_R4K 322171bb2f1SJohn Crispin select CSRC_R4K 323171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 324171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 325171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 326171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 327377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 328171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 329171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 330171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 331171bb2f1SJohn Crispin select SWAP_IO_SPACE 332171bb2f1SJohn Crispin select BOOT_RAW 333287e3f3fSJohn Crispin select CLKDEV_LOOKUP 334a0392222SJohn Crispin select USE_OF 3353f8c50c9SJohn Crispin select PINCTRL 3363f8c50c9SJohn Crispin select PINCTRL_LANTIQ 337c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 338c530781cSJohn Crispin select RESET_CONTROLLER 339171bb2f1SJohn Crispin 3401f21d2bdSBrian Murphyconfig LASAT 3411f21d2bdSBrian Murphy bool "LASAT Networks platforms" 34242f77542SRalf Baechle select CEVT_R4K 34316f0bbbcSRalf Baechle select CRC32 344940f6b48SRalf Baechle select CSRC_R4K 3451f21d2bdSBrian Murphy select DMA_NONCOHERENT 3461f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 3471f21d2bdSBrian Murphy select HW_HAS_PCI 34867e38cf2SRalf Baechle select IRQ_MIPS_CPU 3491f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 3501f21d2bdSBrian Murphy select MIPS_NILE4 3511f21d2bdSBrian Murphy select R5000_CPU_SCACHE 3521f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 3531f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 3541f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 3551f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 3561f21d2bdSBrian Murphy 35730ad29bbSHuacai Chenconfig MACH_LOONGSON32 35830ad29bbSHuacai Chen bool "Loongson-1 family of machines" 359c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 360ade299d8SYoichi Yuasa help 36130ad29bbSHuacai Chen This enables support for the Loongson-1 family of machines. 36285749d24SWu Zhangjin 36330ad29bbSHuacai Chen Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 36430ad29bbSHuacai Chen the Institute of Computing Technology (ICT), Chinese Academy of 36530ad29bbSHuacai Chen Sciences (CAS). 366ade299d8SYoichi Yuasa 36730ad29bbSHuacai Chenconfig MACH_LOONGSON64 36830ad29bbSHuacai Chen bool "Loongson-2/3 family of machines" 369ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 370ca585cf9SKelvin Cheung help 37130ad29bbSHuacai Chen This enables the support of Loongson-2/3 family of machines. 372ca585cf9SKelvin Cheung 37330ad29bbSHuacai Chen Loongson-2 is a family of single-core CPUs and Loongson-3 is a 37430ad29bbSHuacai Chen family of multi-core CPUs. They are both 64-bit general-purpose 37530ad29bbSHuacai Chen MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute 37630ad29bbSHuacai Chen of Computing Technology (ICT), Chinese Academy of Sciences (CAS) 37730ad29bbSHuacai Chen in the People's Republic of China. The chief architect is Professor 37830ad29bbSHuacai Chen Weiwu Hu. 379ca585cf9SKelvin Cheung 3806a438309SAndrew Brestickerconfig MACH_PISTACHIO 3816a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 3826a438309SAndrew Bresticker select ARCH_REQUIRE_GPIOLIB 3836a438309SAndrew Bresticker select BOOT_ELF32 3846a438309SAndrew Bresticker select BOOT_RAW 3856a438309SAndrew Bresticker select CEVT_R4K 3866a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 3876a438309SAndrew Bresticker select COMMON_CLK 3886a438309SAndrew Bresticker select CSRC_R4K 3896a438309SAndrew Bresticker select DMA_MAYBE_COHERENT 39067e38cf2SRalf Baechle select IRQ_MIPS_CPU 3916a438309SAndrew Bresticker select LIBFDT 3926a438309SAndrew Bresticker select MFD_SYSCON 3936a438309SAndrew Bresticker select MIPS_CPU_SCACHE 3946a438309SAndrew Bresticker select MIPS_GIC 3956a438309SAndrew Bresticker select PINCTRL 3966a438309SAndrew Bresticker select REGULATOR 3976a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 3986a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 3996a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 4006a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 4016a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 4026a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 403018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 404018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 4056a438309SAndrew Bresticker select USE_OF 4066a438309SAndrew Bresticker help 4076a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 4086a438309SAndrew Bresticker 4099937f5ffSZubair Lutfullah Kakakhelconfig MACH_XILFPGA 4109937f5ffSZubair Lutfullah Kakakhel bool "MIPSfpga Xilinx based boards" 4119937f5ffSZubair Lutfullah Kakakhel select ARCH_REQUIRE_GPIOLIB 4129937f5ffSZubair Lutfullah Kakakhel select BOOT_ELF32 4139937f5ffSZubair Lutfullah Kakakhel select BOOT_RAW 4149937f5ffSZubair Lutfullah Kakakhel select BUILTIN_DTB 4159937f5ffSZubair Lutfullah Kakakhel select CEVT_R4K 4169937f5ffSZubair Lutfullah Kakakhel select COMMON_CLK 4179937f5ffSZubair Lutfullah Kakakhel select CSRC_R4K 4189937f5ffSZubair Lutfullah Kakakhel select IRQ_MIPS_CPU 4199937f5ffSZubair Lutfullah Kakakhel select LIBFDT 4209937f5ffSZubair Lutfullah Kakakhel select MIPS_CPU_SCACHE 4219937f5ffSZubair Lutfullah Kakakhel select SYS_HAS_EARLY_PRINTK 4229937f5ffSZubair Lutfullah Kakakhel select SYS_HAS_CPU_MIPS32_R2 4239937f5ffSZubair Lutfullah Kakakhel select SYS_SUPPORTS_32BIT_KERNEL 4249937f5ffSZubair Lutfullah Kakakhel select SYS_SUPPORTS_LITTLE_ENDIAN 4259937f5ffSZubair Lutfullah Kakakhel select SYS_SUPPORTS_ZBOOT_UART16550 4269937f5ffSZubair Lutfullah Kakakhel select USE_OF 4279937f5ffSZubair Lutfullah Kakakhel select USE_GENERIC_EARLY_PRINTK_8250 4289937f5ffSZubair Lutfullah Kakakhel help 4299937f5ffSZubair Lutfullah Kakakhel This enables support for the IMG University Program MIPSfpga platform. 4309937f5ffSZubair Lutfullah Kakakhel 4311da177e4SLinus Torvaldsconfig MIPS_MALTA 4323fa986faSMartin Michlmayr bool "MIPS Malta board" 43361ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 4341da177e4SLinus Torvalds select BOOT_ELF32 435fa71c960SRalf Baechle select BOOT_RAW 436e8823d26SPaul Burton select BUILTIN_DTB 43742f77542SRalf Baechle select CEVT_R4K 438940f6b48SRalf Baechle select CSRC_R4K 439fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 44042b002abSGuenter Roeck select COMMON_CLK 441885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 4421da177e4SLinus Torvalds select GENERIC_ISA_DMA 4438a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 44467e38cf2SRalf Baechle select IRQ_MIPS_CPU 4458a19b8f1SAndrew Bresticker select MIPS_GIC 4461da177e4SLinus Torvalds select HW_HAS_PCI 447d865bea4SRalf Baechle select I8253 4481da177e4SLinus Torvalds select I8259 4495e83d430SRalf Baechle select MIPS_BONITO64 4509318c51aSChris Dearman select MIPS_CPU_SCACHE 451a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 452252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 4535e83d430SRalf Baechle select MIPS_MSC 454ecafe3e9SPaul Burton select SMP_UP if SMP 4551da177e4SLinus Torvalds select SWAP_IO_SPACE 4567cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 4577cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 458bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 459c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 460575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 4617cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 4625d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 463575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 4647cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 4657cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 466ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 467ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4685e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 469c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 4705e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 471424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 4720365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 473e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 474377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 475f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 4769693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 4771b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 4788c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 479e8823d26SPaul Burton select USE_OF 480abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 481e81a8c7dSPaul Burton select BUILTIN_DTB 482e81a8c7dSPaul Burton select LIBFDT 4831da177e4SLinus Torvalds help 484f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 4851da177e4SLinus Torvalds board. 4861da177e4SLinus Torvalds 4872572f00dSJoshua Hendersonconfig MACH_PIC32 4882572f00dSJoshua Henderson bool "Microchip PIC32 Family" 4892572f00dSJoshua Henderson help 4902572f00dSJoshua Henderson This enables support for the Microchip PIC32 family of platforms. 4912572f00dSJoshua Henderson 4922572f00dSJoshua Henderson Microchip PIC32 is a family of general-purpose 32 bit MIPS core 4932572f00dSJoshua Henderson microcontrollers. 4942572f00dSJoshua Henderson 495ec47b274SSteven J. Hillconfig MIPS_SEAD3 496ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 497ec47b274SSteven J. Hill select BOOT_ELF32 498ec47b274SSteven J. Hill select BOOT_RAW 499f262b5f2SAndrew Bresticker select BUILTIN_DTB 500ec47b274SSteven J. Hill select CEVT_R4K 501ec47b274SSteven J. Hill select CSRC_R4K 502fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 50342b002abSGuenter Roeck select COMMON_CLK 504ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 505ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 506ec47b274SSteven J. Hill select DMA_NONCOHERENT 50767e38cf2SRalf Baechle select IRQ_MIPS_CPU 5088a19b8f1SAndrew Bresticker select MIPS_GIC 50944327236SQais Yousef select LIBFDT 510ec47b274SSteven J. Hill select MIPS_MSC 511ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 512ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 513d4594b27SPaul Burton select SYS_HAS_CPU_MIPS32_R6 514ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 515ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 516ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 517ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 518ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 519ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 520ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 521a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 522377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 5238c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 524ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 525ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 5269b731009SSteven J. Hill select USE_OF 527ec47b274SSteven J. Hill help 528ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 529ec47b274SSteven J. Hill board. 530ec47b274SSteven J. Hill 531a83860c2SRalf Baechleconfig NEC_MARKEINS 532a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 533a83860c2SRalf Baechle select SOC_EMMA2RH 534a83860c2SRalf Baechle select HW_HAS_PCI 535a83860c2SRalf Baechle help 536a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 537ade299d8SYoichi Yuasa 5385e83d430SRalf Baechleconfig MACH_VR41XX 53974142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 54042f77542SRalf Baechle select CEVT_R4K 541940f6b48SRalf Baechle select CSRC_R4K 5427cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 543377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 54427fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 5455e83d430SRalf Baechle 546edb6310aSDaniel Lairdconfig NXP_STB220 547edb6310aSDaniel Laird bool "NXP STB220 board" 548edb6310aSDaniel Laird select SOC_PNX833X 549edb6310aSDaniel Laird help 550edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 551edb6310aSDaniel Laird 552edb6310aSDaniel Lairdconfig NXP_STB225 553edb6310aSDaniel Laird bool "NXP 225 board" 554edb6310aSDaniel Laird select SOC_PNX833X 555edb6310aSDaniel Laird select SOC_PNX8335 556edb6310aSDaniel Laird help 557edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 558edb6310aSDaniel Laird 5599267a30dSMarc St-Jeanconfig PMC_MSP 5609267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 56139d30c13SAnoop P A select CEVT_R4K 56239d30c13SAnoop P A select CSRC_R4K 5639267a30dSMarc St-Jean select DMA_NONCOHERENT 5649267a30dSMarc St-Jean select SWAP_IO_SPACE 5659267a30dSMarc St-Jean select NO_EXCEPT_FILL 5669267a30dSMarc St-Jean select BOOT_RAW 5679267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 5689267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 5699267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 5709267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 571377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 57267e38cf2SRalf Baechle select IRQ_MIPS_CPU 5739267a30dSMarc St-Jean select SERIAL_8250 5749267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 5759296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 5769296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 5779267a30dSMarc St-Jean help 5789267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 5799267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 5809267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 5819267a30dSMarc St-Jean a variety of MIPS cores. 5829267a30dSMarc St-Jean 583ae2b5bb6SJohn Crispinconfig RALINK 584ae2b5bb6SJohn Crispin bool "Ralink based machines" 585ae2b5bb6SJohn Crispin select CEVT_R4K 586ae2b5bb6SJohn Crispin select CSRC_R4K 587ae2b5bb6SJohn Crispin select BOOT_RAW 588ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 58967e38cf2SRalf Baechle select IRQ_MIPS_CPU 590ae2b5bb6SJohn Crispin select USE_OF 591ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 592ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 593ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 594ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 595377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 596ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 597ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 5982a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 5992a153f1cSJohn Crispin select RESET_CONTROLLER 600ae2b5bb6SJohn Crispin 6011da177e4SLinus Torvaldsconfig SGI_IP22 6023fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 6030e2794b0SRalf Baechle select FW_ARC 6040e2794b0SRalf Baechle select FW_ARC32 6051da177e4SLinus Torvalds select BOOT_ELF32 60642f77542SRalf Baechle select CEVT_R4K 607940f6b48SRalf Baechle select CSRC_R4K 608e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 6091da177e4SLinus Torvalds select DMA_NONCOHERENT 6105e83d430SRalf Baechle select HW_HAS_EISA 611d865bea4SRalf Baechle select I8253 61268de4803SThomas Bogendoerfer select I8259 6131da177e4SLinus Torvalds select IP22_CPU_SCACHE 61467e38cf2SRalf Baechle select IRQ_MIPS_CPU 615aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 616e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 617e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 61836e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 619e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 620e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 621e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 6221da177e4SLinus Torvalds select SWAP_IO_SPACE 6237cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6247cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6252b5e63f6SMartin Michlmayr # 6262b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6272b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6282b5e63f6SMartin Michlmayr # 6292b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6302b5e63f6SMartin Michlmayr # for a more details discussion 6312b5e63f6SMartin Michlmayr # 6322b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 633ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 634ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6355e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 636930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6371da177e4SLinus Torvalds help 6381da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 6391da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 6401da177e4SLinus Torvalds that runs on these, say Y here. 6411da177e4SLinus Torvalds 6421da177e4SLinus Torvaldsconfig SGI_IP27 6433fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 6440e2794b0SRalf Baechle select FW_ARC 6450e2794b0SRalf Baechle select FW_ARC64 6465e83d430SRalf Baechle select BOOT_ELF64 647e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 648634286f1SRalf Baechle select DMA_COHERENT 64936a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 6501da177e4SLinus Torvalds select HW_HAS_PCI 651130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 6527cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 653ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6545e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 655d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 6561a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 657930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6581da177e4SLinus Torvalds help 6591da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 6601da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 6611da177e4SLinus Torvalds here. 6621da177e4SLinus Torvalds 663e2defae5SThomas Bogendoerferconfig SGI_IP28 6647d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 6650e2794b0SRalf Baechle select FW_ARC 6660e2794b0SRalf Baechle select FW_ARC64 667e2defae5SThomas Bogendoerfer select BOOT_ELF64 668e2defae5SThomas Bogendoerfer select CEVT_R4K 669e2defae5SThomas Bogendoerfer select CSRC_R4K 670e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 671e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 672e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 67367e38cf2SRalf Baechle select IRQ_MIPS_CPU 674e2defae5SThomas Bogendoerfer select HW_HAS_EISA 675e2defae5SThomas Bogendoerfer select I8253 676e2defae5SThomas Bogendoerfer select I8259 677e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 678e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 6795b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 680e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 681e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 682e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 683e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 684e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 6852b5e63f6SMartin Michlmayr # 6862b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6872b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6882b5e63f6SMartin Michlmayr # 6892b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6902b5e63f6SMartin Michlmayr # for a more details discussion 6912b5e63f6SMartin Michlmayr # 6922b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 693e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 694e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 695dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 696e2defae5SThomas Bogendoerfer help 697e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 698e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 699e2defae5SThomas Bogendoerfer 7001da177e4SLinus Torvaldsconfig SGI_IP32 701cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 7020e2794b0SRalf Baechle select FW_ARC 7030e2794b0SRalf Baechle select FW_ARC32 7041da177e4SLinus Torvalds select BOOT_ELF32 70542f77542SRalf Baechle select CEVT_R4K 706940f6b48SRalf Baechle select CSRC_R4K 7071da177e4SLinus Torvalds select DMA_NONCOHERENT 7081da177e4SLinus Torvalds select HW_HAS_PCI 70967e38cf2SRalf Baechle select IRQ_MIPS_CPU 7101da177e4SLinus Torvalds select R5000_CPU_SCACHE 7111da177e4SLinus Torvalds select RM7000_CPU_SCACHE 7127cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 7137cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 7147cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 715dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 716ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 7175e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7181da177e4SLinus Torvalds help 7191da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 7201da177e4SLinus Torvalds 721ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 722ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 7235e83d430SRalf Baechle select BOOT_ELF32 7245e83d430SRalf Baechle select DMA_COHERENT 7255e83d430SRalf Baechle select SIBYTE_BCM1120 7265e83d430SRalf Baechle select SWAP_IO_SPACE 7277cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7285e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7295e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7305e83d430SRalf Baechle 731ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 732ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 7335e83d430SRalf Baechle select BOOT_ELF32 7345e83d430SRalf Baechle select DMA_COHERENT 7355e83d430SRalf Baechle select SIBYTE_BCM1120 7365e83d430SRalf Baechle select SWAP_IO_SPACE 7377cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7385e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7395e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7405e83d430SRalf Baechle 7415e83d430SRalf Baechleconfig SIBYTE_CRHONE 7423fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 7435e83d430SRalf Baechle select BOOT_ELF32 7445e83d430SRalf Baechle select DMA_COHERENT 7455e83d430SRalf Baechle select SIBYTE_BCM1125 7465e83d430SRalf Baechle select SWAP_IO_SPACE 7477cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7485e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7495e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7505e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7515e83d430SRalf Baechle 752ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 753ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 754ade299d8SYoichi Yuasa select BOOT_ELF32 755ade299d8SYoichi Yuasa select DMA_COHERENT 756ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 757ade299d8SYoichi Yuasa select SWAP_IO_SPACE 758ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 759ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 760ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 761ade299d8SYoichi Yuasa 762ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 763ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 764ade299d8SYoichi Yuasa select BOOT_ELF32 765ade299d8SYoichi Yuasa select DMA_COHERENT 766fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 767ade299d8SYoichi Yuasa select SIBYTE_SB1250 768ade299d8SYoichi Yuasa select SWAP_IO_SPACE 769ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 770ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 771ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 772ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 773cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 774ade299d8SYoichi Yuasa 775ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 776ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 777ade299d8SYoichi Yuasa select BOOT_ELF32 778ade299d8SYoichi Yuasa select DMA_COHERENT 779fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 780ade299d8SYoichi Yuasa select SIBYTE_SB1250 781ade299d8SYoichi Yuasa select SWAP_IO_SPACE 782ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 783ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 784ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 785ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 786ade299d8SYoichi Yuasa 787ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 788ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 789ade299d8SYoichi Yuasa select BOOT_ELF32 790ade299d8SYoichi Yuasa select DMA_COHERENT 791ade299d8SYoichi Yuasa select SIBYTE_SB1250 792ade299d8SYoichi Yuasa select SWAP_IO_SPACE 793ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 794ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 795ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 796ade299d8SYoichi Yuasa 797ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 798ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 799ade299d8SYoichi Yuasa select BOOT_ELF32 800ade299d8SYoichi Yuasa select DMA_COHERENT 801ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 802ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 803ade299d8SYoichi Yuasa select SWAP_IO_SPACE 804ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 805ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 806651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 807ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 808cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 809ade299d8SYoichi Yuasa 81014b36af4SThomas Bogendoerferconfig SNI_RM 81114b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 8120e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 8130e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 814aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 8155e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 8165e83d430SRalf Baechle select BOOT_ELF32 81742f77542SRalf Baechle select CEVT_R4K 818940f6b48SRalf Baechle select CSRC_R4K 819e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 8205e83d430SRalf Baechle select DMA_NONCOHERENT 8215e83d430SRalf Baechle select GENERIC_ISA_DMA 8228a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 8235e83d430SRalf Baechle select HW_HAS_EISA 8245e83d430SRalf Baechle select HW_HAS_PCI 82567e38cf2SRalf Baechle select IRQ_MIPS_CPU 826d865bea4SRalf Baechle select I8253 8275e83d430SRalf Baechle select I8259 8285e83d430SRalf Baechle select ISA 8294a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 8307cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 8314a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 832c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 8334a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 83436a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 835ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 8367d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 8374a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 8385e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 8395e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8401da177e4SLinus Torvalds help 84114b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 84214b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 8435e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 8445e83d430SRalf Baechle support this machine type. 8451da177e4SLinus Torvalds 846edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 847edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 8485e83d430SRalf Baechle 849edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 850edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 85123fbee9dSRalf Baechle 85273b4390fSRalf Baechleconfig MIKROTIK_RB532 85373b4390fSRalf Baechle bool "Mikrotik RB532 boards" 85473b4390fSRalf Baechle select CEVT_R4K 85573b4390fSRalf Baechle select CSRC_R4K 85673b4390fSRalf Baechle select DMA_NONCOHERENT 85773b4390fSRalf Baechle select HW_HAS_PCI 85867e38cf2SRalf Baechle select IRQ_MIPS_CPU 85973b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 86073b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 86173b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 86273b4390fSRalf Baechle select SWAP_IO_SPACE 86373b4390fSRalf Baechle select BOOT_RAW 864d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 865930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 86673b4390fSRalf Baechle help 86773b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 86873b4390fSRalf Baechle based on the IDT RC32434 SoC. 86973b4390fSRalf Baechle 8709ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 8719ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 872a86c7f72SDavid Daney select CEVT_R4K 87334adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 874a86c7f72SDavid Daney select DMA_COHERENT 875a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 876a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 877f65aad41SRalf Baechle select EDAC_SUPPORT 878b01aec9bSBorislav Petkov select EDAC_ATOMIC_SCRUB 87973569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 88073569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 881a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 8825e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 883a86c7f72SDavid Daney select SWAP_IO_SPACE 884e8635b48SDavid Daney select HW_HAS_PCI 885f00e001eSDavid Daney select ZONE_DMA32 886465aaed0SDavid Daney select HOLES_IN_ZONE 88799cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 8886e511163SDavid Daney select LIBFDT 8896e511163SDavid Daney select USE_OF 8906e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 8916e511163SDavid Daney select SYS_SUPPORTS_SMP 8926e511163SDavid Daney select NR_CPUS_DEFAULT_16 893e326479fSAndrew Bresticker select BUILTIN_DTB 8948c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 895a86c7f72SDavid Daney help 896a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 897a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 898a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 899a86c7f72SDavid Daney Some of the supported boards are: 900a86c7f72SDavid Daney EBT3000 901a86c7f72SDavid Daney EBH3000 902a86c7f72SDavid Daney EBH3100 903a86c7f72SDavid Daney Thunder 904a86c7f72SDavid Daney Kodama 905a86c7f72SDavid Daney Hikari 906a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 907a86c7f72SDavid Daney 9087f058e85SJayachandran Cconfig NLM_XLR_BOARD 9097f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 9107f058e85SJayachandran C select BOOT_ELF32 9117f058e85SJayachandran C select NLM_COMMON 9127f058e85SJayachandran C select SYS_HAS_CPU_XLR 9137f058e85SJayachandran C select SYS_SUPPORTS_SMP 9147f058e85SJayachandran C select HW_HAS_PCI 9157f058e85SJayachandran C select SWAP_IO_SPACE 9167f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9177f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 91834adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 9197f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9207f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 9217f058e85SJayachandran C select DMA_COHERENT 9227f058e85SJayachandran C select NR_CPUS_DEFAULT_32 9237f058e85SJayachandran C select CEVT_R4K 9247f058e85SJayachandran C select CSRC_R4K 92567e38cf2SRalf Baechle select IRQ_MIPS_CPU 926b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9277f058e85SJayachandran C select SYNC_R4K 9287f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 9298f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9308f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9317f058e85SJayachandran C help 9327f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 9337f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 9347f058e85SJayachandran C 9351c773ea4SJayachandran Cconfig NLM_XLP_BOARD 9361c773ea4SJayachandran C bool "Netlogic XLP based systems" 9371c773ea4SJayachandran C select BOOT_ELF32 9381c773ea4SJayachandran C select NLM_COMMON 9391c773ea4SJayachandran C select SYS_HAS_CPU_XLP 9401c773ea4SJayachandran C select SYS_SUPPORTS_SMP 9411c773ea4SJayachandran C select HW_HAS_PCI 9421c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9431c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 94434adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 945079e3160SKamlakant Patel select ARCH_REQUIRE_GPIOLIB 9461c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9471c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 9481c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 9491c773ea4SJayachandran C select DMA_COHERENT 9501c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 9511c773ea4SJayachandran C select CEVT_R4K 9521c773ea4SJayachandran C select CSRC_R4K 95367e38cf2SRalf Baechle select IRQ_MIPS_CPU 954b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9551c773ea4SJayachandran C select SYNC_R4K 9561c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 9572f6528e1SJayachandran C select USE_OF 9588f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9598f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9601c773ea4SJayachandran C help 9611c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 9621c773ea4SJayachandran C Say Y here if you have a XLP based board. 9631c773ea4SJayachandran C 9649bc463beSDavid Daneyconfig MIPS_PARAVIRT 9659bc463beSDavid Daney bool "Para-Virtualized guest system" 9669bc463beSDavid Daney select CEVT_R4K 9679bc463beSDavid Daney select CSRC_R4K 9689bc463beSDavid Daney select DMA_COHERENT 9699bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 9709bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 9719bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 9729bc463beSDavid Daney select SYS_SUPPORTS_SMP 9739bc463beSDavid Daney select NR_CPUS_DEFAULT_4 9749bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 9759bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 9769bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 9779bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 9789bc463beSDavid Daney select HW_HAS_PCI 9799bc463beSDavid Daney select SWAP_IO_SPACE 9809bc463beSDavid Daney help 9819bc463beSDavid Daney This option supports guest running under ???? 9829bc463beSDavid Daney 9831da177e4SLinus Torvaldsendchoice 9841da177e4SLinus Torvalds 985e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 9863b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 987d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 988a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 989e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 9908945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 9915e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 9925ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 9938ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 9941f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 9952572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig" 996af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig" 9970f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 998ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 99929c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 100038b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 100122b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 10025e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 1003a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 100430ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig" 100530ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig" 10067f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 1007ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 10089937f5ffSZubair Lutfullah Kakakhelsource "arch/mips/xilfpga/Kconfig" 100938b18f72SRalf Baechle 10105e83d430SRalf Baechleendmenu 10115e83d430SRalf Baechle 10121da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 10131da177e4SLinus Torvalds bool 10141da177e4SLinus Torvalds default y 10151da177e4SLinus Torvalds 10161da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 10171da177e4SLinus Torvalds bool 10181da177e4SLinus Torvalds 1019f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 1020f0d1b0b3SDavid Howells bool 1021f0d1b0b3SDavid Howells default n 1022f0d1b0b3SDavid Howells 1023f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 1024f0d1b0b3SDavid Howells bool 1025f0d1b0b3SDavid Howells default n 1026f0d1b0b3SDavid Howells 10273c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 10283c9ee7efSAkinobu Mita bool 10293c9ee7efSAkinobu Mita default y 10303c9ee7efSAkinobu Mita 10311da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 10321da177e4SLinus Torvalds bool 10331da177e4SLinus Torvalds default y 10341da177e4SLinus Torvalds 1035ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 10361cc89038SAtsushi Nemoto bool 10371cc89038SAtsushi Nemoto default y 10381cc89038SAtsushi Nemoto 10391da177e4SLinus Torvalds# 10401da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 10411da177e4SLinus Torvalds# 10420e2794b0SRalf Baechleconfig FW_ARC 10431da177e4SLinus Torvalds bool 10441da177e4SLinus Torvalds 104561ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 104661ed242dSRalf Baechle bool 104761ed242dSRalf Baechle 10489267a30dSMarc St-Jeanconfig BOOT_RAW 10499267a30dSMarc St-Jean bool 10509267a30dSMarc St-Jean 1051217dd11eSRalf Baechleconfig CEVT_BCM1480 1052217dd11eSRalf Baechle bool 1053217dd11eSRalf Baechle 10546457d9fcSYoichi Yuasaconfig CEVT_DS1287 10556457d9fcSYoichi Yuasa bool 10566457d9fcSYoichi Yuasa 10571097c6acSYoichi Yuasaconfig CEVT_GT641XX 10581097c6acSYoichi Yuasa bool 10591097c6acSYoichi Yuasa 106042f77542SRalf Baechleconfig CEVT_R4K 106142f77542SRalf Baechle bool 106242f77542SRalf Baechle 1063217dd11eSRalf Baechleconfig CEVT_SB1250 1064217dd11eSRalf Baechle bool 1065217dd11eSRalf Baechle 1066229f773eSAtsushi Nemotoconfig CEVT_TXX9 1067229f773eSAtsushi Nemoto bool 1068229f773eSAtsushi Nemoto 1069217dd11eSRalf Baechleconfig CSRC_BCM1480 1070217dd11eSRalf Baechle bool 1071217dd11eSRalf Baechle 10724247417dSYoichi Yuasaconfig CSRC_IOASIC 10734247417dSYoichi Yuasa bool 10744247417dSYoichi Yuasa 1075940f6b48SRalf Baechleconfig CSRC_R4K 1076940f6b48SRalf Baechle bool 1077940f6b48SRalf Baechle 1078217dd11eSRalf Baechleconfig CSRC_SB1250 1079217dd11eSRalf Baechle bool 1080217dd11eSRalf Baechle 1081a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL 1082a7f4df4eSAlex Smith def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1083a7f4df4eSAlex Smith 1084a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 10857444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 1086a9aec7feSAtsushi Nemoto bool 1087a9aec7feSAtsushi Nemoto 10880e2794b0SRalf Baechleconfig FW_CFE 1089df78b5c8SAurelien Jarno bool 1090df78b5c8SAurelien Jarno 10914bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 109234adb28dSRalf Baechle def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 10934bafad92SFUJITA Tomonori 109440e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES 109540e084a5SRalf Baechle bool 109640e084a5SRalf Baechle 1097885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1098885014bcSFelix Fietkau select DMA_NONCOHERENT 1099885014bcSFelix Fietkau bool 1100885014bcSFelix Fietkau 11011da177e4SLinus Torvaldsconfig DMA_COHERENT 11021da177e4SLinus Torvalds bool 11031da177e4SLinus Torvalds 11041da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 11051da177e4SLinus Torvalds bool 1106e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 11074ce588cdSRalf Baechle 1108e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 11094ce588cdSRalf Baechle bool 11101da177e4SLinus Torvalds 111136a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 11121da177e4SLinus Torvalds bool 11131da177e4SLinus Torvalds 1114dbb74540SRalf Baechleconfig HOTPLUG_CPU 11151b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 111640b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 11171b2bc75cSRalf Baechle help 11181b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 11191b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 11201b2bc75cSRalf Baechle (Note: power management support will enable this option 11211b2bc75cSRalf Baechle automatically on SMP systems. ) 11221b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 11231b2bc75cSRalf Baechle 11241b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1125dbb74540SRalf Baechle bool 1126dbb74540SRalf Baechle 11271da177e4SLinus Torvaldsconfig MIPS_BONITO64 11281da177e4SLinus Torvalds bool 11291da177e4SLinus Torvalds 11301da177e4SLinus Torvaldsconfig MIPS_MSC 11311da177e4SLinus Torvalds bool 11321da177e4SLinus Torvalds 11331f21d2bdSBrian Murphyconfig MIPS_NILE4 11341f21d2bdSBrian Murphy bool 11351f21d2bdSBrian Murphy 113639b8d525SRalf Baechleconfig SYNC_R4K 113739b8d525SRalf Baechle bool 113839b8d525SRalf Baechle 1139487d70d0SGabor Juhosconfig MIPS_MACHINE 1140487d70d0SGabor Juhos def_bool n 1141487d70d0SGabor Juhos 1142ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1143d388d685SMaciej W. Rozycki def_bool n 1144d388d685SMaciej W. Rozycki 11454e0748f5SMarkos Chandrasconfig GENERIC_CSUM 11464e0748f5SMarkos Chandras bool 11474e0748f5SMarkos Chandras 11488313da30SRalf Baechleconfig GENERIC_ISA_DMA 11498313da30SRalf Baechle bool 11508313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1151a35bee8aSNamhyung Kim select ISA_DMA_API 11528313da30SRalf Baechle 1153aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1154aa414dffSRalf Baechle bool 11558313da30SRalf Baechle select GENERIC_ISA_DMA 1156aa414dffSRalf Baechle 1157a35bee8aSNamhyung Kimconfig ISA_DMA_API 1158a35bee8aSNamhyung Kim bool 1159a35bee8aSNamhyung Kim 1160465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1161465aaed0SDavid Daney bool 1162465aaed0SDavid Daney 11638c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE 11648c530ea3SMatt Redfearn bool 11658c530ea3SMatt Redfearn help 11668c530ea3SMatt Redfearn Selected if the platform supports relocating the kernel. 11678c530ea3SMatt Redfearn The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF 11688c530ea3SMatt Redfearn to allow access to command line and entropy sources. 11698c530ea3SMatt Redfearn 11705e83d430SRalf Baechle# 11716b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 11725e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 11735e83d430SRalf Baechle# choice statement should be more obvious to the user. 11745e83d430SRalf Baechle# 11755e83d430SRalf Baechlechoice 11766b2aac42SMasanari Iida prompt "Endianness selection" 11771da177e4SLinus Torvalds help 11781da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 11795e83d430SRalf Baechle byte order. These modes require different kernels and a different 11803cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 11815e83d430SRalf Baechle particular system but some systems are just as commonly used in the 11823dde6ad8SDavid Sterba one or the other endianness. 11835e83d430SRalf Baechle 11845e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 11855e83d430SRalf Baechle bool "Big endian" 11865e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 11875e83d430SRalf Baechle 11885e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 11895e83d430SRalf Baechle bool "Little endian" 11905e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 11915e83d430SRalf Baechle 11925e83d430SRalf Baechleendchoice 11935e83d430SRalf Baechle 119422b0763aSDavid Daneyconfig EXPORT_UASM 119522b0763aSDavid Daney bool 119622b0763aSDavid Daney 11972116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 11982116245eSRalf Baechle bool 11992116245eSRalf Baechle 12005e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 12015e83d430SRalf Baechle bool 12025e83d430SRalf Baechle 12035e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 12045e83d430SRalf Baechle bool 12051da177e4SLinus Torvalds 12069cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 12079cffd154SDavid Daney bool 12089cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 12099cffd154SDavid Daney default y 12109cffd154SDavid Daney 1211aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1212aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1213aa1762f4SDavid Daney 12141da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 12151da177e4SLinus Torvalds bool 12161da177e4SLinus Torvalds 12179267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 12189267a30dSMarc St-Jean bool 12199267a30dSMarc St-Jean 12209267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 12219267a30dSMarc St-Jean bool 12229267a30dSMarc St-Jean 12238420fd00SAtsushi Nemotoconfig IRQ_TXX9 12248420fd00SAtsushi Nemoto bool 12258420fd00SAtsushi Nemoto 1226d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1227d5ab1a69SYoichi Yuasa bool 1228d5ab1a69SYoichi Yuasa 1229252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 12301da177e4SLinus Torvalds bool 12311da177e4SLinus Torvalds 12329267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 12339267a30dSMarc St-Jean bool 12349267a30dSMarc St-Jean 1235a83860c2SRalf Baechleconfig SOC_EMMA2RH 1236a83860c2SRalf Baechle bool 1237a83860c2SRalf Baechle select CEVT_R4K 1238a83860c2SRalf Baechle select CSRC_R4K 1239a83860c2SRalf Baechle select DMA_NONCOHERENT 124067e38cf2SRalf Baechle select IRQ_MIPS_CPU 1241a83860c2SRalf Baechle select SWAP_IO_SPACE 1242a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1243a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1244a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1245a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1246a83860c2SRalf Baechle 1247edb6310aSDaniel Lairdconfig SOC_PNX833X 1248edb6310aSDaniel Laird bool 1249edb6310aSDaniel Laird select CEVT_R4K 1250edb6310aSDaniel Laird select CSRC_R4K 125167e38cf2SRalf Baechle select IRQ_MIPS_CPU 1252edb6310aSDaniel Laird select DMA_NONCOHERENT 1253edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1254edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1255edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1256edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1257377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1258edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1259edb6310aSDaniel Laird 1260edb6310aSDaniel Lairdconfig SOC_PNX8335 1261edb6310aSDaniel Laird bool 1262edb6310aSDaniel Laird select SOC_PNX833X 1263edb6310aSDaniel Laird 1264a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1265a7e07b1aSMarkos Chandras bool 1266a7e07b1aSMarkos Chandras 12671da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 12681da177e4SLinus Torvalds bool 12691da177e4SLinus Torvalds 1270e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1271e2defae5SThomas Bogendoerfer bool 1272e2defae5SThomas Bogendoerfer 12735b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 12745b438c44SThomas Bogendoerfer bool 12755b438c44SThomas Bogendoerfer 1276e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1277e2defae5SThomas Bogendoerfer bool 1278e2defae5SThomas Bogendoerfer 1279e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1280e2defae5SThomas Bogendoerfer bool 1281e2defae5SThomas Bogendoerfer 1282e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1283e2defae5SThomas Bogendoerfer bool 1284e2defae5SThomas Bogendoerfer 1285e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1286e2defae5SThomas Bogendoerfer bool 1287e2defae5SThomas Bogendoerfer 1288e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1289e2defae5SThomas Bogendoerfer bool 1290e2defae5SThomas Bogendoerfer 12910e2794b0SRalf Baechleconfig FW_ARC32 12925e83d430SRalf Baechle bool 12935e83d430SRalf Baechle 1294aaa9fad3SPaul Bolleconfig FW_SNIPROM 1295231a35d3SThomas Bogendoerfer bool 1296231a35d3SThomas Bogendoerfer 12971da177e4SLinus Torvaldsconfig BOOT_ELF32 12981da177e4SLinus Torvalds bool 12991da177e4SLinus Torvalds 1300930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1301930beb5aSFlorian Fainelli bool 1302930beb5aSFlorian Fainelli 1303930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1304930beb5aSFlorian Fainelli bool 1305930beb5aSFlorian Fainelli 1306930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1307930beb5aSFlorian Fainelli bool 1308930beb5aSFlorian Fainelli 1309930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1310930beb5aSFlorian Fainelli bool 1311930beb5aSFlorian Fainelli 13121da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 13131da177e4SLinus Torvalds int 1314a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 13155432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 13165432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 13175432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 13181da177e4SLinus Torvalds default "5" 13191da177e4SLinus Torvalds 13201da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 13211da177e4SLinus Torvalds bool 13221da177e4SLinus Torvalds 13231da177e4SLinus Torvaldsconfig ARC_CONSOLE 13241da177e4SLinus Torvalds bool "ARC console support" 1325e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 13261da177e4SLinus Torvalds 13271da177e4SLinus Torvaldsconfig ARC_MEMORY 13281da177e4SLinus Torvalds bool 132914b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 13301da177e4SLinus Torvalds default y 13311da177e4SLinus Torvalds 13321da177e4SLinus Torvaldsconfig ARC_PROMLIB 13331da177e4SLinus Torvalds bool 1334e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 13351da177e4SLinus Torvalds default y 13361da177e4SLinus Torvalds 13370e2794b0SRalf Baechleconfig FW_ARC64 13381da177e4SLinus Torvalds bool 13391da177e4SLinus Torvalds 13401da177e4SLinus Torvaldsconfig BOOT_ELF64 13411da177e4SLinus Torvalds bool 13421da177e4SLinus Torvalds 13431da177e4SLinus Torvaldsmenu "CPU selection" 13441da177e4SLinus Torvalds 13451da177e4SLinus Torvaldschoice 13461da177e4SLinus Torvalds prompt "CPU type" 13471da177e4SLinus Torvalds default CPU_R4X00 13481da177e4SLinus Torvalds 13490e476d91SHuacai Chenconfig CPU_LOONGSON3 13500e476d91SHuacai Chen bool "Loongson 3 CPU" 13510e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 13520e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 13530e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 13540e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 13550e476d91SHuacai Chen select WEAK_ORDERING 13560e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 1357b2edcfc8SHuacai Chen select MIPS_PGD_C0_CONTEXT 1358cbfb3ea7SHuacai Chen select ARCH_REQUIRE_GPIOLIB 13590e476d91SHuacai Chen help 13600e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 13610e476d91SHuacai Chen set with many extensions. 13620e476d91SHuacai Chen 13631e820da3SHuacai Chenconfig LOONGSON3_ENHANCEMENT 13641e820da3SHuacai Chen bool "New Loongson 3 CPU Enhancements" 13651e820da3SHuacai Chen default n 13661e820da3SHuacai Chen select CPU_MIPSR2 13671e820da3SHuacai Chen select CPU_HAS_PREFETCH 13681e820da3SHuacai Chen depends on CPU_LOONGSON3 13691e820da3SHuacai Chen help 13701e820da3SHuacai Chen New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A 13711e820da3SHuacai Chen R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as 13721e820da3SHuacai Chen FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User 13731e820da3SHuacai Chen Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), 13741e820da3SHuacai Chen Fast TLB refill support, etc. 13751e820da3SHuacai Chen 13761e820da3SHuacai Chen This option enable those enhancements which are not probed at run 13771e820da3SHuacai Chen time. If you want a generic kernel to run on all Loongson 3 machines, 13781e820da3SHuacai Chen please say 'N' here. If you want a high-performance kernel to run on 13791e820da3SHuacai Chen new Loongson 3 machines only, please say 'Y' here. 13801e820da3SHuacai Chen 13813702bba5SWu Zhangjinconfig CPU_LOONGSON2E 13823702bba5SWu Zhangjin bool "Loongson 2E" 13833702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 13843702bba5SWu Zhangjin select CPU_LOONGSON2 13852a21c730SFuxin Zhang help 13862a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 13872a21c730SFuxin Zhang with many extensions. 13882a21c730SFuxin Zhang 138925985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 13906f7a251aSWu Zhangjin bonito64. 13916f7a251aSWu Zhangjin 13926f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 13936f7a251aSWu Zhangjin bool "Loongson 2F" 13946f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 13956f7a251aSWu Zhangjin select CPU_LOONGSON2 1396c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 13976f7a251aSWu Zhangjin help 13986f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 13996f7a251aSWu Zhangjin with many extensions. 14006f7a251aSWu Zhangjin 14016f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 14026f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 14036f7a251aSWu Zhangjin Loongson2E. 14046f7a251aSWu Zhangjin 1405ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1406ca585cf9SKelvin Cheung bool "Loongson 1B" 1407ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1408ca585cf9SKelvin Cheung select CPU_LOONGSON1 14099ec88b60SKelvin Cheung select ARCH_WANT_OPTIONAL_GPIOLIB 14109ec88b60SKelvin Cheung select LEDS_GPIO_REGISTER 1411ca585cf9SKelvin Cheung help 1412ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1413ca585cf9SKelvin Cheung release 2 instruction set. 1414ca585cf9SKelvin Cheung 14156e760c8dSRalf Baechleconfig CPU_MIPS32_R1 14166e760c8dSRalf Baechle bool "MIPS32 Release 1" 14177cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 14186e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1419797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1420ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14216e760c8dSRalf Baechle help 14225e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 14231e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14241e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14251e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14261e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14271e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 14281e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 14291e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 14301e5f1caaSRalf Baechle performance. 14311e5f1caaSRalf Baechle 14321e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 14331e5f1caaSRalf Baechle bool "MIPS32 Release 2" 14347cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 14351e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1436797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1437ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1438a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14392235a54dSSanjay Lal select HAVE_KVM 14401e5f1caaSRalf Baechle help 14415e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 14426e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14436e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14446e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14456e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14461da177e4SLinus Torvalds 14477fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 1448674d10e2SMarkos Chandras bool "MIPS32 Release 6" 14497fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 14507fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14517fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14527fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14537fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14544e0748f5SMarkos Chandras select GENERIC_CSUM 14557fd08ca5SLeonid Yegoshin select HAVE_KVM 14567fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 14577fd08ca5SLeonid Yegoshin help 14587fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14597fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 14607fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 14617fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 14627fd08ca5SLeonid Yegoshin 14636e760c8dSRalf Baechleconfig CPU_MIPS64_R1 14646e760c8dSRalf Baechle bool "MIPS64 Release 1" 14657cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1466797798c1SRalf Baechle select CPU_HAS_PREFETCH 1467ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1468ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1469ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14709cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14716e760c8dSRalf Baechle help 14726e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 14736e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 14746e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 14756e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14766e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 14771e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 14781e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 14791e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 14801e5f1caaSRalf Baechle performance. 14811e5f1caaSRalf Baechle 14821e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 14831e5f1caaSRalf Baechle bool "MIPS64 Release 2" 14847cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1485797798c1SRalf Baechle select CPU_HAS_PREFETCH 14861e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 14871e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1488ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14899cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1490a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14911e5f1caaSRalf Baechle help 14921e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 14931e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 14941e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 14951e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14961e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 14971da177e4SLinus Torvalds 14987fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 1499674d10e2SMarkos Chandras bool "MIPS64 Release 6" 15007fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 15017fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 15027fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 15037fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 15047fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 15057fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 15064e0748f5SMarkos Chandras select GENERIC_CSUM 15074e9d324dSPaul Burton select MIPS_O32_FP64_SUPPORT if MIPS32_O32 15087fd08ca5SLeonid Yegoshin help 15097fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 15107fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 15117fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 15127fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 15137fd08ca5SLeonid Yegoshin 15141da177e4SLinus Torvaldsconfig CPU_R3000 15151da177e4SLinus Torvalds bool "R3000" 15167cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1517f7062ddbSRalf Baechle select CPU_HAS_WB 1518ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1519797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15201da177e4SLinus Torvalds help 15211da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 15221da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 15231da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 15241da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 15251da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 15261da177e4SLinus Torvalds try to recompile with R3000. 15271da177e4SLinus Torvalds 15281da177e4SLinus Torvaldsconfig CPU_TX39XX 15291da177e4SLinus Torvalds bool "R39XX" 15307cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1531ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15321da177e4SLinus Torvalds 15331da177e4SLinus Torvaldsconfig CPU_VR41XX 15341da177e4SLinus Torvalds bool "R41xx" 15357cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1536ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1537ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15381da177e4SLinus Torvalds help 15395e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 15401da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 15411da177e4SLinus Torvalds kernel built with this option will not run on any other type of 15421da177e4SLinus Torvalds processor or vice versa. 15431da177e4SLinus Torvalds 15441da177e4SLinus Torvaldsconfig CPU_R4300 15451da177e4SLinus Torvalds bool "R4300" 15467cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1547ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1548ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15491da177e4SLinus Torvalds help 15501da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 15511da177e4SLinus Torvalds 15521da177e4SLinus Torvaldsconfig CPU_R4X00 15531da177e4SLinus Torvalds bool "R4x00" 15547cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1555ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1556ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1557970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15581da177e4SLinus Torvalds help 15591da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 15601da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 15611da177e4SLinus Torvalds 15621da177e4SLinus Torvaldsconfig CPU_TX49XX 15631da177e4SLinus Torvalds bool "R49XX" 15647cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1565de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1566ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1567ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1568970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15691da177e4SLinus Torvalds 15701da177e4SLinus Torvaldsconfig CPU_R5000 15711da177e4SLinus Torvalds bool "R5000" 15727cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1573ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1574ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1575970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15761da177e4SLinus Torvalds help 15771da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 15781da177e4SLinus Torvalds 15791da177e4SLinus Torvaldsconfig CPU_R5432 15801da177e4SLinus Torvalds bool "R5432" 15817cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 15825e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 15835e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1584970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15851da177e4SLinus Torvalds 1586542c1020SShinya Kuribayashiconfig CPU_R5500 1587542c1020SShinya Kuribayashi bool "R5500" 1588542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1589542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1590542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 15919cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1592542c1020SShinya Kuribayashi help 1593542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1594542c1020SShinya Kuribayashi instruction set. 1595542c1020SShinya Kuribayashi 15961da177e4SLinus Torvaldsconfig CPU_R6000 15971da177e4SLinus Torvalds bool "R6000" 15987cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1599ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 16001da177e4SLinus Torvalds help 16011da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1602c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 16031da177e4SLinus Torvalds 16041da177e4SLinus Torvaldsconfig CPU_NEVADA 16051da177e4SLinus Torvalds bool "RM52xx" 16067cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1607ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1608ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1609970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16101da177e4SLinus Torvalds help 16111da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 16121da177e4SLinus Torvalds 16131da177e4SLinus Torvaldsconfig CPU_R8000 16141da177e4SLinus Torvalds bool "R8000" 16157cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 16165e83d430SRalf Baechle select CPU_HAS_PREFETCH 1617ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 16181da177e4SLinus Torvalds help 16191da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 16201da177e4SLinus Torvalds uncommon and the support for them is incomplete. 16211da177e4SLinus Torvalds 16221da177e4SLinus Torvaldsconfig CPU_R10000 16231da177e4SLinus Torvalds bool "R10000" 16247cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 16255e83d430SRalf Baechle select CPU_HAS_PREFETCH 1626ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1627ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1628797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1629970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16301da177e4SLinus Torvalds help 16311da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 16321da177e4SLinus Torvalds 16331da177e4SLinus Torvaldsconfig CPU_RM7000 16341da177e4SLinus Torvalds bool "RM7000" 16357cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 16365e83d430SRalf Baechle select CPU_HAS_PREFETCH 1637ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1638ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1639797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1640970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16411da177e4SLinus Torvalds 16421da177e4SLinus Torvaldsconfig CPU_SB1 16431da177e4SLinus Torvalds bool "SB1" 16447cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1645ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1646ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1647797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1648970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16490004a9dfSRalf Baechle select WEAK_ORDERING 16501da177e4SLinus Torvalds 1651a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1652a86c7f72SDavid Daney bool "Cavium Octeon processor" 16535e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1654a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1655a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1656a86c7f72SDavid Daney select WEAK_ORDERING 1657a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 16589cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1659df115f3eSBen Hutchings select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1660df115f3eSBen Hutchings select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1661930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1662a86c7f72SDavid Daney help 1663a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1664a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1665a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1666a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1667a86c7f72SDavid Daney 1668cd746249SJonas Gorskiconfig CPU_BMIPS 1669cd746249SJonas Gorski bool "Broadcom BMIPS" 1670cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1671cd746249SJonas Gorski select CPU_MIPS32 1672fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1673cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1674cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1675cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1676cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1677cd746249SJonas Gorski select DMA_NONCOHERENT 167867e38cf2SRalf Baechle select IRQ_MIPS_CPU 1679cd746249SJonas Gorski select SWAP_IO_SPACE 1680cd746249SJonas Gorski select WEAK_ORDERING 1681c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 168269aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1683c1c0c461SKevin Cernekee help 1684fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1685c1c0c461SKevin Cernekee 16867f058e85SJayachandran Cconfig CPU_XLR 16877f058e85SJayachandran C bool "Netlogic XLR SoC" 16887f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 16897f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 16907f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 16917f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1692970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16937f058e85SJayachandran C select WEAK_ORDERING 16947f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 16957f058e85SJayachandran C help 16967f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 16971c773ea4SJayachandran C 16981c773ea4SJayachandran Cconfig CPU_XLP 16991c773ea4SJayachandran C bool "Netlogic XLP SoC" 17001c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 17011c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17021c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17031c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 17041c773ea4SJayachandran C select WEAK_ORDERING 17051c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17061c773ea4SJayachandran C select CPU_HAS_PREFETCH 1707d6504846SJayachandran C select CPU_MIPSR2 1708ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 17091c773ea4SJayachandran C help 17101c773ea4SJayachandran C Netlogic Microsystems XLP processors. 17111da177e4SLinus Torvaldsendchoice 17121da177e4SLinus Torvalds 1713a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1714a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1715a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 17167fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1717a6e18781SLeonid Yegoshin help 1718a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1719a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1720a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1721a6e18781SLeonid Yegoshin 1722a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1723a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1724a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1725a6e18781SLeonid Yegoshin select EVA 1726a6e18781SLeonid Yegoshin default y 1727a6e18781SLeonid Yegoshin help 1728a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1729a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1730a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1731a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1732a6e18781SLeonid Yegoshin 1733c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1734c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1735c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1736c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1737c5b36783SSteven J. Hill help 1738c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1739c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1740c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1741c5b36783SSteven J. Hill 1742c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1743c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1744c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1745c5b36783SSteven J. Hill depends on !EVA 1746c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1747c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1748c5b36783SSteven J. Hill select XPA 1749c5b36783SSteven J. Hill select HIGHMEM 1750c5b36783SSteven J. Hill select ARCH_PHYS_ADDR_T_64BIT 1751c5b36783SSteven J. Hill default n 1752c5b36783SSteven J. Hill help 1753c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1754c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1755c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1756c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1757c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1758c5b36783SSteven J. Hill If unsure, say 'N' here. 1759c5b36783SSteven J. Hill 1760622844bfSWu Zhangjinif CPU_LOONGSON2F 1761622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1762622844bfSWu Zhangjin bool 1763622844bfSWu Zhangjin 1764622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1765622844bfSWu Zhangjin bool 1766622844bfSWu Zhangjin 1767622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1768622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1769622844bfSWu Zhangjin default y 1770622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1771622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1772622844bfSWu Zhangjin help 1773622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1774622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1775622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1776622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1777622844bfSWu Zhangjin 1778622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1779622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1780622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1781622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1782622844bfSWu Zhangjin systems. 1783622844bfSWu Zhangjin 1784622844bfSWu Zhangjin If unsure, please say Y. 1785622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1786622844bfSWu Zhangjin 17871b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 17881b93b3c3SWu Zhangjin bool 17891b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 17901b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 179131c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 17921b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1793fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 17944e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 17951b93b3c3SWu Zhangjin 17961b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 17971b93b3c3SWu Zhangjin bool 17981b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 17991b93b3c3SWu Zhangjin 1800dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM 1801dbb98314SAlban Bedel bool 1802dbb98314SAlban Bedel select SYS_SUPPORTS_ZBOOT 1803dbb98314SAlban Bedel 18043702bba5SWu Zhangjinconfig CPU_LOONGSON2 18053702bba5SWu Zhangjin bool 18063702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 18073702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 18083702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1809970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 18103702bba5SWu Zhangjin 1811ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1812ca585cf9SKelvin Cheung bool 1813ca585cf9SKelvin Cheung select CPU_MIPS32 1814ca585cf9SKelvin Cheung select CPU_MIPSR2 1815ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1816ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1817ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1818f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1819ca585cf9SKelvin Cheung 1820fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 182104fa8bf7SJonas Gorski select SMP_UP if SMP 18221bbb6c1bSKevin Cernekee bool 1823cd746249SJonas Gorski 1824cd746249SJonas Gorskiconfig CPU_BMIPS4350 1825cd746249SJonas Gorski bool 1826cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1827cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1828cd746249SJonas Gorski 1829cd746249SJonas Gorskiconfig CPU_BMIPS4380 1830cd746249SJonas Gorski bool 1831bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1832cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1833cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1834cd746249SJonas Gorski 1835cd746249SJonas Gorskiconfig CPU_BMIPS5000 1836cd746249SJonas Gorski bool 1837cd746249SJonas Gorski select MIPS_CPU_SCACHE 1838bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1839cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1840cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 18411bbb6c1bSKevin Cernekee 18420e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 18430e476d91SHuacai Chen bool 18440e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 1845b2edcfc8SHuacai Chen select CPU_HAS_RIXI 18460e476d91SHuacai Chen 18473702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 18482a21c730SFuxin Zhang bool 18492a21c730SFuxin Zhang 18506f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 18516f7a251aSWu Zhangjin bool 185255045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 185355045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 185422f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 18556f7a251aSWu Zhangjin 1856ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1857ca585cf9SKelvin Cheung bool 1858ca585cf9SKelvin Cheung 18597cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 18607cf8053bSRalf Baechle bool 18617cf8053bSRalf Baechle 18627cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 18637cf8053bSRalf Baechle bool 18647cf8053bSRalf Baechle 1865a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1866a6e18781SLeonid Yegoshin bool 1867a6e18781SLeonid Yegoshin 1868c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1869c5b36783SSteven J. Hill bool 1870c5b36783SSteven J. Hill 18717fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 18727fd08ca5SLeonid Yegoshin bool 18737fd08ca5SLeonid Yegoshin 18747cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 18757cf8053bSRalf Baechle bool 18767cf8053bSRalf Baechle 18777cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 18787cf8053bSRalf Baechle bool 18797cf8053bSRalf Baechle 18807fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 18817fd08ca5SLeonid Yegoshin bool 18827fd08ca5SLeonid Yegoshin 18837cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 18847cf8053bSRalf Baechle bool 18857cf8053bSRalf Baechle 18867cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 18877cf8053bSRalf Baechle bool 18887cf8053bSRalf Baechle 18897cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 18907cf8053bSRalf Baechle bool 18917cf8053bSRalf Baechle 18927cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 18937cf8053bSRalf Baechle bool 18947cf8053bSRalf Baechle 18957cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 18967cf8053bSRalf Baechle bool 18977cf8053bSRalf Baechle 18987cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 18997cf8053bSRalf Baechle bool 19007cf8053bSRalf Baechle 19017cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 19027cf8053bSRalf Baechle bool 19037cf8053bSRalf Baechle 19047cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 19057cf8053bSRalf Baechle bool 19067cf8053bSRalf Baechle 1907542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1908542c1020SShinya Kuribayashi bool 1909542c1020SShinya Kuribayashi 19107cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 19117cf8053bSRalf Baechle bool 19127cf8053bSRalf Baechle 19137cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 19147cf8053bSRalf Baechle bool 19157cf8053bSRalf Baechle 19167cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 19177cf8053bSRalf Baechle bool 19187cf8053bSRalf Baechle 19197cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 19207cf8053bSRalf Baechle bool 19217cf8053bSRalf Baechle 19227cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 19237cf8053bSRalf Baechle bool 19247cf8053bSRalf Baechle 19257cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 19267cf8053bSRalf Baechle bool 19277cf8053bSRalf Baechle 19285e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 19295e683389SDavid Daney bool 19305e683389SDavid Daney 1931cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1932c1c0c461SKevin Cernekee bool 1933c1c0c461SKevin Cernekee 1934fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1935c1c0c461SKevin Cernekee bool 1936cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1937c1c0c461SKevin Cernekee 1938c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1939c1c0c461SKevin Cernekee bool 1940cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1941c1c0c461SKevin Cernekee 1942c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1943c1c0c461SKevin Cernekee bool 1944cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1945c1c0c461SKevin Cernekee 1946c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1947c1c0c461SKevin Cernekee bool 1948cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1949c1c0c461SKevin Cernekee 19507f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 19517f058e85SJayachandran C bool 19527f058e85SJayachandran C 19531c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 19541c773ea4SJayachandran C bool 19551c773ea4SJayachandran C 1956b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 1957b6911bbaSPaul Burton depends on MIPS_MALTA 1958b6911bbaSPaul Burton depends on PCI 1959b6911bbaSPaul Burton bool 1960b6911bbaSPaul Burton default y 1961b6911bbaSPaul Burton 196217099b11SRalf Baechle# 196317099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 196417099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 196517099b11SRalf Baechle# 19660004a9dfSRalf Baechleconfig WEAK_ORDERING 19670004a9dfSRalf Baechle bool 196817099b11SRalf Baechle 196917099b11SRalf Baechle# 197017099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 197117099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 197217099b11SRalf Baechle# 197317099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 197417099b11SRalf Baechle bool 19755e83d430SRalf Baechleendmenu 19765e83d430SRalf Baechle 19775e83d430SRalf Baechle# 19785e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 19795e83d430SRalf Baechle# 19805e83d430SRalf Baechleconfig CPU_MIPS32 19815e83d430SRalf Baechle bool 19827fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 19835e83d430SRalf Baechle 19845e83d430SRalf Baechleconfig CPU_MIPS64 19855e83d430SRalf Baechle bool 19867fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 19875e83d430SRalf Baechle 19885e83d430SRalf Baechle# 1989c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 19905e83d430SRalf Baechle# 19915e83d430SRalf Baechleconfig CPU_MIPSR1 19925e83d430SRalf Baechle bool 19935e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 19945e83d430SRalf Baechle 19955e83d430SRalf Baechleconfig CPU_MIPSR2 19965e83d430SRalf Baechle bool 1997a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 1998a7e07b1aSMarkos Chandras select MIPS_SPRAM 19995e83d430SRalf Baechle 20007fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 20017fd08ca5SLeonid Yegoshin bool 20027fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 200387321fddSPaul Burton select HAVE_ARCH_BITREVERSE 2004a7e07b1aSMarkos Chandras select MIPS_SPRAM 20055e83d430SRalf Baechle 2006a6e18781SLeonid Yegoshinconfig EVA 2007a6e18781SLeonid Yegoshin bool 2008a6e18781SLeonid Yegoshin 2009c5b36783SSteven J. Hillconfig XPA 2010c5b36783SSteven J. Hill bool 2011c5b36783SSteven J. Hill 20125e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 20135e83d430SRalf Baechle bool 20145e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 20155e83d430SRalf Baechle bool 20165e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 20175e83d430SRalf Baechle bool 20185e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 20195e83d430SRalf Baechle bool 202055045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 202155045ff5SWu Zhangjin bool 202255045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 202355045ff5SWu Zhangjin bool 20249cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 20259cffd154SDavid Daney bool 202622f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 202722f1fdfdSWu Zhangjin bool 202882622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 202982622284SDavid Daney bool 2030d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 20315e83d430SRalf Baechle 20328192c9eaSDavid Daney# 20338192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 20348192c9eaSDavid Daney# 20358192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 20368192c9eaSDavid Daney bool 2037679eb637SJames Hogan default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 20388192c9eaSDavid Daney 20395e83d430SRalf Baechlemenu "Kernel type" 20405e83d430SRalf Baechle 20415e83d430SRalf Baechlechoice 20425e83d430SRalf Baechle prompt "Kernel code model" 20435e83d430SRalf Baechle help 20445e83d430SRalf Baechle You should only select this option if you have a workload that 20455e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 20465e83d430SRalf Baechle large memory. You will only be presented a single option in this 20475e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 20485e83d430SRalf Baechle 20495e83d430SRalf Baechleconfig 32BIT 20505e83d430SRalf Baechle bool "32-bit kernel" 20515e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 20525e83d430SRalf Baechle select TRAD_SIGNALS 20535e83d430SRalf Baechle help 20545e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 2055f17c4ca3SRalf Baechle 20565e83d430SRalf Baechleconfig 64BIT 20575e83d430SRalf Baechle bool "64-bit kernel" 20585e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 20595e83d430SRalf Baechle help 20605e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 20615e83d430SRalf Baechle 20625e83d430SRalf Baechleendchoice 20635e83d430SRalf Baechle 20642235a54dSSanjay Lalconfig KVM_GUEST 20652235a54dSSanjay Lal bool "KVM Guest Kernel" 2066f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 20672235a54dSSanjay Lal help 2068caa1faa7SJames Hogan Select this option if building a guest kernel for KVM (Trap & Emulate) 2069caa1faa7SJames Hogan mode. 20702235a54dSSanjay Lal 2071eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 2072eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 20732235a54dSSanjay Lal depends on KVM_GUEST 2074eda3d33cSJames Hogan default 100 20752235a54dSSanjay Lal help 2076eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 2077eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 2078eda3d33cSJames Hogan timer frequency is specified directly. 20792235a54dSSanjay Lal 20801e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48 20811e321fa9SLeonid Yegoshin bool "48 bits virtual memory" 20821e321fa9SLeonid Yegoshin depends on 64BIT 20831e321fa9SLeonid Yegoshin help 20841e321fa9SLeonid Yegoshin Support a maximum at least 48 bits of application virtual memory. 20851e321fa9SLeonid Yegoshin Default is 40 bits or less, depending on the CPU. 20861e321fa9SLeonid Yegoshin This option result in a small memory overhead for page tables. 20871e321fa9SLeonid Yegoshin This option is only supported with 16k and 64k page sizes. 20881e321fa9SLeonid Yegoshin If unsure, say N. 20891e321fa9SLeonid Yegoshin 20901da177e4SLinus Torvaldschoice 20911da177e4SLinus Torvalds prompt "Kernel page size" 20921da177e4SLinus Torvalds default PAGE_SIZE_4KB 20931da177e4SLinus Torvalds 20941da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 20951da177e4SLinus Torvalds bool "4kB" 20960e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 20971e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 20981da177e4SLinus Torvalds help 20991da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 21001da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 21011da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 21021da177e4SLinus Torvalds recommended for low memory systems. 21031da177e4SLinus Torvalds 21041da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 21051da177e4SLinus Torvalds bool "8kB" 21067d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 21071e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 21081da177e4SLinus Torvalds help 21091da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 21101da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2111c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 2112c52399beSRalf Baechle suitable Linux distribution to support this. 21131da177e4SLinus Torvalds 21141da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 21151da177e4SLinus Torvalds bool "16kB" 2116714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 21171da177e4SLinus Torvalds help 21181da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 21191da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2120714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2121714bfad6SRalf Baechle Linux distribution to support this. 21221da177e4SLinus Torvalds 2123c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2124c52399beSRalf Baechle bool "32kB" 2125c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 21261e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 2127c52399beSRalf Baechle help 2128c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2129c52399beSRalf Baechle the price of higher memory consumption. This option is available 2130c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2131c52399beSRalf Baechle distribution to support this. 2132c52399beSRalf Baechle 21331da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 21341da177e4SLinus Torvalds bool "64kB" 213574c81ecdSRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000 21361da177e4SLinus Torvalds help 21371da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 21381da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 21391da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2140714bfad6SRalf Baechle writing this option is still high experimental. 21411da177e4SLinus Torvalds 21421da177e4SLinus Torvaldsendchoice 21431da177e4SLinus Torvalds 2144c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2145c9bace7cSDavid Daney int "Maximum zone order" 2146e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2147e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2148e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2149e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2150e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2151e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2152c9bace7cSDavid Daney range 11 64 2153c9bace7cSDavid Daney default "11" 2154c9bace7cSDavid Daney help 2155c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2156c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2157c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2158c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2159c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2160c9bace7cSDavid Daney increase this value. 2161c9bace7cSDavid Daney 2162c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2163c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2164c9bace7cSDavid Daney 2165c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2166c9bace7cSDavid Daney when choosing a value for this option. 2167c9bace7cSDavid Daney 21681da177e4SLinus Torvaldsconfig BOARD_SCACHE 21691da177e4SLinus Torvalds bool 21701da177e4SLinus Torvalds 21711da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 21721da177e4SLinus Torvalds bool 21731da177e4SLinus Torvalds select BOARD_SCACHE 21741da177e4SLinus Torvalds 21759318c51aSChris Dearman# 21769318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 21779318c51aSChris Dearman# 21789318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 21799318c51aSChris Dearman bool 21809318c51aSChris Dearman select BOARD_SCACHE 21819318c51aSChris Dearman 21821da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 21831da177e4SLinus Torvalds bool 21841da177e4SLinus Torvalds select BOARD_SCACHE 21851da177e4SLinus Torvalds 21861da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 21871da177e4SLinus Torvalds bool 21881da177e4SLinus Torvalds select BOARD_SCACHE 21891da177e4SLinus Torvalds 21901da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 21911da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 21921da177e4SLinus Torvalds depends on CPU_SB1 21931da177e4SLinus Torvalds help 21941da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 21951da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 21961da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 21971da177e4SLinus Torvalds 21981da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2199c8094b53SRalf Baechle bool 22001da177e4SLinus Torvalds 22013165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 22023165c846SFlorian Fainelli bool 22033165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 22043165c846SFlorian Fainelli 220591405eb6SFlorian Fainelliconfig CPU_R4K_FPU 220691405eb6SFlorian Fainelli bool 220791405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 220891405eb6SFlorian Fainelli 220962cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 221062cedc4fSFlorian Fainelli bool 221162cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 221262cedc4fSFlorian Fainelli 221359d6ab86SRalf Baechleconfig MIPS_MT_SMP 2214a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 22155676319cSMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 221659d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2217d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2218c080faa5SSteven J. Hill select SYNC_R4K 221959d6ab86SRalf Baechle select MIPS_MT 222059d6ab86SRalf Baechle select SMP 222187353d8aSRalf Baechle select SMP_UP 2222c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2223c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2224399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 222559d6ab86SRalf Baechle help 2226c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2227c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2228c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2229c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2230c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 223159d6ab86SRalf Baechle 2232f41ae0b2SRalf Baechleconfig MIPS_MT 2233f41ae0b2SRalf Baechle bool 2234f41ae0b2SRalf Baechle 22350ab7aefcSRalf Baechleconfig SCHED_SMT 22360ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 22370ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 22380ab7aefcSRalf Baechle default n 22390ab7aefcSRalf Baechle help 22400ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 22410ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 22420ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 22430ab7aefcSRalf Baechle 22440ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 22450ab7aefcSRalf Baechle bool 22460ab7aefcSRalf Baechle 2247f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2248f41ae0b2SRalf Baechle bool 2249f41ae0b2SRalf Baechle 2250f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2251f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2252f088fc84SRalf Baechle default y 2253b633648cSRalf Baechle depends on MIPS_MT_SMP 225407cc0c9eSRalf Baechle 2255b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2256b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 2257b0a668fbSLeonid Yegoshin depends on CPU_MIPSR6 && !SMP 2258b0a668fbSLeonid Yegoshin default y 2259b0a668fbSLeonid Yegoshin help 2260b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2261b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 226207edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2263b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2264b0a668fbSLeonid Yegoshin final kernel image. 2265b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels" 2266b0a668fbSLeonid Yegoshin depends on SMP && CPU_MIPSR6 2267b0a668fbSLeonid Yegoshin 226807cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 226907cc0c9eSRalf Baechle bool "VPE loader support." 2270704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 227107cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 227207cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 227307cc0c9eSRalf Baechle select MIPS_MT 227407cc0c9eSRalf Baechle help 227507cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 227607cc0c9eSRalf Baechle onto another VPE and running it. 2277f088fc84SRalf Baechle 227817a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 227917a1d523SDeng-Cheng Zhu bool 228017a1d523SDeng-Cheng Zhu default "y" 228117a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 228217a1d523SDeng-Cheng Zhu 22831a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 22841a2a6d7eSDeng-Cheng Zhu bool 22851a2a6d7eSDeng-Cheng Zhu default "y" 22861a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 22871a2a6d7eSDeng-Cheng Zhu 2288e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2289e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2290e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2291e01402b1SRalf Baechle default y 2292e01402b1SRalf Baechle help 2293e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2294e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2295e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2296e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2297e01402b1SRalf Baechle 2298e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2299e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2300e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 23015e83d430SRalf Baechle help 2302e01402b1SRalf Baechle 2303da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2304da615cf6SDeng-Cheng Zhu bool 2305da615cf6SDeng-Cheng Zhu default "y" 2306da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2307da615cf6SDeng-Cheng Zhu 23082c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 23092c973ef0SDeng-Cheng Zhu bool 23102c973ef0SDeng-Cheng Zhu default "y" 23112c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 23122c973ef0SDeng-Cheng Zhu 23134a16ff4cSRalf Baechleconfig MIPS_CMP 23145cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 23155676319cSMarkos Chandras depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 2316b10b43baSMarkos Chandras select SMP 2317eb9b5141STim Anderson select SYNC_R4K 2318b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 23194a16ff4cSRalf Baechle select WEAK_ORDERING 23204a16ff4cSRalf Baechle default n 23214a16ff4cSRalf Baechle help 2322044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2323044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2324044505c7SPaul Burton its ability to start secondary CPUs. 23254a16ff4cSRalf Baechle 23265cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 23275cac93b3SPaul Burton instead of this. 23285cac93b3SPaul Burton 23290ee958e1SPaul Burtonconfig MIPS_CPS 23300ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 23315a3e7c02SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 23320ee958e1SPaul Burton select MIPS_CM 23330ee958e1SPaul Burton select MIPS_CPC 23341d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 23350ee958e1SPaul Burton select SMP 23360ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 23371d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 23380ee958e1SPaul Burton select SYS_SUPPORTS_SMP 23390ee958e1SPaul Burton select WEAK_ORDERING 23400ee958e1SPaul Burton help 23410ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 23420ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 23430ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 23440ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 23450ee958e1SPaul Burton support is unavailable. 23460ee958e1SPaul Burton 23473179d37eSPaul Burtonconfig MIPS_CPS_PM 234839a59593SMarkos Chandras depends on MIPS_CPS 2349a8b84677SPaul Burton select MIPS_CPC 23503179d37eSPaul Burton bool 23513179d37eSPaul Burton 23529f98f3ddSPaul Burtonconfig MIPS_CM 23539f98f3ddSPaul Burton bool 23549f98f3ddSPaul Burton 23559c38cf44SPaul Burtonconfig MIPS_CPC 23569c38cf44SPaul Burton bool 23572600990eSRalf Baechle 23581da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 23591da177e4SLinus Torvalds bool 23601da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 23611da177e4SLinus Torvalds default y 23621da177e4SLinus Torvalds 23631da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 23641da177e4SLinus Torvalds bool 23651da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 23661da177e4SLinus Torvalds default y 23671da177e4SLinus Torvalds 23682235a54dSSanjay Lal 236960ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 237034adb28dSRalf Baechle bool 237160ec6571Spascal@pabr.org 23729e2b5372SMarkos Chandraschoice 23739e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 23749e2b5372SMarkos Chandras 23759e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 23769e2b5372SMarkos Chandras bool "None" 23779e2b5372SMarkos Chandras help 23789e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 23799e2b5372SMarkos Chandras 23809693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 23819693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 23829e2b5372SMarkos Chandras bool "SmartMIPS" 23839693a853SFranck Bui-Huu help 23849693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 23859693a853SFranck Bui-Huu increased security at both hardware and software level for 23869693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 23879693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 23889693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 23899693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 23909693a853SFranck Bui-Huu here. 23919693a853SFranck Bui-Huu 2392bce86083SSteven J. Hillconfig CPU_MICROMIPS 23937fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 23949e2b5372SMarkos Chandras bool "microMIPS" 2395bce86083SSteven J. Hill help 2396bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2397bce86083SSteven J. Hill microMIPS ISA 2398bce86083SSteven J. Hill 23999e2b5372SMarkos Chandrasendchoice 24009e2b5372SMarkos Chandras 2401a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 24020ce3417eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2403a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 24042a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2405a5e9a69eSPaul Burton help 2406a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2407a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 24081db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 24091db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 24101db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 24111db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 24121db1af84SPaul Burton the size & complexity of your kernel. 2413a5e9a69eSPaul Burton 2414a5e9a69eSPaul Burton If unsure, say Y. 2415a5e9a69eSPaul Burton 24161da177e4SLinus Torvaldsconfig CPU_HAS_WB 2417f7062ddbSRalf Baechle bool 2418e01402b1SRalf Baechle 2419df0ac8a4SKevin Cernekeeconfig XKS01 2420df0ac8a4SKevin Cernekee bool 2421df0ac8a4SKevin Cernekee 2422f41ae0b2SRalf Baechle# 2423f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2424f41ae0b2SRalf Baechle# 2425e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2426f41ae0b2SRalf Baechle bool 2427e01402b1SRalf Baechle 2428f41ae0b2SRalf Baechle# 2429f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2430f41ae0b2SRalf Baechle# 2431e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2432f41ae0b2SRalf Baechle bool 2433e01402b1SRalf Baechle 24341da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 24351da177e4SLinus Torvalds bool 24361da177e4SLinus Torvalds depends on !CPU_R3000 24371da177e4SLinus Torvalds default y 24381da177e4SLinus Torvalds 24391da177e4SLinus Torvalds# 244020d60d99SMaciej W. Rozycki# CPU non-features 244120d60d99SMaciej W. Rozycki# 244220d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 244320d60d99SMaciej W. Rozycki bool 244420d60d99SMaciej W. Rozycki 244520d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 244620d60d99SMaciej W. Rozycki bool 244720d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 244820d60d99SMaciej W. Rozycki 244920d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 245020d60d99SMaciej W. Rozycki bool 245120d60d99SMaciej W. Rozycki 2452*4edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT 2453*4edf00a4SPaul Burton int 2454*4edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 2455*4edf00a4SPaul Burton default 4 if CPU_R8000 2456*4edf00a4SPaul Burton default 0 2457*4edf00a4SPaul Burton 2458*4edf00a4SPaul Burtonconfig MIPS_ASID_BITS 2459*4edf00a4SPaul Burton int 2460*4edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 2461*4edf00a4SPaul Burton default 8 2462*4edf00a4SPaul Burton 246320d60d99SMaciej W. Rozycki# 24641da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 24651da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 24661da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 24671da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 24681da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 24691da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 24701da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 24711da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2472797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2473797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2474797798c1SRalf Baechle# support. 24751da177e4SLinus Torvalds# 24761da177e4SLinus Torvaldsconfig HIGHMEM 24771da177e4SLinus Torvalds bool "High Memory Support" 2478a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2479797798c1SRalf Baechle 2480797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2481797798c1SRalf Baechle bool 2482797798c1SRalf Baechle 2483797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2484797798c1SRalf Baechle bool 24851da177e4SLinus Torvalds 24869693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 24879693a853SFranck Bui-Huu bool 24889693a853SFranck Bui-Huu 2489a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2490a6a4834cSSteven J. Hill bool 2491a6a4834cSSteven J. Hill 2492377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2493377cb1b6SRalf Baechle bool 2494377cb1b6SRalf Baechle help 2495377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2496377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2497377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2498377cb1b6SRalf Baechle 2499a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2500a5e9a69eSPaul Burton bool 2501a5e9a69eSPaul Burton 2502b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2503b4819b59SYoichi Yuasa def_bool y 2504f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2505b4819b59SYoichi Yuasa 2506d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2507d8cb4e11SRalf Baechle bool 2508d8cb4e11SRalf Baechle default y if SGI_IP27 2509d8cb4e11SRalf Baechle help 25103dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2511d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2512d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2513d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2514d8cb4e11SRalf Baechle 2515b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2516b1c6cd42SAtsushi Nemoto bool 25177de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 251831473747SAtsushi Nemoto 2519d8cb4e11SRalf Baechleconfig NUMA 2520d8cb4e11SRalf Baechle bool "NUMA Support" 2521d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2522d8cb4e11SRalf Baechle help 2523d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2524d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2525d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2526d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2527d8cb4e11SRalf Baechle disabled. 2528d8cb4e11SRalf Baechle 2529d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2530d8cb4e11SRalf Baechle bool 2531d8cb4e11SRalf Baechle 25328c530ea3SMatt Redfearnconfig RELOCATABLE 25338c530ea3SMatt Redfearn bool "Relocatable kernel" 25348c530ea3SMatt Redfearn depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6) 25358c530ea3SMatt Redfearn help 25368c530ea3SMatt Redfearn This builds a kernel image that retains relocation information 25378c530ea3SMatt Redfearn so it can be loaded someplace besides the default 1MB. 25388c530ea3SMatt Redfearn The relocations make the kernel binary about 15% larger, 25398c530ea3SMatt Redfearn but are discarded at runtime 25408c530ea3SMatt Redfearn 2541069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE 2542069fd766SMatt Redfearn hex "Relocation table size" 2543069fd766SMatt Redfearn depends on RELOCATABLE 2544069fd766SMatt Redfearn range 0x0 0x01000000 2545069fd766SMatt Redfearn default "0x00100000" 2546069fd766SMatt Redfearn ---help--- 2547069fd766SMatt Redfearn A table of relocation data will be appended to the kernel binary 2548069fd766SMatt Redfearn and parsed at boot to fix up the relocated kernel. 2549069fd766SMatt Redfearn 2550069fd766SMatt Redfearn This option allows the amount of space reserved for the table to be 2551069fd766SMatt Redfearn adjusted, although the default of 1Mb should be ok in most cases. 2552069fd766SMatt Redfearn 2553069fd766SMatt Redfearn The build will fail and a valid size suggested if this is too small. 2554069fd766SMatt Redfearn 2555069fd766SMatt Redfearn If unsure, leave at the default value. 2556069fd766SMatt Redfearn 2557405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE 2558405bc8fdSMatt Redfearn bool "Randomize the address of the kernel image" 2559405bc8fdSMatt Redfearn depends on RELOCATABLE 2560405bc8fdSMatt Redfearn ---help--- 2561405bc8fdSMatt Redfearn Randomizes the physical and virtual address at which the 2562405bc8fdSMatt Redfearn kernel image is loaded, as a security feature that 2563405bc8fdSMatt Redfearn deters exploit attempts relying on knowledge of the location 2564405bc8fdSMatt Redfearn of kernel internals. 2565405bc8fdSMatt Redfearn 2566405bc8fdSMatt Redfearn Entropy is generated using any coprocessor 0 registers available. 2567405bc8fdSMatt Redfearn 2568405bc8fdSMatt Redfearn The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2569405bc8fdSMatt Redfearn 2570405bc8fdSMatt Redfearn If unsure, say N. 2571405bc8fdSMatt Redfearn 2572405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET 2573405bc8fdSMatt Redfearn hex "Maximum kASLR offset" if EXPERT 2574405bc8fdSMatt Redfearn depends on RANDOMIZE_BASE 2575405bc8fdSMatt Redfearn range 0x0 0x40000000 if EVA || 64BIT 2576405bc8fdSMatt Redfearn range 0x0 0x08000000 2577405bc8fdSMatt Redfearn default "0x01000000" 2578405bc8fdSMatt Redfearn ---help--- 2579405bc8fdSMatt Redfearn When kASLR is active, this provides the maximum offset that will 2580405bc8fdSMatt Redfearn be applied to the kernel image. It should be set according to the 2581405bc8fdSMatt Redfearn amount of physical RAM available in the target system minus 2582405bc8fdSMatt Redfearn PHYSICAL_START and must be a power of 2. 2583405bc8fdSMatt Redfearn 2584405bc8fdSMatt Redfearn This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2585405bc8fdSMatt Redfearn EVA or 64-bit. The default is 16Mb. 2586405bc8fdSMatt Redfearn 2587c80d79d7SYasunori Gotoconfig NODES_SHIFT 2588c80d79d7SYasunori Goto int 2589c80d79d7SYasunori Goto default "6" 2590c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2591c80d79d7SYasunori Goto 259214f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 259314f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 259423021b2bSYang Shi depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) 259514f70012SDeng-Cheng Zhu default y 259614f70012SDeng-Cheng Zhu help 259714f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 259814f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 259914f70012SDeng-Cheng Zhu 2600b4819b59SYoichi Yuasasource "mm/Kconfig" 2601b4819b59SYoichi Yuasa 26021da177e4SLinus Torvaldsconfig SMP 26031da177e4SLinus Torvalds bool "Multi-Processing support" 2604e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2605e73ea273SRalf Baechle help 26061da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 26074a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 26084a474157SRobert Graffham than one CPU, say Y. 26091da177e4SLinus Torvalds 26104a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 26111da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 26121da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 26134a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 26141da177e4SLinus Torvalds will run faster if you say N here. 26151da177e4SLinus Torvalds 26161da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 26171da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 26181da177e4SLinus Torvalds 261903502faaSAdrian Bunk See also the SMP-HOWTO available at 262003502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 26211da177e4SLinus Torvalds 26221da177e4SLinus Torvalds If you don't know what to do here, say N. 26231da177e4SLinus Torvalds 262487353d8aSRalf Baechleconfig SMP_UP 262587353d8aSRalf Baechle bool 262687353d8aSRalf Baechle 26274a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 26284a16ff4cSRalf Baechle bool 26294a16ff4cSRalf Baechle 26300ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 26310ee958e1SPaul Burton bool 26320ee958e1SPaul Burton 2633e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2634e73ea273SRalf Baechle bool 2635e73ea273SRalf Baechle 2636130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2637130e2fb7SRalf Baechle bool 2638130e2fb7SRalf Baechle 2639130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2640130e2fb7SRalf Baechle bool 2641130e2fb7SRalf Baechle 2642130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2643130e2fb7SRalf Baechle bool 2644130e2fb7SRalf Baechle 2645130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2646130e2fb7SRalf Baechle bool 2647130e2fb7SRalf Baechle 2648130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2649130e2fb7SRalf Baechle bool 2650130e2fb7SRalf Baechle 26511da177e4SLinus Torvaldsconfig NR_CPUS 2652a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2653a91796a9SJayachandran C range 2 256 26541da177e4SLinus Torvalds depends on SMP 2655130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2656130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2657130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2658130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2659130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 26601da177e4SLinus Torvalds help 26611da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 26621da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 26631da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 266472ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 266572ede9b1SAtsushi Nemoto and 2 for all others. 26661da177e4SLinus Torvalds 26671da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 266872ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 266972ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 267072ede9b1SAtsushi Nemoto power of two. 26711da177e4SLinus Torvalds 2672399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2673399aaa25SAl Cooper bool 2674399aaa25SAl Cooper 26751723b4a3SAtsushi Nemoto# 26761723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 26771723b4a3SAtsushi Nemoto# 26781723b4a3SAtsushi Nemoto 26791723b4a3SAtsushi Nemotochoice 26801723b4a3SAtsushi Nemoto prompt "Timer frequency" 26811723b4a3SAtsushi Nemoto default HZ_250 26821723b4a3SAtsushi Nemoto help 26831723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 26841723b4a3SAtsushi Nemoto 268567596573SPaul Burton config HZ_24 268667596573SPaul Burton bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 268767596573SPaul Burton 26881723b4a3SAtsushi Nemoto config HZ_48 26890f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 26901723b4a3SAtsushi Nemoto 26911723b4a3SAtsushi Nemoto config HZ_100 26921723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 26931723b4a3SAtsushi Nemoto 26941723b4a3SAtsushi Nemoto config HZ_128 26951723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 26961723b4a3SAtsushi Nemoto 26971723b4a3SAtsushi Nemoto config HZ_250 26981723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 26991723b4a3SAtsushi Nemoto 27001723b4a3SAtsushi Nemoto config HZ_256 27011723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 27021723b4a3SAtsushi Nemoto 27031723b4a3SAtsushi Nemoto config HZ_1000 27041723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 27051723b4a3SAtsushi Nemoto 27061723b4a3SAtsushi Nemoto config HZ_1024 27071723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 27081723b4a3SAtsushi Nemoto 27091723b4a3SAtsushi Nemotoendchoice 27101723b4a3SAtsushi Nemoto 271167596573SPaul Burtonconfig SYS_SUPPORTS_24HZ 271267596573SPaul Burton bool 271367596573SPaul Burton 27141723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 27151723b4a3SAtsushi Nemoto bool 27161723b4a3SAtsushi Nemoto 27171723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 27181723b4a3SAtsushi Nemoto bool 27191723b4a3SAtsushi Nemoto 27201723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 27211723b4a3SAtsushi Nemoto bool 27221723b4a3SAtsushi Nemoto 27231723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 27241723b4a3SAtsushi Nemoto bool 27251723b4a3SAtsushi Nemoto 27261723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 27271723b4a3SAtsushi Nemoto bool 27281723b4a3SAtsushi Nemoto 27291723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 27301723b4a3SAtsushi Nemoto bool 27311723b4a3SAtsushi Nemoto 27321723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 27331723b4a3SAtsushi Nemoto bool 27341723b4a3SAtsushi Nemoto 27351723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 27361723b4a3SAtsushi Nemoto bool 273767596573SPaul Burton default y if !SYS_SUPPORTS_24HZ && \ 273867596573SPaul Burton !SYS_SUPPORTS_48HZ && \ 273967596573SPaul Burton !SYS_SUPPORTS_100HZ && \ 274067596573SPaul Burton !SYS_SUPPORTS_128HZ && \ 274167596573SPaul Burton !SYS_SUPPORTS_250HZ && \ 274267596573SPaul Burton !SYS_SUPPORTS_256HZ && \ 274367596573SPaul Burton !SYS_SUPPORTS_1000HZ && \ 27441723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 27451723b4a3SAtsushi Nemoto 27461723b4a3SAtsushi Nemotoconfig HZ 27471723b4a3SAtsushi Nemoto int 274867596573SPaul Burton default 24 if HZ_24 27491723b4a3SAtsushi Nemoto default 48 if HZ_48 27501723b4a3SAtsushi Nemoto default 100 if HZ_100 27511723b4a3SAtsushi Nemoto default 128 if HZ_128 27521723b4a3SAtsushi Nemoto default 250 if HZ_250 27531723b4a3SAtsushi Nemoto default 256 if HZ_256 27541723b4a3SAtsushi Nemoto default 1000 if HZ_1000 27551723b4a3SAtsushi Nemoto default 1024 if HZ_1024 27561723b4a3SAtsushi Nemoto 275796685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 275896685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 275996685b17SDeng-Cheng Zhu 2760e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 27611da177e4SLinus Torvalds 2762ea6e942bSAtsushi Nemotoconfig KEXEC 27637d60717eSKees Cook bool "Kexec system call" 27642965faa5SDave Young select KEXEC_CORE 2765ea6e942bSAtsushi Nemoto help 2766ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2767ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 27683dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2769ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2770ea6e942bSAtsushi Nemoto 277101dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2772ea6e942bSAtsushi Nemoto 2773ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2774ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2775bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2776bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2777bf220695SGeert Uytterhoeven made. 2778ea6e942bSAtsushi Nemoto 27797aa1c8f4SRalf Baechleconfig CRASH_DUMP 27807aa1c8f4SRalf Baechle bool "Kernel crash dumps" 27817aa1c8f4SRalf Baechle help 27827aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 27837aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 27847aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 27857aa1c8f4SRalf Baechle a specially reserved region and then later executed after 27867aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 27877aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 27887aa1c8f4SRalf Baechle PHYSICAL_START. 27897aa1c8f4SRalf Baechle 27907aa1c8f4SRalf Baechleconfig PHYSICAL_START 27917aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 27927aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 27937aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 27947aa1c8f4SRalf Baechle depends on CRASH_DUMP 27957aa1c8f4SRalf Baechle help 27967aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 27977aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 27987aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 27997aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 28007aa1c8f4SRalf Baechle passed to the panic-ed kernel). 28017aa1c8f4SRalf Baechle 2802ea6e942bSAtsushi Nemotoconfig SECCOMP 2803ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2804293c5bd1SRalf Baechle depends on PROC_FS 2805ea6e942bSAtsushi Nemoto default y 2806ea6e942bSAtsushi Nemoto help 2807ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2808ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2809ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2810ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2811ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2812ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2813ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2814ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2815ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2816ea6e942bSAtsushi Nemoto 2817ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2818ea6e942bSAtsushi Nemoto 2819597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 28200ce3417eSPaul Burton bool "Support for O32 binaries using 64-bit FP" 2821597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2822597ce172SPaul Burton help 2823597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2824597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2825597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2826597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2827597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2828597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2829597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2830597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2831597ce172SPaul Burton saying N here. 2832597ce172SPaul Burton 283306e2e882SPaul Burton Although binutils currently supports use of this flag the details 283406e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 283506e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 283606e2e882SPaul Burton behaviour before the details have been finalised, this option should 283706e2e882SPaul Burton be considered experimental and only enabled by those working upon 283806e2e882SPaul Burton said details. 283906e2e882SPaul Burton 284006e2e882SPaul Burton If unsure, say N. 2841597ce172SPaul Burton 2842f2ffa5abSDezhong Diaoconfig USE_OF 28430b3e06fdSJonas Gorski bool 2844f2ffa5abSDezhong Diao select OF 2845e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2846abd2363fSGrant Likely select IRQ_DOMAIN 2847f2ffa5abSDezhong Diao 28487fafb068SAndrew Brestickerconfig BUILTIN_DTB 28497fafb068SAndrew Bresticker bool 28507fafb068SAndrew Bresticker 28511da8f179SJonas Gorskichoice 28525b24d52cSJonas Gorski prompt "Kernel appended dtb support" if USE_OF 28531da8f179SJonas Gorski default MIPS_NO_APPENDED_DTB 28541da8f179SJonas Gorski 28551da8f179SJonas Gorski config MIPS_NO_APPENDED_DTB 28561da8f179SJonas Gorski bool "None" 28571da8f179SJonas Gorski help 28581da8f179SJonas Gorski Do not enable appended dtb support. 28591da8f179SJonas Gorski 286087db537dSAaro Koskinen config MIPS_ELF_APPENDED_DTB 286187db537dSAaro Koskinen bool "vmlinux" 286287db537dSAaro Koskinen help 286387db537dSAaro Koskinen With this option, the boot code will look for a device tree binary 286487db537dSAaro Koskinen DTB) included in the vmlinux ELF section .appended_dtb. By default 286587db537dSAaro Koskinen it is empty and the DTB can be appended using binutils command 286687db537dSAaro Koskinen objcopy: 286787db537dSAaro Koskinen 286887db537dSAaro Koskinen objcopy --update-section .appended_dtb=<filename>.dtb vmlinux 286987db537dSAaro Koskinen 287087db537dSAaro Koskinen This is meant as a backward compatiblity convenience for those 287187db537dSAaro Koskinen systems with a bootloader that can't be upgraded to accommodate 287287db537dSAaro Koskinen the documented boot protocol using a device tree. 287387db537dSAaro Koskinen 28741da8f179SJonas Gorski config MIPS_RAW_APPENDED_DTB 28751da8f179SJonas Gorski bool "vmlinux.bin" 28761da8f179SJonas Gorski help 28771da8f179SJonas Gorski With this option, the boot code will look for a device tree binary 28781da8f179SJonas Gorski DTB) appended to raw vmlinux.bin (without decompressor). 28791da8f179SJonas Gorski (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 28801da8f179SJonas Gorski 28811da8f179SJonas Gorski This is meant as a backward compatibility convenience for those 28821da8f179SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 28831da8f179SJonas Gorski the documented boot protocol using a device tree. 28841da8f179SJonas Gorski 28851da8f179SJonas Gorski Beware that there is very little in terms of protection against 28861da8f179SJonas Gorski this option being confused by leftover garbage in memory that might 28871da8f179SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 28881da8f179SJonas Gorski to vmlinux.bin. Do not leave this option active in a production kernel 28891da8f179SJonas Gorski if you don't intend to always append a DTB. 2890c0b4e101SJonas Gorski 2891c0b4e101SJonas Gorski config MIPS_ZBOOT_APPENDED_DTB 2892c0b4e101SJonas Gorski bool "vmlinuz.bin" 2893c0b4e101SJonas Gorski depends on SYS_SUPPORTS_ZBOOT 2894c0b4e101SJonas Gorski help 2895c0b4e101SJonas Gorski With this option, the boot code will look for a device tree binary 2896c0b4e101SJonas Gorski DTB) appended to raw vmlinuz.bin (with decompressor). 2897c0b4e101SJonas Gorski (e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb). 2898c0b4e101SJonas Gorski 2899c0b4e101SJonas Gorski This is meant as a backward compatibility convenience for those 2900c0b4e101SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 2901c0b4e101SJonas Gorski the documented boot protocol using a device tree. 2902c0b4e101SJonas Gorski 2903c0b4e101SJonas Gorski Beware that there is very little in terms of protection against 2904c0b4e101SJonas Gorski this option being confused by leftover garbage in memory that might 2905c0b4e101SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 2906c0b4e101SJonas Gorski to vmlinuz.bin. Do not leave this option active in a production kernel 2907c0b4e101SJonas Gorski if you don't intend to always append a DTB. 29081da8f179SJonas Gorskiendchoice 29091da8f179SJonas Gorski 29102024972eSJonas Gorskichoice 29112024972eSJonas Gorski prompt "Kernel command line type" if !CMDLINE_OVERRIDE 29122bcef9b4SJonas Gorski default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 29132bcef9b4SJonas Gorski !MIPS_MALTA && !MIPS_SEAD3 && \ 29142bcef9b4SJonas Gorski !CAVIUM_OCTEON_SOC 29152024972eSJonas Gorski default MIPS_CMDLINE_FROM_BOOTLOADER 29162024972eSJonas Gorski 29172024972eSJonas Gorski config MIPS_CMDLINE_FROM_DTB 29182024972eSJonas Gorski depends on USE_OF 29192024972eSJonas Gorski bool "Dtb kernel arguments if available" 29202024972eSJonas Gorski 29212024972eSJonas Gorski config MIPS_CMDLINE_DTB_EXTEND 29222024972eSJonas Gorski depends on USE_OF 29232024972eSJonas Gorski bool "Extend dtb kernel arguments with bootloader arguments" 29242024972eSJonas Gorski 29252024972eSJonas Gorski config MIPS_CMDLINE_FROM_BOOTLOADER 29262024972eSJonas Gorski bool "Bootloader kernel arguments if available" 29272024972eSJonas Gorskiendchoice 29282024972eSJonas Gorski 29295e83d430SRalf Baechleendmenu 29305e83d430SRalf Baechle 29311df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 29321df0f0ffSAtsushi Nemoto bool 29331df0f0ffSAtsushi Nemoto default y 29341df0f0ffSAtsushi Nemoto 29351df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 29361df0f0ffSAtsushi Nemoto bool 29371df0f0ffSAtsushi Nemoto default y 29381df0f0ffSAtsushi Nemoto 2939e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT 2940e1e16115SAaro Koskinen bool 2941e1e16115SAaro Koskinen default y 2942e1e16115SAaro Koskinen 2943a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 2944a728ab52SKirill A. Shutemov int 2945a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 2946a728ab52SKirill A. Shutemov default 2 2947a728ab52SKirill A. Shutemov 2948b6c3539bSRalf Baechlesource "init/Kconfig" 2949b6c3539bSRalf Baechle 2950dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2951dc52ddc0SMatt Helsley 29521da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 29531da177e4SLinus Torvalds 29545e83d430SRalf Baechleconfig HW_HAS_EISA 29555e83d430SRalf Baechle bool 29561da177e4SLinus Torvaldsconfig HW_HAS_PCI 29571da177e4SLinus Torvalds bool 29581da177e4SLinus Torvalds 29591da177e4SLinus Torvaldsconfig PCI 29601da177e4SLinus Torvalds bool "Support for PCI controller" 29611da177e4SLinus Torvalds depends on HW_HAS_PCI 2962abb4ae46SRalf Baechle select PCI_DOMAINS 29630f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 29641da177e4SLinus Torvalds help 29651da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 29661da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 29671da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 29681da177e4SLinus Torvalds say Y, otherwise N. 29691da177e4SLinus Torvalds 29700e476d91SHuacai Chenconfig HT_PCI 29710e476d91SHuacai Chen bool "Support for HT-linked PCI" 29720e476d91SHuacai Chen default y 29730e476d91SHuacai Chen depends on CPU_LOONGSON3 29740e476d91SHuacai Chen select PCI 29750e476d91SHuacai Chen select PCI_DOMAINS 29760e476d91SHuacai Chen help 29770e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 29780e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 29790e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 29800e476d91SHuacai Chen 29811da177e4SLinus Torvaldsconfig PCI_DOMAINS 29821da177e4SLinus Torvalds bool 29831da177e4SLinus Torvalds 29841da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 29851da177e4SLinus Torvalds 29861da177e4SLinus Torvalds# 29871da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 29881da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 29891da177e4SLinus Torvalds# users to choose the right thing ... 29901da177e4SLinus Torvalds# 29911da177e4SLinus Torvaldsconfig ISA 29921da177e4SLinus Torvalds bool 29931da177e4SLinus Torvalds 29941da177e4SLinus Torvaldsconfig EISA 29951da177e4SLinus Torvalds bool "EISA support" 29965e83d430SRalf Baechle depends on HW_HAS_EISA 29971da177e4SLinus Torvalds select ISA 2998aa414dffSRalf Baechle select GENERIC_ISA_DMA 29991da177e4SLinus Torvalds ---help--- 30001da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 30011da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 30021da177e4SLinus Torvalds 30031da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 30041da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 30051da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 30061da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 30071da177e4SLinus Torvalds 30081da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 30091da177e4SLinus Torvalds 30101da177e4SLinus Torvalds Otherwise, say N. 30111da177e4SLinus Torvalds 30121da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 30131da177e4SLinus Torvalds 30141da177e4SLinus Torvaldsconfig TC 30151da177e4SLinus Torvalds bool "TURBOchannel support" 30161da177e4SLinus Torvalds depends on MACH_DECSTATION 30171da177e4SLinus Torvalds help 301850a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 301950a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 302050a23e6eSJustin P. Mattock at: 302150a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 302250a23e6eSJustin P. Mattock and: 302350a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 302450a23e6eSJustin P. Mattock Linux driver support status is documented at: 302550a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 30261da177e4SLinus Torvalds 30271da177e4SLinus Torvaldsconfig MMU 30281da177e4SLinus Torvalds bool 30291da177e4SLinus Torvalds default y 30301da177e4SLinus Torvalds 3031d865bea4SRalf Baechleconfig I8253 3032d865bea4SRalf Baechle bool 3033798778b8SRussell King select CLKSRC_I8253 30342d02612fSThomas Gleixner select CLKEVT_I8253 30359726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 3036d865bea4SRalf Baechle 3037e05eb3f8SRalf Baechleconfig ZONE_DMA 3038e05eb3f8SRalf Baechle bool 3039e05eb3f8SRalf Baechle 3040cce335aeSRalf Baechleconfig ZONE_DMA32 3041cce335aeSRalf Baechle bool 3042cce335aeSRalf Baechle 30431da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 30441da177e4SLinus Torvalds 3045388b78adSAlexandre Bounineconfig RAPIDIO 304656abde72SAlexandre Bounine tristate "RapidIO support" 3047388b78adSAlexandre Bounine depends on PCI 3048388b78adSAlexandre Bounine default n 3049388b78adSAlexandre Bounine help 3050388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 3051388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 3052388b78adSAlexandre Bounine 3053388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 3054388b78adSAlexandre Bounine 30551da177e4SLinus Torvaldsendmenu 30561da177e4SLinus Torvalds 30571da177e4SLinus Torvaldsmenu "Executable file formats" 30581da177e4SLinus Torvalds 30591da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 30601da177e4SLinus Torvalds 30611da177e4SLinus Torvaldsconfig TRAD_SIGNALS 30621da177e4SLinus Torvalds bool 30631da177e4SLinus Torvalds 30641da177e4SLinus Torvaldsconfig MIPS32_COMPAT 306578aaf956SRalf Baechle bool 30661da177e4SLinus Torvalds 30671da177e4SLinus Torvaldsconfig COMPAT 30681da177e4SLinus Torvalds bool 30691da177e4SLinus Torvalds 307005e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 307105e43966SAtsushi Nemoto bool 307205e43966SAtsushi Nemoto 30731da177e4SLinus Torvaldsconfig MIPS32_O32 30741da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 307578aaf956SRalf Baechle depends on 64BIT 307678aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 307778aaf956SRalf Baechle select COMPAT 307878aaf956SRalf Baechle select MIPS32_COMPAT 307978aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 30801da177e4SLinus Torvalds help 30811da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 30821da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 30831da177e4SLinus Torvalds existing binaries are in this format. 30841da177e4SLinus Torvalds 30851da177e4SLinus Torvalds If unsure, say Y. 30861da177e4SLinus Torvalds 30871da177e4SLinus Torvaldsconfig MIPS32_N32 30881da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 3089c22eacfeSRalf Baechle depends on 64BIT 309078aaf956SRalf Baechle select COMPAT 309178aaf956SRalf Baechle select MIPS32_COMPAT 309278aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 30931da177e4SLinus Torvalds help 30941da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 30951da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 30961da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 30971da177e4SLinus Torvalds cases. 30981da177e4SLinus Torvalds 30991da177e4SLinus Torvalds If unsure, say N. 31001da177e4SLinus Torvalds 31011da177e4SLinus Torvaldsconfig BINFMT_ELF32 31021da177e4SLinus Torvalds bool 31031da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 31041da177e4SLinus Torvalds 31052116245eSRalf Baechleendmenu 31061da177e4SLinus Torvalds 31072116245eSRalf Baechlemenu "Power management options" 3108952fa954SRodolfo Giometti 3109363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 3110363c55caSWu Zhangjin def_bool y 31113f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3112363c55caSWu Zhangjin 3113f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 3114f4cb5700SJohannes Berg def_bool y 31153f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3116f4cb5700SJohannes Berg 31172116245eSRalf Baechlesource "kernel/power/Kconfig" 3118952fa954SRodolfo Giometti 31191da177e4SLinus Torvaldsendmenu 31201da177e4SLinus Torvalds 31217a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 31227a998935SViresh Kumar bool 31237a998935SViresh Kumar 31247a998935SViresh Kumarmenu "CPU Power Management" 3125c095ebafSPaul Burton 3126c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 31277a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 31287a998935SViresh Kumarendif 31299726b43aSWu Zhangjin 3130c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 3131c095ebafSPaul Burton 3132c095ebafSPaul Burtonendmenu 3133c095ebafSPaul Burton 3134d5950b43SSam Ravnborgsource "net/Kconfig" 3135d5950b43SSam Ravnborg 31361da177e4SLinus Torvaldssource "drivers/Kconfig" 31371da177e4SLinus Torvalds 313898cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 313998cdee0eSRalf Baechle 31401da177e4SLinus Torvaldssource "fs/Kconfig" 31411da177e4SLinus Torvalds 31421da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 31431da177e4SLinus Torvalds 31441da177e4SLinus Torvaldssource "security/Kconfig" 31451da177e4SLinus Torvalds 31461da177e4SLinus Torvaldssource "crypto/Kconfig" 31471da177e4SLinus Torvalds 31481da177e4SLinus Torvaldssource "lib/Kconfig" 31492235a54dSSanjay Lal 31502235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 3151