11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 440e084a5SRalf Baechle select ARCH_SUPPORTS_UPROBES 5a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 6393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 75fac4f7aSPaul Burton select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 81ee3630aSRalf Baechle select ARCH_USE_BUILTIN_BSWAP 9c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 10f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 11ec7748b5SSam Ravnborg select HAVE_IDE 1242d4b839SMathieu Desnoyers select HAVE_OPROFILE 137f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 147f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1588547001SJason Wessel select HAVE_ARCH_KGDB 16490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 17c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 186077776bSDaniel Borkmann select HAVE_CBPF_JIT if !CPU_MICROMIPS 19d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 20538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 21538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2264575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2329c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 24c1bf207dSDavid Daney select HAVE_KPROBES 25c1bf207dSDavid Daney select HAVE_KRETPROBES 26fb59e394SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 27b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 281d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 292b68f6caSKees Cook select ARCH_HAS_ELF_RANDOMIZE 30383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 3130ad29bbSHuacai Chen select RTC_LIB if !MACH_LOONGSON64 322b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 337463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 34f4649382SZubair Lutfullah Kakakhel select HAVE_DMA_CONTIGUOUS 3548e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 363bd27e32SDavid Daney select GENERIC_IRQ_PROBE 37f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3878857614SMarkos Chandras select GENERIC_PCI_IOMAP 3994bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 40c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 410f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 429d15ffc8STejun Heo select HAVE_MEMBLOCK 439d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 449d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 45360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 464b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 47cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 48929de4ccSDeng-Cheng Zhu select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 49cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 50786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 5142a0bb3fSPetr Mladek select HAVE_NMI 524febd95aSStephen Rothwell select VIRT_TO_BUS 532f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 542f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5550150d2bSAl Viro select CLONE_BACKWARDS 56d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5719952a92SKees Cook select HAVE_CC_STACKPROTECTOR 58b1d4c6caSJames Hogan select CPU_PM if CPU_IDLE 59cc7964afSPaul Burton select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 6090cee759SPaul Burton select ARCH_BINFMT_ELF_STATE 61d79d853dSMarkos Chandras select SYSCTL_EXCEPTION_TRACE 62bb877e96SDeng-Cheng Zhu select HAVE_VIRT_CPU_ACCOUNTING_GEN 63ec9ddad3SDeng-Cheng Zhu select HAVE_IRQ_TIME_ACCOUNTING 64a7f4df4eSAlex Smith select GENERIC_TIME_VSYSCALL 65a7f4df4eSAlex Smith select ARCH_CLOCKSOURCE_DATA 661d2753a6SDavid Daney select HANDLE_DOMAIN_IRQ 67*432c6bacSPaul Burton select HAVE_EXIT_THREAD 681da177e4SLinus Torvalds 691da177e4SLinus Torvaldsmenu "Machine selection" 701da177e4SLinus Torvalds 715e83d430SRalf Baechlechoice 725e83d430SRalf Baechle prompt "System type" 735e83d430SRalf Baechle default SGI_IP22 741da177e4SLinus Torvalds 7542a4f17dSManuel Laussconfig MIPS_ALCHEMY 76c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 7734adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 78f772cdb2SRalf Baechle select CEVT_R4K 79d7ea335cSSteven J. Hill select CSRC_R4K 8067e38cf2SRalf Baechle select IRQ_MIPS_CPU 8188e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 8242a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 8342a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 8442a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 85d30a2b47SLinus Walleij select GPIOLIB 861b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 8747440229SManuel Lauss select COMMON_CLK 881da177e4SLinus Torvalds 897ca5dc14SFlorian Fainelliconfig AR7 907ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 917ca5dc14SFlorian Fainelli select BOOT_ELF32 927ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 937ca5dc14SFlorian Fainelli select CEVT_R4K 947ca5dc14SFlorian Fainelli select CSRC_R4K 9567e38cf2SRalf Baechle select IRQ_MIPS_CPU 967ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 977ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 987ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 997ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 1007ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 1017ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 102377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1031b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 104d30a2b47SLinus Walleij select GPIOLIB 1057ca5dc14SFlorian Fainelli select VLYNQ 1068551fb64SYoichi Yuasa select HAVE_CLK 1077ca5dc14SFlorian Fainelli help 1087ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1097ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1107ca5dc14SFlorian Fainelli 11143cc739fSSergey Ryazanovconfig ATH25 11243cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 11343cc739fSSergey Ryazanov select CEVT_R4K 11443cc739fSSergey Ryazanov select CSRC_R4K 11543cc739fSSergey Ryazanov select DMA_NONCOHERENT 11667e38cf2SRalf Baechle select IRQ_MIPS_CPU 1171753e74eSSergey Ryazanov select IRQ_DOMAIN 11843cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 11943cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 12043cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1218aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 12243cc739fSSergey Ryazanov help 12343cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 12443cc739fSSergey Ryazanov 125d4a67d9dSGabor Juhosconfig ATH79 126d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 127ff591a91SAlban Bedel select ARCH_HAS_RESET_CONTROLLER 128d4a67d9dSGabor Juhos select BOOT_RAW 129d4a67d9dSGabor Juhos select CEVT_R4K 130d4a67d9dSGabor Juhos select CSRC_R4K 131d4a67d9dSGabor Juhos select DMA_NONCOHERENT 132d30a2b47SLinus Walleij select GPIOLIB 13394638067SGabor Juhos select HAVE_CLK 134411520afSAlban Bedel select COMMON_CLK 1352c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 13667e38cf2SRalf Baechle select IRQ_MIPS_CPU 1370aabf1a4SGabor Juhos select MIPS_MACHINE 138d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 139d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 140d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 141d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 142377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 143b3f0a250SAlban Bedel select SYS_SUPPORTS_ZBOOT_UART_PROM 14403c8c407SAlban Bedel select USE_OF 145d4a67d9dSGabor Juhos help 146d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 147d4a67d9dSGabor Juhos 1485f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 1495f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 150d666cd02SKevin Cernekee select BOOT_RAW 151d666cd02SKevin Cernekee select NO_EXCEPT_FILL 152d666cd02SKevin Cernekee select USE_OF 153d666cd02SKevin Cernekee select CEVT_R4K 154d666cd02SKevin Cernekee select CSRC_R4K 155d666cd02SKevin Cernekee select SYNC_R4K 156d666cd02SKevin Cernekee select COMMON_CLK 157c7c42ec2SSimon Arlott select BCM6345_L1_IRQ 15860b858f2SKevin Cernekee select BCM7038_L1_IRQ 15960b858f2SKevin Cernekee select BCM7120_L2_IRQ 16060b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 16167e38cf2SRalf Baechle select IRQ_MIPS_CPU 16260b858f2SKevin Cernekee select DMA_NONCOHERENT 163d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 16460b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 165d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 166d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 16760b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 16860b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 16960b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 170d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 171d666cd02SKevin Cernekee select SWAP_IO_SPACE 17260b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 17360b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 17460b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 17560b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 176d666cd02SKevin Cernekee help 1775f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 1785f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 1795f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 1805f2d4459SKevin Cernekee must be set appropriately for your board. 181d666cd02SKevin Cernekee 1821c0c13ebSAurelien Jarnoconfig BCM47XX 183c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 184fe08f8c2SHauke Mehrtens select BOOT_RAW 18542f77542SRalf Baechle select CEVT_R4K 186940f6b48SRalf Baechle select CSRC_R4K 1871c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1881c0c13ebSAurelien Jarno select HW_HAS_PCI 18967e38cf2SRalf Baechle select IRQ_MIPS_CPU 190314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 191dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1921c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1931c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 194377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 19525e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 196e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 197c949c0bcSRafał Miłecki select GPIOLIB 198c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 199f6e734a8SRafał Miłecki select BCM47XX_NVRAM 2002ab71a02SRafał Miłecki select BCM47XX_SPROM 2011c0c13ebSAurelien Jarno help 2021c0c13ebSAurelien Jarno Support for BCM47XX based boards 2031c0c13ebSAurelien Jarno 204e7300d04SMaxime Bizonconfig BCM63XX 205e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 206ae8de61cSFlorian Fainelli select BOOT_RAW 207e7300d04SMaxime Bizon select CEVT_R4K 208e7300d04SMaxime Bizon select CSRC_R4K 209fc264022SJonas Gorski select SYNC_R4K 210e7300d04SMaxime Bizon select DMA_NONCOHERENT 21167e38cf2SRalf Baechle select IRQ_MIPS_CPU 212e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 213e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 214e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 215e7300d04SMaxime Bizon select SWAP_IO_SPACE 216d30a2b47SLinus Walleij select GPIOLIB 2173e82eeebSYoichi Yuasa select HAVE_CLK 218af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 219e7300d04SMaxime Bizon help 220e7300d04SMaxime Bizon Support for BCM63XX based boards 221e7300d04SMaxime Bizon 2221da177e4SLinus Torvaldsconfig MIPS_COBALT 2233fa986faSMartin Michlmayr bool "Cobalt Server" 22442f77542SRalf Baechle select CEVT_R4K 225940f6b48SRalf Baechle select CSRC_R4K 2261097c6acSYoichi Yuasa select CEVT_GT641XX 2271da177e4SLinus Torvalds select DMA_NONCOHERENT 2281da177e4SLinus Torvalds select HW_HAS_PCI 229d865bea4SRalf Baechle select I8253 2301da177e4SLinus Torvalds select I8259 23167e38cf2SRalf Baechle select IRQ_MIPS_CPU 232d5ab1a69SYoichi Yuasa select IRQ_GT641XX 233252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 234e25bfc92SYoichi Yuasa select PCI 2357cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 2360a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 237ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2380e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 2395e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 240e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 2411da177e4SLinus Torvalds 2421da177e4SLinus Torvaldsconfig MACH_DECSTATION 2433fa986faSMartin Michlmayr bool "DECstations" 2441da177e4SLinus Torvalds select BOOT_ELF32 2456457d9fcSYoichi Yuasa select CEVT_DS1287 24681d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 2474247417dSYoichi Yuasa select CSRC_IOASIC 24881d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 24920d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 25020d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 25120d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 2521da177e4SLinus Torvalds select DMA_NONCOHERENT 253ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 25467e38cf2SRalf Baechle select IRQ_MIPS_CPU 2557cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 2567cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 257ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2587d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2595e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 2601723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 2611723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 2621723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 263930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 2645e83d430SRalf Baechle help 2651da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 2661da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 2671da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 2681da177e4SLinus Torvalds 2691da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 2701da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 2711da177e4SLinus Torvalds 2721da177e4SLinus Torvalds DECstation 5000/50 2731da177e4SLinus Torvalds DECstation 5000/150 2741da177e4SLinus Torvalds DECstation 5000/260 2751da177e4SLinus Torvalds DECsystem 5900/260 2761da177e4SLinus Torvalds 2771da177e4SLinus Torvalds otherwise choose R3000. 2781da177e4SLinus Torvalds 2795e83d430SRalf Baechleconfig MACH_JAZZ 2803fa986faSMartin Michlmayr bool "Jazz family of machines" 2810e2794b0SRalf Baechle select FW_ARC 2820e2794b0SRalf Baechle select FW_ARC32 2835e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 28442f77542SRalf Baechle select CEVT_R4K 285940f6b48SRalf Baechle select CSRC_R4K 286e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2875e83d430SRalf Baechle select GENERIC_ISA_DMA 2888a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 28967e38cf2SRalf Baechle select IRQ_MIPS_CPU 290d865bea4SRalf Baechle select I8253 2915e83d430SRalf Baechle select I8259 2925e83d430SRalf Baechle select ISA 2937cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2945e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2957d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2961723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2971da177e4SLinus Torvalds help 2985e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2995e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 300692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 3015e83d430SRalf Baechle Olivetti M700-10 workstations. 3025e83d430SRalf Baechle 303de361e8bSPaul Burtonconfig MACH_INGENIC 304de361e8bSPaul Burton bool "Ingenic SoC based machines" 3055ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 3065ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 307f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 3085ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 30967e38cf2SRalf Baechle select IRQ_MIPS_CPU 310d30a2b47SLinus Walleij select GPIOLIB 311ff1930c6SPaul Burton select COMMON_CLK 31283bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 313ffb1843dSPaul Burton select BUILTIN_DTB 314ffb1843dSPaul Burton select USE_OF 3156ec127fbSPaul Burton select LIBFDT 3165ebabe59SLars-Peter Clausen 317171bb2f1SJohn Crispinconfig LANTIQ 318171bb2f1SJohn Crispin bool "Lantiq based platforms" 319171bb2f1SJohn Crispin select DMA_NONCOHERENT 32067e38cf2SRalf Baechle select IRQ_MIPS_CPU 321171bb2f1SJohn Crispin select CEVT_R4K 322171bb2f1SJohn Crispin select CSRC_R4K 323171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 324171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 325171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 326171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 327377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 328171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 329171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 330d30a2b47SLinus Walleij select GPIOLIB 331171bb2f1SJohn Crispin select SWAP_IO_SPACE 332171bb2f1SJohn Crispin select BOOT_RAW 333287e3f3fSJohn Crispin select CLKDEV_LOOKUP 334a0392222SJohn Crispin select USE_OF 3353f8c50c9SJohn Crispin select PINCTRL 3363f8c50c9SJohn Crispin select PINCTRL_LANTIQ 337c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 338c530781cSJohn Crispin select RESET_CONTROLLER 339171bb2f1SJohn Crispin 3401f21d2bdSBrian Murphyconfig LASAT 3411f21d2bdSBrian Murphy bool "LASAT Networks platforms" 34242f77542SRalf Baechle select CEVT_R4K 34316f0bbbcSRalf Baechle select CRC32 344940f6b48SRalf Baechle select CSRC_R4K 3451f21d2bdSBrian Murphy select DMA_NONCOHERENT 3461f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 3471f21d2bdSBrian Murphy select HW_HAS_PCI 34867e38cf2SRalf Baechle select IRQ_MIPS_CPU 3491f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 3501f21d2bdSBrian Murphy select MIPS_NILE4 3511f21d2bdSBrian Murphy select R5000_CPU_SCACHE 3521f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 3531f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 3541f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 3551f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 3561f21d2bdSBrian Murphy 35730ad29bbSHuacai Chenconfig MACH_LOONGSON32 35830ad29bbSHuacai Chen bool "Loongson-1 family of machines" 359c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 360ade299d8SYoichi Yuasa help 36130ad29bbSHuacai Chen This enables support for the Loongson-1 family of machines. 36285749d24SWu Zhangjin 36330ad29bbSHuacai Chen Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 36430ad29bbSHuacai Chen the Institute of Computing Technology (ICT), Chinese Academy of 36530ad29bbSHuacai Chen Sciences (CAS). 366ade299d8SYoichi Yuasa 36730ad29bbSHuacai Chenconfig MACH_LOONGSON64 36830ad29bbSHuacai Chen bool "Loongson-2/3 family of machines" 369ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 370ca585cf9SKelvin Cheung help 37130ad29bbSHuacai Chen This enables the support of Loongson-2/3 family of machines. 372ca585cf9SKelvin Cheung 37330ad29bbSHuacai Chen Loongson-2 is a family of single-core CPUs and Loongson-3 is a 37430ad29bbSHuacai Chen family of multi-core CPUs. They are both 64-bit general-purpose 37530ad29bbSHuacai Chen MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute 37630ad29bbSHuacai Chen of Computing Technology (ICT), Chinese Academy of Sciences (CAS) 37730ad29bbSHuacai Chen in the People's Republic of China. The chief architect is Professor 37830ad29bbSHuacai Chen Weiwu Hu. 379ca585cf9SKelvin Cheung 3806a438309SAndrew Brestickerconfig MACH_PISTACHIO 3816a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 3826a438309SAndrew Bresticker select BOOT_ELF32 3836a438309SAndrew Bresticker select BOOT_RAW 3846a438309SAndrew Bresticker select CEVT_R4K 3856a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 3866a438309SAndrew Bresticker select COMMON_CLK 3876a438309SAndrew Bresticker select CSRC_R4K 388645c7827SZubair Lutfullah Kakakhel select DMA_NONCOHERENT 389d30a2b47SLinus Walleij select GPIOLIB 39067e38cf2SRalf Baechle select IRQ_MIPS_CPU 3916a438309SAndrew Bresticker select LIBFDT 3926a438309SAndrew Bresticker select MFD_SYSCON 3936a438309SAndrew Bresticker select MIPS_CPU_SCACHE 3946a438309SAndrew Bresticker select MIPS_GIC 3956a438309SAndrew Bresticker select PINCTRL 3966a438309SAndrew Bresticker select REGULATOR 3976a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 3986a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 3996a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 4006a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 4016a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 40241cc07beSMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 4036a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 404018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 405018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 4066a438309SAndrew Bresticker select USE_OF 4076a438309SAndrew Bresticker help 4086a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 4096a438309SAndrew Bresticker 4109937f5ffSZubair Lutfullah Kakakhelconfig MACH_XILFPGA 4119937f5ffSZubair Lutfullah Kakakhel bool "MIPSfpga Xilinx based boards" 4129937f5ffSZubair Lutfullah Kakakhel select BOOT_ELF32 4139937f5ffSZubair Lutfullah Kakakhel select BOOT_RAW 4149937f5ffSZubair Lutfullah Kakakhel select BUILTIN_DTB 4159937f5ffSZubair Lutfullah Kakakhel select CEVT_R4K 4169937f5ffSZubair Lutfullah Kakakhel select COMMON_CLK 4179937f5ffSZubair Lutfullah Kakakhel select CSRC_R4K 418d30a2b47SLinus Walleij select GPIOLIB 4199937f5ffSZubair Lutfullah Kakakhel select IRQ_MIPS_CPU 4209937f5ffSZubair Lutfullah Kakakhel select LIBFDT 4219937f5ffSZubair Lutfullah Kakakhel select MIPS_CPU_SCACHE 4229937f5ffSZubair Lutfullah Kakakhel select SYS_HAS_EARLY_PRINTK 4239937f5ffSZubair Lutfullah Kakakhel select SYS_HAS_CPU_MIPS32_R2 4249937f5ffSZubair Lutfullah Kakakhel select SYS_SUPPORTS_32BIT_KERNEL 4259937f5ffSZubair Lutfullah Kakakhel select SYS_SUPPORTS_LITTLE_ENDIAN 4269937f5ffSZubair Lutfullah Kakakhel select SYS_SUPPORTS_ZBOOT_UART16550 4279937f5ffSZubair Lutfullah Kakakhel select USE_OF 4289937f5ffSZubair Lutfullah Kakakhel select USE_GENERIC_EARLY_PRINTK_8250 4299937f5ffSZubair Lutfullah Kakakhel help 4309937f5ffSZubair Lutfullah Kakakhel This enables support for the IMG University Program MIPSfpga platform. 4319937f5ffSZubair Lutfullah Kakakhel 4321da177e4SLinus Torvaldsconfig MIPS_MALTA 4333fa986faSMartin Michlmayr bool "MIPS Malta board" 43461ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 4351da177e4SLinus Torvalds select BOOT_ELF32 436fa71c960SRalf Baechle select BOOT_RAW 437e8823d26SPaul Burton select BUILTIN_DTB 43842f77542SRalf Baechle select CEVT_R4K 439940f6b48SRalf Baechle select CSRC_R4K 440fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 44142b002abSGuenter Roeck select COMMON_CLK 442885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 4431da177e4SLinus Torvalds select GENERIC_ISA_DMA 4448a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 44567e38cf2SRalf Baechle select IRQ_MIPS_CPU 4468a19b8f1SAndrew Bresticker select MIPS_GIC 4471da177e4SLinus Torvalds select HW_HAS_PCI 448d865bea4SRalf Baechle select I8253 4491da177e4SLinus Torvalds select I8259 4505e83d430SRalf Baechle select MIPS_BONITO64 4519318c51aSChris Dearman select MIPS_CPU_SCACHE 452a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 453252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 4545e83d430SRalf Baechle select MIPS_MSC 455ecafe3e9SPaul Burton select SMP_UP if SMP 4561da177e4SLinus Torvalds select SWAP_IO_SPACE 4577cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 4587cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 459bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 460c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 461575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 4627cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 4635d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 464575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 4657cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 4667cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 467ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 468ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4695e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 470c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 4715e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 472424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 4730365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 474e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 475377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 476f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 4779693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 4781b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 4798c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 480e8823d26SPaul Burton select USE_OF 481abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 482e81a8c7dSPaul Burton select BUILTIN_DTB 483e81a8c7dSPaul Burton select LIBFDT 4841da177e4SLinus Torvalds help 485f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 4861da177e4SLinus Torvalds board. 4871da177e4SLinus Torvalds 4882572f00dSJoshua Hendersonconfig MACH_PIC32 4892572f00dSJoshua Henderson bool "Microchip PIC32 Family" 4902572f00dSJoshua Henderson help 4912572f00dSJoshua Henderson This enables support for the Microchip PIC32 family of platforms. 4922572f00dSJoshua Henderson 4932572f00dSJoshua Henderson Microchip PIC32 is a family of general-purpose 32 bit MIPS core 4942572f00dSJoshua Henderson microcontrollers. 4952572f00dSJoshua Henderson 496ec47b274SSteven J. Hillconfig MIPS_SEAD3 497ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 498ec47b274SSteven J. Hill select BOOT_ELF32 499ec47b274SSteven J. Hill select BOOT_RAW 500f262b5f2SAndrew Bresticker select BUILTIN_DTB 501ec47b274SSteven J. Hill select CEVT_R4K 502ec47b274SSteven J. Hill select CSRC_R4K 503fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 50442b002abSGuenter Roeck select COMMON_CLK 505ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 506ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 507ec47b274SSteven J. Hill select DMA_NONCOHERENT 50867e38cf2SRalf Baechle select IRQ_MIPS_CPU 5098a19b8f1SAndrew Bresticker select MIPS_GIC 51044327236SQais Yousef select LIBFDT 511ec47b274SSteven J. Hill select MIPS_MSC 512ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 513ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 514d4594b27SPaul Burton select SYS_HAS_CPU_MIPS32_R6 515ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 516ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 517ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 518ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 519ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 520ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 521ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 522a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 523377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 5248c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 525ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 526ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 5279b731009SSteven J. Hill select USE_OF 528ec47b274SSteven J. Hill help 529ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 530ec47b274SSteven J. Hill board. 531ec47b274SSteven J. Hill 532a83860c2SRalf Baechleconfig NEC_MARKEINS 533a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 534a83860c2SRalf Baechle select SOC_EMMA2RH 535a83860c2SRalf Baechle select HW_HAS_PCI 536a83860c2SRalf Baechle help 537a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 538ade299d8SYoichi Yuasa 5395e83d430SRalf Baechleconfig MACH_VR41XX 54074142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 54142f77542SRalf Baechle select CEVT_R4K 542940f6b48SRalf Baechle select CSRC_R4K 5437cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 544377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 545d30a2b47SLinus Walleij select GPIOLIB 5465e83d430SRalf Baechle 547edb6310aSDaniel Lairdconfig NXP_STB220 548edb6310aSDaniel Laird bool "NXP STB220 board" 549edb6310aSDaniel Laird select SOC_PNX833X 550edb6310aSDaniel Laird help 551edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 552edb6310aSDaniel Laird 553edb6310aSDaniel Lairdconfig NXP_STB225 554edb6310aSDaniel Laird bool "NXP 225 board" 555edb6310aSDaniel Laird select SOC_PNX833X 556edb6310aSDaniel Laird select SOC_PNX8335 557edb6310aSDaniel Laird help 558edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 559edb6310aSDaniel Laird 5609267a30dSMarc St-Jeanconfig PMC_MSP 5619267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 56239d30c13SAnoop P A select CEVT_R4K 56339d30c13SAnoop P A select CSRC_R4K 5649267a30dSMarc St-Jean select DMA_NONCOHERENT 5659267a30dSMarc St-Jean select SWAP_IO_SPACE 5669267a30dSMarc St-Jean select NO_EXCEPT_FILL 5679267a30dSMarc St-Jean select BOOT_RAW 5689267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 5699267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 5709267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 5719267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 572377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 57367e38cf2SRalf Baechle select IRQ_MIPS_CPU 5749267a30dSMarc St-Jean select SERIAL_8250 5759267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 5769296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 5779296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 5789267a30dSMarc St-Jean help 5799267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 5809267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 5819267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 5829267a30dSMarc St-Jean a variety of MIPS cores. 5839267a30dSMarc St-Jean 584ae2b5bb6SJohn Crispinconfig RALINK 585ae2b5bb6SJohn Crispin bool "Ralink based machines" 586ae2b5bb6SJohn Crispin select CEVT_R4K 587ae2b5bb6SJohn Crispin select CSRC_R4K 588ae2b5bb6SJohn Crispin select BOOT_RAW 589ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 59067e38cf2SRalf Baechle select IRQ_MIPS_CPU 591ae2b5bb6SJohn Crispin select USE_OF 592ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 593ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 594ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 595ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 596377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 597ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 598ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 5992a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 6002a153f1cSJohn Crispin select RESET_CONTROLLER 601ae2b5bb6SJohn Crispin 6021da177e4SLinus Torvaldsconfig SGI_IP22 6033fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 6040e2794b0SRalf Baechle select FW_ARC 6050e2794b0SRalf Baechle select FW_ARC32 6061da177e4SLinus Torvalds select BOOT_ELF32 60742f77542SRalf Baechle select CEVT_R4K 608940f6b48SRalf Baechle select CSRC_R4K 609e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 6101da177e4SLinus Torvalds select DMA_NONCOHERENT 6115e83d430SRalf Baechle select HW_HAS_EISA 612d865bea4SRalf Baechle select I8253 61368de4803SThomas Bogendoerfer select I8259 6141da177e4SLinus Torvalds select IP22_CPU_SCACHE 61567e38cf2SRalf Baechle select IRQ_MIPS_CPU 616aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 617e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 618e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 61936e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 620e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 621e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 622e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 6231da177e4SLinus Torvalds select SWAP_IO_SPACE 6247cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6257cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6262b5e63f6SMartin Michlmayr # 6272b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6282b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6292b5e63f6SMartin Michlmayr # 6302b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6312b5e63f6SMartin Michlmayr # for a more details discussion 6322b5e63f6SMartin Michlmayr # 6332b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 634ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 635ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6365e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 637930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6381da177e4SLinus Torvalds help 6391da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 6401da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 6411da177e4SLinus Torvalds that runs on these, say Y here. 6421da177e4SLinus Torvalds 6431da177e4SLinus Torvaldsconfig SGI_IP27 6443fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 6450e2794b0SRalf Baechle select FW_ARC 6460e2794b0SRalf Baechle select FW_ARC64 6475e83d430SRalf Baechle select BOOT_ELF64 648e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 649634286f1SRalf Baechle select DMA_COHERENT 65036a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 6511da177e4SLinus Torvalds select HW_HAS_PCI 652130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 6537cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 654ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6555e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 656d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 6571a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 658930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6591da177e4SLinus Torvalds help 6601da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 6611da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 6621da177e4SLinus Torvalds here. 6631da177e4SLinus Torvalds 664e2defae5SThomas Bogendoerferconfig SGI_IP28 6657d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 6660e2794b0SRalf Baechle select FW_ARC 6670e2794b0SRalf Baechle select FW_ARC64 668e2defae5SThomas Bogendoerfer select BOOT_ELF64 669e2defae5SThomas Bogendoerfer select CEVT_R4K 670e2defae5SThomas Bogendoerfer select CSRC_R4K 671e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 672e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 673e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 67467e38cf2SRalf Baechle select IRQ_MIPS_CPU 675e2defae5SThomas Bogendoerfer select HW_HAS_EISA 676e2defae5SThomas Bogendoerfer select I8253 677e2defae5SThomas Bogendoerfer select I8259 678e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 679e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 6805b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 681e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 682e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 683e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 684e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 685e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 6862b5e63f6SMartin Michlmayr # 6872b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6882b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6892b5e63f6SMartin Michlmayr # 6902b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6912b5e63f6SMartin Michlmayr # for a more details discussion 6922b5e63f6SMartin Michlmayr # 6932b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 694e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 695e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 696dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 697e2defae5SThomas Bogendoerfer help 698e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 699e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 700e2defae5SThomas Bogendoerfer 7011da177e4SLinus Torvaldsconfig SGI_IP32 702cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 7030e2794b0SRalf Baechle select FW_ARC 7040e2794b0SRalf Baechle select FW_ARC32 7051da177e4SLinus Torvalds select BOOT_ELF32 70642f77542SRalf Baechle select CEVT_R4K 707940f6b48SRalf Baechle select CSRC_R4K 7081da177e4SLinus Torvalds select DMA_NONCOHERENT 7091da177e4SLinus Torvalds select HW_HAS_PCI 71067e38cf2SRalf Baechle select IRQ_MIPS_CPU 7111da177e4SLinus Torvalds select R5000_CPU_SCACHE 7121da177e4SLinus Torvalds select RM7000_CPU_SCACHE 7137cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 7147cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 7157cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 716dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 717ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 7185e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7191da177e4SLinus Torvalds help 7201da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 7211da177e4SLinus Torvalds 722ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 723ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 7245e83d430SRalf Baechle select BOOT_ELF32 7255e83d430SRalf Baechle select DMA_COHERENT 7265e83d430SRalf Baechle select SIBYTE_BCM1120 7275e83d430SRalf Baechle select SWAP_IO_SPACE 7287cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7295e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7305e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7315e83d430SRalf Baechle 732ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 733ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 7345e83d430SRalf Baechle select BOOT_ELF32 7355e83d430SRalf Baechle select DMA_COHERENT 7365e83d430SRalf Baechle select SIBYTE_BCM1120 7375e83d430SRalf Baechle select SWAP_IO_SPACE 7387cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7395e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7405e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7415e83d430SRalf Baechle 7425e83d430SRalf Baechleconfig SIBYTE_CRHONE 7433fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 7445e83d430SRalf Baechle select BOOT_ELF32 7455e83d430SRalf Baechle select DMA_COHERENT 7465e83d430SRalf Baechle select SIBYTE_BCM1125 7475e83d430SRalf Baechle select SWAP_IO_SPACE 7487cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7495e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7505e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7515e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7525e83d430SRalf Baechle 753ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 754ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 755ade299d8SYoichi Yuasa select BOOT_ELF32 756ade299d8SYoichi Yuasa select DMA_COHERENT 757ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 758ade299d8SYoichi Yuasa select SWAP_IO_SPACE 759ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 760ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 761ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 762ade299d8SYoichi Yuasa 763ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 764ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 765ade299d8SYoichi Yuasa select BOOT_ELF32 766ade299d8SYoichi Yuasa select DMA_COHERENT 767fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 768ade299d8SYoichi Yuasa select SIBYTE_SB1250 769ade299d8SYoichi Yuasa select SWAP_IO_SPACE 770ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 771ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 772ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 773ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 774cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 775ade299d8SYoichi Yuasa 776ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 777ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 778ade299d8SYoichi Yuasa select BOOT_ELF32 779ade299d8SYoichi Yuasa select DMA_COHERENT 780fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 781ade299d8SYoichi Yuasa select SIBYTE_SB1250 782ade299d8SYoichi Yuasa select SWAP_IO_SPACE 783ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 784ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 785ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 786ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 787ade299d8SYoichi Yuasa 788ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 789ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 790ade299d8SYoichi Yuasa select BOOT_ELF32 791ade299d8SYoichi Yuasa select DMA_COHERENT 792ade299d8SYoichi Yuasa select SIBYTE_SB1250 793ade299d8SYoichi Yuasa select SWAP_IO_SPACE 794ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 795ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 796ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 797ade299d8SYoichi Yuasa 798ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 799ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 800ade299d8SYoichi Yuasa select BOOT_ELF32 801ade299d8SYoichi Yuasa select DMA_COHERENT 802ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 803ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 804ade299d8SYoichi Yuasa select SWAP_IO_SPACE 805ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 806ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 807651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 808ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 809cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 810ade299d8SYoichi Yuasa 81114b36af4SThomas Bogendoerferconfig SNI_RM 81214b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 8130e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 8140e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 815aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 8165e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 8175e83d430SRalf Baechle select BOOT_ELF32 81842f77542SRalf Baechle select CEVT_R4K 819940f6b48SRalf Baechle select CSRC_R4K 820e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 8215e83d430SRalf Baechle select DMA_NONCOHERENT 8225e83d430SRalf Baechle select GENERIC_ISA_DMA 8238a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 8245e83d430SRalf Baechle select HW_HAS_EISA 8255e83d430SRalf Baechle select HW_HAS_PCI 82667e38cf2SRalf Baechle select IRQ_MIPS_CPU 827d865bea4SRalf Baechle select I8253 8285e83d430SRalf Baechle select I8259 8295e83d430SRalf Baechle select ISA 8304a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 8317cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 8324a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 833c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 8344a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 83536a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 836ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 8377d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 8384a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 8395e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 8405e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8411da177e4SLinus Torvalds help 84214b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 84314b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 8445e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 8455e83d430SRalf Baechle support this machine type. 8461da177e4SLinus Torvalds 847edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 848edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 8495e83d430SRalf Baechle 850edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 851edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 85223fbee9dSRalf Baechle 85373b4390fSRalf Baechleconfig MIKROTIK_RB532 85473b4390fSRalf Baechle bool "Mikrotik RB532 boards" 85573b4390fSRalf Baechle select CEVT_R4K 85673b4390fSRalf Baechle select CSRC_R4K 85773b4390fSRalf Baechle select DMA_NONCOHERENT 85873b4390fSRalf Baechle select HW_HAS_PCI 85967e38cf2SRalf Baechle select IRQ_MIPS_CPU 86073b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 86173b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 86273b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 86373b4390fSRalf Baechle select SWAP_IO_SPACE 86473b4390fSRalf Baechle select BOOT_RAW 865d30a2b47SLinus Walleij select GPIOLIB 866930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 86773b4390fSRalf Baechle help 86873b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 86973b4390fSRalf Baechle based on the IDT RC32434 SoC. 87073b4390fSRalf Baechle 8719ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 8729ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 873a86c7f72SDavid Daney select CEVT_R4K 87434adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 875a86c7f72SDavid Daney select DMA_COHERENT 876a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 877a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 878f65aad41SRalf Baechle select EDAC_SUPPORT 879b01aec9bSBorislav Petkov select EDAC_ATOMIC_SCRUB 88073569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 88173569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 882a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 8835e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 884e8635b48SDavid Daney select HW_HAS_PCI 885f00e001eSDavid Daney select ZONE_DMA32 886465aaed0SDavid Daney select HOLES_IN_ZONE 887d30a2b47SLinus Walleij select GPIOLIB 8886e511163SDavid Daney select LIBFDT 8896e511163SDavid Daney select USE_OF 8906e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 8916e511163SDavid Daney select SYS_SUPPORTS_SMP 8926e511163SDavid Daney select NR_CPUS_DEFAULT_16 893e326479fSAndrew Bresticker select BUILTIN_DTB 8948c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 895a86c7f72SDavid Daney help 896a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 897a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 898a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 899a86c7f72SDavid Daney Some of the supported boards are: 900a86c7f72SDavid Daney EBT3000 901a86c7f72SDavid Daney EBH3000 902a86c7f72SDavid Daney EBH3100 903a86c7f72SDavid Daney Thunder 904a86c7f72SDavid Daney Kodama 905a86c7f72SDavid Daney Hikari 906a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 907a86c7f72SDavid Daney 9087f058e85SJayachandran Cconfig NLM_XLR_BOARD 9097f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 9107f058e85SJayachandran C select BOOT_ELF32 9117f058e85SJayachandran C select NLM_COMMON 9127f058e85SJayachandran C select SYS_HAS_CPU_XLR 9137f058e85SJayachandran C select SYS_SUPPORTS_SMP 9147f058e85SJayachandran C select HW_HAS_PCI 9157f058e85SJayachandran C select SWAP_IO_SPACE 9167f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9177f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 91834adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 9197f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9207f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 9217f058e85SJayachandran C select DMA_COHERENT 9227f058e85SJayachandran C select NR_CPUS_DEFAULT_32 9237f058e85SJayachandran C select CEVT_R4K 9247f058e85SJayachandran C select CSRC_R4K 92567e38cf2SRalf Baechle select IRQ_MIPS_CPU 926b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9277f058e85SJayachandran C select SYNC_R4K 9287f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 9298f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9308f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9317f058e85SJayachandran C help 9327f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 9337f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 9347f058e85SJayachandran C 9351c773ea4SJayachandran Cconfig NLM_XLP_BOARD 9361c773ea4SJayachandran C bool "Netlogic XLP based systems" 9371c773ea4SJayachandran C select BOOT_ELF32 9381c773ea4SJayachandran C select NLM_COMMON 9391c773ea4SJayachandran C select SYS_HAS_CPU_XLP 9401c773ea4SJayachandran C select SYS_SUPPORTS_SMP 9411c773ea4SJayachandran C select HW_HAS_PCI 9421c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9431c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 94434adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 945d30a2b47SLinus Walleij select GPIOLIB 9461c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9471c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 9481c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 9491c773ea4SJayachandran C select DMA_COHERENT 9501c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 9511c773ea4SJayachandran C select CEVT_R4K 9521c773ea4SJayachandran C select CSRC_R4K 95367e38cf2SRalf Baechle select IRQ_MIPS_CPU 954b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9551c773ea4SJayachandran C select SYNC_R4K 9561c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 9572f6528e1SJayachandran C select USE_OF 9588f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9598f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9601c773ea4SJayachandran C help 9611c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 9621c773ea4SJayachandran C Say Y here if you have a XLP based board. 9631c773ea4SJayachandran C 9649bc463beSDavid Daneyconfig MIPS_PARAVIRT 9659bc463beSDavid Daney bool "Para-Virtualized guest system" 9669bc463beSDavid Daney select CEVT_R4K 9679bc463beSDavid Daney select CSRC_R4K 9689bc463beSDavid Daney select DMA_COHERENT 9699bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 9709bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 9719bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 9729bc463beSDavid Daney select SYS_SUPPORTS_SMP 9739bc463beSDavid Daney select NR_CPUS_DEFAULT_4 9749bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 9759bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 9769bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 9779bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 9789bc463beSDavid Daney select HW_HAS_PCI 9799bc463beSDavid Daney select SWAP_IO_SPACE 9809bc463beSDavid Daney help 9819bc463beSDavid Daney This option supports guest running under ???? 9829bc463beSDavid Daney 9831da177e4SLinus Torvaldsendchoice 9841da177e4SLinus Torvalds 985e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 9863b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 987d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 988a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 989e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 9908945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 9915e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 9925ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 9938ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 9941f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 9952572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig" 996af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig" 9970f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 998ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 99929c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 100038b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 100122b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 10025e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 1003a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 100430ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig" 100530ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig" 10067f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 1007ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 10089937f5ffSZubair Lutfullah Kakakhelsource "arch/mips/xilfpga/Kconfig" 100938b18f72SRalf Baechle 10105e83d430SRalf Baechleendmenu 10115e83d430SRalf Baechle 10121da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 10131da177e4SLinus Torvalds bool 10141da177e4SLinus Torvalds default y 10151da177e4SLinus Torvalds 10161da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 10171da177e4SLinus Torvalds bool 10181da177e4SLinus Torvalds 1019f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 1020f0d1b0b3SDavid Howells bool 1021f0d1b0b3SDavid Howells default n 1022f0d1b0b3SDavid Howells 1023f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 1024f0d1b0b3SDavid Howells bool 1025f0d1b0b3SDavid Howells default n 1026f0d1b0b3SDavid Howells 10273c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 10283c9ee7efSAkinobu Mita bool 10293c9ee7efSAkinobu Mita default y 10303c9ee7efSAkinobu Mita 10311da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 10321da177e4SLinus Torvalds bool 10331da177e4SLinus Torvalds default y 10341da177e4SLinus Torvalds 1035ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 10361cc89038SAtsushi Nemoto bool 10371cc89038SAtsushi Nemoto default y 10381cc89038SAtsushi Nemoto 10391da177e4SLinus Torvalds# 10401da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 10411da177e4SLinus Torvalds# 10420e2794b0SRalf Baechleconfig FW_ARC 10431da177e4SLinus Torvalds bool 10441da177e4SLinus Torvalds 104561ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 104661ed242dSRalf Baechle bool 104761ed242dSRalf Baechle 10489267a30dSMarc St-Jeanconfig BOOT_RAW 10499267a30dSMarc St-Jean bool 10509267a30dSMarc St-Jean 1051217dd11eSRalf Baechleconfig CEVT_BCM1480 1052217dd11eSRalf Baechle bool 1053217dd11eSRalf Baechle 10546457d9fcSYoichi Yuasaconfig CEVT_DS1287 10556457d9fcSYoichi Yuasa bool 10566457d9fcSYoichi Yuasa 10571097c6acSYoichi Yuasaconfig CEVT_GT641XX 10581097c6acSYoichi Yuasa bool 10591097c6acSYoichi Yuasa 106042f77542SRalf Baechleconfig CEVT_R4K 106142f77542SRalf Baechle bool 106242f77542SRalf Baechle 1063217dd11eSRalf Baechleconfig CEVT_SB1250 1064217dd11eSRalf Baechle bool 1065217dd11eSRalf Baechle 1066229f773eSAtsushi Nemotoconfig CEVT_TXX9 1067229f773eSAtsushi Nemoto bool 1068229f773eSAtsushi Nemoto 1069217dd11eSRalf Baechleconfig CSRC_BCM1480 1070217dd11eSRalf Baechle bool 1071217dd11eSRalf Baechle 10724247417dSYoichi Yuasaconfig CSRC_IOASIC 10734247417dSYoichi Yuasa bool 10744247417dSYoichi Yuasa 1075940f6b48SRalf Baechleconfig CSRC_R4K 1076940f6b48SRalf Baechle bool 1077940f6b48SRalf Baechle 1078217dd11eSRalf Baechleconfig CSRC_SB1250 1079217dd11eSRalf Baechle bool 1080217dd11eSRalf Baechle 1081a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL 1082a7f4df4eSAlex Smith def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1083a7f4df4eSAlex Smith 1084a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 1085d30a2b47SLinus Walleij select GPIOLIB 1086a9aec7feSAtsushi Nemoto bool 1087a9aec7feSAtsushi Nemoto 10880e2794b0SRalf Baechleconfig FW_CFE 1089df78b5c8SAurelien Jarno bool 1090df78b5c8SAurelien Jarno 10914bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 109234adb28dSRalf Baechle def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 10934bafad92SFUJITA Tomonori 109440e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES 109540e084a5SRalf Baechle bool 109640e084a5SRalf Baechle 1097885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1098885014bcSFelix Fietkau select DMA_NONCOHERENT 1099885014bcSFelix Fietkau bool 1100885014bcSFelix Fietkau 11011da177e4SLinus Torvaldsconfig DMA_COHERENT 11021da177e4SLinus Torvalds bool 11031da177e4SLinus Torvalds 11041da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 11051da177e4SLinus Torvalds bool 1106e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 11074ce588cdSRalf Baechle 1108e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 11094ce588cdSRalf Baechle bool 11101da177e4SLinus Torvalds 111136a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 11121da177e4SLinus Torvalds bool 11131da177e4SLinus Torvalds 11141b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1115dbb74540SRalf Baechle bool 1116dbb74540SRalf Baechle 11171da177e4SLinus Torvaldsconfig MIPS_BONITO64 11181da177e4SLinus Torvalds bool 11191da177e4SLinus Torvalds 11201da177e4SLinus Torvaldsconfig MIPS_MSC 11211da177e4SLinus Torvalds bool 11221da177e4SLinus Torvalds 11231f21d2bdSBrian Murphyconfig MIPS_NILE4 11241f21d2bdSBrian Murphy bool 11251f21d2bdSBrian Murphy 112639b8d525SRalf Baechleconfig SYNC_R4K 112739b8d525SRalf Baechle bool 112839b8d525SRalf Baechle 1129487d70d0SGabor Juhosconfig MIPS_MACHINE 1130487d70d0SGabor Juhos def_bool n 1131487d70d0SGabor Juhos 1132ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1133d388d685SMaciej W. Rozycki def_bool n 1134d388d685SMaciej W. Rozycki 11354e0748f5SMarkos Chandrasconfig GENERIC_CSUM 11364e0748f5SMarkos Chandras bool 11374e0748f5SMarkos Chandras 11388313da30SRalf Baechleconfig GENERIC_ISA_DMA 11398313da30SRalf Baechle bool 11408313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1141a35bee8aSNamhyung Kim select ISA_DMA_API 11428313da30SRalf Baechle 1143aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1144aa414dffSRalf Baechle bool 11458313da30SRalf Baechle select GENERIC_ISA_DMA 1146aa414dffSRalf Baechle 1147a35bee8aSNamhyung Kimconfig ISA_DMA_API 1148a35bee8aSNamhyung Kim bool 1149a35bee8aSNamhyung Kim 1150465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1151465aaed0SDavid Daney bool 1152465aaed0SDavid Daney 11538c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE 11548c530ea3SMatt Redfearn bool 11558c530ea3SMatt Redfearn help 11568c530ea3SMatt Redfearn Selected if the platform supports relocating the kernel. 11578c530ea3SMatt Redfearn The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF 11588c530ea3SMatt Redfearn to allow access to command line and entropy sources. 11598c530ea3SMatt Redfearn 11605e83d430SRalf Baechle# 11616b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 11625e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 11635e83d430SRalf Baechle# choice statement should be more obvious to the user. 11645e83d430SRalf Baechle# 11655e83d430SRalf Baechlechoice 11666b2aac42SMasanari Iida prompt "Endianness selection" 11671da177e4SLinus Torvalds help 11681da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 11695e83d430SRalf Baechle byte order. These modes require different kernels and a different 11703cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 11715e83d430SRalf Baechle particular system but some systems are just as commonly used in the 11723dde6ad8SDavid Sterba one or the other endianness. 11735e83d430SRalf Baechle 11745e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 11755e83d430SRalf Baechle bool "Big endian" 11765e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 11775e83d430SRalf Baechle 11785e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 11795e83d430SRalf Baechle bool "Little endian" 11805e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 11815e83d430SRalf Baechle 11825e83d430SRalf Baechleendchoice 11835e83d430SRalf Baechle 118422b0763aSDavid Daneyconfig EXPORT_UASM 118522b0763aSDavid Daney bool 118622b0763aSDavid Daney 11872116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 11882116245eSRalf Baechle bool 11892116245eSRalf Baechle 11905e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 11915e83d430SRalf Baechle bool 11925e83d430SRalf Baechle 11935e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 11945e83d430SRalf Baechle bool 11951da177e4SLinus Torvalds 11969cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 11979cffd154SDavid Daney bool 11989cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 11999cffd154SDavid Daney default y 12009cffd154SDavid Daney 1201aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1202aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1203aa1762f4SDavid Daney 12041da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 12051da177e4SLinus Torvalds bool 12061da177e4SLinus Torvalds 12079267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 12089267a30dSMarc St-Jean bool 12099267a30dSMarc St-Jean 12109267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 12119267a30dSMarc St-Jean bool 12129267a30dSMarc St-Jean 12138420fd00SAtsushi Nemotoconfig IRQ_TXX9 12148420fd00SAtsushi Nemoto bool 12158420fd00SAtsushi Nemoto 1216d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1217d5ab1a69SYoichi Yuasa bool 1218d5ab1a69SYoichi Yuasa 1219252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 12201da177e4SLinus Torvalds bool 12211da177e4SLinus Torvalds 12229267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 12239267a30dSMarc St-Jean bool 12249267a30dSMarc St-Jean 1225a83860c2SRalf Baechleconfig SOC_EMMA2RH 1226a83860c2SRalf Baechle bool 1227a83860c2SRalf Baechle select CEVT_R4K 1228a83860c2SRalf Baechle select CSRC_R4K 1229a83860c2SRalf Baechle select DMA_NONCOHERENT 123067e38cf2SRalf Baechle select IRQ_MIPS_CPU 1231a83860c2SRalf Baechle select SWAP_IO_SPACE 1232a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1233a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1234a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1235a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1236a83860c2SRalf Baechle 1237edb6310aSDaniel Lairdconfig SOC_PNX833X 1238edb6310aSDaniel Laird bool 1239edb6310aSDaniel Laird select CEVT_R4K 1240edb6310aSDaniel Laird select CSRC_R4K 124167e38cf2SRalf Baechle select IRQ_MIPS_CPU 1242edb6310aSDaniel Laird select DMA_NONCOHERENT 1243edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1244edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1245edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1246edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1247377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1248edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1249edb6310aSDaniel Laird 1250edb6310aSDaniel Lairdconfig SOC_PNX8335 1251edb6310aSDaniel Laird bool 1252edb6310aSDaniel Laird select SOC_PNX833X 1253edb6310aSDaniel Laird 1254a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1255a7e07b1aSMarkos Chandras bool 1256a7e07b1aSMarkos Chandras 12571da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 12581da177e4SLinus Torvalds bool 12591da177e4SLinus Torvalds 1260e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1261e2defae5SThomas Bogendoerfer bool 1262e2defae5SThomas Bogendoerfer 12635b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 12645b438c44SThomas Bogendoerfer bool 12655b438c44SThomas Bogendoerfer 1266e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1267e2defae5SThomas Bogendoerfer bool 1268e2defae5SThomas Bogendoerfer 1269e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1270e2defae5SThomas Bogendoerfer bool 1271e2defae5SThomas Bogendoerfer 1272e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1273e2defae5SThomas Bogendoerfer bool 1274e2defae5SThomas Bogendoerfer 1275e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1276e2defae5SThomas Bogendoerfer bool 1277e2defae5SThomas Bogendoerfer 1278e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1279e2defae5SThomas Bogendoerfer bool 1280e2defae5SThomas Bogendoerfer 12810e2794b0SRalf Baechleconfig FW_ARC32 12825e83d430SRalf Baechle bool 12835e83d430SRalf Baechle 1284aaa9fad3SPaul Bolleconfig FW_SNIPROM 1285231a35d3SThomas Bogendoerfer bool 1286231a35d3SThomas Bogendoerfer 12871da177e4SLinus Torvaldsconfig BOOT_ELF32 12881da177e4SLinus Torvalds bool 12891da177e4SLinus Torvalds 1290930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1291930beb5aSFlorian Fainelli bool 1292930beb5aSFlorian Fainelli 1293930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1294930beb5aSFlorian Fainelli bool 1295930beb5aSFlorian Fainelli 1296930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1297930beb5aSFlorian Fainelli bool 1298930beb5aSFlorian Fainelli 1299930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1300930beb5aSFlorian Fainelli bool 1301930beb5aSFlorian Fainelli 13021da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 13031da177e4SLinus Torvalds int 1304a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 13055432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 13065432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 13075432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 13081da177e4SLinus Torvalds default "5" 13091da177e4SLinus Torvalds 13101da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 13111da177e4SLinus Torvalds bool 13121da177e4SLinus Torvalds 13131da177e4SLinus Torvaldsconfig ARC_CONSOLE 13141da177e4SLinus Torvalds bool "ARC console support" 1315e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 13161da177e4SLinus Torvalds 13171da177e4SLinus Torvaldsconfig ARC_MEMORY 13181da177e4SLinus Torvalds bool 131914b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 13201da177e4SLinus Torvalds default y 13211da177e4SLinus Torvalds 13221da177e4SLinus Torvaldsconfig ARC_PROMLIB 13231da177e4SLinus Torvalds bool 1324e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 13251da177e4SLinus Torvalds default y 13261da177e4SLinus Torvalds 13270e2794b0SRalf Baechleconfig FW_ARC64 13281da177e4SLinus Torvalds bool 13291da177e4SLinus Torvalds 13301da177e4SLinus Torvaldsconfig BOOT_ELF64 13311da177e4SLinus Torvalds bool 13321da177e4SLinus Torvalds 13331da177e4SLinus Torvaldsmenu "CPU selection" 13341da177e4SLinus Torvalds 13351da177e4SLinus Torvaldschoice 13361da177e4SLinus Torvalds prompt "CPU type" 13371da177e4SLinus Torvalds default CPU_R4X00 13381da177e4SLinus Torvalds 13390e476d91SHuacai Chenconfig CPU_LOONGSON3 13400e476d91SHuacai Chen bool "Loongson 3 CPU" 13410e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 13420e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 13430e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 13440e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 13450e476d91SHuacai Chen select WEAK_ORDERING 13460e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 1347b2edcfc8SHuacai Chen select MIPS_PGD_C0_CONTEXT 1348d30a2b47SLinus Walleij select GPIOLIB 13490e476d91SHuacai Chen help 13500e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 13510e476d91SHuacai Chen set with many extensions. 13520e476d91SHuacai Chen 13531e820da3SHuacai Chenconfig LOONGSON3_ENHANCEMENT 13541e820da3SHuacai Chen bool "New Loongson 3 CPU Enhancements" 13551e820da3SHuacai Chen default n 13561e820da3SHuacai Chen select CPU_MIPSR2 13571e820da3SHuacai Chen select CPU_HAS_PREFETCH 13581e820da3SHuacai Chen depends on CPU_LOONGSON3 13591e820da3SHuacai Chen help 13601e820da3SHuacai Chen New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A 13611e820da3SHuacai Chen R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as 13621e820da3SHuacai Chen FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User 13631e820da3SHuacai Chen Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), 13641e820da3SHuacai Chen Fast TLB refill support, etc. 13651e820da3SHuacai Chen 13661e820da3SHuacai Chen This option enable those enhancements which are not probed at run 13671e820da3SHuacai Chen time. If you want a generic kernel to run on all Loongson 3 machines, 13681e820da3SHuacai Chen please say 'N' here. If you want a high-performance kernel to run on 13691e820da3SHuacai Chen new Loongson 3 machines only, please say 'Y' here. 13701e820da3SHuacai Chen 13713702bba5SWu Zhangjinconfig CPU_LOONGSON2E 13723702bba5SWu Zhangjin bool "Loongson 2E" 13733702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 13743702bba5SWu Zhangjin select CPU_LOONGSON2 13752a21c730SFuxin Zhang help 13762a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 13772a21c730SFuxin Zhang with many extensions. 13782a21c730SFuxin Zhang 137925985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 13806f7a251aSWu Zhangjin bonito64. 13816f7a251aSWu Zhangjin 13826f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 13836f7a251aSWu Zhangjin bool "Loongson 2F" 13846f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 13856f7a251aSWu Zhangjin select CPU_LOONGSON2 1386d30a2b47SLinus Walleij select GPIOLIB 13876f7a251aSWu Zhangjin help 13886f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 13896f7a251aSWu Zhangjin with many extensions. 13906f7a251aSWu Zhangjin 13916f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 13926f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 13936f7a251aSWu Zhangjin Loongson2E. 13946f7a251aSWu Zhangjin 1395ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1396ca585cf9SKelvin Cheung bool "Loongson 1B" 1397ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1398ca585cf9SKelvin Cheung select CPU_LOONGSON1 13999ec88b60SKelvin Cheung select LEDS_GPIO_REGISTER 1400ca585cf9SKelvin Cheung help 1401ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1402ca585cf9SKelvin Cheung release 2 instruction set. 1403ca585cf9SKelvin Cheung 14046e760c8dSRalf Baechleconfig CPU_MIPS32_R1 14056e760c8dSRalf Baechle bool "MIPS32 Release 1" 14067cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 14076e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1408797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1409ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14106e760c8dSRalf Baechle help 14115e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 14121e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14131e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14141e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14151e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14161e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 14171e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 14181e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 14191e5f1caaSRalf Baechle performance. 14201e5f1caaSRalf Baechle 14211e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 14221e5f1caaSRalf Baechle bool "MIPS32 Release 2" 14237cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 14241e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1425797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1426ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1427a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14282235a54dSSanjay Lal select HAVE_KVM 14291e5f1caaSRalf Baechle help 14305e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 14316e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14326e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14336e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14346e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14351da177e4SLinus Torvalds 14367fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 1437674d10e2SMarkos Chandras bool "MIPS32 Release 6" 14387fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 14397fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14407fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14417fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14427fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14434e0748f5SMarkos Chandras select GENERIC_CSUM 14447fd08ca5SLeonid Yegoshin select HAVE_KVM 14457fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 14467fd08ca5SLeonid Yegoshin help 14477fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14487fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 14497fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 14507fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 14517fd08ca5SLeonid Yegoshin 14526e760c8dSRalf Baechleconfig CPU_MIPS64_R1 14536e760c8dSRalf Baechle bool "MIPS64 Release 1" 14547cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1455797798c1SRalf Baechle select CPU_HAS_PREFETCH 1456ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1457ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1458ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14599cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14606e760c8dSRalf Baechle help 14616e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 14626e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 14636e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 14646e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14656e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 14661e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 14671e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 14681e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 14691e5f1caaSRalf Baechle performance. 14701e5f1caaSRalf Baechle 14711e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 14721e5f1caaSRalf Baechle bool "MIPS64 Release 2" 14737cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1474797798c1SRalf Baechle select CPU_HAS_PREFETCH 14751e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 14761e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1477ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14789cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1479a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14801e5f1caaSRalf Baechle help 14811e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 14821e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 14831e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 14841e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14851e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 14861da177e4SLinus Torvalds 14877fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 1488674d10e2SMarkos Chandras bool "MIPS64 Release 6" 14897fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 14907fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14917fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14927fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 14937fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14947fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14954e0748f5SMarkos Chandras select GENERIC_CSUM 14964e9d324dSPaul Burton select MIPS_O32_FP64_SUPPORT if MIPS32_O32 14977fd08ca5SLeonid Yegoshin help 14987fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14997fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 15007fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 15017fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 15027fd08ca5SLeonid Yegoshin 15031da177e4SLinus Torvaldsconfig CPU_R3000 15041da177e4SLinus Torvalds bool "R3000" 15057cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1506f7062ddbSRalf Baechle select CPU_HAS_WB 1507ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1508797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15091da177e4SLinus Torvalds help 15101da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 15111da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 15121da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 15131da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 15141da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 15151da177e4SLinus Torvalds try to recompile with R3000. 15161da177e4SLinus Torvalds 15171da177e4SLinus Torvaldsconfig CPU_TX39XX 15181da177e4SLinus Torvalds bool "R39XX" 15197cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1520ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15211da177e4SLinus Torvalds 15221da177e4SLinus Torvaldsconfig CPU_VR41XX 15231da177e4SLinus Torvalds bool "R41xx" 15247cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1525ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1526ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15271da177e4SLinus Torvalds help 15285e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 15291da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 15301da177e4SLinus Torvalds kernel built with this option will not run on any other type of 15311da177e4SLinus Torvalds processor or vice versa. 15321da177e4SLinus Torvalds 15331da177e4SLinus Torvaldsconfig CPU_R4300 15341da177e4SLinus Torvalds bool "R4300" 15357cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1536ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1537ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15381da177e4SLinus Torvalds help 15391da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 15401da177e4SLinus Torvalds 15411da177e4SLinus Torvaldsconfig CPU_R4X00 15421da177e4SLinus Torvalds bool "R4x00" 15437cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1544ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1545ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1546970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15471da177e4SLinus Torvalds help 15481da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 15491da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 15501da177e4SLinus Torvalds 15511da177e4SLinus Torvaldsconfig CPU_TX49XX 15521da177e4SLinus Torvalds bool "R49XX" 15537cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1554de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1555ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1556ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1557970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15581da177e4SLinus Torvalds 15591da177e4SLinus Torvaldsconfig CPU_R5000 15601da177e4SLinus Torvalds bool "R5000" 15617cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1562ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1563ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1564970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15651da177e4SLinus Torvalds help 15661da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 15671da177e4SLinus Torvalds 15681da177e4SLinus Torvaldsconfig CPU_R5432 15691da177e4SLinus Torvalds bool "R5432" 15707cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 15715e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 15725e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1573970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15741da177e4SLinus Torvalds 1575542c1020SShinya Kuribayashiconfig CPU_R5500 1576542c1020SShinya Kuribayashi bool "R5500" 1577542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1578542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1579542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 15809cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1581542c1020SShinya Kuribayashi help 1582542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1583542c1020SShinya Kuribayashi instruction set. 1584542c1020SShinya Kuribayashi 15851da177e4SLinus Torvaldsconfig CPU_R6000 15861da177e4SLinus Torvalds bool "R6000" 15877cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1588ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15891da177e4SLinus Torvalds help 15901da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1591c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 15921da177e4SLinus Torvalds 15931da177e4SLinus Torvaldsconfig CPU_NEVADA 15941da177e4SLinus Torvalds bool "RM52xx" 15957cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1596ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1597ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1598970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15991da177e4SLinus Torvalds help 16001da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 16011da177e4SLinus Torvalds 16021da177e4SLinus Torvaldsconfig CPU_R8000 16031da177e4SLinus Torvalds bool "R8000" 16047cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 16055e83d430SRalf Baechle select CPU_HAS_PREFETCH 1606ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 16071da177e4SLinus Torvalds help 16081da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 16091da177e4SLinus Torvalds uncommon and the support for them is incomplete. 16101da177e4SLinus Torvalds 16111da177e4SLinus Torvaldsconfig CPU_R10000 16121da177e4SLinus Torvalds bool "R10000" 16137cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 16145e83d430SRalf Baechle select CPU_HAS_PREFETCH 1615ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1616ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1617797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1618970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16191da177e4SLinus Torvalds help 16201da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 16211da177e4SLinus Torvalds 16221da177e4SLinus Torvaldsconfig CPU_RM7000 16231da177e4SLinus Torvalds bool "RM7000" 16247cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 16255e83d430SRalf Baechle select CPU_HAS_PREFETCH 1626ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1627ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1628797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1629970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16301da177e4SLinus Torvalds 16311da177e4SLinus Torvaldsconfig CPU_SB1 16321da177e4SLinus Torvalds bool "SB1" 16337cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1634ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1635ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1636797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1637970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16380004a9dfSRalf Baechle select WEAK_ORDERING 16391da177e4SLinus Torvalds 1640a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1641a86c7f72SDavid Daney bool "Cavium Octeon processor" 16425e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1643a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1644a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1645a86c7f72SDavid Daney select WEAK_ORDERING 1646a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 16479cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1648df115f3eSBen Hutchings select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1649df115f3eSBen Hutchings select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1650930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1651a86c7f72SDavid Daney help 1652a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1653a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1654a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1655a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1656a86c7f72SDavid Daney 1657cd746249SJonas Gorskiconfig CPU_BMIPS 1658cd746249SJonas Gorski bool "Broadcom BMIPS" 1659cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1660cd746249SJonas Gorski select CPU_MIPS32 1661fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1662cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1663cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1664cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1665cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1666cd746249SJonas Gorski select DMA_NONCOHERENT 166767e38cf2SRalf Baechle select IRQ_MIPS_CPU 1668cd746249SJonas Gorski select SWAP_IO_SPACE 1669cd746249SJonas Gorski select WEAK_ORDERING 1670c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 167169aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1672c1c0c461SKevin Cernekee help 1673fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1674c1c0c461SKevin Cernekee 16757f058e85SJayachandran Cconfig CPU_XLR 16767f058e85SJayachandran C bool "Netlogic XLR SoC" 16777f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 16787f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 16797f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 16807f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1681970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16827f058e85SJayachandran C select WEAK_ORDERING 16837f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 16847f058e85SJayachandran C help 16857f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 16861c773ea4SJayachandran C 16871c773ea4SJayachandran Cconfig CPU_XLP 16881c773ea4SJayachandran C bool "Netlogic XLP SoC" 16891c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 16901c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 16911c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 16921c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 16931c773ea4SJayachandran C select WEAK_ORDERING 16941c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 16951c773ea4SJayachandran C select CPU_HAS_PREFETCH 1696d6504846SJayachandran C select CPU_MIPSR2 1697ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 16982db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 16991c773ea4SJayachandran C help 17001c773ea4SJayachandran C Netlogic Microsystems XLP processors. 17011da177e4SLinus Torvaldsendchoice 17021da177e4SLinus Torvalds 1703a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1704a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1705a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 17067fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1707a6e18781SLeonid Yegoshin help 1708a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1709a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1710a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1711a6e18781SLeonid Yegoshin 1712a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1713a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1714a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1715a6e18781SLeonid Yegoshin select EVA 1716a6e18781SLeonid Yegoshin default y 1717a6e18781SLeonid Yegoshin help 1718a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1719a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1720a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1721a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1722a6e18781SLeonid Yegoshin 1723c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1724c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1725c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1726c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1727c5b36783SSteven J. Hill help 1728c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1729c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1730c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1731c5b36783SSteven J. Hill 1732c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1733c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1734c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1735c5b36783SSteven J. Hill depends on !EVA 1736c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1737c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1738c5b36783SSteven J. Hill select XPA 1739c5b36783SSteven J. Hill select HIGHMEM 1740c5b36783SSteven J. Hill select ARCH_PHYS_ADDR_T_64BIT 1741c5b36783SSteven J. Hill default n 1742c5b36783SSteven J. Hill help 1743c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1744c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1745c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1746c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1747c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1748c5b36783SSteven J. Hill If unsure, say 'N' here. 1749c5b36783SSteven J. Hill 1750622844bfSWu Zhangjinif CPU_LOONGSON2F 1751622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1752622844bfSWu Zhangjin bool 1753622844bfSWu Zhangjin 1754622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1755622844bfSWu Zhangjin bool 1756622844bfSWu Zhangjin 1757622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1758622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1759622844bfSWu Zhangjin default y 1760622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1761622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1762622844bfSWu Zhangjin help 1763622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1764622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1765622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1766622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1767622844bfSWu Zhangjin 1768622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1769622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1770622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1771622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1772622844bfSWu Zhangjin systems. 1773622844bfSWu Zhangjin 1774622844bfSWu Zhangjin If unsure, please say Y. 1775622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1776622844bfSWu Zhangjin 17771b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 17781b93b3c3SWu Zhangjin bool 17791b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 17801b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 178131c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 17821b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1783fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 17844e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 17851b93b3c3SWu Zhangjin 17861b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 17871b93b3c3SWu Zhangjin bool 17881b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 17891b93b3c3SWu Zhangjin 1790dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM 1791dbb98314SAlban Bedel bool 1792dbb98314SAlban Bedel select SYS_SUPPORTS_ZBOOT 1793dbb98314SAlban Bedel 17943702bba5SWu Zhangjinconfig CPU_LOONGSON2 17953702bba5SWu Zhangjin bool 17963702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 17973702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 17983702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1799970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 18003702bba5SWu Zhangjin 1801ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1802ca585cf9SKelvin Cheung bool 1803ca585cf9SKelvin Cheung select CPU_MIPS32 1804ca585cf9SKelvin Cheung select CPU_MIPSR2 1805ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1806ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1807ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1808f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1809ca585cf9SKelvin Cheung 1810fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 181104fa8bf7SJonas Gorski select SMP_UP if SMP 18121bbb6c1bSKevin Cernekee bool 1813cd746249SJonas Gorski 1814cd746249SJonas Gorskiconfig CPU_BMIPS4350 1815cd746249SJonas Gorski bool 1816cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1817cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1818cd746249SJonas Gorski 1819cd746249SJonas Gorskiconfig CPU_BMIPS4380 1820cd746249SJonas Gorski bool 1821bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1822cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1823cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1824b4720809SFlorian Fainelli select CPU_HAS_RIXI 1825cd746249SJonas Gorski 1826cd746249SJonas Gorskiconfig CPU_BMIPS5000 1827cd746249SJonas Gorski bool 1828cd746249SJonas Gorski select MIPS_CPU_SCACHE 1829bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1830cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1831cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1832b4720809SFlorian Fainelli select CPU_HAS_RIXI 18331bbb6c1bSKevin Cernekee 18340e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 18350e476d91SHuacai Chen bool 18360e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 1837b2edcfc8SHuacai Chen select CPU_HAS_RIXI 18380e476d91SHuacai Chen 18393702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 18402a21c730SFuxin Zhang bool 18412a21c730SFuxin Zhang 18426f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 18436f7a251aSWu Zhangjin bool 184455045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 184555045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 184622f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 18476f7a251aSWu Zhangjin 1848ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1849ca585cf9SKelvin Cheung bool 1850ca585cf9SKelvin Cheung 18517cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 18527cf8053bSRalf Baechle bool 18537cf8053bSRalf Baechle 18547cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 18557cf8053bSRalf Baechle bool 18567cf8053bSRalf Baechle 1857a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1858a6e18781SLeonid Yegoshin bool 1859a6e18781SLeonid Yegoshin 1860c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1861c5b36783SSteven J. Hill bool 1862c5b36783SSteven J. Hill 18637fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 18647fd08ca5SLeonid Yegoshin bool 18657fd08ca5SLeonid Yegoshin 18667cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 18677cf8053bSRalf Baechle bool 18687cf8053bSRalf Baechle 18697cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 18707cf8053bSRalf Baechle bool 18717cf8053bSRalf Baechle 18727fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 18737fd08ca5SLeonid Yegoshin bool 18747fd08ca5SLeonid Yegoshin 18757cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 18767cf8053bSRalf Baechle bool 18777cf8053bSRalf Baechle 18787cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 18797cf8053bSRalf Baechle bool 18807cf8053bSRalf Baechle 18817cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 18827cf8053bSRalf Baechle bool 18837cf8053bSRalf Baechle 18847cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 18857cf8053bSRalf Baechle bool 18867cf8053bSRalf Baechle 18877cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 18887cf8053bSRalf Baechle bool 18897cf8053bSRalf Baechle 18907cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 18917cf8053bSRalf Baechle bool 18927cf8053bSRalf Baechle 18937cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 18947cf8053bSRalf Baechle bool 18957cf8053bSRalf Baechle 18967cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 18977cf8053bSRalf Baechle bool 18987cf8053bSRalf Baechle 1899542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1900542c1020SShinya Kuribayashi bool 1901542c1020SShinya Kuribayashi 19027cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 19037cf8053bSRalf Baechle bool 19047cf8053bSRalf Baechle 19057cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 19067cf8053bSRalf Baechle bool 19077cf8053bSRalf Baechle 19087cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 19097cf8053bSRalf Baechle bool 19107cf8053bSRalf Baechle 19117cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 19127cf8053bSRalf Baechle bool 19137cf8053bSRalf Baechle 19147cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 19157cf8053bSRalf Baechle bool 19167cf8053bSRalf Baechle 19177cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 19187cf8053bSRalf Baechle bool 19197cf8053bSRalf Baechle 19205e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 19215e683389SDavid Daney bool 19225e683389SDavid Daney 1923cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1924c1c0c461SKevin Cernekee bool 1925c1c0c461SKevin Cernekee 1926fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1927c1c0c461SKevin Cernekee bool 1928cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1929c1c0c461SKevin Cernekee 1930c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1931c1c0c461SKevin Cernekee bool 1932cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1933c1c0c461SKevin Cernekee 1934c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1935c1c0c461SKevin Cernekee bool 1936cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1937c1c0c461SKevin Cernekee 1938c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1939c1c0c461SKevin Cernekee bool 1940cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1941c1c0c461SKevin Cernekee 19427f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 19437f058e85SJayachandran C bool 19447f058e85SJayachandran C 19451c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 19461c773ea4SJayachandran C bool 19471c773ea4SJayachandran C 1948b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 1949b6911bbaSPaul Burton depends on MIPS_MALTA 1950b6911bbaSPaul Burton depends on PCI 1951b6911bbaSPaul Burton bool 1952b6911bbaSPaul Burton default y 1953b6911bbaSPaul Burton 195417099b11SRalf Baechle# 195517099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 195617099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 195717099b11SRalf Baechle# 19580004a9dfSRalf Baechleconfig WEAK_ORDERING 19590004a9dfSRalf Baechle bool 196017099b11SRalf Baechle 196117099b11SRalf Baechle# 196217099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 196317099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 196417099b11SRalf Baechle# 196517099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 196617099b11SRalf Baechle bool 19675e83d430SRalf Baechleendmenu 19685e83d430SRalf Baechle 19695e83d430SRalf Baechle# 19705e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 19715e83d430SRalf Baechle# 19725e83d430SRalf Baechleconfig CPU_MIPS32 19735e83d430SRalf Baechle bool 19747fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 19755e83d430SRalf Baechle 19765e83d430SRalf Baechleconfig CPU_MIPS64 19775e83d430SRalf Baechle bool 19787fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 19795e83d430SRalf Baechle 19805e83d430SRalf Baechle# 1981c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 19825e83d430SRalf Baechle# 19835e83d430SRalf Baechleconfig CPU_MIPSR1 19845e83d430SRalf Baechle bool 19855e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 19865e83d430SRalf Baechle 19875e83d430SRalf Baechleconfig CPU_MIPSR2 19885e83d430SRalf Baechle bool 1989a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 19908256b17eSFlorian Fainelli select CPU_HAS_RIXI 1991a7e07b1aSMarkos Chandras select MIPS_SPRAM 19925e83d430SRalf Baechle 19937fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 19947fd08ca5SLeonid Yegoshin bool 19957fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 19968256b17eSFlorian Fainelli select CPU_HAS_RIXI 199787321fddSPaul Burton select HAVE_ARCH_BITREVERSE 19982db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 1999a7e07b1aSMarkos Chandras select MIPS_SPRAM 20005e83d430SRalf Baechle 2001a6e18781SLeonid Yegoshinconfig EVA 2002a6e18781SLeonid Yegoshin bool 2003a6e18781SLeonid Yegoshin 2004c5b36783SSteven J. Hillconfig XPA 2005c5b36783SSteven J. Hill bool 2006c5b36783SSteven J. Hill 20075e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 20085e83d430SRalf Baechle bool 20095e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 20105e83d430SRalf Baechle bool 20115e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 20125e83d430SRalf Baechle bool 20135e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 20145e83d430SRalf Baechle bool 201555045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 201655045ff5SWu Zhangjin bool 201755045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 201855045ff5SWu Zhangjin bool 20199cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 20209cffd154SDavid Daney bool 202122f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 202222f1fdfdSWu Zhangjin bool 202382622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 202482622284SDavid Daney bool 2025d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 20265e83d430SRalf Baechle 20278192c9eaSDavid Daney# 20288192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 20298192c9eaSDavid Daney# 20308192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 20318192c9eaSDavid Daney bool 2032679eb637SJames Hogan default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 20338192c9eaSDavid Daney 20345e83d430SRalf Baechlemenu "Kernel type" 20355e83d430SRalf Baechle 20365e83d430SRalf Baechlechoice 20375e83d430SRalf Baechle prompt "Kernel code model" 20385e83d430SRalf Baechle help 20395e83d430SRalf Baechle You should only select this option if you have a workload that 20405e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 20415e83d430SRalf Baechle large memory. You will only be presented a single option in this 20425e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 20435e83d430SRalf Baechle 20445e83d430SRalf Baechleconfig 32BIT 20455e83d430SRalf Baechle bool "32-bit kernel" 20465e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 20475e83d430SRalf Baechle select TRAD_SIGNALS 20485e83d430SRalf Baechle help 20495e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 2050f17c4ca3SRalf Baechle 20515e83d430SRalf Baechleconfig 64BIT 20525e83d430SRalf Baechle bool "64-bit kernel" 20535e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 20545e83d430SRalf Baechle help 20555e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 20565e83d430SRalf Baechle 20575e83d430SRalf Baechleendchoice 20585e83d430SRalf Baechle 20592235a54dSSanjay Lalconfig KVM_GUEST 20602235a54dSSanjay Lal bool "KVM Guest Kernel" 2061f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 20622235a54dSSanjay Lal help 2063caa1faa7SJames Hogan Select this option if building a guest kernel for KVM (Trap & Emulate) 2064caa1faa7SJames Hogan mode. 20652235a54dSSanjay Lal 2066eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 2067eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 20682235a54dSSanjay Lal depends on KVM_GUEST 2069eda3d33cSJames Hogan default 100 20702235a54dSSanjay Lal help 2071eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 2072eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 2073eda3d33cSJames Hogan timer frequency is specified directly. 20742235a54dSSanjay Lal 20751e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48 20761e321fa9SLeonid Yegoshin bool "48 bits virtual memory" 20771e321fa9SLeonid Yegoshin depends on 64BIT 20781e321fa9SLeonid Yegoshin help 20791e321fa9SLeonid Yegoshin Support a maximum at least 48 bits of application virtual memory. 20801e321fa9SLeonid Yegoshin Default is 40 bits or less, depending on the CPU. 20811e321fa9SLeonid Yegoshin This option result in a small memory overhead for page tables. 20821e321fa9SLeonid Yegoshin This option is only supported with 16k and 64k page sizes. 20831e321fa9SLeonid Yegoshin If unsure, say N. 20841e321fa9SLeonid Yegoshin 20851da177e4SLinus Torvaldschoice 20861da177e4SLinus Torvalds prompt "Kernel page size" 20871da177e4SLinus Torvalds default PAGE_SIZE_4KB 20881da177e4SLinus Torvalds 20891da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 20901da177e4SLinus Torvalds bool "4kB" 20910e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 20921e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 20931da177e4SLinus Torvalds help 20941da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 20951da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 20961da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 20971da177e4SLinus Torvalds recommended for low memory systems. 20981da177e4SLinus Torvalds 20991da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 21001da177e4SLinus Torvalds bool "8kB" 21017d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 21021e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 21031da177e4SLinus Torvalds help 21041da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 21051da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2106c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 2107c52399beSRalf Baechle suitable Linux distribution to support this. 21081da177e4SLinus Torvalds 21091da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 21101da177e4SLinus Torvalds bool "16kB" 2111714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 21121da177e4SLinus Torvalds help 21131da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 21141da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2115714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2116714bfad6SRalf Baechle Linux distribution to support this. 21171da177e4SLinus Torvalds 2118c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2119c52399beSRalf Baechle bool "32kB" 2120c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 21211e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 2122c52399beSRalf Baechle help 2123c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2124c52399beSRalf Baechle the price of higher memory consumption. This option is available 2125c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2126c52399beSRalf Baechle distribution to support this. 2127c52399beSRalf Baechle 21281da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 21291da177e4SLinus Torvalds bool "64kB" 213074c81ecdSRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000 21311da177e4SLinus Torvalds help 21321da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 21331da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 21341da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2135714bfad6SRalf Baechle writing this option is still high experimental. 21361da177e4SLinus Torvalds 21371da177e4SLinus Torvaldsendchoice 21381da177e4SLinus Torvalds 2139c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2140c9bace7cSDavid Daney int "Maximum zone order" 2141e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2142e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2143e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2144e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2145e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2146e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2147c9bace7cSDavid Daney range 11 64 2148c9bace7cSDavid Daney default "11" 2149c9bace7cSDavid Daney help 2150c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2151c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2152c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2153c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2154c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2155c9bace7cSDavid Daney increase this value. 2156c9bace7cSDavid Daney 2157c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2158c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2159c9bace7cSDavid Daney 2160c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2161c9bace7cSDavid Daney when choosing a value for this option. 2162c9bace7cSDavid Daney 21631da177e4SLinus Torvaldsconfig BOARD_SCACHE 21641da177e4SLinus Torvalds bool 21651da177e4SLinus Torvalds 21661da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 21671da177e4SLinus Torvalds bool 21681da177e4SLinus Torvalds select BOARD_SCACHE 21691da177e4SLinus Torvalds 21709318c51aSChris Dearman# 21719318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 21729318c51aSChris Dearman# 21739318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 21749318c51aSChris Dearman bool 21759318c51aSChris Dearman select BOARD_SCACHE 21769318c51aSChris Dearman 21771da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 21781da177e4SLinus Torvalds bool 21791da177e4SLinus Torvalds select BOARD_SCACHE 21801da177e4SLinus Torvalds 21811da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 21821da177e4SLinus Torvalds bool 21831da177e4SLinus Torvalds select BOARD_SCACHE 21841da177e4SLinus Torvalds 21851da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 21861da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 21871da177e4SLinus Torvalds depends on CPU_SB1 21881da177e4SLinus Torvalds help 21891da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 21901da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 21911da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 21921da177e4SLinus Torvalds 21931da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2194c8094b53SRalf Baechle bool 21951da177e4SLinus Torvalds 21963165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 21973165c846SFlorian Fainelli bool 21983165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 21993165c846SFlorian Fainelli 220091405eb6SFlorian Fainelliconfig CPU_R4K_FPU 220191405eb6SFlorian Fainelli bool 220291405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 220391405eb6SFlorian Fainelli 220462cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 220562cedc4fSFlorian Fainelli bool 220662cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 220762cedc4fSFlorian Fainelli 220859d6ab86SRalf Baechleconfig MIPS_MT_SMP 2209a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 22105676319cSMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 221159d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2212d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2213c080faa5SSteven J. Hill select SYNC_R4K 221459d6ab86SRalf Baechle select MIPS_MT 221559d6ab86SRalf Baechle select SMP 221687353d8aSRalf Baechle select SMP_UP 2217c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2218c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2219399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 222059d6ab86SRalf Baechle help 2221c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2222c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2223c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2224c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2225c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 222659d6ab86SRalf Baechle 2227f41ae0b2SRalf Baechleconfig MIPS_MT 2228f41ae0b2SRalf Baechle bool 2229f41ae0b2SRalf Baechle 22300ab7aefcSRalf Baechleconfig SCHED_SMT 22310ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 22320ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 22330ab7aefcSRalf Baechle default n 22340ab7aefcSRalf Baechle help 22350ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 22360ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 22370ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 22380ab7aefcSRalf Baechle 22390ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 22400ab7aefcSRalf Baechle bool 22410ab7aefcSRalf Baechle 2242f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2243f41ae0b2SRalf Baechle bool 2244f41ae0b2SRalf Baechle 2245f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2246f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2247f088fc84SRalf Baechle default y 2248b633648cSRalf Baechle depends on MIPS_MT_SMP 224907cc0c9eSRalf Baechle 2250b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2251b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 2252b0a668fbSLeonid Yegoshin depends on CPU_MIPSR6 && !SMP 2253b0a668fbSLeonid Yegoshin default y 2254b0a668fbSLeonid Yegoshin help 2255b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2256b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 225707edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2258b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2259b0a668fbSLeonid Yegoshin final kernel image. 2260b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels" 2261b0a668fbSLeonid Yegoshin depends on SMP && CPU_MIPSR6 2262b0a668fbSLeonid Yegoshin 226307cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 226407cc0c9eSRalf Baechle bool "VPE loader support." 2265704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 226607cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 226707cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 226807cc0c9eSRalf Baechle select MIPS_MT 226907cc0c9eSRalf Baechle help 227007cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 227107cc0c9eSRalf Baechle onto another VPE and running it. 2272f088fc84SRalf Baechle 227317a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 227417a1d523SDeng-Cheng Zhu bool 227517a1d523SDeng-Cheng Zhu default "y" 227617a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 227717a1d523SDeng-Cheng Zhu 22781a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 22791a2a6d7eSDeng-Cheng Zhu bool 22801a2a6d7eSDeng-Cheng Zhu default "y" 22811a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 22821a2a6d7eSDeng-Cheng Zhu 2283e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2284e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2285e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2286e01402b1SRalf Baechle default y 2287e01402b1SRalf Baechle help 2288e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2289e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2290e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2291e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2292e01402b1SRalf Baechle 2293e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2294e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2295e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 22965e83d430SRalf Baechle help 2297e01402b1SRalf Baechle 2298da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2299da615cf6SDeng-Cheng Zhu bool 2300da615cf6SDeng-Cheng Zhu default "y" 2301da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2302da615cf6SDeng-Cheng Zhu 23032c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 23042c973ef0SDeng-Cheng Zhu bool 23052c973ef0SDeng-Cheng Zhu default "y" 23062c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 23072c973ef0SDeng-Cheng Zhu 23084a16ff4cSRalf Baechleconfig MIPS_CMP 23095cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 23105676319cSMarkos Chandras depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 2311b10b43baSMarkos Chandras select SMP 2312eb9b5141STim Anderson select SYNC_R4K 2313b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 23144a16ff4cSRalf Baechle select WEAK_ORDERING 23154a16ff4cSRalf Baechle default n 23164a16ff4cSRalf Baechle help 2317044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2318044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2319044505c7SPaul Burton its ability to start secondary CPUs. 23204a16ff4cSRalf Baechle 23215cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 23225cac93b3SPaul Burton instead of this. 23235cac93b3SPaul Burton 23240ee958e1SPaul Burtonconfig MIPS_CPS 23250ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 23265a3e7c02SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 23270ee958e1SPaul Burton select MIPS_CM 23280ee958e1SPaul Burton select MIPS_CPC 23291d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 23300ee958e1SPaul Burton select SMP 23310ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 23321d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 23330ee958e1SPaul Burton select SYS_SUPPORTS_SMP 23340ee958e1SPaul Burton select WEAK_ORDERING 23350ee958e1SPaul Burton help 23360ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 23370ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 23380ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 23390ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 23400ee958e1SPaul Burton support is unavailable. 23410ee958e1SPaul Burton 23423179d37eSPaul Burtonconfig MIPS_CPS_PM 234339a59593SMarkos Chandras depends on MIPS_CPS 2344a8b84677SPaul Burton select MIPS_CPC 23453179d37eSPaul Burton bool 23463179d37eSPaul Burton 23479f98f3ddSPaul Burtonconfig MIPS_CM 23489f98f3ddSPaul Burton bool 23499f98f3ddSPaul Burton 23509c38cf44SPaul Burtonconfig MIPS_CPC 23519c38cf44SPaul Burton bool 23522600990eSRalf Baechle 23531da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 23541da177e4SLinus Torvalds bool 23551da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 23561da177e4SLinus Torvalds default y 23571da177e4SLinus Torvalds 23581da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 23591da177e4SLinus Torvalds bool 23601da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 23611da177e4SLinus Torvalds default y 23621da177e4SLinus Torvalds 23632235a54dSSanjay Lal 236460ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 236534adb28dSRalf Baechle bool 236660ec6571Spascal@pabr.org 23679e2b5372SMarkos Chandraschoice 23689e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 23699e2b5372SMarkos Chandras 23709e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 23719e2b5372SMarkos Chandras bool "None" 23729e2b5372SMarkos Chandras help 23739e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 23749e2b5372SMarkos Chandras 23759693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 23769693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 23779e2b5372SMarkos Chandras bool "SmartMIPS" 23789693a853SFranck Bui-Huu help 23799693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 23809693a853SFranck Bui-Huu increased security at both hardware and software level for 23819693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 23829693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 23839693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 23849693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 23859693a853SFranck Bui-Huu here. 23869693a853SFranck Bui-Huu 2387bce86083SSteven J. Hillconfig CPU_MICROMIPS 23887fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 23899e2b5372SMarkos Chandras bool "microMIPS" 2390bce86083SSteven J. Hill help 2391bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2392bce86083SSteven J. Hill microMIPS ISA 2393bce86083SSteven J. Hill 23949e2b5372SMarkos Chandrasendchoice 23959e2b5372SMarkos Chandras 2396a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 23970ce3417eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2398a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 23992a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2400a5e9a69eSPaul Burton help 2401a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2402a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 24031db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 24041db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 24051db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 24061db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 24071db1af84SPaul Burton the size & complexity of your kernel. 2408a5e9a69eSPaul Burton 2409a5e9a69eSPaul Burton If unsure, say Y. 2410a5e9a69eSPaul Burton 24111da177e4SLinus Torvaldsconfig CPU_HAS_WB 2412f7062ddbSRalf Baechle bool 2413e01402b1SRalf Baechle 2414df0ac8a4SKevin Cernekeeconfig XKS01 2415df0ac8a4SKevin Cernekee bool 2416df0ac8a4SKevin Cernekee 24178256b17eSFlorian Fainelliconfig CPU_HAS_RIXI 24188256b17eSFlorian Fainelli bool 24198256b17eSFlorian Fainelli 2420f41ae0b2SRalf Baechle# 2421f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2422f41ae0b2SRalf Baechle# 2423e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2424f41ae0b2SRalf Baechle bool 2425e01402b1SRalf Baechle 2426f41ae0b2SRalf Baechle# 2427f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2428f41ae0b2SRalf Baechle# 2429e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2430f41ae0b2SRalf Baechle bool 2431e01402b1SRalf Baechle 24321da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 24331da177e4SLinus Torvalds bool 24341da177e4SLinus Torvalds depends on !CPU_R3000 24351da177e4SLinus Torvalds default y 24361da177e4SLinus Torvalds 24371da177e4SLinus Torvalds# 243820d60d99SMaciej W. Rozycki# CPU non-features 243920d60d99SMaciej W. Rozycki# 244020d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 244120d60d99SMaciej W. Rozycki bool 244220d60d99SMaciej W. Rozycki 244320d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 244420d60d99SMaciej W. Rozycki bool 244520d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 244620d60d99SMaciej W. Rozycki 244720d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 244820d60d99SMaciej W. Rozycki bool 244920d60d99SMaciej W. Rozycki 24504edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT 24514edf00a4SPaul Burton int 24524edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24534edf00a4SPaul Burton default 4 if CPU_R8000 24544edf00a4SPaul Burton default 0 24554edf00a4SPaul Burton 24564edf00a4SPaul Burtonconfig MIPS_ASID_BITS 24574edf00a4SPaul Burton int 24582db003a5SPaul Burton default 0 if MIPS_ASID_BITS_VARIABLE 24594edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24604edf00a4SPaul Burton default 8 24614edf00a4SPaul Burton 24622db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE 24632db003a5SPaul Burton bool 24642db003a5SPaul Burton 246520d60d99SMaciej W. Rozycki# 24661da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 24671da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 24681da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 24691da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 24701da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 24711da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 24721da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 24731da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2474797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2475797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2476797798c1SRalf Baechle# support. 24771da177e4SLinus Torvalds# 24781da177e4SLinus Torvaldsconfig HIGHMEM 24791da177e4SLinus Torvalds bool "High Memory Support" 2480a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2481797798c1SRalf Baechle 2482797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2483797798c1SRalf Baechle bool 2484797798c1SRalf Baechle 2485797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2486797798c1SRalf Baechle bool 24871da177e4SLinus Torvalds 24889693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 24899693a853SFranck Bui-Huu bool 24909693a853SFranck Bui-Huu 2491a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2492a6a4834cSSteven J. Hill bool 2493a6a4834cSSteven J. Hill 2494377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2495377cb1b6SRalf Baechle bool 2496377cb1b6SRalf Baechle help 2497377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2498377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2499377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2500377cb1b6SRalf Baechle 2501a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2502a5e9a69eSPaul Burton bool 2503a5e9a69eSPaul Burton 2504b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2505b4819b59SYoichi Yuasa def_bool y 2506f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2507b4819b59SYoichi Yuasa 2508d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2509d8cb4e11SRalf Baechle bool 2510d8cb4e11SRalf Baechle default y if SGI_IP27 2511d8cb4e11SRalf Baechle help 25123dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2513d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2514d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2515d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2516d8cb4e11SRalf Baechle 2517b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2518b1c6cd42SAtsushi Nemoto bool 25197de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 252031473747SAtsushi Nemoto 2521d8cb4e11SRalf Baechleconfig NUMA 2522d8cb4e11SRalf Baechle bool "NUMA Support" 2523d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2524d8cb4e11SRalf Baechle help 2525d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2526d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2527d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2528d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2529d8cb4e11SRalf Baechle disabled. 2530d8cb4e11SRalf Baechle 2531d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2532d8cb4e11SRalf Baechle bool 2533d8cb4e11SRalf Baechle 25348c530ea3SMatt Redfearnconfig RELOCATABLE 25358c530ea3SMatt Redfearn bool "Relocatable kernel" 25368c530ea3SMatt Redfearn depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6) 25378c530ea3SMatt Redfearn help 25388c530ea3SMatt Redfearn This builds a kernel image that retains relocation information 25398c530ea3SMatt Redfearn so it can be loaded someplace besides the default 1MB. 25408c530ea3SMatt Redfearn The relocations make the kernel binary about 15% larger, 25418c530ea3SMatt Redfearn but are discarded at runtime 25428c530ea3SMatt Redfearn 2543069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE 2544069fd766SMatt Redfearn hex "Relocation table size" 2545069fd766SMatt Redfearn depends on RELOCATABLE 2546069fd766SMatt Redfearn range 0x0 0x01000000 2547069fd766SMatt Redfearn default "0x00100000" 2548069fd766SMatt Redfearn ---help--- 2549069fd766SMatt Redfearn A table of relocation data will be appended to the kernel binary 2550069fd766SMatt Redfearn and parsed at boot to fix up the relocated kernel. 2551069fd766SMatt Redfearn 2552069fd766SMatt Redfearn This option allows the amount of space reserved for the table to be 2553069fd766SMatt Redfearn adjusted, although the default of 1Mb should be ok in most cases. 2554069fd766SMatt Redfearn 2555069fd766SMatt Redfearn The build will fail and a valid size suggested if this is too small. 2556069fd766SMatt Redfearn 2557069fd766SMatt Redfearn If unsure, leave at the default value. 2558069fd766SMatt Redfearn 2559405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE 2560405bc8fdSMatt Redfearn bool "Randomize the address of the kernel image" 2561405bc8fdSMatt Redfearn depends on RELOCATABLE 2562405bc8fdSMatt Redfearn ---help--- 2563405bc8fdSMatt Redfearn Randomizes the physical and virtual address at which the 2564405bc8fdSMatt Redfearn kernel image is loaded, as a security feature that 2565405bc8fdSMatt Redfearn deters exploit attempts relying on knowledge of the location 2566405bc8fdSMatt Redfearn of kernel internals. 2567405bc8fdSMatt Redfearn 2568405bc8fdSMatt Redfearn Entropy is generated using any coprocessor 0 registers available. 2569405bc8fdSMatt Redfearn 2570405bc8fdSMatt Redfearn The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2571405bc8fdSMatt Redfearn 2572405bc8fdSMatt Redfearn If unsure, say N. 2573405bc8fdSMatt Redfearn 2574405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET 2575405bc8fdSMatt Redfearn hex "Maximum kASLR offset" if EXPERT 2576405bc8fdSMatt Redfearn depends on RANDOMIZE_BASE 2577405bc8fdSMatt Redfearn range 0x0 0x40000000 if EVA || 64BIT 2578405bc8fdSMatt Redfearn range 0x0 0x08000000 2579405bc8fdSMatt Redfearn default "0x01000000" 2580405bc8fdSMatt Redfearn ---help--- 2581405bc8fdSMatt Redfearn When kASLR is active, this provides the maximum offset that will 2582405bc8fdSMatt Redfearn be applied to the kernel image. It should be set according to the 2583405bc8fdSMatt Redfearn amount of physical RAM available in the target system minus 2584405bc8fdSMatt Redfearn PHYSICAL_START and must be a power of 2. 2585405bc8fdSMatt Redfearn 2586405bc8fdSMatt Redfearn This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2587405bc8fdSMatt Redfearn EVA or 64-bit. The default is 16Mb. 2588405bc8fdSMatt Redfearn 2589c80d79d7SYasunori Gotoconfig NODES_SHIFT 2590c80d79d7SYasunori Goto int 2591c80d79d7SYasunori Goto default "6" 2592c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2593c80d79d7SYasunori Goto 259414f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 259514f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 259623021b2bSYang Shi depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) 259714f70012SDeng-Cheng Zhu default y 259814f70012SDeng-Cheng Zhu help 259914f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 260014f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 260114f70012SDeng-Cheng Zhu 2602b4819b59SYoichi Yuasasource "mm/Kconfig" 2603b4819b59SYoichi Yuasa 26041da177e4SLinus Torvaldsconfig SMP 26051da177e4SLinus Torvalds bool "Multi-Processing support" 2606e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2607e73ea273SRalf Baechle help 26081da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 26094a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 26104a474157SRobert Graffham than one CPU, say Y. 26111da177e4SLinus Torvalds 26124a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 26131da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 26141da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 26154a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 26161da177e4SLinus Torvalds will run faster if you say N here. 26171da177e4SLinus Torvalds 26181da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 26191da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 26201da177e4SLinus Torvalds 262103502faaSAdrian Bunk See also the SMP-HOWTO available at 262203502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 26231da177e4SLinus Torvalds 26241da177e4SLinus Torvalds If you don't know what to do here, say N. 26251da177e4SLinus Torvalds 26267840d618SMatt Redfearnconfig HOTPLUG_CPU 26277840d618SMatt Redfearn bool "Support for hot-pluggable CPUs" 26287840d618SMatt Redfearn depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 26297840d618SMatt Redfearn help 26307840d618SMatt Redfearn Say Y here to allow turning CPUs off and on. CPUs can be 26317840d618SMatt Redfearn controlled through /sys/devices/system/cpu. 26327840d618SMatt Redfearn (Note: power management support will enable this option 26337840d618SMatt Redfearn automatically on SMP systems. ) 26347840d618SMatt Redfearn Say N if you want to disable CPU hotplug. 26357840d618SMatt Redfearn 263687353d8aSRalf Baechleconfig SMP_UP 263787353d8aSRalf Baechle bool 263887353d8aSRalf Baechle 26394a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 26404a16ff4cSRalf Baechle bool 26414a16ff4cSRalf Baechle 26420ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 26430ee958e1SPaul Burton bool 26440ee958e1SPaul Burton 2645e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2646e73ea273SRalf Baechle bool 2647e73ea273SRalf Baechle 2648130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2649130e2fb7SRalf Baechle bool 2650130e2fb7SRalf Baechle 2651130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2652130e2fb7SRalf Baechle bool 2653130e2fb7SRalf Baechle 2654130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2655130e2fb7SRalf Baechle bool 2656130e2fb7SRalf Baechle 2657130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2658130e2fb7SRalf Baechle bool 2659130e2fb7SRalf Baechle 2660130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2661130e2fb7SRalf Baechle bool 2662130e2fb7SRalf Baechle 26631da177e4SLinus Torvaldsconfig NR_CPUS 2664a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2665a91796a9SJayachandran C range 2 256 26661da177e4SLinus Torvalds depends on SMP 2667130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2668130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2669130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2670130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2671130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 26721da177e4SLinus Torvalds help 26731da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 26741da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 26751da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 267672ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 267772ede9b1SAtsushi Nemoto and 2 for all others. 26781da177e4SLinus Torvalds 26791da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 268072ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 268172ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 268272ede9b1SAtsushi Nemoto power of two. 26831da177e4SLinus Torvalds 2684399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2685399aaa25SAl Cooper bool 2686399aaa25SAl Cooper 26871723b4a3SAtsushi Nemoto# 26881723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 26891723b4a3SAtsushi Nemoto# 26901723b4a3SAtsushi Nemoto 26911723b4a3SAtsushi Nemotochoice 26921723b4a3SAtsushi Nemoto prompt "Timer frequency" 26931723b4a3SAtsushi Nemoto default HZ_250 26941723b4a3SAtsushi Nemoto help 26951723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 26961723b4a3SAtsushi Nemoto 269767596573SPaul Burton config HZ_24 269867596573SPaul Burton bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 269967596573SPaul Burton 27001723b4a3SAtsushi Nemoto config HZ_48 27010f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 27021723b4a3SAtsushi Nemoto 27031723b4a3SAtsushi Nemoto config HZ_100 27041723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 27051723b4a3SAtsushi Nemoto 27061723b4a3SAtsushi Nemoto config HZ_128 27071723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 27081723b4a3SAtsushi Nemoto 27091723b4a3SAtsushi Nemoto config HZ_250 27101723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 27111723b4a3SAtsushi Nemoto 27121723b4a3SAtsushi Nemoto config HZ_256 27131723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 27141723b4a3SAtsushi Nemoto 27151723b4a3SAtsushi Nemoto config HZ_1000 27161723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 27171723b4a3SAtsushi Nemoto 27181723b4a3SAtsushi Nemoto config HZ_1024 27191723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 27201723b4a3SAtsushi Nemoto 27211723b4a3SAtsushi Nemotoendchoice 27221723b4a3SAtsushi Nemoto 272367596573SPaul Burtonconfig SYS_SUPPORTS_24HZ 272467596573SPaul Burton bool 272567596573SPaul Burton 27261723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 27271723b4a3SAtsushi Nemoto bool 27281723b4a3SAtsushi Nemoto 27291723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 27301723b4a3SAtsushi Nemoto bool 27311723b4a3SAtsushi Nemoto 27321723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 27331723b4a3SAtsushi Nemoto bool 27341723b4a3SAtsushi Nemoto 27351723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 27361723b4a3SAtsushi Nemoto bool 27371723b4a3SAtsushi Nemoto 27381723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 27391723b4a3SAtsushi Nemoto bool 27401723b4a3SAtsushi Nemoto 27411723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 27421723b4a3SAtsushi Nemoto bool 27431723b4a3SAtsushi Nemoto 27441723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 27451723b4a3SAtsushi Nemoto bool 27461723b4a3SAtsushi Nemoto 27471723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 27481723b4a3SAtsushi Nemoto bool 274967596573SPaul Burton default y if !SYS_SUPPORTS_24HZ && \ 275067596573SPaul Burton !SYS_SUPPORTS_48HZ && \ 275167596573SPaul Burton !SYS_SUPPORTS_100HZ && \ 275267596573SPaul Burton !SYS_SUPPORTS_128HZ && \ 275367596573SPaul Burton !SYS_SUPPORTS_250HZ && \ 275467596573SPaul Burton !SYS_SUPPORTS_256HZ && \ 275567596573SPaul Burton !SYS_SUPPORTS_1000HZ && \ 27561723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 27571723b4a3SAtsushi Nemoto 27581723b4a3SAtsushi Nemotoconfig HZ 27591723b4a3SAtsushi Nemoto int 276067596573SPaul Burton default 24 if HZ_24 27611723b4a3SAtsushi Nemoto default 48 if HZ_48 27621723b4a3SAtsushi Nemoto default 100 if HZ_100 27631723b4a3SAtsushi Nemoto default 128 if HZ_128 27641723b4a3SAtsushi Nemoto default 250 if HZ_250 27651723b4a3SAtsushi Nemoto default 256 if HZ_256 27661723b4a3SAtsushi Nemoto default 1000 if HZ_1000 27671723b4a3SAtsushi Nemoto default 1024 if HZ_1024 27681723b4a3SAtsushi Nemoto 276996685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 277096685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 277196685b17SDeng-Cheng Zhu 2772e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 27731da177e4SLinus Torvalds 2774ea6e942bSAtsushi Nemotoconfig KEXEC 27757d60717eSKees Cook bool "Kexec system call" 27762965faa5SDave Young select KEXEC_CORE 2777ea6e942bSAtsushi Nemoto help 2778ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2779ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 27803dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2781ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2782ea6e942bSAtsushi Nemoto 278301dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2784ea6e942bSAtsushi Nemoto 2785ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2786ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2787bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2788bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2789bf220695SGeert Uytterhoeven made. 2790ea6e942bSAtsushi Nemoto 27917aa1c8f4SRalf Baechleconfig CRASH_DUMP 27927aa1c8f4SRalf Baechle bool "Kernel crash dumps" 27937aa1c8f4SRalf Baechle help 27947aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 27957aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 27967aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 27977aa1c8f4SRalf Baechle a specially reserved region and then later executed after 27987aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 27997aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 28007aa1c8f4SRalf Baechle PHYSICAL_START. 28017aa1c8f4SRalf Baechle 28027aa1c8f4SRalf Baechleconfig PHYSICAL_START 28037aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 28047aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 28057aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 28067aa1c8f4SRalf Baechle depends on CRASH_DUMP 28077aa1c8f4SRalf Baechle help 28087aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 28097aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 28107aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 28117aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 28127aa1c8f4SRalf Baechle passed to the panic-ed kernel). 28137aa1c8f4SRalf Baechle 2814ea6e942bSAtsushi Nemotoconfig SECCOMP 2815ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2816293c5bd1SRalf Baechle depends on PROC_FS 2817ea6e942bSAtsushi Nemoto default y 2818ea6e942bSAtsushi Nemoto help 2819ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2820ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2821ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2822ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2823ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2824ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2825ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2826ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2827ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2828ea6e942bSAtsushi Nemoto 2829ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2830ea6e942bSAtsushi Nemoto 2831597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 28320ce3417eSPaul Burton bool "Support for O32 binaries using 64-bit FP" 2833597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2834597ce172SPaul Burton help 2835597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2836597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2837597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2838597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2839597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2840597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2841597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2842597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2843597ce172SPaul Burton saying N here. 2844597ce172SPaul Burton 284506e2e882SPaul Burton Although binutils currently supports use of this flag the details 284606e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 284706e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 284806e2e882SPaul Burton behaviour before the details have been finalised, this option should 284906e2e882SPaul Burton be considered experimental and only enabled by those working upon 285006e2e882SPaul Burton said details. 285106e2e882SPaul Burton 285206e2e882SPaul Burton If unsure, say N. 2853597ce172SPaul Burton 2854f2ffa5abSDezhong Diaoconfig USE_OF 28550b3e06fdSJonas Gorski bool 2856f2ffa5abSDezhong Diao select OF 2857e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2858abd2363fSGrant Likely select IRQ_DOMAIN 2859f2ffa5abSDezhong Diao 28607fafb068SAndrew Brestickerconfig BUILTIN_DTB 28617fafb068SAndrew Bresticker bool 28627fafb068SAndrew Bresticker 28631da8f179SJonas Gorskichoice 28645b24d52cSJonas Gorski prompt "Kernel appended dtb support" if USE_OF 28651da8f179SJonas Gorski default MIPS_NO_APPENDED_DTB 28661da8f179SJonas Gorski 28671da8f179SJonas Gorski config MIPS_NO_APPENDED_DTB 28681da8f179SJonas Gorski bool "None" 28691da8f179SJonas Gorski help 28701da8f179SJonas Gorski Do not enable appended dtb support. 28711da8f179SJonas Gorski 287287db537dSAaro Koskinen config MIPS_ELF_APPENDED_DTB 287387db537dSAaro Koskinen bool "vmlinux" 287487db537dSAaro Koskinen help 287587db537dSAaro Koskinen With this option, the boot code will look for a device tree binary 287687db537dSAaro Koskinen DTB) included in the vmlinux ELF section .appended_dtb. By default 287787db537dSAaro Koskinen it is empty and the DTB can be appended using binutils command 287887db537dSAaro Koskinen objcopy: 287987db537dSAaro Koskinen 288087db537dSAaro Koskinen objcopy --update-section .appended_dtb=<filename>.dtb vmlinux 288187db537dSAaro Koskinen 288287db537dSAaro Koskinen This is meant as a backward compatiblity convenience for those 288387db537dSAaro Koskinen systems with a bootloader that can't be upgraded to accommodate 288487db537dSAaro Koskinen the documented boot protocol using a device tree. 288587db537dSAaro Koskinen 28861da8f179SJonas Gorski config MIPS_RAW_APPENDED_DTB 28871da8f179SJonas Gorski bool "vmlinux.bin" 28881da8f179SJonas Gorski help 28891da8f179SJonas Gorski With this option, the boot code will look for a device tree binary 28901da8f179SJonas Gorski DTB) appended to raw vmlinux.bin (without decompressor). 28911da8f179SJonas Gorski (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 28921da8f179SJonas Gorski 28931da8f179SJonas Gorski This is meant as a backward compatibility convenience for those 28941da8f179SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 28951da8f179SJonas Gorski the documented boot protocol using a device tree. 28961da8f179SJonas Gorski 28971da8f179SJonas Gorski Beware that there is very little in terms of protection against 28981da8f179SJonas Gorski this option being confused by leftover garbage in memory that might 28991da8f179SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 29001da8f179SJonas Gorski to vmlinux.bin. Do not leave this option active in a production kernel 29011da8f179SJonas Gorski if you don't intend to always append a DTB. 2902c0b4e101SJonas Gorski 2903c0b4e101SJonas Gorski config MIPS_ZBOOT_APPENDED_DTB 2904c0b4e101SJonas Gorski bool "vmlinuz.bin" 2905c0b4e101SJonas Gorski depends on SYS_SUPPORTS_ZBOOT 2906c0b4e101SJonas Gorski help 2907c0b4e101SJonas Gorski With this option, the boot code will look for a device tree binary 2908c0b4e101SJonas Gorski DTB) appended to raw vmlinuz.bin (with decompressor). 2909c0b4e101SJonas Gorski (e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb). 2910c0b4e101SJonas Gorski 2911c0b4e101SJonas Gorski This is meant as a backward compatibility convenience for those 2912c0b4e101SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 2913c0b4e101SJonas Gorski the documented boot protocol using a device tree. 2914c0b4e101SJonas Gorski 2915c0b4e101SJonas Gorski Beware that there is very little in terms of protection against 2916c0b4e101SJonas Gorski this option being confused by leftover garbage in memory that might 2917c0b4e101SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 2918c0b4e101SJonas Gorski to vmlinuz.bin. Do not leave this option active in a production kernel 2919c0b4e101SJonas Gorski if you don't intend to always append a DTB. 29201da8f179SJonas Gorskiendchoice 29211da8f179SJonas Gorski 29222024972eSJonas Gorskichoice 29232024972eSJonas Gorski prompt "Kernel command line type" if !CMDLINE_OVERRIDE 29242bcef9b4SJonas Gorski default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 29252bcef9b4SJonas Gorski !MIPS_MALTA && !MIPS_SEAD3 && \ 29262bcef9b4SJonas Gorski !CAVIUM_OCTEON_SOC 29272024972eSJonas Gorski default MIPS_CMDLINE_FROM_BOOTLOADER 29282024972eSJonas Gorski 29292024972eSJonas Gorski config MIPS_CMDLINE_FROM_DTB 29302024972eSJonas Gorski depends on USE_OF 29312024972eSJonas Gorski bool "Dtb kernel arguments if available" 29322024972eSJonas Gorski 29332024972eSJonas Gorski config MIPS_CMDLINE_DTB_EXTEND 29342024972eSJonas Gorski depends on USE_OF 29352024972eSJonas Gorski bool "Extend dtb kernel arguments with bootloader arguments" 29362024972eSJonas Gorski 29372024972eSJonas Gorski config MIPS_CMDLINE_FROM_BOOTLOADER 29382024972eSJonas Gorski bool "Bootloader kernel arguments if available" 2939ed47e153SRabin Vincent 2940ed47e153SRabin Vincent config MIPS_CMDLINE_BUILTIN_EXTEND 2941ed47e153SRabin Vincent depends on CMDLINE_BOOL 2942ed47e153SRabin Vincent bool "Extend builtin kernel arguments with bootloader arguments" 29432024972eSJonas Gorskiendchoice 29442024972eSJonas Gorski 29455e83d430SRalf Baechleendmenu 29465e83d430SRalf Baechle 29471df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 29481df0f0ffSAtsushi Nemoto bool 29491df0f0ffSAtsushi Nemoto default y 29501df0f0ffSAtsushi Nemoto 29511df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 29521df0f0ffSAtsushi Nemoto bool 29531df0f0ffSAtsushi Nemoto default y 29541df0f0ffSAtsushi Nemoto 2955e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT 2956e1e16115SAaro Koskinen bool 2957e1e16115SAaro Koskinen default y 2958e1e16115SAaro Koskinen 2959a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 2960a728ab52SKirill A. Shutemov int 2961a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 2962a728ab52SKirill A. Shutemov default 2 2963a728ab52SKirill A. Shutemov 2964b6c3539bSRalf Baechlesource "init/Kconfig" 2965b6c3539bSRalf Baechle 2966dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2967dc52ddc0SMatt Helsley 29681da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 29691da177e4SLinus Torvalds 29705e83d430SRalf Baechleconfig HW_HAS_EISA 29715e83d430SRalf Baechle bool 29721da177e4SLinus Torvaldsconfig HW_HAS_PCI 29731da177e4SLinus Torvalds bool 29741da177e4SLinus Torvalds 29751da177e4SLinus Torvaldsconfig PCI 29761da177e4SLinus Torvalds bool "Support for PCI controller" 29771da177e4SLinus Torvalds depends on HW_HAS_PCI 2978abb4ae46SRalf Baechle select PCI_DOMAINS 29790f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 29801da177e4SLinus Torvalds help 29811da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 29821da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 29831da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 29841da177e4SLinus Torvalds say Y, otherwise N. 29851da177e4SLinus Torvalds 29860e476d91SHuacai Chenconfig HT_PCI 29870e476d91SHuacai Chen bool "Support for HT-linked PCI" 29880e476d91SHuacai Chen default y 29890e476d91SHuacai Chen depends on CPU_LOONGSON3 29900e476d91SHuacai Chen select PCI 29910e476d91SHuacai Chen select PCI_DOMAINS 29920e476d91SHuacai Chen help 29930e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 29940e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 29950e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 29960e476d91SHuacai Chen 29971da177e4SLinus Torvaldsconfig PCI_DOMAINS 29981da177e4SLinus Torvalds bool 29991da177e4SLinus Torvalds 30001da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 30011da177e4SLinus Torvalds 30021da177e4SLinus Torvalds# 30031da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 30041da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 30051da177e4SLinus Torvalds# users to choose the right thing ... 30061da177e4SLinus Torvalds# 30071da177e4SLinus Torvaldsconfig ISA 30081da177e4SLinus Torvalds bool 30091da177e4SLinus Torvalds 30101da177e4SLinus Torvaldsconfig EISA 30111da177e4SLinus Torvalds bool "EISA support" 30125e83d430SRalf Baechle depends on HW_HAS_EISA 30131da177e4SLinus Torvalds select ISA 3014aa414dffSRalf Baechle select GENERIC_ISA_DMA 30151da177e4SLinus Torvalds ---help--- 30161da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 30171da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 30181da177e4SLinus Torvalds 30191da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 30201da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 30211da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 30221da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 30231da177e4SLinus Torvalds 30241da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 30251da177e4SLinus Torvalds 30261da177e4SLinus Torvalds Otherwise, say N. 30271da177e4SLinus Torvalds 30281da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 30291da177e4SLinus Torvalds 30301da177e4SLinus Torvaldsconfig TC 30311da177e4SLinus Torvalds bool "TURBOchannel support" 30321da177e4SLinus Torvalds depends on MACH_DECSTATION 30331da177e4SLinus Torvalds help 303450a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 303550a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 303650a23e6eSJustin P. Mattock at: 303750a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 303850a23e6eSJustin P. Mattock and: 303950a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 304050a23e6eSJustin P. Mattock Linux driver support status is documented at: 304150a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 30421da177e4SLinus Torvalds 30431da177e4SLinus Torvaldsconfig MMU 30441da177e4SLinus Torvalds bool 30451da177e4SLinus Torvalds default y 30461da177e4SLinus Torvalds 3047d865bea4SRalf Baechleconfig I8253 3048d865bea4SRalf Baechle bool 3049798778b8SRussell King select CLKSRC_I8253 30502d02612fSThomas Gleixner select CLKEVT_I8253 30519726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 3052d865bea4SRalf Baechle 3053e05eb3f8SRalf Baechleconfig ZONE_DMA 3054e05eb3f8SRalf Baechle bool 3055e05eb3f8SRalf Baechle 3056cce335aeSRalf Baechleconfig ZONE_DMA32 3057cce335aeSRalf Baechle bool 3058cce335aeSRalf Baechle 30591da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 30601da177e4SLinus Torvalds 3061388b78adSAlexandre Bounineconfig RAPIDIO 306256abde72SAlexandre Bounine tristate "RapidIO support" 3063388b78adSAlexandre Bounine depends on PCI 3064388b78adSAlexandre Bounine default n 3065388b78adSAlexandre Bounine help 3066388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 3067388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 3068388b78adSAlexandre Bounine 3069388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 3070388b78adSAlexandre Bounine 30711da177e4SLinus Torvaldsendmenu 30721da177e4SLinus Torvalds 30731da177e4SLinus Torvaldsmenu "Executable file formats" 30741da177e4SLinus Torvalds 30751da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 30761da177e4SLinus Torvalds 30771da177e4SLinus Torvaldsconfig TRAD_SIGNALS 30781da177e4SLinus Torvalds bool 30791da177e4SLinus Torvalds 30801da177e4SLinus Torvaldsconfig MIPS32_COMPAT 308178aaf956SRalf Baechle bool 30821da177e4SLinus Torvalds 30831da177e4SLinus Torvaldsconfig COMPAT 30841da177e4SLinus Torvalds bool 30851da177e4SLinus Torvalds 308605e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 308705e43966SAtsushi Nemoto bool 308805e43966SAtsushi Nemoto 30891da177e4SLinus Torvaldsconfig MIPS32_O32 30901da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 309178aaf956SRalf Baechle depends on 64BIT 309278aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 309378aaf956SRalf Baechle select COMPAT 309478aaf956SRalf Baechle select MIPS32_COMPAT 309578aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 30961da177e4SLinus Torvalds help 30971da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 30981da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 30991da177e4SLinus Torvalds existing binaries are in this format. 31001da177e4SLinus Torvalds 31011da177e4SLinus Torvalds If unsure, say Y. 31021da177e4SLinus Torvalds 31031da177e4SLinus Torvaldsconfig MIPS32_N32 31041da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 3105c22eacfeSRalf Baechle depends on 64BIT 310678aaf956SRalf Baechle select COMPAT 310778aaf956SRalf Baechle select MIPS32_COMPAT 310878aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31091da177e4SLinus Torvalds help 31101da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 31111da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 31121da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 31131da177e4SLinus Torvalds cases. 31141da177e4SLinus Torvalds 31151da177e4SLinus Torvalds If unsure, say N. 31161da177e4SLinus Torvalds 31171da177e4SLinus Torvaldsconfig BINFMT_ELF32 31181da177e4SLinus Torvalds bool 31191da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 3120f43edca7SRalf Baechle select ELFCORE 31211da177e4SLinus Torvalds 31222116245eSRalf Baechleendmenu 31231da177e4SLinus Torvalds 31242116245eSRalf Baechlemenu "Power management options" 3125952fa954SRodolfo Giometti 3126363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 3127363c55caSWu Zhangjin def_bool y 31283f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3129363c55caSWu Zhangjin 3130f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 3131f4cb5700SJohannes Berg def_bool y 31323f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3133f4cb5700SJohannes Berg 31342116245eSRalf Baechlesource "kernel/power/Kconfig" 3135952fa954SRodolfo Giometti 31361da177e4SLinus Torvaldsendmenu 31371da177e4SLinus Torvalds 31387a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 31397a998935SViresh Kumar bool 31407a998935SViresh Kumar 31417a998935SViresh Kumarmenu "CPU Power Management" 3142c095ebafSPaul Burton 3143c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 31447a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 31457a998935SViresh Kumarendif 31469726b43aSWu Zhangjin 3147c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 3148c095ebafSPaul Burton 3149c095ebafSPaul Burtonendmenu 3150c095ebafSPaul Burton 3151d5950b43SSam Ravnborgsource "net/Kconfig" 3152d5950b43SSam Ravnborg 31531da177e4SLinus Torvaldssource "drivers/Kconfig" 31541da177e4SLinus Torvalds 315598cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 315698cdee0eSRalf Baechle 31571da177e4SLinus Torvaldssource "fs/Kconfig" 31581da177e4SLinus Torvalds 31591da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 31601da177e4SLinus Torvalds 31611da177e4SLinus Torvaldssource "security/Kconfig" 31621da177e4SLinus Torvalds 31631da177e4SLinus Torvaldssource "crypto/Kconfig" 31641da177e4SLinus Torvalds 31651da177e4SLinus Torvaldssource "lib/Kconfig" 31662235a54dSSanjay Lal 31672235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 3168