1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 21da177e4SLinus Torvaldsconfig MIPS 31da177e4SLinus Torvalds bool 41da177e4SLinus Torvalds default y 512597988SMatt Redfearn select ARCH_BINFMT_ELF_STATE 612597988SMatt Redfearn select ARCH_CLOCKSOURCE_DATA 712597988SMatt Redfearn select ARCH_DISCARD_MEMBLOCK 812597988SMatt Redfearn select ARCH_HAS_ELF_RANDOMIZE 912597988SMatt Redfearn select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 10a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 11393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 1212597988SMatt Redfearn select ARCH_SUPPORTS_UPROBES 131ee3630aSRalf Baechle select ARCH_USE_BUILTIN_BSWAP 1412597988SMatt Redfearn select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 1525da4e9dSPaul Burton select ARCH_USE_QUEUED_RWLOCKS 160b17c967SPaul Burton select ARCH_USE_QUEUED_SPINLOCKS 1712597988SMatt Redfearn select ARCH_WANT_IPC_PARSE_VERSION 1812597988SMatt Redfearn select BUILDTIME_EXTABLE_SORT 1912597988SMatt Redfearn select CLONE_BACKWARDS 2012597988SMatt Redfearn select CPU_PM if CPU_IDLE 2112597988SMatt Redfearn select GENERIC_ATOMIC64 if !64BIT 2212597988SMatt Redfearn select GENERIC_CLOCKEVENTS 2312597988SMatt Redfearn select GENERIC_CMOS_UPDATE 2412597988SMatt Redfearn select GENERIC_CPU_AUTOPROBE 2512597988SMatt Redfearn select GENERIC_IRQ_PROBE 2612597988SMatt Redfearn select GENERIC_IRQ_SHOW 2712597988SMatt Redfearn select GENERIC_PCI_IOMAP 2812597988SMatt Redfearn select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 2912597988SMatt Redfearn select GENERIC_SMP_IDLE_THREAD 3012597988SMatt Redfearn select GENERIC_TIME_VSYSCALL 3112597988SMatt Redfearn select HANDLE_DOMAIN_IRQ 3212597988SMatt Redfearn select HAVE_ARCH_JUMP_LABEL 3388547001SJason Wessel select HAVE_ARCH_KGDB 34109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_BITS if MMU 35109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 36490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 37c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 3812597988SMatt Redfearn select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 39f381bf6dSDavid Daney select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS) 40f381bf6dSDavid Daney select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS) 4112597988SMatt Redfearn select HAVE_CC_STACKPROTECTOR 4212597988SMatt Redfearn select HAVE_CONTEXT_TRACKING 4312597988SMatt Redfearn select HAVE_COPY_THREAD_TLS 4464575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 4512597988SMatt Redfearn select HAVE_DEBUG_KMEMLEAK 4612597988SMatt Redfearn select HAVE_DEBUG_STACKOVERFLOW 4712597988SMatt Redfearn select HAVE_DMA_API_DEBUG 4812597988SMatt Redfearn select HAVE_DMA_CONTIGUOUS 4912597988SMatt Redfearn select HAVE_DYNAMIC_FTRACE 5012597988SMatt Redfearn select HAVE_EXIT_THREAD 5112597988SMatt Redfearn select HAVE_FTRACE_MCOUNT_RECORD 5229c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 5312597988SMatt Redfearn select HAVE_FUNCTION_TRACER 5412597988SMatt Redfearn select HAVE_GENERIC_DMA_COHERENT 5512597988SMatt Redfearn select HAVE_IDE 5612597988SMatt Redfearn select HAVE_IRQ_EXIT_ON_IRQ_STACK 5712597988SMatt Redfearn select HAVE_IRQ_TIME_ACCOUNTING 58c1bf207dSDavid Daney select HAVE_KPROBES 59c1bf207dSDavid Daney select HAVE_KRETPROBES 609d15ffc8STejun Heo select HAVE_MEMBLOCK 619d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 62786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 6342a0bb3fSPetr Mladek select HAVE_NMI 6412597988SMatt Redfearn select HAVE_OPROFILE 6512597988SMatt Redfearn select HAVE_PERF_EVENTS 6608bccf43SMarcin Nowakowski select HAVE_REGS_AND_STACK_ACCESS_API 6712597988SMatt Redfearn select HAVE_SYSCALL_TRACEPOINTS 68a3f14310SBen Hutchings select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP 6912597988SMatt Redfearn select IRQ_FORCED_THREADING 7012597988SMatt Redfearn select MODULES_USE_ELF_RELA if MODULES && 64BIT 7112597988SMatt Redfearn select MODULES_USE_ELF_REL if MODULES 7212597988SMatt Redfearn select PERF_USE_VMALLOC 7312597988SMatt Redfearn select RTC_LIB if !MACH_LOONGSON64 7412597988SMatt Redfearn select SYSCTL_EXCEPTION_TRACE 7512597988SMatt Redfearn select VIRT_TO_BUS 761da177e4SLinus Torvalds 771da177e4SLinus Torvaldsmenu "Machine selection" 781da177e4SLinus Torvalds 795e83d430SRalf Baechlechoice 805e83d430SRalf Baechle prompt "System type" 81d41e6858SMatt Redfearn default MIPS_GENERIC 821da177e4SLinus Torvalds 83eed0eabdSPaul Burtonconfig MIPS_GENERIC 84eed0eabdSPaul Burton bool "Generic board-agnostic MIPS kernel" 85eed0eabdSPaul Burton select BOOT_RAW 86eed0eabdSPaul Burton select BUILTIN_DTB 87eed0eabdSPaul Burton select CEVT_R4K 88eed0eabdSPaul Burton select CLKSRC_MIPS_GIC 89eed0eabdSPaul Burton select COMMON_CLK 90eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_VI 91eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_EI 92eed0eabdSPaul Burton select CSRC_R4K 93eed0eabdSPaul Burton select DMA_PERDEV_COHERENT 94eed0eabdSPaul Burton select HW_HAS_PCI 95eed0eabdSPaul Burton select IRQ_MIPS_CPU 96eed0eabdSPaul Burton select LIBFDT 97eed0eabdSPaul Burton select MIPS_CPU_SCACHE 98eed0eabdSPaul Burton select MIPS_GIC 99eed0eabdSPaul Burton select MIPS_L1_CACHE_SHIFT_7 100eed0eabdSPaul Burton select NO_EXCEPT_FILL 101eed0eabdSPaul Burton select PCI_DRIVERS_GENERIC 102eed0eabdSPaul Burton select PINCTRL 103eed0eabdSPaul Burton select SMP_UP if SMP 104a3078e59SMatt Redfearn select SWAP_IO_SPACE 105eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R1 106eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R2 107eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R6 108eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R1 109eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R2 110eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R6 111eed0eabdSPaul Burton select SYS_SUPPORTS_32BIT_KERNEL 112eed0eabdSPaul Burton select SYS_SUPPORTS_64BIT_KERNEL 113eed0eabdSPaul Burton select SYS_SUPPORTS_BIG_ENDIAN 114eed0eabdSPaul Burton select SYS_SUPPORTS_HIGHMEM 115eed0eabdSPaul Burton select SYS_SUPPORTS_LITTLE_ENDIAN 116eed0eabdSPaul Burton select SYS_SUPPORTS_MICROMIPS 117eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS_CPS 118eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS16 119eed0eabdSPaul Burton select SYS_SUPPORTS_MULTITHREADING 120eed0eabdSPaul Burton select SYS_SUPPORTS_RELOCATABLE 121eed0eabdSPaul Burton select SYS_SUPPORTS_SMARTMIPS 122*2e6522c5SCorentin Labbe select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 123*2e6522c5SCorentin Labbe select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 124*2e6522c5SCorentin Labbe select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 125*2e6522c5SCorentin Labbe select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 126*2e6522c5SCorentin Labbe select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 127*2e6522c5SCorentin Labbe select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 128eed0eabdSPaul Burton select USE_OF 129eed0eabdSPaul Burton help 130eed0eabdSPaul Burton Select this to build a kernel which aims to support multiple boards, 131eed0eabdSPaul Burton generally using a flattened device tree passed from the bootloader 132eed0eabdSPaul Burton using the boot protocol defined in the UHI (Unified Hosting 133eed0eabdSPaul Burton Interface) specification. 134eed0eabdSPaul Burton 13542a4f17dSManuel Laussconfig MIPS_ALCHEMY 136c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 13734adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 138f772cdb2SRalf Baechle select CEVT_R4K 139d7ea335cSSteven J. Hill select CSRC_R4K 14067e38cf2SRalf Baechle select IRQ_MIPS_CPU 14188e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 14242a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 14342a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 14442a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 145d30a2b47SLinus Walleij select GPIOLIB 1461b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 14747440229SManuel Lauss select COMMON_CLK 1481da177e4SLinus Torvalds 1497ca5dc14SFlorian Fainelliconfig AR7 1507ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 1517ca5dc14SFlorian Fainelli select BOOT_ELF32 1527ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 1537ca5dc14SFlorian Fainelli select CEVT_R4K 1547ca5dc14SFlorian Fainelli select CSRC_R4K 15567e38cf2SRalf Baechle select IRQ_MIPS_CPU 1567ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 1577ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 1587ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 1597ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 1607ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 1617ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 162377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1631b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 164d30a2b47SLinus Walleij select GPIOLIB 1657ca5dc14SFlorian Fainelli select VLYNQ 1668551fb64SYoichi Yuasa select HAVE_CLK 1677ca5dc14SFlorian Fainelli help 1687ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1697ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1707ca5dc14SFlorian Fainelli 17143cc739fSSergey Ryazanovconfig ATH25 17243cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 17343cc739fSSergey Ryazanov select CEVT_R4K 17443cc739fSSergey Ryazanov select CSRC_R4K 17543cc739fSSergey Ryazanov select DMA_NONCOHERENT 17667e38cf2SRalf Baechle select IRQ_MIPS_CPU 1771753e74eSSergey Ryazanov select IRQ_DOMAIN 17843cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 17943cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 18043cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1818aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 18243cc739fSSergey Ryazanov help 18343cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 18443cc739fSSergey Ryazanov 185d4a67d9dSGabor Juhosconfig ATH79 186d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 187ff591a91SAlban Bedel select ARCH_HAS_RESET_CONTROLLER 188d4a67d9dSGabor Juhos select BOOT_RAW 189d4a67d9dSGabor Juhos select CEVT_R4K 190d4a67d9dSGabor Juhos select CSRC_R4K 191d4a67d9dSGabor Juhos select DMA_NONCOHERENT 192d30a2b47SLinus Walleij select GPIOLIB 19394638067SGabor Juhos select HAVE_CLK 194411520afSAlban Bedel select COMMON_CLK 1952c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 19667e38cf2SRalf Baechle select IRQ_MIPS_CPU 1970aabf1a4SGabor Juhos select MIPS_MACHINE 198d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 199d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 200d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 201d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 202377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 203b3f0a250SAlban Bedel select SYS_SUPPORTS_ZBOOT_UART_PROM 20403c8c407SAlban Bedel select USE_OF 205d4a67d9dSGabor Juhos help 206d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 207d4a67d9dSGabor Juhos 2085f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 2095f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 210d666cd02SKevin Cernekee select BOOT_RAW 211d666cd02SKevin Cernekee select NO_EXCEPT_FILL 212d666cd02SKevin Cernekee select USE_OF 213d666cd02SKevin Cernekee select CEVT_R4K 214d666cd02SKevin Cernekee select CSRC_R4K 215d666cd02SKevin Cernekee select SYNC_R4K 216d666cd02SKevin Cernekee select COMMON_CLK 217c7c42ec2SSimon Arlott select BCM6345_L1_IRQ 21860b858f2SKevin Cernekee select BCM7038_L1_IRQ 21960b858f2SKevin Cernekee select BCM7120_L2_IRQ 22060b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 22167e38cf2SRalf Baechle select IRQ_MIPS_CPU 22260b858f2SKevin Cernekee select DMA_NONCOHERENT 223d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 22460b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 225d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 226d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 22760b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 22860b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 22960b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 230d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 231d666cd02SKevin Cernekee select SWAP_IO_SPACE 23260b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 23360b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 23460b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 23560b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 2364dc4704cSJustin Chen select HARDIRQS_SW_RESEND 237d666cd02SKevin Cernekee help 2385f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 2395f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 2405f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 2415f2d4459SKevin Cernekee must be set appropriately for your board. 242d666cd02SKevin Cernekee 2431c0c13ebSAurelien Jarnoconfig BCM47XX 244c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 245fe08f8c2SHauke Mehrtens select BOOT_RAW 24642f77542SRalf Baechle select CEVT_R4K 247940f6b48SRalf Baechle select CSRC_R4K 2481c0c13ebSAurelien Jarno select DMA_NONCOHERENT 2491c0c13ebSAurelien Jarno select HW_HAS_PCI 25067e38cf2SRalf Baechle select IRQ_MIPS_CPU 251314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 252dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 2531c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 2541c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 255377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 25625e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 257e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 258c949c0bcSRafał Miłecki select GPIOLIB 259c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 260f6e734a8SRafał Miłecki select BCM47XX_NVRAM 2612ab71a02SRafał Miłecki select BCM47XX_SPROM 2621c0c13ebSAurelien Jarno help 2631c0c13ebSAurelien Jarno Support for BCM47XX based boards 2641c0c13ebSAurelien Jarno 265e7300d04SMaxime Bizonconfig BCM63XX 266e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 267ae8de61cSFlorian Fainelli select BOOT_RAW 268e7300d04SMaxime Bizon select CEVT_R4K 269e7300d04SMaxime Bizon select CSRC_R4K 270fc264022SJonas Gorski select SYNC_R4K 271e7300d04SMaxime Bizon select DMA_NONCOHERENT 27267e38cf2SRalf Baechle select IRQ_MIPS_CPU 273e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 274e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 275e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 276e7300d04SMaxime Bizon select SWAP_IO_SPACE 277d30a2b47SLinus Walleij select GPIOLIB 2783e82eeebSYoichi Yuasa select HAVE_CLK 279af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 280c5af3c2dSJonas Gorski select CLKDEV_LOOKUP 281e7300d04SMaxime Bizon help 282e7300d04SMaxime Bizon Support for BCM63XX based boards 283e7300d04SMaxime Bizon 2841da177e4SLinus Torvaldsconfig MIPS_COBALT 2853fa986faSMartin Michlmayr bool "Cobalt Server" 28642f77542SRalf Baechle select CEVT_R4K 287940f6b48SRalf Baechle select CSRC_R4K 2881097c6acSYoichi Yuasa select CEVT_GT641XX 2891da177e4SLinus Torvalds select DMA_NONCOHERENT 2901da177e4SLinus Torvalds select HW_HAS_PCI 291d865bea4SRalf Baechle select I8253 2921da177e4SLinus Torvalds select I8259 29367e38cf2SRalf Baechle select IRQ_MIPS_CPU 294d5ab1a69SYoichi Yuasa select IRQ_GT641XX 295252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 296e25bfc92SYoichi Yuasa select PCI 2977cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 2980a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 299ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3000e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 3015e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 302e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 3031da177e4SLinus Torvalds 3041da177e4SLinus Torvaldsconfig MACH_DECSTATION 3053fa986faSMartin Michlmayr bool "DECstations" 3061da177e4SLinus Torvalds select BOOT_ELF32 3076457d9fcSYoichi Yuasa select CEVT_DS1287 30881d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 3094247417dSYoichi Yuasa select CSRC_IOASIC 31081d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 31120d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 31220d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 31320d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 3141da177e4SLinus Torvalds select DMA_NONCOHERENT 315ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 31667e38cf2SRalf Baechle select IRQ_MIPS_CPU 3177cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 3187cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 319ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3207d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3215e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3221723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 3231723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 3241723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 325930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 3265e83d430SRalf Baechle help 3271da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 3281da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 3291da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 3301da177e4SLinus Torvalds 3311da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 3321da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 3331da177e4SLinus Torvalds 3341da177e4SLinus Torvalds DECstation 5000/50 3351da177e4SLinus Torvalds DECstation 5000/150 3361da177e4SLinus Torvalds DECstation 5000/260 3371da177e4SLinus Torvalds DECsystem 5900/260 3381da177e4SLinus Torvalds 3391da177e4SLinus Torvalds otherwise choose R3000. 3401da177e4SLinus Torvalds 3415e83d430SRalf Baechleconfig MACH_JAZZ 3423fa986faSMartin Michlmayr bool "Jazz family of machines" 3430e2794b0SRalf Baechle select FW_ARC 3440e2794b0SRalf Baechle select FW_ARC32 3455e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 34642f77542SRalf Baechle select CEVT_R4K 347940f6b48SRalf Baechle select CSRC_R4K 348e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 3495e83d430SRalf Baechle select GENERIC_ISA_DMA 3508a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 35167e38cf2SRalf Baechle select IRQ_MIPS_CPU 352d865bea4SRalf Baechle select I8253 3535e83d430SRalf Baechle select I8259 3545e83d430SRalf Baechle select ISA 3557cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 3565e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 3577d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3581723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 3591da177e4SLinus Torvalds help 3605e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 3615e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 362692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 3635e83d430SRalf Baechle Olivetti M700-10 workstations. 3645e83d430SRalf Baechle 365de361e8bSPaul Burtonconfig MACH_INGENIC 366de361e8bSPaul Burton bool "Ingenic SoC based machines" 3675ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 3685ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 369f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 3705ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 37167e38cf2SRalf Baechle select IRQ_MIPS_CPU 37237b4c3caSPaul Cercueil select PINCTRL 373d30a2b47SLinus Walleij select GPIOLIB 374ff1930c6SPaul Burton select COMMON_CLK 37583bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 376ffb1843dSPaul Burton select BUILTIN_DTB 377ffb1843dSPaul Burton select USE_OF 3786ec127fbSPaul Burton select LIBFDT 3795ebabe59SLars-Peter Clausen 380171bb2f1SJohn Crispinconfig LANTIQ 381171bb2f1SJohn Crispin bool "Lantiq based platforms" 382171bb2f1SJohn Crispin select DMA_NONCOHERENT 38367e38cf2SRalf Baechle select IRQ_MIPS_CPU 384171bb2f1SJohn Crispin select CEVT_R4K 385171bb2f1SJohn Crispin select CSRC_R4K 386171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 387171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 388171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 389171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 390377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 391171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 392171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 393d30a2b47SLinus Walleij select GPIOLIB 394171bb2f1SJohn Crispin select SWAP_IO_SPACE 395171bb2f1SJohn Crispin select BOOT_RAW 396287e3f3fSJohn Crispin select CLKDEV_LOOKUP 397a0392222SJohn Crispin select USE_OF 3983f8c50c9SJohn Crispin select PINCTRL 3993f8c50c9SJohn Crispin select PINCTRL_LANTIQ 400c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 401c530781cSJohn Crispin select RESET_CONTROLLER 402171bb2f1SJohn Crispin 4031f21d2bdSBrian Murphyconfig LASAT 4041f21d2bdSBrian Murphy bool "LASAT Networks platforms" 40542f77542SRalf Baechle select CEVT_R4K 40616f0bbbcSRalf Baechle select CRC32 407940f6b48SRalf Baechle select CSRC_R4K 4081f21d2bdSBrian Murphy select DMA_NONCOHERENT 4091f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 4101f21d2bdSBrian Murphy select HW_HAS_PCI 41167e38cf2SRalf Baechle select IRQ_MIPS_CPU 4121f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 4131f21d2bdSBrian Murphy select MIPS_NILE4 4141f21d2bdSBrian Murphy select R5000_CPU_SCACHE 4151f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 4161f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 4171f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 4181f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 4191f21d2bdSBrian Murphy 42030ad29bbSHuacai Chenconfig MACH_LOONGSON32 42130ad29bbSHuacai Chen bool "Loongson-1 family of machines" 422c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 423ade299d8SYoichi Yuasa help 42430ad29bbSHuacai Chen This enables support for the Loongson-1 family of machines. 42585749d24SWu Zhangjin 42630ad29bbSHuacai Chen Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 42730ad29bbSHuacai Chen the Institute of Computing Technology (ICT), Chinese Academy of 42830ad29bbSHuacai Chen Sciences (CAS). 429ade299d8SYoichi Yuasa 43030ad29bbSHuacai Chenconfig MACH_LOONGSON64 43130ad29bbSHuacai Chen bool "Loongson-2/3 family of machines" 432ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 433ca585cf9SKelvin Cheung help 43430ad29bbSHuacai Chen This enables the support of Loongson-2/3 family of machines. 435ca585cf9SKelvin Cheung 43630ad29bbSHuacai Chen Loongson-2 is a family of single-core CPUs and Loongson-3 is a 43730ad29bbSHuacai Chen family of multi-core CPUs. They are both 64-bit general-purpose 43830ad29bbSHuacai Chen MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute 43930ad29bbSHuacai Chen of Computing Technology (ICT), Chinese Academy of Sciences (CAS) 44030ad29bbSHuacai Chen in the People's Republic of China. The chief architect is Professor 44130ad29bbSHuacai Chen Weiwu Hu. 442ca585cf9SKelvin Cheung 4436a438309SAndrew Brestickerconfig MACH_PISTACHIO 4446a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 4456a438309SAndrew Bresticker select BOOT_ELF32 4466a438309SAndrew Bresticker select BOOT_RAW 4476a438309SAndrew Bresticker select CEVT_R4K 4486a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 4496a438309SAndrew Bresticker select COMMON_CLK 4506a438309SAndrew Bresticker select CSRC_R4K 451645c7827SZubair Lutfullah Kakakhel select DMA_NONCOHERENT 452d30a2b47SLinus Walleij select GPIOLIB 45367e38cf2SRalf Baechle select IRQ_MIPS_CPU 4546a438309SAndrew Bresticker select LIBFDT 4556a438309SAndrew Bresticker select MFD_SYSCON 4566a438309SAndrew Bresticker select MIPS_CPU_SCACHE 4576a438309SAndrew Bresticker select MIPS_GIC 4586a438309SAndrew Bresticker select PINCTRL 4596a438309SAndrew Bresticker select REGULATOR 4606a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 4616a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 4626a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 4636a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 4646a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 46541cc07beSMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 4666a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 467018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 468018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 4696a438309SAndrew Bresticker select USE_OF 4706a438309SAndrew Bresticker help 4716a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 4726a438309SAndrew Bresticker 4731da177e4SLinus Torvaldsconfig MIPS_MALTA 4743fa986faSMartin Michlmayr bool "MIPS Malta board" 47561ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 4761da177e4SLinus Torvalds select BOOT_ELF32 477fa71c960SRalf Baechle select BOOT_RAW 478e8823d26SPaul Burton select BUILTIN_DTB 47942f77542SRalf Baechle select CEVT_R4K 480940f6b48SRalf Baechle select CSRC_R4K 481fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 48242b002abSGuenter Roeck select COMMON_CLK 483885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 4841da177e4SLinus Torvalds select GENERIC_ISA_DMA 4858a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 48667e38cf2SRalf Baechle select IRQ_MIPS_CPU 4878a19b8f1SAndrew Bresticker select MIPS_GIC 4881da177e4SLinus Torvalds select HW_HAS_PCI 489d865bea4SRalf Baechle select I8253 4901da177e4SLinus Torvalds select I8259 4915e83d430SRalf Baechle select MIPS_BONITO64 4929318c51aSChris Dearman select MIPS_CPU_SCACHE 493a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 494252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 4955e83d430SRalf Baechle select MIPS_MSC 496ecafe3e9SPaul Burton select SMP_UP if SMP 4971da177e4SLinus Torvalds select SWAP_IO_SPACE 4987cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 4997cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 500bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 501c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 502575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 5037cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 5045d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 505575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 5067cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 5077cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 508ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 509ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5105e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 511c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 5125e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 513424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 5140365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 515e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 516377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 517f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 5189693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 5191b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 5208c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 521e8823d26SPaul Burton select USE_OF 52238ec82feSPaul Burton select LIBFDT 523abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 524e81a8c7dSPaul Burton select BUILTIN_DTB 525e81a8c7dSPaul Burton select LIBFDT 5261da177e4SLinus Torvalds help 527f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 5281da177e4SLinus Torvalds board. 5291da177e4SLinus Torvalds 5302572f00dSJoshua Hendersonconfig MACH_PIC32 5312572f00dSJoshua Henderson bool "Microchip PIC32 Family" 5322572f00dSJoshua Henderson help 5332572f00dSJoshua Henderson This enables support for the Microchip PIC32 family of platforms. 5342572f00dSJoshua Henderson 5352572f00dSJoshua Henderson Microchip PIC32 is a family of general-purpose 32 bit MIPS core 5362572f00dSJoshua Henderson microcontrollers. 5372572f00dSJoshua Henderson 538a83860c2SRalf Baechleconfig NEC_MARKEINS 539a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 540a83860c2SRalf Baechle select SOC_EMMA2RH 541a83860c2SRalf Baechle select HW_HAS_PCI 542a83860c2SRalf Baechle help 543a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 544ade299d8SYoichi Yuasa 5455e83d430SRalf Baechleconfig MACH_VR41XX 54674142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 54742f77542SRalf Baechle select CEVT_R4K 548940f6b48SRalf Baechle select CSRC_R4K 5497cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 550377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 551d30a2b47SLinus Walleij select GPIOLIB 5525e83d430SRalf Baechle 553edb6310aSDaniel Lairdconfig NXP_STB220 554edb6310aSDaniel Laird bool "NXP STB220 board" 555edb6310aSDaniel Laird select SOC_PNX833X 556edb6310aSDaniel Laird help 557edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 558edb6310aSDaniel Laird 559edb6310aSDaniel Lairdconfig NXP_STB225 560edb6310aSDaniel Laird bool "NXP 225 board" 561edb6310aSDaniel Laird select SOC_PNX833X 562edb6310aSDaniel Laird select SOC_PNX8335 563edb6310aSDaniel Laird help 564edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 565edb6310aSDaniel Laird 5669267a30dSMarc St-Jeanconfig PMC_MSP 5679267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 56839d30c13SAnoop P A select CEVT_R4K 56939d30c13SAnoop P A select CSRC_R4K 5709267a30dSMarc St-Jean select DMA_NONCOHERENT 5719267a30dSMarc St-Jean select SWAP_IO_SPACE 5729267a30dSMarc St-Jean select NO_EXCEPT_FILL 5739267a30dSMarc St-Jean select BOOT_RAW 5749267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 5759267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 5769267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 5779267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 578377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 57967e38cf2SRalf Baechle select IRQ_MIPS_CPU 5809267a30dSMarc St-Jean select SERIAL_8250 5819267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 5829296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 5839296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 5849267a30dSMarc St-Jean help 5859267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 5869267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 5879267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 5889267a30dSMarc St-Jean a variety of MIPS cores. 5899267a30dSMarc St-Jean 590ae2b5bb6SJohn Crispinconfig RALINK 591ae2b5bb6SJohn Crispin bool "Ralink based machines" 592ae2b5bb6SJohn Crispin select CEVT_R4K 593ae2b5bb6SJohn Crispin select CSRC_R4K 594ae2b5bb6SJohn Crispin select BOOT_RAW 595ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 59667e38cf2SRalf Baechle select IRQ_MIPS_CPU 597ae2b5bb6SJohn Crispin select USE_OF 598ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 599ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 600ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 601ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 602377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 603ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 604ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 6052a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 6062a153f1cSJohn Crispin select RESET_CONTROLLER 607ae2b5bb6SJohn Crispin 6081da177e4SLinus Torvaldsconfig SGI_IP22 6093fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 6100e2794b0SRalf Baechle select FW_ARC 6110e2794b0SRalf Baechle select FW_ARC32 6121da177e4SLinus Torvalds select BOOT_ELF32 61342f77542SRalf Baechle select CEVT_R4K 614940f6b48SRalf Baechle select CSRC_R4K 615e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 6161da177e4SLinus Torvalds select DMA_NONCOHERENT 6175e83d430SRalf Baechle select HW_HAS_EISA 618d865bea4SRalf Baechle select I8253 61968de4803SThomas Bogendoerfer select I8259 6201da177e4SLinus Torvalds select IP22_CPU_SCACHE 62167e38cf2SRalf Baechle select IRQ_MIPS_CPU 622aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 623e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 624e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 62536e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 626e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 627e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 628e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 6291da177e4SLinus Torvalds select SWAP_IO_SPACE 6307cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6317cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6322b5e63f6SMartin Michlmayr # 6332b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6342b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6352b5e63f6SMartin Michlmayr # 6362b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6372b5e63f6SMartin Michlmayr # for a more details discussion 6382b5e63f6SMartin Michlmayr # 6392b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 640ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 641ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6425e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 643930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6441da177e4SLinus Torvalds help 6451da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 6461da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 6471da177e4SLinus Torvalds that runs on these, say Y here. 6481da177e4SLinus Torvalds 6491da177e4SLinus Torvaldsconfig SGI_IP27 6503fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 6510e2794b0SRalf Baechle select FW_ARC 6520e2794b0SRalf Baechle select FW_ARC64 6535e83d430SRalf Baechle select BOOT_ELF64 654e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 655634286f1SRalf Baechle select DMA_COHERENT 65636a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 6571da177e4SLinus Torvalds select HW_HAS_PCI 658130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 6597cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 660ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6615e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 662d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 6631a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 664930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6651da177e4SLinus Torvalds help 6661da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 6671da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 6681da177e4SLinus Torvalds here. 6691da177e4SLinus Torvalds 670e2defae5SThomas Bogendoerferconfig SGI_IP28 6717d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 6720e2794b0SRalf Baechle select FW_ARC 6730e2794b0SRalf Baechle select FW_ARC64 674e2defae5SThomas Bogendoerfer select BOOT_ELF64 675e2defae5SThomas Bogendoerfer select CEVT_R4K 676e2defae5SThomas Bogendoerfer select CSRC_R4K 677e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 678e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 679e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 68067e38cf2SRalf Baechle select IRQ_MIPS_CPU 681e2defae5SThomas Bogendoerfer select HW_HAS_EISA 682e2defae5SThomas Bogendoerfer select I8253 683e2defae5SThomas Bogendoerfer select I8259 684e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 685e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 6865b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 687e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 688e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 689e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 690e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 691e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 6922b5e63f6SMartin Michlmayr # 6932b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6942b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6952b5e63f6SMartin Michlmayr # 6962b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6972b5e63f6SMartin Michlmayr # for a more details discussion 6982b5e63f6SMartin Michlmayr # 6992b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 700e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 701e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 702dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 703e2defae5SThomas Bogendoerfer help 704e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 705e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 706e2defae5SThomas Bogendoerfer 7071da177e4SLinus Torvaldsconfig SGI_IP32 708cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 7090e2794b0SRalf Baechle select FW_ARC 7100e2794b0SRalf Baechle select FW_ARC32 7111da177e4SLinus Torvalds select BOOT_ELF32 71242f77542SRalf Baechle select CEVT_R4K 713940f6b48SRalf Baechle select CSRC_R4K 7141da177e4SLinus Torvalds select DMA_NONCOHERENT 7151da177e4SLinus Torvalds select HW_HAS_PCI 71667e38cf2SRalf Baechle select IRQ_MIPS_CPU 7171da177e4SLinus Torvalds select R5000_CPU_SCACHE 7181da177e4SLinus Torvalds select RM7000_CPU_SCACHE 7197cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 7207cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 7217cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 722dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 723ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 7245e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7251da177e4SLinus Torvalds help 7261da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 7271da177e4SLinus Torvalds 728ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 729ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 7305e83d430SRalf Baechle select BOOT_ELF32 7315e83d430SRalf Baechle select DMA_COHERENT 7325e83d430SRalf Baechle select SIBYTE_BCM1120 7335e83d430SRalf Baechle select SWAP_IO_SPACE 7347cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7355e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7365e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7375e83d430SRalf Baechle 738ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 739ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 7405e83d430SRalf Baechle select BOOT_ELF32 7415e83d430SRalf Baechle select DMA_COHERENT 7425e83d430SRalf Baechle select SIBYTE_BCM1120 7435e83d430SRalf Baechle select SWAP_IO_SPACE 7447cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7455e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7465e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7475e83d430SRalf Baechle 7485e83d430SRalf Baechleconfig SIBYTE_CRHONE 7493fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 7505e83d430SRalf Baechle select BOOT_ELF32 7515e83d430SRalf Baechle select DMA_COHERENT 7525e83d430SRalf Baechle select SIBYTE_BCM1125 7535e83d430SRalf Baechle select SWAP_IO_SPACE 7547cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7555e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7565e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7575e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7585e83d430SRalf Baechle 759ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 760ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 761ade299d8SYoichi Yuasa select BOOT_ELF32 762ade299d8SYoichi Yuasa select DMA_COHERENT 763ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 764ade299d8SYoichi Yuasa select SWAP_IO_SPACE 765ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 766ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 767ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 768ade299d8SYoichi Yuasa 769ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 770ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 771ade299d8SYoichi Yuasa select BOOT_ELF32 772ade299d8SYoichi Yuasa select DMA_COHERENT 773fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 774ade299d8SYoichi Yuasa select SIBYTE_SB1250 775ade299d8SYoichi Yuasa select SWAP_IO_SPACE 776ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 777ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 778ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 779ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 780cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 781ade299d8SYoichi Yuasa 782ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 783ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 784ade299d8SYoichi Yuasa select BOOT_ELF32 785ade299d8SYoichi Yuasa select DMA_COHERENT 786fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 787ade299d8SYoichi Yuasa select SIBYTE_SB1250 788ade299d8SYoichi Yuasa select SWAP_IO_SPACE 789ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 790ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 791ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 792ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 793ade299d8SYoichi Yuasa 794ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 795ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 796ade299d8SYoichi Yuasa select BOOT_ELF32 797ade299d8SYoichi Yuasa select DMA_COHERENT 798ade299d8SYoichi Yuasa select SIBYTE_SB1250 799ade299d8SYoichi Yuasa select SWAP_IO_SPACE 800ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 801ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 802ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 803ade299d8SYoichi Yuasa 804ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 805ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 806ade299d8SYoichi Yuasa select BOOT_ELF32 807ade299d8SYoichi Yuasa select DMA_COHERENT 808ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 809ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 810ade299d8SYoichi Yuasa select SWAP_IO_SPACE 811ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 812ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 813651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 814ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 815cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 816ade299d8SYoichi Yuasa 81714b36af4SThomas Bogendoerferconfig SNI_RM 81814b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 8190e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 8200e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 821aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 8225e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 8235e83d430SRalf Baechle select BOOT_ELF32 82442f77542SRalf Baechle select CEVT_R4K 825940f6b48SRalf Baechle select CSRC_R4K 826e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 8275e83d430SRalf Baechle select DMA_NONCOHERENT 8285e83d430SRalf Baechle select GENERIC_ISA_DMA 8298a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 8305e83d430SRalf Baechle select HW_HAS_EISA 8315e83d430SRalf Baechle select HW_HAS_PCI 83267e38cf2SRalf Baechle select IRQ_MIPS_CPU 833d865bea4SRalf Baechle select I8253 8345e83d430SRalf Baechle select I8259 8355e83d430SRalf Baechle select ISA 8364a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 8377cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 8384a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 839c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 8404a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 84136a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 842ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 8437d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 8444a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 8455e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 8465e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8471da177e4SLinus Torvalds help 84814b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 84914b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 8505e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 8515e83d430SRalf Baechle support this machine type. 8521da177e4SLinus Torvalds 853edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 854edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 8555e83d430SRalf Baechle 856edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 857edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 85823fbee9dSRalf Baechle 85973b4390fSRalf Baechleconfig MIKROTIK_RB532 86073b4390fSRalf Baechle bool "Mikrotik RB532 boards" 86173b4390fSRalf Baechle select CEVT_R4K 86273b4390fSRalf Baechle select CSRC_R4K 86373b4390fSRalf Baechle select DMA_NONCOHERENT 86473b4390fSRalf Baechle select HW_HAS_PCI 86567e38cf2SRalf Baechle select IRQ_MIPS_CPU 86673b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 86773b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 86873b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 86973b4390fSRalf Baechle select SWAP_IO_SPACE 87073b4390fSRalf Baechle select BOOT_RAW 871d30a2b47SLinus Walleij select GPIOLIB 872930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 87373b4390fSRalf Baechle help 87473b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 87573b4390fSRalf Baechle based on the IDT RC32434 SoC. 87673b4390fSRalf Baechle 8779ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 8789ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 879a86c7f72SDavid Daney select CEVT_R4K 88034adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 881a86c7f72SDavid Daney select DMA_COHERENT 882a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 883a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 884f65aad41SRalf Baechle select EDAC_SUPPORT 885b01aec9bSBorislav Petkov select EDAC_ATOMIC_SCRUB 88673569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 88773569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 888a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 8895e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 890e8635b48SDavid Daney select HW_HAS_PCI 891f00e001eSDavid Daney select ZONE_DMA32 892465aaed0SDavid Daney select HOLES_IN_ZONE 893d30a2b47SLinus Walleij select GPIOLIB 8946e511163SDavid Daney select LIBFDT 8956e511163SDavid Daney select USE_OF 8966e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 8976e511163SDavid Daney select SYS_SUPPORTS_SMP 8987820b84bSDavid Daney select NR_CPUS_DEFAULT_64 8997820b84bSDavid Daney select MIPS_NR_CPU_NR_MAP_1024 900e326479fSAndrew Bresticker select BUILTIN_DTB 9018c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 9023ff72be4SSteven J. Hill select SYS_SUPPORTS_RELOCATABLE 903a86c7f72SDavid Daney help 904a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 905a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 906a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 907a86c7f72SDavid Daney Some of the supported boards are: 908a86c7f72SDavid Daney EBT3000 909a86c7f72SDavid Daney EBH3000 910a86c7f72SDavid Daney EBH3100 911a86c7f72SDavid Daney Thunder 912a86c7f72SDavid Daney Kodama 913a86c7f72SDavid Daney Hikari 914a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 915a86c7f72SDavid Daney 9167f058e85SJayachandran Cconfig NLM_XLR_BOARD 9177f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 9187f058e85SJayachandran C select BOOT_ELF32 9197f058e85SJayachandran C select NLM_COMMON 9207f058e85SJayachandran C select SYS_HAS_CPU_XLR 9217f058e85SJayachandran C select SYS_SUPPORTS_SMP 9227f058e85SJayachandran C select HW_HAS_PCI 9237f058e85SJayachandran C select SWAP_IO_SPACE 9247f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9257f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 92634adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 9277f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9287f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 9297f058e85SJayachandran C select DMA_COHERENT 9307f058e85SJayachandran C select NR_CPUS_DEFAULT_32 9317f058e85SJayachandran C select CEVT_R4K 9327f058e85SJayachandran C select CSRC_R4K 93367e38cf2SRalf Baechle select IRQ_MIPS_CPU 934b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9357f058e85SJayachandran C select SYNC_R4K 9367f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 9378f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9388f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9397f058e85SJayachandran C help 9407f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 9417f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 9427f058e85SJayachandran C 9431c773ea4SJayachandran Cconfig NLM_XLP_BOARD 9441c773ea4SJayachandran C bool "Netlogic XLP based systems" 9451c773ea4SJayachandran C select BOOT_ELF32 9461c773ea4SJayachandran C select NLM_COMMON 9471c773ea4SJayachandran C select SYS_HAS_CPU_XLP 9481c773ea4SJayachandran C select SYS_SUPPORTS_SMP 9491c773ea4SJayachandran C select HW_HAS_PCI 9501c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9511c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 95234adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 953d30a2b47SLinus Walleij select GPIOLIB 9541c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9551c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 9561c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 9571c773ea4SJayachandran C select DMA_COHERENT 9581c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 9591c773ea4SJayachandran C select CEVT_R4K 9601c773ea4SJayachandran C select CSRC_R4K 96167e38cf2SRalf Baechle select IRQ_MIPS_CPU 962b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9631c773ea4SJayachandran C select SYNC_R4K 9641c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 9652f6528e1SJayachandran C select USE_OF 9668f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9678f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9681c773ea4SJayachandran C help 9691c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 9701c773ea4SJayachandran C Say Y here if you have a XLP based board. 9711c773ea4SJayachandran C 9729bc463beSDavid Daneyconfig MIPS_PARAVIRT 9739bc463beSDavid Daney bool "Para-Virtualized guest system" 9749bc463beSDavid Daney select CEVT_R4K 9759bc463beSDavid Daney select CSRC_R4K 9769bc463beSDavid Daney select DMA_COHERENT 9779bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 9789bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 9799bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 9809bc463beSDavid Daney select SYS_SUPPORTS_SMP 9819bc463beSDavid Daney select NR_CPUS_DEFAULT_4 9829bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 9839bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 9849bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 9859bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 9869bc463beSDavid Daney select HW_HAS_PCI 9879bc463beSDavid Daney select SWAP_IO_SPACE 9889bc463beSDavid Daney help 9899bc463beSDavid Daney This option supports guest running under ???? 9909bc463beSDavid Daney 9911da177e4SLinus Torvaldsendchoice 9921da177e4SLinus Torvalds 993e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 9943b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 995d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 996a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 997e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 9988945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 999eed0eabdSPaul Burtonsource "arch/mips/generic/Kconfig" 10005e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 10015ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 10028ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 10031f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 10042572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig" 1005af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig" 10060f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 1007ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 100829c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 100938b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 101022b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 10115e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 1012a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 101330ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig" 101430ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig" 10157f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 1016ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 101738b18f72SRalf Baechle 10185e83d430SRalf Baechleendmenu 10195e83d430SRalf Baechle 10201da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 10211da177e4SLinus Torvalds bool 10221da177e4SLinus Torvalds default y 10231da177e4SLinus Torvalds 10241da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 10251da177e4SLinus Torvalds bool 10261da177e4SLinus Torvalds 10273c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 10283c9ee7efSAkinobu Mita bool 10293c9ee7efSAkinobu Mita default y 10303c9ee7efSAkinobu Mita 10311da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 10321da177e4SLinus Torvalds bool 10331da177e4SLinus Torvalds default y 10341da177e4SLinus Torvalds 1035ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 10361cc89038SAtsushi Nemoto bool 10371cc89038SAtsushi Nemoto default y 10381cc89038SAtsushi Nemoto 10391da177e4SLinus Torvalds# 10401da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 10411da177e4SLinus Torvalds# 10420e2794b0SRalf Baechleconfig FW_ARC 10431da177e4SLinus Torvalds bool 10441da177e4SLinus Torvalds 104561ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 104661ed242dSRalf Baechle bool 104761ed242dSRalf Baechle 10489267a30dSMarc St-Jeanconfig BOOT_RAW 10499267a30dSMarc St-Jean bool 10509267a30dSMarc St-Jean 1051217dd11eSRalf Baechleconfig CEVT_BCM1480 1052217dd11eSRalf Baechle bool 1053217dd11eSRalf Baechle 10546457d9fcSYoichi Yuasaconfig CEVT_DS1287 10556457d9fcSYoichi Yuasa bool 10566457d9fcSYoichi Yuasa 10571097c6acSYoichi Yuasaconfig CEVT_GT641XX 10581097c6acSYoichi Yuasa bool 10591097c6acSYoichi Yuasa 106042f77542SRalf Baechleconfig CEVT_R4K 106142f77542SRalf Baechle bool 106242f77542SRalf Baechle 1063217dd11eSRalf Baechleconfig CEVT_SB1250 1064217dd11eSRalf Baechle bool 1065217dd11eSRalf Baechle 1066229f773eSAtsushi Nemotoconfig CEVT_TXX9 1067229f773eSAtsushi Nemoto bool 1068229f773eSAtsushi Nemoto 1069217dd11eSRalf Baechleconfig CSRC_BCM1480 1070217dd11eSRalf Baechle bool 1071217dd11eSRalf Baechle 10724247417dSYoichi Yuasaconfig CSRC_IOASIC 10734247417dSYoichi Yuasa bool 10744247417dSYoichi Yuasa 1075940f6b48SRalf Baechleconfig CSRC_R4K 1076940f6b48SRalf Baechle bool 1077940f6b48SRalf Baechle 1078217dd11eSRalf Baechleconfig CSRC_SB1250 1079217dd11eSRalf Baechle bool 1080217dd11eSRalf Baechle 1081a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL 1082a7f4df4eSAlex Smith def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1083a7f4df4eSAlex Smith 1084a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 1085d30a2b47SLinus Walleij select GPIOLIB 1086a9aec7feSAtsushi Nemoto bool 1087a9aec7feSAtsushi Nemoto 10880e2794b0SRalf Baechleconfig FW_CFE 1089df78b5c8SAurelien Jarno bool 1090df78b5c8SAurelien Jarno 10914bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 109234adb28dSRalf Baechle def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 10934bafad92SFUJITA Tomonori 109440e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES 109540e084a5SRalf Baechle bool 109640e084a5SRalf Baechle 1097885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1098885014bcSFelix Fietkau select DMA_NONCOHERENT 1099885014bcSFelix Fietkau bool 1100885014bcSFelix Fietkau 110120d33064SPaul Burtonconfig DMA_PERDEV_COHERENT 110220d33064SPaul Burton bool 110320d33064SPaul Burton select DMA_MAYBE_COHERENT 110420d33064SPaul Burton 11051da177e4SLinus Torvaldsconfig DMA_COHERENT 11061da177e4SLinus Torvalds bool 11071da177e4SLinus Torvalds 11081da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 11091da177e4SLinus Torvalds bool 1110e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 11114ce588cdSRalf Baechle 1112e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 11134ce588cdSRalf Baechle bool 11141da177e4SLinus Torvalds 111536a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 11161da177e4SLinus Torvalds bool 11171da177e4SLinus Torvalds 11181b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1119dbb74540SRalf Baechle bool 1120dbb74540SRalf Baechle 11211da177e4SLinus Torvaldsconfig MIPS_BONITO64 11221da177e4SLinus Torvalds bool 11231da177e4SLinus Torvalds 11241da177e4SLinus Torvaldsconfig MIPS_MSC 11251da177e4SLinus Torvalds bool 11261da177e4SLinus Torvalds 11271f21d2bdSBrian Murphyconfig MIPS_NILE4 11281f21d2bdSBrian Murphy bool 11291f21d2bdSBrian Murphy 113039b8d525SRalf Baechleconfig SYNC_R4K 113139b8d525SRalf Baechle bool 113239b8d525SRalf Baechle 1133487d70d0SGabor Juhosconfig MIPS_MACHINE 1134487d70d0SGabor Juhos def_bool n 1135487d70d0SGabor Juhos 1136ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1137d388d685SMaciej W. Rozycki def_bool n 1138d388d685SMaciej W. Rozycki 11394e0748f5SMarkos Chandrasconfig GENERIC_CSUM 11404e0748f5SMarkos Chandras bool 11414e0748f5SMarkos Chandras 11428313da30SRalf Baechleconfig GENERIC_ISA_DMA 11438313da30SRalf Baechle bool 11448313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1145a35bee8aSNamhyung Kim select ISA_DMA_API 11468313da30SRalf Baechle 1147aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1148aa414dffSRalf Baechle bool 11498313da30SRalf Baechle select GENERIC_ISA_DMA 1150aa414dffSRalf Baechle 1151a35bee8aSNamhyung Kimconfig ISA_DMA_API 1152a35bee8aSNamhyung Kim bool 1153a35bee8aSNamhyung Kim 1154465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1155465aaed0SDavid Daney bool 1156465aaed0SDavid Daney 11578c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE 11588c530ea3SMatt Redfearn bool 11598c530ea3SMatt Redfearn help 11608c530ea3SMatt Redfearn Selected if the platform supports relocating the kernel. 11618c530ea3SMatt Redfearn The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF 11628c530ea3SMatt Redfearn to allow access to command line and entropy sources. 11638c530ea3SMatt Redfearn 1164f381bf6dSDavid Daneyconfig MIPS_CBPF_JIT 1165f381bf6dSDavid Daney def_bool y 1166f381bf6dSDavid Daney depends on BPF_JIT && HAVE_CBPF_JIT 1167f381bf6dSDavid Daney 1168f381bf6dSDavid Daneyconfig MIPS_EBPF_JIT 1169f381bf6dSDavid Daney def_bool y 1170f381bf6dSDavid Daney depends on BPF_JIT && HAVE_EBPF_JIT 1171f381bf6dSDavid Daney 1172f381bf6dSDavid Daney 11735e83d430SRalf Baechle# 11746b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 11755e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 11765e83d430SRalf Baechle# choice statement should be more obvious to the user. 11775e83d430SRalf Baechle# 11785e83d430SRalf Baechlechoice 11796b2aac42SMasanari Iida prompt "Endianness selection" 11801da177e4SLinus Torvalds help 11811da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 11825e83d430SRalf Baechle byte order. These modes require different kernels and a different 11833cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 11845e83d430SRalf Baechle particular system but some systems are just as commonly used in the 11853dde6ad8SDavid Sterba one or the other endianness. 11865e83d430SRalf Baechle 11875e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 11885e83d430SRalf Baechle bool "Big endian" 11895e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 11905e83d430SRalf Baechle 11915e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 11925e83d430SRalf Baechle bool "Little endian" 11935e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 11945e83d430SRalf Baechle 11955e83d430SRalf Baechleendchoice 11965e83d430SRalf Baechle 119722b0763aSDavid Daneyconfig EXPORT_UASM 119822b0763aSDavid Daney bool 119922b0763aSDavid Daney 12002116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 12012116245eSRalf Baechle bool 12022116245eSRalf Baechle 12035e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 12045e83d430SRalf Baechle bool 12055e83d430SRalf Baechle 12065e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 12075e83d430SRalf Baechle bool 12081da177e4SLinus Torvalds 12099cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 12109cffd154SDavid Daney bool 12119cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 12129cffd154SDavid Daney default y 12139cffd154SDavid Daney 1214aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1215aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1216aa1762f4SDavid Daney 12171da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 12181da177e4SLinus Torvalds bool 12191da177e4SLinus Torvalds 12209267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 12219267a30dSMarc St-Jean bool 12229267a30dSMarc St-Jean 12239267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 12249267a30dSMarc St-Jean bool 12259267a30dSMarc St-Jean 12268420fd00SAtsushi Nemotoconfig IRQ_TXX9 12278420fd00SAtsushi Nemoto bool 12288420fd00SAtsushi Nemoto 1229d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1230d5ab1a69SYoichi Yuasa bool 1231d5ab1a69SYoichi Yuasa 1232252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 12331da177e4SLinus Torvalds bool 12341da177e4SLinus Torvalds 12359267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 12369267a30dSMarc St-Jean bool 12379267a30dSMarc St-Jean 1238a83860c2SRalf Baechleconfig SOC_EMMA2RH 1239a83860c2SRalf Baechle bool 1240a83860c2SRalf Baechle select CEVT_R4K 1241a83860c2SRalf Baechle select CSRC_R4K 1242a83860c2SRalf Baechle select DMA_NONCOHERENT 124367e38cf2SRalf Baechle select IRQ_MIPS_CPU 1244a83860c2SRalf Baechle select SWAP_IO_SPACE 1245a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1246a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1247a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1248a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1249a83860c2SRalf Baechle 1250edb6310aSDaniel Lairdconfig SOC_PNX833X 1251edb6310aSDaniel Laird bool 1252edb6310aSDaniel Laird select CEVT_R4K 1253edb6310aSDaniel Laird select CSRC_R4K 125467e38cf2SRalf Baechle select IRQ_MIPS_CPU 1255edb6310aSDaniel Laird select DMA_NONCOHERENT 1256edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1257edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1258edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1259edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1260377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1261edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1262edb6310aSDaniel Laird 1263edb6310aSDaniel Lairdconfig SOC_PNX8335 1264edb6310aSDaniel Laird bool 1265edb6310aSDaniel Laird select SOC_PNX833X 1266edb6310aSDaniel Laird 1267a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1268a7e07b1aSMarkos Chandras bool 1269a7e07b1aSMarkos Chandras 12701da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 12711da177e4SLinus Torvalds bool 12721da177e4SLinus Torvalds 1273e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1274e2defae5SThomas Bogendoerfer bool 1275e2defae5SThomas Bogendoerfer 12765b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 12775b438c44SThomas Bogendoerfer bool 12785b438c44SThomas Bogendoerfer 1279e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1280e2defae5SThomas Bogendoerfer bool 1281e2defae5SThomas Bogendoerfer 1282e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1283e2defae5SThomas Bogendoerfer bool 1284e2defae5SThomas Bogendoerfer 1285e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1286e2defae5SThomas Bogendoerfer bool 1287e2defae5SThomas Bogendoerfer 1288e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1289e2defae5SThomas Bogendoerfer bool 1290e2defae5SThomas Bogendoerfer 1291e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1292e2defae5SThomas Bogendoerfer bool 1293e2defae5SThomas Bogendoerfer 12940e2794b0SRalf Baechleconfig FW_ARC32 12955e83d430SRalf Baechle bool 12965e83d430SRalf Baechle 1297aaa9fad3SPaul Bolleconfig FW_SNIPROM 1298231a35d3SThomas Bogendoerfer bool 1299231a35d3SThomas Bogendoerfer 13001da177e4SLinus Torvaldsconfig BOOT_ELF32 13011da177e4SLinus Torvalds bool 13021da177e4SLinus Torvalds 1303930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1304930beb5aSFlorian Fainelli bool 1305930beb5aSFlorian Fainelli 1306930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1307930beb5aSFlorian Fainelli bool 1308930beb5aSFlorian Fainelli 1309930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1310930beb5aSFlorian Fainelli bool 1311930beb5aSFlorian Fainelli 1312930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1313930beb5aSFlorian Fainelli bool 1314930beb5aSFlorian Fainelli 13151da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 13161da177e4SLinus Torvalds int 1317a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 13185432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 13195432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 13205432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 13211da177e4SLinus Torvalds default "5" 13221da177e4SLinus Torvalds 13231da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 13241da177e4SLinus Torvalds bool 13251da177e4SLinus Torvalds 13261da177e4SLinus Torvaldsconfig ARC_CONSOLE 13271da177e4SLinus Torvalds bool "ARC console support" 1328e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 13291da177e4SLinus Torvalds 13301da177e4SLinus Torvaldsconfig ARC_MEMORY 13311da177e4SLinus Torvalds bool 133214b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 13331da177e4SLinus Torvalds default y 13341da177e4SLinus Torvalds 13351da177e4SLinus Torvaldsconfig ARC_PROMLIB 13361da177e4SLinus Torvalds bool 1337e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 13381da177e4SLinus Torvalds default y 13391da177e4SLinus Torvalds 13400e2794b0SRalf Baechleconfig FW_ARC64 13411da177e4SLinus Torvalds bool 13421da177e4SLinus Torvalds 13431da177e4SLinus Torvaldsconfig BOOT_ELF64 13441da177e4SLinus Torvalds bool 13451da177e4SLinus Torvalds 13461da177e4SLinus Torvaldsmenu "CPU selection" 13471da177e4SLinus Torvalds 13481da177e4SLinus Torvaldschoice 13491da177e4SLinus Torvalds prompt "CPU type" 13501da177e4SLinus Torvalds default CPU_R4X00 13511da177e4SLinus Torvalds 13520e476d91SHuacai Chenconfig CPU_LOONGSON3 13530e476d91SHuacai Chen bool "Loongson 3 CPU" 13540e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 13550e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 13560e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 13570e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 13580e476d91SHuacai Chen select WEAK_ORDERING 13590e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 1360b2edcfc8SHuacai Chen select MIPS_PGD_C0_CONTEXT 136117c99d94SHuacai Chen select MIPS_L1_CACHE_SHIFT_6 1362d30a2b47SLinus Walleij select GPIOLIB 13630e476d91SHuacai Chen help 13640e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 13650e476d91SHuacai Chen set with many extensions. 13660e476d91SHuacai Chen 13671e820da3SHuacai Chenconfig LOONGSON3_ENHANCEMENT 13681e820da3SHuacai Chen bool "New Loongson 3 CPU Enhancements" 13691e820da3SHuacai Chen default n 13701e820da3SHuacai Chen select CPU_MIPSR2 13711e820da3SHuacai Chen select CPU_HAS_PREFETCH 13721e820da3SHuacai Chen depends on CPU_LOONGSON3 13731e820da3SHuacai Chen help 13741e820da3SHuacai Chen New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A 13751e820da3SHuacai Chen R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as 13761e820da3SHuacai Chen FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User 13771e820da3SHuacai Chen Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), 13781e820da3SHuacai Chen Fast TLB refill support, etc. 13791e820da3SHuacai Chen 13801e820da3SHuacai Chen This option enable those enhancements which are not probed at run 13811e820da3SHuacai Chen time. If you want a generic kernel to run on all Loongson 3 machines, 13821e820da3SHuacai Chen please say 'N' here. If you want a high-performance kernel to run on 13831e820da3SHuacai Chen new Loongson 3 machines only, please say 'Y' here. 13841e820da3SHuacai Chen 13853702bba5SWu Zhangjinconfig CPU_LOONGSON2E 13863702bba5SWu Zhangjin bool "Loongson 2E" 13873702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 13883702bba5SWu Zhangjin select CPU_LOONGSON2 13892a21c730SFuxin Zhang help 13902a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 13912a21c730SFuxin Zhang with many extensions. 13922a21c730SFuxin Zhang 139325985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 13946f7a251aSWu Zhangjin bonito64. 13956f7a251aSWu Zhangjin 13966f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 13976f7a251aSWu Zhangjin bool "Loongson 2F" 13986f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 13996f7a251aSWu Zhangjin select CPU_LOONGSON2 1400d30a2b47SLinus Walleij select GPIOLIB 14016f7a251aSWu Zhangjin help 14026f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 14036f7a251aSWu Zhangjin with many extensions. 14046f7a251aSWu Zhangjin 14056f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 14066f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 14076f7a251aSWu Zhangjin Loongson2E. 14086f7a251aSWu Zhangjin 1409ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1410ca585cf9SKelvin Cheung bool "Loongson 1B" 1411ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1412ca585cf9SKelvin Cheung select CPU_LOONGSON1 14139ec88b60SKelvin Cheung select LEDS_GPIO_REGISTER 1414ca585cf9SKelvin Cheung help 1415ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1416ca585cf9SKelvin Cheung release 2 instruction set. 1417ca585cf9SKelvin Cheung 141812e3280bSYang Lingconfig CPU_LOONGSON1C 141912e3280bSYang Ling bool "Loongson 1C" 142012e3280bSYang Ling depends on SYS_HAS_CPU_LOONGSON1C 142112e3280bSYang Ling select CPU_LOONGSON1 142212e3280bSYang Ling select LEDS_GPIO_REGISTER 142312e3280bSYang Ling help 142412e3280bSYang Ling The Loongson 1C is a 32-bit SoC, which implements the MIPS32 142512e3280bSYang Ling release 2 instruction set. 142612e3280bSYang Ling 14276e760c8dSRalf Baechleconfig CPU_MIPS32_R1 14286e760c8dSRalf Baechle bool "MIPS32 Release 1" 14297cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 14306e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1431797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1432ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14336e760c8dSRalf Baechle help 14345e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 14351e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14361e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14371e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14381e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14391e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 14401e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 14411e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 14421e5f1caaSRalf Baechle performance. 14431e5f1caaSRalf Baechle 14441e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 14451e5f1caaSRalf Baechle bool "MIPS32 Release 2" 14467cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 14471e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1448797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1449ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1450a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14512235a54dSSanjay Lal select HAVE_KVM 14521e5f1caaSRalf Baechle help 14535e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 14546e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14556e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14566e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14576e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14581da177e4SLinus Torvalds 14597fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 1460674d10e2SMarkos Chandras bool "MIPS32 Release 6" 14617fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 14627fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14637fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14647fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14657fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14664e0748f5SMarkos Chandras select GENERIC_CSUM 14677fd08ca5SLeonid Yegoshin select HAVE_KVM 14687fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 14697fd08ca5SLeonid Yegoshin help 14707fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14717fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 14727fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 14737fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 14747fd08ca5SLeonid Yegoshin 14756e760c8dSRalf Baechleconfig CPU_MIPS64_R1 14766e760c8dSRalf Baechle bool "MIPS64 Release 1" 14777cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1478797798c1SRalf Baechle select CPU_HAS_PREFETCH 1479ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1480ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1481ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14829cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14836e760c8dSRalf Baechle help 14846e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 14856e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 14866e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 14876e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14886e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 14891e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 14901e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 14911e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 14921e5f1caaSRalf Baechle performance. 14931e5f1caaSRalf Baechle 14941e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 14951e5f1caaSRalf Baechle bool "MIPS64 Release 2" 14967cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1497797798c1SRalf Baechle select CPU_HAS_PREFETCH 14981e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 14991e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1500ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15019cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1502a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 150340a2df49SJames Hogan select HAVE_KVM 15041e5f1caaSRalf Baechle help 15051e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 15061e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 15071e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 15081e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 15091e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 15101da177e4SLinus Torvalds 15117fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 1512674d10e2SMarkos Chandras bool "MIPS64 Release 6" 15137fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 15147fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 15157fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 15167fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 15177fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 15187fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 15194e0748f5SMarkos Chandras select GENERIC_CSUM 15202e6c7747SJames Hogan select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 152140a2df49SJames Hogan select HAVE_KVM 15227fd08ca5SLeonid Yegoshin help 15237fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 15247fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 15257fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 15267fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 15277fd08ca5SLeonid Yegoshin 15281da177e4SLinus Torvaldsconfig CPU_R3000 15291da177e4SLinus Torvalds bool "R3000" 15307cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1531f7062ddbSRalf Baechle select CPU_HAS_WB 1532ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1533797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15341da177e4SLinus Torvalds help 15351da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 15361da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 15371da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 15381da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 15391da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 15401da177e4SLinus Torvalds try to recompile with R3000. 15411da177e4SLinus Torvalds 15421da177e4SLinus Torvaldsconfig CPU_TX39XX 15431da177e4SLinus Torvalds bool "R39XX" 15447cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1545ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15461da177e4SLinus Torvalds 15471da177e4SLinus Torvaldsconfig CPU_VR41XX 15481da177e4SLinus Torvalds bool "R41xx" 15497cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1550ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1551ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15521da177e4SLinus Torvalds help 15535e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 15541da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 15551da177e4SLinus Torvalds kernel built with this option will not run on any other type of 15561da177e4SLinus Torvalds processor or vice versa. 15571da177e4SLinus Torvalds 15581da177e4SLinus Torvaldsconfig CPU_R4300 15591da177e4SLinus Torvalds bool "R4300" 15607cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1561ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1562ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15631da177e4SLinus Torvalds help 15641da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 15651da177e4SLinus Torvalds 15661da177e4SLinus Torvaldsconfig CPU_R4X00 15671da177e4SLinus Torvalds bool "R4x00" 15687cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1569ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1570ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1571970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15721da177e4SLinus Torvalds help 15731da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 15741da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 15751da177e4SLinus Torvalds 15761da177e4SLinus Torvaldsconfig CPU_TX49XX 15771da177e4SLinus Torvalds bool "R49XX" 15787cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1579de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1580ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1581ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1582970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15831da177e4SLinus Torvalds 15841da177e4SLinus Torvaldsconfig CPU_R5000 15851da177e4SLinus Torvalds bool "R5000" 15867cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1587ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1588ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1589970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15901da177e4SLinus Torvalds help 15911da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 15921da177e4SLinus Torvalds 15931da177e4SLinus Torvaldsconfig CPU_R5432 15941da177e4SLinus Torvalds bool "R5432" 15957cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 15965e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 15975e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1598970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15991da177e4SLinus Torvalds 1600542c1020SShinya Kuribayashiconfig CPU_R5500 1601542c1020SShinya Kuribayashi bool "R5500" 1602542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1603542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1604542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 16059cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1606542c1020SShinya Kuribayashi help 1607542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1608542c1020SShinya Kuribayashi instruction set. 1609542c1020SShinya Kuribayashi 16101da177e4SLinus Torvaldsconfig CPU_NEVADA 16111da177e4SLinus Torvalds bool "RM52xx" 16127cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1613ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1614ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1615970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16161da177e4SLinus Torvalds help 16171da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 16181da177e4SLinus Torvalds 16191da177e4SLinus Torvaldsconfig CPU_R8000 16201da177e4SLinus Torvalds bool "R8000" 16217cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 16225e83d430SRalf Baechle select CPU_HAS_PREFETCH 1623ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 16241da177e4SLinus Torvalds help 16251da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 16261da177e4SLinus Torvalds uncommon and the support for them is incomplete. 16271da177e4SLinus Torvalds 16281da177e4SLinus Torvaldsconfig CPU_R10000 16291da177e4SLinus Torvalds bool "R10000" 16307cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 16315e83d430SRalf Baechle select CPU_HAS_PREFETCH 1632ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1633ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1634797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1635970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16361da177e4SLinus Torvalds help 16371da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 16381da177e4SLinus Torvalds 16391da177e4SLinus Torvaldsconfig CPU_RM7000 16401da177e4SLinus Torvalds bool "RM7000" 16417cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 16425e83d430SRalf Baechle select CPU_HAS_PREFETCH 1643ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1644ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1645797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1646970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16471da177e4SLinus Torvalds 16481da177e4SLinus Torvaldsconfig CPU_SB1 16491da177e4SLinus Torvalds bool "SB1" 16507cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1651ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1652ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1653797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1654970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16550004a9dfSRalf Baechle select WEAK_ORDERING 16561da177e4SLinus Torvalds 1657a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1658a86c7f72SDavid Daney bool "Cavium Octeon processor" 16595e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1660a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1661a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1662a86c7f72SDavid Daney select WEAK_ORDERING 1663a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 16649cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1665df115f3eSBen Hutchings select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1666df115f3eSBen Hutchings select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1667930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 16680ae3abcdSJames Hogan select HAVE_KVM 1669a86c7f72SDavid Daney help 1670a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1671a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1672a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1673a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1674a86c7f72SDavid Daney 1675cd746249SJonas Gorskiconfig CPU_BMIPS 1676cd746249SJonas Gorski bool "Broadcom BMIPS" 1677cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1678cd746249SJonas Gorski select CPU_MIPS32 1679fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1680cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1681cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1682cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1683cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1684cd746249SJonas Gorski select DMA_NONCOHERENT 168567e38cf2SRalf Baechle select IRQ_MIPS_CPU 1686cd746249SJonas Gorski select SWAP_IO_SPACE 1687cd746249SJonas Gorski select WEAK_ORDERING 1688c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 168969aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1690a8d709b0SMarkus Mayer select CPU_SUPPORTS_CPUFREQ 1691a8d709b0SMarkus Mayer select MIPS_EXTERNAL_TIMER 1692c1c0c461SKevin Cernekee help 1693fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1694c1c0c461SKevin Cernekee 16957f058e85SJayachandran Cconfig CPU_XLR 16967f058e85SJayachandran C bool "Netlogic XLR SoC" 16977f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 16987f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 16997f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17007f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1701970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17027f058e85SJayachandran C select WEAK_ORDERING 17037f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17047f058e85SJayachandran C help 17057f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 17061c773ea4SJayachandran C 17071c773ea4SJayachandran Cconfig CPU_XLP 17081c773ea4SJayachandran C bool "Netlogic XLP SoC" 17091c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 17101c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17111c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17121c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 17131c773ea4SJayachandran C select WEAK_ORDERING 17141c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17151c773ea4SJayachandran C select CPU_HAS_PREFETCH 1716d6504846SJayachandran C select CPU_MIPSR2 1717ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 17182db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 17191c773ea4SJayachandran C help 17201c773ea4SJayachandran C Netlogic Microsystems XLP processors. 17211da177e4SLinus Torvaldsendchoice 17221da177e4SLinus Torvalds 1723a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1724a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1725a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 17267fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1727a6e18781SLeonid Yegoshin help 1728a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1729a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1730a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1731a6e18781SLeonid Yegoshin 1732a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1733a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1734a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1735a6e18781SLeonid Yegoshin select EVA 1736a6e18781SLeonid Yegoshin default y 1737a6e18781SLeonid Yegoshin help 1738a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1739a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1740a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1741a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1742a6e18781SLeonid Yegoshin 1743c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1744c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1745c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1746c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1747c5b36783SSteven J. Hill help 1748c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1749c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1750c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1751c5b36783SSteven J. Hill 1752c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1753c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1754c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1755c5b36783SSteven J. Hill depends on !EVA 1756c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1757c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1758c5b36783SSteven J. Hill select XPA 1759c5b36783SSteven J. Hill select HIGHMEM 1760c5b36783SSteven J. Hill select ARCH_PHYS_ADDR_T_64BIT 1761c5b36783SSteven J. Hill default n 1762c5b36783SSteven J. Hill help 1763c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1764c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1765c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1766c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1767c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1768c5b36783SSteven J. Hill If unsure, say 'N' here. 1769c5b36783SSteven J. Hill 1770622844bfSWu Zhangjinif CPU_LOONGSON2F 1771622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1772622844bfSWu Zhangjin bool 1773622844bfSWu Zhangjin 1774622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1775622844bfSWu Zhangjin bool 1776622844bfSWu Zhangjin 1777622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1778622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1779622844bfSWu Zhangjin default y 1780622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1781622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1782622844bfSWu Zhangjin help 1783622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1784622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1785622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1786622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1787622844bfSWu Zhangjin 1788622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1789622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1790622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1791622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1792622844bfSWu Zhangjin systems. 1793622844bfSWu Zhangjin 1794622844bfSWu Zhangjin If unsure, please say Y. 1795622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1796622844bfSWu Zhangjin 17971b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 17981b93b3c3SWu Zhangjin bool 17991b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 18001b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 180131c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 18021b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1803fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 18044e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 18051b93b3c3SWu Zhangjin 18061b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 18071b93b3c3SWu Zhangjin bool 18081b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 18091b93b3c3SWu Zhangjin 1810dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM 1811dbb98314SAlban Bedel bool 1812dbb98314SAlban Bedel select SYS_SUPPORTS_ZBOOT 1813dbb98314SAlban Bedel 18143702bba5SWu Zhangjinconfig CPU_LOONGSON2 18153702bba5SWu Zhangjin bool 18163702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 18173702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 18183702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1819970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 18203702bba5SWu Zhangjin 1821ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1822ca585cf9SKelvin Cheung bool 1823ca585cf9SKelvin Cheung select CPU_MIPS32 1824ca585cf9SKelvin Cheung select CPU_MIPSR2 1825ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1826ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1827ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1828f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1829ca585cf9SKelvin Cheung 1830fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 183104fa8bf7SJonas Gorski select SMP_UP if SMP 18321bbb6c1bSKevin Cernekee bool 1833cd746249SJonas Gorski 1834cd746249SJonas Gorskiconfig CPU_BMIPS4350 1835cd746249SJonas Gorski bool 1836cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1837cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1838cd746249SJonas Gorski 1839cd746249SJonas Gorskiconfig CPU_BMIPS4380 1840cd746249SJonas Gorski bool 1841bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1842cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1843cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1844b4720809SFlorian Fainelli select CPU_HAS_RIXI 1845cd746249SJonas Gorski 1846cd746249SJonas Gorskiconfig CPU_BMIPS5000 1847cd746249SJonas Gorski bool 1848cd746249SJonas Gorski select MIPS_CPU_SCACHE 1849bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1850cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1851cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1852b4720809SFlorian Fainelli select CPU_HAS_RIXI 18531bbb6c1bSKevin Cernekee 18540e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 18550e476d91SHuacai Chen bool 18560e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 1857b2edcfc8SHuacai Chen select CPU_HAS_RIXI 18580e476d91SHuacai Chen 18593702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 18602a21c730SFuxin Zhang bool 18612a21c730SFuxin Zhang 18626f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 18636f7a251aSWu Zhangjin bool 186455045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 186555045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 186622f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 18676f7a251aSWu Zhangjin 1868ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1869ca585cf9SKelvin Cheung bool 1870ca585cf9SKelvin Cheung 187112e3280bSYang Lingconfig SYS_HAS_CPU_LOONGSON1C 187212e3280bSYang Ling bool 187312e3280bSYang Ling 18747cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 18757cf8053bSRalf Baechle bool 18767cf8053bSRalf Baechle 18777cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 18787cf8053bSRalf Baechle bool 18797cf8053bSRalf Baechle 1880a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1881a6e18781SLeonid Yegoshin bool 1882a6e18781SLeonid Yegoshin 1883c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1884c5b36783SSteven J. Hill bool 1885c5b36783SSteven J. Hill 18867fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 18877fd08ca5SLeonid Yegoshin bool 18887fd08ca5SLeonid Yegoshin 18897cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 18907cf8053bSRalf Baechle bool 18917cf8053bSRalf Baechle 18927cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 18937cf8053bSRalf Baechle bool 18947cf8053bSRalf Baechle 18957fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 18967fd08ca5SLeonid Yegoshin bool 18977fd08ca5SLeonid Yegoshin 18987cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 18997cf8053bSRalf Baechle bool 19007cf8053bSRalf Baechle 19017cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 19027cf8053bSRalf Baechle bool 19037cf8053bSRalf Baechle 19047cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 19057cf8053bSRalf Baechle bool 19067cf8053bSRalf Baechle 19077cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 19087cf8053bSRalf Baechle bool 19097cf8053bSRalf Baechle 19107cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 19117cf8053bSRalf Baechle bool 19127cf8053bSRalf Baechle 19137cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 19147cf8053bSRalf Baechle bool 19157cf8053bSRalf Baechle 19167cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 19177cf8053bSRalf Baechle bool 19187cf8053bSRalf Baechle 19197cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 19207cf8053bSRalf Baechle bool 19217cf8053bSRalf Baechle 1922542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1923542c1020SShinya Kuribayashi bool 1924542c1020SShinya Kuribayashi 19257cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 19267cf8053bSRalf Baechle bool 19277cf8053bSRalf Baechle 19287cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 19297cf8053bSRalf Baechle bool 19307cf8053bSRalf Baechle 19317cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 19327cf8053bSRalf Baechle bool 19337cf8053bSRalf Baechle 19347cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 19357cf8053bSRalf Baechle bool 19367cf8053bSRalf Baechle 19377cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 19387cf8053bSRalf Baechle bool 19397cf8053bSRalf Baechle 19405e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 19415e683389SDavid Daney bool 19425e683389SDavid Daney 1943cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1944c1c0c461SKevin Cernekee bool 1945c1c0c461SKevin Cernekee 1946fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1947c1c0c461SKevin Cernekee bool 1948cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1949c1c0c461SKevin Cernekee 1950c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1951c1c0c461SKevin Cernekee bool 1952cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1953c1c0c461SKevin Cernekee 1954c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1955c1c0c461SKevin Cernekee bool 1956cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1957c1c0c461SKevin Cernekee 1958c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1959c1c0c461SKevin Cernekee bool 1960cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1961c1c0c461SKevin Cernekee 19627f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 19637f058e85SJayachandran C bool 19647f058e85SJayachandran C 19651c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 19661c773ea4SJayachandran C bool 19671c773ea4SJayachandran C 1968b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 1969b6911bbaSPaul Burton depends on MIPS_MALTA 1970b6911bbaSPaul Burton depends on PCI 1971b6911bbaSPaul Burton bool 1972b6911bbaSPaul Burton default y 1973b6911bbaSPaul Burton 197417099b11SRalf Baechle# 197517099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 197617099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 197717099b11SRalf Baechle# 19780004a9dfSRalf Baechleconfig WEAK_ORDERING 19790004a9dfSRalf Baechle bool 198017099b11SRalf Baechle 198117099b11SRalf Baechle# 198217099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 198317099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 198417099b11SRalf Baechle# 198517099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 198617099b11SRalf Baechle bool 19875e83d430SRalf Baechleendmenu 19885e83d430SRalf Baechle 19895e83d430SRalf Baechle# 19905e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 19915e83d430SRalf Baechle# 19925e83d430SRalf Baechleconfig CPU_MIPS32 19935e83d430SRalf Baechle bool 19947fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 19955e83d430SRalf Baechle 19965e83d430SRalf Baechleconfig CPU_MIPS64 19975e83d430SRalf Baechle bool 19987fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 19995e83d430SRalf Baechle 20005e83d430SRalf Baechle# 2001c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 20025e83d430SRalf Baechle# 20035e83d430SRalf Baechleconfig CPU_MIPSR1 20045e83d430SRalf Baechle bool 20055e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 20065e83d430SRalf Baechle 20075e83d430SRalf Baechleconfig CPU_MIPSR2 20085e83d430SRalf Baechle bool 2009a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 20108256b17eSFlorian Fainelli select CPU_HAS_RIXI 2011a7e07b1aSMarkos Chandras select MIPS_SPRAM 20125e83d430SRalf Baechle 20137fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 20147fd08ca5SLeonid Yegoshin bool 20157fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 20168256b17eSFlorian Fainelli select CPU_HAS_RIXI 201787321fddSPaul Burton select HAVE_ARCH_BITREVERSE 20182db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 2019a7e07b1aSMarkos Chandras select MIPS_SPRAM 20205e83d430SRalf Baechle 2021a6e18781SLeonid Yegoshinconfig EVA 2022a6e18781SLeonid Yegoshin bool 2023a6e18781SLeonid Yegoshin 2024c5b36783SSteven J. Hillconfig XPA 2025c5b36783SSteven J. Hill bool 2026c5b36783SSteven J. Hill 20275e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 20285e83d430SRalf Baechle bool 20295e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 20305e83d430SRalf Baechle bool 20315e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 20325e83d430SRalf Baechle bool 20335e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 20345e83d430SRalf Baechle bool 203555045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 203655045ff5SWu Zhangjin bool 203755045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 203855045ff5SWu Zhangjin bool 20399cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 20409cffd154SDavid Daney bool 204122f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 204222f1fdfdSWu Zhangjin bool 204382622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 204482622284SDavid Daney bool 2045cebf8c0fSPaul Burton default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP 20465e83d430SRalf Baechle 20478192c9eaSDavid Daney# 20488192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 20498192c9eaSDavid Daney# 20508192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 20518192c9eaSDavid Daney bool 2052679eb637SJames Hogan default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 20538192c9eaSDavid Daney 20545e83d430SRalf Baechlemenu "Kernel type" 20555e83d430SRalf Baechle 20565e83d430SRalf Baechlechoice 20575e83d430SRalf Baechle prompt "Kernel code model" 20585e83d430SRalf Baechle help 20595e83d430SRalf Baechle You should only select this option if you have a workload that 20605e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 20615e83d430SRalf Baechle large memory. You will only be presented a single option in this 20625e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 20635e83d430SRalf Baechle 20645e83d430SRalf Baechleconfig 32BIT 20655e83d430SRalf Baechle bool "32-bit kernel" 20665e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 20675e83d430SRalf Baechle select TRAD_SIGNALS 20685e83d430SRalf Baechle help 20695e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 2070f17c4ca3SRalf Baechle 20715e83d430SRalf Baechleconfig 64BIT 20725e83d430SRalf Baechle bool "64-bit kernel" 20735e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 20745e83d430SRalf Baechle help 20755e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 20765e83d430SRalf Baechle 20775e83d430SRalf Baechleendchoice 20785e83d430SRalf Baechle 20792235a54dSSanjay Lalconfig KVM_GUEST 20802235a54dSSanjay Lal bool "KVM Guest Kernel" 2081f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 20822235a54dSSanjay Lal help 2083caa1faa7SJames Hogan Select this option if building a guest kernel for KVM (Trap & Emulate) 2084caa1faa7SJames Hogan mode. 20852235a54dSSanjay Lal 2086eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 2087eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 20882235a54dSSanjay Lal depends on KVM_GUEST 2089eda3d33cSJames Hogan default 100 20902235a54dSSanjay Lal help 2091eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 2092eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 2093eda3d33cSJames Hogan timer frequency is specified directly. 20942235a54dSSanjay Lal 20951e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48 20961e321fa9SLeonid Yegoshin bool "48 bits virtual memory" 20971e321fa9SLeonid Yegoshin depends on 64BIT 20981e321fa9SLeonid Yegoshin help 20993377e227SAlex Belits Support a maximum at least 48 bits of application virtual 21003377e227SAlex Belits memory. Default is 40 bits or less, depending on the CPU. 21013377e227SAlex Belits For page sizes 16k and above, this option results in a small 21023377e227SAlex Belits memory overhead for page tables. For 4k page size, a fourth 21033377e227SAlex Belits level of page tables is added which imposes both a memory 21043377e227SAlex Belits overhead as well as slower TLB fault handling. 21053377e227SAlex Belits 21061e321fa9SLeonid Yegoshin If unsure, say N. 21071e321fa9SLeonid Yegoshin 21081da177e4SLinus Torvaldschoice 21091da177e4SLinus Torvalds prompt "Kernel page size" 21101da177e4SLinus Torvalds default PAGE_SIZE_4KB 21111da177e4SLinus Torvalds 21121da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 21131da177e4SLinus Torvalds bool "4kB" 21140e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 21151da177e4SLinus Torvalds help 21161da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 21171da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 21181da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 21191da177e4SLinus Torvalds recommended for low memory systems. 21201da177e4SLinus Torvalds 21211da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 21221da177e4SLinus Torvalds bool "8kB" 21237d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 21241e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 21251da177e4SLinus Torvalds help 21261da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 21271da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2128c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 2129c52399beSRalf Baechle suitable Linux distribution to support this. 21301da177e4SLinus Torvalds 21311da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 21321da177e4SLinus Torvalds bool "16kB" 2133714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 21341da177e4SLinus Torvalds help 21351da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 21361da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2137714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2138714bfad6SRalf Baechle Linux distribution to support this. 21391da177e4SLinus Torvalds 2140c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2141c52399beSRalf Baechle bool "32kB" 2142c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 21431e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 2144c52399beSRalf Baechle help 2145c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2146c52399beSRalf Baechle the price of higher memory consumption. This option is available 2147c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2148c52399beSRalf Baechle distribution to support this. 2149c52399beSRalf Baechle 21501da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 21511da177e4SLinus Torvalds bool "64kB" 21523b2db173SPaul Burton depends on !CPU_R3000 && !CPU_TX39XX 21531da177e4SLinus Torvalds help 21541da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 21551da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 21561da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2157714bfad6SRalf Baechle writing this option is still high experimental. 21581da177e4SLinus Torvalds 21591da177e4SLinus Torvaldsendchoice 21601da177e4SLinus Torvalds 2161c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2162c9bace7cSDavid Daney int "Maximum zone order" 2163e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2164e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2165e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2166e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2167e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2168e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2169c9bace7cSDavid Daney range 11 64 2170c9bace7cSDavid Daney default "11" 2171c9bace7cSDavid Daney help 2172c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2173c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2174c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2175c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2176c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2177c9bace7cSDavid Daney increase this value. 2178c9bace7cSDavid Daney 2179c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2180c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2181c9bace7cSDavid Daney 2182c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2183c9bace7cSDavid Daney when choosing a value for this option. 2184c9bace7cSDavid Daney 21851da177e4SLinus Torvaldsconfig BOARD_SCACHE 21861da177e4SLinus Torvalds bool 21871da177e4SLinus Torvalds 21881da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 21891da177e4SLinus Torvalds bool 21901da177e4SLinus Torvalds select BOARD_SCACHE 21911da177e4SLinus Torvalds 21929318c51aSChris Dearman# 21939318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 21949318c51aSChris Dearman# 21959318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 21969318c51aSChris Dearman bool 21979318c51aSChris Dearman select BOARD_SCACHE 21989318c51aSChris Dearman 21991da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 22001da177e4SLinus Torvalds bool 22011da177e4SLinus Torvalds select BOARD_SCACHE 22021da177e4SLinus Torvalds 22031da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 22041da177e4SLinus Torvalds bool 22051da177e4SLinus Torvalds select BOARD_SCACHE 22061da177e4SLinus Torvalds 22071da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 22081da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 22091da177e4SLinus Torvalds depends on CPU_SB1 22101da177e4SLinus Torvalds help 22111da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 22121da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 22131da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 22141da177e4SLinus Torvalds 22151da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2216c8094b53SRalf Baechle bool 22171da177e4SLinus Torvalds 22183165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 22193165c846SFlorian Fainelli bool 22203b2db173SPaul Burton default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX) 22213165c846SFlorian Fainelli 222291405eb6SFlorian Fainelliconfig CPU_R4K_FPU 222391405eb6SFlorian Fainelli bool 2224a2aea699SPaul Burton default y if !(CPU_R3000 || CPU_TX39XX) 222591405eb6SFlorian Fainelli 222662cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 222762cedc4fSFlorian Fainelli bool 222862cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 222962cedc4fSFlorian Fainelli 223059d6ab86SRalf Baechleconfig MIPS_MT_SMP 2231a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 22325cbf9688SPaul Burton default y 2233527f1028SPaul Burton depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS 223459d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2235d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2236c080faa5SSteven J. Hill select SYNC_R4K 223759d6ab86SRalf Baechle select MIPS_MT 223859d6ab86SRalf Baechle select SMP 223987353d8aSRalf Baechle select SMP_UP 2240c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2241c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2242399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 224359d6ab86SRalf Baechle help 2244c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2245c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2246c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2247c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2248c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 224959d6ab86SRalf Baechle 2250f41ae0b2SRalf Baechleconfig MIPS_MT 2251f41ae0b2SRalf Baechle bool 2252f41ae0b2SRalf Baechle 22530ab7aefcSRalf Baechleconfig SCHED_SMT 22540ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 22550ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 22560ab7aefcSRalf Baechle default n 22570ab7aefcSRalf Baechle help 22580ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 22590ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 22600ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 22610ab7aefcSRalf Baechle 22620ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 22630ab7aefcSRalf Baechle bool 22640ab7aefcSRalf Baechle 2265f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2266f41ae0b2SRalf Baechle bool 2267f41ae0b2SRalf Baechle 2268f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2269f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2270f088fc84SRalf Baechle default y 2271b633648cSRalf Baechle depends on MIPS_MT_SMP 227207cc0c9eSRalf Baechle 2273b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2274b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 22759eaa9a82SPaul Burton depends on CPU_MIPSR6 2276b0a668fbSLeonid Yegoshin default y 2277b0a668fbSLeonid Yegoshin help 2278b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2279b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 228007edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2281b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2282b0a668fbSLeonid Yegoshin final kernel image. 2283b0a668fbSLeonid Yegoshin 228407cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 228507cc0c9eSRalf Baechle bool "VPE loader support." 2286704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 228707cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 228807cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 228907cc0c9eSRalf Baechle select MIPS_MT 229007cc0c9eSRalf Baechle help 229107cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 229207cc0c9eSRalf Baechle onto another VPE and running it. 2293f088fc84SRalf Baechle 229417a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 229517a1d523SDeng-Cheng Zhu bool 229617a1d523SDeng-Cheng Zhu default "y" 229717a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 229817a1d523SDeng-Cheng Zhu 22991a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 23001a2a6d7eSDeng-Cheng Zhu bool 23011a2a6d7eSDeng-Cheng Zhu default "y" 23021a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 23031a2a6d7eSDeng-Cheng Zhu 2304e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2305e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2306e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2307e01402b1SRalf Baechle default y 2308e01402b1SRalf Baechle help 2309e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2310e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2311e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2312e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2313e01402b1SRalf Baechle 2314e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2315e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2316e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 23175e83d430SRalf Baechle help 2318e01402b1SRalf Baechle 2319da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2320da615cf6SDeng-Cheng Zhu bool 2321da615cf6SDeng-Cheng Zhu default "y" 2322da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2323da615cf6SDeng-Cheng Zhu 23242c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 23252c973ef0SDeng-Cheng Zhu bool 23262c973ef0SDeng-Cheng Zhu default "y" 23272c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 23282c973ef0SDeng-Cheng Zhu 23294a16ff4cSRalf Baechleconfig MIPS_CMP 23305cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 23315676319cSMarkos Chandras depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 2332b10b43baSMarkos Chandras select SMP 2333eb9b5141STim Anderson select SYNC_R4K 2334b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 23354a16ff4cSRalf Baechle select WEAK_ORDERING 23364a16ff4cSRalf Baechle default n 23374a16ff4cSRalf Baechle help 2338044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2339044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2340044505c7SPaul Burton its ability to start secondary CPUs. 23414a16ff4cSRalf Baechle 23425cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 23435cac93b3SPaul Burton instead of this. 23445cac93b3SPaul Burton 23450ee958e1SPaul Burtonconfig MIPS_CPS 23460ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 23475a3e7c02SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 23480ee958e1SPaul Burton select MIPS_CM 23491d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 23500ee958e1SPaul Burton select SMP 23510ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 23521d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 2353c8b7712cSPaul Burton select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 23540ee958e1SPaul Burton select SYS_SUPPORTS_SMP 23550ee958e1SPaul Burton select WEAK_ORDERING 23560ee958e1SPaul Burton help 23570ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 23580ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 23590ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 23600ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 23610ee958e1SPaul Burton support is unavailable. 23620ee958e1SPaul Burton 23633179d37eSPaul Burtonconfig MIPS_CPS_PM 236439a59593SMarkos Chandras depends on MIPS_CPS 23653179d37eSPaul Burton bool 23663179d37eSPaul Burton 23679f98f3ddSPaul Burtonconfig MIPS_CM 23689f98f3ddSPaul Burton bool 23693c9b4166SPaul Burton select MIPS_CPC 23709f98f3ddSPaul Burton 23719c38cf44SPaul Burtonconfig MIPS_CPC 23729c38cf44SPaul Burton bool 23732600990eSRalf Baechle 23741da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 23751da177e4SLinus Torvalds bool 23761da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 23771da177e4SLinus Torvalds default y 23781da177e4SLinus Torvalds 23791da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 23801da177e4SLinus Torvalds bool 23811da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 23821da177e4SLinus Torvalds default y 23831da177e4SLinus Torvalds 23842235a54dSSanjay Lal 238560ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 238634adb28dSRalf Baechle bool 238760ec6571Spascal@pabr.org 23889e2b5372SMarkos Chandraschoice 23899e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 23909e2b5372SMarkos Chandras 23919e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 23929e2b5372SMarkos Chandras bool "None" 23939e2b5372SMarkos Chandras help 23949e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 23959e2b5372SMarkos Chandras 23969693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 23979693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 23989e2b5372SMarkos Chandras bool "SmartMIPS" 23999693a853SFranck Bui-Huu help 24009693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 24019693a853SFranck Bui-Huu increased security at both hardware and software level for 24029693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 24039693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 24049693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 24059693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 24069693a853SFranck Bui-Huu here. 24079693a853SFranck Bui-Huu 2408bce86083SSteven J. Hillconfig CPU_MICROMIPS 24097fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 24109e2b5372SMarkos Chandras bool "microMIPS" 2411bce86083SSteven J. Hill help 2412bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2413bce86083SSteven J. Hill microMIPS ISA 2414bce86083SSteven J. Hill 24159e2b5372SMarkos Chandrasendchoice 24169e2b5372SMarkos Chandras 2417a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 24180ce3417eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2419a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 24202a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2421a5e9a69eSPaul Burton help 2422a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2423a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 24241db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 24251db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 24261db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 24271db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 24281db1af84SPaul Burton the size & complexity of your kernel. 2429a5e9a69eSPaul Burton 2430a5e9a69eSPaul Burton If unsure, say Y. 2431a5e9a69eSPaul Burton 24321da177e4SLinus Torvaldsconfig CPU_HAS_WB 2433f7062ddbSRalf Baechle bool 2434e01402b1SRalf Baechle 2435df0ac8a4SKevin Cernekeeconfig XKS01 2436df0ac8a4SKevin Cernekee bool 2437df0ac8a4SKevin Cernekee 24388256b17eSFlorian Fainelliconfig CPU_HAS_RIXI 24398256b17eSFlorian Fainelli bool 24408256b17eSFlorian Fainelli 2441f41ae0b2SRalf Baechle# 2442f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2443f41ae0b2SRalf Baechle# 2444e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2445f41ae0b2SRalf Baechle bool 2446e01402b1SRalf Baechle 2447f41ae0b2SRalf Baechle# 2448f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2449f41ae0b2SRalf Baechle# 2450e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2451f41ae0b2SRalf Baechle bool 2452e01402b1SRalf Baechle 24531da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 24541da177e4SLinus Torvalds bool 24551da177e4SLinus Torvalds depends on !CPU_R3000 24561da177e4SLinus Torvalds default y 24571da177e4SLinus Torvalds 24581da177e4SLinus Torvalds# 245920d60d99SMaciej W. Rozycki# CPU non-features 246020d60d99SMaciej W. Rozycki# 246120d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 246220d60d99SMaciej W. Rozycki bool 246320d60d99SMaciej W. Rozycki 246420d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 246520d60d99SMaciej W. Rozycki bool 246620d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 246720d60d99SMaciej W. Rozycki 246820d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 246920d60d99SMaciej W. Rozycki bool 247020d60d99SMaciej W. Rozycki 24714edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT 24724edf00a4SPaul Burton int 24734edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24744edf00a4SPaul Burton default 4 if CPU_R8000 24754edf00a4SPaul Burton default 0 24764edf00a4SPaul Burton 24774edf00a4SPaul Burtonconfig MIPS_ASID_BITS 24784edf00a4SPaul Burton int 24792db003a5SPaul Burton default 0 if MIPS_ASID_BITS_VARIABLE 24804edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24814edf00a4SPaul Burton default 8 24824edf00a4SPaul Burton 24832db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE 24842db003a5SPaul Burton bool 24852db003a5SPaul Burton 248620d60d99SMaciej W. Rozycki# 24871da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 24881da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 24891da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 24901da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 24911da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 24921da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 24931da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 24941da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2495797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2496797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2497797798c1SRalf Baechle# support. 24981da177e4SLinus Torvalds# 24991da177e4SLinus Torvaldsconfig HIGHMEM 25001da177e4SLinus Torvalds bool "High Memory Support" 2501a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2502797798c1SRalf Baechle 2503797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2504797798c1SRalf Baechle bool 2505797798c1SRalf Baechle 2506797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2507797798c1SRalf Baechle bool 25081da177e4SLinus Torvalds 25099693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 25109693a853SFranck Bui-Huu bool 25119693a853SFranck Bui-Huu 2512a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2513a6a4834cSSteven J. Hill bool 2514a6a4834cSSteven J. Hill 2515377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2516377cb1b6SRalf Baechle bool 2517377cb1b6SRalf Baechle help 2518377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2519377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2520377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2521377cb1b6SRalf Baechle 2522a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2523a5e9a69eSPaul Burton bool 2524a5e9a69eSPaul Burton 2525b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2526b4819b59SYoichi Yuasa def_bool y 2527f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2528b4819b59SYoichi Yuasa 2529d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2530d8cb4e11SRalf Baechle bool 2531d8cb4e11SRalf Baechle default y if SGI_IP27 2532d8cb4e11SRalf Baechle help 25333dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2534d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2535d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2536d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2537d8cb4e11SRalf Baechle 2538b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2539b1c6cd42SAtsushi Nemoto bool 25407de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 254131473747SAtsushi Nemoto 2542d8cb4e11SRalf Baechleconfig NUMA 2543d8cb4e11SRalf Baechle bool "NUMA Support" 2544d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2545d8cb4e11SRalf Baechle help 2546d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2547d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2548d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2549d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2550d8cb4e11SRalf Baechle disabled. 2551d8cb4e11SRalf Baechle 2552d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2553d8cb4e11SRalf Baechle bool 2554d8cb4e11SRalf Baechle 25558c530ea3SMatt Redfearnconfig RELOCATABLE 25568c530ea3SMatt Redfearn bool "Relocatable kernel" 25573ff72be4SSteven J. Hill depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) 25588c530ea3SMatt Redfearn help 25598c530ea3SMatt Redfearn This builds a kernel image that retains relocation information 25608c530ea3SMatt Redfearn so it can be loaded someplace besides the default 1MB. 25618c530ea3SMatt Redfearn The relocations make the kernel binary about 15% larger, 25628c530ea3SMatt Redfearn but are discarded at runtime 25638c530ea3SMatt Redfearn 2564069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE 2565069fd766SMatt Redfearn hex "Relocation table size" 2566069fd766SMatt Redfearn depends on RELOCATABLE 2567069fd766SMatt Redfearn range 0x0 0x01000000 2568069fd766SMatt Redfearn default "0x00100000" 2569069fd766SMatt Redfearn ---help--- 2570069fd766SMatt Redfearn A table of relocation data will be appended to the kernel binary 2571069fd766SMatt Redfearn and parsed at boot to fix up the relocated kernel. 2572069fd766SMatt Redfearn 2573069fd766SMatt Redfearn This option allows the amount of space reserved for the table to be 2574069fd766SMatt Redfearn adjusted, although the default of 1Mb should be ok in most cases. 2575069fd766SMatt Redfearn 2576069fd766SMatt Redfearn The build will fail and a valid size suggested if this is too small. 2577069fd766SMatt Redfearn 2578069fd766SMatt Redfearn If unsure, leave at the default value. 2579069fd766SMatt Redfearn 2580405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE 2581405bc8fdSMatt Redfearn bool "Randomize the address of the kernel image" 2582405bc8fdSMatt Redfearn depends on RELOCATABLE 2583405bc8fdSMatt Redfearn ---help--- 2584405bc8fdSMatt Redfearn Randomizes the physical and virtual address at which the 2585405bc8fdSMatt Redfearn kernel image is loaded, as a security feature that 2586405bc8fdSMatt Redfearn deters exploit attempts relying on knowledge of the location 2587405bc8fdSMatt Redfearn of kernel internals. 2588405bc8fdSMatt Redfearn 2589405bc8fdSMatt Redfearn Entropy is generated using any coprocessor 0 registers available. 2590405bc8fdSMatt Redfearn 2591405bc8fdSMatt Redfearn The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2592405bc8fdSMatt Redfearn 2593405bc8fdSMatt Redfearn If unsure, say N. 2594405bc8fdSMatt Redfearn 2595405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET 2596405bc8fdSMatt Redfearn hex "Maximum kASLR offset" if EXPERT 2597405bc8fdSMatt Redfearn depends on RANDOMIZE_BASE 2598405bc8fdSMatt Redfearn range 0x0 0x40000000 if EVA || 64BIT 2599405bc8fdSMatt Redfearn range 0x0 0x08000000 2600405bc8fdSMatt Redfearn default "0x01000000" 2601405bc8fdSMatt Redfearn ---help--- 2602405bc8fdSMatt Redfearn When kASLR is active, this provides the maximum offset that will 2603405bc8fdSMatt Redfearn be applied to the kernel image. It should be set according to the 2604405bc8fdSMatt Redfearn amount of physical RAM available in the target system minus 2605405bc8fdSMatt Redfearn PHYSICAL_START and must be a power of 2. 2606405bc8fdSMatt Redfearn 2607405bc8fdSMatt Redfearn This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2608405bc8fdSMatt Redfearn EVA or 64-bit. The default is 16Mb. 2609405bc8fdSMatt Redfearn 2610c80d79d7SYasunori Gotoconfig NODES_SHIFT 2611c80d79d7SYasunori Goto int 2612c80d79d7SYasunori Goto default "6" 2613c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2614c80d79d7SYasunori Goto 261514f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 261614f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 261723021b2bSYang Shi depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) 261814f70012SDeng-Cheng Zhu default y 261914f70012SDeng-Cheng Zhu help 262014f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 262114f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 262214f70012SDeng-Cheng Zhu 2623b4819b59SYoichi Yuasasource "mm/Kconfig" 2624b4819b59SYoichi Yuasa 26251da177e4SLinus Torvaldsconfig SMP 26261da177e4SLinus Torvalds bool "Multi-Processing support" 2627e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2628e73ea273SRalf Baechle help 26291da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 26304a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 26314a474157SRobert Graffham than one CPU, say Y. 26321da177e4SLinus Torvalds 26334a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 26341da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 26351da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 26364a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 26371da177e4SLinus Torvalds will run faster if you say N here. 26381da177e4SLinus Torvalds 26391da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 26401da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 26411da177e4SLinus Torvalds 264203502faaSAdrian Bunk See also the SMP-HOWTO available at 264303502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 26441da177e4SLinus Torvalds 26451da177e4SLinus Torvalds If you don't know what to do here, say N. 26461da177e4SLinus Torvalds 26477840d618SMatt Redfearnconfig HOTPLUG_CPU 26487840d618SMatt Redfearn bool "Support for hot-pluggable CPUs" 26497840d618SMatt Redfearn depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 26507840d618SMatt Redfearn help 26517840d618SMatt Redfearn Say Y here to allow turning CPUs off and on. CPUs can be 26527840d618SMatt Redfearn controlled through /sys/devices/system/cpu. 26537840d618SMatt Redfearn (Note: power management support will enable this option 26547840d618SMatt Redfearn automatically on SMP systems. ) 26557840d618SMatt Redfearn Say N if you want to disable CPU hotplug. 26567840d618SMatt Redfearn 265787353d8aSRalf Baechleconfig SMP_UP 265887353d8aSRalf Baechle bool 265987353d8aSRalf Baechle 26604a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 26614a16ff4cSRalf Baechle bool 26624a16ff4cSRalf Baechle 26630ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 26640ee958e1SPaul Burton bool 26650ee958e1SPaul Burton 2666e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2667e73ea273SRalf Baechle bool 2668e73ea273SRalf Baechle 2669130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2670130e2fb7SRalf Baechle bool 2671130e2fb7SRalf Baechle 2672130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2673130e2fb7SRalf Baechle bool 2674130e2fb7SRalf Baechle 2675130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2676130e2fb7SRalf Baechle bool 2677130e2fb7SRalf Baechle 2678130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2679130e2fb7SRalf Baechle bool 2680130e2fb7SRalf Baechle 2681130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2682130e2fb7SRalf Baechle bool 2683130e2fb7SRalf Baechle 26841da177e4SLinus Torvaldsconfig NR_CPUS 2685a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2686a91796a9SJayachandran C range 2 256 26871da177e4SLinus Torvalds depends on SMP 2688130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2689130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2690130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2691130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2692130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 26931da177e4SLinus Torvalds help 26941da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 26951da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 26961da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 269772ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 269872ede9b1SAtsushi Nemoto and 2 for all others. 26991da177e4SLinus Torvalds 27001da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 270172ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 270272ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 270372ede9b1SAtsushi Nemoto power of two. 27041da177e4SLinus Torvalds 2705399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2706399aaa25SAl Cooper bool 2707399aaa25SAl Cooper 27087820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP_1024 27097820b84bSDavid Daney bool 27107820b84bSDavid Daney 27117820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP 27127820b84bSDavid Daney int 27137820b84bSDavid Daney depends on SMP 27147820b84bSDavid Daney default 1024 if MIPS_NR_CPU_NR_MAP_1024 27157820b84bSDavid Daney default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 27167820b84bSDavid Daney 27171723b4a3SAtsushi Nemoto# 27181723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 27191723b4a3SAtsushi Nemoto# 27201723b4a3SAtsushi Nemoto 27211723b4a3SAtsushi Nemotochoice 27221723b4a3SAtsushi Nemoto prompt "Timer frequency" 27231723b4a3SAtsushi Nemoto default HZ_250 27241723b4a3SAtsushi Nemoto help 27251723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 27261723b4a3SAtsushi Nemoto 272767596573SPaul Burton config HZ_24 272867596573SPaul Burton bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 272967596573SPaul Burton 27301723b4a3SAtsushi Nemoto config HZ_48 27310f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 27321723b4a3SAtsushi Nemoto 27331723b4a3SAtsushi Nemoto config HZ_100 27341723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 27351723b4a3SAtsushi Nemoto 27361723b4a3SAtsushi Nemoto config HZ_128 27371723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 27381723b4a3SAtsushi Nemoto 27391723b4a3SAtsushi Nemoto config HZ_250 27401723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 27411723b4a3SAtsushi Nemoto 27421723b4a3SAtsushi Nemoto config HZ_256 27431723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 27441723b4a3SAtsushi Nemoto 27451723b4a3SAtsushi Nemoto config HZ_1000 27461723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 27471723b4a3SAtsushi Nemoto 27481723b4a3SAtsushi Nemoto config HZ_1024 27491723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 27501723b4a3SAtsushi Nemoto 27511723b4a3SAtsushi Nemotoendchoice 27521723b4a3SAtsushi Nemoto 275367596573SPaul Burtonconfig SYS_SUPPORTS_24HZ 275467596573SPaul Burton bool 275567596573SPaul Burton 27561723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 27571723b4a3SAtsushi Nemoto bool 27581723b4a3SAtsushi Nemoto 27591723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 27601723b4a3SAtsushi Nemoto bool 27611723b4a3SAtsushi Nemoto 27621723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 27631723b4a3SAtsushi Nemoto bool 27641723b4a3SAtsushi Nemoto 27651723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 27661723b4a3SAtsushi Nemoto bool 27671723b4a3SAtsushi Nemoto 27681723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 27691723b4a3SAtsushi Nemoto bool 27701723b4a3SAtsushi Nemoto 27711723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 27721723b4a3SAtsushi Nemoto bool 27731723b4a3SAtsushi Nemoto 27741723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 27751723b4a3SAtsushi Nemoto bool 27761723b4a3SAtsushi Nemoto 27771723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 27781723b4a3SAtsushi Nemoto bool 277967596573SPaul Burton default y if !SYS_SUPPORTS_24HZ && \ 278067596573SPaul Burton !SYS_SUPPORTS_48HZ && \ 278167596573SPaul Burton !SYS_SUPPORTS_100HZ && \ 278267596573SPaul Burton !SYS_SUPPORTS_128HZ && \ 278367596573SPaul Burton !SYS_SUPPORTS_250HZ && \ 278467596573SPaul Burton !SYS_SUPPORTS_256HZ && \ 278567596573SPaul Burton !SYS_SUPPORTS_1000HZ && \ 27861723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 27871723b4a3SAtsushi Nemoto 27881723b4a3SAtsushi Nemotoconfig HZ 27891723b4a3SAtsushi Nemoto int 279067596573SPaul Burton default 24 if HZ_24 27911723b4a3SAtsushi Nemoto default 48 if HZ_48 27921723b4a3SAtsushi Nemoto default 100 if HZ_100 27931723b4a3SAtsushi Nemoto default 128 if HZ_128 27941723b4a3SAtsushi Nemoto default 250 if HZ_250 27951723b4a3SAtsushi Nemoto default 256 if HZ_256 27961723b4a3SAtsushi Nemoto default 1000 if HZ_1000 27971723b4a3SAtsushi Nemoto default 1024 if HZ_1024 27981723b4a3SAtsushi Nemoto 279996685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 280096685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 280196685b17SDeng-Cheng Zhu 2802e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 28031da177e4SLinus Torvalds 2804ea6e942bSAtsushi Nemotoconfig KEXEC 28057d60717eSKees Cook bool "Kexec system call" 28062965faa5SDave Young select KEXEC_CORE 2807ea6e942bSAtsushi Nemoto help 2808ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2809ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 28103dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2811ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2812ea6e942bSAtsushi Nemoto 281301dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2814ea6e942bSAtsushi Nemoto 2815ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2816ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2817bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2818bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2819bf220695SGeert Uytterhoeven made. 2820ea6e942bSAtsushi Nemoto 28217aa1c8f4SRalf Baechleconfig CRASH_DUMP 28227aa1c8f4SRalf Baechle bool "Kernel crash dumps" 28237aa1c8f4SRalf Baechle help 28247aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 28257aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 28267aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 28277aa1c8f4SRalf Baechle a specially reserved region and then later executed after 28287aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 28297aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 28307aa1c8f4SRalf Baechle PHYSICAL_START. 28317aa1c8f4SRalf Baechle 28327aa1c8f4SRalf Baechleconfig PHYSICAL_START 28337aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 28347aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 28357aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 28367aa1c8f4SRalf Baechle depends on CRASH_DUMP 28377aa1c8f4SRalf Baechle help 28387aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 28397aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 28407aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 28417aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 28427aa1c8f4SRalf Baechle passed to the panic-ed kernel). 28437aa1c8f4SRalf Baechle 2844ea6e942bSAtsushi Nemotoconfig SECCOMP 2845ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2846293c5bd1SRalf Baechle depends on PROC_FS 2847ea6e942bSAtsushi Nemoto default y 2848ea6e942bSAtsushi Nemoto help 2849ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2850ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2851ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2852ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2853ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2854ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2855ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2856ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2857ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2858ea6e942bSAtsushi Nemoto 2859ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2860ea6e942bSAtsushi Nemoto 2861597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 28620ce3417eSPaul Burton bool "Support for O32 binaries using 64-bit FP" 2863597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2864597ce172SPaul Burton help 2865597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2866597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2867597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2868597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2869597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2870597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2871597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2872597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2873597ce172SPaul Burton saying N here. 2874597ce172SPaul Burton 287506e2e882SPaul Burton Although binutils currently supports use of this flag the details 287606e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 287706e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 287806e2e882SPaul Burton behaviour before the details have been finalised, this option should 287906e2e882SPaul Burton be considered experimental and only enabled by those working upon 288006e2e882SPaul Burton said details. 288106e2e882SPaul Burton 288206e2e882SPaul Burton If unsure, say N. 2883597ce172SPaul Burton 2884f2ffa5abSDezhong Diaoconfig USE_OF 28850b3e06fdSJonas Gorski bool 2886f2ffa5abSDezhong Diao select OF 2887e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2888abd2363fSGrant Likely select IRQ_DOMAIN 2889f2ffa5abSDezhong Diao 28907fafb068SAndrew Brestickerconfig BUILTIN_DTB 28917fafb068SAndrew Bresticker bool 28927fafb068SAndrew Bresticker 28931da8f179SJonas Gorskichoice 28945b24d52cSJonas Gorski prompt "Kernel appended dtb support" if USE_OF 28951da8f179SJonas Gorski default MIPS_NO_APPENDED_DTB 28961da8f179SJonas Gorski 28971da8f179SJonas Gorski config MIPS_NO_APPENDED_DTB 28981da8f179SJonas Gorski bool "None" 28991da8f179SJonas Gorski help 29001da8f179SJonas Gorski Do not enable appended dtb support. 29011da8f179SJonas Gorski 290287db537dSAaro Koskinen config MIPS_ELF_APPENDED_DTB 290387db537dSAaro Koskinen bool "vmlinux" 290487db537dSAaro Koskinen help 290587db537dSAaro Koskinen With this option, the boot code will look for a device tree binary 290687db537dSAaro Koskinen DTB) included in the vmlinux ELF section .appended_dtb. By default 290787db537dSAaro Koskinen it is empty and the DTB can be appended using binutils command 290887db537dSAaro Koskinen objcopy: 290987db537dSAaro Koskinen 291087db537dSAaro Koskinen objcopy --update-section .appended_dtb=<filename>.dtb vmlinux 291187db537dSAaro Koskinen 291287db537dSAaro Koskinen This is meant as a backward compatiblity convenience for those 291387db537dSAaro Koskinen systems with a bootloader that can't be upgraded to accommodate 291487db537dSAaro Koskinen the documented boot protocol using a device tree. 291587db537dSAaro Koskinen 29161da8f179SJonas Gorski config MIPS_RAW_APPENDED_DTB 2917b8f54f2cSJonas Gorski bool "vmlinux.bin or vmlinuz.bin" 29181da8f179SJonas Gorski help 29191da8f179SJonas Gorski With this option, the boot code will look for a device tree binary 2920b8f54f2cSJonas Gorski DTB) appended to raw vmlinux.bin or vmlinuz.bin. 29211da8f179SJonas Gorski (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 29221da8f179SJonas Gorski 29231da8f179SJonas Gorski This is meant as a backward compatibility convenience for those 29241da8f179SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 29251da8f179SJonas Gorski the documented boot protocol using a device tree. 29261da8f179SJonas Gorski 29271da8f179SJonas Gorski Beware that there is very little in terms of protection against 29281da8f179SJonas Gorski this option being confused by leftover garbage in memory that might 29291da8f179SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 29301da8f179SJonas Gorski to vmlinux.bin. Do not leave this option active in a production kernel 29311da8f179SJonas Gorski if you don't intend to always append a DTB. 29321da8f179SJonas Gorskiendchoice 29331da8f179SJonas Gorski 29342024972eSJonas Gorskichoice 29352024972eSJonas Gorski prompt "Kernel command line type" if !CMDLINE_OVERRIDE 29362bcef9b4SJonas Gorski default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 29373f5f0a44SPaul Burton !MIPS_MALTA && \ 29382bcef9b4SJonas Gorski !CAVIUM_OCTEON_SOC 29392024972eSJonas Gorski default MIPS_CMDLINE_FROM_BOOTLOADER 29402024972eSJonas Gorski 29412024972eSJonas Gorski config MIPS_CMDLINE_FROM_DTB 29422024972eSJonas Gorski depends on USE_OF 29432024972eSJonas Gorski bool "Dtb kernel arguments if available" 29442024972eSJonas Gorski 29452024972eSJonas Gorski config MIPS_CMDLINE_DTB_EXTEND 29462024972eSJonas Gorski depends on USE_OF 29472024972eSJonas Gorski bool "Extend dtb kernel arguments with bootloader arguments" 29482024972eSJonas Gorski 29492024972eSJonas Gorski config MIPS_CMDLINE_FROM_BOOTLOADER 29502024972eSJonas Gorski bool "Bootloader kernel arguments if available" 2951ed47e153SRabin Vincent 2952ed47e153SRabin Vincent config MIPS_CMDLINE_BUILTIN_EXTEND 2953ed47e153SRabin Vincent depends on CMDLINE_BOOL 2954ed47e153SRabin Vincent bool "Extend builtin kernel arguments with bootloader arguments" 29552024972eSJonas Gorskiendchoice 29562024972eSJonas Gorski 29575e83d430SRalf Baechleendmenu 29585e83d430SRalf Baechle 29591df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 29601df0f0ffSAtsushi Nemoto bool 29611df0f0ffSAtsushi Nemoto default y 29621df0f0ffSAtsushi Nemoto 29631df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 29641df0f0ffSAtsushi Nemoto bool 29651df0f0ffSAtsushi Nemoto default y 29661df0f0ffSAtsushi Nemoto 2967e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT 2968e1e16115SAaro Koskinen bool 2969e1e16115SAaro Koskinen default y 2970e1e16115SAaro Koskinen 2971a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 2972a728ab52SKirill A. Shutemov int 29733377e227SAlex Belits default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 2974a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 2975a728ab52SKirill A. Shutemov default 2 2976a728ab52SKirill A. Shutemov 2977b6c3539bSRalf Baechlesource "init/Kconfig" 2978b6c3539bSRalf Baechle 2979dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2980dc52ddc0SMatt Helsley 29811da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 29821da177e4SLinus Torvalds 29835e83d430SRalf Baechleconfig HW_HAS_EISA 29845e83d430SRalf Baechle bool 29851da177e4SLinus Torvaldsconfig HW_HAS_PCI 29861da177e4SLinus Torvalds bool 29871da177e4SLinus Torvalds 29881da177e4SLinus Torvaldsconfig PCI 29891da177e4SLinus Torvalds bool "Support for PCI controller" 29901da177e4SLinus Torvalds depends on HW_HAS_PCI 2991abb4ae46SRalf Baechle select PCI_DOMAINS 29921da177e4SLinus Torvalds help 29931da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 29941da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 29951da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 29961da177e4SLinus Torvalds say Y, otherwise N. 29971da177e4SLinus Torvalds 29980e476d91SHuacai Chenconfig HT_PCI 29990e476d91SHuacai Chen bool "Support for HT-linked PCI" 30000e476d91SHuacai Chen default y 30010e476d91SHuacai Chen depends on CPU_LOONGSON3 30020e476d91SHuacai Chen select PCI 30030e476d91SHuacai Chen select PCI_DOMAINS 30040e476d91SHuacai Chen help 30050e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 30060e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 30070e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 30080e476d91SHuacai Chen 30091da177e4SLinus Torvaldsconfig PCI_DOMAINS 30101da177e4SLinus Torvalds bool 30111da177e4SLinus Torvalds 301288555b48SPaul Burtonconfig PCI_DOMAINS_GENERIC 301388555b48SPaul Burton bool 301488555b48SPaul Burton 3015c5611df9SPaul Burtonconfig PCI_DRIVERS_GENERIC 301687dd9a4dSPaul Burton select PCI_DOMAINS_GENERIC if PCI_DOMAINS 3017c5611df9SPaul Burton bool 3018c5611df9SPaul Burton 3019c5611df9SPaul Burtonconfig PCI_DRIVERS_LEGACY 3020c5611df9SPaul Burton def_bool !PCI_DRIVERS_GENERIC 3021c5611df9SPaul Burton select NO_GENERIC_PCI_IOPORT_MAP 3022c5611df9SPaul Burton 30231da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 30241da177e4SLinus Torvalds 30251da177e4SLinus Torvalds# 30261da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 30271da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 30281da177e4SLinus Torvalds# users to choose the right thing ... 30291da177e4SLinus Torvalds# 30301da177e4SLinus Torvaldsconfig ISA 30311da177e4SLinus Torvalds bool 30321da177e4SLinus Torvalds 30331da177e4SLinus Torvaldsconfig EISA 30341da177e4SLinus Torvalds bool "EISA support" 30355e83d430SRalf Baechle depends on HW_HAS_EISA 30361da177e4SLinus Torvalds select ISA 3037aa414dffSRalf Baechle select GENERIC_ISA_DMA 30381da177e4SLinus Torvalds ---help--- 30391da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 30401da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 30411da177e4SLinus Torvalds 30421da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 30431da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 30441da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 30451da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 30461da177e4SLinus Torvalds 30471da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 30481da177e4SLinus Torvalds 30491da177e4SLinus Torvalds Otherwise, say N. 30501da177e4SLinus Torvalds 30511da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 30521da177e4SLinus Torvalds 30531da177e4SLinus Torvaldsconfig TC 30541da177e4SLinus Torvalds bool "TURBOchannel support" 30551da177e4SLinus Torvalds depends on MACH_DECSTATION 30561da177e4SLinus Torvalds help 305750a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 305850a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 305950a23e6eSJustin P. Mattock at: 306050a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 306150a23e6eSJustin P. Mattock and: 306250a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 306350a23e6eSJustin P. Mattock Linux driver support status is documented at: 306450a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 30651da177e4SLinus Torvalds 30661da177e4SLinus Torvaldsconfig MMU 30671da177e4SLinus Torvalds bool 30681da177e4SLinus Torvalds default y 30691da177e4SLinus Torvalds 3070109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MIN 3071109c32ffSMatt Redfearn default 12 if 64BIT 3072109c32ffSMatt Redfearn default 8 3073109c32ffSMatt Redfearn 3074109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MAX 3075109c32ffSMatt Redfearn default 18 if 64BIT 3076109c32ffSMatt Redfearn default 15 3077109c32ffSMatt Redfearn 3078109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3079109c32ffSMatt Redfearn default 8 3080109c32ffSMatt Redfearn 3081109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3082109c32ffSMatt Redfearn default 15 3083109c32ffSMatt Redfearn 3084d865bea4SRalf Baechleconfig I8253 3085d865bea4SRalf Baechle bool 3086798778b8SRussell King select CLKSRC_I8253 30872d02612fSThomas Gleixner select CLKEVT_I8253 30889726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 3089d865bea4SRalf Baechle 3090e05eb3f8SRalf Baechleconfig ZONE_DMA 3091e05eb3f8SRalf Baechle bool 3092e05eb3f8SRalf Baechle 3093cce335aeSRalf Baechleconfig ZONE_DMA32 3094cce335aeSRalf Baechle bool 3095cce335aeSRalf Baechle 30961da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 30971da177e4SLinus Torvalds 3098388b78adSAlexandre Bounineconfig RAPIDIO 309956abde72SAlexandre Bounine tristate "RapidIO support" 3100388b78adSAlexandre Bounine depends on PCI 3101388b78adSAlexandre Bounine default n 3102388b78adSAlexandre Bounine help 3103388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 3104388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 3105388b78adSAlexandre Bounine 3106388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 3107388b78adSAlexandre Bounine 31081da177e4SLinus Torvaldsendmenu 31091da177e4SLinus Torvalds 31101da177e4SLinus Torvaldsmenu "Executable file formats" 31111da177e4SLinus Torvalds 31121da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 31131da177e4SLinus Torvalds 31141da177e4SLinus Torvaldsconfig TRAD_SIGNALS 31151da177e4SLinus Torvalds bool 31161da177e4SLinus Torvalds 31171da177e4SLinus Torvaldsconfig MIPS32_COMPAT 311878aaf956SRalf Baechle bool 31191da177e4SLinus Torvalds 31201da177e4SLinus Torvaldsconfig COMPAT 31211da177e4SLinus Torvalds bool 31221da177e4SLinus Torvalds 312305e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 312405e43966SAtsushi Nemoto bool 312505e43966SAtsushi Nemoto 31261da177e4SLinus Torvaldsconfig MIPS32_O32 31271da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 312878aaf956SRalf Baechle depends on 64BIT 312978aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 313078aaf956SRalf Baechle select COMPAT 313178aaf956SRalf Baechle select MIPS32_COMPAT 313278aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31331da177e4SLinus Torvalds help 31341da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 31351da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 31361da177e4SLinus Torvalds existing binaries are in this format. 31371da177e4SLinus Torvalds 31381da177e4SLinus Torvalds If unsure, say Y. 31391da177e4SLinus Torvalds 31401da177e4SLinus Torvaldsconfig MIPS32_N32 31411da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 3142c22eacfeSRalf Baechle depends on 64BIT 314378aaf956SRalf Baechle select COMPAT 314478aaf956SRalf Baechle select MIPS32_COMPAT 314578aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31461da177e4SLinus Torvalds help 31471da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 31481da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 31491da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 31501da177e4SLinus Torvalds cases. 31511da177e4SLinus Torvalds 31521da177e4SLinus Torvalds If unsure, say N. 31531da177e4SLinus Torvalds 31541da177e4SLinus Torvaldsconfig BINFMT_ELF32 31551da177e4SLinus Torvalds bool 31561da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 3157f43edca7SRalf Baechle select ELFCORE 31581da177e4SLinus Torvalds 31592116245eSRalf Baechleendmenu 31601da177e4SLinus Torvalds 31612116245eSRalf Baechlemenu "Power management options" 3162952fa954SRodolfo Giometti 3163363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 3164363c55caSWu Zhangjin def_bool y 31653f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3166363c55caSWu Zhangjin 3167f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 3168f4cb5700SJohannes Berg def_bool y 31693f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3170f4cb5700SJohannes Berg 31712116245eSRalf Baechlesource "kernel/power/Kconfig" 3172952fa954SRodolfo Giometti 31731da177e4SLinus Torvaldsendmenu 31741da177e4SLinus Torvalds 31757a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 31767a998935SViresh Kumar bool 31777a998935SViresh Kumar 31787a998935SViresh Kumarmenu "CPU Power Management" 3179c095ebafSPaul Burton 3180c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 31817a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 31827a998935SViresh Kumarendif 31839726b43aSWu Zhangjin 3184c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 3185c095ebafSPaul Burton 3186c095ebafSPaul Burtonendmenu 3187c095ebafSPaul Burton 3188d5950b43SSam Ravnborgsource "net/Kconfig" 3189d5950b43SSam Ravnborg 31901da177e4SLinus Torvaldssource "drivers/Kconfig" 31911da177e4SLinus Torvalds 319298cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 319398cdee0eSRalf Baechle 31941da177e4SLinus Torvaldssource "fs/Kconfig" 31951da177e4SLinus Torvalds 31961da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 31971da177e4SLinus Torvalds 31981da177e4SLinus Torvaldssource "security/Kconfig" 31991da177e4SLinus Torvalds 32001da177e4SLinus Torvaldssource "crypto/Kconfig" 32011da177e4SLinus Torvalds 32021da177e4SLinus Torvaldssource "lib/Kconfig" 32032235a54dSSanjay Lal 32042235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 3205