xref: /linux/arch/mips/Kconfig (revision 2ab71a02c56f8244ac611b5c6e6603c6fe83b966)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
440e084a5SRalf Baechle	select ARCH_SUPPORTS_UPROBES
5a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
6393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
75fac4f7aSPaul Burton	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
81ee3630aSRalf Baechle	select ARCH_USE_BUILTIN_BSWAP
9c3fc5cd5SRalf Baechle	select HAVE_CONTEXT_TRACKING
10f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
11ec7748b5SSam Ravnborg	select HAVE_IDE
1242d4b839SMathieu Desnoyers	select HAVE_OPROFILE
137f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
147f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
1588547001SJason Wessel	select HAVE_ARCH_KGDB
16490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
17c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
183f5fdb4bSMarkos Chandras	select HAVE_BPF_JIT if !CPU_MICROMIPS
19d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
20538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
21538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
2264575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
2329c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
24c1bf207dSDavid Daney	select HAVE_KPROBES
25c1bf207dSDavid Daney	select HAVE_KRETPROBES
26fb59e394SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
27b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
281d7bf993SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
292b68f6caSKees Cook	select ARCH_HAS_ELF_RANDOMIZE
30383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
3130ad29bbSHuacai Chen	select RTC_LIB if !MACH_LOONGSON64
322b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
337463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
34f4649382SZubair Lutfullah Kakakhel	select HAVE_DMA_CONTIGUOUS
3548e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
363bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
37f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3878857614SMarkos Chandras	select GENERIC_PCI_IOMAP
3994bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
40c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
410f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
429d15ffc8STejun Heo	select HAVE_MEMBLOCK
439d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
449d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
45360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
464b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
47cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
48929de4ccSDeng-Cheng Zhu	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
49cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
50786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
514febd95aSStephen Rothwell	select VIRT_TO_BUS
522f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
532f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
5450150d2bSAl Viro	select CLONE_BACKWARDS
55d1a1dc0bSDave Hansen	select HAVE_DEBUG_STACKOVERFLOW
5619952a92SKees Cook	select HAVE_CC_STACKPROTECTOR
57b1d4c6caSJames Hogan	select CPU_PM if CPU_IDLE
58cc7964afSPaul Burton	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
5990cee759SPaul Burton	select ARCH_BINFMT_ELF_STATE
60d79d853dSMarkos Chandras	select SYSCTL_EXCEPTION_TRACE
61bb877e96SDeng-Cheng Zhu	select HAVE_VIRT_CPU_ACCOUNTING_GEN
62ec9ddad3SDeng-Cheng Zhu	select HAVE_IRQ_TIME_ACCOUNTING
63a7f4df4eSAlex Smith	select GENERIC_TIME_VSYSCALL
64a7f4df4eSAlex Smith	select ARCH_CLOCKSOURCE_DATA
651d2753a6SDavid Daney	select HANDLE_DOMAIN_IRQ
661da177e4SLinus Torvalds
671da177e4SLinus Torvaldsmenu "Machine selection"
681da177e4SLinus Torvalds
695e83d430SRalf Baechlechoice
705e83d430SRalf Baechle	prompt "System type"
715e83d430SRalf Baechle	default SGI_IP22
721da177e4SLinus Torvalds
7342a4f17dSManuel Laussconfig MIPS_ALCHEMY
74c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
7534adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
76f772cdb2SRalf Baechle	select CEVT_R4K
77d7ea335cSSteven J. Hill	select CSRC_R4K
7867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7988e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
8042a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
8142a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
8242a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
83efb12436SAlexandre Courbot	select ARCH_REQUIRE_GPIOLIB
841b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
8547440229SManuel Lauss	select COMMON_CLK
861da177e4SLinus Torvalds
877ca5dc14SFlorian Fainelliconfig AR7
887ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
897ca5dc14SFlorian Fainelli	select BOOT_ELF32
907ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
917ca5dc14SFlorian Fainelli	select CEVT_R4K
927ca5dc14SFlorian Fainelli	select CSRC_R4K
9367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
947ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
957ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
967ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
977ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
987ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
997ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
100377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1011b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
1025f3c9098SFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
1037ca5dc14SFlorian Fainelli	select VLYNQ
1048551fb64SYoichi Yuasa	select HAVE_CLK
1057ca5dc14SFlorian Fainelli	help
1067ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1077ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1087ca5dc14SFlorian Fainelli
10943cc739fSSergey Ryazanovconfig ATH25
11043cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
11143cc739fSSergey Ryazanov	select CEVT_R4K
11243cc739fSSergey Ryazanov	select CSRC_R4K
11343cc739fSSergey Ryazanov	select DMA_NONCOHERENT
11467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1151753e74eSSergey Ryazanov	select IRQ_DOMAIN
11643cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
11743cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
11843cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
1198aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
12043cc739fSSergey Ryazanov	help
12143cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
12243cc739fSSergey Ryazanov
123d4a67d9dSGabor Juhosconfig ATH79
124d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
125ff591a91SAlban Bedel	select ARCH_HAS_RESET_CONTROLLER
1266eae43c5SGabor Juhos	select ARCH_REQUIRE_GPIOLIB
127d4a67d9dSGabor Juhos	select BOOT_RAW
128d4a67d9dSGabor Juhos	select CEVT_R4K
129d4a67d9dSGabor Juhos	select CSRC_R4K
130d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
13194638067SGabor Juhos	select HAVE_CLK
132411520afSAlban Bedel	select COMMON_CLK
1332c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
13467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1350aabf1a4SGabor Juhos	select MIPS_MACHINE
136d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
137d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
138d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
139d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
140377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
141b3f0a250SAlban Bedel	select SYS_SUPPORTS_ZBOOT_UART_PROM
14203c8c407SAlban Bedel	select USE_OF
143d4a67d9dSGabor Juhos	help
144d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
145d4a67d9dSGabor Juhos
1465f2d4459SKevin Cernekeeconfig BMIPS_GENERIC
1475f2d4459SKevin Cernekee	bool "Broadcom Generic BMIPS kernel"
148d666cd02SKevin Cernekee	select BOOT_RAW
149d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
150d666cd02SKevin Cernekee	select USE_OF
151d666cd02SKevin Cernekee	select CEVT_R4K
152d666cd02SKevin Cernekee	select CSRC_R4K
153d666cd02SKevin Cernekee	select SYNC_R4K
154d666cd02SKevin Cernekee	select COMMON_CLK
155c7c42ec2SSimon Arlott	select BCM6345_L1_IRQ
15660b858f2SKevin Cernekee	select BCM7038_L1_IRQ
15760b858f2SKevin Cernekee	select BCM7120_L2_IRQ
15860b858f2SKevin Cernekee	select BRCMSTB_L2_IRQ
15967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
16060b858f2SKevin Cernekee	select DMA_NONCOHERENT
161d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
16260b858f2SKevin Cernekee	select SYS_SUPPORTS_LITTLE_ENDIAN
163d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
164d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
16560b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS32_3300
16660b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4350
16760b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4380
168d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
169d666cd02SKevin Cernekee	select SWAP_IO_SPACE
17060b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17160b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
17260b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17360b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
174a7b43812SFlorian Fainelli	select ARCH_WANT_OPTIONAL_GPIOLIB
175d666cd02SKevin Cernekee	help
1765f2d4459SKevin Cernekee	  Build a generic DT-based kernel image that boots on select
1775f2d4459SKevin Cernekee	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
1785f2d4459SKevin Cernekee	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
1795f2d4459SKevin Cernekee	  must be set appropriately for your board.
180d666cd02SKevin Cernekee
1811c0c13ebSAurelien Jarnoconfig BCM47XX
182c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
1832da4c74dSHauke Mehrtens	select ARCH_WANT_OPTIONAL_GPIOLIB
184fe08f8c2SHauke Mehrtens	select BOOT_RAW
18542f77542SRalf Baechle	select CEVT_R4K
186940f6b48SRalf Baechle	select CSRC_R4K
1871c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1881c0c13ebSAurelien Jarno	select HW_HAS_PCI
18967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
190314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
191dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1921c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1931c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
194377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
19525e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
196e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
197c949c0bcSRafał Miłecki	select GPIOLIB
198c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
199f6e734a8SRafał Miłecki	select BCM47XX_NVRAM
200*2ab71a02SRafał Miłecki	select BCM47XX_SPROM
2011c0c13ebSAurelien Jarno	help
2021c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
2031c0c13ebSAurelien Jarno
204e7300d04SMaxime Bizonconfig BCM63XX
205e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
206ae8de61cSFlorian Fainelli	select BOOT_RAW
207e7300d04SMaxime Bizon	select CEVT_R4K
208e7300d04SMaxime Bizon	select CSRC_R4K
209fc264022SJonas Gorski	select SYNC_R4K
210e7300d04SMaxime Bizon	select DMA_NONCOHERENT
21167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
212e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
213e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
214e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
215e7300d04SMaxime Bizon	select SWAP_IO_SPACE
216e7300d04SMaxime Bizon	select ARCH_REQUIRE_GPIOLIB
2173e82eeebSYoichi Yuasa	select HAVE_CLK
218af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
219e7300d04SMaxime Bizon	help
220e7300d04SMaxime Bizon	 Support for BCM63XX based boards
221e7300d04SMaxime Bizon
2221da177e4SLinus Torvaldsconfig MIPS_COBALT
2233fa986faSMartin Michlmayr	bool "Cobalt Server"
22442f77542SRalf Baechle	select CEVT_R4K
225940f6b48SRalf Baechle	select CSRC_R4K
2261097c6acSYoichi Yuasa	select CEVT_GT641XX
2271da177e4SLinus Torvalds	select DMA_NONCOHERENT
2281da177e4SLinus Torvalds	select HW_HAS_PCI
229d865bea4SRalf Baechle	select I8253
2301da177e4SLinus Torvalds	select I8259
23167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
232d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
233252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
234e25bfc92SYoichi Yuasa	select PCI
2357cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
2360a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
237ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2380e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
2395e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
240e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
2411da177e4SLinus Torvalds
2421da177e4SLinus Torvaldsconfig MACH_DECSTATION
2433fa986faSMartin Michlmayr	bool "DECstations"
2441da177e4SLinus Torvalds	select BOOT_ELF32
2456457d9fcSYoichi Yuasa	select CEVT_DS1287
24681d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
2474247417dSYoichi Yuasa	select CSRC_IOASIC
24881d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
24920d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
25020d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
25120d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
2521da177e4SLinus Torvalds	select DMA_NONCOHERENT
253ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
25467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
2557cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
2567cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
257ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2587d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2595e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
2601723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
2611723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
2621723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
263930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
2645e83d430SRalf Baechle	help
2651da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
2661da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
2671da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
2681da177e4SLinus Torvalds
2691da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
2701da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
2711da177e4SLinus Torvalds
2721da177e4SLinus Torvalds		DECstation 5000/50
2731da177e4SLinus Torvalds		DECstation 5000/150
2741da177e4SLinus Torvalds		DECstation 5000/260
2751da177e4SLinus Torvalds		DECsystem 5900/260
2761da177e4SLinus Torvalds
2771da177e4SLinus Torvalds	  otherwise choose R3000.
2781da177e4SLinus Torvalds
2795e83d430SRalf Baechleconfig MACH_JAZZ
2803fa986faSMartin Michlmayr	bool "Jazz family of machines"
2810e2794b0SRalf Baechle	select FW_ARC
2820e2794b0SRalf Baechle	select FW_ARC32
2835e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
28442f77542SRalf Baechle	select CEVT_R4K
285940f6b48SRalf Baechle	select CSRC_R4K
286e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2875e83d430SRalf Baechle	select GENERIC_ISA_DMA
2888a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
28967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
290d865bea4SRalf Baechle	select I8253
2915e83d430SRalf Baechle	select I8259
2925e83d430SRalf Baechle	select ISA
2937cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2945e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2957d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2961723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2971da177e4SLinus Torvalds	help
2985e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
2995e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
300692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
3015e83d430SRalf Baechle	 Olivetti M700-10 workstations.
3025e83d430SRalf Baechle
303de361e8bSPaul Burtonconfig MACH_INGENIC
304de361e8bSPaul Burton	bool "Ingenic SoC based machines"
3055ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
3065ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
307f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
3085ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
30967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3105ebabe59SLars-Peter Clausen	select ARCH_REQUIRE_GPIOLIB
311ff1930c6SPaul Burton	select COMMON_CLK
31283bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
313ffb1843dSPaul Burton	select BUILTIN_DTB
314ffb1843dSPaul Burton	select USE_OF
3156ec127fbSPaul Burton	select LIBFDT
3165ebabe59SLars-Peter Clausen
317171bb2f1SJohn Crispinconfig LANTIQ
318171bb2f1SJohn Crispin	bool "Lantiq based platforms"
319171bb2f1SJohn Crispin	select DMA_NONCOHERENT
32067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
321171bb2f1SJohn Crispin	select CEVT_R4K
322171bb2f1SJohn Crispin	select CSRC_R4K
323171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
324171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
325171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
326171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
327377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
328171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
329171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
330171bb2f1SJohn Crispin	select ARCH_REQUIRE_GPIOLIB
331171bb2f1SJohn Crispin	select SWAP_IO_SPACE
332171bb2f1SJohn Crispin	select BOOT_RAW
333287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
334a0392222SJohn Crispin	select USE_OF
3353f8c50c9SJohn Crispin	select PINCTRL
3363f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
337c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
338c530781cSJohn Crispin	select RESET_CONTROLLER
339171bb2f1SJohn Crispin
3401f21d2bdSBrian Murphyconfig LASAT
3411f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
34242f77542SRalf Baechle	select CEVT_R4K
34316f0bbbcSRalf Baechle	select CRC32
344940f6b48SRalf Baechle	select CSRC_R4K
3451f21d2bdSBrian Murphy	select DMA_NONCOHERENT
3461f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
3471f21d2bdSBrian Murphy	select HW_HAS_PCI
34867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3491f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
3501f21d2bdSBrian Murphy	select MIPS_NILE4
3511f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
3521f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
3531f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
3541f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
3551f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
3561f21d2bdSBrian Murphy
35730ad29bbSHuacai Chenconfig MACH_LOONGSON32
35830ad29bbSHuacai Chen	bool "Loongson-1 family of machines"
359c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
360ade299d8SYoichi Yuasa	help
36130ad29bbSHuacai Chen	  This enables support for the Loongson-1 family of machines.
36285749d24SWu Zhangjin
36330ad29bbSHuacai Chen	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
36430ad29bbSHuacai Chen	  the Institute of Computing Technology (ICT), Chinese Academy of
36530ad29bbSHuacai Chen	  Sciences (CAS).
366ade299d8SYoichi Yuasa
36730ad29bbSHuacai Chenconfig MACH_LOONGSON64
36830ad29bbSHuacai Chen	bool "Loongson-2/3 family of machines"
369ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
370ca585cf9SKelvin Cheung	help
37130ad29bbSHuacai Chen	  This enables the support of Loongson-2/3 family of machines.
372ca585cf9SKelvin Cheung
37330ad29bbSHuacai Chen	  Loongson-2 is a family of single-core CPUs and Loongson-3 is a
37430ad29bbSHuacai Chen	  family of multi-core CPUs. They are both 64-bit general-purpose
37530ad29bbSHuacai Chen	  MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
37630ad29bbSHuacai Chen	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
37730ad29bbSHuacai Chen	  in the People's Republic of China. The chief architect is Professor
37830ad29bbSHuacai Chen	  Weiwu Hu.
379ca585cf9SKelvin Cheung
3806a438309SAndrew Brestickerconfig MACH_PISTACHIO
3816a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
3826a438309SAndrew Bresticker	select ARCH_REQUIRE_GPIOLIB
3836a438309SAndrew Bresticker	select BOOT_ELF32
3846a438309SAndrew Bresticker	select BOOT_RAW
3856a438309SAndrew Bresticker	select CEVT_R4K
3866a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
3876a438309SAndrew Bresticker	select COMMON_CLK
3886a438309SAndrew Bresticker	select CSRC_R4K
3896a438309SAndrew Bresticker	select DMA_MAYBE_COHERENT
39067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3916a438309SAndrew Bresticker	select LIBFDT
3926a438309SAndrew Bresticker	select MFD_SYSCON
3936a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
3946a438309SAndrew Bresticker	select MIPS_GIC
3956a438309SAndrew Bresticker	select PINCTRL
3966a438309SAndrew Bresticker	select REGULATOR
3976a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
3986a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
3996a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
4006a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
4016a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
4026a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
403018f62eeSEzequiel Garcia	select SYS_HAS_EARLY_PRINTK
404018f62eeSEzequiel Garcia	select USE_GENERIC_EARLY_PRINTK_8250
4056a438309SAndrew Bresticker	select USE_OF
4066a438309SAndrew Bresticker	help
4076a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
4086a438309SAndrew Bresticker
4099937f5ffSZubair Lutfullah Kakakhelconfig MACH_XILFPGA
4109937f5ffSZubair Lutfullah Kakakhel	bool "MIPSfpga Xilinx based boards"
4119937f5ffSZubair Lutfullah Kakakhel	select ARCH_REQUIRE_GPIOLIB
4129937f5ffSZubair Lutfullah Kakakhel	select BOOT_ELF32
4139937f5ffSZubair Lutfullah Kakakhel	select BOOT_RAW
4149937f5ffSZubair Lutfullah Kakakhel	select BUILTIN_DTB
4159937f5ffSZubair Lutfullah Kakakhel	select CEVT_R4K
4169937f5ffSZubair Lutfullah Kakakhel	select COMMON_CLK
4179937f5ffSZubair Lutfullah Kakakhel	select CSRC_R4K
4189937f5ffSZubair Lutfullah Kakakhel	select IRQ_MIPS_CPU
4199937f5ffSZubair Lutfullah Kakakhel	select LIBFDT
4209937f5ffSZubair Lutfullah Kakakhel	select MIPS_CPU_SCACHE
4219937f5ffSZubair Lutfullah Kakakhel	select SYS_HAS_EARLY_PRINTK
4229937f5ffSZubair Lutfullah Kakakhel	select SYS_HAS_CPU_MIPS32_R2
4239937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_32BIT_KERNEL
4249937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_LITTLE_ENDIAN
4259937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_ZBOOT_UART16550
4269937f5ffSZubair Lutfullah Kakakhel	select USE_OF
4279937f5ffSZubair Lutfullah Kakakhel	select USE_GENERIC_EARLY_PRINTK_8250
4289937f5ffSZubair Lutfullah Kakakhel	help
4299937f5ffSZubair Lutfullah Kakakhel	  This enables support for the IMG University Program MIPSfpga platform.
4309937f5ffSZubair Lutfullah Kakakhel
4311da177e4SLinus Torvaldsconfig MIPS_MALTA
4323fa986faSMartin Michlmayr	bool "MIPS Malta board"
43361ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
4341da177e4SLinus Torvalds	select BOOT_ELF32
435fa71c960SRalf Baechle	select BOOT_RAW
436e8823d26SPaul Burton	select BUILTIN_DTB
43742f77542SRalf Baechle	select CEVT_R4K
438940f6b48SRalf Baechle	select CSRC_R4K
439fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
44042b002abSGuenter Roeck	select COMMON_CLK
441885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
4421da177e4SLinus Torvalds	select GENERIC_ISA_DMA
4438a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
44467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4458a19b8f1SAndrew Bresticker	select MIPS_GIC
4461da177e4SLinus Torvalds	select HW_HAS_PCI
447d865bea4SRalf Baechle	select I8253
4481da177e4SLinus Torvalds	select I8259
4495e83d430SRalf Baechle	select MIPS_BONITO64
4509318c51aSChris Dearman	select MIPS_CPU_SCACHE
451a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
452252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
4535e83d430SRalf Baechle	select MIPS_MSC
454ecafe3e9SPaul Burton	select SMP_UP if SMP
4551da177e4SLinus Torvalds	select SWAP_IO_SPACE
4567cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
4577cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
458bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
459c5b36783SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R5
460575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
4617cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
4625d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
463575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
4647cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
4657cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
466ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
467ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4685e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
469c5b36783SSteven J. Hill	select SYS_SUPPORTS_HIGHMEM
4705e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
471424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
4720365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
473e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
474377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
475f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
4769693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
4771b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
478e8823d26SPaul Burton	select USE_OF
479abcc82b1SJames Hogan	select ZONE_DMA32 if 64BIT
480e81a8c7dSPaul Burton	select BUILTIN_DTB
481e81a8c7dSPaul Burton	select LIBFDT
4821da177e4SLinus Torvalds	help
483f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
4841da177e4SLinus Torvalds	  board.
4851da177e4SLinus Torvalds
4862572f00dSJoshua Hendersonconfig MACH_PIC32
4872572f00dSJoshua Henderson	bool "Microchip PIC32 Family"
4882572f00dSJoshua Henderson	help
4892572f00dSJoshua Henderson	  This enables support for the Microchip PIC32 family of platforms.
4902572f00dSJoshua Henderson
4912572f00dSJoshua Henderson	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
4922572f00dSJoshua Henderson	  microcontrollers.
4932572f00dSJoshua Henderson
494ec47b274SSteven J. Hillconfig MIPS_SEAD3
495ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
496ec47b274SSteven J. Hill	select BOOT_ELF32
497ec47b274SSteven J. Hill	select BOOT_RAW
498f262b5f2SAndrew Bresticker	select BUILTIN_DTB
499ec47b274SSteven J. Hill	select CEVT_R4K
500ec47b274SSteven J. Hill	select CSRC_R4K
501fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
50242b002abSGuenter Roeck	select COMMON_CLK
503ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
504ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
505ec47b274SSteven J. Hill	select DMA_NONCOHERENT
50667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5078a19b8f1SAndrew Bresticker	select MIPS_GIC
50844327236SQais Yousef	select LIBFDT
509ec47b274SSteven J. Hill	select MIPS_MSC
510ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
511ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
512ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
513ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
514ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
515ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
516ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
517ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
518ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
519a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
520377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
521ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
522ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
5239b731009SSteven J. Hill	select USE_OF
524ec47b274SSteven J. Hill	help
525ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
526ec47b274SSteven J. Hill	  board.
527ec47b274SSteven J. Hill
528a83860c2SRalf Baechleconfig NEC_MARKEINS
529a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
530a83860c2SRalf Baechle	select SOC_EMMA2RH
531a83860c2SRalf Baechle	select HW_HAS_PCI
532a83860c2SRalf Baechle	help
533a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
534ade299d8SYoichi Yuasa
5355e83d430SRalf Baechleconfig MACH_VR41XX
53674142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
53742f77542SRalf Baechle	select CEVT_R4K
538940f6b48SRalf Baechle	select CSRC_R4K
5397cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
540377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
54127fdd325SYoichi Yuasa	select ARCH_REQUIRE_GPIOLIB
5425e83d430SRalf Baechle
543edb6310aSDaniel Lairdconfig NXP_STB220
544edb6310aSDaniel Laird	bool "NXP STB220 board"
545edb6310aSDaniel Laird	select SOC_PNX833X
546edb6310aSDaniel Laird	help
547edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
548edb6310aSDaniel Laird
549edb6310aSDaniel Lairdconfig NXP_STB225
550edb6310aSDaniel Laird	bool "NXP 225 board"
551edb6310aSDaniel Laird	select SOC_PNX833X
552edb6310aSDaniel Laird	select SOC_PNX8335
553edb6310aSDaniel Laird	help
554edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
555edb6310aSDaniel Laird
5569267a30dSMarc St-Jeanconfig PMC_MSP
5579267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
55839d30c13SAnoop P A	select CEVT_R4K
55939d30c13SAnoop P A	select CSRC_R4K
5609267a30dSMarc St-Jean	select DMA_NONCOHERENT
5619267a30dSMarc St-Jean	select SWAP_IO_SPACE
5629267a30dSMarc St-Jean	select NO_EXCEPT_FILL
5639267a30dSMarc St-Jean	select BOOT_RAW
5649267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
5659267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
5669267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
5679267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
568377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
56967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5709267a30dSMarc St-Jean	select SERIAL_8250
5719267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
5729296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
5739296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
5749267a30dSMarc St-Jean	help
5759267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
5769267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
5779267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
5789267a30dSMarc St-Jean	  a variety of MIPS cores.
5799267a30dSMarc St-Jean
580ae2b5bb6SJohn Crispinconfig RALINK
581ae2b5bb6SJohn Crispin	bool "Ralink based machines"
582ae2b5bb6SJohn Crispin	select CEVT_R4K
583ae2b5bb6SJohn Crispin	select CSRC_R4K
584ae2b5bb6SJohn Crispin	select BOOT_RAW
585ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
58667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
587ae2b5bb6SJohn Crispin	select USE_OF
588ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
589ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
590ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
591ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
592377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
593ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
594ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
5952a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
5962a153f1cSJohn Crispin	select RESET_CONTROLLER
597ae2b5bb6SJohn Crispin
5981da177e4SLinus Torvaldsconfig SGI_IP22
5993fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
6000e2794b0SRalf Baechle	select FW_ARC
6010e2794b0SRalf Baechle	select FW_ARC32
6021da177e4SLinus Torvalds	select BOOT_ELF32
60342f77542SRalf Baechle	select CEVT_R4K
604940f6b48SRalf Baechle	select CSRC_R4K
605e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
6061da177e4SLinus Torvalds	select DMA_NONCOHERENT
6075e83d430SRalf Baechle	select HW_HAS_EISA
608d865bea4SRalf Baechle	select I8253
60968de4803SThomas Bogendoerfer	select I8259
6101da177e4SLinus Torvalds	select IP22_CPU_SCACHE
61167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
612aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
613e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
614e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
61536e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
616e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
617e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
618e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
6191da177e4SLinus Torvalds	select SWAP_IO_SPACE
6207cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
6217cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
6222b5e63f6SMartin Michlmayr	#
6232b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6242b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6252b5e63f6SMartin Michlmayr	#
6262b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6272b5e63f6SMartin Michlmayr	# for a more details discussion
6282b5e63f6SMartin Michlmayr	#
6292b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
630ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
631ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6325e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
633930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6341da177e4SLinus Torvalds	help
6351da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
6361da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
6371da177e4SLinus Torvalds	  that runs on these, say Y here.
6381da177e4SLinus Torvalds
6391da177e4SLinus Torvaldsconfig SGI_IP27
6403fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
6410e2794b0SRalf Baechle	select FW_ARC
6420e2794b0SRalf Baechle	select FW_ARC64
6435e83d430SRalf Baechle	select BOOT_ELF64
644e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
645634286f1SRalf Baechle	select DMA_COHERENT
64636a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
6471da177e4SLinus Torvalds	select HW_HAS_PCI
648130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
6497cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
650ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6515e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
652d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
6531a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
654930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6551da177e4SLinus Torvalds	help
6561da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
6571da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
6581da177e4SLinus Torvalds	  here.
6591da177e4SLinus Torvalds
660e2defae5SThomas Bogendoerferconfig SGI_IP28
6617d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
6620e2794b0SRalf Baechle	select FW_ARC
6630e2794b0SRalf Baechle	select FW_ARC64
664e2defae5SThomas Bogendoerfer	select BOOT_ELF64
665e2defae5SThomas Bogendoerfer	select CEVT_R4K
666e2defae5SThomas Bogendoerfer	select CSRC_R4K
667e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
668e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
669e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
67067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
671e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
672e2defae5SThomas Bogendoerfer	select I8253
673e2defae5SThomas Bogendoerfer	select I8259
674e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
675e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6765b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
677e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
678e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
679e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
680e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
681e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6822b5e63f6SMartin Michlmayr	#
6832b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6842b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6852b5e63f6SMartin Michlmayr	#
6862b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6872b5e63f6SMartin Michlmayr	# for a more details discussion
6882b5e63f6SMartin Michlmayr	#
6892b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
690e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
691e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
692dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
693e2defae5SThomas Bogendoerfer      help
694e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
695e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
696e2defae5SThomas Bogendoerfer
6971da177e4SLinus Torvaldsconfig SGI_IP32
698cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
6990e2794b0SRalf Baechle	select FW_ARC
7000e2794b0SRalf Baechle	select FW_ARC32
7011da177e4SLinus Torvalds	select BOOT_ELF32
70242f77542SRalf Baechle	select CEVT_R4K
703940f6b48SRalf Baechle	select CSRC_R4K
7041da177e4SLinus Torvalds	select DMA_NONCOHERENT
7051da177e4SLinus Torvalds	select HW_HAS_PCI
70667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7071da177e4SLinus Torvalds	select R5000_CPU_SCACHE
7081da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
7097cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
7107cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
7117cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
712dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
713ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
7145e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7151da177e4SLinus Torvalds	help
7161da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
7171da177e4SLinus Torvalds
718ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
719ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
7205e83d430SRalf Baechle	select BOOT_ELF32
7215e83d430SRalf Baechle	select DMA_COHERENT
7225e83d430SRalf Baechle	select SIBYTE_BCM1120
7235e83d430SRalf Baechle	select SWAP_IO_SPACE
7247cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7255e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7265e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7275e83d430SRalf Baechle
728ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
729ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
7305e83d430SRalf Baechle	select BOOT_ELF32
7315e83d430SRalf Baechle	select DMA_COHERENT
7325e83d430SRalf Baechle	select SIBYTE_BCM1120
7335e83d430SRalf Baechle	select SWAP_IO_SPACE
7347cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7355e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7365e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7375e83d430SRalf Baechle
7385e83d430SRalf Baechleconfig SIBYTE_CRHONE
7393fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
7405e83d430SRalf Baechle	select BOOT_ELF32
7415e83d430SRalf Baechle	select DMA_COHERENT
7425e83d430SRalf Baechle	select SIBYTE_BCM1125
7435e83d430SRalf Baechle	select SWAP_IO_SPACE
7447cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7455e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7465e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7475e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7485e83d430SRalf Baechle
749ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
750ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
751ade299d8SYoichi Yuasa	select BOOT_ELF32
752ade299d8SYoichi Yuasa	select DMA_COHERENT
753ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
754ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
755ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
756ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
757ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
758ade299d8SYoichi Yuasa
759ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
760ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
761ade299d8SYoichi Yuasa	select BOOT_ELF32
762ade299d8SYoichi Yuasa	select DMA_COHERENT
763fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
764ade299d8SYoichi Yuasa	select SIBYTE_SB1250
765ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
766ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
767ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
768ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
769ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
770cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
771ade299d8SYoichi Yuasa
772ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
773ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
774ade299d8SYoichi Yuasa	select BOOT_ELF32
775ade299d8SYoichi Yuasa	select DMA_COHERENT
776fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
777ade299d8SYoichi Yuasa	select SIBYTE_SB1250
778ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
779ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
780ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
781ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
782ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
783ade299d8SYoichi Yuasa
784ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
785ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
786ade299d8SYoichi Yuasa	select BOOT_ELF32
787ade299d8SYoichi Yuasa	select DMA_COHERENT
788ade299d8SYoichi Yuasa	select SIBYTE_SB1250
789ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
790ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
791ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
792ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
793ade299d8SYoichi Yuasa
794ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
795ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
796ade299d8SYoichi Yuasa	select BOOT_ELF32
797ade299d8SYoichi Yuasa	select DMA_COHERENT
798ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
799ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
800ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
801ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
802ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
803651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
804ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
805cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
806ade299d8SYoichi Yuasa
80714b36af4SThomas Bogendoerferconfig SNI_RM
80814b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
8090e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
8100e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
811aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
8125e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
8135e83d430SRalf Baechle	select BOOT_ELF32
81442f77542SRalf Baechle	select CEVT_R4K
815940f6b48SRalf Baechle	select CSRC_R4K
816e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
8175e83d430SRalf Baechle	select DMA_NONCOHERENT
8185e83d430SRalf Baechle	select GENERIC_ISA_DMA
8198a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
8205e83d430SRalf Baechle	select HW_HAS_EISA
8215e83d430SRalf Baechle	select HW_HAS_PCI
82267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
823d865bea4SRalf Baechle	select I8253
8245e83d430SRalf Baechle	select I8259
8255e83d430SRalf Baechle	select ISA
8264a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
8277cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
8284a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
829c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
8304a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
83136a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
832ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
8337d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
8344a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
8355e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
8365e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8371da177e4SLinus Torvalds	help
83814b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
83914b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
8405e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
8415e83d430SRalf Baechle	  support this machine type.
8421da177e4SLinus Torvalds
843edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
844edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
8455e83d430SRalf Baechle
846edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
847edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
84823fbee9dSRalf Baechle
84973b4390fSRalf Baechleconfig MIKROTIK_RB532
85073b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
85173b4390fSRalf Baechle	select CEVT_R4K
85273b4390fSRalf Baechle	select CSRC_R4K
85373b4390fSRalf Baechle	select DMA_NONCOHERENT
85473b4390fSRalf Baechle	select HW_HAS_PCI
85567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
85673b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
85773b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
85873b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
85973b4390fSRalf Baechle	select SWAP_IO_SPACE
86073b4390fSRalf Baechle	select BOOT_RAW
861d888e25bSFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
862930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
86373b4390fSRalf Baechle	help
86473b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
86573b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
86673b4390fSRalf Baechle
8679ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
8689ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
869a86c7f72SDavid Daney	select CEVT_R4K
87034adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
871a86c7f72SDavid Daney	select DMA_COHERENT
872a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
873a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
874f65aad41SRalf Baechle	select EDAC_SUPPORT
875b01aec9bSBorislav Petkov	select EDAC_ATOMIC_SCRUB
87673569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
87773569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
878a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
8795e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
880a86c7f72SDavid Daney	select SWAP_IO_SPACE
881e8635b48SDavid Daney	select HW_HAS_PCI
882f00e001eSDavid Daney	select ZONE_DMA32
883465aaed0SDavid Daney	select HOLES_IN_ZONE
88499cab4bbSDavid Daney	select ARCH_REQUIRE_GPIOLIB
8856e511163SDavid Daney	select LIBFDT
8866e511163SDavid Daney	select USE_OF
8876e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
8886e511163SDavid Daney	select SYS_SUPPORTS_SMP
8896e511163SDavid Daney	select NR_CPUS_DEFAULT_16
890e326479fSAndrew Bresticker	select BUILTIN_DTB
8918c1e6b14SDavid Daney	select MTD_COMPLEX_MAPPINGS
892a86c7f72SDavid Daney	help
893a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
894a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
895a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
896a86c7f72SDavid Daney	  Some of the supported boards are:
897a86c7f72SDavid Daney		EBT3000
898a86c7f72SDavid Daney		EBH3000
899a86c7f72SDavid Daney		EBH3100
900a86c7f72SDavid Daney		Thunder
901a86c7f72SDavid Daney		Kodama
902a86c7f72SDavid Daney		Hikari
903a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
904a86c7f72SDavid Daney
9057f058e85SJayachandran Cconfig NLM_XLR_BOARD
9067f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
9077f058e85SJayachandran C	select BOOT_ELF32
9087f058e85SJayachandran C	select NLM_COMMON
9097f058e85SJayachandran C	select SYS_HAS_CPU_XLR
9107f058e85SJayachandran C	select SYS_SUPPORTS_SMP
9117f058e85SJayachandran C	select HW_HAS_PCI
9127f058e85SJayachandran C	select SWAP_IO_SPACE
9137f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9147f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
91534adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
9167f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9177f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9187f058e85SJayachandran C	select DMA_COHERENT
9197f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
9207f058e85SJayachandran C	select CEVT_R4K
9217f058e85SJayachandran C	select CSRC_R4K
92267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
923b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9247f058e85SJayachandran C	select SYNC_R4K
9257f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
9268f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9278f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9287f058e85SJayachandran C	help
9297f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
9307f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
9317f058e85SJayachandran C
9321c773ea4SJayachandran Cconfig NLM_XLP_BOARD
9331c773ea4SJayachandran C	bool "Netlogic XLP based systems"
9341c773ea4SJayachandran C	select BOOT_ELF32
9351c773ea4SJayachandran C	select NLM_COMMON
9361c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
9371c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
9381c773ea4SJayachandran C	select HW_HAS_PCI
9391c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9401c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
94134adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
942079e3160SKamlakant Patel	select ARCH_REQUIRE_GPIOLIB
9431c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9441c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
9451c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9461c773ea4SJayachandran C	select DMA_COHERENT
9471c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
9481c773ea4SJayachandran C	select CEVT_R4K
9491c773ea4SJayachandran C	select CSRC_R4K
95067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
951b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9521c773ea4SJayachandran C	select SYNC_R4K
9531c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
9542f6528e1SJayachandran C	select USE_OF
9558f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9568f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9571c773ea4SJayachandran C	help
9581c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
9591c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
9601c773ea4SJayachandran C
9619bc463beSDavid Daneyconfig MIPS_PARAVIRT
9629bc463beSDavid Daney	bool "Para-Virtualized guest system"
9639bc463beSDavid Daney	select CEVT_R4K
9649bc463beSDavid Daney	select CSRC_R4K
9659bc463beSDavid Daney	select DMA_COHERENT
9669bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
9679bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
9689bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
9699bc463beSDavid Daney	select SYS_SUPPORTS_SMP
9709bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
9719bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
9729bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
9739bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
9749bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
9759bc463beSDavid Daney	select HW_HAS_PCI
9769bc463beSDavid Daney	select SWAP_IO_SPACE
9779bc463beSDavid Daney	help
9789bc463beSDavid Daney	  This option supports guest running under ????
9799bc463beSDavid Daney
9801da177e4SLinus Torvaldsendchoice
9811da177e4SLinus Torvalds
982e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
9833b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
984d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
985a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
986e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
9878945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig"
9885e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
9895ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
9908ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
9911f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
9922572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig"
993af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig"
9940f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
995ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
99629c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
99738b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
99822b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
9995e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
1000a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
100130ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig"
100230ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig"
10037f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
1004ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
10059937f5ffSZubair Lutfullah Kakakhelsource "arch/mips/xilfpga/Kconfig"
100638b18f72SRalf Baechle
10075e83d430SRalf Baechleendmenu
10085e83d430SRalf Baechle
10091da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
10101da177e4SLinus Torvalds	bool
10111da177e4SLinus Torvalds	default y
10121da177e4SLinus Torvalds
10131da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
10141da177e4SLinus Torvalds	bool
10151da177e4SLinus Torvalds
1016f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
1017f0d1b0b3SDavid Howells	bool
1018f0d1b0b3SDavid Howells	default n
1019f0d1b0b3SDavid Howells
1020f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
1021f0d1b0b3SDavid Howells	bool
1022f0d1b0b3SDavid Howells	default n
1023f0d1b0b3SDavid Howells
10243c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
10253c9ee7efSAkinobu Mita	bool
10263c9ee7efSAkinobu Mita	default y
10273c9ee7efSAkinobu Mita
10281da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
10291da177e4SLinus Torvalds	bool
10301da177e4SLinus Torvalds	default y
10311da177e4SLinus Torvalds
1032ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
10331cc89038SAtsushi Nemoto	bool
10341cc89038SAtsushi Nemoto	default y
10351cc89038SAtsushi Nemoto
10361da177e4SLinus Torvalds#
10371da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
10381da177e4SLinus Torvalds#
10390e2794b0SRalf Baechleconfig FW_ARC
10401da177e4SLinus Torvalds	bool
10411da177e4SLinus Torvalds
104261ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
104361ed242dSRalf Baechle	bool
104461ed242dSRalf Baechle
10459267a30dSMarc St-Jeanconfig BOOT_RAW
10469267a30dSMarc St-Jean	bool
10479267a30dSMarc St-Jean
1048217dd11eSRalf Baechleconfig CEVT_BCM1480
1049217dd11eSRalf Baechle	bool
1050217dd11eSRalf Baechle
10516457d9fcSYoichi Yuasaconfig CEVT_DS1287
10526457d9fcSYoichi Yuasa	bool
10536457d9fcSYoichi Yuasa
10541097c6acSYoichi Yuasaconfig CEVT_GT641XX
10551097c6acSYoichi Yuasa	bool
10561097c6acSYoichi Yuasa
105742f77542SRalf Baechleconfig CEVT_R4K
105842f77542SRalf Baechle	bool
105942f77542SRalf Baechle
1060217dd11eSRalf Baechleconfig CEVT_SB1250
1061217dd11eSRalf Baechle	bool
1062217dd11eSRalf Baechle
1063229f773eSAtsushi Nemotoconfig CEVT_TXX9
1064229f773eSAtsushi Nemoto	bool
1065229f773eSAtsushi Nemoto
1066217dd11eSRalf Baechleconfig CSRC_BCM1480
1067217dd11eSRalf Baechle	bool
1068217dd11eSRalf Baechle
10694247417dSYoichi Yuasaconfig CSRC_IOASIC
10704247417dSYoichi Yuasa	bool
10714247417dSYoichi Yuasa
1072940f6b48SRalf Baechleconfig CSRC_R4K
1073940f6b48SRalf Baechle	bool
1074940f6b48SRalf Baechle
1075217dd11eSRalf Baechleconfig CSRC_SB1250
1076217dd11eSRalf Baechle	bool
1077217dd11eSRalf Baechle
1078a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL
1079a7f4df4eSAlex Smith	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1080a7f4df4eSAlex Smith
1081a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
10827444a72eSMichael Buesch	select ARCH_REQUIRE_GPIOLIB
1083a9aec7feSAtsushi Nemoto	bool
1084a9aec7feSAtsushi Nemoto
10850e2794b0SRalf Baechleconfig FW_CFE
1086df78b5c8SAurelien Jarno	bool
1087df78b5c8SAurelien Jarno
10884bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
108934adb28dSRalf Baechle	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
10904bafad92SFUJITA Tomonori
109140e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES
109240e084a5SRalf Baechle	bool
109340e084a5SRalf Baechle
1094885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1095885014bcSFelix Fietkau	select DMA_NONCOHERENT
1096885014bcSFelix Fietkau	bool
1097885014bcSFelix Fietkau
10981da177e4SLinus Torvaldsconfig DMA_COHERENT
10991da177e4SLinus Torvalds	bool
11001da177e4SLinus Torvalds
11011da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
11021da177e4SLinus Torvalds	bool
1103e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
11044ce588cdSRalf Baechle
1105e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
11064ce588cdSRalf Baechle	bool
11071da177e4SLinus Torvalds
110836a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
11091da177e4SLinus Torvalds	bool
11101da177e4SLinus Torvalds
1111dbb74540SRalf Baechleconfig HOTPLUG_CPU
11121b2bc75cSRalf Baechle	bool "Support for hot-pluggable CPUs"
111340b31360SStephen Rothwell	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
11141b2bc75cSRalf Baechle	help
11151b2bc75cSRalf Baechle	  Say Y here to allow turning CPUs off and on. CPUs can be
11161b2bc75cSRalf Baechle	  controlled through /sys/devices/system/cpu.
11171b2bc75cSRalf Baechle	  (Note: power management support will enable this option
11181b2bc75cSRalf Baechle	    automatically on SMP systems. )
11191b2bc75cSRalf Baechle	  Say N if you want to disable CPU hotplug.
11201b2bc75cSRalf Baechle
11211b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1122dbb74540SRalf Baechle	bool
1123dbb74540SRalf Baechle
11241da177e4SLinus Torvaldsconfig MIPS_BONITO64
11251da177e4SLinus Torvalds	bool
11261da177e4SLinus Torvalds
11271da177e4SLinus Torvaldsconfig MIPS_MSC
11281da177e4SLinus Torvalds	bool
11291da177e4SLinus Torvalds
11301f21d2bdSBrian Murphyconfig MIPS_NILE4
11311f21d2bdSBrian Murphy	bool
11321f21d2bdSBrian Murphy
113339b8d525SRalf Baechleconfig SYNC_R4K
113439b8d525SRalf Baechle	bool
113539b8d525SRalf Baechle
1136487d70d0SGabor Juhosconfig MIPS_MACHINE
1137487d70d0SGabor Juhos	def_bool n
1138487d70d0SGabor Juhos
1139ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1140d388d685SMaciej W. Rozycki	def_bool n
1141d388d685SMaciej W. Rozycki
11424e0748f5SMarkos Chandrasconfig GENERIC_CSUM
11434e0748f5SMarkos Chandras	bool
11444e0748f5SMarkos Chandras
11458313da30SRalf Baechleconfig GENERIC_ISA_DMA
11468313da30SRalf Baechle	bool
11478313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1148a35bee8aSNamhyung Kim	select ISA_DMA_API
11498313da30SRalf Baechle
1150aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1151aa414dffSRalf Baechle	bool
11528313da30SRalf Baechle	select GENERIC_ISA_DMA
1153aa414dffSRalf Baechle
1154a35bee8aSNamhyung Kimconfig ISA_DMA_API
1155a35bee8aSNamhyung Kim	bool
1156a35bee8aSNamhyung Kim
1157465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1158465aaed0SDavid Daney	bool
1159465aaed0SDavid Daney
11605e83d430SRalf Baechle#
11616b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
11625e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
11635e83d430SRalf Baechle# choice statement should be more obvious to the user.
11645e83d430SRalf Baechle#
11655e83d430SRalf Baechlechoice
11666b2aac42SMasanari Iida	prompt "Endianness selection"
11671da177e4SLinus Torvalds	help
11681da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
11695e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
11703cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
11715e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
11723dde6ad8SDavid Sterba	  one or the other endianness.
11735e83d430SRalf Baechle
11745e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
11755e83d430SRalf Baechle	bool "Big endian"
11765e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
11775e83d430SRalf Baechle
11785e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
11795e83d430SRalf Baechle	bool "Little endian"
11805e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
11815e83d430SRalf Baechle
11825e83d430SRalf Baechleendchoice
11835e83d430SRalf Baechle
118422b0763aSDavid Daneyconfig EXPORT_UASM
118522b0763aSDavid Daney	bool
118622b0763aSDavid Daney
11872116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
11882116245eSRalf Baechle	bool
11892116245eSRalf Baechle
11905e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
11915e83d430SRalf Baechle	bool
11925e83d430SRalf Baechle
11935e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
11945e83d430SRalf Baechle	bool
11951da177e4SLinus Torvalds
11969cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
11979cffd154SDavid Daney	bool
11989cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
11999cffd154SDavid Daney	default y
12009cffd154SDavid Daney
1201aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1202aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1203aa1762f4SDavid Daney
12041da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
12051da177e4SLinus Torvalds	bool
12061da177e4SLinus Torvalds
12079267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
12089267a30dSMarc St-Jean	bool
12099267a30dSMarc St-Jean
12109267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
12119267a30dSMarc St-Jean	bool
12129267a30dSMarc St-Jean
12138420fd00SAtsushi Nemotoconfig IRQ_TXX9
12148420fd00SAtsushi Nemoto	bool
12158420fd00SAtsushi Nemoto
1216d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1217d5ab1a69SYoichi Yuasa	bool
1218d5ab1a69SYoichi Yuasa
1219252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
12201da177e4SLinus Torvalds	bool
12211da177e4SLinus Torvalds
12229267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
12239267a30dSMarc St-Jean	bool
12249267a30dSMarc St-Jean
1225a83860c2SRalf Baechleconfig SOC_EMMA2RH
1226a83860c2SRalf Baechle	bool
1227a83860c2SRalf Baechle	select CEVT_R4K
1228a83860c2SRalf Baechle	select CSRC_R4K
1229a83860c2SRalf Baechle	select DMA_NONCOHERENT
123067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1231a83860c2SRalf Baechle	select SWAP_IO_SPACE
1232a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1233a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1234a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1235a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1236a83860c2SRalf Baechle
1237edb6310aSDaniel Lairdconfig SOC_PNX833X
1238edb6310aSDaniel Laird	bool
1239edb6310aSDaniel Laird	select CEVT_R4K
1240edb6310aSDaniel Laird	select CSRC_R4K
124167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1242edb6310aSDaniel Laird	select DMA_NONCOHERENT
1243edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1244edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1245edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1246edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1247377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1248edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1249edb6310aSDaniel Laird
1250edb6310aSDaniel Lairdconfig SOC_PNX8335
1251edb6310aSDaniel Laird	bool
1252edb6310aSDaniel Laird	select SOC_PNX833X
1253edb6310aSDaniel Laird
1254a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1255a7e07b1aSMarkos Chandras	bool
1256a7e07b1aSMarkos Chandras
12571da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
12581da177e4SLinus Torvalds	bool
12591da177e4SLinus Torvalds
1260e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1261e2defae5SThomas Bogendoerfer	bool
1262e2defae5SThomas Bogendoerfer
12635b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
12645b438c44SThomas Bogendoerfer	bool
12655b438c44SThomas Bogendoerfer
1266e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1267e2defae5SThomas Bogendoerfer	bool
1268e2defae5SThomas Bogendoerfer
1269e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1270e2defae5SThomas Bogendoerfer	bool
1271e2defae5SThomas Bogendoerfer
1272e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1273e2defae5SThomas Bogendoerfer	bool
1274e2defae5SThomas Bogendoerfer
1275e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1276e2defae5SThomas Bogendoerfer	bool
1277e2defae5SThomas Bogendoerfer
1278e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1279e2defae5SThomas Bogendoerfer	bool
1280e2defae5SThomas Bogendoerfer
12810e2794b0SRalf Baechleconfig FW_ARC32
12825e83d430SRalf Baechle	bool
12835e83d430SRalf Baechle
1284aaa9fad3SPaul Bolleconfig FW_SNIPROM
1285231a35d3SThomas Bogendoerfer	bool
1286231a35d3SThomas Bogendoerfer
12871da177e4SLinus Torvaldsconfig BOOT_ELF32
12881da177e4SLinus Torvalds	bool
12891da177e4SLinus Torvalds
1290930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1291930beb5aSFlorian Fainelli	bool
1292930beb5aSFlorian Fainelli
1293930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1294930beb5aSFlorian Fainelli	bool
1295930beb5aSFlorian Fainelli
1296930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1297930beb5aSFlorian Fainelli	bool
1298930beb5aSFlorian Fainelli
1299930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1300930beb5aSFlorian Fainelli	bool
1301930beb5aSFlorian Fainelli
13021da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
13031da177e4SLinus Torvalds	int
1304a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
13055432eeb6SKevin Cernekee	default "6" if MIPS_L1_CACHE_SHIFT_6
13065432eeb6SKevin Cernekee	default "5" if MIPS_L1_CACHE_SHIFT_5
13075432eeb6SKevin Cernekee	default "4" if MIPS_L1_CACHE_SHIFT_4
13081da177e4SLinus Torvalds	default "5"
13091da177e4SLinus Torvalds
13101da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
13111da177e4SLinus Torvalds	bool
13121da177e4SLinus Torvalds
13131da177e4SLinus Torvaldsconfig ARC_CONSOLE
13141da177e4SLinus Torvalds	bool "ARC console support"
1315e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
13161da177e4SLinus Torvalds
13171da177e4SLinus Torvaldsconfig ARC_MEMORY
13181da177e4SLinus Torvalds	bool
131914b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
13201da177e4SLinus Torvalds	default y
13211da177e4SLinus Torvalds
13221da177e4SLinus Torvaldsconfig ARC_PROMLIB
13231da177e4SLinus Torvalds	bool
1324e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
13251da177e4SLinus Torvalds	default y
13261da177e4SLinus Torvalds
13270e2794b0SRalf Baechleconfig FW_ARC64
13281da177e4SLinus Torvalds	bool
13291da177e4SLinus Torvalds
13301da177e4SLinus Torvaldsconfig BOOT_ELF64
13311da177e4SLinus Torvalds	bool
13321da177e4SLinus Torvalds
13331da177e4SLinus Torvaldsmenu "CPU selection"
13341da177e4SLinus Torvalds
13351da177e4SLinus Torvaldschoice
13361da177e4SLinus Torvalds	prompt "CPU type"
13371da177e4SLinus Torvalds	default CPU_R4X00
13381da177e4SLinus Torvalds
13390e476d91SHuacai Chenconfig CPU_LOONGSON3
13400e476d91SHuacai Chen	bool "Loongson 3 CPU"
13410e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
13420e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
13430e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
13440e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
13450e476d91SHuacai Chen	select WEAK_ORDERING
13460e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
1347cbfb3ea7SHuacai Chen	select ARCH_REQUIRE_GPIOLIB
13480e476d91SHuacai Chen	help
13490e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
13500e476d91SHuacai Chen		set with many extensions.
13510e476d91SHuacai Chen
13523702bba5SWu Zhangjinconfig CPU_LOONGSON2E
13533702bba5SWu Zhangjin	bool "Loongson 2E"
13543702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
13553702bba5SWu Zhangjin	select CPU_LOONGSON2
13562a21c730SFuxin Zhang	help
13572a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
13582a21c730SFuxin Zhang	  with many extensions.
13592a21c730SFuxin Zhang
136025985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
13616f7a251aSWu Zhangjin	  bonito64.
13626f7a251aSWu Zhangjin
13636f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
13646f7a251aSWu Zhangjin	bool "Loongson 2F"
13656f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
13666f7a251aSWu Zhangjin	select CPU_LOONGSON2
1367c197da91SArnaud Patard	select ARCH_REQUIRE_GPIOLIB
13686f7a251aSWu Zhangjin	help
13696f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
13706f7a251aSWu Zhangjin	  with many extensions.
13716f7a251aSWu Zhangjin
13726f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
13736f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
13746f7a251aSWu Zhangjin	  Loongson2E.
13756f7a251aSWu Zhangjin
1376ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1377ca585cf9SKelvin Cheung	bool "Loongson 1B"
1378ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1379ca585cf9SKelvin Cheung	select CPU_LOONGSON1
1380ca585cf9SKelvin Cheung	help
1381ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1382ca585cf9SKelvin Cheung	  release 2 instruction set.
1383ca585cf9SKelvin Cheung
13846e760c8dSRalf Baechleconfig CPU_MIPS32_R1
13856e760c8dSRalf Baechle	bool "MIPS32 Release 1"
13867cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
13876e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1388797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1389ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13906e760c8dSRalf Baechle	help
13915e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13921e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13931e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13941e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
13951e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13961e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
13971e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
13981e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
13991e5f1caaSRalf Baechle	  performance.
14001e5f1caaSRalf Baechle
14011e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
14021e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
14037cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
14041e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1405797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1406ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1407a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14082235a54dSSanjay Lal	select HAVE_KVM
14091e5f1caaSRalf Baechle	help
14105e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14116e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
14126e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
14136e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14146e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
14151da177e4SLinus Torvalds
14167fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
1417674d10e2SMarkos Chandras	bool "MIPS32 Release 6"
14187fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
14197fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14207fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14217fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14227fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14234e0748f5SMarkos Chandras	select GENERIC_CSUM
14247fd08ca5SLeonid Yegoshin	select HAVE_KVM
14257fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
14267fd08ca5SLeonid Yegoshin	help
14277fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14287fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
14297fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
14307fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
14317fd08ca5SLeonid Yegoshin
14326e760c8dSRalf Baechleconfig CPU_MIPS64_R1
14336e760c8dSRalf Baechle	bool "MIPS64 Release 1"
14347cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1435797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1436ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1437ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1438ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14399cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
14406e760c8dSRalf Baechle	help
14416e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
14426e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14436e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14446e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14456e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14461e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
14471e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
14481e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
14491e5f1caaSRalf Baechle	  performance.
14501e5f1caaSRalf Baechle
14511e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
14521e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
14537cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1454797798c1SRalf Baechle	select CPU_HAS_PREFETCH
14551e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
14561e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1457ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14589cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1459a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14601e5f1caaSRalf Baechle	help
14611e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14621e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14631e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14641e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
14651e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14661da177e4SLinus Torvalds
14677fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
1468674d10e2SMarkos Chandras	bool "MIPS64 Release 6"
14697fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
14707fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14717fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14727fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
14737fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14747fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14754e0748f5SMarkos Chandras	select GENERIC_CSUM
14764e9d324dSPaul Burton	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
14777fd08ca5SLeonid Yegoshin	help
14787fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14797fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
14807fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
14817fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
14827fd08ca5SLeonid Yegoshin
14831da177e4SLinus Torvaldsconfig CPU_R3000
14841da177e4SLinus Torvalds	bool "R3000"
14857cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1486f7062ddbSRalf Baechle	select CPU_HAS_WB
1487ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1488797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14891da177e4SLinus Torvalds	help
14901da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
14911da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
14921da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
14931da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
14941da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
14951da177e4SLinus Torvalds	  try to recompile with R3000.
14961da177e4SLinus Torvalds
14971da177e4SLinus Torvaldsconfig CPU_TX39XX
14981da177e4SLinus Torvalds	bool "R39XX"
14997cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1500ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
15011da177e4SLinus Torvalds
15021da177e4SLinus Torvaldsconfig CPU_VR41XX
15031da177e4SLinus Torvalds	bool "R41xx"
15047cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1505ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1506ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15071da177e4SLinus Torvalds	help
15085e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
15091da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
15101da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
15111da177e4SLinus Torvalds	  processor or vice versa.
15121da177e4SLinus Torvalds
15131da177e4SLinus Torvaldsconfig CPU_R4300
15141da177e4SLinus Torvalds	bool "R4300"
15157cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1516ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1517ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15181da177e4SLinus Torvalds	help
15191da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
15201da177e4SLinus Torvalds
15211da177e4SLinus Torvaldsconfig CPU_R4X00
15221da177e4SLinus Torvalds	bool "R4x00"
15237cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1524ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1525ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1526970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15271da177e4SLinus Torvalds	help
15281da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
15291da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
15301da177e4SLinus Torvalds
15311da177e4SLinus Torvaldsconfig CPU_TX49XX
15321da177e4SLinus Torvalds	bool "R49XX"
15337cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1534de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1535ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1536ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1537970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15381da177e4SLinus Torvalds
15391da177e4SLinus Torvaldsconfig CPU_R5000
15401da177e4SLinus Torvalds	bool "R5000"
15417cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1542ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1543ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1544970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15451da177e4SLinus Torvalds	help
15461da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
15471da177e4SLinus Torvalds
15481da177e4SLinus Torvaldsconfig CPU_R5432
15491da177e4SLinus Torvalds	bool "R5432"
15507cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
15515e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
15525e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1553970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15541da177e4SLinus Torvalds
1555542c1020SShinya Kuribayashiconfig CPU_R5500
1556542c1020SShinya Kuribayashi	bool "R5500"
1557542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1558542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1559542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
15609cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1561542c1020SShinya Kuribayashi	help
1562542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1563542c1020SShinya Kuribayashi	  instruction set.
1564542c1020SShinya Kuribayashi
15651da177e4SLinus Torvaldsconfig CPU_R6000
15661da177e4SLinus Torvalds	bool "R6000"
15677cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1568ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
15691da177e4SLinus Torvalds	help
15701da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1571c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
15721da177e4SLinus Torvalds
15731da177e4SLinus Torvaldsconfig CPU_NEVADA
15741da177e4SLinus Torvalds	bool "RM52xx"
15757cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1576ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1577ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1578970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15791da177e4SLinus Torvalds	help
15801da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
15811da177e4SLinus Torvalds
15821da177e4SLinus Torvaldsconfig CPU_R8000
15831da177e4SLinus Torvalds	bool "R8000"
15847cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
15855e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1586ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15871da177e4SLinus Torvalds	help
15881da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
15891da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
15901da177e4SLinus Torvalds
15911da177e4SLinus Torvaldsconfig CPU_R10000
15921da177e4SLinus Torvalds	bool "R10000"
15937cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
15945e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1595ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1596ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1597797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1598970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15991da177e4SLinus Torvalds	help
16001da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
16011da177e4SLinus Torvalds
16021da177e4SLinus Torvaldsconfig CPU_RM7000
16031da177e4SLinus Torvalds	bool "RM7000"
16047cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
16055e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1606ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1607ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1608797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1609970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16101da177e4SLinus Torvalds
16111da177e4SLinus Torvaldsconfig CPU_SB1
16121da177e4SLinus Torvalds	bool "SB1"
16137cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1614ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1615ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1616797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1617970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16180004a9dfSRalf Baechle	select WEAK_ORDERING
16191da177e4SLinus Torvalds
1620a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1621a86c7f72SDavid Daney	bool "Cavium Octeon processor"
16225e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1623a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1624a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1625a86c7f72SDavid Daney	select WEAK_ORDERING
1626a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
16279cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1628df115f3eSBen Hutchings	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1629df115f3eSBen Hutchings	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1630930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
1631a86c7f72SDavid Daney	help
1632a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1633a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1634a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1635a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1636a86c7f72SDavid Daney
1637cd746249SJonas Gorskiconfig CPU_BMIPS
1638cd746249SJonas Gorski	bool "Broadcom BMIPS"
1639cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1640cd746249SJonas Gorski	select CPU_MIPS32
1641fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1642cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1643cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1644cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1645cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1646cd746249SJonas Gorski	select DMA_NONCOHERENT
164767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1648cd746249SJonas Gorski	select SWAP_IO_SPACE
1649cd746249SJonas Gorski	select WEAK_ORDERING
1650c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
165169aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1652c1c0c461SKevin Cernekee	help
1653fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1654c1c0c461SKevin Cernekee
16557f058e85SJayachandran Cconfig CPU_XLR
16567f058e85SJayachandran C	bool "Netlogic XLR SoC"
16577f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
16587f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16597f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16607f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1661970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16627f058e85SJayachandran C	select WEAK_ORDERING
16637f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16647f058e85SJayachandran C	help
16657f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
16661c773ea4SJayachandran C
16671c773ea4SJayachandran Cconfig CPU_XLP
16681c773ea4SJayachandran C	bool "Netlogic XLP SoC"
16691c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
16701c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16711c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16721c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
16731c773ea4SJayachandran C	select WEAK_ORDERING
16741c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16751c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1676d6504846SJayachandran C	select CPU_MIPSR2
1677ddba6833SPrem Mallappa	select CPU_SUPPORTS_HUGEPAGES
16781c773ea4SJayachandran C	help
16791c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
16801da177e4SLinus Torvaldsendchoice
16811da177e4SLinus Torvalds
1682a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1683a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1684a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
16857fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1686a6e18781SLeonid Yegoshin	help
1687a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1688a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1689a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1690a6e18781SLeonid Yegoshin
1691a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1692a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1693a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1694a6e18781SLeonid Yegoshin	select EVA
1695a6e18781SLeonid Yegoshin	default y
1696a6e18781SLeonid Yegoshin	help
1697a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1698a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1699a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1700a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1701a6e18781SLeonid Yegoshin
1702c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES
1703c5b36783SSteven J. Hill	bool "MIPS32 Release 5 Features"
1704c5b36783SSteven J. Hill	depends on SYS_HAS_CPU_MIPS32_R5
1705c5b36783SSteven J. Hill	depends on CPU_MIPS32_R2
1706c5b36783SSteven J. Hill	help
1707c5b36783SSteven J. Hill	  Choose this option to build a kernel for release 2 or later of the
1708c5b36783SSteven J. Hill	  MIPS32 architecture including features from release 5 such as
1709c5b36783SSteven J. Hill	  support for Extended Physical Addressing (XPA).
1710c5b36783SSteven J. Hill
1711c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA
1712c5b36783SSteven J. Hill	bool "Extended Physical Addressing (XPA)"
1713c5b36783SSteven J. Hill	depends on CPU_MIPS32_R5_FEATURES
1714c5b36783SSteven J. Hill	depends on !EVA
1715c5b36783SSteven J. Hill	depends on !PAGE_SIZE_4KB
1716c5b36783SSteven J. Hill	depends on SYS_SUPPORTS_HIGHMEM
1717c5b36783SSteven J. Hill	select XPA
1718c5b36783SSteven J. Hill	select HIGHMEM
1719c5b36783SSteven J. Hill	select ARCH_PHYS_ADDR_T_64BIT
1720c5b36783SSteven J. Hill	default n
1721c5b36783SSteven J. Hill	help
1722c5b36783SSteven J. Hill	  Choose this option if you want to enable the Extended Physical
1723c5b36783SSteven J. Hill	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1724c5b36783SSteven J. Hill	  benefit is to increase physical addressing equal to or greater
1725c5b36783SSteven J. Hill	  than 40 bits. Note that this has the side effect of turning on
1726c5b36783SSteven J. Hill	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1727c5b36783SSteven J. Hill	  If unsure, say 'N' here.
1728c5b36783SSteven J. Hill
1729622844bfSWu Zhangjinif CPU_LOONGSON2F
1730622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1731622844bfSWu Zhangjin	bool
1732622844bfSWu Zhangjin
1733622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1734622844bfSWu Zhangjin	bool
1735622844bfSWu Zhangjin
1736622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1737622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1738622844bfSWu Zhangjin	default y
1739622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1740622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1741622844bfSWu Zhangjin	help
1742622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1743622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1744622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1745622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1746622844bfSWu Zhangjin
1747622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1748622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1749622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1750622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1751622844bfSWu Zhangjin	  systems.
1752622844bfSWu Zhangjin
1753622844bfSWu Zhangjin	  If unsure, please say Y.
1754622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1755622844bfSWu Zhangjin
17561b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
17571b93b3c3SWu Zhangjin	bool
17581b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
17591b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
176031c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
17611b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1762fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
17634e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
17641b93b3c3SWu Zhangjin
17651b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
17661b93b3c3SWu Zhangjin	bool
17671b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
17681b93b3c3SWu Zhangjin
1769dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM
1770dbb98314SAlban Bedel	bool
1771dbb98314SAlban Bedel	select SYS_SUPPORTS_ZBOOT
1772dbb98314SAlban Bedel
17733702bba5SWu Zhangjinconfig CPU_LOONGSON2
17743702bba5SWu Zhangjin	bool
17753702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
17763702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
17773702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1778970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17793702bba5SWu Zhangjin
1780ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1781ca585cf9SKelvin Cheung	bool
1782ca585cf9SKelvin Cheung	select CPU_MIPS32
1783ca585cf9SKelvin Cheung	select CPU_MIPSR2
1784ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1785ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1786ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1787f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1788ca585cf9SKelvin Cheung
1789fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
179004fa8bf7SJonas Gorski	select SMP_UP if SMP
17911bbb6c1bSKevin Cernekee	bool
1792cd746249SJonas Gorski
1793cd746249SJonas Gorskiconfig CPU_BMIPS4350
1794cd746249SJonas Gorski	bool
1795cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1796cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1797cd746249SJonas Gorski
1798cd746249SJonas Gorskiconfig CPU_BMIPS4380
1799cd746249SJonas Gorski	bool
1800bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1801cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1802cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1803cd746249SJonas Gorski
1804cd746249SJonas Gorskiconfig CPU_BMIPS5000
1805cd746249SJonas Gorski	bool
1806cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1807bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1808cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1809cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
18101bbb6c1bSKevin Cernekee
18110e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
18120e476d91SHuacai Chen	bool
18130e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
18140e476d91SHuacai Chen
18153702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
18162a21c730SFuxin Zhang	bool
18172a21c730SFuxin Zhang
18186f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
18196f7a251aSWu Zhangjin	bool
182055045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
182155045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
182222f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
18236f7a251aSWu Zhangjin
1824ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1825ca585cf9SKelvin Cheung	bool
1826ca585cf9SKelvin Cheung
18277cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
18287cf8053bSRalf Baechle	bool
18297cf8053bSRalf Baechle
18307cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
18317cf8053bSRalf Baechle	bool
18327cf8053bSRalf Baechle
1833a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1834a6e18781SLeonid Yegoshin	bool
1835a6e18781SLeonid Yegoshin
1836c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5
1837c5b36783SSteven J. Hill	bool
1838c5b36783SSteven J. Hill
18397fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
18407fd08ca5SLeonid Yegoshin	bool
18417fd08ca5SLeonid Yegoshin
18427cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
18437cf8053bSRalf Baechle	bool
18447cf8053bSRalf Baechle
18457cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
18467cf8053bSRalf Baechle	bool
18477cf8053bSRalf Baechle
18487fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
18497fd08ca5SLeonid Yegoshin	bool
18507fd08ca5SLeonid Yegoshin
18517cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
18527cf8053bSRalf Baechle	bool
18537cf8053bSRalf Baechle
18547cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
18557cf8053bSRalf Baechle	bool
18567cf8053bSRalf Baechle
18577cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
18587cf8053bSRalf Baechle	bool
18597cf8053bSRalf Baechle
18607cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
18617cf8053bSRalf Baechle	bool
18627cf8053bSRalf Baechle
18637cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
18647cf8053bSRalf Baechle	bool
18657cf8053bSRalf Baechle
18667cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
18677cf8053bSRalf Baechle	bool
18687cf8053bSRalf Baechle
18697cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
18707cf8053bSRalf Baechle	bool
18717cf8053bSRalf Baechle
18727cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
18737cf8053bSRalf Baechle	bool
18747cf8053bSRalf Baechle
1875542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1876542c1020SShinya Kuribayashi	bool
1877542c1020SShinya Kuribayashi
18787cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
18797cf8053bSRalf Baechle	bool
18807cf8053bSRalf Baechle
18817cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
18827cf8053bSRalf Baechle	bool
18837cf8053bSRalf Baechle
18847cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
18857cf8053bSRalf Baechle	bool
18867cf8053bSRalf Baechle
18877cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
18887cf8053bSRalf Baechle	bool
18897cf8053bSRalf Baechle
18907cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
18917cf8053bSRalf Baechle	bool
18927cf8053bSRalf Baechle
18937cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
18947cf8053bSRalf Baechle	bool
18957cf8053bSRalf Baechle
18965e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
18975e683389SDavid Daney	bool
18985e683389SDavid Daney
1899cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1900c1c0c461SKevin Cernekee	bool
1901c1c0c461SKevin Cernekee
1902fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1903c1c0c461SKevin Cernekee	bool
1904cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1905c1c0c461SKevin Cernekee
1906c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1907c1c0c461SKevin Cernekee	bool
1908cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1909c1c0c461SKevin Cernekee
1910c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1911c1c0c461SKevin Cernekee	bool
1912cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1913c1c0c461SKevin Cernekee
1914c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1915c1c0c461SKevin Cernekee	bool
1916cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1917c1c0c461SKevin Cernekee
19187f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
19197f058e85SJayachandran C	bool
19207f058e85SJayachandran C
19211c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
19221c773ea4SJayachandran C	bool
19231c773ea4SJayachandran C
1924b6911bbaSPaul Burtonconfig MIPS_MALTA_PM
1925b6911bbaSPaul Burton	depends on MIPS_MALTA
1926b6911bbaSPaul Burton	depends on PCI
1927b6911bbaSPaul Burton	bool
1928b6911bbaSPaul Burton	default y
1929b6911bbaSPaul Burton
193017099b11SRalf Baechle#
193117099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
193217099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
193317099b11SRalf Baechle#
19340004a9dfSRalf Baechleconfig WEAK_ORDERING
19350004a9dfSRalf Baechle	bool
193617099b11SRalf Baechle
193717099b11SRalf Baechle#
193817099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
193917099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
194017099b11SRalf Baechle#
194117099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
194217099b11SRalf Baechle	bool
19435e83d430SRalf Baechleendmenu
19445e83d430SRalf Baechle
19455e83d430SRalf Baechle#
19465e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
19475e83d430SRalf Baechle#
19485e83d430SRalf Baechleconfig CPU_MIPS32
19495e83d430SRalf Baechle	bool
19507fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
19515e83d430SRalf Baechle
19525e83d430SRalf Baechleconfig CPU_MIPS64
19535e83d430SRalf Baechle	bool
19547fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
19555e83d430SRalf Baechle
19565e83d430SRalf Baechle#
1957c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
19585e83d430SRalf Baechle#
19595e83d430SRalf Baechleconfig CPU_MIPSR1
19605e83d430SRalf Baechle	bool
19615e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
19625e83d430SRalf Baechle
19635e83d430SRalf Baechleconfig CPU_MIPSR2
19645e83d430SRalf Baechle	bool
1965a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1966a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19675e83d430SRalf Baechle
19687fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
19697fd08ca5SLeonid Yegoshin	bool
19707fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1971a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19725e83d430SRalf Baechle
1973a6e18781SLeonid Yegoshinconfig EVA
1974a6e18781SLeonid Yegoshin	bool
1975a6e18781SLeonid Yegoshin
1976c5b36783SSteven J. Hillconfig XPA
1977c5b36783SSteven J. Hill	bool
1978c5b36783SSteven J. Hill
19795e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
19805e83d430SRalf Baechle	bool
19815e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
19825e83d430SRalf Baechle	bool
19835e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
19845e83d430SRalf Baechle	bool
19855e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
19865e83d430SRalf Baechle	bool
198755045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
198855045ff5SWu Zhangjin	bool
198955045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
199055045ff5SWu Zhangjin	bool
19919cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
19929cffd154SDavid Daney	bool
199322f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
199422f1fdfdSWu Zhangjin	bool
199582622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
199682622284SDavid Daney	bool
1997d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
19985e83d430SRalf Baechle
19998192c9eaSDavid Daney#
20008192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
20018192c9eaSDavid Daney#
20028192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
20038192c9eaSDavid Daney       bool
2004679eb637SJames Hogan       default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
20058192c9eaSDavid Daney
20065e83d430SRalf Baechlemenu "Kernel type"
20075e83d430SRalf Baechle
20085e83d430SRalf Baechlechoice
20095e83d430SRalf Baechle	prompt "Kernel code model"
20105e83d430SRalf Baechle	help
20115e83d430SRalf Baechle	  You should only select this option if you have a workload that
20125e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
20135e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
20145e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
20155e83d430SRalf Baechle
20165e83d430SRalf Baechleconfig 32BIT
20175e83d430SRalf Baechle	bool "32-bit kernel"
20185e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
20195e83d430SRalf Baechle	select TRAD_SIGNALS
20205e83d430SRalf Baechle	help
20215e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
2022f17c4ca3SRalf Baechle
20235e83d430SRalf Baechleconfig 64BIT
20245e83d430SRalf Baechle	bool "64-bit kernel"
20255e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
20265e83d430SRalf Baechle	help
20275e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
20285e83d430SRalf Baechle
20295e83d430SRalf Baechleendchoice
20305e83d430SRalf Baechle
20312235a54dSSanjay Lalconfig KVM_GUEST
20322235a54dSSanjay Lal	bool "KVM Guest Kernel"
2033f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
20342235a54dSSanjay Lal	help
2035caa1faa7SJames Hogan	  Select this option if building a guest kernel for KVM (Trap & Emulate)
2036caa1faa7SJames Hogan	  mode.
20372235a54dSSanjay Lal
2038eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
2039eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
20402235a54dSSanjay Lal	depends on KVM_GUEST
2041eda3d33cSJames Hogan	default 100
20422235a54dSSanjay Lal	help
2043eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
2044eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
2045eda3d33cSJames Hogan	  timer frequency is specified directly.
20462235a54dSSanjay Lal
20471da177e4SLinus Torvaldschoice
20481da177e4SLinus Torvalds	prompt "Kernel page size"
20491da177e4SLinus Torvalds	default PAGE_SIZE_4KB
20501da177e4SLinus Torvalds
20511da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
20521da177e4SLinus Torvalds	bool "4kB"
20530e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
20541da177e4SLinus Torvalds	help
20551da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
20561da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
20571da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
20581da177e4SLinus Torvalds	 recommended for low memory systems.
20591da177e4SLinus Torvalds
20601da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
20611da177e4SLinus Torvalds	bool "8kB"
20627d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
20631da177e4SLinus Torvalds	help
20641da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
20651da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
2066c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
2067c52399beSRalf Baechle	  suitable Linux distribution to support this.
20681da177e4SLinus Torvalds
20691da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
20701da177e4SLinus Torvalds	bool "16kB"
2071714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
20721da177e4SLinus Torvalds	help
20731da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
20741da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
2075714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
2076714bfad6SRalf Baechle	  Linux distribution to support this.
20771da177e4SLinus Torvalds
2078c52399beSRalf Baechleconfig PAGE_SIZE_32KB
2079c52399beSRalf Baechle	bool "32kB"
2080c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
2081c52399beSRalf Baechle	help
2082c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
2083c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
2084c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
2085c52399beSRalf Baechle	  distribution to support this.
2086c52399beSRalf Baechle
20871da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
20881da177e4SLinus Torvalds	bool "64kB"
208974c81ecdSRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
20901da177e4SLinus Torvalds	help
20911da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
20921da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
20931da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
2094714bfad6SRalf Baechle	  writing this option is still high experimental.
20951da177e4SLinus Torvalds
20961da177e4SLinus Torvaldsendchoice
20971da177e4SLinus Torvalds
2098c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
2099c9bace7cSDavid Daney	int "Maximum zone order"
2100e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2101e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2102e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2103e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2104e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2105e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2106c9bace7cSDavid Daney	range 11 64
2107c9bace7cSDavid Daney	default "11"
2108c9bace7cSDavid Daney	help
2109c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
2110c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
2111c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
2112c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2113c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2114c9bace7cSDavid Daney	  increase this value.
2115c9bace7cSDavid Daney
2116c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2117c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2118c9bace7cSDavid Daney
2119c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2120c9bace7cSDavid Daney	  when choosing a value for this option.
2121c9bace7cSDavid Daney
21221da177e4SLinus Torvaldsconfig BOARD_SCACHE
21231da177e4SLinus Torvalds	bool
21241da177e4SLinus Torvalds
21251da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
21261da177e4SLinus Torvalds	bool
21271da177e4SLinus Torvalds	select BOARD_SCACHE
21281da177e4SLinus Torvalds
21299318c51aSChris Dearman#
21309318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
21319318c51aSChris Dearman#
21329318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
21339318c51aSChris Dearman	bool
21349318c51aSChris Dearman	select BOARD_SCACHE
21359318c51aSChris Dearman
21361da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
21371da177e4SLinus Torvalds	bool
21381da177e4SLinus Torvalds	select BOARD_SCACHE
21391da177e4SLinus Torvalds
21401da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
21411da177e4SLinus Torvalds	bool
21421da177e4SLinus Torvalds	select BOARD_SCACHE
21431da177e4SLinus Torvalds
21441da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
21451da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
21461da177e4SLinus Torvalds	depends on CPU_SB1
21471da177e4SLinus Torvalds	help
21481da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
21491da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
21501da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
21511da177e4SLinus Torvalds
21521da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2153c8094b53SRalf Baechle	bool
21541da177e4SLinus Torvalds
21553165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
21563165c846SFlorian Fainelli	bool
21573165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
21583165c846SFlorian Fainelli
215991405eb6SFlorian Fainelliconfig CPU_R4K_FPU
216091405eb6SFlorian Fainelli	bool
216191405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
216291405eb6SFlorian Fainelli
216362cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
216462cedc4fSFlorian Fainelli	bool
216562cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
216662cedc4fSFlorian Fainelli
216759d6ab86SRalf Baechleconfig MIPS_MT_SMP
2168a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
21695676319cSMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
217059d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2171d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2172c080faa5SSteven J. Hill	select SYNC_R4K
217359d6ab86SRalf Baechle	select MIPS_MT
217459d6ab86SRalf Baechle	select SMP
217587353d8aSRalf Baechle	select SMP_UP
2176c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2177c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2178399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
217959d6ab86SRalf Baechle	help
2180c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2181c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2182c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2183c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2184c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
218559d6ab86SRalf Baechle
2186f41ae0b2SRalf Baechleconfig MIPS_MT
2187f41ae0b2SRalf Baechle	bool
2188f41ae0b2SRalf Baechle
21890ab7aefcSRalf Baechleconfig SCHED_SMT
21900ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
21910ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
21920ab7aefcSRalf Baechle	default n
21930ab7aefcSRalf Baechle	help
21940ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
21950ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
21960ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
21970ab7aefcSRalf Baechle
21980ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
21990ab7aefcSRalf Baechle	bool
22000ab7aefcSRalf Baechle
2201f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2202f41ae0b2SRalf Baechle	bool
2203f41ae0b2SRalf Baechle
2204f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2205f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2206f088fc84SRalf Baechle	default y
2207b633648cSRalf Baechle	depends on MIPS_MT_SMP
220807cc0c9eSRalf Baechle
2209b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2210b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
2211b0a668fbSLeonid Yegoshin	depends on CPU_MIPSR6 && !SMP
2212b0a668fbSLeonid Yegoshin	default y
2213b0a668fbSLeonid Yegoshin	help
2214b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2215b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
221607edf0d4SMarkos Chandras	  default. You can enable it using the 'mipsr2emu' kernel option.
2217b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2218b0a668fbSLeonid Yegoshin	  final kernel image.
2219b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels"
2220b0a668fbSLeonid Yegoshin	depends on SMP && CPU_MIPSR6
2221b0a668fbSLeonid Yegoshin
222207cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
222307cc0c9eSRalf Baechle	bool "VPE loader support."
2224704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
222507cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
222607cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
222707cc0c9eSRalf Baechle	select MIPS_MT
222807cc0c9eSRalf Baechle	help
222907cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
223007cc0c9eSRalf Baechle	  onto another VPE and running it.
2231f088fc84SRalf Baechle
223217a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
223317a1d523SDeng-Cheng Zhu	bool
223417a1d523SDeng-Cheng Zhu	default "y"
223517a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
223617a1d523SDeng-Cheng Zhu
22371a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
22381a2a6d7eSDeng-Cheng Zhu	bool
22391a2a6d7eSDeng-Cheng Zhu	default "y"
22401a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
22411a2a6d7eSDeng-Cheng Zhu
2242e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2243e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2244e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2245e01402b1SRalf Baechle	default y
2246e01402b1SRalf Baechle	help
2247e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2248e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2249e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2250e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2251e01402b1SRalf Baechle
2252e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2253e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2254e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
22555e83d430SRalf Baechle	help
2256e01402b1SRalf Baechle
2257da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2258da615cf6SDeng-Cheng Zhu	bool
2259da615cf6SDeng-Cheng Zhu	default "y"
2260da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2261da615cf6SDeng-Cheng Zhu
22622c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
22632c973ef0SDeng-Cheng Zhu	bool
22642c973ef0SDeng-Cheng Zhu	default "y"
22652c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
22662c973ef0SDeng-Cheng Zhu
22674a16ff4cSRalf Baechleconfig MIPS_CMP
22685cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
22695676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2270b10b43baSMarkos Chandras	select SMP
2271eb9b5141STim Anderson	select SYNC_R4K
2272b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
22734a16ff4cSRalf Baechle	select WEAK_ORDERING
22744a16ff4cSRalf Baechle	default n
22754a16ff4cSRalf Baechle	help
2276044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2277044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2278044505c7SPaul Burton	  its ability to start secondary CPUs.
22794a16ff4cSRalf Baechle
22805cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
22815cac93b3SPaul Burton	  instead of this.
22825cac93b3SPaul Burton
22830ee958e1SPaul Burtonconfig MIPS_CPS
22840ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
22855676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CPS && !CPU_MIPSR6
22860ee958e1SPaul Burton	select MIPS_CM
22870ee958e1SPaul Burton	select MIPS_CPC
22881d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
22890ee958e1SPaul Burton	select SMP
22900ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
22911d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
22920ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
22930ee958e1SPaul Burton	select WEAK_ORDERING
22940ee958e1SPaul Burton	help
22950ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
22960ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
22970ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
22980ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
22990ee958e1SPaul Burton	  support is unavailable.
23000ee958e1SPaul Burton
23013179d37eSPaul Burtonconfig MIPS_CPS_PM
230239a59593SMarkos Chandras	depends on MIPS_CPS
2303a8b84677SPaul Burton	select MIPS_CPC
23043179d37eSPaul Burton	bool
23053179d37eSPaul Burton
23069f98f3ddSPaul Burtonconfig MIPS_CM
23079f98f3ddSPaul Burton	bool
23089f98f3ddSPaul Burton
23099c38cf44SPaul Burtonconfig MIPS_CPC
23109c38cf44SPaul Burton	bool
23112600990eSRalf Baechle
23121da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
23131da177e4SLinus Torvalds	bool
23141da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
23151da177e4SLinus Torvalds	default y
23161da177e4SLinus Torvalds
23171da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
23181da177e4SLinus Torvalds	bool
23191da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
23201da177e4SLinus Torvalds	default y
23211da177e4SLinus Torvalds
23222235a54dSSanjay Lal
232360ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
232434adb28dSRalf Baechle       bool
232560ec6571Spascal@pabr.org
23269e2b5372SMarkos Chandraschoice
23279e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
23289e2b5372SMarkos Chandras
23299e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
23309e2b5372SMarkos Chandras	bool "None"
23319e2b5372SMarkos Chandras	help
23329e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
23339e2b5372SMarkos Chandras
23349693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
23359693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
23369e2b5372SMarkos Chandras	bool "SmartMIPS"
23379693a853SFranck Bui-Huu	help
23389693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
23399693a853SFranck Bui-Huu	  increased security at both hardware and software level for
23409693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
23419693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
23429693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
23439693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
23449693a853SFranck Bui-Huu	  here.
23459693a853SFranck Bui-Huu
2346bce86083SSteven J. Hillconfig CPU_MICROMIPS
23477fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
23489e2b5372SMarkos Chandras	bool "microMIPS"
2349bce86083SSteven J. Hill	help
2350bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2351bce86083SSteven J. Hill	  microMIPS ISA
2352bce86083SSteven J. Hill
23539e2b5372SMarkos Chandrasendchoice
23549e2b5372SMarkos Chandras
2355a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
23560ce3417eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2357a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
23582a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2359a5e9a69eSPaul Burton	help
2360a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2361a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
23621db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
23631db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
23641db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
23651db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
23661db1af84SPaul Burton	  the size & complexity of your kernel.
2367a5e9a69eSPaul Burton
2368a5e9a69eSPaul Burton	  If unsure, say Y.
2369a5e9a69eSPaul Burton
23701da177e4SLinus Torvaldsconfig CPU_HAS_WB
2371f7062ddbSRalf Baechle	bool
2372e01402b1SRalf Baechle
2373df0ac8a4SKevin Cernekeeconfig XKS01
2374df0ac8a4SKevin Cernekee	bool
2375df0ac8a4SKevin Cernekee
2376f41ae0b2SRalf Baechle#
2377f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2378f41ae0b2SRalf Baechle#
2379e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2380f41ae0b2SRalf Baechle	bool
2381e01402b1SRalf Baechle
2382f41ae0b2SRalf Baechle#
2383f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2384f41ae0b2SRalf Baechle#
2385e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2386f41ae0b2SRalf Baechle	bool
2387e01402b1SRalf Baechle
23881da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
23891da177e4SLinus Torvalds	bool
23901da177e4SLinus Torvalds	depends on !CPU_R3000
23911da177e4SLinus Torvalds	default y
23921da177e4SLinus Torvalds
23931da177e4SLinus Torvalds#
239420d60d99SMaciej W. Rozycki# CPU non-features
239520d60d99SMaciej W. Rozycki#
239620d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
239720d60d99SMaciej W. Rozycki	bool
239820d60d99SMaciej W. Rozycki
239920d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
240020d60d99SMaciej W. Rozycki	bool
240120d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
240220d60d99SMaciej W. Rozycki
240320d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
240420d60d99SMaciej W. Rozycki	bool
240520d60d99SMaciej W. Rozycki
240620d60d99SMaciej W. Rozycki#
24071da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
24081da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
24091da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
24101da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
24111da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
24121da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
24131da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
24141da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2415797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2416797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2417797798c1SRalf Baechle#   support.
24181da177e4SLinus Torvalds#
24191da177e4SLinus Torvaldsconfig HIGHMEM
24201da177e4SLinus Torvalds	bool "High Memory Support"
2421a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2422797798c1SRalf Baechle
2423797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2424797798c1SRalf Baechle	bool
2425797798c1SRalf Baechle
2426797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2427797798c1SRalf Baechle	bool
24281da177e4SLinus Torvalds
24299693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
24309693a853SFranck Bui-Huu	bool
24319693a853SFranck Bui-Huu
2432a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2433a6a4834cSSteven J. Hill	bool
2434a6a4834cSSteven J. Hill
2435377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2436377cb1b6SRalf Baechle	bool
2437377cb1b6SRalf Baechle	help
2438377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2439377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2440377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2441377cb1b6SRalf Baechle
2442a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2443a5e9a69eSPaul Burton	bool
2444a5e9a69eSPaul Burton
2445b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2446b4819b59SYoichi Yuasa	def_bool y
2447f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2448b4819b59SYoichi Yuasa
2449d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2450d8cb4e11SRalf Baechle	bool
2451d8cb4e11SRalf Baechle	default y if SGI_IP27
2452d8cb4e11SRalf Baechle	help
24533dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2454d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2455d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2456d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2457d8cb4e11SRalf Baechle
2458b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2459b1c6cd42SAtsushi Nemoto	bool
24607de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
246131473747SAtsushi Nemoto
2462d8cb4e11SRalf Baechleconfig NUMA
2463d8cb4e11SRalf Baechle	bool "NUMA Support"
2464d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2465d8cb4e11SRalf Baechle	help
2466d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2467d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2468d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2469d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2470d8cb4e11SRalf Baechle	  disabled.
2471d8cb4e11SRalf Baechle
2472d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2473d8cb4e11SRalf Baechle	bool
2474d8cb4e11SRalf Baechle
2475c80d79d7SYasunori Gotoconfig NODES_SHIFT
2476c80d79d7SYasunori Goto	int
2477c80d79d7SYasunori Goto	default "6"
2478c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2479c80d79d7SYasunori Goto
248014f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
248114f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
2482f14ceff7SHuacai Chen	depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
248314f70012SDeng-Cheng Zhu	default y
248414f70012SDeng-Cheng Zhu	help
248514f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
248614f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
248714f70012SDeng-Cheng Zhu
2488b4819b59SYoichi Yuasasource "mm/Kconfig"
2489b4819b59SYoichi Yuasa
24901da177e4SLinus Torvaldsconfig SMP
24911da177e4SLinus Torvalds	bool "Multi-Processing support"
2492e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2493e73ea273SRalf Baechle	help
24941da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
24954a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
24964a474157SRobert Graffham	  than one CPU, say Y.
24971da177e4SLinus Torvalds
24984a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
24991da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
25001da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
25014a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
25021da177e4SLinus Torvalds	  will run faster if you say N here.
25031da177e4SLinus Torvalds
25041da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
25051da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
25061da177e4SLinus Torvalds
250703502faaSAdrian Bunk	  See also the SMP-HOWTO available at
250803502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
25091da177e4SLinus Torvalds
25101da177e4SLinus Torvalds	  If you don't know what to do here, say N.
25111da177e4SLinus Torvalds
251287353d8aSRalf Baechleconfig SMP_UP
251387353d8aSRalf Baechle	bool
251487353d8aSRalf Baechle
25154a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
25164a16ff4cSRalf Baechle	bool
25174a16ff4cSRalf Baechle
25180ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
25190ee958e1SPaul Burton	bool
25200ee958e1SPaul Burton
2521e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2522e73ea273SRalf Baechle	bool
2523e73ea273SRalf Baechle
2524130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2525130e2fb7SRalf Baechle	bool
2526130e2fb7SRalf Baechle
2527130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2528130e2fb7SRalf Baechle	bool
2529130e2fb7SRalf Baechle
2530130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2531130e2fb7SRalf Baechle	bool
2532130e2fb7SRalf Baechle
2533130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2534130e2fb7SRalf Baechle	bool
2535130e2fb7SRalf Baechle
2536130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2537130e2fb7SRalf Baechle	bool
2538130e2fb7SRalf Baechle
25391da177e4SLinus Torvaldsconfig NR_CPUS
2540a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2541a91796a9SJayachandran C	range 2 256
25421da177e4SLinus Torvalds	depends on SMP
2543130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2544130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2545130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2546130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2547130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
25481da177e4SLinus Torvalds	help
25491da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
25501da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
25511da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
255272ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
255372ede9b1SAtsushi Nemoto	  and 2 for all others.
25541da177e4SLinus Torvalds
25551da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
255672ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
255772ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
255872ede9b1SAtsushi Nemoto	  power of two.
25591da177e4SLinus Torvalds
2560399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2561399aaa25SAl Cooper	bool
2562399aaa25SAl Cooper
25631723b4a3SAtsushi Nemoto#
25641723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
25651723b4a3SAtsushi Nemoto#
25661723b4a3SAtsushi Nemoto
25671723b4a3SAtsushi Nemotochoice
25681723b4a3SAtsushi Nemoto	prompt "Timer frequency"
25691723b4a3SAtsushi Nemoto	default HZ_250
25701723b4a3SAtsushi Nemoto	help
25711723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
25721723b4a3SAtsushi Nemoto
257367596573SPaul Burton	config HZ_24
257467596573SPaul Burton		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
257567596573SPaul Burton
25761723b4a3SAtsushi Nemoto	config HZ_48
25770f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
25781723b4a3SAtsushi Nemoto
25791723b4a3SAtsushi Nemoto	config HZ_100
25801723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
25811723b4a3SAtsushi Nemoto
25821723b4a3SAtsushi Nemoto	config HZ_128
25831723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
25841723b4a3SAtsushi Nemoto
25851723b4a3SAtsushi Nemoto	config HZ_250
25861723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
25871723b4a3SAtsushi Nemoto
25881723b4a3SAtsushi Nemoto	config HZ_256
25891723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
25901723b4a3SAtsushi Nemoto
25911723b4a3SAtsushi Nemoto	config HZ_1000
25921723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
25931723b4a3SAtsushi Nemoto
25941723b4a3SAtsushi Nemoto	config HZ_1024
25951723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
25961723b4a3SAtsushi Nemoto
25971723b4a3SAtsushi Nemotoendchoice
25981723b4a3SAtsushi Nemoto
259967596573SPaul Burtonconfig SYS_SUPPORTS_24HZ
260067596573SPaul Burton	bool
260167596573SPaul Burton
26021723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
26031723b4a3SAtsushi Nemoto	bool
26041723b4a3SAtsushi Nemoto
26051723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
26061723b4a3SAtsushi Nemoto	bool
26071723b4a3SAtsushi Nemoto
26081723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
26091723b4a3SAtsushi Nemoto	bool
26101723b4a3SAtsushi Nemoto
26111723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
26121723b4a3SAtsushi Nemoto	bool
26131723b4a3SAtsushi Nemoto
26141723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
26151723b4a3SAtsushi Nemoto	bool
26161723b4a3SAtsushi Nemoto
26171723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
26181723b4a3SAtsushi Nemoto	bool
26191723b4a3SAtsushi Nemoto
26201723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
26211723b4a3SAtsushi Nemoto	bool
26221723b4a3SAtsushi Nemoto
26231723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
26241723b4a3SAtsushi Nemoto	bool
262567596573SPaul Burton	default y if !SYS_SUPPORTS_24HZ && \
262667596573SPaul Burton		     !SYS_SUPPORTS_48HZ && \
262767596573SPaul Burton		     !SYS_SUPPORTS_100HZ && \
262867596573SPaul Burton		     !SYS_SUPPORTS_128HZ && \
262967596573SPaul Burton		     !SYS_SUPPORTS_250HZ && \
263067596573SPaul Burton		     !SYS_SUPPORTS_256HZ && \
263167596573SPaul Burton		     !SYS_SUPPORTS_1000HZ && \
26321723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
26331723b4a3SAtsushi Nemoto
26341723b4a3SAtsushi Nemotoconfig HZ
26351723b4a3SAtsushi Nemoto	int
263667596573SPaul Burton	default 24 if HZ_24
26371723b4a3SAtsushi Nemoto	default 48 if HZ_48
26381723b4a3SAtsushi Nemoto	default 100 if HZ_100
26391723b4a3SAtsushi Nemoto	default 128 if HZ_128
26401723b4a3SAtsushi Nemoto	default 250 if HZ_250
26411723b4a3SAtsushi Nemoto	default 256 if HZ_256
26421723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
26431723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
26441723b4a3SAtsushi Nemoto
264596685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
264696685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
264796685b17SDeng-Cheng Zhu
2648e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
26491da177e4SLinus Torvalds
2650ea6e942bSAtsushi Nemotoconfig KEXEC
26517d60717eSKees Cook	bool "Kexec system call"
26522965faa5SDave Young	select KEXEC_CORE
2653ea6e942bSAtsushi Nemoto	help
2654ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2655ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
26563dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2657ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2658ea6e942bSAtsushi Nemoto
265901dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2660ea6e942bSAtsushi Nemoto
2661ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2662ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2663bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2664bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2665bf220695SGeert Uytterhoeven	  made.
2666ea6e942bSAtsushi Nemoto
26677aa1c8f4SRalf Baechleconfig CRASH_DUMP
26687aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
26697aa1c8f4SRalf Baechle	  help
26707aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
26717aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
26727aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
26737aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
26747aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
26757aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
26767aa1c8f4SRalf Baechle	  PHYSICAL_START.
26777aa1c8f4SRalf Baechle
26787aa1c8f4SRalf Baechleconfig PHYSICAL_START
26797aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
26807aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
26817aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
26827aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
26837aa1c8f4SRalf Baechle	  help
26847aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
26857aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
26867aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
26877aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
26887aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
26897aa1c8f4SRalf Baechle
2690ea6e942bSAtsushi Nemotoconfig SECCOMP
2691ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2692293c5bd1SRalf Baechle	depends on PROC_FS
2693ea6e942bSAtsushi Nemoto	default y
2694ea6e942bSAtsushi Nemoto	help
2695ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2696ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2697ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2698ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2699ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2700ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2701ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2702ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2703ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2704ea6e942bSAtsushi Nemoto
2705ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2706ea6e942bSAtsushi Nemoto
2707597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
27080ce3417eSPaul Burton	bool "Support for O32 binaries using 64-bit FP"
2709597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2710597ce172SPaul Burton	help
2711597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2712597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2713597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2714597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2715597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2716597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2717597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2718597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2719597ce172SPaul Burton	  saying N here.
2720597ce172SPaul Burton
272106e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
272206e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
272306e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
272406e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
272506e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
272606e2e882SPaul Burton	  said details.
272706e2e882SPaul Burton
272806e2e882SPaul Burton	  If unsure, say N.
2729597ce172SPaul Burton
2730f2ffa5abSDezhong Diaoconfig USE_OF
27310b3e06fdSJonas Gorski	bool
2732f2ffa5abSDezhong Diao	select OF
2733e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2734abd2363fSGrant Likely	select IRQ_DOMAIN
2735f2ffa5abSDezhong Diao
27367fafb068SAndrew Brestickerconfig BUILTIN_DTB
27377fafb068SAndrew Bresticker	bool
27387fafb068SAndrew Bresticker
27391da8f179SJonas Gorskichoice
27405b24d52cSJonas Gorski	prompt "Kernel appended dtb support" if USE_OF
27411da8f179SJonas Gorski	default MIPS_NO_APPENDED_DTB
27421da8f179SJonas Gorski
27431da8f179SJonas Gorski	config MIPS_NO_APPENDED_DTB
27441da8f179SJonas Gorski		bool "None"
27451da8f179SJonas Gorski		help
27461da8f179SJonas Gorski		  Do not enable appended dtb support.
27471da8f179SJonas Gorski
274887db537dSAaro Koskinen	config MIPS_ELF_APPENDED_DTB
274987db537dSAaro Koskinen		bool "vmlinux"
275087db537dSAaro Koskinen		help
275187db537dSAaro Koskinen		  With this option, the boot code will look for a device tree binary
275287db537dSAaro Koskinen		  DTB) included in the vmlinux ELF section .appended_dtb. By default
275387db537dSAaro Koskinen		  it is empty and the DTB can be appended using binutils command
275487db537dSAaro Koskinen		  objcopy:
275587db537dSAaro Koskinen
275687db537dSAaro Koskinen		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
275787db537dSAaro Koskinen
275887db537dSAaro Koskinen		  This is meant as a backward compatiblity convenience for those
275987db537dSAaro Koskinen		  systems with a bootloader that can't be upgraded to accommodate
276087db537dSAaro Koskinen		  the documented boot protocol using a device tree.
276187db537dSAaro Koskinen
27621da8f179SJonas Gorski	config MIPS_RAW_APPENDED_DTB
27631da8f179SJonas Gorski		bool "vmlinux.bin"
27641da8f179SJonas Gorski		help
27651da8f179SJonas Gorski		  With this option, the boot code will look for a device tree binary
27661da8f179SJonas Gorski		  DTB) appended to raw vmlinux.bin (without decompressor).
27671da8f179SJonas Gorski		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
27681da8f179SJonas Gorski
27691da8f179SJonas Gorski		  This is meant as a backward compatibility convenience for those
27701da8f179SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
27711da8f179SJonas Gorski		  the documented boot protocol using a device tree.
27721da8f179SJonas Gorski
27731da8f179SJonas Gorski		  Beware that there is very little in terms of protection against
27741da8f179SJonas Gorski		  this option being confused by leftover garbage in memory that might
27751da8f179SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
27761da8f179SJonas Gorski		  to vmlinux.bin.  Do not leave this option active in a production kernel
27771da8f179SJonas Gorski		  if you don't intend to always append a DTB.
2778c0b4e101SJonas Gorski
2779c0b4e101SJonas Gorski	config MIPS_ZBOOT_APPENDED_DTB
2780c0b4e101SJonas Gorski		bool "vmlinuz.bin"
2781c0b4e101SJonas Gorski		depends on SYS_SUPPORTS_ZBOOT
2782c0b4e101SJonas Gorski		help
2783c0b4e101SJonas Gorski		  With this option, the boot code will look for a device tree binary
2784c0b4e101SJonas Gorski		  DTB) appended to raw vmlinuz.bin (with decompressor).
2785c0b4e101SJonas Gorski		  (e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb).
2786c0b4e101SJonas Gorski
2787c0b4e101SJonas Gorski		  This is meant as a backward compatibility convenience for those
2788c0b4e101SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
2789c0b4e101SJonas Gorski		  the documented boot protocol using a device tree.
2790c0b4e101SJonas Gorski
2791c0b4e101SJonas Gorski		  Beware that there is very little in terms of protection against
2792c0b4e101SJonas Gorski		  this option being confused by leftover garbage in memory that might
2793c0b4e101SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
2794c0b4e101SJonas Gorski		  to vmlinuz.bin.  Do not leave this option active in a production kernel
2795c0b4e101SJonas Gorski		  if you don't intend to always append a DTB.
27961da8f179SJonas Gorskiendchoice
27971da8f179SJonas Gorski
27982024972eSJonas Gorskichoice
27992024972eSJonas Gorski	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
28002bcef9b4SJonas Gorski	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
28012bcef9b4SJonas Gorski					 !MIPS_MALTA && !MIPS_SEAD3 && \
28022bcef9b4SJonas Gorski					 !CAVIUM_OCTEON_SOC
28032024972eSJonas Gorski	default MIPS_CMDLINE_FROM_BOOTLOADER
28042024972eSJonas Gorski
28052024972eSJonas Gorski	config MIPS_CMDLINE_FROM_DTB
28062024972eSJonas Gorski		depends on USE_OF
28072024972eSJonas Gorski		bool "Dtb kernel arguments if available"
28082024972eSJonas Gorski
28092024972eSJonas Gorski	config MIPS_CMDLINE_DTB_EXTEND
28102024972eSJonas Gorski		depends on USE_OF
28112024972eSJonas Gorski		bool "Extend dtb kernel arguments with bootloader arguments"
28122024972eSJonas Gorski
28132024972eSJonas Gorski	config MIPS_CMDLINE_FROM_BOOTLOADER
28142024972eSJonas Gorski		bool "Bootloader kernel arguments if available"
28152024972eSJonas Gorskiendchoice
28162024972eSJonas Gorski
28175e83d430SRalf Baechleendmenu
28185e83d430SRalf Baechle
28191df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
28201df0f0ffSAtsushi Nemoto	bool
28211df0f0ffSAtsushi Nemoto	default y
28221df0f0ffSAtsushi Nemoto
28231df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
28241df0f0ffSAtsushi Nemoto	bool
28251df0f0ffSAtsushi Nemoto	default y
28261df0f0ffSAtsushi Nemoto
2827e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT
2828e1e16115SAaro Koskinen	bool
2829e1e16115SAaro Koskinen	default y
2830e1e16115SAaro Koskinen
2831a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS
2832a728ab52SKirill A. Shutemov	int
2833a728ab52SKirill A. Shutemov	default 3 if 64BIT && !PAGE_SIZE_64KB
2834a728ab52SKirill A. Shutemov	default 2
2835a728ab52SKirill A. Shutemov
2836b6c3539bSRalf Baechlesource "init/Kconfig"
2837b6c3539bSRalf Baechle
2838dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2839dc52ddc0SMatt Helsley
28401da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
28411da177e4SLinus Torvalds
28425e83d430SRalf Baechleconfig HW_HAS_EISA
28435e83d430SRalf Baechle	bool
28441da177e4SLinus Torvaldsconfig HW_HAS_PCI
28451da177e4SLinus Torvalds	bool
28461da177e4SLinus Torvalds
28471da177e4SLinus Torvaldsconfig PCI
28481da177e4SLinus Torvalds	bool "Support for PCI controller"
28491da177e4SLinus Torvalds	depends on HW_HAS_PCI
2850abb4ae46SRalf Baechle	select PCI_DOMAINS
28510f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
28521da177e4SLinus Torvalds	help
28531da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
28541da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
28551da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
28561da177e4SLinus Torvalds	  say Y, otherwise N.
28571da177e4SLinus Torvalds
28580e476d91SHuacai Chenconfig HT_PCI
28590e476d91SHuacai Chen	bool "Support for HT-linked PCI"
28600e476d91SHuacai Chen	default y
28610e476d91SHuacai Chen	depends on CPU_LOONGSON3
28620e476d91SHuacai Chen	select PCI
28630e476d91SHuacai Chen	select PCI_DOMAINS
28640e476d91SHuacai Chen	help
28650e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
28660e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
28670e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
28680e476d91SHuacai Chen
28691da177e4SLinus Torvaldsconfig PCI_DOMAINS
28701da177e4SLinus Torvalds	bool
28711da177e4SLinus Torvalds
28721da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
28731da177e4SLinus Torvalds
28741da177e4SLinus Torvalds#
28751da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
28761da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
28771da177e4SLinus Torvalds# users to choose the right thing ...
28781da177e4SLinus Torvalds#
28791da177e4SLinus Torvaldsconfig ISA
28801da177e4SLinus Torvalds	bool
28811da177e4SLinus Torvalds
28821da177e4SLinus Torvaldsconfig EISA
28831da177e4SLinus Torvalds	bool "EISA support"
28845e83d430SRalf Baechle	depends on HW_HAS_EISA
28851da177e4SLinus Torvalds	select ISA
2886aa414dffSRalf Baechle	select GENERIC_ISA_DMA
28871da177e4SLinus Torvalds	---help---
28881da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
28891da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
28901da177e4SLinus Torvalds
28911da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
28921da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
28931da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
28941da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
28951da177e4SLinus Torvalds
28961da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
28971da177e4SLinus Torvalds
28981da177e4SLinus Torvalds	  Otherwise, say N.
28991da177e4SLinus Torvalds
29001da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
29011da177e4SLinus Torvalds
29021da177e4SLinus Torvaldsconfig TC
29031da177e4SLinus Torvalds	bool "TURBOchannel support"
29041da177e4SLinus Torvalds	depends on MACH_DECSTATION
29051da177e4SLinus Torvalds	help
290650a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
290750a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
290850a23e6eSJustin P. Mattock	  at:
290950a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
291050a23e6eSJustin P. Mattock	  and:
291150a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
291250a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
291350a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
29141da177e4SLinus Torvalds
29151da177e4SLinus Torvaldsconfig MMU
29161da177e4SLinus Torvalds	bool
29171da177e4SLinus Torvalds	default y
29181da177e4SLinus Torvalds
2919d865bea4SRalf Baechleconfig I8253
2920d865bea4SRalf Baechle	bool
2921798778b8SRussell King	select CLKSRC_I8253
29222d02612fSThomas Gleixner	select CLKEVT_I8253
29239726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
2924d865bea4SRalf Baechle
2925e05eb3f8SRalf Baechleconfig ZONE_DMA
2926e05eb3f8SRalf Baechle	bool
2927e05eb3f8SRalf Baechle
2928cce335aeSRalf Baechleconfig ZONE_DMA32
2929cce335aeSRalf Baechle	bool
2930cce335aeSRalf Baechle
29311da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
29321da177e4SLinus Torvalds
2933388b78adSAlexandre Bounineconfig RAPIDIO
293456abde72SAlexandre Bounine	tristate "RapidIO support"
2935388b78adSAlexandre Bounine	depends on PCI
2936388b78adSAlexandre Bounine	default n
2937388b78adSAlexandre Bounine	help
2938388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
2939388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
2940388b78adSAlexandre Bounine
2941388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
2942388b78adSAlexandre Bounine
29431da177e4SLinus Torvaldsendmenu
29441da177e4SLinus Torvalds
29451da177e4SLinus Torvaldsmenu "Executable file formats"
29461da177e4SLinus Torvalds
29471da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
29481da177e4SLinus Torvalds
29491da177e4SLinus Torvaldsconfig TRAD_SIGNALS
29501da177e4SLinus Torvalds	bool
29511da177e4SLinus Torvalds
29521da177e4SLinus Torvaldsconfig MIPS32_COMPAT
295378aaf956SRalf Baechle	bool
29541da177e4SLinus Torvalds
29551da177e4SLinus Torvaldsconfig COMPAT
29561da177e4SLinus Torvalds	bool
29571da177e4SLinus Torvalds
295805e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
295905e43966SAtsushi Nemoto	bool
296005e43966SAtsushi Nemoto
29611da177e4SLinus Torvaldsconfig MIPS32_O32
29621da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
296378aaf956SRalf Baechle	depends on 64BIT
296478aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
296578aaf956SRalf Baechle	select COMPAT
296678aaf956SRalf Baechle	select MIPS32_COMPAT
296778aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
29681da177e4SLinus Torvalds	help
29691da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
29701da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
29711da177e4SLinus Torvalds	  existing binaries are in this format.
29721da177e4SLinus Torvalds
29731da177e4SLinus Torvalds	  If unsure, say Y.
29741da177e4SLinus Torvalds
29751da177e4SLinus Torvaldsconfig MIPS32_N32
29761da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
2977c22eacfeSRalf Baechle	depends on 64BIT
297878aaf956SRalf Baechle	select COMPAT
297978aaf956SRalf Baechle	select MIPS32_COMPAT
298078aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
29811da177e4SLinus Torvalds	help
29821da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
29831da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
29841da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
29851da177e4SLinus Torvalds	  cases.
29861da177e4SLinus Torvalds
29871da177e4SLinus Torvalds	  If unsure, say N.
29881da177e4SLinus Torvalds
29891da177e4SLinus Torvaldsconfig BINFMT_ELF32
29901da177e4SLinus Torvalds	bool
29911da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
29921da177e4SLinus Torvalds
29932116245eSRalf Baechleendmenu
29941da177e4SLinus Torvalds
29952116245eSRalf Baechlemenu "Power management options"
2996952fa954SRodolfo Giometti
2997363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
2998363c55caSWu Zhangjin	def_bool y
29993f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3000363c55caSWu Zhangjin
3001f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
3002f4cb5700SJohannes Berg	def_bool y
30033f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3004f4cb5700SJohannes Berg
30052116245eSRalf Baechlesource "kernel/power/Kconfig"
3006952fa954SRodolfo Giometti
30071da177e4SLinus Torvaldsendmenu
30081da177e4SLinus Torvalds
30097a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
30107a998935SViresh Kumar	bool
30117a998935SViresh Kumar
30127a998935SViresh Kumarmenu "CPU Power Management"
3013c095ebafSPaul Burton
3014c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
30157a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
30167a998935SViresh Kumarendif
30179726b43aSWu Zhangjin
3018c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
3019c095ebafSPaul Burton
3020c095ebafSPaul Burtonendmenu
3021c095ebafSPaul Burton
3022d5950b43SSam Ravnborgsource "net/Kconfig"
3023d5950b43SSam Ravnborg
30241da177e4SLinus Torvaldssource "drivers/Kconfig"
30251da177e4SLinus Torvalds
302698cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
302798cdee0eSRalf Baechle
30281da177e4SLinus Torvaldssource "fs/Kconfig"
30291da177e4SLinus Torvalds
30301da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
30311da177e4SLinus Torvalds
30321da177e4SLinus Torvaldssource "security/Kconfig"
30331da177e4SLinus Torvalds
30341da177e4SLinus Torvaldssource "crypto/Kconfig"
30351da177e4SLinus Torvalds
30361da177e4SLinus Torvaldssource "lib/Kconfig"
30372235a54dSSanjay Lal
30382235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
3039