xref: /linux/arch/mips/Kconfig (revision 2965faa5e03d1e71e9ff9aa143fff39e0a77543a)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
440e084a5SRalf Baechle	select ARCH_SUPPORTS_UPROBES
5a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
6393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
75fac4f7aSPaul Burton	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
8c3fc5cd5SRalf Baechle	select HAVE_CONTEXT_TRACKING
9f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
10ec7748b5SSam Ravnborg	select HAVE_IDE
1142d4b839SMathieu Desnoyers	select HAVE_OPROFILE
127f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
137f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
1488547001SJason Wessel	select HAVE_ARCH_KGDB
15490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
16c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
173f5fdb4bSMarkos Chandras	select HAVE_BPF_JIT if !CPU_MICROMIPS
18d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
19538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
20538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
2164575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
2229c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
23c1bf207dSDavid Daney	select HAVE_KPROBES
24c1bf207dSDavid Daney	select HAVE_KRETPROBES
25fb59e394SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
26b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
271d7bf993SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
282b68f6caSKees Cook	select ARCH_HAS_ELF_RANDOMIZE
29383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
3030ad29bbSHuacai Chen	select RTC_LIB if !MACH_LOONGSON64
312b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
327463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
3348e1fd5aSDavid Daney	select HAVE_DMA_ATTRS
34f4649382SZubair Lutfullah Kakakhel	select HAVE_DMA_CONTIGUOUS
3548e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
363bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
37f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3878857614SMarkos Chandras	select GENERIC_PCI_IOMAP
3994bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
40c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
410f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
429d15ffc8STejun Heo	select HAVE_MEMBLOCK
439d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
449d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
45360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
464b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
47cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
48929de4ccSDeng-Cheng Zhu	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
49cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
50786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
514febd95aSStephen Rothwell	select VIRT_TO_BUS
522f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
532f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
5450150d2bSAl Viro	select CLONE_BACKWARDS
55d1a1dc0bSDave Hansen	select HAVE_DEBUG_STACKOVERFLOW
5619952a92SKees Cook	select HAVE_CC_STACKPROTECTOR
57b1d4c6caSJames Hogan	select CPU_PM if CPU_IDLE
58cc7964afSPaul Burton	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
5990cee759SPaul Burton	select ARCH_BINFMT_ELF_STATE
60d79d853dSMarkos Chandras	select SYSCTL_EXCEPTION_TRACE
61bb877e96SDeng-Cheng Zhu	select HAVE_VIRT_CPU_ACCOUNTING_GEN
62ec9ddad3SDeng-Cheng Zhu	select HAVE_IRQ_TIME_ACCOUNTING
631da177e4SLinus Torvalds
641da177e4SLinus Torvaldsmenu "Machine selection"
651da177e4SLinus Torvalds
665e83d430SRalf Baechlechoice
675e83d430SRalf Baechle	prompt "System type"
685e83d430SRalf Baechle	default SGI_IP22
691da177e4SLinus Torvalds
7042a4f17dSManuel Laussconfig MIPS_ALCHEMY
71c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
7234adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
73f772cdb2SRalf Baechle	select CEVT_R4K
74d7ea335cSSteven J. Hill	select CSRC_R4K
7567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7688e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
7742a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
7842a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
7942a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
80efb12436SAlexandre Courbot	select ARCH_REQUIRE_GPIOLIB
811b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
8247440229SManuel Lauss	select COMMON_CLK
831da177e4SLinus Torvalds
847ca5dc14SFlorian Fainelliconfig AR7
857ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
867ca5dc14SFlorian Fainelli	select BOOT_ELF32
877ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
887ca5dc14SFlorian Fainelli	select CEVT_R4K
897ca5dc14SFlorian Fainelli	select CSRC_R4K
9067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
917ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
927ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
937ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
947ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
957ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
967ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
97377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
981b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
995f3c9098SFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
1007ca5dc14SFlorian Fainelli	select VLYNQ
1018551fb64SYoichi Yuasa	select HAVE_CLK
1027ca5dc14SFlorian Fainelli	help
1037ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1047ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1057ca5dc14SFlorian Fainelli
10643cc739fSSergey Ryazanovconfig ATH25
10743cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
10843cc739fSSergey Ryazanov	select CEVT_R4K
10943cc739fSSergey Ryazanov	select CSRC_R4K
11043cc739fSSergey Ryazanov	select DMA_NONCOHERENT
11167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1121753e74eSSergey Ryazanov	select IRQ_DOMAIN
11343cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
11443cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
11543cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
1168aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
11743cc739fSSergey Ryazanov	help
11843cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
11943cc739fSSergey Ryazanov
120d4a67d9dSGabor Juhosconfig ATH79
121d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
122ff591a91SAlban Bedel	select ARCH_HAS_RESET_CONTROLLER
1236eae43c5SGabor Juhos	select ARCH_REQUIRE_GPIOLIB
124d4a67d9dSGabor Juhos	select BOOT_RAW
125d4a67d9dSGabor Juhos	select CEVT_R4K
126d4a67d9dSGabor Juhos	select CSRC_R4K
127d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
12894638067SGabor Juhos	select HAVE_CLK
129411520afSAlban Bedel	select COMMON_CLK
1302c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
13167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1320aabf1a4SGabor Juhos	select MIPS_MACHINE
133d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
134d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
135d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
136d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
137377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
138da628e8bSAlban Bedel	select SYS_SUPPORTS_ZBOOT
13903c8c407SAlban Bedel	select USE_OF
140d4a67d9dSGabor Juhos	help
141d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
142d4a67d9dSGabor Juhos
1435f2d4459SKevin Cernekeeconfig BMIPS_GENERIC
1445f2d4459SKevin Cernekee	bool "Broadcom Generic BMIPS kernel"
145d666cd02SKevin Cernekee	select BOOT_RAW
146d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
147d666cd02SKevin Cernekee	select USE_OF
148d666cd02SKevin Cernekee	select CEVT_R4K
149d666cd02SKevin Cernekee	select CSRC_R4K
150d666cd02SKevin Cernekee	select SYNC_R4K
151d666cd02SKevin Cernekee	select COMMON_CLK
15260b858f2SKevin Cernekee	select BCM7038_L1_IRQ
15360b858f2SKevin Cernekee	select BCM7120_L2_IRQ
15460b858f2SKevin Cernekee	select BRCMSTB_L2_IRQ
15567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
15660b858f2SKevin Cernekee	select DMA_NONCOHERENT
157d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
15860b858f2SKevin Cernekee	select SYS_SUPPORTS_LITTLE_ENDIAN
159d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
160d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
16160b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS32_3300
16260b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4350
16360b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4380
164d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
165d666cd02SKevin Cernekee	select SWAP_IO_SPACE
16660b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
16760b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
16860b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
16960b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
170d666cd02SKevin Cernekee	help
1715f2d4459SKevin Cernekee	  Build a generic DT-based kernel image that boots on select
1725f2d4459SKevin Cernekee	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
1735f2d4459SKevin Cernekee	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
1745f2d4459SKevin Cernekee	  must be set appropriately for your board.
175d666cd02SKevin Cernekee
1761c0c13ebSAurelien Jarnoconfig BCM47XX
177c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
1782da4c74dSHauke Mehrtens	select ARCH_WANT_OPTIONAL_GPIOLIB
179fe08f8c2SHauke Mehrtens	select BOOT_RAW
18042f77542SRalf Baechle	select CEVT_R4K
181940f6b48SRalf Baechle	select CSRC_R4K
1821c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1831c0c13ebSAurelien Jarno	select HW_HAS_PCI
18467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
185314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
186dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1871c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1881c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
189377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
19025e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
191e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
192c949c0bcSRafał Miłecki	select GPIOLIB
193c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
194f6e734a8SRafał Miłecki	select BCM47XX_NVRAM
1951c0c13ebSAurelien Jarno	help
1961c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
1971c0c13ebSAurelien Jarno
198e7300d04SMaxime Bizonconfig BCM63XX
199e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
200ae8de61cSFlorian Fainelli	select BOOT_RAW
201e7300d04SMaxime Bizon	select CEVT_R4K
202e7300d04SMaxime Bizon	select CSRC_R4K
203fc264022SJonas Gorski	select SYNC_R4K
204e7300d04SMaxime Bizon	select DMA_NONCOHERENT
20567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
206e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
207e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
208e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
209e7300d04SMaxime Bizon	select SWAP_IO_SPACE
210e7300d04SMaxime Bizon	select ARCH_REQUIRE_GPIOLIB
2113e82eeebSYoichi Yuasa	select HAVE_CLK
212af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
213e7300d04SMaxime Bizon	help
214e7300d04SMaxime Bizon	 Support for BCM63XX based boards
215e7300d04SMaxime Bizon
2161da177e4SLinus Torvaldsconfig MIPS_COBALT
2173fa986faSMartin Michlmayr	bool "Cobalt Server"
21842f77542SRalf Baechle	select CEVT_R4K
219940f6b48SRalf Baechle	select CSRC_R4K
2201097c6acSYoichi Yuasa	select CEVT_GT641XX
2211da177e4SLinus Torvalds	select DMA_NONCOHERENT
2221da177e4SLinus Torvalds	select HW_HAS_PCI
223d865bea4SRalf Baechle	select I8253
2241da177e4SLinus Torvalds	select I8259
22567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
226d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
227252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
228e25bfc92SYoichi Yuasa	select PCI
2297cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
2300a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
231ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2320e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
2335e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
234e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
2351da177e4SLinus Torvalds
2361da177e4SLinus Torvaldsconfig MACH_DECSTATION
2373fa986faSMartin Michlmayr	bool "DECstations"
2381da177e4SLinus Torvalds	select BOOT_ELF32
2396457d9fcSYoichi Yuasa	select CEVT_DS1287
24081d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
2414247417dSYoichi Yuasa	select CSRC_IOASIC
24281d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
24320d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
24420d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
24520d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
2461da177e4SLinus Torvalds	select DMA_NONCOHERENT
247ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
24867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
2497cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
2507cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
251ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2527d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2535e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
2541723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
2551723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
2561723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
257930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
2585e83d430SRalf Baechle	help
2591da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
2601da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
2611da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
2621da177e4SLinus Torvalds
2631da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
2641da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
2651da177e4SLinus Torvalds
2661da177e4SLinus Torvalds		DECstation 5000/50
2671da177e4SLinus Torvalds		DECstation 5000/150
2681da177e4SLinus Torvalds		DECstation 5000/260
2691da177e4SLinus Torvalds		DECsystem 5900/260
2701da177e4SLinus Torvalds
2711da177e4SLinus Torvalds	  otherwise choose R3000.
2721da177e4SLinus Torvalds
2735e83d430SRalf Baechleconfig MACH_JAZZ
2743fa986faSMartin Michlmayr	bool "Jazz family of machines"
2750e2794b0SRalf Baechle	select FW_ARC
2760e2794b0SRalf Baechle	select FW_ARC32
2775e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
27842f77542SRalf Baechle	select CEVT_R4K
279940f6b48SRalf Baechle	select CSRC_R4K
280e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2815e83d430SRalf Baechle	select GENERIC_ISA_DMA
2828a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
28367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
284d865bea4SRalf Baechle	select I8253
2855e83d430SRalf Baechle	select I8259
2865e83d430SRalf Baechle	select ISA
2877cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2885e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2897d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2901723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2911da177e4SLinus Torvalds	help
2925e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
2935e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
294692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
2955e83d430SRalf Baechle	 Olivetti M700-10 workstations.
2965e83d430SRalf Baechle
297de361e8bSPaul Burtonconfig MACH_INGENIC
298de361e8bSPaul Burton	bool "Ingenic SoC based machines"
2995ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
3005ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
301f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
3025ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
30367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3045ebabe59SLars-Peter Clausen	select ARCH_REQUIRE_GPIOLIB
305ff1930c6SPaul Burton	select COMMON_CLK
30683bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
307ffb1843dSPaul Burton	select BUILTIN_DTB
308ffb1843dSPaul Burton	select USE_OF
3096ec127fbSPaul Burton	select LIBFDT
3105ebabe59SLars-Peter Clausen
311171bb2f1SJohn Crispinconfig LANTIQ
312171bb2f1SJohn Crispin	bool "Lantiq based platforms"
313171bb2f1SJohn Crispin	select DMA_NONCOHERENT
31467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
315171bb2f1SJohn Crispin	select CEVT_R4K
316171bb2f1SJohn Crispin	select CSRC_R4K
317171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
318171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
319171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
320171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
321377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
322171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
323171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
324171bb2f1SJohn Crispin	select ARCH_REQUIRE_GPIOLIB
325171bb2f1SJohn Crispin	select SWAP_IO_SPACE
326171bb2f1SJohn Crispin	select BOOT_RAW
327287e3f3fSJohn Crispin	select HAVE_MACH_CLKDEV
328287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
329a0392222SJohn Crispin	select USE_OF
3303f8c50c9SJohn Crispin	select PINCTRL
3313f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
332c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
333c530781cSJohn Crispin	select RESET_CONTROLLER
334171bb2f1SJohn Crispin
3351f21d2bdSBrian Murphyconfig LASAT
3361f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
33742f77542SRalf Baechle	select CEVT_R4K
33816f0bbbcSRalf Baechle	select CRC32
339940f6b48SRalf Baechle	select CSRC_R4K
3401f21d2bdSBrian Murphy	select DMA_NONCOHERENT
3411f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
3421f21d2bdSBrian Murphy	select HW_HAS_PCI
34367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3441f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
3451f21d2bdSBrian Murphy	select MIPS_NILE4
3461f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
3471f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
3481f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
3491f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
3501f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
3511f21d2bdSBrian Murphy
35230ad29bbSHuacai Chenconfig MACH_LOONGSON32
35330ad29bbSHuacai Chen	bool "Loongson-1 family of machines"
354c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
355ade299d8SYoichi Yuasa	help
35630ad29bbSHuacai Chen	  This enables support for the Loongson-1 family of machines.
35785749d24SWu Zhangjin
35830ad29bbSHuacai Chen	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
35930ad29bbSHuacai Chen	  the Institute of Computing Technology (ICT), Chinese Academy of
36030ad29bbSHuacai Chen	  Sciences (CAS).
361ade299d8SYoichi Yuasa
36230ad29bbSHuacai Chenconfig MACH_LOONGSON64
36330ad29bbSHuacai Chen	bool "Loongson-2/3 family of machines"
364ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
365ca585cf9SKelvin Cheung	help
36630ad29bbSHuacai Chen	  This enables the support of Loongson-2/3 family of machines.
367ca585cf9SKelvin Cheung
36830ad29bbSHuacai Chen	  Loongson-2 is a family of single-core CPUs and Loongson-3 is a
36930ad29bbSHuacai Chen	  family of multi-core CPUs. They are both 64-bit general-purpose
37030ad29bbSHuacai Chen	  MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
37130ad29bbSHuacai Chen	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
37230ad29bbSHuacai Chen	  in the People's Republic of China. The chief architect is Professor
37330ad29bbSHuacai Chen	  Weiwu Hu.
374ca585cf9SKelvin Cheung
3756a438309SAndrew Brestickerconfig MACH_PISTACHIO
3766a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
3776a438309SAndrew Bresticker	select ARCH_REQUIRE_GPIOLIB
3786a438309SAndrew Bresticker	select BOOT_ELF32
3796a438309SAndrew Bresticker	select BOOT_RAW
3806a438309SAndrew Bresticker	select CEVT_R4K
3816a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
3826a438309SAndrew Bresticker	select COMMON_CLK
3836a438309SAndrew Bresticker	select CSRC_R4K
3846a438309SAndrew Bresticker	select DMA_MAYBE_COHERENT
38567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3866a438309SAndrew Bresticker	select LIBFDT
3876a438309SAndrew Bresticker	select MFD_SYSCON
3886a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
3896a438309SAndrew Bresticker	select MIPS_GIC
3906a438309SAndrew Bresticker	select PINCTRL
3916a438309SAndrew Bresticker	select REGULATOR
3926a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
3936a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
3946a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
3956a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
3966a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
3976a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
398018f62eeSEzequiel Garcia	select SYS_HAS_EARLY_PRINTK
399018f62eeSEzequiel Garcia	select USE_GENERIC_EARLY_PRINTK_8250
4006a438309SAndrew Bresticker	select USE_OF
4016a438309SAndrew Bresticker	help
4026a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
4036a438309SAndrew Bresticker
4041da177e4SLinus Torvaldsconfig MIPS_MALTA
4053fa986faSMartin Michlmayr	bool "MIPS Malta board"
40661ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
4071da177e4SLinus Torvalds	select BOOT_ELF32
408fa71c960SRalf Baechle	select BOOT_RAW
409e8823d26SPaul Burton	select BUILTIN_DTB
41042f77542SRalf Baechle	select CEVT_R4K
411940f6b48SRalf Baechle	select CSRC_R4K
412fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
41342b002abSGuenter Roeck	select COMMON_CLK
414885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
4151da177e4SLinus Torvalds	select GENERIC_ISA_DMA
4168a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
41767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4188a19b8f1SAndrew Bresticker	select MIPS_GIC
4191da177e4SLinus Torvalds	select HW_HAS_PCI
420d865bea4SRalf Baechle	select I8253
4211da177e4SLinus Torvalds	select I8259
4225e83d430SRalf Baechle	select MIPS_BONITO64
4239318c51aSChris Dearman	select MIPS_CPU_SCACHE
424a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
425252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
4265e83d430SRalf Baechle	select MIPS_MSC
4271da177e4SLinus Torvalds	select SWAP_IO_SPACE
4287cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
4297cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
430bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
431c5b36783SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R5
432575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
4337cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
4345d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
435575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
4367cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
4377cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
438ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
439ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4405e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
441c5b36783SSteven J. Hill	select SYS_SUPPORTS_HIGHMEM
4425e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
443424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
4440365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
445e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
446377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
447f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
4489693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
4491b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
450e8823d26SPaul Burton	select USE_OF
451abcc82b1SJames Hogan	select ZONE_DMA32 if 64BIT
4521da177e4SLinus Torvalds	help
453f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
4541da177e4SLinus Torvalds	  board.
4551da177e4SLinus Torvalds
456ec47b274SSteven J. Hillconfig MIPS_SEAD3
457ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
458ec47b274SSteven J. Hill	select BOOT_ELF32
459ec47b274SSteven J. Hill	select BOOT_RAW
460f262b5f2SAndrew Bresticker	select BUILTIN_DTB
461ec47b274SSteven J. Hill	select CEVT_R4K
462ec47b274SSteven J. Hill	select CSRC_R4K
463fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
46442b002abSGuenter Roeck	select COMMON_CLK
465ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
466ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
467ec47b274SSteven J. Hill	select DMA_NONCOHERENT
46867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4698a19b8f1SAndrew Bresticker	select MIPS_GIC
47044327236SQais Yousef	select LIBFDT
471ec47b274SSteven J. Hill	select MIPS_MSC
472ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
473ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
474ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
475ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
476ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
477ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
478ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
479ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
480ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
481a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
482377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
483ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
484ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
4859b731009SSteven J. Hill	select USE_OF
486ec47b274SSteven J. Hill	help
487ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
488ec47b274SSteven J. Hill	  board.
489ec47b274SSteven J. Hill
490a83860c2SRalf Baechleconfig NEC_MARKEINS
491a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
492a83860c2SRalf Baechle	select SOC_EMMA2RH
493a83860c2SRalf Baechle	select HW_HAS_PCI
494a83860c2SRalf Baechle	help
495a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
496ade299d8SYoichi Yuasa
4975e83d430SRalf Baechleconfig MACH_VR41XX
49874142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
49942f77542SRalf Baechle	select CEVT_R4K
500940f6b48SRalf Baechle	select CSRC_R4K
5017cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
502377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
50327fdd325SYoichi Yuasa	select ARCH_REQUIRE_GPIOLIB
5045e83d430SRalf Baechle
505edb6310aSDaniel Lairdconfig NXP_STB220
506edb6310aSDaniel Laird	bool "NXP STB220 board"
507edb6310aSDaniel Laird	select SOC_PNX833X
508edb6310aSDaniel Laird	help
509edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
510edb6310aSDaniel Laird
511edb6310aSDaniel Lairdconfig NXP_STB225
512edb6310aSDaniel Laird	bool "NXP 225 board"
513edb6310aSDaniel Laird	select SOC_PNX833X
514edb6310aSDaniel Laird	select SOC_PNX8335
515edb6310aSDaniel Laird	help
516edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
517edb6310aSDaniel Laird
5189267a30dSMarc St-Jeanconfig PMC_MSP
5199267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
52039d30c13SAnoop P A	select CEVT_R4K
52139d30c13SAnoop P A	select CSRC_R4K
5229267a30dSMarc St-Jean	select DMA_NONCOHERENT
5239267a30dSMarc St-Jean	select SWAP_IO_SPACE
5249267a30dSMarc St-Jean	select NO_EXCEPT_FILL
5259267a30dSMarc St-Jean	select BOOT_RAW
5269267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
5279267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
5289267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
5299267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
530377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
53167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5329267a30dSMarc St-Jean	select SERIAL_8250
5339267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
5349296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
5359296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
5369267a30dSMarc St-Jean	help
5379267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
5389267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
5399267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
5409267a30dSMarc St-Jean	  a variety of MIPS cores.
5419267a30dSMarc St-Jean
542ae2b5bb6SJohn Crispinconfig RALINK
543ae2b5bb6SJohn Crispin	bool "Ralink based machines"
544ae2b5bb6SJohn Crispin	select CEVT_R4K
545ae2b5bb6SJohn Crispin	select CSRC_R4K
546ae2b5bb6SJohn Crispin	select BOOT_RAW
547ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
54867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
549ae2b5bb6SJohn Crispin	select USE_OF
550ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
551ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
552ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
553ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
554377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
555ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
556ae2b5bb6SJohn Crispin	select HAVE_MACH_CLKDEV
557ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
5582a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
5592a153f1cSJohn Crispin	select RESET_CONTROLLER
560ae2b5bb6SJohn Crispin
5611da177e4SLinus Torvaldsconfig SGI_IP22
5623fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
5630e2794b0SRalf Baechle	select FW_ARC
5640e2794b0SRalf Baechle	select FW_ARC32
5651da177e4SLinus Torvalds	select BOOT_ELF32
56642f77542SRalf Baechle	select CEVT_R4K
567940f6b48SRalf Baechle	select CSRC_R4K
568e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
5691da177e4SLinus Torvalds	select DMA_NONCOHERENT
5705e83d430SRalf Baechle	select HW_HAS_EISA
571d865bea4SRalf Baechle	select I8253
57268de4803SThomas Bogendoerfer	select I8259
5731da177e4SLinus Torvalds	select IP22_CPU_SCACHE
57467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
575aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
576e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
577e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
57836e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
579e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
580e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
581e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
5821da177e4SLinus Torvalds	select SWAP_IO_SPACE
5837cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
5847cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
5852b5e63f6SMartin Michlmayr	#
5862b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
5872b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
5882b5e63f6SMartin Michlmayr	#
5892b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
5902b5e63f6SMartin Michlmayr	# for a more details discussion
5912b5e63f6SMartin Michlmayr	#
5922b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
593ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
594ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5955e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
596930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
5971da177e4SLinus Torvalds	help
5981da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
5991da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
6001da177e4SLinus Torvalds	  that runs on these, say Y here.
6011da177e4SLinus Torvalds
6021da177e4SLinus Torvaldsconfig SGI_IP27
6033fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
6040e2794b0SRalf Baechle	select FW_ARC
6050e2794b0SRalf Baechle	select FW_ARC64
6065e83d430SRalf Baechle	select BOOT_ELF64
607e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
608634286f1SRalf Baechle	select DMA_COHERENT
60936a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
6101da177e4SLinus Torvalds	select HW_HAS_PCI
611130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
6127cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
613ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6145e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
615d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
6161a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
617930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6181da177e4SLinus Torvalds	help
6191da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
6201da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
6211da177e4SLinus Torvalds	  here.
6221da177e4SLinus Torvalds
623e2defae5SThomas Bogendoerferconfig SGI_IP28
6247d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
6250e2794b0SRalf Baechle	select FW_ARC
6260e2794b0SRalf Baechle	select FW_ARC64
627e2defae5SThomas Bogendoerfer	select BOOT_ELF64
628e2defae5SThomas Bogendoerfer	select CEVT_R4K
629e2defae5SThomas Bogendoerfer	select CSRC_R4K
630e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
631e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
632e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
63367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
634e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
635e2defae5SThomas Bogendoerfer	select I8253
636e2defae5SThomas Bogendoerfer	select I8259
637e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
638e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6395b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
640e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
641e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
642e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
643e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
644e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6452b5e63f6SMartin Michlmayr	#
6462b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6472b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6482b5e63f6SMartin Michlmayr	#
6492b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6502b5e63f6SMartin Michlmayr	# for a more details discussion
6512b5e63f6SMartin Michlmayr	#
6522b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
653e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
654e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
655dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
656e2defae5SThomas Bogendoerfer      help
657e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
658e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
659e2defae5SThomas Bogendoerfer
6601da177e4SLinus Torvaldsconfig SGI_IP32
661cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
6620e2794b0SRalf Baechle	select FW_ARC
6630e2794b0SRalf Baechle	select FW_ARC32
6641da177e4SLinus Torvalds	select BOOT_ELF32
66542f77542SRalf Baechle	select CEVT_R4K
666940f6b48SRalf Baechle	select CSRC_R4K
6671da177e4SLinus Torvalds	select DMA_NONCOHERENT
6681da177e4SLinus Torvalds	select HW_HAS_PCI
66967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
6701da177e4SLinus Torvalds	select R5000_CPU_SCACHE
6711da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
6727cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
6737cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
6747cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
675dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
676ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6775e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6781da177e4SLinus Torvalds	help
6791da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
6801da177e4SLinus Torvalds
681ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
682ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
6835e83d430SRalf Baechle	select BOOT_ELF32
6845e83d430SRalf Baechle	select DMA_COHERENT
6855e83d430SRalf Baechle	select SIBYTE_BCM1120
6865e83d430SRalf Baechle	select SWAP_IO_SPACE
6877cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
6885e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6895e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6905e83d430SRalf Baechle
691ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
692ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
6935e83d430SRalf Baechle	select BOOT_ELF32
6945e83d430SRalf Baechle	select DMA_COHERENT
6955e83d430SRalf Baechle	select SIBYTE_BCM1120
6965e83d430SRalf Baechle	select SWAP_IO_SPACE
6977cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
6985e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6995e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7005e83d430SRalf Baechle
7015e83d430SRalf Baechleconfig SIBYTE_CRHONE
7023fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
7035e83d430SRalf Baechle	select BOOT_ELF32
7045e83d430SRalf Baechle	select DMA_COHERENT
7055e83d430SRalf Baechle	select SIBYTE_BCM1125
7065e83d430SRalf Baechle	select SWAP_IO_SPACE
7077cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7085e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7095e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7105e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7115e83d430SRalf Baechle
712ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
713ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
714ade299d8SYoichi Yuasa	select BOOT_ELF32
715ade299d8SYoichi Yuasa	select DMA_COHERENT
716ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
717ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
718ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
719ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
720ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
721ade299d8SYoichi Yuasa
722ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
723ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
724ade299d8SYoichi Yuasa	select BOOT_ELF32
725ade299d8SYoichi Yuasa	select DMA_COHERENT
726fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
727ade299d8SYoichi Yuasa	select SIBYTE_SB1250
728ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
729ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
730ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
731ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
732ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
733cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
734ade299d8SYoichi Yuasa
735ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
736ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
737ade299d8SYoichi Yuasa	select BOOT_ELF32
738ade299d8SYoichi Yuasa	select DMA_COHERENT
739fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
740ade299d8SYoichi Yuasa	select SIBYTE_SB1250
741ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
742ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
743ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
744ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
745ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
746ade299d8SYoichi Yuasa
747ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
748ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
749ade299d8SYoichi Yuasa	select BOOT_ELF32
750ade299d8SYoichi Yuasa	select DMA_COHERENT
751ade299d8SYoichi Yuasa	select SIBYTE_SB1250
752ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
753ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
754ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
755ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
756ade299d8SYoichi Yuasa
757ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
758ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
759ade299d8SYoichi Yuasa	select BOOT_ELF32
760ade299d8SYoichi Yuasa	select DMA_COHERENT
761ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
762ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
763ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
764ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
765ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
766651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
767ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
768cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
769ade299d8SYoichi Yuasa
77014b36af4SThomas Bogendoerferconfig SNI_RM
77114b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
7720e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
7730e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
774aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
7755e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
7765e83d430SRalf Baechle	select BOOT_ELF32
77742f77542SRalf Baechle	select CEVT_R4K
778940f6b48SRalf Baechle	select CSRC_R4K
779e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
7805e83d430SRalf Baechle	select DMA_NONCOHERENT
7815e83d430SRalf Baechle	select GENERIC_ISA_DMA
7828a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
7835e83d430SRalf Baechle	select HW_HAS_EISA
7845e83d430SRalf Baechle	select HW_HAS_PCI
78567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
786d865bea4SRalf Baechle	select I8253
7875e83d430SRalf Baechle	select I8259
7885e83d430SRalf Baechle	select ISA
7894a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
7907cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
7914a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
792c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
7934a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
79436a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
795ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
7967d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
7974a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
7985e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7995e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8001da177e4SLinus Torvalds	help
80114b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
80214b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
8035e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
8045e83d430SRalf Baechle	  support this machine type.
8051da177e4SLinus Torvalds
806edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
807edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
8085e83d430SRalf Baechle
809edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
810edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
81123fbee9dSRalf Baechle
81273b4390fSRalf Baechleconfig MIKROTIK_RB532
81373b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
81473b4390fSRalf Baechle	select CEVT_R4K
81573b4390fSRalf Baechle	select CSRC_R4K
81673b4390fSRalf Baechle	select DMA_NONCOHERENT
81773b4390fSRalf Baechle	select HW_HAS_PCI
81867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
81973b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
82073b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
82173b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
82273b4390fSRalf Baechle	select SWAP_IO_SPACE
82373b4390fSRalf Baechle	select BOOT_RAW
824d888e25bSFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
825930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
82673b4390fSRalf Baechle	help
82773b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
82873b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
82973b4390fSRalf Baechle
8309ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
8319ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
832a86c7f72SDavid Daney	select CEVT_R4K
83334adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
834a86c7f72SDavid Daney	select DMA_COHERENT
835a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
836a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
837f65aad41SRalf Baechle	select EDAC_SUPPORT
838b01aec9bSBorislav Petkov	select EDAC_ATOMIC_SCRUB
83973569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
84073569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
841a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
8425e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
843a86c7f72SDavid Daney	select SWAP_IO_SPACE
844e8635b48SDavid Daney	select HW_HAS_PCI
845f00e001eSDavid Daney	select ZONE_DMA32
846465aaed0SDavid Daney	select HOLES_IN_ZONE
84799cab4bbSDavid Daney	select ARCH_REQUIRE_GPIOLIB
8486e511163SDavid Daney	select LIBFDT
8496e511163SDavid Daney	select USE_OF
8506e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
8516e511163SDavid Daney	select SYS_SUPPORTS_SMP
8526e511163SDavid Daney	select NR_CPUS_DEFAULT_16
853e326479fSAndrew Bresticker	select BUILTIN_DTB
8548c1e6b14SDavid Daney	select MTD_COMPLEX_MAPPINGS
855a86c7f72SDavid Daney	help
856a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
857a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
858a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
859a86c7f72SDavid Daney	  Some of the supported boards are:
860a86c7f72SDavid Daney		EBT3000
861a86c7f72SDavid Daney		EBH3000
862a86c7f72SDavid Daney		EBH3100
863a86c7f72SDavid Daney		Thunder
864a86c7f72SDavid Daney		Kodama
865a86c7f72SDavid Daney		Hikari
866a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
867a86c7f72SDavid Daney
8687f058e85SJayachandran Cconfig NLM_XLR_BOARD
8697f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
8707f058e85SJayachandran C	select BOOT_ELF32
8717f058e85SJayachandran C	select NLM_COMMON
8727f058e85SJayachandran C	select SYS_HAS_CPU_XLR
8737f058e85SJayachandran C	select SYS_SUPPORTS_SMP
8747f058e85SJayachandran C	select HW_HAS_PCI
8757f058e85SJayachandran C	select SWAP_IO_SPACE
8767f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
8777f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
87834adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
8797f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
8807f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
8817f058e85SJayachandran C	select DMA_COHERENT
8827f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
8837f058e85SJayachandran C	select CEVT_R4K
8847f058e85SJayachandran C	select CSRC_R4K
88567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
886b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
8877f058e85SJayachandran C	select SYNC_R4K
8887f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
8898f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
8908f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
8917f058e85SJayachandran C	help
8927f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
8937f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
8947f058e85SJayachandran C
8951c773ea4SJayachandran Cconfig NLM_XLP_BOARD
8961c773ea4SJayachandran C	bool "Netlogic XLP based systems"
8971c773ea4SJayachandran C	select BOOT_ELF32
8981c773ea4SJayachandran C	select NLM_COMMON
8991c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
9001c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
9011c773ea4SJayachandran C	select HW_HAS_PCI
9021c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9031c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
90434adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
905079e3160SKamlakant Patel	select ARCH_REQUIRE_GPIOLIB
9061c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9071c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
9081c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9091c773ea4SJayachandran C	select DMA_COHERENT
9101c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
9111c773ea4SJayachandran C	select CEVT_R4K
9121c773ea4SJayachandran C	select CSRC_R4K
91367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
914b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9151c773ea4SJayachandran C	select SYNC_R4K
9161c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
9172f6528e1SJayachandran C	select USE_OF
9188f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9198f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9201c773ea4SJayachandran C	help
9211c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
9221c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
9231c773ea4SJayachandran C
9249bc463beSDavid Daneyconfig MIPS_PARAVIRT
9259bc463beSDavid Daney	bool "Para-Virtualized guest system"
9269bc463beSDavid Daney	select CEVT_R4K
9279bc463beSDavid Daney	select CSRC_R4K
9289bc463beSDavid Daney	select DMA_COHERENT
9299bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
9309bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
9319bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
9329bc463beSDavid Daney	select SYS_SUPPORTS_SMP
9339bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
9349bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
9359bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
9369bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
9379bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
9389bc463beSDavid Daney	select HW_HAS_PCI
9399bc463beSDavid Daney	select SWAP_IO_SPACE
9409bc463beSDavid Daney	help
9419bc463beSDavid Daney	  This option supports guest running under ????
9429bc463beSDavid Daney
9431da177e4SLinus Torvaldsendchoice
9441da177e4SLinus Torvalds
945e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
9463b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
947d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
948a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
949e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
9508945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig"
9515e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
9525ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
9538ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
9541f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
955af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig"
9560f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
957ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
95829c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
95938b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
96022b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
9615e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
962a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
96330ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig"
96430ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig"
9657f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
966ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
96738b18f72SRalf Baechle
9685e83d430SRalf Baechleendmenu
9695e83d430SRalf Baechle
9701da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
9711da177e4SLinus Torvalds	bool
9721da177e4SLinus Torvalds	default y
9731da177e4SLinus Torvalds
9741da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
9751da177e4SLinus Torvalds	bool
9761da177e4SLinus Torvalds
977f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
978f0d1b0b3SDavid Howells	bool
979f0d1b0b3SDavid Howells	default n
980f0d1b0b3SDavid Howells
981f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
982f0d1b0b3SDavid Howells	bool
983f0d1b0b3SDavid Howells	default n
984f0d1b0b3SDavid Howells
9853c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
9863c9ee7efSAkinobu Mita	bool
9873c9ee7efSAkinobu Mita	default y
9883c9ee7efSAkinobu Mita
9891da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
9901da177e4SLinus Torvalds	bool
9911da177e4SLinus Torvalds	default y
9921da177e4SLinus Torvalds
993ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
9941cc89038SAtsushi Nemoto	bool
9951cc89038SAtsushi Nemoto	default y
9961cc89038SAtsushi Nemoto
9971da177e4SLinus Torvalds#
9981da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
9991da177e4SLinus Torvalds#
10000e2794b0SRalf Baechleconfig FW_ARC
10011da177e4SLinus Torvalds	bool
10021da177e4SLinus Torvalds
100361ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
100461ed242dSRalf Baechle	bool
100561ed242dSRalf Baechle
10069267a30dSMarc St-Jeanconfig BOOT_RAW
10079267a30dSMarc St-Jean	bool
10089267a30dSMarc St-Jean
1009217dd11eSRalf Baechleconfig CEVT_BCM1480
1010217dd11eSRalf Baechle	bool
1011217dd11eSRalf Baechle
10126457d9fcSYoichi Yuasaconfig CEVT_DS1287
10136457d9fcSYoichi Yuasa	bool
10146457d9fcSYoichi Yuasa
10151097c6acSYoichi Yuasaconfig CEVT_GT641XX
10161097c6acSYoichi Yuasa	bool
10171097c6acSYoichi Yuasa
101842f77542SRalf Baechleconfig CEVT_R4K
101942f77542SRalf Baechle	bool
102042f77542SRalf Baechle
1021217dd11eSRalf Baechleconfig CEVT_SB1250
1022217dd11eSRalf Baechle	bool
1023217dd11eSRalf Baechle
1024229f773eSAtsushi Nemotoconfig CEVT_TXX9
1025229f773eSAtsushi Nemoto	bool
1026229f773eSAtsushi Nemoto
1027217dd11eSRalf Baechleconfig CSRC_BCM1480
1028217dd11eSRalf Baechle	bool
1029217dd11eSRalf Baechle
10304247417dSYoichi Yuasaconfig CSRC_IOASIC
10314247417dSYoichi Yuasa	bool
10324247417dSYoichi Yuasa
1033940f6b48SRalf Baechleconfig CSRC_R4K
1034940f6b48SRalf Baechle	bool
1035940f6b48SRalf Baechle
1036217dd11eSRalf Baechleconfig CSRC_SB1250
1037217dd11eSRalf Baechle	bool
1038217dd11eSRalf Baechle
1039a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
10407444a72eSMichael Buesch	select ARCH_REQUIRE_GPIOLIB
1041a9aec7feSAtsushi Nemoto	bool
1042a9aec7feSAtsushi Nemoto
10430e2794b0SRalf Baechleconfig FW_CFE
1044df78b5c8SAurelien Jarno	bool
1045df78b5c8SAurelien Jarno
10464bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
104734adb28dSRalf Baechle	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
10484bafad92SFUJITA Tomonori
104940e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES
105040e084a5SRalf Baechle	bool
105140e084a5SRalf Baechle
1052885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1053885014bcSFelix Fietkau	select DMA_NONCOHERENT
1054885014bcSFelix Fietkau	bool
1055885014bcSFelix Fietkau
10561da177e4SLinus Torvaldsconfig DMA_COHERENT
10571da177e4SLinus Torvalds	bool
10581da177e4SLinus Torvalds
10591da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
10601da177e4SLinus Torvalds	bool
1061e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
10624ce588cdSRalf Baechle
1063e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
10644ce588cdSRalf Baechle	bool
10651da177e4SLinus Torvalds
106636a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
10671da177e4SLinus Torvalds	bool
10681da177e4SLinus Torvalds
1069dbb74540SRalf Baechleconfig HOTPLUG_CPU
10701b2bc75cSRalf Baechle	bool "Support for hot-pluggable CPUs"
107140b31360SStephen Rothwell	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
10721b2bc75cSRalf Baechle	help
10731b2bc75cSRalf Baechle	  Say Y here to allow turning CPUs off and on. CPUs can be
10741b2bc75cSRalf Baechle	  controlled through /sys/devices/system/cpu.
10751b2bc75cSRalf Baechle	  (Note: power management support will enable this option
10761b2bc75cSRalf Baechle	    automatically on SMP systems. )
10771b2bc75cSRalf Baechle	  Say N if you want to disable CPU hotplug.
10781b2bc75cSRalf Baechle
10791b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1080dbb74540SRalf Baechle	bool
1081dbb74540SRalf Baechle
10821da177e4SLinus Torvaldsconfig MIPS_BONITO64
10831da177e4SLinus Torvalds	bool
10841da177e4SLinus Torvalds
10851da177e4SLinus Torvaldsconfig MIPS_MSC
10861da177e4SLinus Torvalds	bool
10871da177e4SLinus Torvalds
10881f21d2bdSBrian Murphyconfig MIPS_NILE4
10891f21d2bdSBrian Murphy	bool
10901f21d2bdSBrian Murphy
109139b8d525SRalf Baechleconfig SYNC_R4K
109239b8d525SRalf Baechle	bool
109339b8d525SRalf Baechle
1094487d70d0SGabor Juhosconfig MIPS_MACHINE
1095487d70d0SGabor Juhos	def_bool n
1096487d70d0SGabor Juhos
1097ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1098d388d685SMaciej W. Rozycki	def_bool n
1099d388d685SMaciej W. Rozycki
11004e0748f5SMarkos Chandrasconfig GENERIC_CSUM
11014e0748f5SMarkos Chandras	bool
11024e0748f5SMarkos Chandras
11038313da30SRalf Baechleconfig GENERIC_ISA_DMA
11048313da30SRalf Baechle	bool
11058313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1106a35bee8aSNamhyung Kim	select ISA_DMA_API
11078313da30SRalf Baechle
1108aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1109aa414dffSRalf Baechle	bool
11108313da30SRalf Baechle	select GENERIC_ISA_DMA
1111aa414dffSRalf Baechle
1112a35bee8aSNamhyung Kimconfig ISA_DMA_API
1113a35bee8aSNamhyung Kim	bool
1114a35bee8aSNamhyung Kim
1115465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1116465aaed0SDavid Daney	bool
1117465aaed0SDavid Daney
11185e83d430SRalf Baechle#
11196b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
11205e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
11215e83d430SRalf Baechle# choice statement should be more obvious to the user.
11225e83d430SRalf Baechle#
11235e83d430SRalf Baechlechoice
11246b2aac42SMasanari Iida	prompt "Endianness selection"
11251da177e4SLinus Torvalds	help
11261da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
11275e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
11283cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
11295e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
11303dde6ad8SDavid Sterba	  one or the other endianness.
11315e83d430SRalf Baechle
11325e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
11335e83d430SRalf Baechle	bool "Big endian"
11345e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
11355e83d430SRalf Baechle
11365e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
11375e83d430SRalf Baechle	bool "Little endian"
11385e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
11395e83d430SRalf Baechle
11405e83d430SRalf Baechleendchoice
11415e83d430SRalf Baechle
114222b0763aSDavid Daneyconfig EXPORT_UASM
114322b0763aSDavid Daney	bool
114422b0763aSDavid Daney
11452116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
11462116245eSRalf Baechle	bool
11472116245eSRalf Baechle
11485e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
11495e83d430SRalf Baechle	bool
11505e83d430SRalf Baechle
11515e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
11525e83d430SRalf Baechle	bool
11531da177e4SLinus Torvalds
11549cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
11559cffd154SDavid Daney	bool
11569cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
11579cffd154SDavid Daney	default y
11589cffd154SDavid Daney
1159aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1160aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1161aa1762f4SDavid Daney
11621da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
11631da177e4SLinus Torvalds	bool
11641da177e4SLinus Torvalds
11659267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
11669267a30dSMarc St-Jean	bool
11679267a30dSMarc St-Jean
11689267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
11699267a30dSMarc St-Jean	bool
11709267a30dSMarc St-Jean
11718420fd00SAtsushi Nemotoconfig IRQ_TXX9
11728420fd00SAtsushi Nemoto	bool
11738420fd00SAtsushi Nemoto
1174d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1175d5ab1a69SYoichi Yuasa	bool
1176d5ab1a69SYoichi Yuasa
1177252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
11781da177e4SLinus Torvalds	bool
11791da177e4SLinus Torvalds
11809267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
11819267a30dSMarc St-Jean	bool
11829267a30dSMarc St-Jean
1183a83860c2SRalf Baechleconfig SOC_EMMA2RH
1184a83860c2SRalf Baechle	bool
1185a83860c2SRalf Baechle	select CEVT_R4K
1186a83860c2SRalf Baechle	select CSRC_R4K
1187a83860c2SRalf Baechle	select DMA_NONCOHERENT
118867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1189a83860c2SRalf Baechle	select SWAP_IO_SPACE
1190a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1191a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1192a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1193a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1194a83860c2SRalf Baechle
1195edb6310aSDaniel Lairdconfig SOC_PNX833X
1196edb6310aSDaniel Laird	bool
1197edb6310aSDaniel Laird	select CEVT_R4K
1198edb6310aSDaniel Laird	select CSRC_R4K
119967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1200edb6310aSDaniel Laird	select DMA_NONCOHERENT
1201edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1202edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1203edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1204edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1205377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1206edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1207edb6310aSDaniel Laird
1208edb6310aSDaniel Lairdconfig SOC_PNX8335
1209edb6310aSDaniel Laird	bool
1210edb6310aSDaniel Laird	select SOC_PNX833X
1211edb6310aSDaniel Laird
1212a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1213a7e07b1aSMarkos Chandras	bool
1214a7e07b1aSMarkos Chandras
12151da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
12161da177e4SLinus Torvalds	bool
12171da177e4SLinus Torvalds
1218e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1219e2defae5SThomas Bogendoerfer	bool
1220e2defae5SThomas Bogendoerfer
12215b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
12225b438c44SThomas Bogendoerfer	bool
12235b438c44SThomas Bogendoerfer
1224e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1225e2defae5SThomas Bogendoerfer	bool
1226e2defae5SThomas Bogendoerfer
1227e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1228e2defae5SThomas Bogendoerfer	bool
1229e2defae5SThomas Bogendoerfer
1230e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1231e2defae5SThomas Bogendoerfer	bool
1232e2defae5SThomas Bogendoerfer
1233e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1234e2defae5SThomas Bogendoerfer	bool
1235e2defae5SThomas Bogendoerfer
1236e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1237e2defae5SThomas Bogendoerfer	bool
1238e2defae5SThomas Bogendoerfer
12390e2794b0SRalf Baechleconfig FW_ARC32
12405e83d430SRalf Baechle	bool
12415e83d430SRalf Baechle
1242aaa9fad3SPaul Bolleconfig FW_SNIPROM
1243231a35d3SThomas Bogendoerfer	bool
1244231a35d3SThomas Bogendoerfer
12451da177e4SLinus Torvaldsconfig BOOT_ELF32
12461da177e4SLinus Torvalds	bool
12471da177e4SLinus Torvalds
1248930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1249930beb5aSFlorian Fainelli	bool
1250930beb5aSFlorian Fainelli
1251930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1252930beb5aSFlorian Fainelli	bool
1253930beb5aSFlorian Fainelli
1254930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1255930beb5aSFlorian Fainelli	bool
1256930beb5aSFlorian Fainelli
1257930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1258930beb5aSFlorian Fainelli	bool
1259930beb5aSFlorian Fainelli
12601da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
12611da177e4SLinus Torvalds	int
1262a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
12635432eeb6SKevin Cernekee	default "6" if MIPS_L1_CACHE_SHIFT_6
12645432eeb6SKevin Cernekee	default "5" if MIPS_L1_CACHE_SHIFT_5
12655432eeb6SKevin Cernekee	default "4" if MIPS_L1_CACHE_SHIFT_4
12661da177e4SLinus Torvalds	default "5"
12671da177e4SLinus Torvalds
12681da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
12691da177e4SLinus Torvalds	bool
12701da177e4SLinus Torvalds
12711da177e4SLinus Torvaldsconfig ARC_CONSOLE
12721da177e4SLinus Torvalds	bool "ARC console support"
1273e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
12741da177e4SLinus Torvalds
12751da177e4SLinus Torvaldsconfig ARC_MEMORY
12761da177e4SLinus Torvalds	bool
127714b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
12781da177e4SLinus Torvalds	default y
12791da177e4SLinus Torvalds
12801da177e4SLinus Torvaldsconfig ARC_PROMLIB
12811da177e4SLinus Torvalds	bool
1282e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
12831da177e4SLinus Torvalds	default y
12841da177e4SLinus Torvalds
12850e2794b0SRalf Baechleconfig FW_ARC64
12861da177e4SLinus Torvalds	bool
12871da177e4SLinus Torvalds
12881da177e4SLinus Torvaldsconfig BOOT_ELF64
12891da177e4SLinus Torvalds	bool
12901da177e4SLinus Torvalds
12911da177e4SLinus Torvaldsmenu "CPU selection"
12921da177e4SLinus Torvalds
12931da177e4SLinus Torvaldschoice
12941da177e4SLinus Torvalds	prompt "CPU type"
12951da177e4SLinus Torvalds	default CPU_R4X00
12961da177e4SLinus Torvalds
12970e476d91SHuacai Chenconfig CPU_LOONGSON3
12980e476d91SHuacai Chen	bool "Loongson 3 CPU"
12990e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
13000e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
13010e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
13020e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
13030e476d91SHuacai Chen	select WEAK_ORDERING
13040e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
1305cbfb3ea7SHuacai Chen	select ARCH_REQUIRE_GPIOLIB
13060e476d91SHuacai Chen	help
13070e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
13080e476d91SHuacai Chen		set with many extensions.
13090e476d91SHuacai Chen
13103702bba5SWu Zhangjinconfig CPU_LOONGSON2E
13113702bba5SWu Zhangjin	bool "Loongson 2E"
13123702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
13133702bba5SWu Zhangjin	select CPU_LOONGSON2
13142a21c730SFuxin Zhang	help
13152a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
13162a21c730SFuxin Zhang	  with many extensions.
13172a21c730SFuxin Zhang
131825985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
13196f7a251aSWu Zhangjin	  bonito64.
13206f7a251aSWu Zhangjin
13216f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
13226f7a251aSWu Zhangjin	bool "Loongson 2F"
13236f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
13246f7a251aSWu Zhangjin	select CPU_LOONGSON2
1325c197da91SArnaud Patard	select ARCH_REQUIRE_GPIOLIB
13266f7a251aSWu Zhangjin	help
13276f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
13286f7a251aSWu Zhangjin	  with many extensions.
13296f7a251aSWu Zhangjin
13306f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
13316f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
13326f7a251aSWu Zhangjin	  Loongson2E.
13336f7a251aSWu Zhangjin
1334ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1335ca585cf9SKelvin Cheung	bool "Loongson 1B"
1336ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1337ca585cf9SKelvin Cheung	select CPU_LOONGSON1
1338ca585cf9SKelvin Cheung	help
1339ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1340ca585cf9SKelvin Cheung	  release 2 instruction set.
1341ca585cf9SKelvin Cheung
13426e760c8dSRalf Baechleconfig CPU_MIPS32_R1
13436e760c8dSRalf Baechle	bool "MIPS32 Release 1"
13447cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
13456e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1346797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1347ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13486e760c8dSRalf Baechle	help
13495e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13501e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13511e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13521e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
13531e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13541e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
13551e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
13561e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
13571e5f1caaSRalf Baechle	  performance.
13581e5f1caaSRalf Baechle
13591e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
13601e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
13617cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
13621e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1363797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1364ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1365a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
13662235a54dSSanjay Lal	select HAVE_KVM
13671e5f1caaSRalf Baechle	help
13685e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
13696e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13706e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13716e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
13726e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13731da177e4SLinus Torvalds
13747fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
1375674d10e2SMarkos Chandras	bool "MIPS32 Release 6"
13767fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
13777fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
13787fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
13797fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
13807fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
13814e0748f5SMarkos Chandras	select GENERIC_CSUM
13827fd08ca5SLeonid Yegoshin	select HAVE_KVM
13837fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
13847fd08ca5SLeonid Yegoshin	help
13857fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
13867fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
13877fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
13887fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
13897fd08ca5SLeonid Yegoshin
13906e760c8dSRalf Baechleconfig CPU_MIPS64_R1
13916e760c8dSRalf Baechle	bool "MIPS64 Release 1"
13927cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1393797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1394ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1395ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1396ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13979cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
13986e760c8dSRalf Baechle	help
13996e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
14006e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14016e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14026e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14036e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14041e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
14051e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
14061e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
14071e5f1caaSRalf Baechle	  performance.
14081e5f1caaSRalf Baechle
14091e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
14101e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
14117cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1412797798c1SRalf Baechle	select CPU_HAS_PREFETCH
14131e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
14141e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1415ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14169cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1417a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14181e5f1caaSRalf Baechle	help
14191e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14201e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14211e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14221e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
14231e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14241da177e4SLinus Torvalds
14257fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
1426674d10e2SMarkos Chandras	bool "MIPS64 Release 6"
14277fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
14287fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14297fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14307fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
14317fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14327fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14334e0748f5SMarkos Chandras	select GENERIC_CSUM
14344e9d324dSPaul Burton	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
14357fd08ca5SLeonid Yegoshin	help
14367fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14377fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
14387fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
14397fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
14407fd08ca5SLeonid Yegoshin
14411da177e4SLinus Torvaldsconfig CPU_R3000
14421da177e4SLinus Torvalds	bool "R3000"
14437cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1444f7062ddbSRalf Baechle	select CPU_HAS_WB
1445ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1446797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14471da177e4SLinus Torvalds	help
14481da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
14491da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
14501da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
14511da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
14521da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
14531da177e4SLinus Torvalds	  try to recompile with R3000.
14541da177e4SLinus Torvalds
14551da177e4SLinus Torvaldsconfig CPU_TX39XX
14561da177e4SLinus Torvalds	bool "R39XX"
14577cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1458ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
14591da177e4SLinus Torvalds
14601da177e4SLinus Torvaldsconfig CPU_VR41XX
14611da177e4SLinus Torvalds	bool "R41xx"
14627cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1463ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1464ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
14651da177e4SLinus Torvalds	help
14665e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
14671da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
14681da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
14691da177e4SLinus Torvalds	  processor or vice versa.
14701da177e4SLinus Torvalds
14711da177e4SLinus Torvaldsconfig CPU_R4300
14721da177e4SLinus Torvalds	bool "R4300"
14737cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1474ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1475ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
14761da177e4SLinus Torvalds	help
14771da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
14781da177e4SLinus Torvalds
14791da177e4SLinus Torvaldsconfig CPU_R4X00
14801da177e4SLinus Torvalds	bool "R4x00"
14817cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1482ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1483ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1484970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14851da177e4SLinus Torvalds	help
14861da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
14871da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
14881da177e4SLinus Torvalds
14891da177e4SLinus Torvaldsconfig CPU_TX49XX
14901da177e4SLinus Torvalds	bool "R49XX"
14917cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1492de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1493ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1494ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1495970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14961da177e4SLinus Torvalds
14971da177e4SLinus Torvaldsconfig CPU_R5000
14981da177e4SLinus Torvalds	bool "R5000"
14997cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1500ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1501ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1502970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15031da177e4SLinus Torvalds	help
15041da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
15051da177e4SLinus Torvalds
15061da177e4SLinus Torvaldsconfig CPU_R5432
15071da177e4SLinus Torvalds	bool "R5432"
15087cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
15095e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
15105e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1511970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15121da177e4SLinus Torvalds
1513542c1020SShinya Kuribayashiconfig CPU_R5500
1514542c1020SShinya Kuribayashi	bool "R5500"
1515542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1516542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1517542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
15189cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1519542c1020SShinya Kuribayashi	help
1520542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1521542c1020SShinya Kuribayashi	  instruction set.
1522542c1020SShinya Kuribayashi
15231da177e4SLinus Torvaldsconfig CPU_R6000
15241da177e4SLinus Torvalds	bool "R6000"
15257cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1526ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
15271da177e4SLinus Torvalds	help
15281da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1529c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
15301da177e4SLinus Torvalds
15311da177e4SLinus Torvaldsconfig CPU_NEVADA
15321da177e4SLinus Torvalds	bool "RM52xx"
15337cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1534ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1535ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1536970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15371da177e4SLinus Torvalds	help
15381da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
15391da177e4SLinus Torvalds
15401da177e4SLinus Torvaldsconfig CPU_R8000
15411da177e4SLinus Torvalds	bool "R8000"
15427cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
15435e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1544ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15451da177e4SLinus Torvalds	help
15461da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
15471da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
15481da177e4SLinus Torvalds
15491da177e4SLinus Torvaldsconfig CPU_R10000
15501da177e4SLinus Torvalds	bool "R10000"
15517cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
15525e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1553ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1554ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1555797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1556970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15571da177e4SLinus Torvalds	help
15581da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
15591da177e4SLinus Torvalds
15601da177e4SLinus Torvaldsconfig CPU_RM7000
15611da177e4SLinus Torvalds	bool "RM7000"
15627cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
15635e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1564ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1565ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1566797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1567970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15681da177e4SLinus Torvalds
15691da177e4SLinus Torvaldsconfig CPU_SB1
15701da177e4SLinus Torvalds	bool "SB1"
15717cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1572ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1573ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1574797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1575970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15760004a9dfSRalf Baechle	select WEAK_ORDERING
15771da177e4SLinus Torvalds
1578a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1579a86c7f72SDavid Daney	bool "Cavium Octeon processor"
15805e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1581a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1582a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1583a86c7f72SDavid Daney	select WEAK_ORDERING
1584a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
15859cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1586df115f3eSBen Hutchings	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1587df115f3eSBen Hutchings	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1588930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
1589a86c7f72SDavid Daney	help
1590a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1591a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1592a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1593a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1594a86c7f72SDavid Daney
1595cd746249SJonas Gorskiconfig CPU_BMIPS
1596cd746249SJonas Gorski	bool "Broadcom BMIPS"
1597cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1598cd746249SJonas Gorski	select CPU_MIPS32
1599fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1600cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1601cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1602cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1603cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1604cd746249SJonas Gorski	select DMA_NONCOHERENT
160567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1606cd746249SJonas Gorski	select SWAP_IO_SPACE
1607cd746249SJonas Gorski	select WEAK_ORDERING
1608c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
160969aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1610c1c0c461SKevin Cernekee	help
1611fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1612c1c0c461SKevin Cernekee
16137f058e85SJayachandran Cconfig CPU_XLR
16147f058e85SJayachandran C	bool "Netlogic XLR SoC"
16157f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
16167f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16177f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16187f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1619970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16207f058e85SJayachandran C	select WEAK_ORDERING
16217f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16227f058e85SJayachandran C	help
16237f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
16241c773ea4SJayachandran C
16251c773ea4SJayachandran Cconfig CPU_XLP
16261c773ea4SJayachandran C	bool "Netlogic XLP SoC"
16271c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
16281c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16291c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16301c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
16311c773ea4SJayachandran C	select WEAK_ORDERING
16321c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16331c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1634d6504846SJayachandran C	select CPU_MIPSR2
1635ddba6833SPrem Mallappa	select CPU_SUPPORTS_HUGEPAGES
16361c773ea4SJayachandran C	help
16371c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
16381da177e4SLinus Torvaldsendchoice
16391da177e4SLinus Torvalds
1640a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1641a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1642a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
16437fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1644a6e18781SLeonid Yegoshin	help
1645a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1646a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1647a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1648a6e18781SLeonid Yegoshin
1649a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1650a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1651a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1652a6e18781SLeonid Yegoshin	select EVA
1653a6e18781SLeonid Yegoshin	default y
1654a6e18781SLeonid Yegoshin	help
1655a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1656a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1657a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1658a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1659a6e18781SLeonid Yegoshin
1660c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES
1661c5b36783SSteven J. Hill	bool "MIPS32 Release 5 Features"
1662c5b36783SSteven J. Hill	depends on SYS_HAS_CPU_MIPS32_R5
1663c5b36783SSteven J. Hill	depends on CPU_MIPS32_R2
1664c5b36783SSteven J. Hill	help
1665c5b36783SSteven J. Hill	  Choose this option to build a kernel for release 2 or later of the
1666c5b36783SSteven J. Hill	  MIPS32 architecture including features from release 5 such as
1667c5b36783SSteven J. Hill	  support for Extended Physical Addressing (XPA).
1668c5b36783SSteven J. Hill
1669c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA
1670c5b36783SSteven J. Hill	bool "Extended Physical Addressing (XPA)"
1671c5b36783SSteven J. Hill	depends on CPU_MIPS32_R5_FEATURES
1672c5b36783SSteven J. Hill	depends on !EVA
1673c5b36783SSteven J. Hill	depends on !PAGE_SIZE_4KB
1674c5b36783SSteven J. Hill	depends on SYS_SUPPORTS_HIGHMEM
1675c5b36783SSteven J. Hill	select XPA
1676c5b36783SSteven J. Hill	select HIGHMEM
1677c5b36783SSteven J. Hill	select ARCH_PHYS_ADDR_T_64BIT
1678c5b36783SSteven J. Hill	default n
1679c5b36783SSteven J. Hill	help
1680c5b36783SSteven J. Hill	  Choose this option if you want to enable the Extended Physical
1681c5b36783SSteven J. Hill	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1682c5b36783SSteven J. Hill	  benefit is to increase physical addressing equal to or greater
1683c5b36783SSteven J. Hill	  than 40 bits. Note that this has the side effect of turning on
1684c5b36783SSteven J. Hill	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1685c5b36783SSteven J. Hill	  If unsure, say 'N' here.
1686c5b36783SSteven J. Hill
1687622844bfSWu Zhangjinif CPU_LOONGSON2F
1688622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1689622844bfSWu Zhangjin	bool
1690622844bfSWu Zhangjin
1691622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1692622844bfSWu Zhangjin	bool
1693622844bfSWu Zhangjin
1694622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1695622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1696622844bfSWu Zhangjin	default y
1697622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1698622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1699622844bfSWu Zhangjin	help
1700622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1701622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1702622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1703622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1704622844bfSWu Zhangjin
1705622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1706622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1707622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1708622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1709622844bfSWu Zhangjin	  systems.
1710622844bfSWu Zhangjin
1711622844bfSWu Zhangjin	  If unsure, please say Y.
1712622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1713622844bfSWu Zhangjin
17141b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
17151b93b3c3SWu Zhangjin	bool
17161b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
17171b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
171831c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
17191b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1720fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
17214e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
17221b93b3c3SWu Zhangjin
17231b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
17241b93b3c3SWu Zhangjin	bool
17251b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
17261b93b3c3SWu Zhangjin
17273702bba5SWu Zhangjinconfig CPU_LOONGSON2
17283702bba5SWu Zhangjin	bool
17293702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
17303702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
17313702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1732970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17333702bba5SWu Zhangjin
1734ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1735ca585cf9SKelvin Cheung	bool
1736ca585cf9SKelvin Cheung	select CPU_MIPS32
1737ca585cf9SKelvin Cheung	select CPU_MIPSR2
1738ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1739ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1740ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1741f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1742ca585cf9SKelvin Cheung
1743fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
174404fa8bf7SJonas Gorski	select SMP_UP if SMP
17451bbb6c1bSKevin Cernekee	bool
1746cd746249SJonas Gorski
1747cd746249SJonas Gorskiconfig CPU_BMIPS4350
1748cd746249SJonas Gorski	bool
1749cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1750cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1751cd746249SJonas Gorski
1752cd746249SJonas Gorskiconfig CPU_BMIPS4380
1753cd746249SJonas Gorski	bool
1754bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1755cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1756cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1757cd746249SJonas Gorski
1758cd746249SJonas Gorskiconfig CPU_BMIPS5000
1759cd746249SJonas Gorski	bool
1760cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1761bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1762cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1763cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
17641bbb6c1bSKevin Cernekee
17650e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
17660e476d91SHuacai Chen	bool
17670e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
17680e476d91SHuacai Chen
17693702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
17702a21c730SFuxin Zhang	bool
17712a21c730SFuxin Zhang
17726f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
17736f7a251aSWu Zhangjin	bool
177455045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
177555045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
177622f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
17776f7a251aSWu Zhangjin
1778ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1779ca585cf9SKelvin Cheung	bool
1780ca585cf9SKelvin Cheung
17817cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
17827cf8053bSRalf Baechle	bool
17837cf8053bSRalf Baechle
17847cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
17857cf8053bSRalf Baechle	bool
17867cf8053bSRalf Baechle
1787a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1788a6e18781SLeonid Yegoshin	bool
1789a6e18781SLeonid Yegoshin
1790c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5
1791c5b36783SSteven J. Hill	bool
1792c5b36783SSteven J. Hill
17937fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
17947fd08ca5SLeonid Yegoshin	bool
17957fd08ca5SLeonid Yegoshin
17967cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
17977cf8053bSRalf Baechle	bool
17987cf8053bSRalf Baechle
17997cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
18007cf8053bSRalf Baechle	bool
18017cf8053bSRalf Baechle
18027fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
18037fd08ca5SLeonid Yegoshin	bool
18047fd08ca5SLeonid Yegoshin
18057cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
18067cf8053bSRalf Baechle	bool
18077cf8053bSRalf Baechle
18087cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
18097cf8053bSRalf Baechle	bool
18107cf8053bSRalf Baechle
18117cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
18127cf8053bSRalf Baechle	bool
18137cf8053bSRalf Baechle
18147cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
18157cf8053bSRalf Baechle	bool
18167cf8053bSRalf Baechle
18177cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
18187cf8053bSRalf Baechle	bool
18197cf8053bSRalf Baechle
18207cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
18217cf8053bSRalf Baechle	bool
18227cf8053bSRalf Baechle
18237cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
18247cf8053bSRalf Baechle	bool
18257cf8053bSRalf Baechle
18267cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
18277cf8053bSRalf Baechle	bool
18287cf8053bSRalf Baechle
1829542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1830542c1020SShinya Kuribayashi	bool
1831542c1020SShinya Kuribayashi
18327cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
18337cf8053bSRalf Baechle	bool
18347cf8053bSRalf Baechle
18357cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
18367cf8053bSRalf Baechle	bool
18377cf8053bSRalf Baechle
18387cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
18397cf8053bSRalf Baechle	bool
18407cf8053bSRalf Baechle
18417cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
18427cf8053bSRalf Baechle	bool
18437cf8053bSRalf Baechle
18447cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
18457cf8053bSRalf Baechle	bool
18467cf8053bSRalf Baechle
18477cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
18487cf8053bSRalf Baechle	bool
18497cf8053bSRalf Baechle
18505e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
18515e683389SDavid Daney	bool
18525e683389SDavid Daney
1853cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1854c1c0c461SKevin Cernekee	bool
1855c1c0c461SKevin Cernekee
1856fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1857c1c0c461SKevin Cernekee	bool
1858cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1859c1c0c461SKevin Cernekee
1860c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1861c1c0c461SKevin Cernekee	bool
1862cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1863c1c0c461SKevin Cernekee
1864c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1865c1c0c461SKevin Cernekee	bool
1866cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1867c1c0c461SKevin Cernekee
1868c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1869c1c0c461SKevin Cernekee	bool
1870cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1871c1c0c461SKevin Cernekee
18727f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
18737f058e85SJayachandran C	bool
18747f058e85SJayachandran C
18751c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
18761c773ea4SJayachandran C	bool
18771c773ea4SJayachandran C
1878b6911bbaSPaul Burtonconfig MIPS_MALTA_PM
1879b6911bbaSPaul Burton	depends on MIPS_MALTA
1880b6911bbaSPaul Burton	depends on PCI
1881b6911bbaSPaul Burton	bool
1882b6911bbaSPaul Burton	default y
1883b6911bbaSPaul Burton
188417099b11SRalf Baechle#
188517099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
188617099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
188717099b11SRalf Baechle#
18880004a9dfSRalf Baechleconfig WEAK_ORDERING
18890004a9dfSRalf Baechle	bool
189017099b11SRalf Baechle
189117099b11SRalf Baechle#
189217099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
189317099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
189417099b11SRalf Baechle#
189517099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
189617099b11SRalf Baechle	bool
18975e83d430SRalf Baechleendmenu
18985e83d430SRalf Baechle
18995e83d430SRalf Baechle#
19005e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
19015e83d430SRalf Baechle#
19025e83d430SRalf Baechleconfig CPU_MIPS32
19035e83d430SRalf Baechle	bool
19047fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
19055e83d430SRalf Baechle
19065e83d430SRalf Baechleconfig CPU_MIPS64
19075e83d430SRalf Baechle	bool
19087fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
19095e83d430SRalf Baechle
19105e83d430SRalf Baechle#
1911c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
19125e83d430SRalf Baechle#
19135e83d430SRalf Baechleconfig CPU_MIPSR1
19145e83d430SRalf Baechle	bool
19155e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
19165e83d430SRalf Baechle
19175e83d430SRalf Baechleconfig CPU_MIPSR2
19185e83d430SRalf Baechle	bool
1919a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1920a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19215e83d430SRalf Baechle
19227fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
19237fd08ca5SLeonid Yegoshin	bool
19247fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1925a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19265e83d430SRalf Baechle
1927a6e18781SLeonid Yegoshinconfig EVA
1928a6e18781SLeonid Yegoshin	bool
1929a6e18781SLeonid Yegoshin
1930c5b36783SSteven J. Hillconfig XPA
1931c5b36783SSteven J. Hill	bool
1932c5b36783SSteven J. Hill
19335e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
19345e83d430SRalf Baechle	bool
19355e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
19365e83d430SRalf Baechle	bool
19375e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
19385e83d430SRalf Baechle	bool
19395e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
19405e83d430SRalf Baechle	bool
194155045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
194255045ff5SWu Zhangjin	bool
194355045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
194455045ff5SWu Zhangjin	bool
19459cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
19469cffd154SDavid Daney	bool
194722f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
194822f1fdfdSWu Zhangjin	bool
194982622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
195082622284SDavid Daney	bool
1951d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
19525e83d430SRalf Baechle
19538192c9eaSDavid Daney#
19548192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
19558192c9eaSDavid Daney#
19568192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
19578192c9eaSDavid Daney       bool
1958f839490aSDavid Daney       default y if CPU_MIPSR1 || CPU_MIPSR2
19598192c9eaSDavid Daney
19605e83d430SRalf Baechlemenu "Kernel type"
19615e83d430SRalf Baechle
19625e83d430SRalf Baechlechoice
19635e83d430SRalf Baechle	prompt "Kernel code model"
19645e83d430SRalf Baechle	help
19655e83d430SRalf Baechle	  You should only select this option if you have a workload that
19665e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
19675e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
19685e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
19695e83d430SRalf Baechle
19705e83d430SRalf Baechleconfig 32BIT
19715e83d430SRalf Baechle	bool "32-bit kernel"
19725e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
19735e83d430SRalf Baechle	select TRAD_SIGNALS
19745e83d430SRalf Baechle	help
19755e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
1976f17c4ca3SRalf Baechle
19775e83d430SRalf Baechleconfig 64BIT
19785e83d430SRalf Baechle	bool "64-bit kernel"
19795e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
19805e83d430SRalf Baechle	help
19815e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
19825e83d430SRalf Baechle
19835e83d430SRalf Baechleendchoice
19845e83d430SRalf Baechle
19852235a54dSSanjay Lalconfig KVM_GUEST
19862235a54dSSanjay Lal	bool "KVM Guest Kernel"
1987f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
19882235a54dSSanjay Lal	help
19892235a54dSSanjay Lal	  Select this option if building a guest kernel for KVM (Trap & Emulate) mode
19902235a54dSSanjay Lal
1991eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
1992eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
19932235a54dSSanjay Lal	depends on KVM_GUEST
1994eda3d33cSJames Hogan	default 100
19952235a54dSSanjay Lal	help
1996eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
1997eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
1998eda3d33cSJames Hogan	  timer frequency is specified directly.
19992235a54dSSanjay Lal
20001da177e4SLinus Torvaldschoice
20011da177e4SLinus Torvalds	prompt "Kernel page size"
20021da177e4SLinus Torvalds	default PAGE_SIZE_4KB
20031da177e4SLinus Torvalds
20041da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
20051da177e4SLinus Torvalds	bool "4kB"
20060e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
20071da177e4SLinus Torvalds	help
20081da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
20091da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
20101da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
20111da177e4SLinus Torvalds	 recommended for low memory systems.
20121da177e4SLinus Torvalds
20131da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
20141da177e4SLinus Torvalds	bool "8kB"
20157d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
20161da177e4SLinus Torvalds	help
20171da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
20181da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
2019c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
2020c52399beSRalf Baechle	  suitable Linux distribution to support this.
20211da177e4SLinus Torvalds
20221da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
20231da177e4SLinus Torvalds	bool "16kB"
2024714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
20251da177e4SLinus Torvalds	help
20261da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
20271da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
2028714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
2029714bfad6SRalf Baechle	  Linux distribution to support this.
20301da177e4SLinus Torvalds
2031c52399beSRalf Baechleconfig PAGE_SIZE_32KB
2032c52399beSRalf Baechle	bool "32kB"
2033c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
2034c52399beSRalf Baechle	help
2035c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
2036c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
2037c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
2038c52399beSRalf Baechle	  distribution to support this.
2039c52399beSRalf Baechle
20401da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
20411da177e4SLinus Torvalds	bool "64kB"
20427d60717eSKees Cook	depends on !CPU_R3000 && !CPU_TX39XX
20431da177e4SLinus Torvalds	help
20441da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
20451da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
20461da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
2047714bfad6SRalf Baechle	  writing this option is still high experimental.
20481da177e4SLinus Torvalds
20491da177e4SLinus Torvaldsendchoice
20501da177e4SLinus Torvalds
2051c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
2052c9bace7cSDavid Daney	int "Maximum zone order"
2053e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2054e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2055e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2056e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2057e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2058e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2059c9bace7cSDavid Daney	range 11 64
2060c9bace7cSDavid Daney	default "11"
2061c9bace7cSDavid Daney	help
2062c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
2063c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
2064c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
2065c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2066c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2067c9bace7cSDavid Daney	  increase this value.
2068c9bace7cSDavid Daney
2069c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2070c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2071c9bace7cSDavid Daney
2072c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2073c9bace7cSDavid Daney	  when choosing a value for this option.
2074c9bace7cSDavid Daney
20751da177e4SLinus Torvaldsconfig BOARD_SCACHE
20761da177e4SLinus Torvalds	bool
20771da177e4SLinus Torvalds
20781da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
20791da177e4SLinus Torvalds	bool
20801da177e4SLinus Torvalds	select BOARD_SCACHE
20811da177e4SLinus Torvalds
20829318c51aSChris Dearman#
20839318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
20849318c51aSChris Dearman#
20859318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
20869318c51aSChris Dearman	bool
20879318c51aSChris Dearman	select BOARD_SCACHE
20889318c51aSChris Dearman
20891da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
20901da177e4SLinus Torvalds	bool
20911da177e4SLinus Torvalds	select BOARD_SCACHE
20921da177e4SLinus Torvalds
20931da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
20941da177e4SLinus Torvalds	bool
20951da177e4SLinus Torvalds	select BOARD_SCACHE
20961da177e4SLinus Torvalds
20971da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
20981da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
20991da177e4SLinus Torvalds	depends on CPU_SB1
21001da177e4SLinus Torvalds	help
21011da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
21021da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
21031da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
21041da177e4SLinus Torvalds
21051da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2106c8094b53SRalf Baechle	bool
21071da177e4SLinus Torvalds
21083165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
21093165c846SFlorian Fainelli	bool
21103165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
21113165c846SFlorian Fainelli
211291405eb6SFlorian Fainelliconfig CPU_R4K_FPU
211391405eb6SFlorian Fainelli	bool
211491405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
211591405eb6SFlorian Fainelli
211662cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
211762cedc4fSFlorian Fainelli	bool
211862cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
211962cedc4fSFlorian Fainelli
212059d6ab86SRalf Baechleconfig MIPS_MT_SMP
2121a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
21225676319cSMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
212359d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2124d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2125c080faa5SSteven J. Hill	select SYNC_R4K
21260c2cb004SPaul Burton	select MIPS_GIC_IPI
212759d6ab86SRalf Baechle	select MIPS_MT
212859d6ab86SRalf Baechle	select SMP
212987353d8aSRalf Baechle	select SMP_UP
2130c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2131c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2132399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
213359d6ab86SRalf Baechle	help
2134c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2135c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2136c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2137c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2138c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
213959d6ab86SRalf Baechle
2140f41ae0b2SRalf Baechleconfig MIPS_MT
2141f41ae0b2SRalf Baechle	bool
2142f41ae0b2SRalf Baechle
21430ab7aefcSRalf Baechleconfig SCHED_SMT
21440ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
21450ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
21460ab7aefcSRalf Baechle	default n
21470ab7aefcSRalf Baechle	help
21480ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
21490ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
21500ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
21510ab7aefcSRalf Baechle
21520ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
21530ab7aefcSRalf Baechle	bool
21540ab7aefcSRalf Baechle
2155f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2156f41ae0b2SRalf Baechle	bool
2157f41ae0b2SRalf Baechle
2158f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2159f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2160f088fc84SRalf Baechle	default y
2161b633648cSRalf Baechle	depends on MIPS_MT_SMP
216207cc0c9eSRalf Baechle
2163b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2164b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
2165b0a668fbSLeonid Yegoshin	depends on CPU_MIPSR6 && !SMP
2166b0a668fbSLeonid Yegoshin	default y
2167b0a668fbSLeonid Yegoshin	help
2168b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2169b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
217007edf0d4SMarkos Chandras	  default. You can enable it using the 'mipsr2emu' kernel option.
2171b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2172b0a668fbSLeonid Yegoshin	  final kernel image.
2173b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels"
2174b0a668fbSLeonid Yegoshin	depends on SMP && CPU_MIPSR6
2175b0a668fbSLeonid Yegoshin
217607cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
217707cc0c9eSRalf Baechle	bool "VPE loader support."
2178704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
217907cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
218007cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
218107cc0c9eSRalf Baechle	select MIPS_MT
218207cc0c9eSRalf Baechle	help
218307cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
218407cc0c9eSRalf Baechle	  onto another VPE and running it.
2185f088fc84SRalf Baechle
218617a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
218717a1d523SDeng-Cheng Zhu	bool
218817a1d523SDeng-Cheng Zhu	default "y"
218917a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
219017a1d523SDeng-Cheng Zhu
21911a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
21921a2a6d7eSDeng-Cheng Zhu	bool
21931a2a6d7eSDeng-Cheng Zhu	default "y"
21941a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
21951a2a6d7eSDeng-Cheng Zhu
2196e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2197e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2198e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2199e01402b1SRalf Baechle	default y
2200e01402b1SRalf Baechle	help
2201e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2202e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2203e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2204e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2205e01402b1SRalf Baechle
2206e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2207e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2208e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
22095e83d430SRalf Baechle	help
2210e01402b1SRalf Baechle
2211da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2212da615cf6SDeng-Cheng Zhu	bool
2213da615cf6SDeng-Cheng Zhu	default "y"
2214da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2215da615cf6SDeng-Cheng Zhu
22162c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
22172c973ef0SDeng-Cheng Zhu	bool
22182c973ef0SDeng-Cheng Zhu	default "y"
22192c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
22202c973ef0SDeng-Cheng Zhu
22214a16ff4cSRalf Baechleconfig MIPS_CMP
22225cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
22235676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
222472e20142SPaul Burton	select MIPS_GIC_IPI
2225b10b43baSMarkos Chandras	select SMP
2226eb9b5141STim Anderson	select SYNC_R4K
2227b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
22284a16ff4cSRalf Baechle	select WEAK_ORDERING
22294a16ff4cSRalf Baechle	default n
22304a16ff4cSRalf Baechle	help
2231044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2232044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2233044505c7SPaul Burton	  its ability to start secondary CPUs.
22344a16ff4cSRalf Baechle
22355cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
22365cac93b3SPaul Burton	  instead of this.
22375cac93b3SPaul Burton
22380ee958e1SPaul Burtonconfig MIPS_CPS
22390ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
22405676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CPS && !CPU_MIPSR6
22410ee958e1SPaul Burton	select MIPS_CM
22420ee958e1SPaul Burton	select MIPS_CPC
22431d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
22440ee958e1SPaul Burton	select MIPS_GIC_IPI
22450ee958e1SPaul Burton	select SMP
22460ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
22471d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
22480ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
22490ee958e1SPaul Burton	select WEAK_ORDERING
22500ee958e1SPaul Burton	help
22510ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
22520ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
22530ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
22540ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
22550ee958e1SPaul Burton	  support is unavailable.
22560ee958e1SPaul Burton
22573179d37eSPaul Burtonconfig MIPS_CPS_PM
225839a59593SMarkos Chandras	depends on MIPS_CPS
2259a8b84677SPaul Burton	select MIPS_CPC
22603179d37eSPaul Burton	bool
22613179d37eSPaul Burton
226272e20142SPaul Burtonconfig MIPS_GIC_IPI
226372e20142SPaul Burton	bool
226472e20142SPaul Burton
22659f98f3ddSPaul Burtonconfig MIPS_CM
22669f98f3ddSPaul Burton	bool
22679f98f3ddSPaul Burton
22689c38cf44SPaul Burtonconfig MIPS_CPC
22699c38cf44SPaul Burton	bool
22702600990eSRalf Baechle
22711da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
22721da177e4SLinus Torvalds	bool
22731da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
22741da177e4SLinus Torvalds	default y
22751da177e4SLinus Torvalds
22761da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
22771da177e4SLinus Torvalds	bool
22781da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
22791da177e4SLinus Torvalds	default y
22801da177e4SLinus Torvalds
22812235a54dSSanjay Lal
228260ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
228334adb28dSRalf Baechle       bool
228460ec6571Spascal@pabr.org
22859e2b5372SMarkos Chandraschoice
22869e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
22879e2b5372SMarkos Chandras
22889e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
22899e2b5372SMarkos Chandras	bool "None"
22909e2b5372SMarkos Chandras	help
22919e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
22929e2b5372SMarkos Chandras
22939693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
22949693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
22959e2b5372SMarkos Chandras	bool "SmartMIPS"
22969693a853SFranck Bui-Huu	help
22979693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
22989693a853SFranck Bui-Huu	  increased security at both hardware and software level for
22999693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
23009693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
23019693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
23029693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
23039693a853SFranck Bui-Huu	  here.
23049693a853SFranck Bui-Huu
2305bce86083SSteven J. Hillconfig CPU_MICROMIPS
23067fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
23079e2b5372SMarkos Chandras	bool "microMIPS"
2308bce86083SSteven J. Hill	help
2309bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2310bce86083SSteven J. Hill	  microMIPS ISA
2311bce86083SSteven J. Hill
23129e2b5372SMarkos Chandrasendchoice
23139e2b5372SMarkos Chandras
2314a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
23150ce3417eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2316a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
23172a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2318a5e9a69eSPaul Burton	help
2319a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2320a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
23211db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
23221db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
23231db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
23241db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
23251db1af84SPaul Burton	  the size & complexity of your kernel.
2326a5e9a69eSPaul Burton
2327a5e9a69eSPaul Burton	  If unsure, say Y.
2328a5e9a69eSPaul Burton
23291da177e4SLinus Torvaldsconfig CPU_HAS_WB
2330f7062ddbSRalf Baechle	bool
2331e01402b1SRalf Baechle
2332df0ac8a4SKevin Cernekeeconfig XKS01
2333df0ac8a4SKevin Cernekee	bool
2334df0ac8a4SKevin Cernekee
2335f41ae0b2SRalf Baechle#
2336f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2337f41ae0b2SRalf Baechle#
2338e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2339f41ae0b2SRalf Baechle	bool
2340e01402b1SRalf Baechle
2341f41ae0b2SRalf Baechle#
2342f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2343f41ae0b2SRalf Baechle#
2344e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2345f41ae0b2SRalf Baechle	bool
2346e01402b1SRalf Baechle
23471da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
23481da177e4SLinus Torvalds	bool
23491da177e4SLinus Torvalds	depends on !CPU_R3000
23501da177e4SLinus Torvalds	default y
23511da177e4SLinus Torvalds
23521da177e4SLinus Torvalds#
235320d60d99SMaciej W. Rozycki# CPU non-features
235420d60d99SMaciej W. Rozycki#
235520d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
235620d60d99SMaciej W. Rozycki	bool
235720d60d99SMaciej W. Rozycki
235820d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
235920d60d99SMaciej W. Rozycki	bool
236020d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
236120d60d99SMaciej W. Rozycki
236220d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
236320d60d99SMaciej W. Rozycki	bool
236420d60d99SMaciej W. Rozycki
236520d60d99SMaciej W. Rozycki#
23661da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
23671da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
23681da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
23691da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
23701da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
23711da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
23721da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
23731da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2374797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2375797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2376797798c1SRalf Baechle#   support.
23771da177e4SLinus Torvalds#
23781da177e4SLinus Torvaldsconfig HIGHMEM
23791da177e4SLinus Torvalds	bool "High Memory Support"
2380a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2381797798c1SRalf Baechle
2382797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2383797798c1SRalf Baechle	bool
2384797798c1SRalf Baechle
2385797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2386797798c1SRalf Baechle	bool
23871da177e4SLinus Torvalds
23889693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
23899693a853SFranck Bui-Huu	bool
23909693a853SFranck Bui-Huu
2391a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2392a6a4834cSSteven J. Hill	bool
2393a6a4834cSSteven J. Hill
2394377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2395377cb1b6SRalf Baechle	bool
2396377cb1b6SRalf Baechle	help
2397377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2398377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2399377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2400377cb1b6SRalf Baechle
2401a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2402a5e9a69eSPaul Burton	bool
2403a5e9a69eSPaul Burton
2404b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2405b4819b59SYoichi Yuasa	def_bool y
2406f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2407b4819b59SYoichi Yuasa
2408d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2409d8cb4e11SRalf Baechle	bool
2410d8cb4e11SRalf Baechle	default y if SGI_IP27
2411d8cb4e11SRalf Baechle	help
24123dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2413d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2414d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2415d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2416d8cb4e11SRalf Baechle
2417b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2418b1c6cd42SAtsushi Nemoto	bool
24197de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
242031473747SAtsushi Nemoto
2421d8cb4e11SRalf Baechleconfig NUMA
2422d8cb4e11SRalf Baechle	bool "NUMA Support"
2423d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2424d8cb4e11SRalf Baechle	help
2425d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2426d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2427d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2428d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2429d8cb4e11SRalf Baechle	  disabled.
2430d8cb4e11SRalf Baechle
2431d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2432d8cb4e11SRalf Baechle	bool
2433d8cb4e11SRalf Baechle
2434c80d79d7SYasunori Gotoconfig NODES_SHIFT
2435c80d79d7SYasunori Goto	int
2436c80d79d7SYasunori Goto	default "6"
2437c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2438c80d79d7SYasunori Goto
243914f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
244014f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
2441f14ceff7SHuacai Chen	depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
244214f70012SDeng-Cheng Zhu	default y
244314f70012SDeng-Cheng Zhu	help
244414f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
244514f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
244614f70012SDeng-Cheng Zhu
2447b4819b59SYoichi Yuasasource "mm/Kconfig"
2448b4819b59SYoichi Yuasa
24491da177e4SLinus Torvaldsconfig SMP
24501da177e4SLinus Torvalds	bool "Multi-Processing support"
2451e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2452e73ea273SRalf Baechle	help
24531da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
24544a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
24554a474157SRobert Graffham	  than one CPU, say Y.
24561da177e4SLinus Torvalds
24574a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
24581da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
24591da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
24604a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
24611da177e4SLinus Torvalds	  will run faster if you say N here.
24621da177e4SLinus Torvalds
24631da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
24641da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
24651da177e4SLinus Torvalds
246603502faaSAdrian Bunk	  See also the SMP-HOWTO available at
246703502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
24681da177e4SLinus Torvalds
24691da177e4SLinus Torvalds	  If you don't know what to do here, say N.
24701da177e4SLinus Torvalds
247187353d8aSRalf Baechleconfig SMP_UP
247287353d8aSRalf Baechle	bool
247387353d8aSRalf Baechle
24744a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
24754a16ff4cSRalf Baechle	bool
24764a16ff4cSRalf Baechle
24770ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
24780ee958e1SPaul Burton	bool
24790ee958e1SPaul Burton
2480e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2481e73ea273SRalf Baechle	bool
2482e73ea273SRalf Baechle
2483130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2484130e2fb7SRalf Baechle	bool
2485130e2fb7SRalf Baechle
2486130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2487130e2fb7SRalf Baechle	bool
2488130e2fb7SRalf Baechle
2489130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2490130e2fb7SRalf Baechle	bool
2491130e2fb7SRalf Baechle
2492130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2493130e2fb7SRalf Baechle	bool
2494130e2fb7SRalf Baechle
2495130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2496130e2fb7SRalf Baechle	bool
2497130e2fb7SRalf Baechle
24981da177e4SLinus Torvaldsconfig NR_CPUS
2499a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2500a91796a9SJayachandran C	range 2 256
25011da177e4SLinus Torvalds	depends on SMP
2502130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2503130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2504130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2505130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2506130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
25071da177e4SLinus Torvalds	help
25081da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
25091da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
25101da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
251172ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
251272ede9b1SAtsushi Nemoto	  and 2 for all others.
25131da177e4SLinus Torvalds
25141da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
251572ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
251672ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
251772ede9b1SAtsushi Nemoto	  power of two.
25181da177e4SLinus Torvalds
2519399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2520399aaa25SAl Cooper	bool
2521399aaa25SAl Cooper
25221723b4a3SAtsushi Nemoto#
25231723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
25241723b4a3SAtsushi Nemoto#
25251723b4a3SAtsushi Nemoto
25261723b4a3SAtsushi Nemotochoice
25271723b4a3SAtsushi Nemoto	prompt "Timer frequency"
25281723b4a3SAtsushi Nemoto	default HZ_250
25291723b4a3SAtsushi Nemoto	help
25301723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
25311723b4a3SAtsushi Nemoto
25321723b4a3SAtsushi Nemoto	config HZ_48
25330f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
25341723b4a3SAtsushi Nemoto
25351723b4a3SAtsushi Nemoto	config HZ_100
25361723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
25371723b4a3SAtsushi Nemoto
25381723b4a3SAtsushi Nemoto	config HZ_128
25391723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
25401723b4a3SAtsushi Nemoto
25411723b4a3SAtsushi Nemoto	config HZ_250
25421723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
25431723b4a3SAtsushi Nemoto
25441723b4a3SAtsushi Nemoto	config HZ_256
25451723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
25461723b4a3SAtsushi Nemoto
25471723b4a3SAtsushi Nemoto	config HZ_1000
25481723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
25491723b4a3SAtsushi Nemoto
25501723b4a3SAtsushi Nemoto	config HZ_1024
25511723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
25521723b4a3SAtsushi Nemoto
25531723b4a3SAtsushi Nemotoendchoice
25541723b4a3SAtsushi Nemoto
25551723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
25561723b4a3SAtsushi Nemoto	bool
25571723b4a3SAtsushi Nemoto
25581723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
25591723b4a3SAtsushi Nemoto	bool
25601723b4a3SAtsushi Nemoto
25611723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
25621723b4a3SAtsushi Nemoto	bool
25631723b4a3SAtsushi Nemoto
25641723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
25651723b4a3SAtsushi Nemoto	bool
25661723b4a3SAtsushi Nemoto
25671723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
25681723b4a3SAtsushi Nemoto	bool
25691723b4a3SAtsushi Nemoto
25701723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
25711723b4a3SAtsushi Nemoto	bool
25721723b4a3SAtsushi Nemoto
25731723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
25741723b4a3SAtsushi Nemoto	bool
25751723b4a3SAtsushi Nemoto
25761723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
25771723b4a3SAtsushi Nemoto	bool
25781723b4a3SAtsushi Nemoto	default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
25791723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
25801723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
25811723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
25821723b4a3SAtsushi Nemoto
25831723b4a3SAtsushi Nemotoconfig HZ
25841723b4a3SAtsushi Nemoto	int
25851723b4a3SAtsushi Nemoto	default 48 if HZ_48
25861723b4a3SAtsushi Nemoto	default 100 if HZ_100
25871723b4a3SAtsushi Nemoto	default 128 if HZ_128
25881723b4a3SAtsushi Nemoto	default 250 if HZ_250
25891723b4a3SAtsushi Nemoto	default 256 if HZ_256
25901723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
25911723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
25921723b4a3SAtsushi Nemoto
259396685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
259496685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
259596685b17SDeng-Cheng Zhu
2596e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
25971da177e4SLinus Torvalds
2598ea6e942bSAtsushi Nemotoconfig KEXEC
25997d60717eSKees Cook	bool "Kexec system call"
2600*2965faa5SDave Young	select KEXEC_CORE
2601ea6e942bSAtsushi Nemoto	help
2602ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2603ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
26043dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2605ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2606ea6e942bSAtsushi Nemoto
260701dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2608ea6e942bSAtsushi Nemoto
2609ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2610ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2611bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2612bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2613bf220695SGeert Uytterhoeven	  made.
2614ea6e942bSAtsushi Nemoto
26157aa1c8f4SRalf Baechleconfig CRASH_DUMP
26167aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
26177aa1c8f4SRalf Baechle	  help
26187aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
26197aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
26207aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
26217aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
26227aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
26237aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
26247aa1c8f4SRalf Baechle	  PHYSICAL_START.
26257aa1c8f4SRalf Baechle
26267aa1c8f4SRalf Baechleconfig PHYSICAL_START
26277aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
26287aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
26297aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
26307aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
26317aa1c8f4SRalf Baechle	  help
26327aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
26337aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
26347aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
26357aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
26367aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
26377aa1c8f4SRalf Baechle
2638ea6e942bSAtsushi Nemotoconfig SECCOMP
2639ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2640293c5bd1SRalf Baechle	depends on PROC_FS
2641ea6e942bSAtsushi Nemoto	default y
2642ea6e942bSAtsushi Nemoto	help
2643ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2644ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2645ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2646ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2647ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2648ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2649ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2650ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2651ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2652ea6e942bSAtsushi Nemoto
2653ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2654ea6e942bSAtsushi Nemoto
2655597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
26560ce3417eSPaul Burton	bool "Support for O32 binaries using 64-bit FP"
2657597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2658597ce172SPaul Burton	help
2659597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2660597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2661597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2662597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2663597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2664597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2665597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2666597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2667597ce172SPaul Burton	  saying N here.
2668597ce172SPaul Burton
266906e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
267006e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
267106e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
267206e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
267306e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
267406e2e882SPaul Burton	  said details.
267506e2e882SPaul Burton
267606e2e882SPaul Burton	  If unsure, say N.
2677597ce172SPaul Burton
2678f2ffa5abSDezhong Diaoconfig USE_OF
26790b3e06fdSJonas Gorski	bool
2680f2ffa5abSDezhong Diao	select OF
2681e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2682abd2363fSGrant Likely	select IRQ_DOMAIN
2683f2ffa5abSDezhong Diao
26847fafb068SAndrew Brestickerconfig BUILTIN_DTB
26857fafb068SAndrew Bresticker	bool
26867fafb068SAndrew Bresticker
26871da8f179SJonas Gorskichoice
26881da8f179SJonas Gorski	prompt "Kernel appended dtb support" if OF
26891da8f179SJonas Gorski	default MIPS_NO_APPENDED_DTB
26901da8f179SJonas Gorski
26911da8f179SJonas Gorski	config MIPS_NO_APPENDED_DTB
26921da8f179SJonas Gorski		bool "None"
26931da8f179SJonas Gorski		help
26941da8f179SJonas Gorski		  Do not enable appended dtb support.
26951da8f179SJonas Gorski
26961da8f179SJonas Gorski	config MIPS_RAW_APPENDED_DTB
26971da8f179SJonas Gorski		bool "vmlinux.bin"
26981da8f179SJonas Gorski		help
26991da8f179SJonas Gorski		  With this option, the boot code will look for a device tree binary
27001da8f179SJonas Gorski		  DTB) appended to raw vmlinux.bin (without decompressor).
27011da8f179SJonas Gorski		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
27021da8f179SJonas Gorski
27031da8f179SJonas Gorski		  This is meant as a backward compatibility convenience for those
27041da8f179SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
27051da8f179SJonas Gorski		  the documented boot protocol using a device tree.
27061da8f179SJonas Gorski
27071da8f179SJonas Gorski		  Beware that there is very little in terms of protection against
27081da8f179SJonas Gorski		  this option being confused by leftover garbage in memory that might
27091da8f179SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
27101da8f179SJonas Gorski		  to vmlinux.bin.  Do not leave this option active in a production kernel
27111da8f179SJonas Gorski		  if you don't intend to always append a DTB.
2712c0b4e101SJonas Gorski
2713c0b4e101SJonas Gorski	config MIPS_ZBOOT_APPENDED_DTB
2714c0b4e101SJonas Gorski		bool "vmlinuz.bin"
2715c0b4e101SJonas Gorski		depends on SYS_SUPPORTS_ZBOOT
2716c0b4e101SJonas Gorski		help
2717c0b4e101SJonas Gorski		  With this option, the boot code will look for a device tree binary
2718c0b4e101SJonas Gorski		  DTB) appended to raw vmlinuz.bin (with decompressor).
2719c0b4e101SJonas Gorski		  (e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb).
2720c0b4e101SJonas Gorski
2721c0b4e101SJonas Gorski		  This is meant as a backward compatibility convenience for those
2722c0b4e101SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
2723c0b4e101SJonas Gorski		  the documented boot protocol using a device tree.
2724c0b4e101SJonas Gorski
2725c0b4e101SJonas Gorski		  Beware that there is very little in terms of protection against
2726c0b4e101SJonas Gorski		  this option being confused by leftover garbage in memory that might
2727c0b4e101SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
2728c0b4e101SJonas Gorski		  to vmlinuz.bin.  Do not leave this option active in a production kernel
2729c0b4e101SJonas Gorski		  if you don't intend to always append a DTB.
27301da8f179SJonas Gorskiendchoice
27311da8f179SJonas Gorski
27325e83d430SRalf Baechleendmenu
27335e83d430SRalf Baechle
27341df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
27351df0f0ffSAtsushi Nemoto	bool
27361df0f0ffSAtsushi Nemoto	default y
27371df0f0ffSAtsushi Nemoto
27381df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
27391df0f0ffSAtsushi Nemoto	bool
27401df0f0ffSAtsushi Nemoto	default y
27411df0f0ffSAtsushi Nemoto
2742a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS
2743a728ab52SKirill A. Shutemov	int
2744a728ab52SKirill A. Shutemov	default 3 if 64BIT && !PAGE_SIZE_64KB
2745a728ab52SKirill A. Shutemov	default 2
2746a728ab52SKirill A. Shutemov
2747b6c3539bSRalf Baechlesource "init/Kconfig"
2748b6c3539bSRalf Baechle
2749dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2750dc52ddc0SMatt Helsley
27511da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
27521da177e4SLinus Torvalds
27535e83d430SRalf Baechleconfig HW_HAS_EISA
27545e83d430SRalf Baechle	bool
27551da177e4SLinus Torvaldsconfig HW_HAS_PCI
27561da177e4SLinus Torvalds	bool
27571da177e4SLinus Torvalds
27581da177e4SLinus Torvaldsconfig PCI
27591da177e4SLinus Torvalds	bool "Support for PCI controller"
27601da177e4SLinus Torvalds	depends on HW_HAS_PCI
2761abb4ae46SRalf Baechle	select PCI_DOMAINS
27620f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
27631da177e4SLinus Torvalds	help
27641da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
27651da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
27661da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
27671da177e4SLinus Torvalds	  say Y, otherwise N.
27681da177e4SLinus Torvalds
27690e476d91SHuacai Chenconfig HT_PCI
27700e476d91SHuacai Chen	bool "Support for HT-linked PCI"
27710e476d91SHuacai Chen	default y
27720e476d91SHuacai Chen	depends on CPU_LOONGSON3
27730e476d91SHuacai Chen	select PCI
27740e476d91SHuacai Chen	select PCI_DOMAINS
27750e476d91SHuacai Chen	help
27760e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
27770e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
27780e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
27790e476d91SHuacai Chen
27801da177e4SLinus Torvaldsconfig PCI_DOMAINS
27811da177e4SLinus Torvalds	bool
27821da177e4SLinus Torvalds
27831da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
27841da177e4SLinus Torvalds
27853f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig"
27863f787ca4SJonas Gorski
27871da177e4SLinus Torvalds#
27881da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
27891da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
27901da177e4SLinus Torvalds# users to choose the right thing ...
27911da177e4SLinus Torvalds#
27921da177e4SLinus Torvaldsconfig ISA
27931da177e4SLinus Torvalds	bool
27941da177e4SLinus Torvalds
27951da177e4SLinus Torvaldsconfig EISA
27961da177e4SLinus Torvalds	bool "EISA support"
27975e83d430SRalf Baechle	depends on HW_HAS_EISA
27981da177e4SLinus Torvalds	select ISA
2799aa414dffSRalf Baechle	select GENERIC_ISA_DMA
28001da177e4SLinus Torvalds	---help---
28011da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
28021da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
28031da177e4SLinus Torvalds
28041da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
28051da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
28061da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
28071da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
28081da177e4SLinus Torvalds
28091da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
28101da177e4SLinus Torvalds
28111da177e4SLinus Torvalds	  Otherwise, say N.
28121da177e4SLinus Torvalds
28131da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
28141da177e4SLinus Torvalds
28151da177e4SLinus Torvaldsconfig TC
28161da177e4SLinus Torvalds	bool "TURBOchannel support"
28171da177e4SLinus Torvalds	depends on MACH_DECSTATION
28181da177e4SLinus Torvalds	help
281950a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
282050a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
282150a23e6eSJustin P. Mattock	  at:
282250a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
282350a23e6eSJustin P. Mattock	  and:
282450a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
282550a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
282650a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
28271da177e4SLinus Torvalds
28281da177e4SLinus Torvaldsconfig MMU
28291da177e4SLinus Torvalds	bool
28301da177e4SLinus Torvalds	default y
28311da177e4SLinus Torvalds
2832d865bea4SRalf Baechleconfig I8253
2833d865bea4SRalf Baechle	bool
2834798778b8SRussell King	select CLKSRC_I8253
28352d02612fSThomas Gleixner	select CLKEVT_I8253
28369726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
2837d865bea4SRalf Baechle
2838e05eb3f8SRalf Baechleconfig ZONE_DMA
2839e05eb3f8SRalf Baechle	bool
2840e05eb3f8SRalf Baechle
2841cce335aeSRalf Baechleconfig ZONE_DMA32
2842cce335aeSRalf Baechle	bool
2843cce335aeSRalf Baechle
28441da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
28451da177e4SLinus Torvalds
28461da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig"
28471da177e4SLinus Torvalds
2848388b78adSAlexandre Bounineconfig RAPIDIO
284956abde72SAlexandre Bounine	tristate "RapidIO support"
2850388b78adSAlexandre Bounine	depends on PCI
2851388b78adSAlexandre Bounine	default n
2852388b78adSAlexandre Bounine	help
2853388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
2854388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
2855388b78adSAlexandre Bounine
2856388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
2857388b78adSAlexandre Bounine
28581da177e4SLinus Torvaldsendmenu
28591da177e4SLinus Torvalds
28601da177e4SLinus Torvaldsmenu "Executable file formats"
28611da177e4SLinus Torvalds
28621da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
28631da177e4SLinus Torvalds
28641da177e4SLinus Torvaldsconfig TRAD_SIGNALS
28651da177e4SLinus Torvalds	bool
28661da177e4SLinus Torvalds
28671da177e4SLinus Torvaldsconfig MIPS32_COMPAT
286878aaf956SRalf Baechle	bool
28691da177e4SLinus Torvalds
28701da177e4SLinus Torvaldsconfig COMPAT
28711da177e4SLinus Torvalds	bool
28721da177e4SLinus Torvalds
287305e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
287405e43966SAtsushi Nemoto	bool
287505e43966SAtsushi Nemoto
28761da177e4SLinus Torvaldsconfig MIPS32_O32
28771da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
287878aaf956SRalf Baechle	depends on 64BIT
287978aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
288078aaf956SRalf Baechle	select COMPAT
288178aaf956SRalf Baechle	select MIPS32_COMPAT
288278aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
28831da177e4SLinus Torvalds	help
28841da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
28851da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
28861da177e4SLinus Torvalds	  existing binaries are in this format.
28871da177e4SLinus Torvalds
28881da177e4SLinus Torvalds	  If unsure, say Y.
28891da177e4SLinus Torvalds
28901da177e4SLinus Torvaldsconfig MIPS32_N32
28911da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
2892c22eacfeSRalf Baechle	depends on 64BIT
289378aaf956SRalf Baechle	select COMPAT
289478aaf956SRalf Baechle	select MIPS32_COMPAT
289578aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
28961da177e4SLinus Torvalds	help
28971da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
28981da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
28991da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
29001da177e4SLinus Torvalds	  cases.
29011da177e4SLinus Torvalds
29021da177e4SLinus Torvalds	  If unsure, say N.
29031da177e4SLinus Torvalds
29041da177e4SLinus Torvaldsconfig BINFMT_ELF32
29051da177e4SLinus Torvalds	bool
29061da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
29071da177e4SLinus Torvalds
29082116245eSRalf Baechleendmenu
29091da177e4SLinus Torvalds
29102116245eSRalf Baechlemenu "Power management options"
2911952fa954SRodolfo Giometti
2912363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
2913363c55caSWu Zhangjin	def_bool y
29143f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2915363c55caSWu Zhangjin
2916f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
2917f4cb5700SJohannes Berg	def_bool y
29183f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2919f4cb5700SJohannes Berg
29202116245eSRalf Baechlesource "kernel/power/Kconfig"
2921952fa954SRodolfo Giometti
29221da177e4SLinus Torvaldsendmenu
29231da177e4SLinus Torvalds
29247a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
29257a998935SViresh Kumar	bool
29267a998935SViresh Kumar
29277a998935SViresh Kumarmenu "CPU Power Management"
2928c095ebafSPaul Burton
2929c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
29307a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
29317a998935SViresh Kumarendif
29329726b43aSWu Zhangjin
2933c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
2934c095ebafSPaul Burton
2935c095ebafSPaul Burtonendmenu
2936c095ebafSPaul Burton
2937d5950b43SSam Ravnborgsource "net/Kconfig"
2938d5950b43SSam Ravnborg
29391da177e4SLinus Torvaldssource "drivers/Kconfig"
29401da177e4SLinus Torvalds
294198cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
294298cdee0eSRalf Baechle
29431da177e4SLinus Torvaldssource "fs/Kconfig"
29441da177e4SLinus Torvalds
29451da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
29461da177e4SLinus Torvalds
29471da177e4SLinus Torvaldssource "security/Kconfig"
29481da177e4SLinus Torvalds
29491da177e4SLinus Torvaldssource "crypto/Kconfig"
29501da177e4SLinus Torvalds
29511da177e4SLinus Torvaldssource "lib/Kconfig"
29522235a54dSSanjay Lal
29532235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
2954