11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 5393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 6c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 7f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 8ec7748b5SSam Ravnborg select HAVE_IDE 942d4b839SMathieu Desnoyers select HAVE_OPROFILE 107f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 117f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1288547001SJason Wessel select HAVE_ARCH_KGDB 13c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 147563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 15d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 1669a7d1b3SWu Zhangjin select HAVE_FUNCTION_TRACE_MCOUNT_TEST 17538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 18538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 1964575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2029c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 21c1bf207dSDavid Daney select HAVE_KPROBES 22c1bf207dSDavid Daney select HAVE_KRETPROBES 23b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 241d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 25e26d196cSDavid Daney select ARCH_BINFMT_ELF_RANDOMIZE_PIE 26383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 2721a41faaSWu Zhangjin select RTC_LIB if !MACH_LOONGSON 282b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 297463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3048e1fd5aSDavid Daney select HAVE_DMA_ATTRS 3148e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 323bd27e32SDavid Daney select GENERIC_IRQ_PROBE 33f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3478857614SMarkos Chandras select GENERIC_PCI_IOMAP 3594bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 36c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 370f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 389d15ffc8STejun Heo select HAVE_MEMBLOCK 399d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 409d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 41360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 424b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 43cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 44cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 45786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 464febd95aSStephen Rothwell select VIRT_TO_BUS 472f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 482f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 4950150d2bSAl Viro select CLONE_BACKWARDS 50d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5119952a92SKees Cook select HAVE_CC_STACKPROTECTOR 521da177e4SLinus Torvalds 531da177e4SLinus Torvaldsmenu "Machine selection" 541da177e4SLinus Torvalds 555e83d430SRalf Baechlechoice 565e83d430SRalf Baechle prompt "System type" 575e83d430SRalf Baechle default SGI_IP22 581da177e4SLinus Torvalds 5942a4f17dSManuel Laussconfig MIPS_ALCHEMY 60c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 6142a4f17dSManuel Lauss select 64BIT_PHYS_ADDR 62f772cdb2SRalf Baechle select CEVT_R4K 63d7ea335cSSteven J. Hill select CSRC_R4K 6442a4f17dSManuel Lauss select IRQ_CPU 6542a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 6642a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 6742a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 68efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 691b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 7037663860SManuel Lauss select USB_ARCH_HAS_OHCI 7137663860SManuel Lauss select USB_ARCH_HAS_EHCI 721da177e4SLinus Torvalds 737ca5dc14SFlorian Fainelliconfig AR7 747ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 757ca5dc14SFlorian Fainelli select BOOT_ELF32 767ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 777ca5dc14SFlorian Fainelli select CEVT_R4K 787ca5dc14SFlorian Fainelli select CSRC_R4K 797ca5dc14SFlorian Fainelli select IRQ_CPU 807ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 817ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 827ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 837ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 847ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 857ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 861b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 875f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 887ca5dc14SFlorian Fainelli select VLYNQ 898551fb64SYoichi Yuasa select HAVE_CLK 907ca5dc14SFlorian Fainelli help 917ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 927ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 937ca5dc14SFlorian Fainelli 94d4a67d9dSGabor Juhosconfig ATH79 95d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 966eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 97d4a67d9dSGabor Juhos select BOOT_RAW 98d4a67d9dSGabor Juhos select CEVT_R4K 99d4a67d9dSGabor Juhos select CSRC_R4K 100d4a67d9dSGabor Juhos select DMA_NONCOHERENT 10194638067SGabor Juhos select HAVE_CLK 1022c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 103d4a67d9dSGabor Juhos select IRQ_CPU 1040aabf1a4SGabor Juhos select MIPS_MACHINE 105d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 106d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 107d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 108d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 109d4a67d9dSGabor Juhos help 110d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 111d4a67d9dSGabor Juhos 1121c0c13ebSAurelien Jarnoconfig BCM47XX 113c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1142da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 115fe08f8c2SHauke Mehrtens select BOOT_RAW 11642f77542SRalf Baechle select CEVT_R4K 117940f6b48SRalf Baechle select CSRC_R4K 1181c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1191c0c13ebSAurelien Jarno select HW_HAS_PCI 1201c0c13ebSAurelien Jarno select IRQ_CPU 121314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 122dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1231c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1241c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 12525e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 126e1ccbb65SHauke Mehrtens select EARLY_PRINTK_8250 if EARLY_PRINTK 1271c0c13ebSAurelien Jarno help 1281c0c13ebSAurelien Jarno Support for BCM47XX based boards 1291c0c13ebSAurelien Jarno 130e7300d04SMaxime Bizonconfig BCM63XX 131e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 132ae8de61cSFlorian Fainelli select BOOT_RAW 133e7300d04SMaxime Bizon select CEVT_R4K 134e7300d04SMaxime Bizon select CSRC_R4K 135e7300d04SMaxime Bizon select DMA_NONCOHERENT 136e7300d04SMaxime Bizon select IRQ_CPU 137e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 138e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 139e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 140e7300d04SMaxime Bizon select SWAP_IO_SPACE 141e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 1423e82eeebSYoichi Yuasa select HAVE_CLK 143af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 144e7300d04SMaxime Bizon help 145e7300d04SMaxime Bizon Support for BCM63XX based boards 146e7300d04SMaxime Bizon 1471da177e4SLinus Torvaldsconfig MIPS_COBALT 1483fa986faSMartin Michlmayr bool "Cobalt Server" 14942f77542SRalf Baechle select CEVT_R4K 150940f6b48SRalf Baechle select CSRC_R4K 1511097c6acSYoichi Yuasa select CEVT_GT641XX 1521da177e4SLinus Torvalds select DMA_NONCOHERENT 1538a8594a7SYoichi Yuasa select EARLY_PRINTK_8250 if EARLY_PRINTK 1541da177e4SLinus Torvalds select HW_HAS_PCI 155d865bea4SRalf Baechle select I8253 1561da177e4SLinus Torvalds select I8259 1571da177e4SLinus Torvalds select IRQ_CPU 158d5ab1a69SYoichi Yuasa select IRQ_GT641XX 159252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 160e25bfc92SYoichi Yuasa select PCI 1617cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 1620a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 163ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1640e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 1655e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1661da177e4SLinus Torvalds 1671da177e4SLinus Torvaldsconfig MACH_DECSTATION 1683fa986faSMartin Michlmayr bool "DECstations" 1691da177e4SLinus Torvalds select BOOT_ELF32 1706457d9fcSYoichi Yuasa select CEVT_DS1287 17142f77542SRalf Baechle select CEVT_R4K 1724247417dSYoichi Yuasa select CSRC_IOASIC 173940f6b48SRalf Baechle select CSRC_R4K 17420d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 17520d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 17620d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 1771da177e4SLinus Torvalds select DMA_NONCOHERENT 178d388d685SMaciej W. Rozycki select NO_IOPORT 1791da177e4SLinus Torvalds select IRQ_CPU 1807cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 1817cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 182ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1837d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 1845e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1851723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 1861723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 1871723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 188930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 1895e83d430SRalf Baechle help 1901da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 1911da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 1921da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 1931da177e4SLinus Torvalds 1941da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 1951da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 1961da177e4SLinus Torvalds 1971da177e4SLinus Torvalds DECstation 5000/50 1981da177e4SLinus Torvalds DECstation 5000/150 1991da177e4SLinus Torvalds DECstation 5000/260 2001da177e4SLinus Torvalds DECsystem 5900/260 2011da177e4SLinus Torvalds 2021da177e4SLinus Torvalds otherwise choose R3000. 2031da177e4SLinus Torvalds 2045e83d430SRalf Baechleconfig MACH_JAZZ 2053fa986faSMartin Michlmayr bool "Jazz family of machines" 2060e2794b0SRalf Baechle select FW_ARC 2070e2794b0SRalf Baechle select FW_ARC32 2085e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 20942f77542SRalf Baechle select CEVT_R4K 210940f6b48SRalf Baechle select CSRC_R4K 211e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2125e83d430SRalf Baechle select GENERIC_ISA_DMA 2138a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 214ea202c63SThomas Bogendoerfer select IRQ_CPU 215d865bea4SRalf Baechle select I8253 2165e83d430SRalf Baechle select I8259 2175e83d430SRalf Baechle select ISA 2187cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2195e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2207d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2211723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2221da177e4SLinus Torvalds help 2235e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2245e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 225692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2265e83d430SRalf Baechle Olivetti M700-10 workstations. 2275e83d430SRalf Baechle 2285ebabe59SLars-Peter Clausenconfig MACH_JZ4740 2295ebabe59SLars-Peter Clausen bool "Ingenic JZ4740 based machines" 2305ebabe59SLars-Peter Clausen select SYS_HAS_CPU_MIPS32_R1 2315ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2325ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 233f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 2345ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 2355ebabe59SLars-Peter Clausen select IRQ_CPU 2365ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 2375ebabe59SLars-Peter Clausen select SYS_HAS_EARLY_PRINTK 2385ebabe59SLars-Peter Clausen select HAVE_PWM 239ab5330ebSMaurus Cuelenaere select HAVE_CLK 24083bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 2415ebabe59SLars-Peter Clausen 242171bb2f1SJohn Crispinconfig LANTIQ 243171bb2f1SJohn Crispin bool "Lantiq based platforms" 244171bb2f1SJohn Crispin select DMA_NONCOHERENT 245171bb2f1SJohn Crispin select IRQ_CPU 246171bb2f1SJohn Crispin select CEVT_R4K 247171bb2f1SJohn Crispin select CSRC_R4K 248171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 249171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 250171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 251171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 252171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 253171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 254171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 255171bb2f1SJohn Crispin select SWAP_IO_SPACE 256171bb2f1SJohn Crispin select BOOT_RAW 257287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 258287e3f3fSJohn Crispin select CLKDEV_LOOKUP 259a0392222SJohn Crispin select USE_OF 2603f8c50c9SJohn Crispin select PINCTRL 2613f8c50c9SJohn Crispin select PINCTRL_LANTIQ 262171bb2f1SJohn Crispin 2631f21d2bdSBrian Murphyconfig LASAT 2641f21d2bdSBrian Murphy bool "LASAT Networks platforms" 26542f77542SRalf Baechle select CEVT_R4K 266940f6b48SRalf Baechle select CSRC_R4K 2671f21d2bdSBrian Murphy select DMA_NONCOHERENT 2681f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 2691f21d2bdSBrian Murphy select HW_HAS_PCI 270a5ccfe5cSRalf Baechle select IRQ_CPU 2711f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 2721f21d2bdSBrian Murphy select MIPS_NILE4 2731f21d2bdSBrian Murphy select R5000_CPU_SCACHE 2741f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 2751f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 2761f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 2771f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 2781f21d2bdSBrian Murphy 27985749d24SWu Zhangjinconfig MACH_LOONGSON 28085749d24SWu Zhangjin bool "Loongson family of machines" 281c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 282ade299d8SYoichi Yuasa help 28385749d24SWu Zhangjin This enables the support of Loongson family of machines. 28485749d24SWu Zhangjin 28585749d24SWu Zhangjin Loongson is a family of general-purpose MIPS-compatible CPUs. 28685749d24SWu Zhangjin developed at Institute of Computing Technology (ICT), 28785749d24SWu Zhangjin Chinese Academy of Sciences (CAS) in the People's Republic 28885749d24SWu Zhangjin of China. The chief architect is Professor Weiwu Hu. 289ade299d8SYoichi Yuasa 290ca585cf9SKelvin Cheungconfig MACH_LOONGSON1 291ca585cf9SKelvin Cheung bool "Loongson 1 family of machines" 292ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 293ca585cf9SKelvin Cheung help 294ca585cf9SKelvin Cheung This enables support for the Loongson 1 based machines. 295ca585cf9SKelvin Cheung 296ca585cf9SKelvin Cheung Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by 297ca585cf9SKelvin Cheung the ICT (Institute of Computing Technology) and the Chinese Academy 298ca585cf9SKelvin Cheung of Sciences. 299ca585cf9SKelvin Cheung 3001da177e4SLinus Torvaldsconfig MIPS_MALTA 3013fa986faSMartin Michlmayr bool "MIPS Malta board" 30261ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 3031da177e4SLinus Torvalds select BOOT_ELF32 304fa71c960SRalf Baechle select BOOT_RAW 30542f77542SRalf Baechle select CEVT_R4K 306940f6b48SRalf Baechle select CSRC_R4K 307778eeb1bSSteven J. Hill select CSRC_GIC 308885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 3091da177e4SLinus Torvalds select GENERIC_ISA_DMA 3108a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 311aa414dffSRalf Baechle select IRQ_CPU 31239b8d525SRalf Baechle select IRQ_GIC 3131da177e4SLinus Torvalds select HW_HAS_PCI 314d865bea4SRalf Baechle select I8253 3151da177e4SLinus Torvalds select I8259 3165e83d430SRalf Baechle select MIPS_BONITO64 3179318c51aSChris Dearman select MIPS_CPU_SCACHE 318252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 3195e83d430SRalf Baechle select MIPS_MSC 3201da177e4SLinus Torvalds select SWAP_IO_SPACE 3217cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 3227cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 3237cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 3245d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 3257cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3267cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 327ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 328ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 3295e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 3305e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3310365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 332f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 3339693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 3341b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 3351da177e4SLinus Torvalds help 336f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 3371da177e4SLinus Torvalds board. 3381da177e4SLinus Torvalds 339ec47b274SSteven J. Hillconfig MIPS_SEAD3 340ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 341ec47b274SSteven J. Hill select BOOT_ELF32 342ec47b274SSteven J. Hill select BOOT_RAW 343ec47b274SSteven J. Hill select CEVT_R4K 344ec47b274SSteven J. Hill select CSRC_R4K 345dfa762e1SSteven J. Hill select CSRC_GIC 346ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 347ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 348ec47b274SSteven J. Hill select DMA_NONCOHERENT 349ec47b274SSteven J. Hill select IRQ_CPU 350ec47b274SSteven J. Hill select IRQ_GIC 35144327236SQais Yousef select LIBFDT 352ec47b274SSteven J. Hill select MIPS_MSC 353ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 354ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 355ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 356ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 357ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 358ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 359ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 360ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 361ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 362a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 363ec47b274SSteven J. Hill select USB_ARCH_HAS_EHCI 364ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 365ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 3669b731009SSteven J. Hill select USE_OF 367ec47b274SSteven J. Hill help 368ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 369ec47b274SSteven J. Hill board. 370ec47b274SSteven J. Hill 371a83860c2SRalf Baechleconfig NEC_MARKEINS 372a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 373a83860c2SRalf Baechle select SOC_EMMA2RH 374a83860c2SRalf Baechle select HW_HAS_PCI 375a83860c2SRalf Baechle help 376a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 377ade299d8SYoichi Yuasa 3785e83d430SRalf Baechleconfig MACH_VR41XX 37974142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 38042f77542SRalf Baechle select CEVT_R4K 381940f6b48SRalf Baechle select CSRC_R4K 3827cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 38327fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 3845e83d430SRalf Baechle 385edb6310aSDaniel Lairdconfig NXP_STB220 386edb6310aSDaniel Laird bool "NXP STB220 board" 387edb6310aSDaniel Laird select SOC_PNX833X 388edb6310aSDaniel Laird help 389edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 390edb6310aSDaniel Laird 391edb6310aSDaniel Lairdconfig NXP_STB225 392edb6310aSDaniel Laird bool "NXP 225 board" 393edb6310aSDaniel Laird select SOC_PNX833X 394edb6310aSDaniel Laird select SOC_PNX8335 395edb6310aSDaniel Laird help 396edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 397edb6310aSDaniel Laird 3989267a30dSMarc St-Jeanconfig PMC_MSP 3999267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 40039d30c13SAnoop P A select CEVT_R4K 40139d30c13SAnoop P A select CSRC_R4K 4029267a30dSMarc St-Jean select DMA_NONCOHERENT 4039267a30dSMarc St-Jean select SWAP_IO_SPACE 4049267a30dSMarc St-Jean select NO_EXCEPT_FILL 4059267a30dSMarc St-Jean select BOOT_RAW 4069267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 4079267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 4089267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 4099267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 4109267a30dSMarc St-Jean select IRQ_CPU 4119267a30dSMarc St-Jean select SERIAL_8250 4129267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 4139296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 4149296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 4159267a30dSMarc St-Jean help 4169267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 4179267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 4189267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 4199267a30dSMarc St-Jean a variety of MIPS cores. 4209267a30dSMarc St-Jean 421ae2b5bb6SJohn Crispinconfig RALINK 422ae2b5bb6SJohn Crispin bool "Ralink based machines" 423ae2b5bb6SJohn Crispin select CEVT_R4K 424ae2b5bb6SJohn Crispin select CSRC_R4K 425ae2b5bb6SJohn Crispin select BOOT_RAW 426ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 427ae2b5bb6SJohn Crispin select IRQ_CPU 428ae2b5bb6SJohn Crispin select USE_OF 429ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 430ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 431ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 432ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 433ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 434ae2b5bb6SJohn Crispin select HAVE_MACH_CLKDEV 435ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 4362a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 4372a153f1cSJohn Crispin select RESET_CONTROLLER 438ae2b5bb6SJohn Crispin 4391da177e4SLinus Torvaldsconfig SGI_IP22 4403fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 4410e2794b0SRalf Baechle select FW_ARC 4420e2794b0SRalf Baechle select FW_ARC32 4431da177e4SLinus Torvalds select BOOT_ELF32 44442f77542SRalf Baechle select CEVT_R4K 445940f6b48SRalf Baechle select CSRC_R4K 446e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 4471da177e4SLinus Torvalds select DMA_NONCOHERENT 4485e83d430SRalf Baechle select HW_HAS_EISA 449d865bea4SRalf Baechle select I8253 45068de4803SThomas Bogendoerfer select I8259 4511da177e4SLinus Torvalds select IP22_CPU_SCACHE 4521da177e4SLinus Torvalds select IRQ_CPU 453aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 454e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 455e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 45636e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 457e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 458e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 459e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 4601da177e4SLinus Torvalds select SWAP_IO_SPACE 4617cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 4627cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 4632b5e63f6SMartin Michlmayr # 4642b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 4652b5e63f6SMartin Michlmayr # memory during early boot on some machines. 4662b5e63f6SMartin Michlmayr # 4672b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 4682b5e63f6SMartin Michlmayr # for a more details discussion 4692b5e63f6SMartin Michlmayr # 4702b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 471ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 472ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4735e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 474930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 4751da177e4SLinus Torvalds help 4761da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 4771da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 4781da177e4SLinus Torvalds that runs on these, say Y here. 4791da177e4SLinus Torvalds 4801da177e4SLinus Torvaldsconfig SGI_IP27 4813fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 4820e2794b0SRalf Baechle select FW_ARC 4830e2794b0SRalf Baechle select FW_ARC64 4845e83d430SRalf Baechle select BOOT_ELF64 485e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 486634286f1SRalf Baechle select DMA_COHERENT 48736a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 4881da177e4SLinus Torvalds select HW_HAS_PCI 489130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 4907cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 491ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4925e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 493d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 4941a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 495930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 4961da177e4SLinus Torvalds help 4971da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 4981da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 4991da177e4SLinus Torvalds here. 5001da177e4SLinus Torvalds 501e2defae5SThomas Bogendoerferconfig SGI_IP28 5027d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 5030e2794b0SRalf Baechle select FW_ARC 5040e2794b0SRalf Baechle select FW_ARC64 505e2defae5SThomas Bogendoerfer select BOOT_ELF64 506e2defae5SThomas Bogendoerfer select CEVT_R4K 507e2defae5SThomas Bogendoerfer select CSRC_R4K 508e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 509e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 510e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 511e2defae5SThomas Bogendoerfer select IRQ_CPU 512e2defae5SThomas Bogendoerfer select HW_HAS_EISA 513e2defae5SThomas Bogendoerfer select I8253 514e2defae5SThomas Bogendoerfer select I8259 515e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 516e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 5175b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 518e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 519e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 520e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 521e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 522e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 5232b5e63f6SMartin Michlmayr # 5242b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5252b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5262b5e63f6SMartin Michlmayr # 5272b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5282b5e63f6SMartin Michlmayr # for a more details discussion 5292b5e63f6SMartin Michlmayr # 5302b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 531e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 532e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 533e2defae5SThomas Bogendoerfer help 534e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 535e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 536e2defae5SThomas Bogendoerfer 5371da177e4SLinus Torvaldsconfig SGI_IP32 538cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 5390e2794b0SRalf Baechle select FW_ARC 5400e2794b0SRalf Baechle select FW_ARC32 5411da177e4SLinus Torvalds select BOOT_ELF32 54242f77542SRalf Baechle select CEVT_R4K 543940f6b48SRalf Baechle select CSRC_R4K 5441da177e4SLinus Torvalds select DMA_NONCOHERENT 5451da177e4SLinus Torvalds select HW_HAS_PCI 546dd67b155SRalf Baechle select IRQ_CPU 5471da177e4SLinus Torvalds select R5000_CPU_SCACHE 5481da177e4SLinus Torvalds select RM7000_CPU_SCACHE 5497cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5507cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 5517cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 552dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 553ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5545e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5551da177e4SLinus Torvalds help 5561da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 5571da177e4SLinus Torvalds 558ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 559ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 5605e83d430SRalf Baechle select BOOT_ELF32 5615e83d430SRalf Baechle select DMA_COHERENT 5625e83d430SRalf Baechle select SIBYTE_BCM1120 5635e83d430SRalf Baechle select SWAP_IO_SPACE 5647cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5655e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5665e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5675e83d430SRalf Baechle 568ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 569ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 5705e83d430SRalf Baechle select BOOT_ELF32 5715e83d430SRalf Baechle select DMA_COHERENT 5725e83d430SRalf Baechle select SIBYTE_BCM1120 5735e83d430SRalf Baechle select SWAP_IO_SPACE 5747cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5755e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5765e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5775e83d430SRalf Baechle 5785e83d430SRalf Baechleconfig SIBYTE_CRHONE 5793fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 5805e83d430SRalf Baechle select BOOT_ELF32 5815e83d430SRalf Baechle select DMA_COHERENT 5825e83d430SRalf Baechle select SIBYTE_BCM1125 5835e83d430SRalf Baechle select SWAP_IO_SPACE 5847cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5855e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5865e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 5875e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5885e83d430SRalf Baechle 589ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 590ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 591ade299d8SYoichi Yuasa select BOOT_ELF32 592ade299d8SYoichi Yuasa select DMA_COHERENT 593ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 594ade299d8SYoichi Yuasa select SWAP_IO_SPACE 595ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 596ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 597ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 598ade299d8SYoichi Yuasa 599ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 600ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 601ade299d8SYoichi Yuasa select BOOT_ELF32 602ade299d8SYoichi Yuasa select DMA_COHERENT 603fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 604ade299d8SYoichi Yuasa select SIBYTE_SB1250 605ade299d8SYoichi Yuasa select SWAP_IO_SPACE 606ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 607ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 608ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 609ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 610cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 611ade299d8SYoichi Yuasa 612ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 613ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 614ade299d8SYoichi Yuasa select BOOT_ELF32 615ade299d8SYoichi Yuasa select DMA_COHERENT 616fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 617ade299d8SYoichi Yuasa select SIBYTE_SB1250 618ade299d8SYoichi Yuasa select SWAP_IO_SPACE 619ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 620ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 621ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 622ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 623ade299d8SYoichi Yuasa 624ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 625ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 626ade299d8SYoichi Yuasa select BOOT_ELF32 627ade299d8SYoichi Yuasa select DMA_COHERENT 628ade299d8SYoichi Yuasa select SIBYTE_SB1250 629ade299d8SYoichi Yuasa select SWAP_IO_SPACE 630ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 631ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 632ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 633ade299d8SYoichi Yuasa 634ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 635ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 636ade299d8SYoichi Yuasa select BOOT_ELF32 637ade299d8SYoichi Yuasa select DMA_COHERENT 638ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 639ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 640ade299d8SYoichi Yuasa select SWAP_IO_SPACE 641ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 642ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 643651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 644ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 645cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 646ade299d8SYoichi Yuasa 64714b36af4SThomas Bogendoerferconfig SNI_RM 64814b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 6490e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 6500e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 651aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 6525e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 6535e83d430SRalf Baechle select BOOT_ELF32 65442f77542SRalf Baechle select CEVT_R4K 655940f6b48SRalf Baechle select CSRC_R4K 656e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 6575e83d430SRalf Baechle select DMA_NONCOHERENT 6585e83d430SRalf Baechle select GENERIC_ISA_DMA 6598a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 6605e83d430SRalf Baechle select HW_HAS_EISA 6615e83d430SRalf Baechle select HW_HAS_PCI 662c066a32aSThomas Bogendoerfer select IRQ_CPU 663d865bea4SRalf Baechle select I8253 6645e83d430SRalf Baechle select I8259 6655e83d430SRalf Baechle select ISA 6664a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 6677cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6684a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 669c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 6704a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 67136a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 672ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 6737d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 6744a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 6755e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 6765e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6771da177e4SLinus Torvalds help 67814b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 67914b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 6805e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 6815e83d430SRalf Baechle support this machine type. 6821da177e4SLinus Torvalds 683edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 684edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 6855e83d430SRalf Baechle 686edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 687edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 68823fbee9dSRalf Baechle 68973b4390fSRalf Baechleconfig MIKROTIK_RB532 69073b4390fSRalf Baechle bool "Mikrotik RB532 boards" 69173b4390fSRalf Baechle select CEVT_R4K 69273b4390fSRalf Baechle select CSRC_R4K 69373b4390fSRalf Baechle select DMA_NONCOHERENT 69473b4390fSRalf Baechle select HW_HAS_PCI 69573b4390fSRalf Baechle select IRQ_CPU 69673b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 69773b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 69873b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 69973b4390fSRalf Baechle select SWAP_IO_SPACE 70073b4390fSRalf Baechle select BOOT_RAW 701d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 702930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 70373b4390fSRalf Baechle help 70473b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 70573b4390fSRalf Baechle based on the IDT RC32434 SoC. 70673b4390fSRalf Baechle 7079ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 7089ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 709a86c7f72SDavid Daney select CEVT_R4K 710a86c7f72SDavid Daney select 64BIT_PHYS_ADDR 711a86c7f72SDavid Daney select DMA_COHERENT 712a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 713a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 714f65aad41SRalf Baechle select EDAC_SUPPORT 715773cb77dSRalf Baechle select SYS_SUPPORTS_HOTPLUG_CPU 716a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 7175e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 718a86c7f72SDavid Daney select SWAP_IO_SPACE 719e8635b48SDavid Daney select HW_HAS_PCI 720f00e001eSDavid Daney select ZONE_DMA32 721340fbb8bSDavid Daney select USB_ARCH_HAS_OHCI 722340fbb8bSDavid Daney select USB_ARCH_HAS_EHCI 723465aaed0SDavid Daney select HOLES_IN_ZONE 72499cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 725a86c7f72SDavid Daney help 726a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 727a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 728a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 729a86c7f72SDavid Daney Some of the supported boards are: 730a86c7f72SDavid Daney EBT3000 731a86c7f72SDavid Daney EBH3000 732a86c7f72SDavid Daney EBH3100 733a86c7f72SDavid Daney Thunder 734a86c7f72SDavid Daney Kodama 735a86c7f72SDavid Daney Hikari 736a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 737a86c7f72SDavid Daney 7387f058e85SJayachandran Cconfig NLM_XLR_BOARD 7397f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 7407f058e85SJayachandran C select BOOT_ELF32 7417f058e85SJayachandran C select NLM_COMMON 7427f058e85SJayachandran C select SYS_HAS_CPU_XLR 7437f058e85SJayachandran C select SYS_SUPPORTS_SMP 7447f058e85SJayachandran C select HW_HAS_PCI 7457f058e85SJayachandran C select SWAP_IO_SPACE 7467f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7477f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7487f058e85SJayachandran C select 64BIT_PHYS_ADDR 7497f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7507f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 7517f058e85SJayachandran C select DMA_COHERENT 7527f058e85SJayachandran C select NR_CPUS_DEFAULT_32 7537f058e85SJayachandran C select CEVT_R4K 7547f058e85SJayachandran C select CSRC_R4K 7557f058e85SJayachandran C select IRQ_CPU 756b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7577f058e85SJayachandran C select SYNC_R4K 7587f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 759f35574a3SJayachandran C select USB_ARCH_HAS_OHCI if USB_SUPPORT 760f35574a3SJayachandran C select USB_ARCH_HAS_EHCI if USB_SUPPORT 7618f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7628f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7637f058e85SJayachandran C help 7647f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 7657f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 7667f058e85SJayachandran C 7671c773ea4SJayachandran Cconfig NLM_XLP_BOARD 7681c773ea4SJayachandran C bool "Netlogic XLP based systems" 7691c773ea4SJayachandran C select BOOT_ELF32 7701c773ea4SJayachandran C select NLM_COMMON 7711c773ea4SJayachandran C select SYS_HAS_CPU_XLP 7721c773ea4SJayachandran C select SYS_SUPPORTS_SMP 7731c773ea4SJayachandran C select HW_HAS_PCI 7741c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 7751c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 7761c773ea4SJayachandran C select 64BIT_PHYS_ADDR 7771c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 7781c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 7791c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 7801c773ea4SJayachandran C select DMA_COHERENT 7811c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 7821c773ea4SJayachandran C select CEVT_R4K 7831c773ea4SJayachandran C select CSRC_R4K 7841c773ea4SJayachandran C select IRQ_CPU 785c24a8a7aSJayachandran C select ARCH_SUPPORTS_MSI 786b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 7871c773ea4SJayachandran C select SYNC_R4K 7881c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 7892f6528e1SJayachandran C select USE_OF 7908f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 7918f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 7921c773ea4SJayachandran C help 7931c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 7941c773ea4SJayachandran C Say Y here if you have a XLP based board. 7951c773ea4SJayachandran C 7961da177e4SLinus Torvaldsendchoice 7971da177e4SLinus Torvalds 798e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 799d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 800a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 801e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 8025e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 8035ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 8048ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 8051f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 8060f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 807ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 80829c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 80938b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 81022b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 8115e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 812a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 81385749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig" 814ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig" 8157f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 81638b18f72SRalf Baechle 8175e83d430SRalf Baechleendmenu 8185e83d430SRalf Baechle 8191da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 8201da177e4SLinus Torvalds bool 8211da177e4SLinus Torvalds default y 8221da177e4SLinus Torvalds 8231da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 8241da177e4SLinus Torvalds bool 8251da177e4SLinus Torvalds 826f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 827f0d1b0b3SDavid Howells bool 828f0d1b0b3SDavid Howells default n 829f0d1b0b3SDavid Howells 830f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 831f0d1b0b3SDavid Howells bool 832f0d1b0b3SDavid Howells default n 833f0d1b0b3SDavid Howells 8343c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 8353c9ee7efSAkinobu Mita bool 8363c9ee7efSAkinobu Mita default y 8373c9ee7efSAkinobu Mita 8381da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 8391da177e4SLinus Torvalds bool 8401da177e4SLinus Torvalds default y 8411da177e4SLinus Torvalds 842ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 8431cc89038SAtsushi Nemoto bool 8441cc89038SAtsushi Nemoto default y 8451cc89038SAtsushi Nemoto 8461da177e4SLinus Torvalds# 8471da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 8481da177e4SLinus Torvalds# 8490e2794b0SRalf Baechleconfig FW_ARC 8501da177e4SLinus Torvalds bool 8511da177e4SLinus Torvalds 85261ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 85361ed242dSRalf Baechle bool 85461ed242dSRalf Baechle 8559267a30dSMarc St-Jeanconfig BOOT_RAW 8569267a30dSMarc St-Jean bool 8579267a30dSMarc St-Jean 858217dd11eSRalf Baechleconfig CEVT_BCM1480 859217dd11eSRalf Baechle bool 860217dd11eSRalf Baechle 8616457d9fcSYoichi Yuasaconfig CEVT_DS1287 8626457d9fcSYoichi Yuasa bool 8636457d9fcSYoichi Yuasa 8641097c6acSYoichi Yuasaconfig CEVT_GT641XX 8651097c6acSYoichi Yuasa bool 8661097c6acSYoichi Yuasa 86742f77542SRalf Baechleconfig CEVT_R4K 86842f77542SRalf Baechle bool 86942f77542SRalf Baechle 8700ab2b7d0SRaghu Gandhamconfig CEVT_GIC 871*237036deSPaul Burton select MIPS_CM 8720ab2b7d0SRaghu Gandham bool 8730ab2b7d0SRaghu Gandham 874217dd11eSRalf Baechleconfig CEVT_SB1250 875217dd11eSRalf Baechle bool 876217dd11eSRalf Baechle 877229f773eSAtsushi Nemotoconfig CEVT_TXX9 878229f773eSAtsushi Nemoto bool 879229f773eSAtsushi Nemoto 880217dd11eSRalf Baechleconfig CSRC_BCM1480 881217dd11eSRalf Baechle bool 882217dd11eSRalf Baechle 8834247417dSYoichi Yuasaconfig CSRC_IOASIC 8844247417dSYoichi Yuasa bool 8854247417dSYoichi Yuasa 886940f6b48SRalf Baechleconfig CSRC_R4K 887940f6b48SRalf Baechle bool 888940f6b48SRalf Baechle 889778eeb1bSSteven J. Hillconfig CSRC_GIC 890*237036deSPaul Burton select MIPS_CM 891778eeb1bSSteven J. Hill bool 892778eeb1bSSteven J. Hill 893217dd11eSRalf Baechleconfig CSRC_SB1250 894217dd11eSRalf Baechle bool 895217dd11eSRalf Baechle 896a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 8977444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 898a9aec7feSAtsushi Nemoto bool 899a9aec7feSAtsushi Nemoto 9000e2794b0SRalf Baechleconfig FW_CFE 901df78b5c8SAurelien Jarno bool 902df78b5c8SAurelien Jarno 9034bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 9044bafad92SFUJITA Tomonori def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT 9054bafad92SFUJITA Tomonori 906885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 907885014bcSFelix Fietkau select DMA_NONCOHERENT 908885014bcSFelix Fietkau bool 909885014bcSFelix Fietkau 9101da177e4SLinus Torvaldsconfig DMA_COHERENT 9111da177e4SLinus Torvalds bool 9121da177e4SLinus Torvalds 9131da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 9141da177e4SLinus Torvalds bool 915e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 9164ce588cdSRalf Baechle 917e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 9184ce588cdSRalf Baechle bool 9191da177e4SLinus Torvalds 92036a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 9211da177e4SLinus Torvalds bool 9221da177e4SLinus Torvalds 923dbb74540SRalf Baechleconfig HOTPLUG_CPU 9241b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 92540b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 9261b2bc75cSRalf Baechle help 9271b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 9281b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 9291b2bc75cSRalf Baechle (Note: power management support will enable this option 9301b2bc75cSRalf Baechle automatically on SMP systems. ) 9311b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 9321b2bc75cSRalf Baechle 9331b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 934dbb74540SRalf Baechle bool 935dbb74540SRalf Baechle 9361da177e4SLinus Torvaldsconfig I8259 9371da177e4SLinus Torvalds bool 9381da177e4SLinus Torvalds 9391da177e4SLinus Torvaldsconfig MIPS_BONITO64 9401da177e4SLinus Torvalds bool 9411da177e4SLinus Torvalds 9421da177e4SLinus Torvaldsconfig MIPS_MSC 9431da177e4SLinus Torvalds bool 9441da177e4SLinus Torvalds 9451f21d2bdSBrian Murphyconfig MIPS_NILE4 9461f21d2bdSBrian Murphy bool 9471f21d2bdSBrian Murphy 94839b8d525SRalf Baechleconfig SYNC_R4K 94939b8d525SRalf Baechle bool 95039b8d525SRalf Baechle 951487d70d0SGabor Juhosconfig MIPS_MACHINE 952487d70d0SGabor Juhos def_bool n 953487d70d0SGabor Juhos 954d388d685SMaciej W. Rozyckiconfig NO_IOPORT 955d388d685SMaciej W. Rozycki def_bool n 956d388d685SMaciej W. Rozycki 9578313da30SRalf Baechleconfig GENERIC_ISA_DMA 9588313da30SRalf Baechle bool 9598313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 960a35bee8aSNamhyung Kim select ISA_DMA_API 9618313da30SRalf Baechle 962aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 963aa414dffSRalf Baechle bool 9648313da30SRalf Baechle select GENERIC_ISA_DMA 965aa414dffSRalf Baechle 966a35bee8aSNamhyung Kimconfig ISA_DMA_API 967a35bee8aSNamhyung Kim bool 968a35bee8aSNamhyung Kim 969465aaed0SDavid Daneyconfig HOLES_IN_ZONE 970465aaed0SDavid Daney bool 971465aaed0SDavid Daney 9725e83d430SRalf Baechle# 9736b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 9745e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 9755e83d430SRalf Baechle# choice statement should be more obvious to the user. 9765e83d430SRalf Baechle# 9775e83d430SRalf Baechlechoice 9786b2aac42SMasanari Iida prompt "Endianness selection" 9791da177e4SLinus Torvalds help 9801da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 9815e83d430SRalf Baechle byte order. These modes require different kernels and a different 9823cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 9835e83d430SRalf Baechle particular system but some systems are just as commonly used in the 9843dde6ad8SDavid Sterba one or the other endianness. 9855e83d430SRalf Baechle 9865e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 9875e83d430SRalf Baechle bool "Big endian" 9885e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 9895e83d430SRalf Baechle 9905e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 9915e83d430SRalf Baechle bool "Little endian" 9925e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 9935e83d430SRalf Baechle 9945e83d430SRalf Baechleendchoice 9955e83d430SRalf Baechle 99622b0763aSDavid Daneyconfig EXPORT_UASM 99722b0763aSDavid Daney bool 99822b0763aSDavid Daney 9992116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 10002116245eSRalf Baechle bool 10012116245eSRalf Baechle 10025e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 10035e83d430SRalf Baechle bool 10045e83d430SRalf Baechle 10055e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 10065e83d430SRalf Baechle bool 10071da177e4SLinus Torvalds 10089cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 10099cffd154SDavid Daney bool 10109cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 10119cffd154SDavid Daney default y 10129cffd154SDavid Daney 1013aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1014aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1015aa1762f4SDavid Daney 10161da177e4SLinus Torvaldsconfig IRQ_CPU 10171da177e4SLinus Torvalds bool 10181da177e4SLinus Torvalds 10191da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 10201da177e4SLinus Torvalds bool 10211da177e4SLinus Torvalds 10229267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 10239267a30dSMarc St-Jean bool 10249267a30dSMarc St-Jean 10259267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 10269267a30dSMarc St-Jean bool 10279267a30dSMarc St-Jean 10288420fd00SAtsushi Nemotoconfig IRQ_TXX9 10298420fd00SAtsushi Nemoto bool 10308420fd00SAtsushi Nemoto 1031d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1032d5ab1a69SYoichi Yuasa bool 1033d5ab1a69SYoichi Yuasa 103439b8d525SRalf Baechleconfig IRQ_GIC 1035*237036deSPaul Burton select MIPS_CM 103639b8d525SRalf Baechle bool 103739b8d525SRalf Baechle 1038252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 10391da177e4SLinus Torvalds bool 10401da177e4SLinus Torvalds 10419267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 10429267a30dSMarc St-Jean bool 10439267a30dSMarc St-Jean 1044a83860c2SRalf Baechleconfig SOC_EMMA2RH 1045a83860c2SRalf Baechle bool 1046a83860c2SRalf Baechle select CEVT_R4K 1047a83860c2SRalf Baechle select CSRC_R4K 1048a83860c2SRalf Baechle select DMA_NONCOHERENT 1049a83860c2SRalf Baechle select IRQ_CPU 1050a83860c2SRalf Baechle select SWAP_IO_SPACE 1051a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1052a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1053a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1054a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1055a83860c2SRalf Baechle 1056edb6310aSDaniel Lairdconfig SOC_PNX833X 1057edb6310aSDaniel Laird bool 1058edb6310aSDaniel Laird select CEVT_R4K 1059edb6310aSDaniel Laird select CSRC_R4K 1060edb6310aSDaniel Laird select IRQ_CPU 1061edb6310aSDaniel Laird select DMA_NONCOHERENT 1062edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1063edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1064edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1065edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1066edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1067edb6310aSDaniel Laird 1068edb6310aSDaniel Lairdconfig SOC_PNX8335 1069edb6310aSDaniel Laird bool 1070edb6310aSDaniel Laird select SOC_PNX833X 1071edb6310aSDaniel Laird 10721da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 10731da177e4SLinus Torvalds bool 10741da177e4SLinus Torvalds 1075e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1076e2defae5SThomas Bogendoerfer bool 1077e2defae5SThomas Bogendoerfer 10785b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 10795b438c44SThomas Bogendoerfer bool 10805b438c44SThomas Bogendoerfer 1081e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1082e2defae5SThomas Bogendoerfer bool 1083e2defae5SThomas Bogendoerfer 1084e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1085e2defae5SThomas Bogendoerfer bool 1086e2defae5SThomas Bogendoerfer 1087e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1088e2defae5SThomas Bogendoerfer bool 1089e2defae5SThomas Bogendoerfer 1090e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1091e2defae5SThomas Bogendoerfer bool 1092e2defae5SThomas Bogendoerfer 1093e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1094e2defae5SThomas Bogendoerfer bool 1095e2defae5SThomas Bogendoerfer 10960e2794b0SRalf Baechleconfig FW_ARC32 10975e83d430SRalf Baechle bool 10985e83d430SRalf Baechle 1099aaa9fad3SPaul Bolleconfig FW_SNIPROM 1100231a35d3SThomas Bogendoerfer bool 1101231a35d3SThomas Bogendoerfer 11021da177e4SLinus Torvaldsconfig BOOT_ELF32 11031da177e4SLinus Torvalds bool 11041da177e4SLinus Torvalds 1105930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1106930beb5aSFlorian Fainelli bool 1107930beb5aSFlorian Fainelli 1108930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1109930beb5aSFlorian Fainelli bool 1110930beb5aSFlorian Fainelli 1111930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1112930beb5aSFlorian Fainelli bool 1113930beb5aSFlorian Fainelli 1114930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1115930beb5aSFlorian Fainelli bool 1116930beb5aSFlorian Fainelli 11171da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 11181da177e4SLinus Torvalds int 1119a4c0201eSFlorian Fainelli default "4" if MIPS_L1_CACHE_SHIFT_4 1120a4c0201eSFlorian Fainelli default "5" if MIPS_L1_CACHE_SHIFT_5 1121a4c0201eSFlorian Fainelli default "6" if MIPS_L1_CACHE_SHIFT_6 1122a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 11231da177e4SLinus Torvalds default "5" 11241da177e4SLinus Torvalds 11251da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 11261da177e4SLinus Torvalds bool 11271da177e4SLinus Torvalds 11281da177e4SLinus Torvaldsconfig ARC_CONSOLE 11291da177e4SLinus Torvalds bool "ARC console support" 1130e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 11311da177e4SLinus Torvalds 11321da177e4SLinus Torvaldsconfig ARC_MEMORY 11331da177e4SLinus Torvalds bool 113414b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 11351da177e4SLinus Torvalds default y 11361da177e4SLinus Torvalds 11371da177e4SLinus Torvaldsconfig ARC_PROMLIB 11381da177e4SLinus Torvalds bool 1139e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 11401da177e4SLinus Torvalds default y 11411da177e4SLinus Torvalds 11420e2794b0SRalf Baechleconfig FW_ARC64 11431da177e4SLinus Torvalds bool 11441da177e4SLinus Torvalds 11451da177e4SLinus Torvaldsconfig BOOT_ELF64 11461da177e4SLinus Torvalds bool 11471da177e4SLinus Torvalds 11481da177e4SLinus Torvaldsmenu "CPU selection" 11491da177e4SLinus Torvalds 11501da177e4SLinus Torvaldschoice 11511da177e4SLinus Torvalds prompt "CPU type" 11521da177e4SLinus Torvalds default CPU_R4X00 11531da177e4SLinus Torvalds 11543702bba5SWu Zhangjinconfig CPU_LOONGSON2E 11553702bba5SWu Zhangjin bool "Loongson 2E" 11563702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 11573702bba5SWu Zhangjin select CPU_LOONGSON2 11582a21c730SFuxin Zhang help 11592a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 11602a21c730SFuxin Zhang with many extensions. 11612a21c730SFuxin Zhang 116225985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 11636f7a251aSWu Zhangjin bonito64. 11646f7a251aSWu Zhangjin 11656f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 11666f7a251aSWu Zhangjin bool "Loongson 2F" 11676f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 11686f7a251aSWu Zhangjin select CPU_LOONGSON2 1169c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 11706f7a251aSWu Zhangjin help 11716f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 11726f7a251aSWu Zhangjin with many extensions. 11736f7a251aSWu Zhangjin 11746f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 11756f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 11766f7a251aSWu Zhangjin Loongson2E. 11776f7a251aSWu Zhangjin 1178ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1179ca585cf9SKelvin Cheung bool "Loongson 1B" 1180ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1181ca585cf9SKelvin Cheung select CPU_LOONGSON1 1182ca585cf9SKelvin Cheung help 1183ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1184ca585cf9SKelvin Cheung release 2 instruction set. 1185ca585cf9SKelvin Cheung 11866e760c8dSRalf Baechleconfig CPU_MIPS32_R1 11876e760c8dSRalf Baechle bool "MIPS32 Release 1" 11887cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 11896e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1190797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1191ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 11926e760c8dSRalf Baechle help 11935e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 11941e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 11951e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 11961e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 11971e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 11981e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 11991e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 12001e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 12011e5f1caaSRalf Baechle performance. 12021e5f1caaSRalf Baechle 12031e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 12041e5f1caaSRalf Baechle bool "MIPS32 Release 2" 12057cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 12061e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1207797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1208ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12092235a54dSSanjay Lal select HAVE_KVM 12101e5f1caaSRalf Baechle help 12115e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 12126e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12136e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12146e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12156e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12161da177e4SLinus Torvalds 12176e760c8dSRalf Baechleconfig CPU_MIPS64_R1 12186e760c8dSRalf Baechle bool "MIPS64 Release 1" 12197cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1220797798c1SRalf Baechle select CPU_HAS_PREFETCH 1221ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1222ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1223ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12249cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 12256e760c8dSRalf Baechle help 12266e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 12276e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12286e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12296e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12306e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12311e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 12321e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 12331e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 12341e5f1caaSRalf Baechle performance. 12351e5f1caaSRalf Baechle 12361e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 12371e5f1caaSRalf Baechle bool "MIPS64 Release 2" 12387cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1239797798c1SRalf Baechle select CPU_HAS_PREFETCH 12401e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 12411e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1242ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12439cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 12441e5f1caaSRalf Baechle help 12451e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 12461e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 12471e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 12481e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12491e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 12501da177e4SLinus Torvalds 12511da177e4SLinus Torvaldsconfig CPU_R3000 12521da177e4SLinus Torvalds bool "R3000" 12537cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1254f7062ddbSRalf Baechle select CPU_HAS_WB 1255ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1256797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12571da177e4SLinus Torvalds help 12581da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 12591da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 12601da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 12611da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 12621da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 12631da177e4SLinus Torvalds try to recompile with R3000. 12641da177e4SLinus Torvalds 12651da177e4SLinus Torvaldsconfig CPU_TX39XX 12661da177e4SLinus Torvalds bool "R39XX" 12677cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1268ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 12691da177e4SLinus Torvalds 12701da177e4SLinus Torvaldsconfig CPU_VR41XX 12711da177e4SLinus Torvalds bool "R41xx" 12727cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1273ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1274ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 12751da177e4SLinus Torvalds help 12765e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 12771da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 12781da177e4SLinus Torvalds kernel built with this option will not run on any other type of 12791da177e4SLinus Torvalds processor or vice versa. 12801da177e4SLinus Torvalds 12811da177e4SLinus Torvaldsconfig CPU_R4300 12821da177e4SLinus Torvalds bool "R4300" 12837cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1284ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1285ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 12861da177e4SLinus Torvalds help 12871da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 12881da177e4SLinus Torvalds 12891da177e4SLinus Torvaldsconfig CPU_R4X00 12901da177e4SLinus Torvalds bool "R4x00" 12917cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1292ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1293ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1294970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 12951da177e4SLinus Torvalds help 12961da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 12971da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 12981da177e4SLinus Torvalds 12991da177e4SLinus Torvaldsconfig CPU_TX49XX 13001da177e4SLinus Torvalds bool "R49XX" 13017cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1302de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1303ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1304ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1305970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13061da177e4SLinus Torvalds 13071da177e4SLinus Torvaldsconfig CPU_R5000 13081da177e4SLinus Torvalds bool "R5000" 13097cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1310ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1311ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1312970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13131da177e4SLinus Torvalds help 13141da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 13151da177e4SLinus Torvalds 13161da177e4SLinus Torvaldsconfig CPU_R5432 13171da177e4SLinus Torvalds bool "R5432" 13187cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 13195e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 13205e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1321970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13221da177e4SLinus Torvalds 1323542c1020SShinya Kuribayashiconfig CPU_R5500 1324542c1020SShinya Kuribayashi bool "R5500" 1325542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1326542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1327542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 13289cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1329542c1020SShinya Kuribayashi help 1330542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1331542c1020SShinya Kuribayashi instruction set. 1332542c1020SShinya Kuribayashi 13331da177e4SLinus Torvaldsconfig CPU_R6000 13341da177e4SLinus Torvalds bool "R6000" 13357cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1336ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 13371da177e4SLinus Torvalds help 13381da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1339c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 13401da177e4SLinus Torvalds 13411da177e4SLinus Torvaldsconfig CPU_NEVADA 13421da177e4SLinus Torvalds bool "RM52xx" 13437cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1344ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1345ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1346970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13471da177e4SLinus Torvalds help 13481da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 13491da177e4SLinus Torvalds 13501da177e4SLinus Torvaldsconfig CPU_R8000 13511da177e4SLinus Torvalds bool "R8000" 13527cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 13535e83d430SRalf Baechle select CPU_HAS_PREFETCH 1354ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 13551da177e4SLinus Torvalds help 13561da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 13571da177e4SLinus Torvalds uncommon and the support for them is incomplete. 13581da177e4SLinus Torvalds 13591da177e4SLinus Torvaldsconfig CPU_R10000 13601da177e4SLinus Torvalds bool "R10000" 13617cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 13625e83d430SRalf Baechle select CPU_HAS_PREFETCH 1363ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1364ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1365797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1366970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13671da177e4SLinus Torvalds help 13681da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 13691da177e4SLinus Torvalds 13701da177e4SLinus Torvaldsconfig CPU_RM7000 13711da177e4SLinus Torvalds bool "RM7000" 13727cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 13735e83d430SRalf Baechle select CPU_HAS_PREFETCH 1374ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1375ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1376797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1377970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13781da177e4SLinus Torvalds 13791da177e4SLinus Torvaldsconfig CPU_SB1 13801da177e4SLinus Torvalds bool "SB1" 13817cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1382ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1383ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1384797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1385970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13860004a9dfSRalf Baechle select WEAK_ORDERING 13871da177e4SLinus Torvalds 1388a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1389a86c7f72SDavid Daney bool "Cavium Octeon processor" 13905e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 13917ee91de4SYoichi Yuasa select ARCH_SPARSEMEM_ENABLE 1392a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1393a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1394a86c7f72SDavid Daney select SYS_SUPPORTS_SMP 1395a86c7f72SDavid Daney select NR_CPUS_DEFAULT_16 1396a86c7f72SDavid Daney select WEAK_ORDERING 1397a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 13989cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 13997ed18152SDavid Daney select LIBFDT 14007ed18152SDavid Daney select USE_OF 14019296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 1402930beb5aSFlorian Fainelli select SYS_HAS_DMA_OPS 1403930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1404a86c7f72SDavid Daney help 1405a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1406a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1407a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1408a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1409a86c7f72SDavid Daney 1410cd746249SJonas Gorskiconfig CPU_BMIPS 1411cd746249SJonas Gorski bool "Broadcom BMIPS" 1412cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1413cd746249SJonas Gorski select CPU_MIPS32 1414fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1415cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1416cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1417cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1418cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1419cd746249SJonas Gorski select DMA_NONCOHERENT 1420cd746249SJonas Gorski select IRQ_CPU 1421cd746249SJonas Gorski select SWAP_IO_SPACE 1422cd746249SJonas Gorski select WEAK_ORDERING 1423c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 142469aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1425c1c0c461SKevin Cernekee help 1426fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1427c1c0c461SKevin Cernekee 14287f058e85SJayachandran Cconfig CPU_XLR 14297f058e85SJayachandran C bool "Netlogic XLR SoC" 14307f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 14317f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14327f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14337f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1434970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14357f058e85SJayachandran C select WEAK_ORDERING 14367f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14377f058e85SJayachandran C help 14387f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 14391c773ea4SJayachandran C 14401c773ea4SJayachandran Cconfig CPU_XLP 14411c773ea4SJayachandran C bool "Netlogic XLP SoC" 14421c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 14431c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 14441c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 14451c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 14461c773ea4SJayachandran C select WEAK_ORDERING 14471c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 14481c773ea4SJayachandran C select CPU_HAS_PREFETCH 1449d6504846SJayachandran C select CPU_MIPSR2 14501c773ea4SJayachandran C help 14511c773ea4SJayachandran C Netlogic Microsystems XLP processors. 14521da177e4SLinus Torvaldsendchoice 14531da177e4SLinus Torvalds 1454622844bfSWu Zhangjinif CPU_LOONGSON2F 1455622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1456622844bfSWu Zhangjin bool 1457622844bfSWu Zhangjin 1458622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1459622844bfSWu Zhangjin bool 1460622844bfSWu Zhangjin 1461622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1462622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1463622844bfSWu Zhangjin default y 1464622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1465622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1466622844bfSWu Zhangjin help 1467622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1468622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1469622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1470622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1471622844bfSWu Zhangjin 1472622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1473622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1474622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1475622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1476622844bfSWu Zhangjin systems. 1477622844bfSWu Zhangjin 1478622844bfSWu Zhangjin If unsure, please say Y. 1479622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1480622844bfSWu Zhangjin 14811b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 14821b93b3c3SWu Zhangjin bool 14831b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 14841b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 148531c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 14861b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1487fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 14884e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 14891b93b3c3SWu Zhangjin 14901b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 14911b93b3c3SWu Zhangjin bool 14921b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 14931b93b3c3SWu Zhangjin 14943702bba5SWu Zhangjinconfig CPU_LOONGSON2 14953702bba5SWu Zhangjin bool 14963702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 14973702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 14983702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1499970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15003702bba5SWu Zhangjin 1501ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1502ca585cf9SKelvin Cheung bool 1503ca585cf9SKelvin Cheung select CPU_MIPS32 1504ca585cf9SKelvin Cheung select CPU_MIPSR2 1505ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1506ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1507ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1508ca585cf9SKelvin Cheung 1509fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 151004fa8bf7SJonas Gorski select SMP_UP if SMP 15111bbb6c1bSKevin Cernekee bool 1512cd746249SJonas Gorski 1513cd746249SJonas Gorskiconfig CPU_BMIPS4350 1514cd746249SJonas Gorski bool 1515cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1516cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1517cd746249SJonas Gorski 1518cd746249SJonas Gorskiconfig CPU_BMIPS4380 1519cd746249SJonas Gorski bool 1520cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1521cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1522cd746249SJonas Gorski 1523cd746249SJonas Gorskiconfig CPU_BMIPS5000 1524cd746249SJonas Gorski bool 1525cd746249SJonas Gorski select MIPS_CPU_SCACHE 1526cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1527cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 15281bbb6c1bSKevin Cernekee 15293702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 15302a21c730SFuxin Zhang bool 15312a21c730SFuxin Zhang 15326f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 15336f7a251aSWu Zhangjin bool 153455045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 153555045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 153622f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 15376f7a251aSWu Zhangjin 1538ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1539ca585cf9SKelvin Cheung bool 1540ca585cf9SKelvin Cheung 15417cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 15427cf8053bSRalf Baechle bool 15437cf8053bSRalf Baechle 15447cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 15457cf8053bSRalf Baechle bool 15467cf8053bSRalf Baechle 15477cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 15487cf8053bSRalf Baechle bool 15497cf8053bSRalf Baechle 15507cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 15517cf8053bSRalf Baechle bool 15527cf8053bSRalf Baechle 15537cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 15547cf8053bSRalf Baechle bool 15557cf8053bSRalf Baechle 15567cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 15577cf8053bSRalf Baechle bool 15587cf8053bSRalf Baechle 15597cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 15607cf8053bSRalf Baechle bool 15617cf8053bSRalf Baechle 15627cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 15637cf8053bSRalf Baechle bool 15647cf8053bSRalf Baechle 15657cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 15667cf8053bSRalf Baechle bool 15677cf8053bSRalf Baechle 15687cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 15697cf8053bSRalf Baechle bool 15707cf8053bSRalf Baechle 15717cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 15727cf8053bSRalf Baechle bool 15737cf8053bSRalf Baechle 15747cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 15757cf8053bSRalf Baechle bool 15767cf8053bSRalf Baechle 1577542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1578542c1020SShinya Kuribayashi bool 1579542c1020SShinya Kuribayashi 15807cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 15817cf8053bSRalf Baechle bool 15827cf8053bSRalf Baechle 15837cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 15847cf8053bSRalf Baechle bool 15857cf8053bSRalf Baechle 15867cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 15877cf8053bSRalf Baechle bool 15887cf8053bSRalf Baechle 15897cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 15907cf8053bSRalf Baechle bool 15917cf8053bSRalf Baechle 15927cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 15937cf8053bSRalf Baechle bool 15947cf8053bSRalf Baechle 15957cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 15967cf8053bSRalf Baechle bool 15977cf8053bSRalf Baechle 15985e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 15995e683389SDavid Daney bool 16005e683389SDavid Daney 1601cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1602c1c0c461SKevin Cernekee bool 1603c1c0c461SKevin Cernekee 1604fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1605c1c0c461SKevin Cernekee bool 1606cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1607c1c0c461SKevin Cernekee 1608c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1609c1c0c461SKevin Cernekee bool 1610cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1611c1c0c461SKevin Cernekee 1612c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1613c1c0c461SKevin Cernekee bool 1614cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1615c1c0c461SKevin Cernekee 1616c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1617c1c0c461SKevin Cernekee bool 1618cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1619c1c0c461SKevin Cernekee 16207f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 16217f058e85SJayachandran C bool 16227f058e85SJayachandran C 16231c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 16241c773ea4SJayachandran C bool 16251c773ea4SJayachandran C 162617099b11SRalf Baechle# 162717099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 162817099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 162917099b11SRalf Baechle# 16300004a9dfSRalf Baechleconfig WEAK_ORDERING 16310004a9dfSRalf Baechle bool 163217099b11SRalf Baechle 163317099b11SRalf Baechle# 163417099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 163517099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 163617099b11SRalf Baechle# 163717099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 163817099b11SRalf Baechle bool 16395e83d430SRalf Baechleendmenu 16405e83d430SRalf Baechle 16415e83d430SRalf Baechle# 16425e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 16435e83d430SRalf Baechle# 16445e83d430SRalf Baechleconfig CPU_MIPS32 16455e83d430SRalf Baechle bool 16465e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 16475e83d430SRalf Baechle 16485e83d430SRalf Baechleconfig CPU_MIPS64 16495e83d430SRalf Baechle bool 16505e83d430SRalf Baechle default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 16515e83d430SRalf Baechle 16525e83d430SRalf Baechle# 1653c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 16545e83d430SRalf Baechle# 16555e83d430SRalf Baechleconfig CPU_MIPSR1 16565e83d430SRalf Baechle bool 16575e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 16585e83d430SRalf Baechle 16595e83d430SRalf Baechleconfig CPU_MIPSR2 16605e83d430SRalf Baechle bool 1661a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 16625e83d430SRalf Baechle 16635e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 16645e83d430SRalf Baechle bool 16655e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 16665e83d430SRalf Baechle bool 16675e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 16685e83d430SRalf Baechle bool 16695e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 16705e83d430SRalf Baechle bool 167155045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 167255045ff5SWu Zhangjin bool 167355045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 167455045ff5SWu Zhangjin bool 16759cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 16769cffd154SDavid Daney bool 167722f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 167822f1fdfdSWu Zhangjin bool 167982622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 168082622284SDavid Daney bool 1681d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 16825e83d430SRalf Baechle 16838192c9eaSDavid Daney# 16848192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 16858192c9eaSDavid Daney# 16868192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 16878192c9eaSDavid Daney bool 1688f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 16898192c9eaSDavid Daney 16905e83d430SRalf Baechlemenu "Kernel type" 16915e83d430SRalf Baechle 16925e83d430SRalf Baechlechoice 16935e83d430SRalf Baechle prompt "Kernel code model" 16945e83d430SRalf Baechle help 16955e83d430SRalf Baechle You should only select this option if you have a workload that 16965e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 16975e83d430SRalf Baechle large memory. You will only be presented a single option in this 16985e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 16995e83d430SRalf Baechle 17005e83d430SRalf Baechleconfig 32BIT 17015e83d430SRalf Baechle bool "32-bit kernel" 17025e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 17035e83d430SRalf Baechle select TRAD_SIGNALS 17045e83d430SRalf Baechle help 17055e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 17065e83d430SRalf Baechleconfig 64BIT 17075e83d430SRalf Baechle bool "64-bit kernel" 17085e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 17095e83d430SRalf Baechle help 17105e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 17115e83d430SRalf Baechle 17125e83d430SRalf Baechleendchoice 17135e83d430SRalf Baechle 17142235a54dSSanjay Lalconfig KVM_GUEST 17152235a54dSSanjay Lal bool "KVM Guest Kernel" 1716f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 17172235a54dSSanjay Lal help 17182235a54dSSanjay Lal Select this option if building a guest kernel for KVM (Trap & Emulate) mode 17192235a54dSSanjay Lal 17202235a54dSSanjay Lalconfig KVM_HOST_FREQ 17212235a54dSSanjay Lal int "KVM Host Processor Frequency (MHz)" 17222235a54dSSanjay Lal depends on KVM_GUEST 17232235a54dSSanjay Lal default 500 17242235a54dSSanjay Lal help 17252235a54dSSanjay Lal Select this option if building a guest kernel for KVM to skip 17262235a54dSSanjay Lal RTC emulation when determining guest CPU Frequency. Instead, the guest 17272235a54dSSanjay Lal processor frequency is automatically derived from the host frequency. 17282235a54dSSanjay Lal 17291da177e4SLinus Torvaldschoice 17301da177e4SLinus Torvalds prompt "Kernel page size" 17311da177e4SLinus Torvalds default PAGE_SIZE_4KB 17321da177e4SLinus Torvalds 17331da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 17341da177e4SLinus Torvalds bool "4kB" 1735315fe625SWu Zhangjin depends on !CPU_LOONGSON2 17361da177e4SLinus Torvalds help 17371da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 17381da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 17391da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 17401da177e4SLinus Torvalds recommended for low memory systems. 17411da177e4SLinus Torvalds 17421da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 17431da177e4SLinus Torvalds bool "8kB" 17447d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 17451da177e4SLinus Torvalds help 17461da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 17471da177e4SLinus Torvalds the price of higher memory consumption. This option is available 1748c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 1749c52399beSRalf Baechle suitable Linux distribution to support this. 17501da177e4SLinus Torvalds 17511da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 17521da177e4SLinus Torvalds bool "16kB" 1753714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 17541da177e4SLinus Torvalds help 17551da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 17561da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 1757714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 1758714bfad6SRalf Baechle Linux distribution to support this. 17591da177e4SLinus Torvalds 1760c52399beSRalf Baechleconfig PAGE_SIZE_32KB 1761c52399beSRalf Baechle bool "32kB" 1762c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 1763c52399beSRalf Baechle help 1764c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 1765c52399beSRalf Baechle the price of higher memory consumption. This option is available 1766c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 1767c52399beSRalf Baechle distribution to support this. 1768c52399beSRalf Baechle 17691da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 17701da177e4SLinus Torvalds bool "64kB" 17717d60717eSKees Cook depends on !CPU_R3000 && !CPU_TX39XX 17721da177e4SLinus Torvalds help 17731da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 17741da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 17751da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 1776714bfad6SRalf Baechle writing this option is still high experimental. 17771da177e4SLinus Torvalds 17781da177e4SLinus Torvaldsendchoice 17791da177e4SLinus Torvalds 1780c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 1781c9bace7cSDavid Daney int "Maximum zone order" 178285f993b8SDavid Daney range 14 64 if HUGETLB_PAGE && PAGE_SIZE_64KB 178385f993b8SDavid Daney default "14" if HUGETLB_PAGE && PAGE_SIZE_64KB 178485f993b8SDavid Daney range 13 64 if HUGETLB_PAGE && PAGE_SIZE_32KB 178585f993b8SDavid Daney default "13" if HUGETLB_PAGE && PAGE_SIZE_32KB 178685f993b8SDavid Daney range 12 64 if HUGETLB_PAGE && PAGE_SIZE_16KB 178785f993b8SDavid Daney default "12" if HUGETLB_PAGE && PAGE_SIZE_16KB 1788c9bace7cSDavid Daney range 11 64 1789c9bace7cSDavid Daney default "11" 1790c9bace7cSDavid Daney help 1791c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 1792c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 1793c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 1794c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 1795c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 1796c9bace7cSDavid Daney increase this value. 1797c9bace7cSDavid Daney 1798c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 1799c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 1800c9bace7cSDavid Daney 1801c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 1802c9bace7cSDavid Daney when choosing a value for this option. 1803c9bace7cSDavid Daney 18040ab2b7d0SRaghu Gandhamconfig CEVT_GIC 18050ab2b7d0SRaghu Gandham bool "Use GIC global counter for clock events" 18060ab2b7d0SRaghu Gandham depends on IRQ_GIC && !(MIPS_SEAD3 || MIPS_MT_SMTC) 18070ab2b7d0SRaghu Gandham help 18080ab2b7d0SRaghu Gandham Use the GIC global counter for the clock events. The R4K clock 18090ab2b7d0SRaghu Gandham event driver is always present, so if the platform ends up not 18100ab2b7d0SRaghu Gandham detecting a GIC, it will fall back to the R4K timer for the 18110ab2b7d0SRaghu Gandham generation of clock events. 18120ab2b7d0SRaghu Gandham 18131da177e4SLinus Torvaldsconfig BOARD_SCACHE 18141da177e4SLinus Torvalds bool 18151da177e4SLinus Torvalds 18161da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 18171da177e4SLinus Torvalds bool 18181da177e4SLinus Torvalds select BOARD_SCACHE 18191da177e4SLinus Torvalds 18209318c51aSChris Dearman# 18219318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 18229318c51aSChris Dearman# 18239318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 18249318c51aSChris Dearman bool 18259318c51aSChris Dearman select BOARD_SCACHE 1826930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_6 18279318c51aSChris Dearman 18281da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 18291da177e4SLinus Torvalds bool 18301da177e4SLinus Torvalds select BOARD_SCACHE 18311da177e4SLinus Torvalds 18321da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 18331da177e4SLinus Torvalds bool 18341da177e4SLinus Torvalds select BOARD_SCACHE 18351da177e4SLinus Torvalds 18361da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 18371da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 18381da177e4SLinus Torvalds depends on CPU_SB1 18391da177e4SLinus Torvalds help 18401da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 18411da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 18421da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 18431da177e4SLinus Torvalds 18441da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 1845c8094b53SRalf Baechle bool 18461da177e4SLinus Torvalds 18473165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 18483165c846SFlorian Fainelli bool 18493165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 18503165c846SFlorian Fainelli 185191405eb6SFlorian Fainelliconfig CPU_R4K_FPU 185291405eb6SFlorian Fainelli bool 185391405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 185491405eb6SFlorian Fainelli 185562cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 185662cedc4fSFlorian Fainelli bool 185762cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 185862cedc4fSFlorian Fainelli 1859340ee4b9SRalf Baechlechoice 1860340ee4b9SRalf Baechle prompt "MIPS MT options" 1861f41ae0b2SRalf Baechle 1862f41ae0b2SRalf Baechleconfig MIPS_MT_DISABLED 1863c080faa5SSteven J. Hill bool "Disable multithreading support" 1864f41ae0b2SRalf Baechle help 1865c080faa5SSteven J. Hill Use this option if your platform does not support the MT ASE 1866c080faa5SSteven J. Hill which is hardware multithreading support. On systems without 1867c080faa5SSteven J. Hill an MT-enabled processor, this will be the only option that is 1868c080faa5SSteven J. Hill available in this menu. 1869340ee4b9SRalf Baechle 187059d6ab86SRalf Baechleconfig MIPS_MT_SMP 187159d6ab86SRalf Baechle bool "Use 1 TC on each available VPE for SMP" 187259d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 187359d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 1874d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1875c080faa5SSteven J. Hill select SYNC_R4K 187659d6ab86SRalf Baechle select MIPS_MT 187759d6ab86SRalf Baechle select SMP 187887353d8aSRalf Baechle select SMP_UP 1879c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 1880c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 1881399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 188259d6ab86SRalf Baechle help 1883c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 1884c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 1885c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 1886c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 1887c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 188859d6ab86SRalf Baechle 188941c594abSRalf Baechleconfig MIPS_MT_SMTC 1890c080faa5SSteven J. Hill bool "Use all TCs on all VPEs for SMP (DEPRECATED)" 1891f41ae0b2SRalf Baechle depends on CPU_MIPS32_R2 1892f41ae0b2SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 18930ee958e1SPaul Burton depends on !MIPS_CPS 1894f7062ddbSRalf Baechle select CPU_MIPSR2_IRQ_VI 1895d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1896f41ae0b2SRalf Baechle select MIPS_MT 189741c594abSRalf Baechle select SMP 189887353d8aSRalf Baechle select SMP_UP 1899c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 1900c080faa5SSteven J. Hill select NR_CPUS_DEFAULT_8 1901f41ae0b2SRalf Baechle help 1902c080faa5SSteven J. Hill This is a kernel model which is known as SMTC. This is 1903c080faa5SSteven J. Hill supported on cores with the MT ASE and presents all TCs 1904c080faa5SSteven J. Hill available on all VPEs to support SMP. For further 1905c080faa5SSteven J. Hill information see <http://www.linux-mips.org/wiki/34K#SMTC>. 190641c594abSRalf Baechle 1907340ee4b9SRalf Baechleendchoice 1908340ee4b9SRalf Baechle 1909f41ae0b2SRalf Baechleconfig MIPS_MT 1910f41ae0b2SRalf Baechle bool 1911f41ae0b2SRalf Baechle 19120ab7aefcSRalf Baechleconfig SCHED_SMT 19130ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 19140ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 19150ab7aefcSRalf Baechle default n 19160ab7aefcSRalf Baechle help 19170ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 19180ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 19190ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 19200ab7aefcSRalf Baechle 19210ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 19220ab7aefcSRalf Baechle bool 19230ab7aefcSRalf Baechle 1924f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 1925f41ae0b2SRalf Baechle bool 1926f41ae0b2SRalf Baechle 1927f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 1928f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 1929f088fc84SRalf Baechle default y 193007cc0c9eSRalf Baechle depends on MIPS_MT_SMP || MIPS_MT_SMTC 193107cc0c9eSRalf Baechle 193207cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 193307cc0c9eSRalf Baechle bool "VPE loader support." 1934704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 193507cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 193607cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 193707cc0c9eSRalf Baechle select MIPS_MT 193807cc0c9eSRalf Baechle help 193907cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 194007cc0c9eSRalf Baechle onto another VPE and running it. 1941f088fc84SRalf Baechle 194217a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 194317a1d523SDeng-Cheng Zhu bool 194417a1d523SDeng-Cheng Zhu default "y" 194517a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 194617a1d523SDeng-Cheng Zhu 19471a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 19481a2a6d7eSDeng-Cheng Zhu bool 19491a2a6d7eSDeng-Cheng Zhu default "y" 19501a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 19511a2a6d7eSDeng-Cheng Zhu 19520db34215SKevin D. Kissellconfig MIPS_MT_SMTC_IM_BACKSTOP 19530db34215SKevin D. Kissell bool "Use per-TC register bits as backstop for inhibited IM bits" 19540db34215SKevin D. Kissell depends on MIPS_MT_SMTC 19558531a35eSKevin D. Kissell default n 19560db34215SKevin D. Kissell help 19570db34215SKevin D. Kissell To support multiple TC microthreads acting as "CPUs" within 19580db34215SKevin D. Kissell a VPE, VPE-wide interrupt mask bits must be specially manipulated 19590db34215SKevin D. Kissell during interrupt handling. To support legacy drivers and interrupt 19600db34215SKevin D. Kissell controller management code, SMTC has a "backstop" to track and 19610db34215SKevin D. Kissell if necessary restore the interrupt mask. This has some performance 19628531a35eSKevin D. Kissell impact on interrupt service overhead. 19630db34215SKevin D. Kissell 1964f571eff0SKevin D. Kissellconfig MIPS_MT_SMTC_IRQAFF 1965f571eff0SKevin D. Kissell bool "Support IRQ affinity API" 1966f571eff0SKevin D. Kissell depends on MIPS_MT_SMTC 1967f571eff0SKevin D. Kissell default n 1968f571eff0SKevin D. Kissell help 1969f571eff0SKevin D. Kissell Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.) 1970f571eff0SKevin D. Kissell for SMTC Linux kernel. Requires platform support, of which 1971f571eff0SKevin D. Kissell an example can be found in the MIPS kernel i8259 and Malta 19728531a35eSKevin D. Kissell platform code. Adds some overhead to interrupt dispatch, and 19738531a35eSKevin D. Kissell should be used only if you know what you are doing. 1974f571eff0SKevin D. Kissell 1975e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 1976e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 1977e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 1978e01402b1SRalf Baechle default y 1979e01402b1SRalf Baechle help 1980e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 1981e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 1982e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 1983e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 1984e01402b1SRalf Baechle 1985e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 1986e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 1987e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 19885e83d430SRalf Baechle help 1989e01402b1SRalf Baechle 1990da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 1991da615cf6SDeng-Cheng Zhu bool 1992da615cf6SDeng-Cheng Zhu default "y" 1993da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 1994da615cf6SDeng-Cheng Zhu 19952c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 19962c973ef0SDeng-Cheng Zhu bool 19972c973ef0SDeng-Cheng Zhu default "y" 19982c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 19992c973ef0SDeng-Cheng Zhu 20004a16ff4cSRalf Baechleconfig MIPS_CMP 2001c080faa5SSteven J. Hill bool "MIPS CMP support" 2002c080faa5SSteven J. Hill depends on SYS_SUPPORTS_MIPS_CMP && MIPS_MT_SMP 200372e20142SPaul Burton select MIPS_GIC_IPI 2004eb9b5141STim Anderson select SYNC_R4K 20054a16ff4cSRalf Baechle select WEAK_ORDERING 20064a16ff4cSRalf Baechle default n 20074a16ff4cSRalf Baechle help 2008c080faa5SSteven J. Hill Enable Coherency Manager processor (CMP) support. 20094a16ff4cSRalf Baechle 20100ee958e1SPaul Burtonconfig MIPS_CPS 20110ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 20120ee958e1SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 20130ee958e1SPaul Burton select MIPS_CM 20140ee958e1SPaul Burton select MIPS_CPC 20150ee958e1SPaul Burton select MIPS_GIC_IPI 20160ee958e1SPaul Burton select SMP 20170ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 20180ee958e1SPaul Burton select SYS_SUPPORTS_SMP 20190ee958e1SPaul Burton select WEAK_ORDERING 20200ee958e1SPaul Burton help 20210ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 20220ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 20230ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 20240ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 20250ee958e1SPaul Burton support is unavailable. 20260ee958e1SPaul Burton 202772e20142SPaul Burtonconfig MIPS_GIC_IPI 202872e20142SPaul Burton bool 202972e20142SPaul Burton 20309f98f3ddSPaul Burtonconfig MIPS_CM 20319f98f3ddSPaul Burton bool 20329f98f3ddSPaul Burton 20339c38cf44SPaul Burtonconfig MIPS_CPC 20349c38cf44SPaul Burton bool 20359c38cf44SPaul Burton 20361da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 20371da177e4SLinus Torvalds bool 20381da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 20391da177e4SLinus Torvalds default y 20401da177e4SLinus Torvalds 20411da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 20421da177e4SLinus Torvalds bool 20431da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 20441da177e4SLinus Torvalds default y 20451da177e4SLinus Torvalds 20461da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 20471da177e4SLinus Torvalds bool 20481da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 20491da177e4SLinus Torvalds default y 20501da177e4SLinus Torvalds 20512235a54dSSanjay Lal 20521da177e4SLinus Torvaldsconfig 64BIT_PHYS_ADDR 2053d806cb2bSRalf Baechle bool 20541da177e4SLinus Torvalds 205560ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 205660ec6571Spascal@pabr.org def_bool 64BIT_PHYS_ADDR 205760ec6571Spascal@pabr.org 20589693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 20599693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 20609693a853SFranck Bui-Huu bool "Support for the SmartMIPS ASE" 20619693a853SFranck Bui-Huu help 20629693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 20639693a853SFranck Bui-Huu increased security at both hardware and software level for 20649693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 20659693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 20669693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 20679693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 20689693a853SFranck Bui-Huu here. 20699693a853SFranck Bui-Huu 2070bce86083SSteven J. Hillconfig CPU_MICROMIPS 2071bce86083SSteven J. Hill depends on SYS_SUPPORTS_MICROMIPS 2072bce86083SSteven J. Hill bool "Build kernel using microMIPS ISA" 2073bce86083SSteven J. Hill help 2074bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2075bce86083SSteven J. Hill microMIPS ISA 2076bce86083SSteven J. Hill 20771da177e4SLinus Torvaldsconfig CPU_HAS_WB 2078f7062ddbSRalf Baechle bool 2079e01402b1SRalf Baechle 2080df0ac8a4SKevin Cernekeeconfig XKS01 2081df0ac8a4SKevin Cernekee bool 2082df0ac8a4SKevin Cernekee 2083f41ae0b2SRalf Baechle# 2084f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2085f41ae0b2SRalf Baechle# 2086e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2087f41ae0b2SRalf Baechle bool 2088e01402b1SRalf Baechle 2089f41ae0b2SRalf Baechle# 2090f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2091f41ae0b2SRalf Baechle# 2092e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2093f41ae0b2SRalf Baechle bool 2094e01402b1SRalf Baechle 20951da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 20961da177e4SLinus Torvalds bool 20971da177e4SLinus Torvalds depends on !CPU_R3000 20981da177e4SLinus Torvalds default y 20991da177e4SLinus Torvalds 21001da177e4SLinus Torvalds# 210120d60d99SMaciej W. Rozycki# CPU non-features 210220d60d99SMaciej W. Rozycki# 210320d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 210420d60d99SMaciej W. Rozycki bool 210520d60d99SMaciej W. Rozycki 210620d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 210720d60d99SMaciej W. Rozycki bool 210820d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 210920d60d99SMaciej W. Rozycki 211020d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 211120d60d99SMaciej W. Rozycki bool 211220d60d99SMaciej W. Rozycki 211320d60d99SMaciej W. Rozycki# 21141da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 21151da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 21161da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 21171da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 21181da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 21191da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 21201da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 21211da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2122797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2123797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2124797798c1SRalf Baechle# support. 21251da177e4SLinus Torvalds# 21261da177e4SLinus Torvaldsconfig HIGHMEM 21271da177e4SLinus Torvalds bool "High Memory Support" 2128797798c1SRalf Baechle depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM 2129797798c1SRalf Baechle 2130797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2131797798c1SRalf Baechle bool 2132797798c1SRalf Baechle 2133797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2134797798c1SRalf Baechle bool 21351da177e4SLinus Torvalds 21369693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 21379693a853SFranck Bui-Huu bool 21389693a853SFranck Bui-Huu 2139a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2140a6a4834cSSteven J. Hill bool 2141a6a4834cSSteven J. Hill 2142b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2143b4819b59SYoichi Yuasa def_bool y 2144f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2145b4819b59SYoichi Yuasa 2146d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2147d8cb4e11SRalf Baechle bool 2148d8cb4e11SRalf Baechle default y if SGI_IP27 2149d8cb4e11SRalf Baechle help 21503dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2151d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2152d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2153d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2154d8cb4e11SRalf Baechle 2155b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2156b1c6cd42SAtsushi Nemoto bool 21577de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 215831473747SAtsushi Nemoto 2159d8cb4e11SRalf Baechleconfig NUMA 2160d8cb4e11SRalf Baechle bool "NUMA Support" 2161d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2162d8cb4e11SRalf Baechle help 2163d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2164d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2165d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2166d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2167d8cb4e11SRalf Baechle disabled. 2168d8cb4e11SRalf Baechle 2169d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2170d8cb4e11SRalf Baechle bool 2171d8cb4e11SRalf Baechle 2172c80d79d7SYasunori Gotoconfig NODES_SHIFT 2173c80d79d7SYasunori Goto int 2174c80d79d7SYasunori Goto default "6" 2175c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2176c80d79d7SYasunori Goto 217714f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 217814f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 21794be3d2f3SZi Shen Lim depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP) 218014f70012SDeng-Cheng Zhu default y 218114f70012SDeng-Cheng Zhu help 218214f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 218314f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 218414f70012SDeng-Cheng Zhu 2185b4819b59SYoichi Yuasasource "mm/Kconfig" 2186b4819b59SYoichi Yuasa 21871da177e4SLinus Torvaldsconfig SMP 21881da177e4SLinus Torvalds bool "Multi-Processing support" 2189e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2190e73ea273SRalf Baechle help 21911da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 21924a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 21934a474157SRobert Graffham than one CPU, say Y. 21941da177e4SLinus Torvalds 21954a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 21961da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 21971da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 21984a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 21991da177e4SLinus Torvalds will run faster if you say N here. 22001da177e4SLinus Torvalds 22011da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 22021da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 22031da177e4SLinus Torvalds 220403502faaSAdrian Bunk See also the SMP-HOWTO available at 220503502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 22061da177e4SLinus Torvalds 22071da177e4SLinus Torvalds If you don't know what to do here, say N. 22081da177e4SLinus Torvalds 220987353d8aSRalf Baechleconfig SMP_UP 221087353d8aSRalf Baechle bool 221187353d8aSRalf Baechle 22124a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 22134a16ff4cSRalf Baechle bool 22144a16ff4cSRalf Baechle 22150ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 22160ee958e1SPaul Burton bool 22170ee958e1SPaul Burton 2218e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2219e73ea273SRalf Baechle bool 2220e73ea273SRalf Baechle 2221130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2222130e2fb7SRalf Baechle bool 2223130e2fb7SRalf Baechle 2224130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2225130e2fb7SRalf Baechle bool 2226130e2fb7SRalf Baechle 2227130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2228130e2fb7SRalf Baechle bool 2229130e2fb7SRalf Baechle 2230130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2231130e2fb7SRalf Baechle bool 2232130e2fb7SRalf Baechle 2233130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2234130e2fb7SRalf Baechle bool 2235130e2fb7SRalf Baechle 22361da177e4SLinus Torvaldsconfig NR_CPUS 22371da177e4SLinus Torvalds int "Maximum number of CPUs (2-64)" 2238c5eaff3eSMarkos Chandras range 2 64 22391da177e4SLinus Torvalds depends on SMP 2240130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2241130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2242130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2243130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2244130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 22451da177e4SLinus Torvalds help 22461da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 22471da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 22481da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 224972ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 225072ede9b1SAtsushi Nemoto and 2 for all others. 22511da177e4SLinus Torvalds 22521da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 225372ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 225472ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 225572ede9b1SAtsushi Nemoto power of two. 22561da177e4SLinus Torvalds 2257399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2258399aaa25SAl Cooper bool 2259399aaa25SAl Cooper 22601723b4a3SAtsushi Nemoto# 22611723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 22621723b4a3SAtsushi Nemoto# 22631723b4a3SAtsushi Nemoto 22641723b4a3SAtsushi Nemotochoice 22651723b4a3SAtsushi Nemoto prompt "Timer frequency" 22661723b4a3SAtsushi Nemoto default HZ_250 22671723b4a3SAtsushi Nemoto help 22681723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 22691723b4a3SAtsushi Nemoto 22701723b4a3SAtsushi Nemoto config HZ_48 22710f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 22721723b4a3SAtsushi Nemoto 22731723b4a3SAtsushi Nemoto config HZ_100 22741723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 22751723b4a3SAtsushi Nemoto 22761723b4a3SAtsushi Nemoto config HZ_128 22771723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 22781723b4a3SAtsushi Nemoto 22791723b4a3SAtsushi Nemoto config HZ_250 22801723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 22811723b4a3SAtsushi Nemoto 22821723b4a3SAtsushi Nemoto config HZ_256 22831723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 22841723b4a3SAtsushi Nemoto 22851723b4a3SAtsushi Nemoto config HZ_1000 22861723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 22871723b4a3SAtsushi Nemoto 22881723b4a3SAtsushi Nemoto config HZ_1024 22891723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 22901723b4a3SAtsushi Nemoto 22911723b4a3SAtsushi Nemotoendchoice 22921723b4a3SAtsushi Nemoto 22931723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 22941723b4a3SAtsushi Nemoto bool 22951723b4a3SAtsushi Nemoto 22961723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 22971723b4a3SAtsushi Nemoto bool 22981723b4a3SAtsushi Nemoto 22991723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 23001723b4a3SAtsushi Nemoto bool 23011723b4a3SAtsushi Nemoto 23021723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 23031723b4a3SAtsushi Nemoto bool 23041723b4a3SAtsushi Nemoto 23051723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 23061723b4a3SAtsushi Nemoto bool 23071723b4a3SAtsushi Nemoto 23081723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 23091723b4a3SAtsushi Nemoto bool 23101723b4a3SAtsushi Nemoto 23111723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 23121723b4a3SAtsushi Nemoto bool 23131723b4a3SAtsushi Nemoto 23141723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 23151723b4a3SAtsushi Nemoto bool 23161723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 23171723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 23181723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 23191723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 23201723b4a3SAtsushi Nemoto 23211723b4a3SAtsushi Nemotoconfig HZ 23221723b4a3SAtsushi Nemoto int 23231723b4a3SAtsushi Nemoto default 48 if HZ_48 23241723b4a3SAtsushi Nemoto default 100 if HZ_100 23251723b4a3SAtsushi Nemoto default 128 if HZ_128 23261723b4a3SAtsushi Nemoto default 250 if HZ_250 23271723b4a3SAtsushi Nemoto default 256 if HZ_256 23281723b4a3SAtsushi Nemoto default 1000 if HZ_1000 23291723b4a3SAtsushi Nemoto default 1024 if HZ_1024 23301723b4a3SAtsushi Nemoto 2331e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 23321da177e4SLinus Torvalds 2333ea6e942bSAtsushi Nemotoconfig KEXEC 23347d60717eSKees Cook bool "Kexec system call" 2335ea6e942bSAtsushi Nemoto help 2336ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2337ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 23383dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2339ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2340ea6e942bSAtsushi Nemoto 234101dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2342ea6e942bSAtsushi Nemoto 2343ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2344ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2345bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2346bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2347bf220695SGeert Uytterhoeven made. 2348ea6e942bSAtsushi Nemoto 23497aa1c8f4SRalf Baechleconfig CRASH_DUMP 23507aa1c8f4SRalf Baechle bool "Kernel crash dumps" 23517aa1c8f4SRalf Baechle help 23527aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 23537aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 23547aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 23557aa1c8f4SRalf Baechle a specially reserved region and then later executed after 23567aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 23577aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 23587aa1c8f4SRalf Baechle PHYSICAL_START. 23597aa1c8f4SRalf Baechle 23607aa1c8f4SRalf Baechleconfig PHYSICAL_START 23617aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 23627aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 23637aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 23647aa1c8f4SRalf Baechle depends on CRASH_DUMP 23657aa1c8f4SRalf Baechle help 23667aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 23677aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 23687aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 23697aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 23707aa1c8f4SRalf Baechle passed to the panic-ed kernel). 23717aa1c8f4SRalf Baechle 2372ea6e942bSAtsushi Nemotoconfig SECCOMP 2373ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2374293c5bd1SRalf Baechle depends on PROC_FS 2375ea6e942bSAtsushi Nemoto default y 2376ea6e942bSAtsushi Nemoto help 2377ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2378ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2379ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2380ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2381ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2382ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2383ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2384ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2385ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2386ea6e942bSAtsushi Nemoto 2387ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2388ea6e942bSAtsushi Nemoto 2389597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 2390597ce172SPaul Burton bool "Support for O32 binaries using 64-bit FP" 2391597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2392597ce172SPaul Burton default y 2393597ce172SPaul Burton help 2394597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2395597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2396597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2397597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2398597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2399597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2400597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2401597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2402597ce172SPaul Burton saying N here. 2403597ce172SPaul Burton 2404597ce172SPaul Burton If unsure, say Y. 2405597ce172SPaul Burton 2406f2ffa5abSDezhong Diaoconfig USE_OF 24070b3e06fdSJonas Gorski bool 2408f2ffa5abSDezhong Diao select OF 2409e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2410abd2363fSGrant Likely select IRQ_DOMAIN 2411f2ffa5abSDezhong Diao 24125e83d430SRalf Baechleendmenu 24135e83d430SRalf Baechle 24141df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 24151df0f0ffSAtsushi Nemoto bool 24161df0f0ffSAtsushi Nemoto default y 24171df0f0ffSAtsushi Nemoto 24181df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 24191df0f0ffSAtsushi Nemoto bool 24201df0f0ffSAtsushi Nemoto default y 24211df0f0ffSAtsushi Nemoto 2422b6c3539bSRalf Baechlesource "init/Kconfig" 2423b6c3539bSRalf Baechle 2424dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2425dc52ddc0SMatt Helsley 24261da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 24271da177e4SLinus Torvalds 24285e83d430SRalf Baechleconfig HW_HAS_EISA 24295e83d430SRalf Baechle bool 24301da177e4SLinus Torvaldsconfig HW_HAS_PCI 24311da177e4SLinus Torvalds bool 24321da177e4SLinus Torvalds 24331da177e4SLinus Torvaldsconfig PCI 24341da177e4SLinus Torvalds bool "Support for PCI controller" 24351da177e4SLinus Torvalds depends on HW_HAS_PCI 2436abb4ae46SRalf Baechle select PCI_DOMAINS 24370f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 24381da177e4SLinus Torvalds help 24391da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 24401da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 24411da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 24421da177e4SLinus Torvalds say Y, otherwise N. 24431da177e4SLinus Torvalds 24441da177e4SLinus Torvaldsconfig PCI_DOMAINS 24451da177e4SLinus Torvalds bool 24461da177e4SLinus Torvalds 24471da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 24481da177e4SLinus Torvalds 24493f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 24503f787ca4SJonas Gorski 24511da177e4SLinus Torvalds# 24521da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 24531da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 24541da177e4SLinus Torvalds# users to choose the right thing ... 24551da177e4SLinus Torvalds# 24561da177e4SLinus Torvaldsconfig ISA 24571da177e4SLinus Torvalds bool 24581da177e4SLinus Torvalds 24591da177e4SLinus Torvaldsconfig EISA 24601da177e4SLinus Torvalds bool "EISA support" 24615e83d430SRalf Baechle depends on HW_HAS_EISA 24621da177e4SLinus Torvalds select ISA 2463aa414dffSRalf Baechle select GENERIC_ISA_DMA 24641da177e4SLinus Torvalds ---help--- 24651da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 24661da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 24671da177e4SLinus Torvalds 24681da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 24691da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 24701da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 24711da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 24721da177e4SLinus Torvalds 24731da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 24741da177e4SLinus Torvalds 24751da177e4SLinus Torvalds Otherwise, say N. 24761da177e4SLinus Torvalds 24771da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 24781da177e4SLinus Torvalds 24791da177e4SLinus Torvaldsconfig TC 24801da177e4SLinus Torvalds bool "TURBOchannel support" 24811da177e4SLinus Torvalds depends on MACH_DECSTATION 24821da177e4SLinus Torvalds help 248350a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 248450a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 248550a23e6eSJustin P. Mattock at: 248650a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 248750a23e6eSJustin P. Mattock and: 248850a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 248950a23e6eSJustin P. Mattock Linux driver support status is documented at: 249050a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 24911da177e4SLinus Torvalds 24921da177e4SLinus Torvaldsconfig MMU 24931da177e4SLinus Torvalds bool 24941da177e4SLinus Torvalds default y 24951da177e4SLinus Torvalds 2496d865bea4SRalf Baechleconfig I8253 2497d865bea4SRalf Baechle bool 2498798778b8SRussell King select CLKSRC_I8253 24992d02612fSThomas Gleixner select CLKEVT_I8253 25009726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2501d865bea4SRalf Baechle 2502e05eb3f8SRalf Baechleconfig ZONE_DMA 2503e05eb3f8SRalf Baechle bool 2504e05eb3f8SRalf Baechle 2505cce335aeSRalf Baechleconfig ZONE_DMA32 2506cce335aeSRalf Baechle bool 2507cce335aeSRalf Baechle 25081da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 25091da177e4SLinus Torvalds 25101da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 25111da177e4SLinus Torvalds 2512388b78adSAlexandre Bounineconfig RAPIDIO 251356abde72SAlexandre Bounine tristate "RapidIO support" 2514388b78adSAlexandre Bounine depends on PCI 2515388b78adSAlexandre Bounine default n 2516388b78adSAlexandre Bounine help 2517388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2518388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2519388b78adSAlexandre Bounine 2520388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2521388b78adSAlexandre Bounine 25221da177e4SLinus Torvaldsendmenu 25231da177e4SLinus Torvalds 25241da177e4SLinus Torvaldsmenu "Executable file formats" 25251da177e4SLinus Torvalds 25261da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 25271da177e4SLinus Torvalds 25281da177e4SLinus Torvaldsconfig TRAD_SIGNALS 25291da177e4SLinus Torvalds bool 25301da177e4SLinus Torvalds 25311da177e4SLinus Torvaldsconfig MIPS32_COMPAT 25321da177e4SLinus Torvalds bool "Kernel support for Linux/MIPS 32-bit binary compatibility" 2533875d43e7SRalf Baechle depends on 64BIT 25341da177e4SLinus Torvalds help 25351da177e4SLinus Torvalds Select this option if you want Linux/MIPS 32-bit binary 25361da177e4SLinus Torvalds compatibility. Since all software available for Linux/MIPS is 25371da177e4SLinus Torvalds currently 32-bit you should say Y here. 25381da177e4SLinus Torvalds 25391da177e4SLinus Torvaldsconfig COMPAT 25401da177e4SLinus Torvalds bool 25411da177e4SLinus Torvalds depends on MIPS32_COMPAT 254248b25c43SChris Metcalf select ARCH_WANT_OLD_COMPAT_IPC 25431da177e4SLinus Torvalds default y 25441da177e4SLinus Torvalds 254505e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 254605e43966SAtsushi Nemoto bool 254705e43966SAtsushi Nemoto depends on COMPAT && SYSVIPC 254805e43966SAtsushi Nemoto default y 254905e43966SAtsushi Nemoto 25501da177e4SLinus Torvaldsconfig MIPS32_O32 25511da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 25521da177e4SLinus Torvalds depends on MIPS32_COMPAT 25531da177e4SLinus Torvalds help 25541da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 25551da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 25561da177e4SLinus Torvalds existing binaries are in this format. 25571da177e4SLinus Torvalds 25581da177e4SLinus Torvalds If unsure, say Y. 25591da177e4SLinus Torvalds 25601da177e4SLinus Torvaldsconfig MIPS32_N32 25611da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 25621da177e4SLinus Torvalds depends on MIPS32_COMPAT 25631da177e4SLinus Torvalds help 25641da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 25651da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 25661da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 25671da177e4SLinus Torvalds cases. 25681da177e4SLinus Torvalds 25691da177e4SLinus Torvalds If unsure, say N. 25701da177e4SLinus Torvalds 25711da177e4SLinus Torvaldsconfig BINFMT_ELF32 25721da177e4SLinus Torvalds bool 25731da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 25741da177e4SLinus Torvalds 25752116245eSRalf Baechleendmenu 25761da177e4SLinus Torvalds 25772116245eSRalf Baechlemenu "Power management options" 2578952fa954SRodolfo Giometti 2579363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2580363c55caSWu Zhangjin def_bool y 25813f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2582363c55caSWu Zhangjin 2583f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2584f4cb5700SJohannes Berg def_bool y 25853f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2586f4cb5700SJohannes Berg 25872116245eSRalf Baechlesource "kernel/power/Kconfig" 2588952fa954SRodolfo Giometti 25891da177e4SLinus Torvaldsendmenu 25901da177e4SLinus Torvalds 25917a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 25927a998935SViresh Kumar bool 25937a998935SViresh Kumar 25947a998935SViresh Kumarif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 25957a998935SViresh Kumarmenu "CPU Power Management" 25967a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 25977a998935SViresh Kumarendmenu 25987a998935SViresh Kumarendif 25999726b43aSWu Zhangjin 2600d5950b43SSam Ravnborgsource "net/Kconfig" 2601d5950b43SSam Ravnborg 26021da177e4SLinus Torvaldssource "drivers/Kconfig" 26031da177e4SLinus Torvalds 260498cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 260598cdee0eSRalf Baechle 26061da177e4SLinus Torvaldssource "fs/Kconfig" 26071da177e4SLinus Torvalds 26081da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 26091da177e4SLinus Torvalds 26101da177e4SLinus Torvaldssource "security/Kconfig" 26111da177e4SLinus Torvalds 26121da177e4SLinus Torvaldssource "crypto/Kconfig" 26131da177e4SLinus Torvalds 26141da177e4SLinus Torvaldssource "lib/Kconfig" 26152235a54dSSanjay Lal 26162235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 2617