xref: /linux/arch/mips/Kconfig (revision 2024972ef5330dcae47f400c586764d8f4cb0b04)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
440e084a5SRalf Baechle	select ARCH_SUPPORTS_UPROBES
5a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
6393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
75fac4f7aSPaul Burton	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
81ee3630aSRalf Baechle	select ARCH_USE_BUILTIN_BSWAP
9c3fc5cd5SRalf Baechle	select HAVE_CONTEXT_TRACKING
10f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
11ec7748b5SSam Ravnborg	select HAVE_IDE
1242d4b839SMathieu Desnoyers	select HAVE_OPROFILE
137f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
147f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
1588547001SJason Wessel	select HAVE_ARCH_KGDB
16490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
17c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
183f5fdb4bSMarkos Chandras	select HAVE_BPF_JIT if !CPU_MICROMIPS
19d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
20538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
21538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
2264575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
2329c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
24c1bf207dSDavid Daney	select HAVE_KPROBES
25c1bf207dSDavid Daney	select HAVE_KRETPROBES
26fb59e394SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
27b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
281d7bf993SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
292b68f6caSKees Cook	select ARCH_HAS_ELF_RANDOMIZE
30383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
3130ad29bbSHuacai Chen	select RTC_LIB if !MACH_LOONGSON64
322b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
337463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
3448e1fd5aSDavid Daney	select HAVE_DMA_ATTRS
35f4649382SZubair Lutfullah Kakakhel	select HAVE_DMA_CONTIGUOUS
3648e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
373bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
38f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3978857614SMarkos Chandras	select GENERIC_PCI_IOMAP
4094bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
41c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
420f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
439d15ffc8STejun Heo	select HAVE_MEMBLOCK
449d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
459d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
46360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
474b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
48cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
49929de4ccSDeng-Cheng Zhu	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
50cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
51786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
524febd95aSStephen Rothwell	select VIRT_TO_BUS
532f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
542f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
5550150d2bSAl Viro	select CLONE_BACKWARDS
56d1a1dc0bSDave Hansen	select HAVE_DEBUG_STACKOVERFLOW
5719952a92SKees Cook	select HAVE_CC_STACKPROTECTOR
58b1d4c6caSJames Hogan	select CPU_PM if CPU_IDLE
59cc7964afSPaul Burton	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
6090cee759SPaul Burton	select ARCH_BINFMT_ELF_STATE
61d79d853dSMarkos Chandras	select SYSCTL_EXCEPTION_TRACE
62bb877e96SDeng-Cheng Zhu	select HAVE_VIRT_CPU_ACCOUNTING_GEN
63ec9ddad3SDeng-Cheng Zhu	select HAVE_IRQ_TIME_ACCOUNTING
64a7f4df4eSAlex Smith	select GENERIC_TIME_VSYSCALL
65a7f4df4eSAlex Smith	select ARCH_CLOCKSOURCE_DATA
661da177e4SLinus Torvalds
671da177e4SLinus Torvaldsmenu "Machine selection"
681da177e4SLinus Torvalds
695e83d430SRalf Baechlechoice
705e83d430SRalf Baechle	prompt "System type"
715e83d430SRalf Baechle	default SGI_IP22
721da177e4SLinus Torvalds
7342a4f17dSManuel Laussconfig MIPS_ALCHEMY
74c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
7534adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
76f772cdb2SRalf Baechle	select CEVT_R4K
77d7ea335cSSteven J. Hill	select CSRC_R4K
7867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7988e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
8042a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
8142a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
8242a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
83efb12436SAlexandre Courbot	select ARCH_REQUIRE_GPIOLIB
841b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
8547440229SManuel Lauss	select COMMON_CLK
861da177e4SLinus Torvalds
877ca5dc14SFlorian Fainelliconfig AR7
887ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
897ca5dc14SFlorian Fainelli	select BOOT_ELF32
907ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
917ca5dc14SFlorian Fainelli	select CEVT_R4K
927ca5dc14SFlorian Fainelli	select CSRC_R4K
9367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
947ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
957ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
967ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
977ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
987ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
997ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
100377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1011b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
1025f3c9098SFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
1037ca5dc14SFlorian Fainelli	select VLYNQ
1048551fb64SYoichi Yuasa	select HAVE_CLK
1057ca5dc14SFlorian Fainelli	help
1067ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1077ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1087ca5dc14SFlorian Fainelli
10943cc739fSSergey Ryazanovconfig ATH25
11043cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
11143cc739fSSergey Ryazanov	select CEVT_R4K
11243cc739fSSergey Ryazanov	select CSRC_R4K
11343cc739fSSergey Ryazanov	select DMA_NONCOHERENT
11467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1151753e74eSSergey Ryazanov	select IRQ_DOMAIN
11643cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
11743cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
11843cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
1198aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
12043cc739fSSergey Ryazanov	help
12143cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
12243cc739fSSergey Ryazanov
123d4a67d9dSGabor Juhosconfig ATH79
124d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
125ff591a91SAlban Bedel	select ARCH_HAS_RESET_CONTROLLER
1266eae43c5SGabor Juhos	select ARCH_REQUIRE_GPIOLIB
127d4a67d9dSGabor Juhos	select BOOT_RAW
128d4a67d9dSGabor Juhos	select CEVT_R4K
129d4a67d9dSGabor Juhos	select CSRC_R4K
130d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
13194638067SGabor Juhos	select HAVE_CLK
132411520afSAlban Bedel	select COMMON_CLK
1332c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
13467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1350aabf1a4SGabor Juhos	select MIPS_MACHINE
136d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
137d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
138d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
139d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
140377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
141da628e8bSAlban Bedel	select SYS_SUPPORTS_ZBOOT
14203c8c407SAlban Bedel	select USE_OF
143d4a67d9dSGabor Juhos	help
144d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
145d4a67d9dSGabor Juhos
1465f2d4459SKevin Cernekeeconfig BMIPS_GENERIC
1475f2d4459SKevin Cernekee	bool "Broadcom Generic BMIPS kernel"
148d666cd02SKevin Cernekee	select BOOT_RAW
149d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
150d666cd02SKevin Cernekee	select USE_OF
151d666cd02SKevin Cernekee	select CEVT_R4K
152d666cd02SKevin Cernekee	select CSRC_R4K
153d666cd02SKevin Cernekee	select SYNC_R4K
154d666cd02SKevin Cernekee	select COMMON_CLK
15560b858f2SKevin Cernekee	select BCM7038_L1_IRQ
15660b858f2SKevin Cernekee	select BCM7120_L2_IRQ
15760b858f2SKevin Cernekee	select BRCMSTB_L2_IRQ
15867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
15960b858f2SKevin Cernekee	select DMA_NONCOHERENT
160d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
16160b858f2SKevin Cernekee	select SYS_SUPPORTS_LITTLE_ENDIAN
162d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
163d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
16460b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS32_3300
16560b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4350
16660b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4380
167d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
168d666cd02SKevin Cernekee	select SWAP_IO_SPACE
16960b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17060b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
17160b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17260b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
173d666cd02SKevin Cernekee	help
1745f2d4459SKevin Cernekee	  Build a generic DT-based kernel image that boots on select
1755f2d4459SKevin Cernekee	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
1765f2d4459SKevin Cernekee	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
1775f2d4459SKevin Cernekee	  must be set appropriately for your board.
178d666cd02SKevin Cernekee
1791c0c13ebSAurelien Jarnoconfig BCM47XX
180c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
1812da4c74dSHauke Mehrtens	select ARCH_WANT_OPTIONAL_GPIOLIB
182fe08f8c2SHauke Mehrtens	select BOOT_RAW
18342f77542SRalf Baechle	select CEVT_R4K
184940f6b48SRalf Baechle	select CSRC_R4K
1851c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1861c0c13ebSAurelien Jarno	select HW_HAS_PCI
18767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
188314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
189dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1901c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1911c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
192377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
19325e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
194e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
195c949c0bcSRafał Miłecki	select GPIOLIB
196c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
197f6e734a8SRafał Miłecki	select BCM47XX_NVRAM
1981c0c13ebSAurelien Jarno	help
1991c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
2001c0c13ebSAurelien Jarno
201e7300d04SMaxime Bizonconfig BCM63XX
202e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
203ae8de61cSFlorian Fainelli	select BOOT_RAW
204e7300d04SMaxime Bizon	select CEVT_R4K
205e7300d04SMaxime Bizon	select CSRC_R4K
206fc264022SJonas Gorski	select SYNC_R4K
207e7300d04SMaxime Bizon	select DMA_NONCOHERENT
20867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
209e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
210e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
211e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
212e7300d04SMaxime Bizon	select SWAP_IO_SPACE
213e7300d04SMaxime Bizon	select ARCH_REQUIRE_GPIOLIB
2143e82eeebSYoichi Yuasa	select HAVE_CLK
215af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
216e7300d04SMaxime Bizon	help
217e7300d04SMaxime Bizon	 Support for BCM63XX based boards
218e7300d04SMaxime Bizon
2191da177e4SLinus Torvaldsconfig MIPS_COBALT
2203fa986faSMartin Michlmayr	bool "Cobalt Server"
22142f77542SRalf Baechle	select CEVT_R4K
222940f6b48SRalf Baechle	select CSRC_R4K
2231097c6acSYoichi Yuasa	select CEVT_GT641XX
2241da177e4SLinus Torvalds	select DMA_NONCOHERENT
2251da177e4SLinus Torvalds	select HW_HAS_PCI
226d865bea4SRalf Baechle	select I8253
2271da177e4SLinus Torvalds	select I8259
22867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
229d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
230252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
231e25bfc92SYoichi Yuasa	select PCI
2327cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
2330a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
234ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2350e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
2365e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
237e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
2381da177e4SLinus Torvalds
2391da177e4SLinus Torvaldsconfig MACH_DECSTATION
2403fa986faSMartin Michlmayr	bool "DECstations"
2411da177e4SLinus Torvalds	select BOOT_ELF32
2426457d9fcSYoichi Yuasa	select CEVT_DS1287
24381d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
2444247417dSYoichi Yuasa	select CSRC_IOASIC
24581d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
24620d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
24720d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
24820d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
2491da177e4SLinus Torvalds	select DMA_NONCOHERENT
250ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
25167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
2527cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
2537cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
254ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2557d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2565e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
2571723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
2581723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
2591723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
260930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
2615e83d430SRalf Baechle	help
2621da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
2631da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
2641da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
2651da177e4SLinus Torvalds
2661da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
2671da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
2681da177e4SLinus Torvalds
2691da177e4SLinus Torvalds		DECstation 5000/50
2701da177e4SLinus Torvalds		DECstation 5000/150
2711da177e4SLinus Torvalds		DECstation 5000/260
2721da177e4SLinus Torvalds		DECsystem 5900/260
2731da177e4SLinus Torvalds
2741da177e4SLinus Torvalds	  otherwise choose R3000.
2751da177e4SLinus Torvalds
2765e83d430SRalf Baechleconfig MACH_JAZZ
2773fa986faSMartin Michlmayr	bool "Jazz family of machines"
2780e2794b0SRalf Baechle	select FW_ARC
2790e2794b0SRalf Baechle	select FW_ARC32
2805e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
28142f77542SRalf Baechle	select CEVT_R4K
282940f6b48SRalf Baechle	select CSRC_R4K
283e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2845e83d430SRalf Baechle	select GENERIC_ISA_DMA
2858a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
28667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
287d865bea4SRalf Baechle	select I8253
2885e83d430SRalf Baechle	select I8259
2895e83d430SRalf Baechle	select ISA
2907cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2915e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2927d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2931723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2941da177e4SLinus Torvalds	help
2955e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
2965e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
297692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
2985e83d430SRalf Baechle	 Olivetti M700-10 workstations.
2995e83d430SRalf Baechle
300de361e8bSPaul Burtonconfig MACH_INGENIC
301de361e8bSPaul Burton	bool "Ingenic SoC based machines"
3025ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
3035ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
304f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
3055ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
30667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3075ebabe59SLars-Peter Clausen	select ARCH_REQUIRE_GPIOLIB
308ff1930c6SPaul Burton	select COMMON_CLK
30983bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
310ffb1843dSPaul Burton	select BUILTIN_DTB
311ffb1843dSPaul Burton	select USE_OF
3126ec127fbSPaul Burton	select LIBFDT
3135ebabe59SLars-Peter Clausen
314171bb2f1SJohn Crispinconfig LANTIQ
315171bb2f1SJohn Crispin	bool "Lantiq based platforms"
316171bb2f1SJohn Crispin	select DMA_NONCOHERENT
31767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
318171bb2f1SJohn Crispin	select CEVT_R4K
319171bb2f1SJohn Crispin	select CSRC_R4K
320171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
321171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
322171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
323171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
324377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
325171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
326171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
327171bb2f1SJohn Crispin	select ARCH_REQUIRE_GPIOLIB
328171bb2f1SJohn Crispin	select SWAP_IO_SPACE
329171bb2f1SJohn Crispin	select BOOT_RAW
330287e3f3fSJohn Crispin	select HAVE_MACH_CLKDEV
331287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
332a0392222SJohn Crispin	select USE_OF
3333f8c50c9SJohn Crispin	select PINCTRL
3343f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
335c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
336c530781cSJohn Crispin	select RESET_CONTROLLER
337171bb2f1SJohn Crispin
3381f21d2bdSBrian Murphyconfig LASAT
3391f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
34042f77542SRalf Baechle	select CEVT_R4K
34116f0bbbcSRalf Baechle	select CRC32
342940f6b48SRalf Baechle	select CSRC_R4K
3431f21d2bdSBrian Murphy	select DMA_NONCOHERENT
3441f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
3451f21d2bdSBrian Murphy	select HW_HAS_PCI
34667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3471f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
3481f21d2bdSBrian Murphy	select MIPS_NILE4
3491f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
3501f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
3511f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
3521f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
3531f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
3541f21d2bdSBrian Murphy
35530ad29bbSHuacai Chenconfig MACH_LOONGSON32
35630ad29bbSHuacai Chen	bool "Loongson-1 family of machines"
357c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
358ade299d8SYoichi Yuasa	help
35930ad29bbSHuacai Chen	  This enables support for the Loongson-1 family of machines.
36085749d24SWu Zhangjin
36130ad29bbSHuacai Chen	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
36230ad29bbSHuacai Chen	  the Institute of Computing Technology (ICT), Chinese Academy of
36330ad29bbSHuacai Chen	  Sciences (CAS).
364ade299d8SYoichi Yuasa
36530ad29bbSHuacai Chenconfig MACH_LOONGSON64
36630ad29bbSHuacai Chen	bool "Loongson-2/3 family of machines"
367ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
368ca585cf9SKelvin Cheung	help
36930ad29bbSHuacai Chen	  This enables the support of Loongson-2/3 family of machines.
370ca585cf9SKelvin Cheung
37130ad29bbSHuacai Chen	  Loongson-2 is a family of single-core CPUs and Loongson-3 is a
37230ad29bbSHuacai Chen	  family of multi-core CPUs. They are both 64-bit general-purpose
37330ad29bbSHuacai Chen	  MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
37430ad29bbSHuacai Chen	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
37530ad29bbSHuacai Chen	  in the People's Republic of China. The chief architect is Professor
37630ad29bbSHuacai Chen	  Weiwu Hu.
377ca585cf9SKelvin Cheung
3786a438309SAndrew Brestickerconfig MACH_PISTACHIO
3796a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
3806a438309SAndrew Bresticker	select ARCH_REQUIRE_GPIOLIB
3816a438309SAndrew Bresticker	select BOOT_ELF32
3826a438309SAndrew Bresticker	select BOOT_RAW
3836a438309SAndrew Bresticker	select CEVT_R4K
3846a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
3856a438309SAndrew Bresticker	select COMMON_CLK
3866a438309SAndrew Bresticker	select CSRC_R4K
3876a438309SAndrew Bresticker	select DMA_MAYBE_COHERENT
38867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3896a438309SAndrew Bresticker	select LIBFDT
3906a438309SAndrew Bresticker	select MFD_SYSCON
3916a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
3926a438309SAndrew Bresticker	select MIPS_GIC
3936a438309SAndrew Bresticker	select PINCTRL
3946a438309SAndrew Bresticker	select REGULATOR
3956a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
3966a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
3976a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
3986a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
3996a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
4006a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
401018f62eeSEzequiel Garcia	select SYS_HAS_EARLY_PRINTK
402018f62eeSEzequiel Garcia	select USE_GENERIC_EARLY_PRINTK_8250
4036a438309SAndrew Bresticker	select USE_OF
4046a438309SAndrew Bresticker	help
4056a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
4066a438309SAndrew Bresticker
4071da177e4SLinus Torvaldsconfig MIPS_MALTA
4083fa986faSMartin Michlmayr	bool "MIPS Malta board"
40961ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
4101da177e4SLinus Torvalds	select BOOT_ELF32
411fa71c960SRalf Baechle	select BOOT_RAW
412e8823d26SPaul Burton	select BUILTIN_DTB
41342f77542SRalf Baechle	select CEVT_R4K
414940f6b48SRalf Baechle	select CSRC_R4K
415fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
41642b002abSGuenter Roeck	select COMMON_CLK
417885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
4181da177e4SLinus Torvalds	select GENERIC_ISA_DMA
4198a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
42067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4218a19b8f1SAndrew Bresticker	select MIPS_GIC
4221da177e4SLinus Torvalds	select HW_HAS_PCI
423d865bea4SRalf Baechle	select I8253
4241da177e4SLinus Torvalds	select I8259
4255e83d430SRalf Baechle	select MIPS_BONITO64
4269318c51aSChris Dearman	select MIPS_CPU_SCACHE
427a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
428252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
4295e83d430SRalf Baechle	select MIPS_MSC
430ecafe3e9SPaul Burton	select SMP_UP if SMP
4311da177e4SLinus Torvalds	select SWAP_IO_SPACE
4327cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
4337cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
434bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
435c5b36783SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R5
436575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
4377cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
4385d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
439575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
4407cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
4417cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
442ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
443ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4445e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
445c5b36783SSteven J. Hill	select SYS_SUPPORTS_HIGHMEM
4465e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
447424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
4480365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
449e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
450377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
451f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
4529693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
4531b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
454e8823d26SPaul Burton	select USE_OF
455abcc82b1SJames Hogan	select ZONE_DMA32 if 64BIT
456e81a8c7dSPaul Burton	select BUILTIN_DTB
457e81a8c7dSPaul Burton	select LIBFDT
4581da177e4SLinus Torvalds	help
459f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
4601da177e4SLinus Torvalds	  board.
4611da177e4SLinus Torvalds
462ec47b274SSteven J. Hillconfig MIPS_SEAD3
463ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
464ec47b274SSteven J. Hill	select BOOT_ELF32
465ec47b274SSteven J. Hill	select BOOT_RAW
466f262b5f2SAndrew Bresticker	select BUILTIN_DTB
467ec47b274SSteven J. Hill	select CEVT_R4K
468ec47b274SSteven J. Hill	select CSRC_R4K
469fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
47042b002abSGuenter Roeck	select COMMON_CLK
471ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
472ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
473ec47b274SSteven J. Hill	select DMA_NONCOHERENT
47467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4758a19b8f1SAndrew Bresticker	select MIPS_GIC
47644327236SQais Yousef	select LIBFDT
477ec47b274SSteven J. Hill	select MIPS_MSC
478ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
479ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
480ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
481ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
482ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
483ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
484ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
485ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
486ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
487a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
488377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
489ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
490ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
4919b731009SSteven J. Hill	select USE_OF
492ec47b274SSteven J. Hill	help
493ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
494ec47b274SSteven J. Hill	  board.
495ec47b274SSteven J. Hill
496a83860c2SRalf Baechleconfig NEC_MARKEINS
497a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
498a83860c2SRalf Baechle	select SOC_EMMA2RH
499a83860c2SRalf Baechle	select HW_HAS_PCI
500a83860c2SRalf Baechle	help
501a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
502ade299d8SYoichi Yuasa
5035e83d430SRalf Baechleconfig MACH_VR41XX
50474142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
50542f77542SRalf Baechle	select CEVT_R4K
506940f6b48SRalf Baechle	select CSRC_R4K
5077cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
508377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
50927fdd325SYoichi Yuasa	select ARCH_REQUIRE_GPIOLIB
5105e83d430SRalf Baechle
511edb6310aSDaniel Lairdconfig NXP_STB220
512edb6310aSDaniel Laird	bool "NXP STB220 board"
513edb6310aSDaniel Laird	select SOC_PNX833X
514edb6310aSDaniel Laird	help
515edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
516edb6310aSDaniel Laird
517edb6310aSDaniel Lairdconfig NXP_STB225
518edb6310aSDaniel Laird	bool "NXP 225 board"
519edb6310aSDaniel Laird	select SOC_PNX833X
520edb6310aSDaniel Laird	select SOC_PNX8335
521edb6310aSDaniel Laird	help
522edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
523edb6310aSDaniel Laird
5249267a30dSMarc St-Jeanconfig PMC_MSP
5259267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
52639d30c13SAnoop P A	select CEVT_R4K
52739d30c13SAnoop P A	select CSRC_R4K
5289267a30dSMarc St-Jean	select DMA_NONCOHERENT
5299267a30dSMarc St-Jean	select SWAP_IO_SPACE
5309267a30dSMarc St-Jean	select NO_EXCEPT_FILL
5319267a30dSMarc St-Jean	select BOOT_RAW
5329267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
5339267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
5349267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
5359267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
536377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
53767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5389267a30dSMarc St-Jean	select SERIAL_8250
5399267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
5409296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
5419296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
5429267a30dSMarc St-Jean	help
5439267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
5449267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
5459267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
5469267a30dSMarc St-Jean	  a variety of MIPS cores.
5479267a30dSMarc St-Jean
548ae2b5bb6SJohn Crispinconfig RALINK
549ae2b5bb6SJohn Crispin	bool "Ralink based machines"
550ae2b5bb6SJohn Crispin	select CEVT_R4K
551ae2b5bb6SJohn Crispin	select CSRC_R4K
552ae2b5bb6SJohn Crispin	select BOOT_RAW
553ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
55467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
555ae2b5bb6SJohn Crispin	select USE_OF
556ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
557ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
558ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
559ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
560377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
561ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
562ae2b5bb6SJohn Crispin	select HAVE_MACH_CLKDEV
563ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
5642a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
5652a153f1cSJohn Crispin	select RESET_CONTROLLER
566ae2b5bb6SJohn Crispin
5671da177e4SLinus Torvaldsconfig SGI_IP22
5683fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
5690e2794b0SRalf Baechle	select FW_ARC
5700e2794b0SRalf Baechle	select FW_ARC32
5711da177e4SLinus Torvalds	select BOOT_ELF32
57242f77542SRalf Baechle	select CEVT_R4K
573940f6b48SRalf Baechle	select CSRC_R4K
574e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
5751da177e4SLinus Torvalds	select DMA_NONCOHERENT
5765e83d430SRalf Baechle	select HW_HAS_EISA
577d865bea4SRalf Baechle	select I8253
57868de4803SThomas Bogendoerfer	select I8259
5791da177e4SLinus Torvalds	select IP22_CPU_SCACHE
58067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
581aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
582e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
583e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
58436e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
585e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
586e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
587e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
5881da177e4SLinus Torvalds	select SWAP_IO_SPACE
5897cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
5907cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
5912b5e63f6SMartin Michlmayr	#
5922b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
5932b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
5942b5e63f6SMartin Michlmayr	#
5952b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
5962b5e63f6SMartin Michlmayr	# for a more details discussion
5972b5e63f6SMartin Michlmayr	#
5982b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
599ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
600ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6015e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
602930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6031da177e4SLinus Torvalds	help
6041da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
6051da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
6061da177e4SLinus Torvalds	  that runs on these, say Y here.
6071da177e4SLinus Torvalds
6081da177e4SLinus Torvaldsconfig SGI_IP27
6093fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
6100e2794b0SRalf Baechle	select FW_ARC
6110e2794b0SRalf Baechle	select FW_ARC64
6125e83d430SRalf Baechle	select BOOT_ELF64
613e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
614634286f1SRalf Baechle	select DMA_COHERENT
61536a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
6161da177e4SLinus Torvalds	select HW_HAS_PCI
617130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
6187cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
619ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6205e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
621d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
6221a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
623930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6241da177e4SLinus Torvalds	help
6251da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
6261da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
6271da177e4SLinus Torvalds	  here.
6281da177e4SLinus Torvalds
629e2defae5SThomas Bogendoerferconfig SGI_IP28
6307d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
6310e2794b0SRalf Baechle	select FW_ARC
6320e2794b0SRalf Baechle	select FW_ARC64
633e2defae5SThomas Bogendoerfer	select BOOT_ELF64
634e2defae5SThomas Bogendoerfer	select CEVT_R4K
635e2defae5SThomas Bogendoerfer	select CSRC_R4K
636e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
637e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
638e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
63967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
640e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
641e2defae5SThomas Bogendoerfer	select I8253
642e2defae5SThomas Bogendoerfer	select I8259
643e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
644e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6455b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
646e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
647e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
648e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
649e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
650e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6512b5e63f6SMartin Michlmayr	#
6522b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6532b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6542b5e63f6SMartin Michlmayr	#
6552b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6562b5e63f6SMartin Michlmayr	# for a more details discussion
6572b5e63f6SMartin Michlmayr	#
6582b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
659e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
660e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
661dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
662e2defae5SThomas Bogendoerfer      help
663e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
664e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
665e2defae5SThomas Bogendoerfer
6661da177e4SLinus Torvaldsconfig SGI_IP32
667cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
6680e2794b0SRalf Baechle	select FW_ARC
6690e2794b0SRalf Baechle	select FW_ARC32
6701da177e4SLinus Torvalds	select BOOT_ELF32
67142f77542SRalf Baechle	select CEVT_R4K
672940f6b48SRalf Baechle	select CSRC_R4K
6731da177e4SLinus Torvalds	select DMA_NONCOHERENT
6741da177e4SLinus Torvalds	select HW_HAS_PCI
67567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
6761da177e4SLinus Torvalds	select R5000_CPU_SCACHE
6771da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
6787cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
6797cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
6807cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
681dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
682ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6835e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6841da177e4SLinus Torvalds	help
6851da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
6861da177e4SLinus Torvalds
687ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
688ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
6895e83d430SRalf Baechle	select BOOT_ELF32
6905e83d430SRalf Baechle	select DMA_COHERENT
6915e83d430SRalf Baechle	select SIBYTE_BCM1120
6925e83d430SRalf Baechle	select SWAP_IO_SPACE
6937cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
6945e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
6955e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6965e83d430SRalf Baechle
697ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
698ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
6995e83d430SRalf Baechle	select BOOT_ELF32
7005e83d430SRalf Baechle	select DMA_COHERENT
7015e83d430SRalf Baechle	select SIBYTE_BCM1120
7025e83d430SRalf Baechle	select SWAP_IO_SPACE
7037cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7045e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7055e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7065e83d430SRalf Baechle
7075e83d430SRalf Baechleconfig SIBYTE_CRHONE
7083fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
7095e83d430SRalf Baechle	select BOOT_ELF32
7105e83d430SRalf Baechle	select DMA_COHERENT
7115e83d430SRalf Baechle	select SIBYTE_BCM1125
7125e83d430SRalf Baechle	select SWAP_IO_SPACE
7137cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7145e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7155e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7165e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7175e83d430SRalf Baechle
718ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
719ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
720ade299d8SYoichi Yuasa	select BOOT_ELF32
721ade299d8SYoichi Yuasa	select DMA_COHERENT
722ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
723ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
724ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
725ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
726ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
727ade299d8SYoichi Yuasa
728ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
729ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
730ade299d8SYoichi Yuasa	select BOOT_ELF32
731ade299d8SYoichi Yuasa	select DMA_COHERENT
732fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
733ade299d8SYoichi Yuasa	select SIBYTE_SB1250
734ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
735ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
736ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
737ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
738ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
739cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
740ade299d8SYoichi Yuasa
741ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
742ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
743ade299d8SYoichi Yuasa	select BOOT_ELF32
744ade299d8SYoichi Yuasa	select DMA_COHERENT
745fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
746ade299d8SYoichi Yuasa	select SIBYTE_SB1250
747ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
748ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
749ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
750ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
751ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
752ade299d8SYoichi Yuasa
753ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
754ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
755ade299d8SYoichi Yuasa	select BOOT_ELF32
756ade299d8SYoichi Yuasa	select DMA_COHERENT
757ade299d8SYoichi Yuasa	select SIBYTE_SB1250
758ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
759ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
760ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
761ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
762ade299d8SYoichi Yuasa
763ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
764ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
765ade299d8SYoichi Yuasa	select BOOT_ELF32
766ade299d8SYoichi Yuasa	select DMA_COHERENT
767ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
768ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
769ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
770ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
771ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
772651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
773ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
774cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
775ade299d8SYoichi Yuasa
77614b36af4SThomas Bogendoerferconfig SNI_RM
77714b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
7780e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
7790e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
780aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
7815e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
7825e83d430SRalf Baechle	select BOOT_ELF32
78342f77542SRalf Baechle	select CEVT_R4K
784940f6b48SRalf Baechle	select CSRC_R4K
785e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
7865e83d430SRalf Baechle	select DMA_NONCOHERENT
7875e83d430SRalf Baechle	select GENERIC_ISA_DMA
7888a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
7895e83d430SRalf Baechle	select HW_HAS_EISA
7905e83d430SRalf Baechle	select HW_HAS_PCI
79167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
792d865bea4SRalf Baechle	select I8253
7935e83d430SRalf Baechle	select I8259
7945e83d430SRalf Baechle	select ISA
7954a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
7967cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
7974a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
798c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
7994a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
80036a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
801ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
8027d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
8034a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
8045e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
8055e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8061da177e4SLinus Torvalds	help
80714b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
80814b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
8095e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
8105e83d430SRalf Baechle	  support this machine type.
8111da177e4SLinus Torvalds
812edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
813edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
8145e83d430SRalf Baechle
815edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
816edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
81723fbee9dSRalf Baechle
81873b4390fSRalf Baechleconfig MIKROTIK_RB532
81973b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
82073b4390fSRalf Baechle	select CEVT_R4K
82173b4390fSRalf Baechle	select CSRC_R4K
82273b4390fSRalf Baechle	select DMA_NONCOHERENT
82373b4390fSRalf Baechle	select HW_HAS_PCI
82467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
82573b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
82673b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
82773b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
82873b4390fSRalf Baechle	select SWAP_IO_SPACE
82973b4390fSRalf Baechle	select BOOT_RAW
830d888e25bSFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
831930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
83273b4390fSRalf Baechle	help
83373b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
83473b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
83573b4390fSRalf Baechle
8369ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
8379ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
838a86c7f72SDavid Daney	select CEVT_R4K
83934adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
840a86c7f72SDavid Daney	select DMA_COHERENT
841a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
842a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
843f65aad41SRalf Baechle	select EDAC_SUPPORT
844b01aec9bSBorislav Petkov	select EDAC_ATOMIC_SCRUB
84573569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
84673569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
847a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
8485e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
849a86c7f72SDavid Daney	select SWAP_IO_SPACE
850e8635b48SDavid Daney	select HW_HAS_PCI
851f00e001eSDavid Daney	select ZONE_DMA32
852465aaed0SDavid Daney	select HOLES_IN_ZONE
85399cab4bbSDavid Daney	select ARCH_REQUIRE_GPIOLIB
8546e511163SDavid Daney	select LIBFDT
8556e511163SDavid Daney	select USE_OF
8566e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
8576e511163SDavid Daney	select SYS_SUPPORTS_SMP
8586e511163SDavid Daney	select NR_CPUS_DEFAULT_16
859e326479fSAndrew Bresticker	select BUILTIN_DTB
8608c1e6b14SDavid Daney	select MTD_COMPLEX_MAPPINGS
861a86c7f72SDavid Daney	help
862a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
863a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
864a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
865a86c7f72SDavid Daney	  Some of the supported boards are:
866a86c7f72SDavid Daney		EBT3000
867a86c7f72SDavid Daney		EBH3000
868a86c7f72SDavid Daney		EBH3100
869a86c7f72SDavid Daney		Thunder
870a86c7f72SDavid Daney		Kodama
871a86c7f72SDavid Daney		Hikari
872a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
873a86c7f72SDavid Daney
8747f058e85SJayachandran Cconfig NLM_XLR_BOARD
8757f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
8767f058e85SJayachandran C	select BOOT_ELF32
8777f058e85SJayachandran C	select NLM_COMMON
8787f058e85SJayachandran C	select SYS_HAS_CPU_XLR
8797f058e85SJayachandran C	select SYS_SUPPORTS_SMP
8807f058e85SJayachandran C	select HW_HAS_PCI
8817f058e85SJayachandran C	select SWAP_IO_SPACE
8827f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
8837f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
88434adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
8857f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
8867f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
8877f058e85SJayachandran C	select DMA_COHERENT
8887f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
8897f058e85SJayachandran C	select CEVT_R4K
8907f058e85SJayachandran C	select CSRC_R4K
89167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
892b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
8937f058e85SJayachandran C	select SYNC_R4K
8947f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
8958f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
8968f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
8977f058e85SJayachandran C	help
8987f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
8997f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
9007f058e85SJayachandran C
9011c773ea4SJayachandran Cconfig NLM_XLP_BOARD
9021c773ea4SJayachandran C	bool "Netlogic XLP based systems"
9031c773ea4SJayachandran C	select BOOT_ELF32
9041c773ea4SJayachandran C	select NLM_COMMON
9051c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
9061c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
9071c773ea4SJayachandran C	select HW_HAS_PCI
9081c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9091c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
91034adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
911079e3160SKamlakant Patel	select ARCH_REQUIRE_GPIOLIB
9121c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9131c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
9141c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9151c773ea4SJayachandran C	select DMA_COHERENT
9161c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
9171c773ea4SJayachandran C	select CEVT_R4K
9181c773ea4SJayachandran C	select CSRC_R4K
91967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
920b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9211c773ea4SJayachandran C	select SYNC_R4K
9221c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
9232f6528e1SJayachandran C	select USE_OF
9248f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9258f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9261c773ea4SJayachandran C	help
9271c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
9281c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
9291c773ea4SJayachandran C
9309bc463beSDavid Daneyconfig MIPS_PARAVIRT
9319bc463beSDavid Daney	bool "Para-Virtualized guest system"
9329bc463beSDavid Daney	select CEVT_R4K
9339bc463beSDavid Daney	select CSRC_R4K
9349bc463beSDavid Daney	select DMA_COHERENT
9359bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
9369bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
9379bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
9389bc463beSDavid Daney	select SYS_SUPPORTS_SMP
9399bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
9409bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
9419bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
9429bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
9439bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
9449bc463beSDavid Daney	select HW_HAS_PCI
9459bc463beSDavid Daney	select SWAP_IO_SPACE
9469bc463beSDavid Daney	help
9479bc463beSDavid Daney	  This option supports guest running under ????
9489bc463beSDavid Daney
9491da177e4SLinus Torvaldsendchoice
9501da177e4SLinus Torvalds
951e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
9523b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
953d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
954a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
955e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
9568945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig"
9575e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
9585ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
9598ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
9601f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
961af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig"
9620f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
963ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
96429c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
96538b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
96622b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
9675e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
968a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
96930ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig"
97030ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig"
9717f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
972ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
97338b18f72SRalf Baechle
9745e83d430SRalf Baechleendmenu
9755e83d430SRalf Baechle
9761da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
9771da177e4SLinus Torvalds	bool
9781da177e4SLinus Torvalds	default y
9791da177e4SLinus Torvalds
9801da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
9811da177e4SLinus Torvalds	bool
9821da177e4SLinus Torvalds
983f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
984f0d1b0b3SDavid Howells	bool
985f0d1b0b3SDavid Howells	default n
986f0d1b0b3SDavid Howells
987f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
988f0d1b0b3SDavid Howells	bool
989f0d1b0b3SDavid Howells	default n
990f0d1b0b3SDavid Howells
9913c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
9923c9ee7efSAkinobu Mita	bool
9933c9ee7efSAkinobu Mita	default y
9943c9ee7efSAkinobu Mita
9951da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
9961da177e4SLinus Torvalds	bool
9971da177e4SLinus Torvalds	default y
9981da177e4SLinus Torvalds
999ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
10001cc89038SAtsushi Nemoto	bool
10011cc89038SAtsushi Nemoto	default y
10021cc89038SAtsushi Nemoto
10031da177e4SLinus Torvalds#
10041da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
10051da177e4SLinus Torvalds#
10060e2794b0SRalf Baechleconfig FW_ARC
10071da177e4SLinus Torvalds	bool
10081da177e4SLinus Torvalds
100961ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
101061ed242dSRalf Baechle	bool
101161ed242dSRalf Baechle
10129267a30dSMarc St-Jeanconfig BOOT_RAW
10139267a30dSMarc St-Jean	bool
10149267a30dSMarc St-Jean
1015217dd11eSRalf Baechleconfig CEVT_BCM1480
1016217dd11eSRalf Baechle	bool
1017217dd11eSRalf Baechle
10186457d9fcSYoichi Yuasaconfig CEVT_DS1287
10196457d9fcSYoichi Yuasa	bool
10206457d9fcSYoichi Yuasa
10211097c6acSYoichi Yuasaconfig CEVT_GT641XX
10221097c6acSYoichi Yuasa	bool
10231097c6acSYoichi Yuasa
102442f77542SRalf Baechleconfig CEVT_R4K
102542f77542SRalf Baechle	bool
102642f77542SRalf Baechle
1027217dd11eSRalf Baechleconfig CEVT_SB1250
1028217dd11eSRalf Baechle	bool
1029217dd11eSRalf Baechle
1030229f773eSAtsushi Nemotoconfig CEVT_TXX9
1031229f773eSAtsushi Nemoto	bool
1032229f773eSAtsushi Nemoto
1033217dd11eSRalf Baechleconfig CSRC_BCM1480
1034217dd11eSRalf Baechle	bool
1035217dd11eSRalf Baechle
10364247417dSYoichi Yuasaconfig CSRC_IOASIC
10374247417dSYoichi Yuasa	bool
10384247417dSYoichi Yuasa
1039940f6b48SRalf Baechleconfig CSRC_R4K
1040940f6b48SRalf Baechle	bool
1041940f6b48SRalf Baechle
1042217dd11eSRalf Baechleconfig CSRC_SB1250
1043217dd11eSRalf Baechle	bool
1044217dd11eSRalf Baechle
1045a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL
1046a7f4df4eSAlex Smith	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1047a7f4df4eSAlex Smith
1048a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
10497444a72eSMichael Buesch	select ARCH_REQUIRE_GPIOLIB
1050a9aec7feSAtsushi Nemoto	bool
1051a9aec7feSAtsushi Nemoto
10520e2794b0SRalf Baechleconfig FW_CFE
1053df78b5c8SAurelien Jarno	bool
1054df78b5c8SAurelien Jarno
10554bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
105634adb28dSRalf Baechle	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
10574bafad92SFUJITA Tomonori
105840e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES
105940e084a5SRalf Baechle	bool
106040e084a5SRalf Baechle
1061885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1062885014bcSFelix Fietkau	select DMA_NONCOHERENT
1063885014bcSFelix Fietkau	bool
1064885014bcSFelix Fietkau
10651da177e4SLinus Torvaldsconfig DMA_COHERENT
10661da177e4SLinus Torvalds	bool
10671da177e4SLinus Torvalds
10681da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
10691da177e4SLinus Torvalds	bool
1070e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
10714ce588cdSRalf Baechle
1072e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
10734ce588cdSRalf Baechle	bool
10741da177e4SLinus Torvalds
107536a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
10761da177e4SLinus Torvalds	bool
10771da177e4SLinus Torvalds
1078dbb74540SRalf Baechleconfig HOTPLUG_CPU
10791b2bc75cSRalf Baechle	bool "Support for hot-pluggable CPUs"
108040b31360SStephen Rothwell	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
10811b2bc75cSRalf Baechle	help
10821b2bc75cSRalf Baechle	  Say Y here to allow turning CPUs off and on. CPUs can be
10831b2bc75cSRalf Baechle	  controlled through /sys/devices/system/cpu.
10841b2bc75cSRalf Baechle	  (Note: power management support will enable this option
10851b2bc75cSRalf Baechle	    automatically on SMP systems. )
10861b2bc75cSRalf Baechle	  Say N if you want to disable CPU hotplug.
10871b2bc75cSRalf Baechle
10881b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1089dbb74540SRalf Baechle	bool
1090dbb74540SRalf Baechle
10911da177e4SLinus Torvaldsconfig MIPS_BONITO64
10921da177e4SLinus Torvalds	bool
10931da177e4SLinus Torvalds
10941da177e4SLinus Torvaldsconfig MIPS_MSC
10951da177e4SLinus Torvalds	bool
10961da177e4SLinus Torvalds
10971f21d2bdSBrian Murphyconfig MIPS_NILE4
10981f21d2bdSBrian Murphy	bool
10991f21d2bdSBrian Murphy
110039b8d525SRalf Baechleconfig SYNC_R4K
110139b8d525SRalf Baechle	bool
110239b8d525SRalf Baechle
1103487d70d0SGabor Juhosconfig MIPS_MACHINE
1104487d70d0SGabor Juhos	def_bool n
1105487d70d0SGabor Juhos
1106ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1107d388d685SMaciej W. Rozycki	def_bool n
1108d388d685SMaciej W. Rozycki
11094e0748f5SMarkos Chandrasconfig GENERIC_CSUM
11104e0748f5SMarkos Chandras	bool
11114e0748f5SMarkos Chandras
11128313da30SRalf Baechleconfig GENERIC_ISA_DMA
11138313da30SRalf Baechle	bool
11148313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1115a35bee8aSNamhyung Kim	select ISA_DMA_API
11168313da30SRalf Baechle
1117aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1118aa414dffSRalf Baechle	bool
11198313da30SRalf Baechle	select GENERIC_ISA_DMA
1120aa414dffSRalf Baechle
1121a35bee8aSNamhyung Kimconfig ISA_DMA_API
1122a35bee8aSNamhyung Kim	bool
1123a35bee8aSNamhyung Kim
1124465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1125465aaed0SDavid Daney	bool
1126465aaed0SDavid Daney
11275e83d430SRalf Baechle#
11286b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
11295e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
11305e83d430SRalf Baechle# choice statement should be more obvious to the user.
11315e83d430SRalf Baechle#
11325e83d430SRalf Baechlechoice
11336b2aac42SMasanari Iida	prompt "Endianness selection"
11341da177e4SLinus Torvalds	help
11351da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
11365e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
11373cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
11385e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
11393dde6ad8SDavid Sterba	  one or the other endianness.
11405e83d430SRalf Baechle
11415e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
11425e83d430SRalf Baechle	bool "Big endian"
11435e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
11445e83d430SRalf Baechle
11455e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
11465e83d430SRalf Baechle	bool "Little endian"
11475e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
11485e83d430SRalf Baechle
11495e83d430SRalf Baechleendchoice
11505e83d430SRalf Baechle
115122b0763aSDavid Daneyconfig EXPORT_UASM
115222b0763aSDavid Daney	bool
115322b0763aSDavid Daney
11542116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
11552116245eSRalf Baechle	bool
11562116245eSRalf Baechle
11575e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
11585e83d430SRalf Baechle	bool
11595e83d430SRalf Baechle
11605e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
11615e83d430SRalf Baechle	bool
11621da177e4SLinus Torvalds
11639cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
11649cffd154SDavid Daney	bool
11659cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
11669cffd154SDavid Daney	default y
11679cffd154SDavid Daney
1168aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1169aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1170aa1762f4SDavid Daney
11711da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
11721da177e4SLinus Torvalds	bool
11731da177e4SLinus Torvalds
11749267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
11759267a30dSMarc St-Jean	bool
11769267a30dSMarc St-Jean
11779267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
11789267a30dSMarc St-Jean	bool
11799267a30dSMarc St-Jean
11808420fd00SAtsushi Nemotoconfig IRQ_TXX9
11818420fd00SAtsushi Nemoto	bool
11828420fd00SAtsushi Nemoto
1183d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1184d5ab1a69SYoichi Yuasa	bool
1185d5ab1a69SYoichi Yuasa
1186252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
11871da177e4SLinus Torvalds	bool
11881da177e4SLinus Torvalds
11899267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
11909267a30dSMarc St-Jean	bool
11919267a30dSMarc St-Jean
1192a83860c2SRalf Baechleconfig SOC_EMMA2RH
1193a83860c2SRalf Baechle	bool
1194a83860c2SRalf Baechle	select CEVT_R4K
1195a83860c2SRalf Baechle	select CSRC_R4K
1196a83860c2SRalf Baechle	select DMA_NONCOHERENT
119767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1198a83860c2SRalf Baechle	select SWAP_IO_SPACE
1199a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1200a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1201a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1202a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1203a83860c2SRalf Baechle
1204edb6310aSDaniel Lairdconfig SOC_PNX833X
1205edb6310aSDaniel Laird	bool
1206edb6310aSDaniel Laird	select CEVT_R4K
1207edb6310aSDaniel Laird	select CSRC_R4K
120867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1209edb6310aSDaniel Laird	select DMA_NONCOHERENT
1210edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1211edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1212edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1213edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1214377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1215edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1216edb6310aSDaniel Laird
1217edb6310aSDaniel Lairdconfig SOC_PNX8335
1218edb6310aSDaniel Laird	bool
1219edb6310aSDaniel Laird	select SOC_PNX833X
1220edb6310aSDaniel Laird
1221a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1222a7e07b1aSMarkos Chandras	bool
1223a7e07b1aSMarkos Chandras
12241da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
12251da177e4SLinus Torvalds	bool
12261da177e4SLinus Torvalds
1227e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1228e2defae5SThomas Bogendoerfer	bool
1229e2defae5SThomas Bogendoerfer
12305b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
12315b438c44SThomas Bogendoerfer	bool
12325b438c44SThomas Bogendoerfer
1233e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1234e2defae5SThomas Bogendoerfer	bool
1235e2defae5SThomas Bogendoerfer
1236e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1237e2defae5SThomas Bogendoerfer	bool
1238e2defae5SThomas Bogendoerfer
1239e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1240e2defae5SThomas Bogendoerfer	bool
1241e2defae5SThomas Bogendoerfer
1242e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1243e2defae5SThomas Bogendoerfer	bool
1244e2defae5SThomas Bogendoerfer
1245e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1246e2defae5SThomas Bogendoerfer	bool
1247e2defae5SThomas Bogendoerfer
12480e2794b0SRalf Baechleconfig FW_ARC32
12495e83d430SRalf Baechle	bool
12505e83d430SRalf Baechle
1251aaa9fad3SPaul Bolleconfig FW_SNIPROM
1252231a35d3SThomas Bogendoerfer	bool
1253231a35d3SThomas Bogendoerfer
12541da177e4SLinus Torvaldsconfig BOOT_ELF32
12551da177e4SLinus Torvalds	bool
12561da177e4SLinus Torvalds
1257930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1258930beb5aSFlorian Fainelli	bool
1259930beb5aSFlorian Fainelli
1260930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1261930beb5aSFlorian Fainelli	bool
1262930beb5aSFlorian Fainelli
1263930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1264930beb5aSFlorian Fainelli	bool
1265930beb5aSFlorian Fainelli
1266930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1267930beb5aSFlorian Fainelli	bool
1268930beb5aSFlorian Fainelli
12691da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
12701da177e4SLinus Torvalds	int
1271a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
12725432eeb6SKevin Cernekee	default "6" if MIPS_L1_CACHE_SHIFT_6
12735432eeb6SKevin Cernekee	default "5" if MIPS_L1_CACHE_SHIFT_5
12745432eeb6SKevin Cernekee	default "4" if MIPS_L1_CACHE_SHIFT_4
12751da177e4SLinus Torvalds	default "5"
12761da177e4SLinus Torvalds
12771da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
12781da177e4SLinus Torvalds	bool
12791da177e4SLinus Torvalds
12801da177e4SLinus Torvaldsconfig ARC_CONSOLE
12811da177e4SLinus Torvalds	bool "ARC console support"
1282e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
12831da177e4SLinus Torvalds
12841da177e4SLinus Torvaldsconfig ARC_MEMORY
12851da177e4SLinus Torvalds	bool
128614b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
12871da177e4SLinus Torvalds	default y
12881da177e4SLinus Torvalds
12891da177e4SLinus Torvaldsconfig ARC_PROMLIB
12901da177e4SLinus Torvalds	bool
1291e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
12921da177e4SLinus Torvalds	default y
12931da177e4SLinus Torvalds
12940e2794b0SRalf Baechleconfig FW_ARC64
12951da177e4SLinus Torvalds	bool
12961da177e4SLinus Torvalds
12971da177e4SLinus Torvaldsconfig BOOT_ELF64
12981da177e4SLinus Torvalds	bool
12991da177e4SLinus Torvalds
13001da177e4SLinus Torvaldsmenu "CPU selection"
13011da177e4SLinus Torvalds
13021da177e4SLinus Torvaldschoice
13031da177e4SLinus Torvalds	prompt "CPU type"
13041da177e4SLinus Torvalds	default CPU_R4X00
13051da177e4SLinus Torvalds
13060e476d91SHuacai Chenconfig CPU_LOONGSON3
13070e476d91SHuacai Chen	bool "Loongson 3 CPU"
13080e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
13090e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
13100e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
13110e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
13120e476d91SHuacai Chen	select WEAK_ORDERING
13130e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
1314cbfb3ea7SHuacai Chen	select ARCH_REQUIRE_GPIOLIB
13150e476d91SHuacai Chen	help
13160e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
13170e476d91SHuacai Chen		set with many extensions.
13180e476d91SHuacai Chen
13193702bba5SWu Zhangjinconfig CPU_LOONGSON2E
13203702bba5SWu Zhangjin	bool "Loongson 2E"
13213702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
13223702bba5SWu Zhangjin	select CPU_LOONGSON2
13232a21c730SFuxin Zhang	help
13242a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
13252a21c730SFuxin Zhang	  with many extensions.
13262a21c730SFuxin Zhang
132725985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
13286f7a251aSWu Zhangjin	  bonito64.
13296f7a251aSWu Zhangjin
13306f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
13316f7a251aSWu Zhangjin	bool "Loongson 2F"
13326f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
13336f7a251aSWu Zhangjin	select CPU_LOONGSON2
1334c197da91SArnaud Patard	select ARCH_REQUIRE_GPIOLIB
13356f7a251aSWu Zhangjin	help
13366f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
13376f7a251aSWu Zhangjin	  with many extensions.
13386f7a251aSWu Zhangjin
13396f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
13406f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
13416f7a251aSWu Zhangjin	  Loongson2E.
13426f7a251aSWu Zhangjin
1343ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1344ca585cf9SKelvin Cheung	bool "Loongson 1B"
1345ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1346ca585cf9SKelvin Cheung	select CPU_LOONGSON1
1347ca585cf9SKelvin Cheung	help
1348ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1349ca585cf9SKelvin Cheung	  release 2 instruction set.
1350ca585cf9SKelvin Cheung
13516e760c8dSRalf Baechleconfig CPU_MIPS32_R1
13526e760c8dSRalf Baechle	bool "MIPS32 Release 1"
13537cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
13546e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1355797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1356ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13576e760c8dSRalf Baechle	help
13585e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13591e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13601e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13611e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
13621e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13631e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
13641e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
13651e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
13661e5f1caaSRalf Baechle	  performance.
13671e5f1caaSRalf Baechle
13681e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
13691e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
13707cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
13711e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1372797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1373ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1374a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
13752235a54dSSanjay Lal	select HAVE_KVM
13761e5f1caaSRalf Baechle	help
13775e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
13786e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13796e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13806e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
13816e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13821da177e4SLinus Torvalds
13837fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
1384674d10e2SMarkos Chandras	bool "MIPS32 Release 6"
13857fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
13867fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
13877fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
13887fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
13897fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
13904e0748f5SMarkos Chandras	select GENERIC_CSUM
13917fd08ca5SLeonid Yegoshin	select HAVE_KVM
13927fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
13937fd08ca5SLeonid Yegoshin	help
13947fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
13957fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
13967fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
13977fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
13987fd08ca5SLeonid Yegoshin
13996e760c8dSRalf Baechleconfig CPU_MIPS64_R1
14006e760c8dSRalf Baechle	bool "MIPS64 Release 1"
14017cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1402797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1403ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1404ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1405ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14069cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
14076e760c8dSRalf Baechle	help
14086e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
14096e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14106e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14116e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14126e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14131e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
14141e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
14151e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
14161e5f1caaSRalf Baechle	  performance.
14171e5f1caaSRalf Baechle
14181e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
14191e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
14207cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1421797798c1SRalf Baechle	select CPU_HAS_PREFETCH
14221e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
14231e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1424ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14259cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1426a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14271e5f1caaSRalf Baechle	help
14281e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14291e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14301e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14311e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
14321e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14331da177e4SLinus Torvalds
14347fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
1435674d10e2SMarkos Chandras	bool "MIPS64 Release 6"
14367fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
14377fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14387fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14397fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
14407fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14417fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14424e0748f5SMarkos Chandras	select GENERIC_CSUM
14434e9d324dSPaul Burton	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
14447fd08ca5SLeonid Yegoshin	help
14457fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14467fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
14477fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
14487fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
14497fd08ca5SLeonid Yegoshin
14501da177e4SLinus Torvaldsconfig CPU_R3000
14511da177e4SLinus Torvalds	bool "R3000"
14527cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1453f7062ddbSRalf Baechle	select CPU_HAS_WB
1454ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1455797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14561da177e4SLinus Torvalds	help
14571da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
14581da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
14591da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
14601da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
14611da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
14621da177e4SLinus Torvalds	  try to recompile with R3000.
14631da177e4SLinus Torvalds
14641da177e4SLinus Torvaldsconfig CPU_TX39XX
14651da177e4SLinus Torvalds	bool "R39XX"
14667cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1467ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
14681da177e4SLinus Torvalds
14691da177e4SLinus Torvaldsconfig CPU_VR41XX
14701da177e4SLinus Torvalds	bool "R41xx"
14717cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1472ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1473ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
14741da177e4SLinus Torvalds	help
14755e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
14761da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
14771da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
14781da177e4SLinus Torvalds	  processor or vice versa.
14791da177e4SLinus Torvalds
14801da177e4SLinus Torvaldsconfig CPU_R4300
14811da177e4SLinus Torvalds	bool "R4300"
14827cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1483ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1484ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
14851da177e4SLinus Torvalds	help
14861da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
14871da177e4SLinus Torvalds
14881da177e4SLinus Torvaldsconfig CPU_R4X00
14891da177e4SLinus Torvalds	bool "R4x00"
14907cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1491ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1492ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1493970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14941da177e4SLinus Torvalds	help
14951da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
14961da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
14971da177e4SLinus Torvalds
14981da177e4SLinus Torvaldsconfig CPU_TX49XX
14991da177e4SLinus Torvalds	bool "R49XX"
15007cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1501de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1502ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1503ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1504970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15051da177e4SLinus Torvalds
15061da177e4SLinus Torvaldsconfig CPU_R5000
15071da177e4SLinus Torvalds	bool "R5000"
15087cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1509ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1510ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1511970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15121da177e4SLinus Torvalds	help
15131da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
15141da177e4SLinus Torvalds
15151da177e4SLinus Torvaldsconfig CPU_R5432
15161da177e4SLinus Torvalds	bool "R5432"
15177cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
15185e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
15195e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1520970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15211da177e4SLinus Torvalds
1522542c1020SShinya Kuribayashiconfig CPU_R5500
1523542c1020SShinya Kuribayashi	bool "R5500"
1524542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1525542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1526542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
15279cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1528542c1020SShinya Kuribayashi	help
1529542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1530542c1020SShinya Kuribayashi	  instruction set.
1531542c1020SShinya Kuribayashi
15321da177e4SLinus Torvaldsconfig CPU_R6000
15331da177e4SLinus Torvalds	bool "R6000"
15347cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1535ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
15361da177e4SLinus Torvalds	help
15371da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1538c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
15391da177e4SLinus Torvalds
15401da177e4SLinus Torvaldsconfig CPU_NEVADA
15411da177e4SLinus Torvalds	bool "RM52xx"
15427cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1543ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1544ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1545970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15461da177e4SLinus Torvalds	help
15471da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
15481da177e4SLinus Torvalds
15491da177e4SLinus Torvaldsconfig CPU_R8000
15501da177e4SLinus Torvalds	bool "R8000"
15517cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
15525e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1553ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15541da177e4SLinus Torvalds	help
15551da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
15561da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
15571da177e4SLinus Torvalds
15581da177e4SLinus Torvaldsconfig CPU_R10000
15591da177e4SLinus Torvalds	bool "R10000"
15607cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
15615e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1562ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1563ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1564797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1565970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15661da177e4SLinus Torvalds	help
15671da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
15681da177e4SLinus Torvalds
15691da177e4SLinus Torvaldsconfig CPU_RM7000
15701da177e4SLinus Torvalds	bool "RM7000"
15717cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
15725e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1573ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1574ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1575797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1576970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15771da177e4SLinus Torvalds
15781da177e4SLinus Torvaldsconfig CPU_SB1
15791da177e4SLinus Torvalds	bool "SB1"
15807cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1581ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1582ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1583797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1584970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15850004a9dfSRalf Baechle	select WEAK_ORDERING
15861da177e4SLinus Torvalds
1587a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1588a86c7f72SDavid Daney	bool "Cavium Octeon processor"
15895e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1590a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1591a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1592a86c7f72SDavid Daney	select WEAK_ORDERING
1593a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
15949cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1595df115f3eSBen Hutchings	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1596df115f3eSBen Hutchings	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1597930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
1598a86c7f72SDavid Daney	help
1599a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1600a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1601a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1602a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1603a86c7f72SDavid Daney
1604cd746249SJonas Gorskiconfig CPU_BMIPS
1605cd746249SJonas Gorski	bool "Broadcom BMIPS"
1606cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1607cd746249SJonas Gorski	select CPU_MIPS32
1608fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1609cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1610cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1611cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1612cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1613cd746249SJonas Gorski	select DMA_NONCOHERENT
161467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1615cd746249SJonas Gorski	select SWAP_IO_SPACE
1616cd746249SJonas Gorski	select WEAK_ORDERING
1617c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
161869aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1619c1c0c461SKevin Cernekee	help
1620fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1621c1c0c461SKevin Cernekee
16227f058e85SJayachandran Cconfig CPU_XLR
16237f058e85SJayachandran C	bool "Netlogic XLR SoC"
16247f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
16257f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16267f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16277f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1628970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16297f058e85SJayachandran C	select WEAK_ORDERING
16307f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16317f058e85SJayachandran C	help
16327f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
16331c773ea4SJayachandran C
16341c773ea4SJayachandran Cconfig CPU_XLP
16351c773ea4SJayachandran C	bool "Netlogic XLP SoC"
16361c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
16371c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16381c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16391c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
16401c773ea4SJayachandran C	select WEAK_ORDERING
16411c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16421c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1643d6504846SJayachandran C	select CPU_MIPSR2
1644ddba6833SPrem Mallappa	select CPU_SUPPORTS_HUGEPAGES
16451c773ea4SJayachandran C	help
16461c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
16471da177e4SLinus Torvaldsendchoice
16481da177e4SLinus Torvalds
1649a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1650a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1651a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
16527fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1653a6e18781SLeonid Yegoshin	help
1654a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1655a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1656a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1657a6e18781SLeonid Yegoshin
1658a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1659a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1660a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1661a6e18781SLeonid Yegoshin	select EVA
1662a6e18781SLeonid Yegoshin	default y
1663a6e18781SLeonid Yegoshin	help
1664a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1665a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1666a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1667a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1668a6e18781SLeonid Yegoshin
1669c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES
1670c5b36783SSteven J. Hill	bool "MIPS32 Release 5 Features"
1671c5b36783SSteven J. Hill	depends on SYS_HAS_CPU_MIPS32_R5
1672c5b36783SSteven J. Hill	depends on CPU_MIPS32_R2
1673c5b36783SSteven J. Hill	help
1674c5b36783SSteven J. Hill	  Choose this option to build a kernel for release 2 or later of the
1675c5b36783SSteven J. Hill	  MIPS32 architecture including features from release 5 such as
1676c5b36783SSteven J. Hill	  support for Extended Physical Addressing (XPA).
1677c5b36783SSteven J. Hill
1678c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA
1679c5b36783SSteven J. Hill	bool "Extended Physical Addressing (XPA)"
1680c5b36783SSteven J. Hill	depends on CPU_MIPS32_R5_FEATURES
1681c5b36783SSteven J. Hill	depends on !EVA
1682c5b36783SSteven J. Hill	depends on !PAGE_SIZE_4KB
1683c5b36783SSteven J. Hill	depends on SYS_SUPPORTS_HIGHMEM
1684c5b36783SSteven J. Hill	select XPA
1685c5b36783SSteven J. Hill	select HIGHMEM
1686c5b36783SSteven J. Hill	select ARCH_PHYS_ADDR_T_64BIT
1687c5b36783SSteven J. Hill	default n
1688c5b36783SSteven J. Hill	help
1689c5b36783SSteven J. Hill	  Choose this option if you want to enable the Extended Physical
1690c5b36783SSteven J. Hill	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1691c5b36783SSteven J. Hill	  benefit is to increase physical addressing equal to or greater
1692c5b36783SSteven J. Hill	  than 40 bits. Note that this has the side effect of turning on
1693c5b36783SSteven J. Hill	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1694c5b36783SSteven J. Hill	  If unsure, say 'N' here.
1695c5b36783SSteven J. Hill
1696622844bfSWu Zhangjinif CPU_LOONGSON2F
1697622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1698622844bfSWu Zhangjin	bool
1699622844bfSWu Zhangjin
1700622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1701622844bfSWu Zhangjin	bool
1702622844bfSWu Zhangjin
1703622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1704622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1705622844bfSWu Zhangjin	default y
1706622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1707622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1708622844bfSWu Zhangjin	help
1709622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1710622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1711622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1712622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1713622844bfSWu Zhangjin
1714622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1715622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1716622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1717622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1718622844bfSWu Zhangjin	  systems.
1719622844bfSWu Zhangjin
1720622844bfSWu Zhangjin	  If unsure, please say Y.
1721622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1722622844bfSWu Zhangjin
17231b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
17241b93b3c3SWu Zhangjin	bool
17251b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
17261b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
172731c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
17281b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1729fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
17304e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
17311b93b3c3SWu Zhangjin
17321b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
17331b93b3c3SWu Zhangjin	bool
17341b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
17351b93b3c3SWu Zhangjin
17363702bba5SWu Zhangjinconfig CPU_LOONGSON2
17373702bba5SWu Zhangjin	bool
17383702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
17393702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
17403702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1741970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17423702bba5SWu Zhangjin
1743ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1744ca585cf9SKelvin Cheung	bool
1745ca585cf9SKelvin Cheung	select CPU_MIPS32
1746ca585cf9SKelvin Cheung	select CPU_MIPSR2
1747ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1748ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1749ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1750f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1751ca585cf9SKelvin Cheung
1752fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
175304fa8bf7SJonas Gorski	select SMP_UP if SMP
17541bbb6c1bSKevin Cernekee	bool
1755cd746249SJonas Gorski
1756cd746249SJonas Gorskiconfig CPU_BMIPS4350
1757cd746249SJonas Gorski	bool
1758cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1759cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1760cd746249SJonas Gorski
1761cd746249SJonas Gorskiconfig CPU_BMIPS4380
1762cd746249SJonas Gorski	bool
1763bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1764cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1765cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1766cd746249SJonas Gorski
1767cd746249SJonas Gorskiconfig CPU_BMIPS5000
1768cd746249SJonas Gorski	bool
1769cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1770bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1771cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1772cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
17731bbb6c1bSKevin Cernekee
17740e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
17750e476d91SHuacai Chen	bool
17760e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
17770e476d91SHuacai Chen
17783702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
17792a21c730SFuxin Zhang	bool
17802a21c730SFuxin Zhang
17816f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
17826f7a251aSWu Zhangjin	bool
178355045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
178455045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
178522f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
17866f7a251aSWu Zhangjin
1787ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1788ca585cf9SKelvin Cheung	bool
1789ca585cf9SKelvin Cheung
17907cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
17917cf8053bSRalf Baechle	bool
17927cf8053bSRalf Baechle
17937cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
17947cf8053bSRalf Baechle	bool
17957cf8053bSRalf Baechle
1796a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1797a6e18781SLeonid Yegoshin	bool
1798a6e18781SLeonid Yegoshin
1799c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5
1800c5b36783SSteven J. Hill	bool
1801c5b36783SSteven J. Hill
18027fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
18037fd08ca5SLeonid Yegoshin	bool
18047fd08ca5SLeonid Yegoshin
18057cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
18067cf8053bSRalf Baechle	bool
18077cf8053bSRalf Baechle
18087cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
18097cf8053bSRalf Baechle	bool
18107cf8053bSRalf Baechle
18117fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
18127fd08ca5SLeonid Yegoshin	bool
18137fd08ca5SLeonid Yegoshin
18147cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
18157cf8053bSRalf Baechle	bool
18167cf8053bSRalf Baechle
18177cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
18187cf8053bSRalf Baechle	bool
18197cf8053bSRalf Baechle
18207cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
18217cf8053bSRalf Baechle	bool
18227cf8053bSRalf Baechle
18237cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
18247cf8053bSRalf Baechle	bool
18257cf8053bSRalf Baechle
18267cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
18277cf8053bSRalf Baechle	bool
18287cf8053bSRalf Baechle
18297cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
18307cf8053bSRalf Baechle	bool
18317cf8053bSRalf Baechle
18327cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
18337cf8053bSRalf Baechle	bool
18347cf8053bSRalf Baechle
18357cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
18367cf8053bSRalf Baechle	bool
18377cf8053bSRalf Baechle
1838542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1839542c1020SShinya Kuribayashi	bool
1840542c1020SShinya Kuribayashi
18417cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
18427cf8053bSRalf Baechle	bool
18437cf8053bSRalf Baechle
18447cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
18457cf8053bSRalf Baechle	bool
18467cf8053bSRalf Baechle
18477cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
18487cf8053bSRalf Baechle	bool
18497cf8053bSRalf Baechle
18507cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
18517cf8053bSRalf Baechle	bool
18527cf8053bSRalf Baechle
18537cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
18547cf8053bSRalf Baechle	bool
18557cf8053bSRalf Baechle
18567cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
18577cf8053bSRalf Baechle	bool
18587cf8053bSRalf Baechle
18595e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
18605e683389SDavid Daney	bool
18615e683389SDavid Daney
1862cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1863c1c0c461SKevin Cernekee	bool
1864c1c0c461SKevin Cernekee
1865fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1866c1c0c461SKevin Cernekee	bool
1867cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1868c1c0c461SKevin Cernekee
1869c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1870c1c0c461SKevin Cernekee	bool
1871cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1872c1c0c461SKevin Cernekee
1873c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1874c1c0c461SKevin Cernekee	bool
1875cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1876c1c0c461SKevin Cernekee
1877c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1878c1c0c461SKevin Cernekee	bool
1879cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1880c1c0c461SKevin Cernekee
18817f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
18827f058e85SJayachandran C	bool
18837f058e85SJayachandran C
18841c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
18851c773ea4SJayachandran C	bool
18861c773ea4SJayachandran C
1887b6911bbaSPaul Burtonconfig MIPS_MALTA_PM
1888b6911bbaSPaul Burton	depends on MIPS_MALTA
1889b6911bbaSPaul Burton	depends on PCI
1890b6911bbaSPaul Burton	bool
1891b6911bbaSPaul Burton	default y
1892b6911bbaSPaul Burton
189317099b11SRalf Baechle#
189417099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
189517099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
189617099b11SRalf Baechle#
18970004a9dfSRalf Baechleconfig WEAK_ORDERING
18980004a9dfSRalf Baechle	bool
189917099b11SRalf Baechle
190017099b11SRalf Baechle#
190117099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
190217099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
190317099b11SRalf Baechle#
190417099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
190517099b11SRalf Baechle	bool
19065e83d430SRalf Baechleendmenu
19075e83d430SRalf Baechle
19085e83d430SRalf Baechle#
19095e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
19105e83d430SRalf Baechle#
19115e83d430SRalf Baechleconfig CPU_MIPS32
19125e83d430SRalf Baechle	bool
19137fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
19145e83d430SRalf Baechle
19155e83d430SRalf Baechleconfig CPU_MIPS64
19165e83d430SRalf Baechle	bool
19177fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
19185e83d430SRalf Baechle
19195e83d430SRalf Baechle#
1920c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
19215e83d430SRalf Baechle#
19225e83d430SRalf Baechleconfig CPU_MIPSR1
19235e83d430SRalf Baechle	bool
19245e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
19255e83d430SRalf Baechle
19265e83d430SRalf Baechleconfig CPU_MIPSR2
19275e83d430SRalf Baechle	bool
1928a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1929a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19305e83d430SRalf Baechle
19317fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
19327fd08ca5SLeonid Yegoshin	bool
19337fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1934a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19355e83d430SRalf Baechle
1936a6e18781SLeonid Yegoshinconfig EVA
1937a6e18781SLeonid Yegoshin	bool
1938a6e18781SLeonid Yegoshin
1939c5b36783SSteven J. Hillconfig XPA
1940c5b36783SSteven J. Hill	bool
1941c5b36783SSteven J. Hill
19425e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
19435e83d430SRalf Baechle	bool
19445e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
19455e83d430SRalf Baechle	bool
19465e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
19475e83d430SRalf Baechle	bool
19485e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
19495e83d430SRalf Baechle	bool
195055045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
195155045ff5SWu Zhangjin	bool
195255045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
195355045ff5SWu Zhangjin	bool
19549cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
19559cffd154SDavid Daney	bool
195622f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
195722f1fdfdSWu Zhangjin	bool
195882622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
195982622284SDavid Daney	bool
1960d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
19615e83d430SRalf Baechle
19628192c9eaSDavid Daney#
19638192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
19648192c9eaSDavid Daney#
19658192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
19668192c9eaSDavid Daney       bool
1967f839490aSDavid Daney       default y if CPU_MIPSR1 || CPU_MIPSR2
19688192c9eaSDavid Daney
19695e83d430SRalf Baechlemenu "Kernel type"
19705e83d430SRalf Baechle
19715e83d430SRalf Baechlechoice
19725e83d430SRalf Baechle	prompt "Kernel code model"
19735e83d430SRalf Baechle	help
19745e83d430SRalf Baechle	  You should only select this option if you have a workload that
19755e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
19765e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
19775e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
19785e83d430SRalf Baechle
19795e83d430SRalf Baechleconfig 32BIT
19805e83d430SRalf Baechle	bool "32-bit kernel"
19815e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
19825e83d430SRalf Baechle	select TRAD_SIGNALS
19835e83d430SRalf Baechle	help
19845e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
1985f17c4ca3SRalf Baechle
19865e83d430SRalf Baechleconfig 64BIT
19875e83d430SRalf Baechle	bool "64-bit kernel"
19885e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
19895e83d430SRalf Baechle	help
19905e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
19915e83d430SRalf Baechle
19925e83d430SRalf Baechleendchoice
19935e83d430SRalf Baechle
19942235a54dSSanjay Lalconfig KVM_GUEST
19952235a54dSSanjay Lal	bool "KVM Guest Kernel"
1996f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
19972235a54dSSanjay Lal	help
19982235a54dSSanjay Lal	  Select this option if building a guest kernel for KVM (Trap & Emulate) mode
19992235a54dSSanjay Lal
2000eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
2001eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
20022235a54dSSanjay Lal	depends on KVM_GUEST
2003eda3d33cSJames Hogan	default 100
20042235a54dSSanjay Lal	help
2005eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
2006eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
2007eda3d33cSJames Hogan	  timer frequency is specified directly.
20082235a54dSSanjay Lal
20091da177e4SLinus Torvaldschoice
20101da177e4SLinus Torvalds	prompt "Kernel page size"
20111da177e4SLinus Torvalds	default PAGE_SIZE_4KB
20121da177e4SLinus Torvalds
20131da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
20141da177e4SLinus Torvalds	bool "4kB"
20150e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
20161da177e4SLinus Torvalds	help
20171da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
20181da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
20191da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
20201da177e4SLinus Torvalds	 recommended for low memory systems.
20211da177e4SLinus Torvalds
20221da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
20231da177e4SLinus Torvalds	bool "8kB"
20247d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
20251da177e4SLinus Torvalds	help
20261da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
20271da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
2028c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
2029c52399beSRalf Baechle	  suitable Linux distribution to support this.
20301da177e4SLinus Torvalds
20311da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
20321da177e4SLinus Torvalds	bool "16kB"
2033714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
20341da177e4SLinus Torvalds	help
20351da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
20361da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
2037714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
2038714bfad6SRalf Baechle	  Linux distribution to support this.
20391da177e4SLinus Torvalds
2040c52399beSRalf Baechleconfig PAGE_SIZE_32KB
2041c52399beSRalf Baechle	bool "32kB"
2042c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
2043c52399beSRalf Baechle	help
2044c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
2045c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
2046c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
2047c52399beSRalf Baechle	  distribution to support this.
2048c52399beSRalf Baechle
20491da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
20501da177e4SLinus Torvalds	bool "64kB"
20517d60717eSKees Cook	depends on !CPU_R3000 && !CPU_TX39XX
20521da177e4SLinus Torvalds	help
20531da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
20541da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
20551da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
2056714bfad6SRalf Baechle	  writing this option is still high experimental.
20571da177e4SLinus Torvalds
20581da177e4SLinus Torvaldsendchoice
20591da177e4SLinus Torvalds
2060c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
2061c9bace7cSDavid Daney	int "Maximum zone order"
2062e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2063e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2064e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2065e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2066e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2067e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2068c9bace7cSDavid Daney	range 11 64
2069c9bace7cSDavid Daney	default "11"
2070c9bace7cSDavid Daney	help
2071c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
2072c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
2073c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
2074c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2075c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2076c9bace7cSDavid Daney	  increase this value.
2077c9bace7cSDavid Daney
2078c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2079c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2080c9bace7cSDavid Daney
2081c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2082c9bace7cSDavid Daney	  when choosing a value for this option.
2083c9bace7cSDavid Daney
20841da177e4SLinus Torvaldsconfig BOARD_SCACHE
20851da177e4SLinus Torvalds	bool
20861da177e4SLinus Torvalds
20871da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
20881da177e4SLinus Torvalds	bool
20891da177e4SLinus Torvalds	select BOARD_SCACHE
20901da177e4SLinus Torvalds
20919318c51aSChris Dearman#
20929318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
20939318c51aSChris Dearman#
20949318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
20959318c51aSChris Dearman	bool
20969318c51aSChris Dearman	select BOARD_SCACHE
20979318c51aSChris Dearman
20981da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
20991da177e4SLinus Torvalds	bool
21001da177e4SLinus Torvalds	select BOARD_SCACHE
21011da177e4SLinus Torvalds
21021da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
21031da177e4SLinus Torvalds	bool
21041da177e4SLinus Torvalds	select BOARD_SCACHE
21051da177e4SLinus Torvalds
21061da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
21071da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
21081da177e4SLinus Torvalds	depends on CPU_SB1
21091da177e4SLinus Torvalds	help
21101da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
21111da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
21121da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
21131da177e4SLinus Torvalds
21141da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2115c8094b53SRalf Baechle	bool
21161da177e4SLinus Torvalds
21173165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
21183165c846SFlorian Fainelli	bool
21193165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
21203165c846SFlorian Fainelli
212191405eb6SFlorian Fainelliconfig CPU_R4K_FPU
212291405eb6SFlorian Fainelli	bool
212391405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
212491405eb6SFlorian Fainelli
212562cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
212662cedc4fSFlorian Fainelli	bool
212762cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
212862cedc4fSFlorian Fainelli
212959d6ab86SRalf Baechleconfig MIPS_MT_SMP
2130a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
21315676319cSMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
213259d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2133d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2134c080faa5SSteven J. Hill	select SYNC_R4K
21350c2cb004SPaul Burton	select MIPS_GIC_IPI
213659d6ab86SRalf Baechle	select MIPS_MT
213759d6ab86SRalf Baechle	select SMP
213887353d8aSRalf Baechle	select SMP_UP
2139c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2140c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2141399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
214259d6ab86SRalf Baechle	help
2143c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2144c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2145c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2146c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2147c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
214859d6ab86SRalf Baechle
2149f41ae0b2SRalf Baechleconfig MIPS_MT
2150f41ae0b2SRalf Baechle	bool
2151f41ae0b2SRalf Baechle
21520ab7aefcSRalf Baechleconfig SCHED_SMT
21530ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
21540ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
21550ab7aefcSRalf Baechle	default n
21560ab7aefcSRalf Baechle	help
21570ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
21580ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
21590ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
21600ab7aefcSRalf Baechle
21610ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
21620ab7aefcSRalf Baechle	bool
21630ab7aefcSRalf Baechle
2164f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2165f41ae0b2SRalf Baechle	bool
2166f41ae0b2SRalf Baechle
2167f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2168f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2169f088fc84SRalf Baechle	default y
2170b633648cSRalf Baechle	depends on MIPS_MT_SMP
217107cc0c9eSRalf Baechle
2172b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2173b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
2174b0a668fbSLeonid Yegoshin	depends on CPU_MIPSR6 && !SMP
2175b0a668fbSLeonid Yegoshin	default y
2176b0a668fbSLeonid Yegoshin	help
2177b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2178b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
217907edf0d4SMarkos Chandras	  default. You can enable it using the 'mipsr2emu' kernel option.
2180b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2181b0a668fbSLeonid Yegoshin	  final kernel image.
2182b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels"
2183b0a668fbSLeonid Yegoshin	depends on SMP && CPU_MIPSR6
2184b0a668fbSLeonid Yegoshin
218507cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
218607cc0c9eSRalf Baechle	bool "VPE loader support."
2187704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
218807cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
218907cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
219007cc0c9eSRalf Baechle	select MIPS_MT
219107cc0c9eSRalf Baechle	help
219207cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
219307cc0c9eSRalf Baechle	  onto another VPE and running it.
2194f088fc84SRalf Baechle
219517a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
219617a1d523SDeng-Cheng Zhu	bool
219717a1d523SDeng-Cheng Zhu	default "y"
219817a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
219917a1d523SDeng-Cheng Zhu
22001a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
22011a2a6d7eSDeng-Cheng Zhu	bool
22021a2a6d7eSDeng-Cheng Zhu	default "y"
22031a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
22041a2a6d7eSDeng-Cheng Zhu
2205e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2206e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2207e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2208e01402b1SRalf Baechle	default y
2209e01402b1SRalf Baechle	help
2210e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2211e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2212e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2213e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2214e01402b1SRalf Baechle
2215e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2216e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2217e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
22185e83d430SRalf Baechle	help
2219e01402b1SRalf Baechle
2220da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2221da615cf6SDeng-Cheng Zhu	bool
2222da615cf6SDeng-Cheng Zhu	default "y"
2223da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2224da615cf6SDeng-Cheng Zhu
22252c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
22262c973ef0SDeng-Cheng Zhu	bool
22272c973ef0SDeng-Cheng Zhu	default "y"
22282c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
22292c973ef0SDeng-Cheng Zhu
22304a16ff4cSRalf Baechleconfig MIPS_CMP
22315cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
22325676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
223372e20142SPaul Burton	select MIPS_GIC_IPI
2234b10b43baSMarkos Chandras	select SMP
2235eb9b5141STim Anderson	select SYNC_R4K
2236b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
22374a16ff4cSRalf Baechle	select WEAK_ORDERING
22384a16ff4cSRalf Baechle	default n
22394a16ff4cSRalf Baechle	help
2240044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2241044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2242044505c7SPaul Burton	  its ability to start secondary CPUs.
22434a16ff4cSRalf Baechle
22445cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
22455cac93b3SPaul Burton	  instead of this.
22465cac93b3SPaul Burton
22470ee958e1SPaul Burtonconfig MIPS_CPS
22480ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
22495676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CPS && !CPU_MIPSR6
22500ee958e1SPaul Burton	select MIPS_CM
22510ee958e1SPaul Burton	select MIPS_CPC
22521d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
22530ee958e1SPaul Burton	select MIPS_GIC_IPI
22540ee958e1SPaul Burton	select SMP
22550ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
22561d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
22570ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
22580ee958e1SPaul Burton	select WEAK_ORDERING
22590ee958e1SPaul Burton	help
22600ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
22610ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
22620ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
22630ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
22640ee958e1SPaul Burton	  support is unavailable.
22650ee958e1SPaul Burton
22663179d37eSPaul Burtonconfig MIPS_CPS_PM
226739a59593SMarkos Chandras	depends on MIPS_CPS
2268a8b84677SPaul Burton	select MIPS_CPC
22693179d37eSPaul Burton	bool
22703179d37eSPaul Burton
227172e20142SPaul Burtonconfig MIPS_GIC_IPI
227272e20142SPaul Burton	bool
227372e20142SPaul Burton
22749f98f3ddSPaul Burtonconfig MIPS_CM
22759f98f3ddSPaul Burton	bool
22769f98f3ddSPaul Burton
22779c38cf44SPaul Burtonconfig MIPS_CPC
22789c38cf44SPaul Burton	bool
22792600990eSRalf Baechle
22801da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
22811da177e4SLinus Torvalds	bool
22821da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
22831da177e4SLinus Torvalds	default y
22841da177e4SLinus Torvalds
22851da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
22861da177e4SLinus Torvalds	bool
22871da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
22881da177e4SLinus Torvalds	default y
22891da177e4SLinus Torvalds
22902235a54dSSanjay Lal
229160ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
229234adb28dSRalf Baechle       bool
229360ec6571Spascal@pabr.org
22949e2b5372SMarkos Chandraschoice
22959e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
22969e2b5372SMarkos Chandras
22979e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
22989e2b5372SMarkos Chandras	bool "None"
22999e2b5372SMarkos Chandras	help
23009e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
23019e2b5372SMarkos Chandras
23029693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
23039693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
23049e2b5372SMarkos Chandras	bool "SmartMIPS"
23059693a853SFranck Bui-Huu	help
23069693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
23079693a853SFranck Bui-Huu	  increased security at both hardware and software level for
23089693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
23099693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
23109693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
23119693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
23129693a853SFranck Bui-Huu	  here.
23139693a853SFranck Bui-Huu
2314bce86083SSteven J. Hillconfig CPU_MICROMIPS
23157fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
23169e2b5372SMarkos Chandras	bool "microMIPS"
2317bce86083SSteven J. Hill	help
2318bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2319bce86083SSteven J. Hill	  microMIPS ISA
2320bce86083SSteven J. Hill
23219e2b5372SMarkos Chandrasendchoice
23229e2b5372SMarkos Chandras
2323a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
23240ce3417eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2325a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
23262a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2327a5e9a69eSPaul Burton	help
2328a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2329a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
23301db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
23311db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
23321db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
23331db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
23341db1af84SPaul Burton	  the size & complexity of your kernel.
2335a5e9a69eSPaul Burton
2336a5e9a69eSPaul Burton	  If unsure, say Y.
2337a5e9a69eSPaul Burton
23381da177e4SLinus Torvaldsconfig CPU_HAS_WB
2339f7062ddbSRalf Baechle	bool
2340e01402b1SRalf Baechle
2341df0ac8a4SKevin Cernekeeconfig XKS01
2342df0ac8a4SKevin Cernekee	bool
2343df0ac8a4SKevin Cernekee
2344f41ae0b2SRalf Baechle#
2345f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2346f41ae0b2SRalf Baechle#
2347e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2348f41ae0b2SRalf Baechle	bool
2349e01402b1SRalf Baechle
2350f41ae0b2SRalf Baechle#
2351f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2352f41ae0b2SRalf Baechle#
2353e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2354f41ae0b2SRalf Baechle	bool
2355e01402b1SRalf Baechle
23561da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
23571da177e4SLinus Torvalds	bool
23581da177e4SLinus Torvalds	depends on !CPU_R3000
23591da177e4SLinus Torvalds	default y
23601da177e4SLinus Torvalds
23611da177e4SLinus Torvalds#
236220d60d99SMaciej W. Rozycki# CPU non-features
236320d60d99SMaciej W. Rozycki#
236420d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
236520d60d99SMaciej W. Rozycki	bool
236620d60d99SMaciej W. Rozycki
236720d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
236820d60d99SMaciej W. Rozycki	bool
236920d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
237020d60d99SMaciej W. Rozycki
237120d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
237220d60d99SMaciej W. Rozycki	bool
237320d60d99SMaciej W. Rozycki
237420d60d99SMaciej W. Rozycki#
23751da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
23761da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
23771da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
23781da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
23791da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
23801da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
23811da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
23821da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2383797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2384797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2385797798c1SRalf Baechle#   support.
23861da177e4SLinus Torvalds#
23871da177e4SLinus Torvaldsconfig HIGHMEM
23881da177e4SLinus Torvalds	bool "High Memory Support"
2389a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2390797798c1SRalf Baechle
2391797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2392797798c1SRalf Baechle	bool
2393797798c1SRalf Baechle
2394797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2395797798c1SRalf Baechle	bool
23961da177e4SLinus Torvalds
23979693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
23989693a853SFranck Bui-Huu	bool
23999693a853SFranck Bui-Huu
2400a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2401a6a4834cSSteven J. Hill	bool
2402a6a4834cSSteven J. Hill
2403377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2404377cb1b6SRalf Baechle	bool
2405377cb1b6SRalf Baechle	help
2406377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2407377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2408377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2409377cb1b6SRalf Baechle
2410a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2411a5e9a69eSPaul Burton	bool
2412a5e9a69eSPaul Burton
2413b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2414b4819b59SYoichi Yuasa	def_bool y
2415f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2416b4819b59SYoichi Yuasa
2417d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2418d8cb4e11SRalf Baechle	bool
2419d8cb4e11SRalf Baechle	default y if SGI_IP27
2420d8cb4e11SRalf Baechle	help
24213dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2422d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2423d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2424d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2425d8cb4e11SRalf Baechle
2426b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2427b1c6cd42SAtsushi Nemoto	bool
24287de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
242931473747SAtsushi Nemoto
2430d8cb4e11SRalf Baechleconfig NUMA
2431d8cb4e11SRalf Baechle	bool "NUMA Support"
2432d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2433d8cb4e11SRalf Baechle	help
2434d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2435d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2436d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2437d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2438d8cb4e11SRalf Baechle	  disabled.
2439d8cb4e11SRalf Baechle
2440d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2441d8cb4e11SRalf Baechle	bool
2442d8cb4e11SRalf Baechle
2443c80d79d7SYasunori Gotoconfig NODES_SHIFT
2444c80d79d7SYasunori Goto	int
2445c80d79d7SYasunori Goto	default "6"
2446c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2447c80d79d7SYasunori Goto
244814f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
244914f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
2450f14ceff7SHuacai Chen	depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
245114f70012SDeng-Cheng Zhu	default y
245214f70012SDeng-Cheng Zhu	help
245314f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
245414f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
245514f70012SDeng-Cheng Zhu
2456b4819b59SYoichi Yuasasource "mm/Kconfig"
2457b4819b59SYoichi Yuasa
24581da177e4SLinus Torvaldsconfig SMP
24591da177e4SLinus Torvalds	bool "Multi-Processing support"
2460e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2461e73ea273SRalf Baechle	help
24621da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
24634a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
24644a474157SRobert Graffham	  than one CPU, say Y.
24651da177e4SLinus Torvalds
24664a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
24671da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
24681da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
24694a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
24701da177e4SLinus Torvalds	  will run faster if you say N here.
24711da177e4SLinus Torvalds
24721da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
24731da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
24741da177e4SLinus Torvalds
247503502faaSAdrian Bunk	  See also the SMP-HOWTO available at
247603502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
24771da177e4SLinus Torvalds
24781da177e4SLinus Torvalds	  If you don't know what to do here, say N.
24791da177e4SLinus Torvalds
248087353d8aSRalf Baechleconfig SMP_UP
248187353d8aSRalf Baechle	bool
248287353d8aSRalf Baechle
24834a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
24844a16ff4cSRalf Baechle	bool
24854a16ff4cSRalf Baechle
24860ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
24870ee958e1SPaul Burton	bool
24880ee958e1SPaul Burton
2489e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2490e73ea273SRalf Baechle	bool
2491e73ea273SRalf Baechle
2492130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2493130e2fb7SRalf Baechle	bool
2494130e2fb7SRalf Baechle
2495130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2496130e2fb7SRalf Baechle	bool
2497130e2fb7SRalf Baechle
2498130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2499130e2fb7SRalf Baechle	bool
2500130e2fb7SRalf Baechle
2501130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2502130e2fb7SRalf Baechle	bool
2503130e2fb7SRalf Baechle
2504130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2505130e2fb7SRalf Baechle	bool
2506130e2fb7SRalf Baechle
25071da177e4SLinus Torvaldsconfig NR_CPUS
2508a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2509a91796a9SJayachandran C	range 2 256
25101da177e4SLinus Torvalds	depends on SMP
2511130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2512130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2513130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2514130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2515130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
25161da177e4SLinus Torvalds	help
25171da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
25181da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
25191da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
252072ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
252172ede9b1SAtsushi Nemoto	  and 2 for all others.
25221da177e4SLinus Torvalds
25231da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
252472ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
252572ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
252672ede9b1SAtsushi Nemoto	  power of two.
25271da177e4SLinus Torvalds
2528399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2529399aaa25SAl Cooper	bool
2530399aaa25SAl Cooper
25311723b4a3SAtsushi Nemoto#
25321723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
25331723b4a3SAtsushi Nemoto#
25341723b4a3SAtsushi Nemoto
25351723b4a3SAtsushi Nemotochoice
25361723b4a3SAtsushi Nemoto	prompt "Timer frequency"
25371723b4a3SAtsushi Nemoto	default HZ_250
25381723b4a3SAtsushi Nemoto	help
25391723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
25401723b4a3SAtsushi Nemoto
254167596573SPaul Burton	config HZ_24
254267596573SPaul Burton		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
254367596573SPaul Burton
25441723b4a3SAtsushi Nemoto	config HZ_48
25450f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
25461723b4a3SAtsushi Nemoto
25471723b4a3SAtsushi Nemoto	config HZ_100
25481723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
25491723b4a3SAtsushi Nemoto
25501723b4a3SAtsushi Nemoto	config HZ_128
25511723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
25521723b4a3SAtsushi Nemoto
25531723b4a3SAtsushi Nemoto	config HZ_250
25541723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
25551723b4a3SAtsushi Nemoto
25561723b4a3SAtsushi Nemoto	config HZ_256
25571723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
25581723b4a3SAtsushi Nemoto
25591723b4a3SAtsushi Nemoto	config HZ_1000
25601723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
25611723b4a3SAtsushi Nemoto
25621723b4a3SAtsushi Nemoto	config HZ_1024
25631723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
25641723b4a3SAtsushi Nemoto
25651723b4a3SAtsushi Nemotoendchoice
25661723b4a3SAtsushi Nemoto
256767596573SPaul Burtonconfig SYS_SUPPORTS_24HZ
256867596573SPaul Burton	bool
256967596573SPaul Burton
25701723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
25711723b4a3SAtsushi Nemoto	bool
25721723b4a3SAtsushi Nemoto
25731723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
25741723b4a3SAtsushi Nemoto	bool
25751723b4a3SAtsushi Nemoto
25761723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
25771723b4a3SAtsushi Nemoto	bool
25781723b4a3SAtsushi Nemoto
25791723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
25801723b4a3SAtsushi Nemoto	bool
25811723b4a3SAtsushi Nemoto
25821723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
25831723b4a3SAtsushi Nemoto	bool
25841723b4a3SAtsushi Nemoto
25851723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
25861723b4a3SAtsushi Nemoto	bool
25871723b4a3SAtsushi Nemoto
25881723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
25891723b4a3SAtsushi Nemoto	bool
25901723b4a3SAtsushi Nemoto
25911723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
25921723b4a3SAtsushi Nemoto	bool
259367596573SPaul Burton	default y if !SYS_SUPPORTS_24HZ && \
259467596573SPaul Burton		     !SYS_SUPPORTS_48HZ && \
259567596573SPaul Burton		     !SYS_SUPPORTS_100HZ && \
259667596573SPaul Burton		     !SYS_SUPPORTS_128HZ && \
259767596573SPaul Burton		     !SYS_SUPPORTS_250HZ && \
259867596573SPaul Burton		     !SYS_SUPPORTS_256HZ && \
259967596573SPaul Burton		     !SYS_SUPPORTS_1000HZ && \
26001723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
26011723b4a3SAtsushi Nemoto
26021723b4a3SAtsushi Nemotoconfig HZ
26031723b4a3SAtsushi Nemoto	int
260467596573SPaul Burton	default 24 if HZ_24
26051723b4a3SAtsushi Nemoto	default 48 if HZ_48
26061723b4a3SAtsushi Nemoto	default 100 if HZ_100
26071723b4a3SAtsushi Nemoto	default 128 if HZ_128
26081723b4a3SAtsushi Nemoto	default 250 if HZ_250
26091723b4a3SAtsushi Nemoto	default 256 if HZ_256
26101723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
26111723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
26121723b4a3SAtsushi Nemoto
261396685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
261496685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
261596685b17SDeng-Cheng Zhu
2616e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
26171da177e4SLinus Torvalds
2618ea6e942bSAtsushi Nemotoconfig KEXEC
26197d60717eSKees Cook	bool "Kexec system call"
26202965faa5SDave Young	select KEXEC_CORE
2621ea6e942bSAtsushi Nemoto	help
2622ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2623ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
26243dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2625ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2626ea6e942bSAtsushi Nemoto
262701dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2628ea6e942bSAtsushi Nemoto
2629ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2630ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2631bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2632bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2633bf220695SGeert Uytterhoeven	  made.
2634ea6e942bSAtsushi Nemoto
26357aa1c8f4SRalf Baechleconfig CRASH_DUMP
26367aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
26377aa1c8f4SRalf Baechle	  help
26387aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
26397aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
26407aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
26417aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
26427aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
26437aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
26447aa1c8f4SRalf Baechle	  PHYSICAL_START.
26457aa1c8f4SRalf Baechle
26467aa1c8f4SRalf Baechleconfig PHYSICAL_START
26477aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
26487aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
26497aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
26507aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
26517aa1c8f4SRalf Baechle	  help
26527aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
26537aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
26547aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
26557aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
26567aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
26577aa1c8f4SRalf Baechle
2658ea6e942bSAtsushi Nemotoconfig SECCOMP
2659ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2660293c5bd1SRalf Baechle	depends on PROC_FS
2661ea6e942bSAtsushi Nemoto	default y
2662ea6e942bSAtsushi Nemoto	help
2663ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2664ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2665ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2666ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2667ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2668ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2669ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2670ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2671ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2672ea6e942bSAtsushi Nemoto
2673ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2674ea6e942bSAtsushi Nemoto
2675597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
26760ce3417eSPaul Burton	bool "Support for O32 binaries using 64-bit FP"
2677597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2678597ce172SPaul Burton	help
2679597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2680597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2681597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2682597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2683597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2684597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2685597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2686597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2687597ce172SPaul Burton	  saying N here.
2688597ce172SPaul Burton
268906e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
269006e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
269106e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
269206e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
269306e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
269406e2e882SPaul Burton	  said details.
269506e2e882SPaul Burton
269606e2e882SPaul Burton	  If unsure, say N.
2697597ce172SPaul Burton
2698f2ffa5abSDezhong Diaoconfig USE_OF
26990b3e06fdSJonas Gorski	bool
2700f2ffa5abSDezhong Diao	select OF
2701e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2702abd2363fSGrant Likely	select IRQ_DOMAIN
2703f2ffa5abSDezhong Diao
27047fafb068SAndrew Brestickerconfig BUILTIN_DTB
27057fafb068SAndrew Bresticker	bool
27067fafb068SAndrew Bresticker
27071da8f179SJonas Gorskichoice
27085b24d52cSJonas Gorski	prompt "Kernel appended dtb support" if USE_OF
27091da8f179SJonas Gorski	default MIPS_NO_APPENDED_DTB
27101da8f179SJonas Gorski
27111da8f179SJonas Gorski	config MIPS_NO_APPENDED_DTB
27121da8f179SJonas Gorski		bool "None"
27131da8f179SJonas Gorski		help
27141da8f179SJonas Gorski		  Do not enable appended dtb support.
27151da8f179SJonas Gorski
27161da8f179SJonas Gorski	config MIPS_RAW_APPENDED_DTB
27171da8f179SJonas Gorski		bool "vmlinux.bin"
27181da8f179SJonas Gorski		help
27191da8f179SJonas Gorski		  With this option, the boot code will look for a device tree binary
27201da8f179SJonas Gorski		  DTB) appended to raw vmlinux.bin (without decompressor).
27211da8f179SJonas Gorski		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
27221da8f179SJonas Gorski
27231da8f179SJonas Gorski		  This is meant as a backward compatibility convenience for those
27241da8f179SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
27251da8f179SJonas Gorski		  the documented boot protocol using a device tree.
27261da8f179SJonas Gorski
27271da8f179SJonas Gorski		  Beware that there is very little in terms of protection against
27281da8f179SJonas Gorski		  this option being confused by leftover garbage in memory that might
27291da8f179SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
27301da8f179SJonas Gorski		  to vmlinux.bin.  Do not leave this option active in a production kernel
27311da8f179SJonas Gorski		  if you don't intend to always append a DTB.
2732c0b4e101SJonas Gorski
2733c0b4e101SJonas Gorski	config MIPS_ZBOOT_APPENDED_DTB
2734c0b4e101SJonas Gorski		bool "vmlinuz.bin"
2735c0b4e101SJonas Gorski		depends on SYS_SUPPORTS_ZBOOT
2736c0b4e101SJonas Gorski		help
2737c0b4e101SJonas Gorski		  With this option, the boot code will look for a device tree binary
2738c0b4e101SJonas Gorski		  DTB) appended to raw vmlinuz.bin (with decompressor).
2739c0b4e101SJonas Gorski		  (e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb).
2740c0b4e101SJonas Gorski
2741c0b4e101SJonas Gorski		  This is meant as a backward compatibility convenience for those
2742c0b4e101SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
2743c0b4e101SJonas Gorski		  the documented boot protocol using a device tree.
2744c0b4e101SJonas Gorski
2745c0b4e101SJonas Gorski		  Beware that there is very little in terms of protection against
2746c0b4e101SJonas Gorski		  this option being confused by leftover garbage in memory that might
2747c0b4e101SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
2748c0b4e101SJonas Gorski		  to vmlinuz.bin.  Do not leave this option active in a production kernel
2749c0b4e101SJonas Gorski		  if you don't intend to always append a DTB.
27501da8f179SJonas Gorskiendchoice
27511da8f179SJonas Gorski
2752*2024972eSJonas Gorskichoice
2753*2024972eSJonas Gorski	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
2754*2024972eSJonas Gorski	default MIPS_CMDLINE_FROM_BOOTLOADER
2755*2024972eSJonas Gorski
2756*2024972eSJonas Gorski	config MIPS_CMDLINE_FROM_DTB
2757*2024972eSJonas Gorski		depends on USE_OF
2758*2024972eSJonas Gorski		bool "Dtb kernel arguments if available"
2759*2024972eSJonas Gorski
2760*2024972eSJonas Gorski	config MIPS_CMDLINE_DTB_EXTEND
2761*2024972eSJonas Gorski		depends on USE_OF
2762*2024972eSJonas Gorski		bool "Extend dtb kernel arguments with bootloader arguments"
2763*2024972eSJonas Gorski
2764*2024972eSJonas Gorski	config MIPS_CMDLINE_FROM_BOOTLOADER
2765*2024972eSJonas Gorski		bool "Bootloader kernel arguments if available"
2766*2024972eSJonas Gorskiendchoice
2767*2024972eSJonas Gorski
27685e83d430SRalf Baechleendmenu
27695e83d430SRalf Baechle
27701df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
27711df0f0ffSAtsushi Nemoto	bool
27721df0f0ffSAtsushi Nemoto	default y
27731df0f0ffSAtsushi Nemoto
27741df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
27751df0f0ffSAtsushi Nemoto	bool
27761df0f0ffSAtsushi Nemoto	default y
27771df0f0ffSAtsushi Nemoto
2778e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT
2779e1e16115SAaro Koskinen	bool
2780e1e16115SAaro Koskinen	default y
2781e1e16115SAaro Koskinen
2782a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS
2783a728ab52SKirill A. Shutemov	int
2784a728ab52SKirill A. Shutemov	default 3 if 64BIT && !PAGE_SIZE_64KB
2785a728ab52SKirill A. Shutemov	default 2
2786a728ab52SKirill A. Shutemov
2787b6c3539bSRalf Baechlesource "init/Kconfig"
2788b6c3539bSRalf Baechle
2789dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2790dc52ddc0SMatt Helsley
27911da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
27921da177e4SLinus Torvalds
27935e83d430SRalf Baechleconfig HW_HAS_EISA
27945e83d430SRalf Baechle	bool
27951da177e4SLinus Torvaldsconfig HW_HAS_PCI
27961da177e4SLinus Torvalds	bool
27971da177e4SLinus Torvalds
27981da177e4SLinus Torvaldsconfig PCI
27991da177e4SLinus Torvalds	bool "Support for PCI controller"
28001da177e4SLinus Torvalds	depends on HW_HAS_PCI
2801abb4ae46SRalf Baechle	select PCI_DOMAINS
28020f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
28031da177e4SLinus Torvalds	help
28041da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
28051da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
28061da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
28071da177e4SLinus Torvalds	  say Y, otherwise N.
28081da177e4SLinus Torvalds
28090e476d91SHuacai Chenconfig HT_PCI
28100e476d91SHuacai Chen	bool "Support for HT-linked PCI"
28110e476d91SHuacai Chen	default y
28120e476d91SHuacai Chen	depends on CPU_LOONGSON3
28130e476d91SHuacai Chen	select PCI
28140e476d91SHuacai Chen	select PCI_DOMAINS
28150e476d91SHuacai Chen	help
28160e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
28170e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
28180e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
28190e476d91SHuacai Chen
28201da177e4SLinus Torvaldsconfig PCI_DOMAINS
28211da177e4SLinus Torvalds	bool
28221da177e4SLinus Torvalds
28231da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
28241da177e4SLinus Torvalds
28253f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig"
28263f787ca4SJonas Gorski
28271da177e4SLinus Torvalds#
28281da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
28291da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
28301da177e4SLinus Torvalds# users to choose the right thing ...
28311da177e4SLinus Torvalds#
28321da177e4SLinus Torvaldsconfig ISA
28331da177e4SLinus Torvalds	bool
28341da177e4SLinus Torvalds
28351da177e4SLinus Torvaldsconfig EISA
28361da177e4SLinus Torvalds	bool "EISA support"
28375e83d430SRalf Baechle	depends on HW_HAS_EISA
28381da177e4SLinus Torvalds	select ISA
2839aa414dffSRalf Baechle	select GENERIC_ISA_DMA
28401da177e4SLinus Torvalds	---help---
28411da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
28421da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
28431da177e4SLinus Torvalds
28441da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
28451da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
28461da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
28471da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
28481da177e4SLinus Torvalds
28491da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
28501da177e4SLinus Torvalds
28511da177e4SLinus Torvalds	  Otherwise, say N.
28521da177e4SLinus Torvalds
28531da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
28541da177e4SLinus Torvalds
28551da177e4SLinus Torvaldsconfig TC
28561da177e4SLinus Torvalds	bool "TURBOchannel support"
28571da177e4SLinus Torvalds	depends on MACH_DECSTATION
28581da177e4SLinus Torvalds	help
285950a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
286050a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
286150a23e6eSJustin P. Mattock	  at:
286250a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
286350a23e6eSJustin P. Mattock	  and:
286450a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
286550a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
286650a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
28671da177e4SLinus Torvalds
28681da177e4SLinus Torvaldsconfig MMU
28691da177e4SLinus Torvalds	bool
28701da177e4SLinus Torvalds	default y
28711da177e4SLinus Torvalds
2872d865bea4SRalf Baechleconfig I8253
2873d865bea4SRalf Baechle	bool
2874798778b8SRussell King	select CLKSRC_I8253
28752d02612fSThomas Gleixner	select CLKEVT_I8253
28769726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
2877d865bea4SRalf Baechle
2878e05eb3f8SRalf Baechleconfig ZONE_DMA
2879e05eb3f8SRalf Baechle	bool
2880e05eb3f8SRalf Baechle
2881cce335aeSRalf Baechleconfig ZONE_DMA32
2882cce335aeSRalf Baechle	bool
2883cce335aeSRalf Baechle
28841da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
28851da177e4SLinus Torvalds
28861da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig"
28871da177e4SLinus Torvalds
2888388b78adSAlexandre Bounineconfig RAPIDIO
288956abde72SAlexandre Bounine	tristate "RapidIO support"
2890388b78adSAlexandre Bounine	depends on PCI
2891388b78adSAlexandre Bounine	default n
2892388b78adSAlexandre Bounine	help
2893388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
2894388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
2895388b78adSAlexandre Bounine
2896388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
2897388b78adSAlexandre Bounine
28981da177e4SLinus Torvaldsendmenu
28991da177e4SLinus Torvalds
29001da177e4SLinus Torvaldsmenu "Executable file formats"
29011da177e4SLinus Torvalds
29021da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
29031da177e4SLinus Torvalds
29041da177e4SLinus Torvaldsconfig TRAD_SIGNALS
29051da177e4SLinus Torvalds	bool
29061da177e4SLinus Torvalds
29071da177e4SLinus Torvaldsconfig MIPS32_COMPAT
290878aaf956SRalf Baechle	bool
29091da177e4SLinus Torvalds
29101da177e4SLinus Torvaldsconfig COMPAT
29111da177e4SLinus Torvalds	bool
29121da177e4SLinus Torvalds
291305e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
291405e43966SAtsushi Nemoto	bool
291505e43966SAtsushi Nemoto
29161da177e4SLinus Torvaldsconfig MIPS32_O32
29171da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
291878aaf956SRalf Baechle	depends on 64BIT
291978aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
292078aaf956SRalf Baechle	select COMPAT
292178aaf956SRalf Baechle	select MIPS32_COMPAT
292278aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
29231da177e4SLinus Torvalds	help
29241da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
29251da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
29261da177e4SLinus Torvalds	  existing binaries are in this format.
29271da177e4SLinus Torvalds
29281da177e4SLinus Torvalds	  If unsure, say Y.
29291da177e4SLinus Torvalds
29301da177e4SLinus Torvaldsconfig MIPS32_N32
29311da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
2932c22eacfeSRalf Baechle	depends on 64BIT
293378aaf956SRalf Baechle	select COMPAT
293478aaf956SRalf Baechle	select MIPS32_COMPAT
293578aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
29361da177e4SLinus Torvalds	help
29371da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
29381da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
29391da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
29401da177e4SLinus Torvalds	  cases.
29411da177e4SLinus Torvalds
29421da177e4SLinus Torvalds	  If unsure, say N.
29431da177e4SLinus Torvalds
29441da177e4SLinus Torvaldsconfig BINFMT_ELF32
29451da177e4SLinus Torvalds	bool
29461da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
29471da177e4SLinus Torvalds
29482116245eSRalf Baechleendmenu
29491da177e4SLinus Torvalds
29502116245eSRalf Baechlemenu "Power management options"
2951952fa954SRodolfo Giometti
2952363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
2953363c55caSWu Zhangjin	def_bool y
29543f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2955363c55caSWu Zhangjin
2956f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
2957f4cb5700SJohannes Berg	def_bool y
29583f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2959f4cb5700SJohannes Berg
29602116245eSRalf Baechlesource "kernel/power/Kconfig"
2961952fa954SRodolfo Giometti
29621da177e4SLinus Torvaldsendmenu
29631da177e4SLinus Torvalds
29647a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
29657a998935SViresh Kumar	bool
29667a998935SViresh Kumar
29677a998935SViresh Kumarmenu "CPU Power Management"
2968c095ebafSPaul Burton
2969c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
29707a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
29717a998935SViresh Kumarendif
29729726b43aSWu Zhangjin
2973c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
2974c095ebafSPaul Burton
2975c095ebafSPaul Burtonendmenu
2976c095ebafSPaul Burton
2977d5950b43SSam Ravnborgsource "net/Kconfig"
2978d5950b43SSam Ravnborg
29791da177e4SLinus Torvaldssource "drivers/Kconfig"
29801da177e4SLinus Torvalds
298198cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
298298cdee0eSRalf Baechle
29831da177e4SLinus Torvaldssource "fs/Kconfig"
29841da177e4SLinus Torvalds
29851da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
29861da177e4SLinus Torvalds
29871da177e4SLinus Torvaldssource "security/Kconfig"
29881da177e4SLinus Torvalds
29891da177e4SLinus Torvaldssource "crypto/Kconfig"
29901da177e4SLinus Torvalds
29911da177e4SLinus Torvaldssource "lib/Kconfig"
29922235a54dSSanjay Lal
29932235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
2994