xref: /linux/arch/mips/Kconfig (revision 1d2753a66acbb101a0ec495cd13b9031ac1b171f)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
440e084a5SRalf Baechle	select ARCH_SUPPORTS_UPROBES
5a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
6393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
75fac4f7aSPaul Burton	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
81ee3630aSRalf Baechle	select ARCH_USE_BUILTIN_BSWAP
9c3fc5cd5SRalf Baechle	select HAVE_CONTEXT_TRACKING
10f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
11ec7748b5SSam Ravnborg	select HAVE_IDE
1242d4b839SMathieu Desnoyers	select HAVE_OPROFILE
137f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
147f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
1588547001SJason Wessel	select HAVE_ARCH_KGDB
16490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
17c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
183f5fdb4bSMarkos Chandras	select HAVE_BPF_JIT if !CPU_MICROMIPS
19d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
20538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
21538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
2264575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
2329c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
24c1bf207dSDavid Daney	select HAVE_KPROBES
25c1bf207dSDavid Daney	select HAVE_KRETPROBES
26fb59e394SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
27b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
281d7bf993SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
292b68f6caSKees Cook	select ARCH_HAS_ELF_RANDOMIZE
30383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
3130ad29bbSHuacai Chen	select RTC_LIB if !MACH_LOONGSON64
322b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
337463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
34f4649382SZubair Lutfullah Kakakhel	select HAVE_DMA_CONTIGUOUS
3548e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
363bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
37f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3878857614SMarkos Chandras	select GENERIC_PCI_IOMAP
3994bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
40c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
410f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
429d15ffc8STejun Heo	select HAVE_MEMBLOCK
439d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
449d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
45360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
464b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
47cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
48929de4ccSDeng-Cheng Zhu	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
49cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
50786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
514febd95aSStephen Rothwell	select VIRT_TO_BUS
522f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
532f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
5450150d2bSAl Viro	select CLONE_BACKWARDS
55d1a1dc0bSDave Hansen	select HAVE_DEBUG_STACKOVERFLOW
5619952a92SKees Cook	select HAVE_CC_STACKPROTECTOR
57b1d4c6caSJames Hogan	select CPU_PM if CPU_IDLE
58cc7964afSPaul Burton	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
5990cee759SPaul Burton	select ARCH_BINFMT_ELF_STATE
60d79d853dSMarkos Chandras	select SYSCTL_EXCEPTION_TRACE
61bb877e96SDeng-Cheng Zhu	select HAVE_VIRT_CPU_ACCOUNTING_GEN
62ec9ddad3SDeng-Cheng Zhu	select HAVE_IRQ_TIME_ACCOUNTING
63a7f4df4eSAlex Smith	select GENERIC_TIME_VSYSCALL
64a7f4df4eSAlex Smith	select ARCH_CLOCKSOURCE_DATA
65*1d2753a6SDavid Daney	select HANDLE_DOMAIN_IRQ
661da177e4SLinus Torvalds
671da177e4SLinus Torvaldsmenu "Machine selection"
681da177e4SLinus Torvalds
695e83d430SRalf Baechlechoice
705e83d430SRalf Baechle	prompt "System type"
715e83d430SRalf Baechle	default SGI_IP22
721da177e4SLinus Torvalds
7342a4f17dSManuel Laussconfig MIPS_ALCHEMY
74c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
7534adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
76f772cdb2SRalf Baechle	select CEVT_R4K
77d7ea335cSSteven J. Hill	select CSRC_R4K
7867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7988e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
8042a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
8142a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
8242a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
83efb12436SAlexandre Courbot	select ARCH_REQUIRE_GPIOLIB
841b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
8547440229SManuel Lauss	select COMMON_CLK
861da177e4SLinus Torvalds
877ca5dc14SFlorian Fainelliconfig AR7
887ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
897ca5dc14SFlorian Fainelli	select BOOT_ELF32
907ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
917ca5dc14SFlorian Fainelli	select CEVT_R4K
927ca5dc14SFlorian Fainelli	select CSRC_R4K
9367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
947ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
957ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
967ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
977ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
987ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
997ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
100377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1011b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
1025f3c9098SFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
1037ca5dc14SFlorian Fainelli	select VLYNQ
1048551fb64SYoichi Yuasa	select HAVE_CLK
1057ca5dc14SFlorian Fainelli	help
1067ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1077ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1087ca5dc14SFlorian Fainelli
10943cc739fSSergey Ryazanovconfig ATH25
11043cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
11143cc739fSSergey Ryazanov	select CEVT_R4K
11243cc739fSSergey Ryazanov	select CSRC_R4K
11343cc739fSSergey Ryazanov	select DMA_NONCOHERENT
11467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1151753e74eSSergey Ryazanov	select IRQ_DOMAIN
11643cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
11743cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
11843cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
1198aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
12043cc739fSSergey Ryazanov	help
12143cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
12243cc739fSSergey Ryazanov
123d4a67d9dSGabor Juhosconfig ATH79
124d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
125ff591a91SAlban Bedel	select ARCH_HAS_RESET_CONTROLLER
1266eae43c5SGabor Juhos	select ARCH_REQUIRE_GPIOLIB
127d4a67d9dSGabor Juhos	select BOOT_RAW
128d4a67d9dSGabor Juhos	select CEVT_R4K
129d4a67d9dSGabor Juhos	select CSRC_R4K
130d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
13194638067SGabor Juhos	select HAVE_CLK
132411520afSAlban Bedel	select COMMON_CLK
1332c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
13467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1350aabf1a4SGabor Juhos	select MIPS_MACHINE
136d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
137d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
138d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
139d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
140377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
141b3f0a250SAlban Bedel	select SYS_SUPPORTS_ZBOOT_UART_PROM
14203c8c407SAlban Bedel	select USE_OF
143d4a67d9dSGabor Juhos	help
144d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
145d4a67d9dSGabor Juhos
1465f2d4459SKevin Cernekeeconfig BMIPS_GENERIC
1475f2d4459SKevin Cernekee	bool "Broadcom Generic BMIPS kernel"
148d666cd02SKevin Cernekee	select BOOT_RAW
149d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
150d666cd02SKevin Cernekee	select USE_OF
151d666cd02SKevin Cernekee	select CEVT_R4K
152d666cd02SKevin Cernekee	select CSRC_R4K
153d666cd02SKevin Cernekee	select SYNC_R4K
154d666cd02SKevin Cernekee	select COMMON_CLK
155c7c42ec2SSimon Arlott	select BCM6345_L1_IRQ
15660b858f2SKevin Cernekee	select BCM7038_L1_IRQ
15760b858f2SKevin Cernekee	select BCM7120_L2_IRQ
15860b858f2SKevin Cernekee	select BRCMSTB_L2_IRQ
15967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
16060b858f2SKevin Cernekee	select DMA_NONCOHERENT
161d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
16260b858f2SKevin Cernekee	select SYS_SUPPORTS_LITTLE_ENDIAN
163d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
164d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
16560b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS32_3300
16660b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4350
16760b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4380
168d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
169d666cd02SKevin Cernekee	select SWAP_IO_SPACE
17060b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17160b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
17260b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17360b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
174a7b43812SFlorian Fainelli	select ARCH_WANT_OPTIONAL_GPIOLIB
175d666cd02SKevin Cernekee	help
1765f2d4459SKevin Cernekee	  Build a generic DT-based kernel image that boots on select
1775f2d4459SKevin Cernekee	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
1785f2d4459SKevin Cernekee	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
1795f2d4459SKevin Cernekee	  must be set appropriately for your board.
180d666cd02SKevin Cernekee
1811c0c13ebSAurelien Jarnoconfig BCM47XX
182c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
1832da4c74dSHauke Mehrtens	select ARCH_WANT_OPTIONAL_GPIOLIB
184fe08f8c2SHauke Mehrtens	select BOOT_RAW
18542f77542SRalf Baechle	select CEVT_R4K
186940f6b48SRalf Baechle	select CSRC_R4K
1871c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1881c0c13ebSAurelien Jarno	select HW_HAS_PCI
18967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
190314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
191dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1921c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1931c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
194377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
19525e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
196e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
197c949c0bcSRafał Miłecki	select GPIOLIB
198c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
199f6e734a8SRafał Miłecki	select BCM47XX_NVRAM
2001c0c13ebSAurelien Jarno	help
2011c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
2021c0c13ebSAurelien Jarno
203e7300d04SMaxime Bizonconfig BCM63XX
204e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
205ae8de61cSFlorian Fainelli	select BOOT_RAW
206e7300d04SMaxime Bizon	select CEVT_R4K
207e7300d04SMaxime Bizon	select CSRC_R4K
208fc264022SJonas Gorski	select SYNC_R4K
209e7300d04SMaxime Bizon	select DMA_NONCOHERENT
21067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
211e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
212e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
213e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
214e7300d04SMaxime Bizon	select SWAP_IO_SPACE
215e7300d04SMaxime Bizon	select ARCH_REQUIRE_GPIOLIB
2163e82eeebSYoichi Yuasa	select HAVE_CLK
217af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
218e7300d04SMaxime Bizon	help
219e7300d04SMaxime Bizon	 Support for BCM63XX based boards
220e7300d04SMaxime Bizon
2211da177e4SLinus Torvaldsconfig MIPS_COBALT
2223fa986faSMartin Michlmayr	bool "Cobalt Server"
22342f77542SRalf Baechle	select CEVT_R4K
224940f6b48SRalf Baechle	select CSRC_R4K
2251097c6acSYoichi Yuasa	select CEVT_GT641XX
2261da177e4SLinus Torvalds	select DMA_NONCOHERENT
2271da177e4SLinus Torvalds	select HW_HAS_PCI
228d865bea4SRalf Baechle	select I8253
2291da177e4SLinus Torvalds	select I8259
23067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
231d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
232252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
233e25bfc92SYoichi Yuasa	select PCI
2347cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
2350a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
236ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2370e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
2385e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
239e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
2401da177e4SLinus Torvalds
2411da177e4SLinus Torvaldsconfig MACH_DECSTATION
2423fa986faSMartin Michlmayr	bool "DECstations"
2431da177e4SLinus Torvalds	select BOOT_ELF32
2446457d9fcSYoichi Yuasa	select CEVT_DS1287
24581d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
2464247417dSYoichi Yuasa	select CSRC_IOASIC
24781d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
24820d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
24920d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
25020d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
2511da177e4SLinus Torvalds	select DMA_NONCOHERENT
252ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
25367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
2547cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
2557cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
256ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2577d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2585e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
2591723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
2601723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
2611723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
262930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
2635e83d430SRalf Baechle	help
2641da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
2651da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
2661da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
2671da177e4SLinus Torvalds
2681da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
2691da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
2701da177e4SLinus Torvalds
2711da177e4SLinus Torvalds		DECstation 5000/50
2721da177e4SLinus Torvalds		DECstation 5000/150
2731da177e4SLinus Torvalds		DECstation 5000/260
2741da177e4SLinus Torvalds		DECsystem 5900/260
2751da177e4SLinus Torvalds
2761da177e4SLinus Torvalds	  otherwise choose R3000.
2771da177e4SLinus Torvalds
2785e83d430SRalf Baechleconfig MACH_JAZZ
2793fa986faSMartin Michlmayr	bool "Jazz family of machines"
2800e2794b0SRalf Baechle	select FW_ARC
2810e2794b0SRalf Baechle	select FW_ARC32
2825e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
28342f77542SRalf Baechle	select CEVT_R4K
284940f6b48SRalf Baechle	select CSRC_R4K
285e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2865e83d430SRalf Baechle	select GENERIC_ISA_DMA
2878a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
28867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
289d865bea4SRalf Baechle	select I8253
2905e83d430SRalf Baechle	select I8259
2915e83d430SRalf Baechle	select ISA
2927cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2935e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2947d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2951723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2961da177e4SLinus Torvalds	help
2975e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
2985e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
299692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
3005e83d430SRalf Baechle	 Olivetti M700-10 workstations.
3015e83d430SRalf Baechle
302de361e8bSPaul Burtonconfig MACH_INGENIC
303de361e8bSPaul Burton	bool "Ingenic SoC based machines"
3045ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
3055ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
306f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
3075ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
30867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3095ebabe59SLars-Peter Clausen	select ARCH_REQUIRE_GPIOLIB
310ff1930c6SPaul Burton	select COMMON_CLK
31183bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
312ffb1843dSPaul Burton	select BUILTIN_DTB
313ffb1843dSPaul Burton	select USE_OF
3146ec127fbSPaul Burton	select LIBFDT
3155ebabe59SLars-Peter Clausen
316171bb2f1SJohn Crispinconfig LANTIQ
317171bb2f1SJohn Crispin	bool "Lantiq based platforms"
318171bb2f1SJohn Crispin	select DMA_NONCOHERENT
31967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
320171bb2f1SJohn Crispin	select CEVT_R4K
321171bb2f1SJohn Crispin	select CSRC_R4K
322171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
323171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
324171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
325171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
326377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
327171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
328171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
329171bb2f1SJohn Crispin	select ARCH_REQUIRE_GPIOLIB
330171bb2f1SJohn Crispin	select SWAP_IO_SPACE
331171bb2f1SJohn Crispin	select BOOT_RAW
332287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
333a0392222SJohn Crispin	select USE_OF
3343f8c50c9SJohn Crispin	select PINCTRL
3353f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
336c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
337c530781cSJohn Crispin	select RESET_CONTROLLER
338171bb2f1SJohn Crispin
3391f21d2bdSBrian Murphyconfig LASAT
3401f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
34142f77542SRalf Baechle	select CEVT_R4K
34216f0bbbcSRalf Baechle	select CRC32
343940f6b48SRalf Baechle	select CSRC_R4K
3441f21d2bdSBrian Murphy	select DMA_NONCOHERENT
3451f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
3461f21d2bdSBrian Murphy	select HW_HAS_PCI
34767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3481f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
3491f21d2bdSBrian Murphy	select MIPS_NILE4
3501f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
3511f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
3521f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
3531f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
3541f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
3551f21d2bdSBrian Murphy
35630ad29bbSHuacai Chenconfig MACH_LOONGSON32
35730ad29bbSHuacai Chen	bool "Loongson-1 family of machines"
358c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
359ade299d8SYoichi Yuasa	help
36030ad29bbSHuacai Chen	  This enables support for the Loongson-1 family of machines.
36185749d24SWu Zhangjin
36230ad29bbSHuacai Chen	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
36330ad29bbSHuacai Chen	  the Institute of Computing Technology (ICT), Chinese Academy of
36430ad29bbSHuacai Chen	  Sciences (CAS).
365ade299d8SYoichi Yuasa
36630ad29bbSHuacai Chenconfig MACH_LOONGSON64
36730ad29bbSHuacai Chen	bool "Loongson-2/3 family of machines"
368ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
369ca585cf9SKelvin Cheung	help
37030ad29bbSHuacai Chen	  This enables the support of Loongson-2/3 family of machines.
371ca585cf9SKelvin Cheung
37230ad29bbSHuacai Chen	  Loongson-2 is a family of single-core CPUs and Loongson-3 is a
37330ad29bbSHuacai Chen	  family of multi-core CPUs. They are both 64-bit general-purpose
37430ad29bbSHuacai Chen	  MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
37530ad29bbSHuacai Chen	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
37630ad29bbSHuacai Chen	  in the People's Republic of China. The chief architect is Professor
37730ad29bbSHuacai Chen	  Weiwu Hu.
378ca585cf9SKelvin Cheung
3796a438309SAndrew Brestickerconfig MACH_PISTACHIO
3806a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
3816a438309SAndrew Bresticker	select ARCH_REQUIRE_GPIOLIB
3826a438309SAndrew Bresticker	select BOOT_ELF32
3836a438309SAndrew Bresticker	select BOOT_RAW
3846a438309SAndrew Bresticker	select CEVT_R4K
3856a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
3866a438309SAndrew Bresticker	select COMMON_CLK
3876a438309SAndrew Bresticker	select CSRC_R4K
3886a438309SAndrew Bresticker	select DMA_MAYBE_COHERENT
38967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3906a438309SAndrew Bresticker	select LIBFDT
3916a438309SAndrew Bresticker	select MFD_SYSCON
3926a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
3936a438309SAndrew Bresticker	select MIPS_GIC
3946a438309SAndrew Bresticker	select PINCTRL
3956a438309SAndrew Bresticker	select REGULATOR
3966a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
3976a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
3986a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
3996a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
4006a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
4016a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
402018f62eeSEzequiel Garcia	select SYS_HAS_EARLY_PRINTK
403018f62eeSEzequiel Garcia	select USE_GENERIC_EARLY_PRINTK_8250
4046a438309SAndrew Bresticker	select USE_OF
4056a438309SAndrew Bresticker	help
4066a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
4076a438309SAndrew Bresticker
4089937f5ffSZubair Lutfullah Kakakhelconfig MACH_XILFPGA
4099937f5ffSZubair Lutfullah Kakakhel	bool "MIPSfpga Xilinx based boards"
4109937f5ffSZubair Lutfullah Kakakhel	select ARCH_REQUIRE_GPIOLIB
4119937f5ffSZubair Lutfullah Kakakhel	select BOOT_ELF32
4129937f5ffSZubair Lutfullah Kakakhel	select BOOT_RAW
4139937f5ffSZubair Lutfullah Kakakhel	select BUILTIN_DTB
4149937f5ffSZubair Lutfullah Kakakhel	select CEVT_R4K
4159937f5ffSZubair Lutfullah Kakakhel	select COMMON_CLK
4169937f5ffSZubair Lutfullah Kakakhel	select CSRC_R4K
4179937f5ffSZubair Lutfullah Kakakhel	select IRQ_MIPS_CPU
4189937f5ffSZubair Lutfullah Kakakhel	select LIBFDT
4199937f5ffSZubair Lutfullah Kakakhel	select MIPS_CPU_SCACHE
4209937f5ffSZubair Lutfullah Kakakhel	select SYS_HAS_EARLY_PRINTK
4219937f5ffSZubair Lutfullah Kakakhel	select SYS_HAS_CPU_MIPS32_R2
4229937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_32BIT_KERNEL
4239937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_LITTLE_ENDIAN
4249937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_ZBOOT_UART16550
4259937f5ffSZubair Lutfullah Kakakhel	select USE_OF
4269937f5ffSZubair Lutfullah Kakakhel	select USE_GENERIC_EARLY_PRINTK_8250
4279937f5ffSZubair Lutfullah Kakakhel	help
4289937f5ffSZubair Lutfullah Kakakhel	  This enables support for the IMG University Program MIPSfpga platform.
4299937f5ffSZubair Lutfullah Kakakhel
4301da177e4SLinus Torvaldsconfig MIPS_MALTA
4313fa986faSMartin Michlmayr	bool "MIPS Malta board"
43261ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
4331da177e4SLinus Torvalds	select BOOT_ELF32
434fa71c960SRalf Baechle	select BOOT_RAW
435e8823d26SPaul Burton	select BUILTIN_DTB
43642f77542SRalf Baechle	select CEVT_R4K
437940f6b48SRalf Baechle	select CSRC_R4K
438fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
43942b002abSGuenter Roeck	select COMMON_CLK
440885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
4411da177e4SLinus Torvalds	select GENERIC_ISA_DMA
4428a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
44367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4448a19b8f1SAndrew Bresticker	select MIPS_GIC
4451da177e4SLinus Torvalds	select HW_HAS_PCI
446d865bea4SRalf Baechle	select I8253
4471da177e4SLinus Torvalds	select I8259
4485e83d430SRalf Baechle	select MIPS_BONITO64
4499318c51aSChris Dearman	select MIPS_CPU_SCACHE
450a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
451252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
4525e83d430SRalf Baechle	select MIPS_MSC
453ecafe3e9SPaul Burton	select SMP_UP if SMP
4541da177e4SLinus Torvalds	select SWAP_IO_SPACE
4557cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
4567cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
457bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
458c5b36783SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R5
459575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
4607cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
4615d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
462575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
4637cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
4647cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
465ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
466ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4675e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
468c5b36783SSteven J. Hill	select SYS_SUPPORTS_HIGHMEM
4695e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
470424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
4710365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
472e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
473377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
474f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
4759693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
4761b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
477e8823d26SPaul Burton	select USE_OF
478abcc82b1SJames Hogan	select ZONE_DMA32 if 64BIT
479e81a8c7dSPaul Burton	select BUILTIN_DTB
480e81a8c7dSPaul Burton	select LIBFDT
4811da177e4SLinus Torvalds	help
482f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
4831da177e4SLinus Torvalds	  board.
4841da177e4SLinus Torvalds
4852572f00dSJoshua Hendersonconfig MACH_PIC32
4862572f00dSJoshua Henderson	bool "Microchip PIC32 Family"
4872572f00dSJoshua Henderson	help
4882572f00dSJoshua Henderson	  This enables support for the Microchip PIC32 family of platforms.
4892572f00dSJoshua Henderson
4902572f00dSJoshua Henderson	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
4912572f00dSJoshua Henderson	  microcontrollers.
4922572f00dSJoshua Henderson
493ec47b274SSteven J. Hillconfig MIPS_SEAD3
494ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
495ec47b274SSteven J. Hill	select BOOT_ELF32
496ec47b274SSteven J. Hill	select BOOT_RAW
497f262b5f2SAndrew Bresticker	select BUILTIN_DTB
498ec47b274SSteven J. Hill	select CEVT_R4K
499ec47b274SSteven J. Hill	select CSRC_R4K
500fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
50142b002abSGuenter Roeck	select COMMON_CLK
502ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
503ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
504ec47b274SSteven J. Hill	select DMA_NONCOHERENT
50567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5068a19b8f1SAndrew Bresticker	select MIPS_GIC
50744327236SQais Yousef	select LIBFDT
508ec47b274SSteven J. Hill	select MIPS_MSC
509ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
510ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
511ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
512ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
513ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
514ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
515ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
516ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
517ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
518a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
519377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
520ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
521ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
5229b731009SSteven J. Hill	select USE_OF
523ec47b274SSteven J. Hill	help
524ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
525ec47b274SSteven J. Hill	  board.
526ec47b274SSteven J. Hill
527a83860c2SRalf Baechleconfig NEC_MARKEINS
528a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
529a83860c2SRalf Baechle	select SOC_EMMA2RH
530a83860c2SRalf Baechle	select HW_HAS_PCI
531a83860c2SRalf Baechle	help
532a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
533ade299d8SYoichi Yuasa
5345e83d430SRalf Baechleconfig MACH_VR41XX
53574142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
53642f77542SRalf Baechle	select CEVT_R4K
537940f6b48SRalf Baechle	select CSRC_R4K
5387cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
539377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
54027fdd325SYoichi Yuasa	select ARCH_REQUIRE_GPIOLIB
5415e83d430SRalf Baechle
542edb6310aSDaniel Lairdconfig NXP_STB220
543edb6310aSDaniel Laird	bool "NXP STB220 board"
544edb6310aSDaniel Laird	select SOC_PNX833X
545edb6310aSDaniel Laird	help
546edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
547edb6310aSDaniel Laird
548edb6310aSDaniel Lairdconfig NXP_STB225
549edb6310aSDaniel Laird	bool "NXP 225 board"
550edb6310aSDaniel Laird	select SOC_PNX833X
551edb6310aSDaniel Laird	select SOC_PNX8335
552edb6310aSDaniel Laird	help
553edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
554edb6310aSDaniel Laird
5559267a30dSMarc St-Jeanconfig PMC_MSP
5569267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
55739d30c13SAnoop P A	select CEVT_R4K
55839d30c13SAnoop P A	select CSRC_R4K
5599267a30dSMarc St-Jean	select DMA_NONCOHERENT
5609267a30dSMarc St-Jean	select SWAP_IO_SPACE
5619267a30dSMarc St-Jean	select NO_EXCEPT_FILL
5629267a30dSMarc St-Jean	select BOOT_RAW
5639267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
5649267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
5659267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
5669267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
567377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
56867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5699267a30dSMarc St-Jean	select SERIAL_8250
5709267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
5719296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
5729296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
5739267a30dSMarc St-Jean	help
5749267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
5759267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
5769267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
5779267a30dSMarc St-Jean	  a variety of MIPS cores.
5789267a30dSMarc St-Jean
579ae2b5bb6SJohn Crispinconfig RALINK
580ae2b5bb6SJohn Crispin	bool "Ralink based machines"
581ae2b5bb6SJohn Crispin	select CEVT_R4K
582ae2b5bb6SJohn Crispin	select CSRC_R4K
583ae2b5bb6SJohn Crispin	select BOOT_RAW
584ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
58567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
586ae2b5bb6SJohn Crispin	select USE_OF
587ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
588ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
589ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
590ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
591377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
592ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
593ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
5942a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
5952a153f1cSJohn Crispin	select RESET_CONTROLLER
596ae2b5bb6SJohn Crispin
5971da177e4SLinus Torvaldsconfig SGI_IP22
5983fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
5990e2794b0SRalf Baechle	select FW_ARC
6000e2794b0SRalf Baechle	select FW_ARC32
6011da177e4SLinus Torvalds	select BOOT_ELF32
60242f77542SRalf Baechle	select CEVT_R4K
603940f6b48SRalf Baechle	select CSRC_R4K
604e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
6051da177e4SLinus Torvalds	select DMA_NONCOHERENT
6065e83d430SRalf Baechle	select HW_HAS_EISA
607d865bea4SRalf Baechle	select I8253
60868de4803SThomas Bogendoerfer	select I8259
6091da177e4SLinus Torvalds	select IP22_CPU_SCACHE
61067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
611aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
612e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
613e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
61436e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
615e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
616e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
617e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
6181da177e4SLinus Torvalds	select SWAP_IO_SPACE
6197cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
6207cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
6212b5e63f6SMartin Michlmayr	#
6222b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6232b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6242b5e63f6SMartin Michlmayr	#
6252b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6262b5e63f6SMartin Michlmayr	# for a more details discussion
6272b5e63f6SMartin Michlmayr	#
6282b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
629ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
630ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6315e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
632930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6331da177e4SLinus Torvalds	help
6341da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
6351da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
6361da177e4SLinus Torvalds	  that runs on these, say Y here.
6371da177e4SLinus Torvalds
6381da177e4SLinus Torvaldsconfig SGI_IP27
6393fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
6400e2794b0SRalf Baechle	select FW_ARC
6410e2794b0SRalf Baechle	select FW_ARC64
6425e83d430SRalf Baechle	select BOOT_ELF64
643e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
644634286f1SRalf Baechle	select DMA_COHERENT
64536a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
6461da177e4SLinus Torvalds	select HW_HAS_PCI
647130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
6487cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
649ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6505e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
651d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
6521a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
653930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6541da177e4SLinus Torvalds	help
6551da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
6561da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
6571da177e4SLinus Torvalds	  here.
6581da177e4SLinus Torvalds
659e2defae5SThomas Bogendoerferconfig SGI_IP28
6607d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
6610e2794b0SRalf Baechle	select FW_ARC
6620e2794b0SRalf Baechle	select FW_ARC64
663e2defae5SThomas Bogendoerfer	select BOOT_ELF64
664e2defae5SThomas Bogendoerfer	select CEVT_R4K
665e2defae5SThomas Bogendoerfer	select CSRC_R4K
666e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
667e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
668e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
66967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
670e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
671e2defae5SThomas Bogendoerfer	select I8253
672e2defae5SThomas Bogendoerfer	select I8259
673e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
674e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6755b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
676e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
677e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
678e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
679e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
680e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6812b5e63f6SMartin Michlmayr	#
6822b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6832b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6842b5e63f6SMartin Michlmayr	#
6852b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6862b5e63f6SMartin Michlmayr	# for a more details discussion
6872b5e63f6SMartin Michlmayr	#
6882b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
689e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
690e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
691dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
692e2defae5SThomas Bogendoerfer      help
693e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
694e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
695e2defae5SThomas Bogendoerfer
6961da177e4SLinus Torvaldsconfig SGI_IP32
697cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
6980e2794b0SRalf Baechle	select FW_ARC
6990e2794b0SRalf Baechle	select FW_ARC32
7001da177e4SLinus Torvalds	select BOOT_ELF32
70142f77542SRalf Baechle	select CEVT_R4K
702940f6b48SRalf Baechle	select CSRC_R4K
7031da177e4SLinus Torvalds	select DMA_NONCOHERENT
7041da177e4SLinus Torvalds	select HW_HAS_PCI
70567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7061da177e4SLinus Torvalds	select R5000_CPU_SCACHE
7071da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
7087cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
7097cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
7107cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
711dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
712ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
7135e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7141da177e4SLinus Torvalds	help
7151da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
7161da177e4SLinus Torvalds
717ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
718ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
7195e83d430SRalf Baechle	select BOOT_ELF32
7205e83d430SRalf Baechle	select DMA_COHERENT
7215e83d430SRalf Baechle	select SIBYTE_BCM1120
7225e83d430SRalf Baechle	select SWAP_IO_SPACE
7237cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7245e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7255e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7265e83d430SRalf Baechle
727ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
728ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
7295e83d430SRalf Baechle	select BOOT_ELF32
7305e83d430SRalf Baechle	select DMA_COHERENT
7315e83d430SRalf Baechle	select SIBYTE_BCM1120
7325e83d430SRalf Baechle	select SWAP_IO_SPACE
7337cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7345e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7355e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7365e83d430SRalf Baechle
7375e83d430SRalf Baechleconfig SIBYTE_CRHONE
7383fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
7395e83d430SRalf Baechle	select BOOT_ELF32
7405e83d430SRalf Baechle	select DMA_COHERENT
7415e83d430SRalf Baechle	select SIBYTE_BCM1125
7425e83d430SRalf Baechle	select SWAP_IO_SPACE
7437cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7445e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7455e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7465e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7475e83d430SRalf Baechle
748ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
749ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
750ade299d8SYoichi Yuasa	select BOOT_ELF32
751ade299d8SYoichi Yuasa	select DMA_COHERENT
752ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
753ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
754ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
755ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
756ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
757ade299d8SYoichi Yuasa
758ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
759ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
760ade299d8SYoichi Yuasa	select BOOT_ELF32
761ade299d8SYoichi Yuasa	select DMA_COHERENT
762fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
763ade299d8SYoichi Yuasa	select SIBYTE_SB1250
764ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
765ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
766ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
767ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
768ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
769cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
770ade299d8SYoichi Yuasa
771ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
772ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
773ade299d8SYoichi Yuasa	select BOOT_ELF32
774ade299d8SYoichi Yuasa	select DMA_COHERENT
775fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
776ade299d8SYoichi Yuasa	select SIBYTE_SB1250
777ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
778ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
779ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
780ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
781ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
782ade299d8SYoichi Yuasa
783ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
784ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
785ade299d8SYoichi Yuasa	select BOOT_ELF32
786ade299d8SYoichi Yuasa	select DMA_COHERENT
787ade299d8SYoichi Yuasa	select SIBYTE_SB1250
788ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
789ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
790ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
791ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
792ade299d8SYoichi Yuasa
793ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
794ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
795ade299d8SYoichi Yuasa	select BOOT_ELF32
796ade299d8SYoichi Yuasa	select DMA_COHERENT
797ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
798ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
799ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
800ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
801ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
802651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
803ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
804cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
805ade299d8SYoichi Yuasa
80614b36af4SThomas Bogendoerferconfig SNI_RM
80714b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
8080e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
8090e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
810aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
8115e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
8125e83d430SRalf Baechle	select BOOT_ELF32
81342f77542SRalf Baechle	select CEVT_R4K
814940f6b48SRalf Baechle	select CSRC_R4K
815e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
8165e83d430SRalf Baechle	select DMA_NONCOHERENT
8175e83d430SRalf Baechle	select GENERIC_ISA_DMA
8188a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
8195e83d430SRalf Baechle	select HW_HAS_EISA
8205e83d430SRalf Baechle	select HW_HAS_PCI
82167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
822d865bea4SRalf Baechle	select I8253
8235e83d430SRalf Baechle	select I8259
8245e83d430SRalf Baechle	select ISA
8254a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
8267cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
8274a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
828c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
8294a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
83036a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
831ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
8327d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
8334a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
8345e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
8355e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8361da177e4SLinus Torvalds	help
83714b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
83814b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
8395e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
8405e83d430SRalf Baechle	  support this machine type.
8411da177e4SLinus Torvalds
842edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
843edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
8445e83d430SRalf Baechle
845edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
846edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
84723fbee9dSRalf Baechle
84873b4390fSRalf Baechleconfig MIKROTIK_RB532
84973b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
85073b4390fSRalf Baechle	select CEVT_R4K
85173b4390fSRalf Baechle	select CSRC_R4K
85273b4390fSRalf Baechle	select DMA_NONCOHERENT
85373b4390fSRalf Baechle	select HW_HAS_PCI
85467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
85573b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
85673b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
85773b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
85873b4390fSRalf Baechle	select SWAP_IO_SPACE
85973b4390fSRalf Baechle	select BOOT_RAW
860d888e25bSFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
861930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
86273b4390fSRalf Baechle	help
86373b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
86473b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
86573b4390fSRalf Baechle
8669ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
8679ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
868a86c7f72SDavid Daney	select CEVT_R4K
86934adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
870a86c7f72SDavid Daney	select DMA_COHERENT
871a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
872a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
873f65aad41SRalf Baechle	select EDAC_SUPPORT
874b01aec9bSBorislav Petkov	select EDAC_ATOMIC_SCRUB
87573569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
87673569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
877a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
8785e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
879a86c7f72SDavid Daney	select SWAP_IO_SPACE
880e8635b48SDavid Daney	select HW_HAS_PCI
881f00e001eSDavid Daney	select ZONE_DMA32
882465aaed0SDavid Daney	select HOLES_IN_ZONE
88399cab4bbSDavid Daney	select ARCH_REQUIRE_GPIOLIB
8846e511163SDavid Daney	select LIBFDT
8856e511163SDavid Daney	select USE_OF
8866e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
8876e511163SDavid Daney	select SYS_SUPPORTS_SMP
8886e511163SDavid Daney	select NR_CPUS_DEFAULT_16
889e326479fSAndrew Bresticker	select BUILTIN_DTB
8908c1e6b14SDavid Daney	select MTD_COMPLEX_MAPPINGS
891a86c7f72SDavid Daney	help
892a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
893a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
894a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
895a86c7f72SDavid Daney	  Some of the supported boards are:
896a86c7f72SDavid Daney		EBT3000
897a86c7f72SDavid Daney		EBH3000
898a86c7f72SDavid Daney		EBH3100
899a86c7f72SDavid Daney		Thunder
900a86c7f72SDavid Daney		Kodama
901a86c7f72SDavid Daney		Hikari
902a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
903a86c7f72SDavid Daney
9047f058e85SJayachandran Cconfig NLM_XLR_BOARD
9057f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
9067f058e85SJayachandran C	select BOOT_ELF32
9077f058e85SJayachandran C	select NLM_COMMON
9087f058e85SJayachandran C	select SYS_HAS_CPU_XLR
9097f058e85SJayachandran C	select SYS_SUPPORTS_SMP
9107f058e85SJayachandran C	select HW_HAS_PCI
9117f058e85SJayachandran C	select SWAP_IO_SPACE
9127f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9137f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
91434adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
9157f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9167f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9177f058e85SJayachandran C	select DMA_COHERENT
9187f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
9197f058e85SJayachandran C	select CEVT_R4K
9207f058e85SJayachandran C	select CSRC_R4K
92167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
922b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9237f058e85SJayachandran C	select SYNC_R4K
9247f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
9258f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9268f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9277f058e85SJayachandran C	help
9287f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
9297f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
9307f058e85SJayachandran C
9311c773ea4SJayachandran Cconfig NLM_XLP_BOARD
9321c773ea4SJayachandran C	bool "Netlogic XLP based systems"
9331c773ea4SJayachandran C	select BOOT_ELF32
9341c773ea4SJayachandran C	select NLM_COMMON
9351c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
9361c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
9371c773ea4SJayachandran C	select HW_HAS_PCI
9381c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9391c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
94034adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
941079e3160SKamlakant Patel	select ARCH_REQUIRE_GPIOLIB
9421c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9431c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
9441c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9451c773ea4SJayachandran C	select DMA_COHERENT
9461c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
9471c773ea4SJayachandran C	select CEVT_R4K
9481c773ea4SJayachandran C	select CSRC_R4K
94967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
950b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9511c773ea4SJayachandran C	select SYNC_R4K
9521c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
9532f6528e1SJayachandran C	select USE_OF
9548f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9558f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9561c773ea4SJayachandran C	help
9571c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
9581c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
9591c773ea4SJayachandran C
9609bc463beSDavid Daneyconfig MIPS_PARAVIRT
9619bc463beSDavid Daney	bool "Para-Virtualized guest system"
9629bc463beSDavid Daney	select CEVT_R4K
9639bc463beSDavid Daney	select CSRC_R4K
9649bc463beSDavid Daney	select DMA_COHERENT
9659bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
9669bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
9679bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
9689bc463beSDavid Daney	select SYS_SUPPORTS_SMP
9699bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
9709bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
9719bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
9729bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
9739bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
9749bc463beSDavid Daney	select HW_HAS_PCI
9759bc463beSDavid Daney	select SWAP_IO_SPACE
9769bc463beSDavid Daney	help
9779bc463beSDavid Daney	  This option supports guest running under ????
9789bc463beSDavid Daney
9791da177e4SLinus Torvaldsendchoice
9801da177e4SLinus Torvalds
981e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
9823b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
983d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
984a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
985e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
9868945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig"
9875e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
9885ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
9898ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
9901f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
9912572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig"
992af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig"
9930f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
994ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
99529c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
99638b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
99722b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
9985e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
999a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
100030ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig"
100130ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig"
10027f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
1003ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
10049937f5ffSZubair Lutfullah Kakakhelsource "arch/mips/xilfpga/Kconfig"
100538b18f72SRalf Baechle
10065e83d430SRalf Baechleendmenu
10075e83d430SRalf Baechle
10081da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
10091da177e4SLinus Torvalds	bool
10101da177e4SLinus Torvalds	default y
10111da177e4SLinus Torvalds
10121da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
10131da177e4SLinus Torvalds	bool
10141da177e4SLinus Torvalds
1015f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
1016f0d1b0b3SDavid Howells	bool
1017f0d1b0b3SDavid Howells	default n
1018f0d1b0b3SDavid Howells
1019f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
1020f0d1b0b3SDavid Howells	bool
1021f0d1b0b3SDavid Howells	default n
1022f0d1b0b3SDavid Howells
10233c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
10243c9ee7efSAkinobu Mita	bool
10253c9ee7efSAkinobu Mita	default y
10263c9ee7efSAkinobu Mita
10271da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
10281da177e4SLinus Torvalds	bool
10291da177e4SLinus Torvalds	default y
10301da177e4SLinus Torvalds
1031ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
10321cc89038SAtsushi Nemoto	bool
10331cc89038SAtsushi Nemoto	default y
10341cc89038SAtsushi Nemoto
10351da177e4SLinus Torvalds#
10361da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
10371da177e4SLinus Torvalds#
10380e2794b0SRalf Baechleconfig FW_ARC
10391da177e4SLinus Torvalds	bool
10401da177e4SLinus Torvalds
104161ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
104261ed242dSRalf Baechle	bool
104361ed242dSRalf Baechle
10449267a30dSMarc St-Jeanconfig BOOT_RAW
10459267a30dSMarc St-Jean	bool
10469267a30dSMarc St-Jean
1047217dd11eSRalf Baechleconfig CEVT_BCM1480
1048217dd11eSRalf Baechle	bool
1049217dd11eSRalf Baechle
10506457d9fcSYoichi Yuasaconfig CEVT_DS1287
10516457d9fcSYoichi Yuasa	bool
10526457d9fcSYoichi Yuasa
10531097c6acSYoichi Yuasaconfig CEVT_GT641XX
10541097c6acSYoichi Yuasa	bool
10551097c6acSYoichi Yuasa
105642f77542SRalf Baechleconfig CEVT_R4K
105742f77542SRalf Baechle	bool
105842f77542SRalf Baechle
1059217dd11eSRalf Baechleconfig CEVT_SB1250
1060217dd11eSRalf Baechle	bool
1061217dd11eSRalf Baechle
1062229f773eSAtsushi Nemotoconfig CEVT_TXX9
1063229f773eSAtsushi Nemoto	bool
1064229f773eSAtsushi Nemoto
1065217dd11eSRalf Baechleconfig CSRC_BCM1480
1066217dd11eSRalf Baechle	bool
1067217dd11eSRalf Baechle
10684247417dSYoichi Yuasaconfig CSRC_IOASIC
10694247417dSYoichi Yuasa	bool
10704247417dSYoichi Yuasa
1071940f6b48SRalf Baechleconfig CSRC_R4K
1072940f6b48SRalf Baechle	bool
1073940f6b48SRalf Baechle
1074217dd11eSRalf Baechleconfig CSRC_SB1250
1075217dd11eSRalf Baechle	bool
1076217dd11eSRalf Baechle
1077a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL
1078a7f4df4eSAlex Smith	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1079a7f4df4eSAlex Smith
1080a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
10817444a72eSMichael Buesch	select ARCH_REQUIRE_GPIOLIB
1082a9aec7feSAtsushi Nemoto	bool
1083a9aec7feSAtsushi Nemoto
10840e2794b0SRalf Baechleconfig FW_CFE
1085df78b5c8SAurelien Jarno	bool
1086df78b5c8SAurelien Jarno
10874bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
108834adb28dSRalf Baechle	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
10894bafad92SFUJITA Tomonori
109040e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES
109140e084a5SRalf Baechle	bool
109240e084a5SRalf Baechle
1093885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1094885014bcSFelix Fietkau	select DMA_NONCOHERENT
1095885014bcSFelix Fietkau	bool
1096885014bcSFelix Fietkau
10971da177e4SLinus Torvaldsconfig DMA_COHERENT
10981da177e4SLinus Torvalds	bool
10991da177e4SLinus Torvalds
11001da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
11011da177e4SLinus Torvalds	bool
1102e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
11034ce588cdSRalf Baechle
1104e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
11054ce588cdSRalf Baechle	bool
11061da177e4SLinus Torvalds
110736a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
11081da177e4SLinus Torvalds	bool
11091da177e4SLinus Torvalds
1110dbb74540SRalf Baechleconfig HOTPLUG_CPU
11111b2bc75cSRalf Baechle	bool "Support for hot-pluggable CPUs"
111240b31360SStephen Rothwell	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
11131b2bc75cSRalf Baechle	help
11141b2bc75cSRalf Baechle	  Say Y here to allow turning CPUs off and on. CPUs can be
11151b2bc75cSRalf Baechle	  controlled through /sys/devices/system/cpu.
11161b2bc75cSRalf Baechle	  (Note: power management support will enable this option
11171b2bc75cSRalf Baechle	    automatically on SMP systems. )
11181b2bc75cSRalf Baechle	  Say N if you want to disable CPU hotplug.
11191b2bc75cSRalf Baechle
11201b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1121dbb74540SRalf Baechle	bool
1122dbb74540SRalf Baechle
11231da177e4SLinus Torvaldsconfig MIPS_BONITO64
11241da177e4SLinus Torvalds	bool
11251da177e4SLinus Torvalds
11261da177e4SLinus Torvaldsconfig MIPS_MSC
11271da177e4SLinus Torvalds	bool
11281da177e4SLinus Torvalds
11291f21d2bdSBrian Murphyconfig MIPS_NILE4
11301f21d2bdSBrian Murphy	bool
11311f21d2bdSBrian Murphy
113239b8d525SRalf Baechleconfig SYNC_R4K
113339b8d525SRalf Baechle	bool
113439b8d525SRalf Baechle
1135487d70d0SGabor Juhosconfig MIPS_MACHINE
1136487d70d0SGabor Juhos	def_bool n
1137487d70d0SGabor Juhos
1138ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1139d388d685SMaciej W. Rozycki	def_bool n
1140d388d685SMaciej W. Rozycki
11414e0748f5SMarkos Chandrasconfig GENERIC_CSUM
11424e0748f5SMarkos Chandras	bool
11434e0748f5SMarkos Chandras
11448313da30SRalf Baechleconfig GENERIC_ISA_DMA
11458313da30SRalf Baechle	bool
11468313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1147a35bee8aSNamhyung Kim	select ISA_DMA_API
11488313da30SRalf Baechle
1149aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1150aa414dffSRalf Baechle	bool
11518313da30SRalf Baechle	select GENERIC_ISA_DMA
1152aa414dffSRalf Baechle
1153a35bee8aSNamhyung Kimconfig ISA_DMA_API
1154a35bee8aSNamhyung Kim	bool
1155a35bee8aSNamhyung Kim
1156465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1157465aaed0SDavid Daney	bool
1158465aaed0SDavid Daney
11595e83d430SRalf Baechle#
11606b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
11615e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
11625e83d430SRalf Baechle# choice statement should be more obvious to the user.
11635e83d430SRalf Baechle#
11645e83d430SRalf Baechlechoice
11656b2aac42SMasanari Iida	prompt "Endianness selection"
11661da177e4SLinus Torvalds	help
11671da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
11685e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
11693cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
11705e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
11713dde6ad8SDavid Sterba	  one or the other endianness.
11725e83d430SRalf Baechle
11735e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
11745e83d430SRalf Baechle	bool "Big endian"
11755e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
11765e83d430SRalf Baechle
11775e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
11785e83d430SRalf Baechle	bool "Little endian"
11795e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
11805e83d430SRalf Baechle
11815e83d430SRalf Baechleendchoice
11825e83d430SRalf Baechle
118322b0763aSDavid Daneyconfig EXPORT_UASM
118422b0763aSDavid Daney	bool
118522b0763aSDavid Daney
11862116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
11872116245eSRalf Baechle	bool
11882116245eSRalf Baechle
11895e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
11905e83d430SRalf Baechle	bool
11915e83d430SRalf Baechle
11925e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
11935e83d430SRalf Baechle	bool
11941da177e4SLinus Torvalds
11959cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
11969cffd154SDavid Daney	bool
11979cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
11989cffd154SDavid Daney	default y
11999cffd154SDavid Daney
1200aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1201aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1202aa1762f4SDavid Daney
12031da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
12041da177e4SLinus Torvalds	bool
12051da177e4SLinus Torvalds
12069267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
12079267a30dSMarc St-Jean	bool
12089267a30dSMarc St-Jean
12099267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
12109267a30dSMarc St-Jean	bool
12119267a30dSMarc St-Jean
12128420fd00SAtsushi Nemotoconfig IRQ_TXX9
12138420fd00SAtsushi Nemoto	bool
12148420fd00SAtsushi Nemoto
1215d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1216d5ab1a69SYoichi Yuasa	bool
1217d5ab1a69SYoichi Yuasa
1218252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
12191da177e4SLinus Torvalds	bool
12201da177e4SLinus Torvalds
12219267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
12229267a30dSMarc St-Jean	bool
12239267a30dSMarc St-Jean
1224a83860c2SRalf Baechleconfig SOC_EMMA2RH
1225a83860c2SRalf Baechle	bool
1226a83860c2SRalf Baechle	select CEVT_R4K
1227a83860c2SRalf Baechle	select CSRC_R4K
1228a83860c2SRalf Baechle	select DMA_NONCOHERENT
122967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1230a83860c2SRalf Baechle	select SWAP_IO_SPACE
1231a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1232a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1233a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1234a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1235a83860c2SRalf Baechle
1236edb6310aSDaniel Lairdconfig SOC_PNX833X
1237edb6310aSDaniel Laird	bool
1238edb6310aSDaniel Laird	select CEVT_R4K
1239edb6310aSDaniel Laird	select CSRC_R4K
124067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1241edb6310aSDaniel Laird	select DMA_NONCOHERENT
1242edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1243edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1244edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1245edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1246377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1247edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1248edb6310aSDaniel Laird
1249edb6310aSDaniel Lairdconfig SOC_PNX8335
1250edb6310aSDaniel Laird	bool
1251edb6310aSDaniel Laird	select SOC_PNX833X
1252edb6310aSDaniel Laird
1253a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1254a7e07b1aSMarkos Chandras	bool
1255a7e07b1aSMarkos Chandras
12561da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
12571da177e4SLinus Torvalds	bool
12581da177e4SLinus Torvalds
1259e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1260e2defae5SThomas Bogendoerfer	bool
1261e2defae5SThomas Bogendoerfer
12625b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
12635b438c44SThomas Bogendoerfer	bool
12645b438c44SThomas Bogendoerfer
1265e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1266e2defae5SThomas Bogendoerfer	bool
1267e2defae5SThomas Bogendoerfer
1268e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1269e2defae5SThomas Bogendoerfer	bool
1270e2defae5SThomas Bogendoerfer
1271e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1272e2defae5SThomas Bogendoerfer	bool
1273e2defae5SThomas Bogendoerfer
1274e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1275e2defae5SThomas Bogendoerfer	bool
1276e2defae5SThomas Bogendoerfer
1277e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1278e2defae5SThomas Bogendoerfer	bool
1279e2defae5SThomas Bogendoerfer
12800e2794b0SRalf Baechleconfig FW_ARC32
12815e83d430SRalf Baechle	bool
12825e83d430SRalf Baechle
1283aaa9fad3SPaul Bolleconfig FW_SNIPROM
1284231a35d3SThomas Bogendoerfer	bool
1285231a35d3SThomas Bogendoerfer
12861da177e4SLinus Torvaldsconfig BOOT_ELF32
12871da177e4SLinus Torvalds	bool
12881da177e4SLinus Torvalds
1289930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1290930beb5aSFlorian Fainelli	bool
1291930beb5aSFlorian Fainelli
1292930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1293930beb5aSFlorian Fainelli	bool
1294930beb5aSFlorian Fainelli
1295930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1296930beb5aSFlorian Fainelli	bool
1297930beb5aSFlorian Fainelli
1298930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1299930beb5aSFlorian Fainelli	bool
1300930beb5aSFlorian Fainelli
13011da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
13021da177e4SLinus Torvalds	int
1303a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
13045432eeb6SKevin Cernekee	default "6" if MIPS_L1_CACHE_SHIFT_6
13055432eeb6SKevin Cernekee	default "5" if MIPS_L1_CACHE_SHIFT_5
13065432eeb6SKevin Cernekee	default "4" if MIPS_L1_CACHE_SHIFT_4
13071da177e4SLinus Torvalds	default "5"
13081da177e4SLinus Torvalds
13091da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
13101da177e4SLinus Torvalds	bool
13111da177e4SLinus Torvalds
13121da177e4SLinus Torvaldsconfig ARC_CONSOLE
13131da177e4SLinus Torvalds	bool "ARC console support"
1314e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
13151da177e4SLinus Torvalds
13161da177e4SLinus Torvaldsconfig ARC_MEMORY
13171da177e4SLinus Torvalds	bool
131814b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
13191da177e4SLinus Torvalds	default y
13201da177e4SLinus Torvalds
13211da177e4SLinus Torvaldsconfig ARC_PROMLIB
13221da177e4SLinus Torvalds	bool
1323e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
13241da177e4SLinus Torvalds	default y
13251da177e4SLinus Torvalds
13260e2794b0SRalf Baechleconfig FW_ARC64
13271da177e4SLinus Torvalds	bool
13281da177e4SLinus Torvalds
13291da177e4SLinus Torvaldsconfig BOOT_ELF64
13301da177e4SLinus Torvalds	bool
13311da177e4SLinus Torvalds
13321da177e4SLinus Torvaldsmenu "CPU selection"
13331da177e4SLinus Torvalds
13341da177e4SLinus Torvaldschoice
13351da177e4SLinus Torvalds	prompt "CPU type"
13361da177e4SLinus Torvalds	default CPU_R4X00
13371da177e4SLinus Torvalds
13380e476d91SHuacai Chenconfig CPU_LOONGSON3
13390e476d91SHuacai Chen	bool "Loongson 3 CPU"
13400e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
13410e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
13420e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
13430e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
13440e476d91SHuacai Chen	select WEAK_ORDERING
13450e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
1346cbfb3ea7SHuacai Chen	select ARCH_REQUIRE_GPIOLIB
13470e476d91SHuacai Chen	help
13480e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
13490e476d91SHuacai Chen		set with many extensions.
13500e476d91SHuacai Chen
13513702bba5SWu Zhangjinconfig CPU_LOONGSON2E
13523702bba5SWu Zhangjin	bool "Loongson 2E"
13533702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
13543702bba5SWu Zhangjin	select CPU_LOONGSON2
13552a21c730SFuxin Zhang	help
13562a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
13572a21c730SFuxin Zhang	  with many extensions.
13582a21c730SFuxin Zhang
135925985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
13606f7a251aSWu Zhangjin	  bonito64.
13616f7a251aSWu Zhangjin
13626f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
13636f7a251aSWu Zhangjin	bool "Loongson 2F"
13646f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
13656f7a251aSWu Zhangjin	select CPU_LOONGSON2
1366c197da91SArnaud Patard	select ARCH_REQUIRE_GPIOLIB
13676f7a251aSWu Zhangjin	help
13686f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
13696f7a251aSWu Zhangjin	  with many extensions.
13706f7a251aSWu Zhangjin
13716f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
13726f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
13736f7a251aSWu Zhangjin	  Loongson2E.
13746f7a251aSWu Zhangjin
1375ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1376ca585cf9SKelvin Cheung	bool "Loongson 1B"
1377ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1378ca585cf9SKelvin Cheung	select CPU_LOONGSON1
1379ca585cf9SKelvin Cheung	help
1380ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1381ca585cf9SKelvin Cheung	  release 2 instruction set.
1382ca585cf9SKelvin Cheung
13836e760c8dSRalf Baechleconfig CPU_MIPS32_R1
13846e760c8dSRalf Baechle	bool "MIPS32 Release 1"
13857cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
13866e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1387797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1388ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
13896e760c8dSRalf Baechle	help
13905e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
13911e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
13921e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
13931e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
13941e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
13951e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
13961e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
13971e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
13981e5f1caaSRalf Baechle	  performance.
13991e5f1caaSRalf Baechle
14001e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
14011e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
14027cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
14031e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1404797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1405ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1406a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14072235a54dSSanjay Lal	select HAVE_KVM
14081e5f1caaSRalf Baechle	help
14095e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14106e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
14116e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
14126e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14136e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
14141da177e4SLinus Torvalds
14157fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
1416674d10e2SMarkos Chandras	bool "MIPS32 Release 6"
14177fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
14187fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14197fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14207fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14217fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14224e0748f5SMarkos Chandras	select GENERIC_CSUM
14237fd08ca5SLeonid Yegoshin	select HAVE_KVM
14247fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
14257fd08ca5SLeonid Yegoshin	help
14267fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14277fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
14287fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
14297fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
14307fd08ca5SLeonid Yegoshin
14316e760c8dSRalf Baechleconfig CPU_MIPS64_R1
14326e760c8dSRalf Baechle	bool "MIPS64 Release 1"
14337cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1434797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1435ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1436ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1437ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14389cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
14396e760c8dSRalf Baechle	help
14406e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
14416e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14426e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14436e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14446e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14451e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
14461e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
14471e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
14481e5f1caaSRalf Baechle	  performance.
14491e5f1caaSRalf Baechle
14501e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
14511e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
14527cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1453797798c1SRalf Baechle	select CPU_HAS_PREFETCH
14541e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
14551e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1456ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14579cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1458a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14591e5f1caaSRalf Baechle	help
14601e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14611e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14621e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14631e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
14641e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14651da177e4SLinus Torvalds
14667fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
1467674d10e2SMarkos Chandras	bool "MIPS64 Release 6"
14687fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
14697fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14707fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14717fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
14727fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14737fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14744e0748f5SMarkos Chandras	select GENERIC_CSUM
14754e9d324dSPaul Burton	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
14767fd08ca5SLeonid Yegoshin	help
14777fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14787fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
14797fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
14807fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
14817fd08ca5SLeonid Yegoshin
14821da177e4SLinus Torvaldsconfig CPU_R3000
14831da177e4SLinus Torvalds	bool "R3000"
14847cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1485f7062ddbSRalf Baechle	select CPU_HAS_WB
1486ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1487797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14881da177e4SLinus Torvalds	help
14891da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
14901da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
14911da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
14921da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
14931da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
14941da177e4SLinus Torvalds	  try to recompile with R3000.
14951da177e4SLinus Torvalds
14961da177e4SLinus Torvaldsconfig CPU_TX39XX
14971da177e4SLinus Torvalds	bool "R39XX"
14987cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1499ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
15001da177e4SLinus Torvalds
15011da177e4SLinus Torvaldsconfig CPU_VR41XX
15021da177e4SLinus Torvalds	bool "R41xx"
15037cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1504ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1505ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15061da177e4SLinus Torvalds	help
15075e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
15081da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
15091da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
15101da177e4SLinus Torvalds	  processor or vice versa.
15111da177e4SLinus Torvalds
15121da177e4SLinus Torvaldsconfig CPU_R4300
15131da177e4SLinus Torvalds	bool "R4300"
15147cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1515ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1516ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15171da177e4SLinus Torvalds	help
15181da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
15191da177e4SLinus Torvalds
15201da177e4SLinus Torvaldsconfig CPU_R4X00
15211da177e4SLinus Torvalds	bool "R4x00"
15227cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1523ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1524ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1525970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15261da177e4SLinus Torvalds	help
15271da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
15281da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
15291da177e4SLinus Torvalds
15301da177e4SLinus Torvaldsconfig CPU_TX49XX
15311da177e4SLinus Torvalds	bool "R49XX"
15327cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1533de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1534ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1535ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1536970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15371da177e4SLinus Torvalds
15381da177e4SLinus Torvaldsconfig CPU_R5000
15391da177e4SLinus Torvalds	bool "R5000"
15407cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1541ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1542ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1543970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15441da177e4SLinus Torvalds	help
15451da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
15461da177e4SLinus Torvalds
15471da177e4SLinus Torvaldsconfig CPU_R5432
15481da177e4SLinus Torvalds	bool "R5432"
15497cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
15505e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
15515e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1552970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15531da177e4SLinus Torvalds
1554542c1020SShinya Kuribayashiconfig CPU_R5500
1555542c1020SShinya Kuribayashi	bool "R5500"
1556542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1557542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1558542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
15599cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1560542c1020SShinya Kuribayashi	help
1561542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1562542c1020SShinya Kuribayashi	  instruction set.
1563542c1020SShinya Kuribayashi
15641da177e4SLinus Torvaldsconfig CPU_R6000
15651da177e4SLinus Torvalds	bool "R6000"
15667cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1567ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
15681da177e4SLinus Torvalds	help
15691da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1570c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
15711da177e4SLinus Torvalds
15721da177e4SLinus Torvaldsconfig CPU_NEVADA
15731da177e4SLinus Torvalds	bool "RM52xx"
15747cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1575ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1576ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1577970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15781da177e4SLinus Torvalds	help
15791da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
15801da177e4SLinus Torvalds
15811da177e4SLinus Torvaldsconfig CPU_R8000
15821da177e4SLinus Torvalds	bool "R8000"
15837cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
15845e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1585ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15861da177e4SLinus Torvalds	help
15871da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
15881da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
15891da177e4SLinus Torvalds
15901da177e4SLinus Torvaldsconfig CPU_R10000
15911da177e4SLinus Torvalds	bool "R10000"
15927cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
15935e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1594ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1595ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1596797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1597970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15981da177e4SLinus Torvalds	help
15991da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
16001da177e4SLinus Torvalds
16011da177e4SLinus Torvaldsconfig CPU_RM7000
16021da177e4SLinus Torvalds	bool "RM7000"
16037cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
16045e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1605ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1606ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1607797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1608970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16091da177e4SLinus Torvalds
16101da177e4SLinus Torvaldsconfig CPU_SB1
16111da177e4SLinus Torvalds	bool "SB1"
16127cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1613ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1614ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1615797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1616970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16170004a9dfSRalf Baechle	select WEAK_ORDERING
16181da177e4SLinus Torvalds
1619a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1620a86c7f72SDavid Daney	bool "Cavium Octeon processor"
16215e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1622a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1623a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1624a86c7f72SDavid Daney	select WEAK_ORDERING
1625a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
16269cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1627df115f3eSBen Hutchings	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1628df115f3eSBen Hutchings	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1629930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
1630a86c7f72SDavid Daney	help
1631a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1632a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1633a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1634a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1635a86c7f72SDavid Daney
1636cd746249SJonas Gorskiconfig CPU_BMIPS
1637cd746249SJonas Gorski	bool "Broadcom BMIPS"
1638cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1639cd746249SJonas Gorski	select CPU_MIPS32
1640fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1641cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1642cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1643cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1644cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1645cd746249SJonas Gorski	select DMA_NONCOHERENT
164667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1647cd746249SJonas Gorski	select SWAP_IO_SPACE
1648cd746249SJonas Gorski	select WEAK_ORDERING
1649c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
165069aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1651c1c0c461SKevin Cernekee	help
1652fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1653c1c0c461SKevin Cernekee
16547f058e85SJayachandran Cconfig CPU_XLR
16557f058e85SJayachandran C	bool "Netlogic XLR SoC"
16567f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
16577f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16587f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16597f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1660970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16617f058e85SJayachandran C	select WEAK_ORDERING
16627f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16637f058e85SJayachandran C	help
16647f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
16651c773ea4SJayachandran C
16661c773ea4SJayachandran Cconfig CPU_XLP
16671c773ea4SJayachandran C	bool "Netlogic XLP SoC"
16681c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
16691c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16701c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16711c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
16721c773ea4SJayachandran C	select WEAK_ORDERING
16731c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16741c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1675d6504846SJayachandran C	select CPU_MIPSR2
1676ddba6833SPrem Mallappa	select CPU_SUPPORTS_HUGEPAGES
16771c773ea4SJayachandran C	help
16781c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
16791da177e4SLinus Torvaldsendchoice
16801da177e4SLinus Torvalds
1681a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1682a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1683a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
16847fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1685a6e18781SLeonid Yegoshin	help
1686a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1687a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1688a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1689a6e18781SLeonid Yegoshin
1690a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1691a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1692a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1693a6e18781SLeonid Yegoshin	select EVA
1694a6e18781SLeonid Yegoshin	default y
1695a6e18781SLeonid Yegoshin	help
1696a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1697a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1698a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1699a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1700a6e18781SLeonid Yegoshin
1701c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES
1702c5b36783SSteven J. Hill	bool "MIPS32 Release 5 Features"
1703c5b36783SSteven J. Hill	depends on SYS_HAS_CPU_MIPS32_R5
1704c5b36783SSteven J. Hill	depends on CPU_MIPS32_R2
1705c5b36783SSteven J. Hill	help
1706c5b36783SSteven J. Hill	  Choose this option to build a kernel for release 2 or later of the
1707c5b36783SSteven J. Hill	  MIPS32 architecture including features from release 5 such as
1708c5b36783SSteven J. Hill	  support for Extended Physical Addressing (XPA).
1709c5b36783SSteven J. Hill
1710c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA
1711c5b36783SSteven J. Hill	bool "Extended Physical Addressing (XPA)"
1712c5b36783SSteven J. Hill	depends on CPU_MIPS32_R5_FEATURES
1713c5b36783SSteven J. Hill	depends on !EVA
1714c5b36783SSteven J. Hill	depends on !PAGE_SIZE_4KB
1715c5b36783SSteven J. Hill	depends on SYS_SUPPORTS_HIGHMEM
1716c5b36783SSteven J. Hill	select XPA
1717c5b36783SSteven J. Hill	select HIGHMEM
1718c5b36783SSteven J. Hill	select ARCH_PHYS_ADDR_T_64BIT
1719c5b36783SSteven J. Hill	default n
1720c5b36783SSteven J. Hill	help
1721c5b36783SSteven J. Hill	  Choose this option if you want to enable the Extended Physical
1722c5b36783SSteven J. Hill	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1723c5b36783SSteven J. Hill	  benefit is to increase physical addressing equal to or greater
1724c5b36783SSteven J. Hill	  than 40 bits. Note that this has the side effect of turning on
1725c5b36783SSteven J. Hill	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1726c5b36783SSteven J. Hill	  If unsure, say 'N' here.
1727c5b36783SSteven J. Hill
1728622844bfSWu Zhangjinif CPU_LOONGSON2F
1729622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1730622844bfSWu Zhangjin	bool
1731622844bfSWu Zhangjin
1732622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1733622844bfSWu Zhangjin	bool
1734622844bfSWu Zhangjin
1735622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1736622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1737622844bfSWu Zhangjin	default y
1738622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1739622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1740622844bfSWu Zhangjin	help
1741622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1742622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1743622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1744622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1745622844bfSWu Zhangjin
1746622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1747622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1748622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1749622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1750622844bfSWu Zhangjin	  systems.
1751622844bfSWu Zhangjin
1752622844bfSWu Zhangjin	  If unsure, please say Y.
1753622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1754622844bfSWu Zhangjin
17551b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
17561b93b3c3SWu Zhangjin	bool
17571b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
17581b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
175931c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
17601b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1761fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
17624e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
17631b93b3c3SWu Zhangjin
17641b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
17651b93b3c3SWu Zhangjin	bool
17661b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
17671b93b3c3SWu Zhangjin
1768dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM
1769dbb98314SAlban Bedel	bool
1770dbb98314SAlban Bedel	select SYS_SUPPORTS_ZBOOT
1771dbb98314SAlban Bedel
17723702bba5SWu Zhangjinconfig CPU_LOONGSON2
17733702bba5SWu Zhangjin	bool
17743702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
17753702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
17763702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1777970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17783702bba5SWu Zhangjin
1779ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1780ca585cf9SKelvin Cheung	bool
1781ca585cf9SKelvin Cheung	select CPU_MIPS32
1782ca585cf9SKelvin Cheung	select CPU_MIPSR2
1783ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1784ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1785ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1786f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1787ca585cf9SKelvin Cheung
1788fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
178904fa8bf7SJonas Gorski	select SMP_UP if SMP
17901bbb6c1bSKevin Cernekee	bool
1791cd746249SJonas Gorski
1792cd746249SJonas Gorskiconfig CPU_BMIPS4350
1793cd746249SJonas Gorski	bool
1794cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1795cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1796cd746249SJonas Gorski
1797cd746249SJonas Gorskiconfig CPU_BMIPS4380
1798cd746249SJonas Gorski	bool
1799bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1800cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1801cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1802cd746249SJonas Gorski
1803cd746249SJonas Gorskiconfig CPU_BMIPS5000
1804cd746249SJonas Gorski	bool
1805cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1806bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1807cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1808cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
18091bbb6c1bSKevin Cernekee
18100e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
18110e476d91SHuacai Chen	bool
18120e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
18130e476d91SHuacai Chen
18143702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
18152a21c730SFuxin Zhang	bool
18162a21c730SFuxin Zhang
18176f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
18186f7a251aSWu Zhangjin	bool
181955045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
182055045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
182122f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
18226f7a251aSWu Zhangjin
1823ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1824ca585cf9SKelvin Cheung	bool
1825ca585cf9SKelvin Cheung
18267cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
18277cf8053bSRalf Baechle	bool
18287cf8053bSRalf Baechle
18297cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
18307cf8053bSRalf Baechle	bool
18317cf8053bSRalf Baechle
1832a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1833a6e18781SLeonid Yegoshin	bool
1834a6e18781SLeonid Yegoshin
1835c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5
1836c5b36783SSteven J. Hill	bool
1837c5b36783SSteven J. Hill
18387fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
18397fd08ca5SLeonid Yegoshin	bool
18407fd08ca5SLeonid Yegoshin
18417cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
18427cf8053bSRalf Baechle	bool
18437cf8053bSRalf Baechle
18447cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
18457cf8053bSRalf Baechle	bool
18467cf8053bSRalf Baechle
18477fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
18487fd08ca5SLeonid Yegoshin	bool
18497fd08ca5SLeonid Yegoshin
18507cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
18517cf8053bSRalf Baechle	bool
18527cf8053bSRalf Baechle
18537cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
18547cf8053bSRalf Baechle	bool
18557cf8053bSRalf Baechle
18567cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
18577cf8053bSRalf Baechle	bool
18587cf8053bSRalf Baechle
18597cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
18607cf8053bSRalf Baechle	bool
18617cf8053bSRalf Baechle
18627cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
18637cf8053bSRalf Baechle	bool
18647cf8053bSRalf Baechle
18657cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
18667cf8053bSRalf Baechle	bool
18677cf8053bSRalf Baechle
18687cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
18697cf8053bSRalf Baechle	bool
18707cf8053bSRalf Baechle
18717cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
18727cf8053bSRalf Baechle	bool
18737cf8053bSRalf Baechle
1874542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1875542c1020SShinya Kuribayashi	bool
1876542c1020SShinya Kuribayashi
18777cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
18787cf8053bSRalf Baechle	bool
18797cf8053bSRalf Baechle
18807cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
18817cf8053bSRalf Baechle	bool
18827cf8053bSRalf Baechle
18837cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
18847cf8053bSRalf Baechle	bool
18857cf8053bSRalf Baechle
18867cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
18877cf8053bSRalf Baechle	bool
18887cf8053bSRalf Baechle
18897cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
18907cf8053bSRalf Baechle	bool
18917cf8053bSRalf Baechle
18927cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
18937cf8053bSRalf Baechle	bool
18947cf8053bSRalf Baechle
18955e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
18965e683389SDavid Daney	bool
18975e683389SDavid Daney
1898cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1899c1c0c461SKevin Cernekee	bool
1900c1c0c461SKevin Cernekee
1901fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1902c1c0c461SKevin Cernekee	bool
1903cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1904c1c0c461SKevin Cernekee
1905c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1906c1c0c461SKevin Cernekee	bool
1907cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1908c1c0c461SKevin Cernekee
1909c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1910c1c0c461SKevin Cernekee	bool
1911cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1912c1c0c461SKevin Cernekee
1913c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1914c1c0c461SKevin Cernekee	bool
1915cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1916c1c0c461SKevin Cernekee
19177f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
19187f058e85SJayachandran C	bool
19197f058e85SJayachandran C
19201c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
19211c773ea4SJayachandran C	bool
19221c773ea4SJayachandran C
1923b6911bbaSPaul Burtonconfig MIPS_MALTA_PM
1924b6911bbaSPaul Burton	depends on MIPS_MALTA
1925b6911bbaSPaul Burton	depends on PCI
1926b6911bbaSPaul Burton	bool
1927b6911bbaSPaul Burton	default y
1928b6911bbaSPaul Burton
192917099b11SRalf Baechle#
193017099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
193117099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
193217099b11SRalf Baechle#
19330004a9dfSRalf Baechleconfig WEAK_ORDERING
19340004a9dfSRalf Baechle	bool
193517099b11SRalf Baechle
193617099b11SRalf Baechle#
193717099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
193817099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
193917099b11SRalf Baechle#
194017099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
194117099b11SRalf Baechle	bool
19425e83d430SRalf Baechleendmenu
19435e83d430SRalf Baechle
19445e83d430SRalf Baechle#
19455e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
19465e83d430SRalf Baechle#
19475e83d430SRalf Baechleconfig CPU_MIPS32
19485e83d430SRalf Baechle	bool
19497fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
19505e83d430SRalf Baechle
19515e83d430SRalf Baechleconfig CPU_MIPS64
19525e83d430SRalf Baechle	bool
19537fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
19545e83d430SRalf Baechle
19555e83d430SRalf Baechle#
1956c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
19575e83d430SRalf Baechle#
19585e83d430SRalf Baechleconfig CPU_MIPSR1
19595e83d430SRalf Baechle	bool
19605e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
19615e83d430SRalf Baechle
19625e83d430SRalf Baechleconfig CPU_MIPSR2
19635e83d430SRalf Baechle	bool
1964a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1965a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19665e83d430SRalf Baechle
19677fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
19687fd08ca5SLeonid Yegoshin	bool
19697fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1970a7e07b1aSMarkos Chandras	select MIPS_SPRAM
19715e83d430SRalf Baechle
1972a6e18781SLeonid Yegoshinconfig EVA
1973a6e18781SLeonid Yegoshin	bool
1974a6e18781SLeonid Yegoshin
1975c5b36783SSteven J. Hillconfig XPA
1976c5b36783SSteven J. Hill	bool
1977c5b36783SSteven J. Hill
19785e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
19795e83d430SRalf Baechle	bool
19805e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
19815e83d430SRalf Baechle	bool
19825e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
19835e83d430SRalf Baechle	bool
19845e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
19855e83d430SRalf Baechle	bool
198655045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
198755045ff5SWu Zhangjin	bool
198855045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
198955045ff5SWu Zhangjin	bool
19909cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
19919cffd154SDavid Daney	bool
199222f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
199322f1fdfdSWu Zhangjin	bool
199482622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
199582622284SDavid Daney	bool
1996d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
19975e83d430SRalf Baechle
19988192c9eaSDavid Daney#
19998192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
20008192c9eaSDavid Daney#
20018192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
20028192c9eaSDavid Daney       bool
2003679eb637SJames Hogan       default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
20048192c9eaSDavid Daney
20055e83d430SRalf Baechlemenu "Kernel type"
20065e83d430SRalf Baechle
20075e83d430SRalf Baechlechoice
20085e83d430SRalf Baechle	prompt "Kernel code model"
20095e83d430SRalf Baechle	help
20105e83d430SRalf Baechle	  You should only select this option if you have a workload that
20115e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
20125e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
20135e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
20145e83d430SRalf Baechle
20155e83d430SRalf Baechleconfig 32BIT
20165e83d430SRalf Baechle	bool "32-bit kernel"
20175e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
20185e83d430SRalf Baechle	select TRAD_SIGNALS
20195e83d430SRalf Baechle	help
20205e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
2021f17c4ca3SRalf Baechle
20225e83d430SRalf Baechleconfig 64BIT
20235e83d430SRalf Baechle	bool "64-bit kernel"
20245e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
20255e83d430SRalf Baechle	help
20265e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
20275e83d430SRalf Baechle
20285e83d430SRalf Baechleendchoice
20295e83d430SRalf Baechle
20302235a54dSSanjay Lalconfig KVM_GUEST
20312235a54dSSanjay Lal	bool "KVM Guest Kernel"
2032f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
20332235a54dSSanjay Lal	help
2034caa1faa7SJames Hogan	  Select this option if building a guest kernel for KVM (Trap & Emulate)
2035caa1faa7SJames Hogan	  mode.
20362235a54dSSanjay Lal
2037eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
2038eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
20392235a54dSSanjay Lal	depends on KVM_GUEST
2040eda3d33cSJames Hogan	default 100
20412235a54dSSanjay Lal	help
2042eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
2043eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
2044eda3d33cSJames Hogan	  timer frequency is specified directly.
20452235a54dSSanjay Lal
20461da177e4SLinus Torvaldschoice
20471da177e4SLinus Torvalds	prompt "Kernel page size"
20481da177e4SLinus Torvalds	default PAGE_SIZE_4KB
20491da177e4SLinus Torvalds
20501da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
20511da177e4SLinus Torvalds	bool "4kB"
20520e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
20531da177e4SLinus Torvalds	help
20541da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
20551da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
20561da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
20571da177e4SLinus Torvalds	 recommended for low memory systems.
20581da177e4SLinus Torvalds
20591da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
20601da177e4SLinus Torvalds	bool "8kB"
20617d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
20621da177e4SLinus Torvalds	help
20631da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
20641da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
2065c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
2066c52399beSRalf Baechle	  suitable Linux distribution to support this.
20671da177e4SLinus Torvalds
20681da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
20691da177e4SLinus Torvalds	bool "16kB"
2070714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
20711da177e4SLinus Torvalds	help
20721da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
20731da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
2074714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
2075714bfad6SRalf Baechle	  Linux distribution to support this.
20761da177e4SLinus Torvalds
2077c52399beSRalf Baechleconfig PAGE_SIZE_32KB
2078c52399beSRalf Baechle	bool "32kB"
2079c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
2080c52399beSRalf Baechle	help
2081c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
2082c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
2083c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
2084c52399beSRalf Baechle	  distribution to support this.
2085c52399beSRalf Baechle
20861da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
20871da177e4SLinus Torvalds	bool "64kB"
208874c81ecdSRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
20891da177e4SLinus Torvalds	help
20901da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
20911da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
20921da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
2093714bfad6SRalf Baechle	  writing this option is still high experimental.
20941da177e4SLinus Torvalds
20951da177e4SLinus Torvaldsendchoice
20961da177e4SLinus Torvalds
2097c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
2098c9bace7cSDavid Daney	int "Maximum zone order"
2099e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2100e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2101e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2102e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2103e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2104e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2105c9bace7cSDavid Daney	range 11 64
2106c9bace7cSDavid Daney	default "11"
2107c9bace7cSDavid Daney	help
2108c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
2109c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
2110c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
2111c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2112c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2113c9bace7cSDavid Daney	  increase this value.
2114c9bace7cSDavid Daney
2115c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2116c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2117c9bace7cSDavid Daney
2118c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2119c9bace7cSDavid Daney	  when choosing a value for this option.
2120c9bace7cSDavid Daney
21211da177e4SLinus Torvaldsconfig BOARD_SCACHE
21221da177e4SLinus Torvalds	bool
21231da177e4SLinus Torvalds
21241da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
21251da177e4SLinus Torvalds	bool
21261da177e4SLinus Torvalds	select BOARD_SCACHE
21271da177e4SLinus Torvalds
21289318c51aSChris Dearman#
21299318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
21309318c51aSChris Dearman#
21319318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
21329318c51aSChris Dearman	bool
21339318c51aSChris Dearman	select BOARD_SCACHE
21349318c51aSChris Dearman
21351da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
21361da177e4SLinus Torvalds	bool
21371da177e4SLinus Torvalds	select BOARD_SCACHE
21381da177e4SLinus Torvalds
21391da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
21401da177e4SLinus Torvalds	bool
21411da177e4SLinus Torvalds	select BOARD_SCACHE
21421da177e4SLinus Torvalds
21431da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
21441da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
21451da177e4SLinus Torvalds	depends on CPU_SB1
21461da177e4SLinus Torvalds	help
21471da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
21481da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
21491da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
21501da177e4SLinus Torvalds
21511da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2152c8094b53SRalf Baechle	bool
21531da177e4SLinus Torvalds
21543165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
21553165c846SFlorian Fainelli	bool
21563165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
21573165c846SFlorian Fainelli
215891405eb6SFlorian Fainelliconfig CPU_R4K_FPU
215991405eb6SFlorian Fainelli	bool
216091405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
216191405eb6SFlorian Fainelli
216262cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
216362cedc4fSFlorian Fainelli	bool
216462cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
216562cedc4fSFlorian Fainelli
216659d6ab86SRalf Baechleconfig MIPS_MT_SMP
2167a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
21685676319cSMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
216959d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2170d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2171c080faa5SSteven J. Hill	select SYNC_R4K
217259d6ab86SRalf Baechle	select MIPS_MT
217359d6ab86SRalf Baechle	select SMP
217487353d8aSRalf Baechle	select SMP_UP
2175c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2176c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2177399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
217859d6ab86SRalf Baechle	help
2179c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2180c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2181c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2182c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2183c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
218459d6ab86SRalf Baechle
2185f41ae0b2SRalf Baechleconfig MIPS_MT
2186f41ae0b2SRalf Baechle	bool
2187f41ae0b2SRalf Baechle
21880ab7aefcSRalf Baechleconfig SCHED_SMT
21890ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
21900ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
21910ab7aefcSRalf Baechle	default n
21920ab7aefcSRalf Baechle	help
21930ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
21940ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
21950ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
21960ab7aefcSRalf Baechle
21970ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
21980ab7aefcSRalf Baechle	bool
21990ab7aefcSRalf Baechle
2200f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2201f41ae0b2SRalf Baechle	bool
2202f41ae0b2SRalf Baechle
2203f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2204f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2205f088fc84SRalf Baechle	default y
2206b633648cSRalf Baechle	depends on MIPS_MT_SMP
220707cc0c9eSRalf Baechle
2208b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2209b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
2210b0a668fbSLeonid Yegoshin	depends on CPU_MIPSR6 && !SMP
2211b0a668fbSLeonid Yegoshin	default y
2212b0a668fbSLeonid Yegoshin	help
2213b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2214b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
221507edf0d4SMarkos Chandras	  default. You can enable it using the 'mipsr2emu' kernel option.
2216b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2217b0a668fbSLeonid Yegoshin	  final kernel image.
2218b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels"
2219b0a668fbSLeonid Yegoshin	depends on SMP && CPU_MIPSR6
2220b0a668fbSLeonid Yegoshin
222107cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
222207cc0c9eSRalf Baechle	bool "VPE loader support."
2223704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
222407cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
222507cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
222607cc0c9eSRalf Baechle	select MIPS_MT
222707cc0c9eSRalf Baechle	help
222807cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
222907cc0c9eSRalf Baechle	  onto another VPE and running it.
2230f088fc84SRalf Baechle
223117a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
223217a1d523SDeng-Cheng Zhu	bool
223317a1d523SDeng-Cheng Zhu	default "y"
223417a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
223517a1d523SDeng-Cheng Zhu
22361a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
22371a2a6d7eSDeng-Cheng Zhu	bool
22381a2a6d7eSDeng-Cheng Zhu	default "y"
22391a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
22401a2a6d7eSDeng-Cheng Zhu
2241e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2242e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2243e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2244e01402b1SRalf Baechle	default y
2245e01402b1SRalf Baechle	help
2246e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2247e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2248e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2249e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2250e01402b1SRalf Baechle
2251e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2252e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2253e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
22545e83d430SRalf Baechle	help
2255e01402b1SRalf Baechle
2256da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2257da615cf6SDeng-Cheng Zhu	bool
2258da615cf6SDeng-Cheng Zhu	default "y"
2259da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2260da615cf6SDeng-Cheng Zhu
22612c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
22622c973ef0SDeng-Cheng Zhu	bool
22632c973ef0SDeng-Cheng Zhu	default "y"
22642c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
22652c973ef0SDeng-Cheng Zhu
22664a16ff4cSRalf Baechleconfig MIPS_CMP
22675cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
22685676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2269b10b43baSMarkos Chandras	select SMP
2270eb9b5141STim Anderson	select SYNC_R4K
2271b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
22724a16ff4cSRalf Baechle	select WEAK_ORDERING
22734a16ff4cSRalf Baechle	default n
22744a16ff4cSRalf Baechle	help
2275044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2276044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2277044505c7SPaul Burton	  its ability to start secondary CPUs.
22784a16ff4cSRalf Baechle
22795cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
22805cac93b3SPaul Burton	  instead of this.
22815cac93b3SPaul Burton
22820ee958e1SPaul Burtonconfig MIPS_CPS
22830ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
22845676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CPS && !CPU_MIPSR6
22850ee958e1SPaul Burton	select MIPS_CM
22860ee958e1SPaul Burton	select MIPS_CPC
22871d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
22880ee958e1SPaul Burton	select SMP
22890ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
22901d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
22910ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
22920ee958e1SPaul Burton	select WEAK_ORDERING
22930ee958e1SPaul Burton	help
22940ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
22950ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
22960ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
22970ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
22980ee958e1SPaul Burton	  support is unavailable.
22990ee958e1SPaul Burton
23003179d37eSPaul Burtonconfig MIPS_CPS_PM
230139a59593SMarkos Chandras	depends on MIPS_CPS
2302a8b84677SPaul Burton	select MIPS_CPC
23033179d37eSPaul Burton	bool
23043179d37eSPaul Burton
23059f98f3ddSPaul Burtonconfig MIPS_CM
23069f98f3ddSPaul Burton	bool
23079f98f3ddSPaul Burton
23089c38cf44SPaul Burtonconfig MIPS_CPC
23099c38cf44SPaul Burton	bool
23102600990eSRalf Baechle
23111da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
23121da177e4SLinus Torvalds	bool
23131da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
23141da177e4SLinus Torvalds	default y
23151da177e4SLinus Torvalds
23161da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
23171da177e4SLinus Torvalds	bool
23181da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
23191da177e4SLinus Torvalds	default y
23201da177e4SLinus Torvalds
23212235a54dSSanjay Lal
232260ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
232334adb28dSRalf Baechle       bool
232460ec6571Spascal@pabr.org
23259e2b5372SMarkos Chandraschoice
23269e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
23279e2b5372SMarkos Chandras
23289e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
23299e2b5372SMarkos Chandras	bool "None"
23309e2b5372SMarkos Chandras	help
23319e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
23329e2b5372SMarkos Chandras
23339693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
23349693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
23359e2b5372SMarkos Chandras	bool "SmartMIPS"
23369693a853SFranck Bui-Huu	help
23379693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
23389693a853SFranck Bui-Huu	  increased security at both hardware and software level for
23399693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
23409693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
23419693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
23429693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
23439693a853SFranck Bui-Huu	  here.
23449693a853SFranck Bui-Huu
2345bce86083SSteven J. Hillconfig CPU_MICROMIPS
23467fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
23479e2b5372SMarkos Chandras	bool "microMIPS"
2348bce86083SSteven J. Hill	help
2349bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2350bce86083SSteven J. Hill	  microMIPS ISA
2351bce86083SSteven J. Hill
23529e2b5372SMarkos Chandrasendchoice
23539e2b5372SMarkos Chandras
2354a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
23550ce3417eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2356a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
23572a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2358a5e9a69eSPaul Burton	help
2359a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2360a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
23611db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
23621db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
23631db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
23641db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
23651db1af84SPaul Burton	  the size & complexity of your kernel.
2366a5e9a69eSPaul Burton
2367a5e9a69eSPaul Burton	  If unsure, say Y.
2368a5e9a69eSPaul Burton
23691da177e4SLinus Torvaldsconfig CPU_HAS_WB
2370f7062ddbSRalf Baechle	bool
2371e01402b1SRalf Baechle
2372df0ac8a4SKevin Cernekeeconfig XKS01
2373df0ac8a4SKevin Cernekee	bool
2374df0ac8a4SKevin Cernekee
2375f41ae0b2SRalf Baechle#
2376f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2377f41ae0b2SRalf Baechle#
2378e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2379f41ae0b2SRalf Baechle	bool
2380e01402b1SRalf Baechle
2381f41ae0b2SRalf Baechle#
2382f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2383f41ae0b2SRalf Baechle#
2384e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2385f41ae0b2SRalf Baechle	bool
2386e01402b1SRalf Baechle
23871da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
23881da177e4SLinus Torvalds	bool
23891da177e4SLinus Torvalds	depends on !CPU_R3000
23901da177e4SLinus Torvalds	default y
23911da177e4SLinus Torvalds
23921da177e4SLinus Torvalds#
239320d60d99SMaciej W. Rozycki# CPU non-features
239420d60d99SMaciej W. Rozycki#
239520d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
239620d60d99SMaciej W. Rozycki	bool
239720d60d99SMaciej W. Rozycki
239820d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
239920d60d99SMaciej W. Rozycki	bool
240020d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
240120d60d99SMaciej W. Rozycki
240220d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
240320d60d99SMaciej W. Rozycki	bool
240420d60d99SMaciej W. Rozycki
240520d60d99SMaciej W. Rozycki#
24061da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
24071da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
24081da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
24091da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
24101da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
24111da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
24121da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
24131da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2414797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2415797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2416797798c1SRalf Baechle#   support.
24171da177e4SLinus Torvalds#
24181da177e4SLinus Torvaldsconfig HIGHMEM
24191da177e4SLinus Torvalds	bool "High Memory Support"
2420a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2421797798c1SRalf Baechle
2422797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2423797798c1SRalf Baechle	bool
2424797798c1SRalf Baechle
2425797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2426797798c1SRalf Baechle	bool
24271da177e4SLinus Torvalds
24289693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
24299693a853SFranck Bui-Huu	bool
24309693a853SFranck Bui-Huu
2431a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2432a6a4834cSSteven J. Hill	bool
2433a6a4834cSSteven J. Hill
2434377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2435377cb1b6SRalf Baechle	bool
2436377cb1b6SRalf Baechle	help
2437377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2438377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2439377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2440377cb1b6SRalf Baechle
2441a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2442a5e9a69eSPaul Burton	bool
2443a5e9a69eSPaul Burton
2444b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2445b4819b59SYoichi Yuasa	def_bool y
2446f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2447b4819b59SYoichi Yuasa
2448d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2449d8cb4e11SRalf Baechle	bool
2450d8cb4e11SRalf Baechle	default y if SGI_IP27
2451d8cb4e11SRalf Baechle	help
24523dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2453d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2454d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2455d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2456d8cb4e11SRalf Baechle
2457b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2458b1c6cd42SAtsushi Nemoto	bool
24597de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
246031473747SAtsushi Nemoto
2461d8cb4e11SRalf Baechleconfig NUMA
2462d8cb4e11SRalf Baechle	bool "NUMA Support"
2463d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2464d8cb4e11SRalf Baechle	help
2465d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2466d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2467d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2468d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2469d8cb4e11SRalf Baechle	  disabled.
2470d8cb4e11SRalf Baechle
2471d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2472d8cb4e11SRalf Baechle	bool
2473d8cb4e11SRalf Baechle
2474c80d79d7SYasunori Gotoconfig NODES_SHIFT
2475c80d79d7SYasunori Goto	int
2476c80d79d7SYasunori Goto	default "6"
2477c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2478c80d79d7SYasunori Goto
247914f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
248014f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
2481f14ceff7SHuacai Chen	depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
248214f70012SDeng-Cheng Zhu	default y
248314f70012SDeng-Cheng Zhu	help
248414f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
248514f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
248614f70012SDeng-Cheng Zhu
2487b4819b59SYoichi Yuasasource "mm/Kconfig"
2488b4819b59SYoichi Yuasa
24891da177e4SLinus Torvaldsconfig SMP
24901da177e4SLinus Torvalds	bool "Multi-Processing support"
2491e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2492e73ea273SRalf Baechle	help
24931da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
24944a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
24954a474157SRobert Graffham	  than one CPU, say Y.
24961da177e4SLinus Torvalds
24974a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
24981da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
24991da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
25004a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
25011da177e4SLinus Torvalds	  will run faster if you say N here.
25021da177e4SLinus Torvalds
25031da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
25041da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
25051da177e4SLinus Torvalds
250603502faaSAdrian Bunk	  See also the SMP-HOWTO available at
250703502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
25081da177e4SLinus Torvalds
25091da177e4SLinus Torvalds	  If you don't know what to do here, say N.
25101da177e4SLinus Torvalds
251187353d8aSRalf Baechleconfig SMP_UP
251287353d8aSRalf Baechle	bool
251387353d8aSRalf Baechle
25144a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
25154a16ff4cSRalf Baechle	bool
25164a16ff4cSRalf Baechle
25170ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
25180ee958e1SPaul Burton	bool
25190ee958e1SPaul Burton
2520e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2521e73ea273SRalf Baechle	bool
2522e73ea273SRalf Baechle
2523130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2524130e2fb7SRalf Baechle	bool
2525130e2fb7SRalf Baechle
2526130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2527130e2fb7SRalf Baechle	bool
2528130e2fb7SRalf Baechle
2529130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2530130e2fb7SRalf Baechle	bool
2531130e2fb7SRalf Baechle
2532130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2533130e2fb7SRalf Baechle	bool
2534130e2fb7SRalf Baechle
2535130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2536130e2fb7SRalf Baechle	bool
2537130e2fb7SRalf Baechle
25381da177e4SLinus Torvaldsconfig NR_CPUS
2539a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2540a91796a9SJayachandran C	range 2 256
25411da177e4SLinus Torvalds	depends on SMP
2542130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2543130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2544130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2545130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2546130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
25471da177e4SLinus Torvalds	help
25481da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
25491da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
25501da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
255172ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
255272ede9b1SAtsushi Nemoto	  and 2 for all others.
25531da177e4SLinus Torvalds
25541da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
255572ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
255672ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
255772ede9b1SAtsushi Nemoto	  power of two.
25581da177e4SLinus Torvalds
2559399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2560399aaa25SAl Cooper	bool
2561399aaa25SAl Cooper
25621723b4a3SAtsushi Nemoto#
25631723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
25641723b4a3SAtsushi Nemoto#
25651723b4a3SAtsushi Nemoto
25661723b4a3SAtsushi Nemotochoice
25671723b4a3SAtsushi Nemoto	prompt "Timer frequency"
25681723b4a3SAtsushi Nemoto	default HZ_250
25691723b4a3SAtsushi Nemoto	help
25701723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
25711723b4a3SAtsushi Nemoto
257267596573SPaul Burton	config HZ_24
257367596573SPaul Burton		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
257467596573SPaul Burton
25751723b4a3SAtsushi Nemoto	config HZ_48
25760f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
25771723b4a3SAtsushi Nemoto
25781723b4a3SAtsushi Nemoto	config HZ_100
25791723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
25801723b4a3SAtsushi Nemoto
25811723b4a3SAtsushi Nemoto	config HZ_128
25821723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
25831723b4a3SAtsushi Nemoto
25841723b4a3SAtsushi Nemoto	config HZ_250
25851723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
25861723b4a3SAtsushi Nemoto
25871723b4a3SAtsushi Nemoto	config HZ_256
25881723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
25891723b4a3SAtsushi Nemoto
25901723b4a3SAtsushi Nemoto	config HZ_1000
25911723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
25921723b4a3SAtsushi Nemoto
25931723b4a3SAtsushi Nemoto	config HZ_1024
25941723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
25951723b4a3SAtsushi Nemoto
25961723b4a3SAtsushi Nemotoendchoice
25971723b4a3SAtsushi Nemoto
259867596573SPaul Burtonconfig SYS_SUPPORTS_24HZ
259967596573SPaul Burton	bool
260067596573SPaul Burton
26011723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
26021723b4a3SAtsushi Nemoto	bool
26031723b4a3SAtsushi Nemoto
26041723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
26051723b4a3SAtsushi Nemoto	bool
26061723b4a3SAtsushi Nemoto
26071723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
26081723b4a3SAtsushi Nemoto	bool
26091723b4a3SAtsushi Nemoto
26101723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
26111723b4a3SAtsushi Nemoto	bool
26121723b4a3SAtsushi Nemoto
26131723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
26141723b4a3SAtsushi Nemoto	bool
26151723b4a3SAtsushi Nemoto
26161723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
26171723b4a3SAtsushi Nemoto	bool
26181723b4a3SAtsushi Nemoto
26191723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
26201723b4a3SAtsushi Nemoto	bool
26211723b4a3SAtsushi Nemoto
26221723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
26231723b4a3SAtsushi Nemoto	bool
262467596573SPaul Burton	default y if !SYS_SUPPORTS_24HZ && \
262567596573SPaul Burton		     !SYS_SUPPORTS_48HZ && \
262667596573SPaul Burton		     !SYS_SUPPORTS_100HZ && \
262767596573SPaul Burton		     !SYS_SUPPORTS_128HZ && \
262867596573SPaul Burton		     !SYS_SUPPORTS_250HZ && \
262967596573SPaul Burton		     !SYS_SUPPORTS_256HZ && \
263067596573SPaul Burton		     !SYS_SUPPORTS_1000HZ && \
26311723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
26321723b4a3SAtsushi Nemoto
26331723b4a3SAtsushi Nemotoconfig HZ
26341723b4a3SAtsushi Nemoto	int
263567596573SPaul Burton	default 24 if HZ_24
26361723b4a3SAtsushi Nemoto	default 48 if HZ_48
26371723b4a3SAtsushi Nemoto	default 100 if HZ_100
26381723b4a3SAtsushi Nemoto	default 128 if HZ_128
26391723b4a3SAtsushi Nemoto	default 250 if HZ_250
26401723b4a3SAtsushi Nemoto	default 256 if HZ_256
26411723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
26421723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
26431723b4a3SAtsushi Nemoto
264496685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
264596685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
264696685b17SDeng-Cheng Zhu
2647e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
26481da177e4SLinus Torvalds
2649ea6e942bSAtsushi Nemotoconfig KEXEC
26507d60717eSKees Cook	bool "Kexec system call"
26512965faa5SDave Young	select KEXEC_CORE
2652ea6e942bSAtsushi Nemoto	help
2653ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2654ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
26553dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2656ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2657ea6e942bSAtsushi Nemoto
265801dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2659ea6e942bSAtsushi Nemoto
2660ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2661ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2662bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2663bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2664bf220695SGeert Uytterhoeven	  made.
2665ea6e942bSAtsushi Nemoto
26667aa1c8f4SRalf Baechleconfig CRASH_DUMP
26677aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
26687aa1c8f4SRalf Baechle	  help
26697aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
26707aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
26717aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
26727aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
26737aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
26747aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
26757aa1c8f4SRalf Baechle	  PHYSICAL_START.
26767aa1c8f4SRalf Baechle
26777aa1c8f4SRalf Baechleconfig PHYSICAL_START
26787aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
26797aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
26807aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
26817aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
26827aa1c8f4SRalf Baechle	  help
26837aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
26847aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
26857aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
26867aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
26877aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
26887aa1c8f4SRalf Baechle
2689ea6e942bSAtsushi Nemotoconfig SECCOMP
2690ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2691293c5bd1SRalf Baechle	depends on PROC_FS
2692ea6e942bSAtsushi Nemoto	default y
2693ea6e942bSAtsushi Nemoto	help
2694ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2695ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2696ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2697ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2698ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2699ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2700ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2701ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2702ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2703ea6e942bSAtsushi Nemoto
2704ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2705ea6e942bSAtsushi Nemoto
2706597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
27070ce3417eSPaul Burton	bool "Support for O32 binaries using 64-bit FP"
2708597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2709597ce172SPaul Burton	help
2710597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2711597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2712597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2713597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2714597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2715597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2716597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2717597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2718597ce172SPaul Burton	  saying N here.
2719597ce172SPaul Burton
272006e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
272106e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
272206e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
272306e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
272406e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
272506e2e882SPaul Burton	  said details.
272606e2e882SPaul Burton
272706e2e882SPaul Burton	  If unsure, say N.
2728597ce172SPaul Burton
2729f2ffa5abSDezhong Diaoconfig USE_OF
27300b3e06fdSJonas Gorski	bool
2731f2ffa5abSDezhong Diao	select OF
2732e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2733abd2363fSGrant Likely	select IRQ_DOMAIN
2734f2ffa5abSDezhong Diao
27357fafb068SAndrew Brestickerconfig BUILTIN_DTB
27367fafb068SAndrew Bresticker	bool
27377fafb068SAndrew Bresticker
27381da8f179SJonas Gorskichoice
27395b24d52cSJonas Gorski	prompt "Kernel appended dtb support" if USE_OF
27401da8f179SJonas Gorski	default MIPS_NO_APPENDED_DTB
27411da8f179SJonas Gorski
27421da8f179SJonas Gorski	config MIPS_NO_APPENDED_DTB
27431da8f179SJonas Gorski		bool "None"
27441da8f179SJonas Gorski		help
27451da8f179SJonas Gorski		  Do not enable appended dtb support.
27461da8f179SJonas Gorski
274787db537dSAaro Koskinen	config MIPS_ELF_APPENDED_DTB
274887db537dSAaro Koskinen		bool "vmlinux"
274987db537dSAaro Koskinen		help
275087db537dSAaro Koskinen		  With this option, the boot code will look for a device tree binary
275187db537dSAaro Koskinen		  DTB) included in the vmlinux ELF section .appended_dtb. By default
275287db537dSAaro Koskinen		  it is empty and the DTB can be appended using binutils command
275387db537dSAaro Koskinen		  objcopy:
275487db537dSAaro Koskinen
275587db537dSAaro Koskinen		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
275687db537dSAaro Koskinen
275787db537dSAaro Koskinen		  This is meant as a backward compatiblity convenience for those
275887db537dSAaro Koskinen		  systems with a bootloader that can't be upgraded to accommodate
275987db537dSAaro Koskinen		  the documented boot protocol using a device tree.
276087db537dSAaro Koskinen
27611da8f179SJonas Gorski	config MIPS_RAW_APPENDED_DTB
27621da8f179SJonas Gorski		bool "vmlinux.bin"
27631da8f179SJonas Gorski		help
27641da8f179SJonas Gorski		  With this option, the boot code will look for a device tree binary
27651da8f179SJonas Gorski		  DTB) appended to raw vmlinux.bin (without decompressor).
27661da8f179SJonas Gorski		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
27671da8f179SJonas Gorski
27681da8f179SJonas Gorski		  This is meant as a backward compatibility convenience for those
27691da8f179SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
27701da8f179SJonas Gorski		  the documented boot protocol using a device tree.
27711da8f179SJonas Gorski
27721da8f179SJonas Gorski		  Beware that there is very little in terms of protection against
27731da8f179SJonas Gorski		  this option being confused by leftover garbage in memory that might
27741da8f179SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
27751da8f179SJonas Gorski		  to vmlinux.bin.  Do not leave this option active in a production kernel
27761da8f179SJonas Gorski		  if you don't intend to always append a DTB.
2777c0b4e101SJonas Gorski
2778c0b4e101SJonas Gorski	config MIPS_ZBOOT_APPENDED_DTB
2779c0b4e101SJonas Gorski		bool "vmlinuz.bin"
2780c0b4e101SJonas Gorski		depends on SYS_SUPPORTS_ZBOOT
2781c0b4e101SJonas Gorski		help
2782c0b4e101SJonas Gorski		  With this option, the boot code will look for a device tree binary
2783c0b4e101SJonas Gorski		  DTB) appended to raw vmlinuz.bin (with decompressor).
2784c0b4e101SJonas Gorski		  (e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb).
2785c0b4e101SJonas Gorski
2786c0b4e101SJonas Gorski		  This is meant as a backward compatibility convenience for those
2787c0b4e101SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
2788c0b4e101SJonas Gorski		  the documented boot protocol using a device tree.
2789c0b4e101SJonas Gorski
2790c0b4e101SJonas Gorski		  Beware that there is very little in terms of protection against
2791c0b4e101SJonas Gorski		  this option being confused by leftover garbage in memory that might
2792c0b4e101SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
2793c0b4e101SJonas Gorski		  to vmlinuz.bin.  Do not leave this option active in a production kernel
2794c0b4e101SJonas Gorski		  if you don't intend to always append a DTB.
27951da8f179SJonas Gorskiendchoice
27961da8f179SJonas Gorski
27972024972eSJonas Gorskichoice
27982024972eSJonas Gorski	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
27992bcef9b4SJonas Gorski	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
28002bcef9b4SJonas Gorski					 !MIPS_MALTA && !MIPS_SEAD3 && \
28012bcef9b4SJonas Gorski					 !CAVIUM_OCTEON_SOC
28022024972eSJonas Gorski	default MIPS_CMDLINE_FROM_BOOTLOADER
28032024972eSJonas Gorski
28042024972eSJonas Gorski	config MIPS_CMDLINE_FROM_DTB
28052024972eSJonas Gorski		depends on USE_OF
28062024972eSJonas Gorski		bool "Dtb kernel arguments if available"
28072024972eSJonas Gorski
28082024972eSJonas Gorski	config MIPS_CMDLINE_DTB_EXTEND
28092024972eSJonas Gorski		depends on USE_OF
28102024972eSJonas Gorski		bool "Extend dtb kernel arguments with bootloader arguments"
28112024972eSJonas Gorski
28122024972eSJonas Gorski	config MIPS_CMDLINE_FROM_BOOTLOADER
28132024972eSJonas Gorski		bool "Bootloader kernel arguments if available"
28142024972eSJonas Gorskiendchoice
28152024972eSJonas Gorski
28165e83d430SRalf Baechleendmenu
28175e83d430SRalf Baechle
28181df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
28191df0f0ffSAtsushi Nemoto	bool
28201df0f0ffSAtsushi Nemoto	default y
28211df0f0ffSAtsushi Nemoto
28221df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
28231df0f0ffSAtsushi Nemoto	bool
28241df0f0ffSAtsushi Nemoto	default y
28251df0f0ffSAtsushi Nemoto
2826e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT
2827e1e16115SAaro Koskinen	bool
2828e1e16115SAaro Koskinen	default y
2829e1e16115SAaro Koskinen
2830a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS
2831a728ab52SKirill A. Shutemov	int
2832a728ab52SKirill A. Shutemov	default 3 if 64BIT && !PAGE_SIZE_64KB
2833a728ab52SKirill A. Shutemov	default 2
2834a728ab52SKirill A. Shutemov
2835b6c3539bSRalf Baechlesource "init/Kconfig"
2836b6c3539bSRalf Baechle
2837dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2838dc52ddc0SMatt Helsley
28391da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
28401da177e4SLinus Torvalds
28415e83d430SRalf Baechleconfig HW_HAS_EISA
28425e83d430SRalf Baechle	bool
28431da177e4SLinus Torvaldsconfig HW_HAS_PCI
28441da177e4SLinus Torvalds	bool
28451da177e4SLinus Torvalds
28461da177e4SLinus Torvaldsconfig PCI
28471da177e4SLinus Torvalds	bool "Support for PCI controller"
28481da177e4SLinus Torvalds	depends on HW_HAS_PCI
2849abb4ae46SRalf Baechle	select PCI_DOMAINS
28500f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
28511da177e4SLinus Torvalds	help
28521da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
28531da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
28541da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
28551da177e4SLinus Torvalds	  say Y, otherwise N.
28561da177e4SLinus Torvalds
28570e476d91SHuacai Chenconfig HT_PCI
28580e476d91SHuacai Chen	bool "Support for HT-linked PCI"
28590e476d91SHuacai Chen	default y
28600e476d91SHuacai Chen	depends on CPU_LOONGSON3
28610e476d91SHuacai Chen	select PCI
28620e476d91SHuacai Chen	select PCI_DOMAINS
28630e476d91SHuacai Chen	help
28640e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
28650e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
28660e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
28670e476d91SHuacai Chen
28681da177e4SLinus Torvaldsconfig PCI_DOMAINS
28691da177e4SLinus Torvalds	bool
28701da177e4SLinus Torvalds
28711da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
28721da177e4SLinus Torvalds
28731da177e4SLinus Torvalds#
28741da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
28751da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
28761da177e4SLinus Torvalds# users to choose the right thing ...
28771da177e4SLinus Torvalds#
28781da177e4SLinus Torvaldsconfig ISA
28791da177e4SLinus Torvalds	bool
28801da177e4SLinus Torvalds
28811da177e4SLinus Torvaldsconfig EISA
28821da177e4SLinus Torvalds	bool "EISA support"
28835e83d430SRalf Baechle	depends on HW_HAS_EISA
28841da177e4SLinus Torvalds	select ISA
2885aa414dffSRalf Baechle	select GENERIC_ISA_DMA
28861da177e4SLinus Torvalds	---help---
28871da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
28881da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
28891da177e4SLinus Torvalds
28901da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
28911da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
28921da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
28931da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
28941da177e4SLinus Torvalds
28951da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
28961da177e4SLinus Torvalds
28971da177e4SLinus Torvalds	  Otherwise, say N.
28981da177e4SLinus Torvalds
28991da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
29001da177e4SLinus Torvalds
29011da177e4SLinus Torvaldsconfig TC
29021da177e4SLinus Torvalds	bool "TURBOchannel support"
29031da177e4SLinus Torvalds	depends on MACH_DECSTATION
29041da177e4SLinus Torvalds	help
290550a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
290650a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
290750a23e6eSJustin P. Mattock	  at:
290850a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
290950a23e6eSJustin P. Mattock	  and:
291050a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
291150a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
291250a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
29131da177e4SLinus Torvalds
29141da177e4SLinus Torvaldsconfig MMU
29151da177e4SLinus Torvalds	bool
29161da177e4SLinus Torvalds	default y
29171da177e4SLinus Torvalds
2918d865bea4SRalf Baechleconfig I8253
2919d865bea4SRalf Baechle	bool
2920798778b8SRussell King	select CLKSRC_I8253
29212d02612fSThomas Gleixner	select CLKEVT_I8253
29229726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
2923d865bea4SRalf Baechle
2924e05eb3f8SRalf Baechleconfig ZONE_DMA
2925e05eb3f8SRalf Baechle	bool
2926e05eb3f8SRalf Baechle
2927cce335aeSRalf Baechleconfig ZONE_DMA32
2928cce335aeSRalf Baechle	bool
2929cce335aeSRalf Baechle
29301da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
29311da177e4SLinus Torvalds
2932388b78adSAlexandre Bounineconfig RAPIDIO
293356abde72SAlexandre Bounine	tristate "RapidIO support"
2934388b78adSAlexandre Bounine	depends on PCI
2935388b78adSAlexandre Bounine	default n
2936388b78adSAlexandre Bounine	help
2937388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
2938388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
2939388b78adSAlexandre Bounine
2940388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
2941388b78adSAlexandre Bounine
29421da177e4SLinus Torvaldsendmenu
29431da177e4SLinus Torvalds
29441da177e4SLinus Torvaldsmenu "Executable file formats"
29451da177e4SLinus Torvalds
29461da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
29471da177e4SLinus Torvalds
29481da177e4SLinus Torvaldsconfig TRAD_SIGNALS
29491da177e4SLinus Torvalds	bool
29501da177e4SLinus Torvalds
29511da177e4SLinus Torvaldsconfig MIPS32_COMPAT
295278aaf956SRalf Baechle	bool
29531da177e4SLinus Torvalds
29541da177e4SLinus Torvaldsconfig COMPAT
29551da177e4SLinus Torvalds	bool
29561da177e4SLinus Torvalds
295705e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
295805e43966SAtsushi Nemoto	bool
295905e43966SAtsushi Nemoto
29601da177e4SLinus Torvaldsconfig MIPS32_O32
29611da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
296278aaf956SRalf Baechle	depends on 64BIT
296378aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
296478aaf956SRalf Baechle	select COMPAT
296578aaf956SRalf Baechle	select MIPS32_COMPAT
296678aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
29671da177e4SLinus Torvalds	help
29681da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
29691da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
29701da177e4SLinus Torvalds	  existing binaries are in this format.
29711da177e4SLinus Torvalds
29721da177e4SLinus Torvalds	  If unsure, say Y.
29731da177e4SLinus Torvalds
29741da177e4SLinus Torvaldsconfig MIPS32_N32
29751da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
2976c22eacfeSRalf Baechle	depends on 64BIT
297778aaf956SRalf Baechle	select COMPAT
297878aaf956SRalf Baechle	select MIPS32_COMPAT
297978aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
29801da177e4SLinus Torvalds	help
29811da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
29821da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
29831da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
29841da177e4SLinus Torvalds	  cases.
29851da177e4SLinus Torvalds
29861da177e4SLinus Torvalds	  If unsure, say N.
29871da177e4SLinus Torvalds
29881da177e4SLinus Torvaldsconfig BINFMT_ELF32
29891da177e4SLinus Torvalds	bool
29901da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
29911da177e4SLinus Torvalds
29922116245eSRalf Baechleendmenu
29931da177e4SLinus Torvalds
29942116245eSRalf Baechlemenu "Power management options"
2995952fa954SRodolfo Giometti
2996363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
2997363c55caSWu Zhangjin	def_bool y
29983f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2999363c55caSWu Zhangjin
3000f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
3001f4cb5700SJohannes Berg	def_bool y
30023f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3003f4cb5700SJohannes Berg
30042116245eSRalf Baechlesource "kernel/power/Kconfig"
3005952fa954SRodolfo Giometti
30061da177e4SLinus Torvaldsendmenu
30071da177e4SLinus Torvalds
30087a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
30097a998935SViresh Kumar	bool
30107a998935SViresh Kumar
30117a998935SViresh Kumarmenu "CPU Power Management"
3012c095ebafSPaul Burton
3013c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
30147a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
30157a998935SViresh Kumarendif
30169726b43aSWu Zhangjin
3017c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
3018c095ebafSPaul Burton
3019c095ebafSPaul Burtonendmenu
3020c095ebafSPaul Burton
3021d5950b43SSam Ravnborgsource "net/Kconfig"
3022d5950b43SSam Ravnborg
30231da177e4SLinus Torvaldssource "drivers/Kconfig"
30241da177e4SLinus Torvalds
302598cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
302698cdee0eSRalf Baechle
30271da177e4SLinus Torvaldssource "fs/Kconfig"
30281da177e4SLinus Torvalds
30291da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
30301da177e4SLinus Torvalds
30311da177e4SLinus Torvaldssource "security/Kconfig"
30321da177e4SLinus Torvalds
30331da177e4SLinus Torvaldssource "crypto/Kconfig"
30341da177e4SLinus Torvalds
30351da177e4SLinus Torvaldssource "lib/Kconfig"
30362235a54dSSanjay Lal
30372235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
3038