xref: /linux/arch/mips/Kconfig (revision 12e3280b33fe1ada85b84f67613d03e1b6d8dbf6)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
440e084a5SRalf Baechle	select ARCH_SUPPORTS_UPROBES
5a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
6393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
75fac4f7aSPaul Burton	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
81ee3630aSRalf Baechle	select ARCH_USE_BUILTIN_BSWAP
9c3fc5cd5SRalf Baechle	select HAVE_CONTEXT_TRACKING
10f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
11ec7748b5SSam Ravnborg	select HAVE_IDE
1242d4b839SMathieu Desnoyers	select HAVE_OPROFILE
137f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
147f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
1588547001SJason Wessel	select HAVE_ARCH_KGDB
16490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
17c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
186077776bSDaniel Borkmann	select HAVE_CBPF_JIT if !CPU_MICROMIPS
19d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
20538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
21538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
2264575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
2329c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
24c1bf207dSDavid Daney	select HAVE_KPROBES
25c1bf207dSDavid Daney	select HAVE_KRETPROBES
26fb59e394SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
27b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
281d7bf993SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
292b68f6caSKees Cook	select ARCH_HAS_ELF_RANDOMIZE
30383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
3130ad29bbSHuacai Chen	select RTC_LIB if !MACH_LOONGSON64
322b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
337463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
34f4649382SZubair Lutfullah Kakakhel	select HAVE_DMA_CONTIGUOUS
3548e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
363bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
37f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3878857614SMarkos Chandras	select GENERIC_PCI_IOMAP
3994bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
40c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
410f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
429d15ffc8STejun Heo	select HAVE_MEMBLOCK
439d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
449d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
45360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
464b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
47cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
48929de4ccSDeng-Cheng Zhu	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
49cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
50786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
5142a0bb3fSPetr Mladek	select HAVE_NMI
524febd95aSStephen Rothwell	select VIRT_TO_BUS
532f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
542f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
5550150d2bSAl Viro	select CLONE_BACKWARDS
56d1a1dc0bSDave Hansen	select HAVE_DEBUG_STACKOVERFLOW
5719952a92SKees Cook	select HAVE_CC_STACKPROTECTOR
58b1d4c6caSJames Hogan	select CPU_PM if CPU_IDLE
59cc7964afSPaul Burton	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
6090cee759SPaul Burton	select ARCH_BINFMT_ELF_STATE
61d79d853dSMarkos Chandras	select SYSCTL_EXCEPTION_TRACE
62bb877e96SDeng-Cheng Zhu	select HAVE_VIRT_CPU_ACCOUNTING_GEN
63ec9ddad3SDeng-Cheng Zhu	select HAVE_IRQ_TIME_ACCOUNTING
64a7f4df4eSAlex Smith	select GENERIC_TIME_VSYSCALL
65a7f4df4eSAlex Smith	select ARCH_CLOCKSOURCE_DATA
661d2753a6SDavid Daney	select HANDLE_DOMAIN_IRQ
67432c6bacSPaul Burton	select HAVE_EXIT_THREAD
6808bccf43SMarcin Nowakowski	select HAVE_REGS_AND_STACK_ACCESS_API
691da177e4SLinus Torvalds
701da177e4SLinus Torvaldsmenu "Machine selection"
711da177e4SLinus Torvalds
725e83d430SRalf Baechlechoice
735e83d430SRalf Baechle	prompt "System type"
745e83d430SRalf Baechle	default SGI_IP22
751da177e4SLinus Torvalds
7642a4f17dSManuel Laussconfig MIPS_ALCHEMY
77c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
7834adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
79f772cdb2SRalf Baechle	select CEVT_R4K
80d7ea335cSSteven J. Hill	select CSRC_R4K
8167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
8288e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
8342a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
8442a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
8542a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
86d30a2b47SLinus Walleij	select GPIOLIB
871b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
8847440229SManuel Lauss	select COMMON_CLK
891da177e4SLinus Torvalds
907ca5dc14SFlorian Fainelliconfig AR7
917ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
927ca5dc14SFlorian Fainelli	select BOOT_ELF32
937ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
947ca5dc14SFlorian Fainelli	select CEVT_R4K
957ca5dc14SFlorian Fainelli	select CSRC_R4K
9667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
977ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
987ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
997ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
1007ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
1017ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
1027ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
103377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1041b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
105d30a2b47SLinus Walleij	select GPIOLIB
1067ca5dc14SFlorian Fainelli	select VLYNQ
1078551fb64SYoichi Yuasa	select HAVE_CLK
1087ca5dc14SFlorian Fainelli	help
1097ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1107ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1117ca5dc14SFlorian Fainelli
11243cc739fSSergey Ryazanovconfig ATH25
11343cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
11443cc739fSSergey Ryazanov	select CEVT_R4K
11543cc739fSSergey Ryazanov	select CSRC_R4K
11643cc739fSSergey Ryazanov	select DMA_NONCOHERENT
11767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1181753e74eSSergey Ryazanov	select IRQ_DOMAIN
11943cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
12043cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
12143cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
1228aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
12343cc739fSSergey Ryazanov	help
12443cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
12543cc739fSSergey Ryazanov
126d4a67d9dSGabor Juhosconfig ATH79
127d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
128ff591a91SAlban Bedel	select ARCH_HAS_RESET_CONTROLLER
129d4a67d9dSGabor Juhos	select BOOT_RAW
130d4a67d9dSGabor Juhos	select CEVT_R4K
131d4a67d9dSGabor Juhos	select CSRC_R4K
132d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
133d30a2b47SLinus Walleij	select GPIOLIB
13494638067SGabor Juhos	select HAVE_CLK
135411520afSAlban Bedel	select COMMON_CLK
1362c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
13767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1380aabf1a4SGabor Juhos	select MIPS_MACHINE
139d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
140d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
141d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
142d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
143377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
144b3f0a250SAlban Bedel	select SYS_SUPPORTS_ZBOOT_UART_PROM
14503c8c407SAlban Bedel	select USE_OF
146d4a67d9dSGabor Juhos	help
147d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
148d4a67d9dSGabor Juhos
1495f2d4459SKevin Cernekeeconfig BMIPS_GENERIC
1505f2d4459SKevin Cernekee	bool "Broadcom Generic BMIPS kernel"
151d666cd02SKevin Cernekee	select BOOT_RAW
152d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
153d666cd02SKevin Cernekee	select USE_OF
154d666cd02SKevin Cernekee	select CEVT_R4K
155d666cd02SKevin Cernekee	select CSRC_R4K
156d666cd02SKevin Cernekee	select SYNC_R4K
157d666cd02SKevin Cernekee	select COMMON_CLK
158c7c42ec2SSimon Arlott	select BCM6345_L1_IRQ
15960b858f2SKevin Cernekee	select BCM7038_L1_IRQ
16060b858f2SKevin Cernekee	select BCM7120_L2_IRQ
16160b858f2SKevin Cernekee	select BRCMSTB_L2_IRQ
16267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
16360b858f2SKevin Cernekee	select DMA_NONCOHERENT
164d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
16560b858f2SKevin Cernekee	select SYS_SUPPORTS_LITTLE_ENDIAN
166d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
167d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
16860b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS32_3300
16960b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4350
17060b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4380
171d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
172d666cd02SKevin Cernekee	select SWAP_IO_SPACE
17360b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17460b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
17560b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
17660b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
177d666cd02SKevin Cernekee	help
1785f2d4459SKevin Cernekee	  Build a generic DT-based kernel image that boots on select
1795f2d4459SKevin Cernekee	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
1805f2d4459SKevin Cernekee	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
1815f2d4459SKevin Cernekee	  must be set appropriately for your board.
182d666cd02SKevin Cernekee
1831c0c13ebSAurelien Jarnoconfig BCM47XX
184c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
185fe08f8c2SHauke Mehrtens	select BOOT_RAW
18642f77542SRalf Baechle	select CEVT_R4K
187940f6b48SRalf Baechle	select CSRC_R4K
1881c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1891c0c13ebSAurelien Jarno	select HW_HAS_PCI
19067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
191314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
192dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1931c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1941c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
195377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
19625e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
197e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
198c949c0bcSRafał Miłecki	select GPIOLIB
199c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
200f6e734a8SRafał Miłecki	select BCM47XX_NVRAM
2012ab71a02SRafał Miłecki	select BCM47XX_SPROM
2021c0c13ebSAurelien Jarno	help
2031c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
2041c0c13ebSAurelien Jarno
205e7300d04SMaxime Bizonconfig BCM63XX
206e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
207ae8de61cSFlorian Fainelli	select BOOT_RAW
208e7300d04SMaxime Bizon	select CEVT_R4K
209e7300d04SMaxime Bizon	select CSRC_R4K
210fc264022SJonas Gorski	select SYNC_R4K
211e7300d04SMaxime Bizon	select DMA_NONCOHERENT
21267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
213e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
214e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
215e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
216e7300d04SMaxime Bizon	select SWAP_IO_SPACE
217d30a2b47SLinus Walleij	select GPIOLIB
2183e82eeebSYoichi Yuasa	select HAVE_CLK
219af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
220e7300d04SMaxime Bizon	help
221e7300d04SMaxime Bizon	 Support for BCM63XX based boards
222e7300d04SMaxime Bizon
2231da177e4SLinus Torvaldsconfig MIPS_COBALT
2243fa986faSMartin Michlmayr	bool "Cobalt Server"
22542f77542SRalf Baechle	select CEVT_R4K
226940f6b48SRalf Baechle	select CSRC_R4K
2271097c6acSYoichi Yuasa	select CEVT_GT641XX
2281da177e4SLinus Torvalds	select DMA_NONCOHERENT
2291da177e4SLinus Torvalds	select HW_HAS_PCI
230d865bea4SRalf Baechle	select I8253
2311da177e4SLinus Torvalds	select I8259
23267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
233d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
234252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
235e25bfc92SYoichi Yuasa	select PCI
2367cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
2370a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
238ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2390e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
2405e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
241e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
2421da177e4SLinus Torvalds
2431da177e4SLinus Torvaldsconfig MACH_DECSTATION
2443fa986faSMartin Michlmayr	bool "DECstations"
2451da177e4SLinus Torvalds	select BOOT_ELF32
2466457d9fcSYoichi Yuasa	select CEVT_DS1287
24781d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
2484247417dSYoichi Yuasa	select CSRC_IOASIC
24981d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
25020d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
25120d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
25220d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
2531da177e4SLinus Torvalds	select DMA_NONCOHERENT
254ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
25567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
2567cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
2577cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
258ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2597d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2605e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
2611723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
2621723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
2631723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
264930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
2655e83d430SRalf Baechle	help
2661da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
2671da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
2681da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
2691da177e4SLinus Torvalds
2701da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
2711da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
2721da177e4SLinus Torvalds
2731da177e4SLinus Torvalds		DECstation 5000/50
2741da177e4SLinus Torvalds		DECstation 5000/150
2751da177e4SLinus Torvalds		DECstation 5000/260
2761da177e4SLinus Torvalds		DECsystem 5900/260
2771da177e4SLinus Torvalds
2781da177e4SLinus Torvalds	  otherwise choose R3000.
2791da177e4SLinus Torvalds
2805e83d430SRalf Baechleconfig MACH_JAZZ
2813fa986faSMartin Michlmayr	bool "Jazz family of machines"
2820e2794b0SRalf Baechle	select FW_ARC
2830e2794b0SRalf Baechle	select FW_ARC32
2845e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
28542f77542SRalf Baechle	select CEVT_R4K
286940f6b48SRalf Baechle	select CSRC_R4K
287e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2885e83d430SRalf Baechle	select GENERIC_ISA_DMA
2898a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
29067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
291d865bea4SRalf Baechle	select I8253
2925e83d430SRalf Baechle	select I8259
2935e83d430SRalf Baechle	select ISA
2947cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2955e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2967d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2971723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2981da177e4SLinus Torvalds	help
2995e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
3005e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
301692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
3025e83d430SRalf Baechle	 Olivetti M700-10 workstations.
3035e83d430SRalf Baechle
304de361e8bSPaul Burtonconfig MACH_INGENIC
305de361e8bSPaul Burton	bool "Ingenic SoC based machines"
3065ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
3075ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
308f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
3095ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
31067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
311d30a2b47SLinus Walleij	select GPIOLIB
312ff1930c6SPaul Burton	select COMMON_CLK
31383bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
314ffb1843dSPaul Burton	select BUILTIN_DTB
315ffb1843dSPaul Burton	select USE_OF
3166ec127fbSPaul Burton	select LIBFDT
3175ebabe59SLars-Peter Clausen
318171bb2f1SJohn Crispinconfig LANTIQ
319171bb2f1SJohn Crispin	bool "Lantiq based platforms"
320171bb2f1SJohn Crispin	select DMA_NONCOHERENT
32167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
322171bb2f1SJohn Crispin	select CEVT_R4K
323171bb2f1SJohn Crispin	select CSRC_R4K
324171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
325171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
326171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
327171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
328377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
329171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
330171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
331d30a2b47SLinus Walleij	select GPIOLIB
332171bb2f1SJohn Crispin	select SWAP_IO_SPACE
333171bb2f1SJohn Crispin	select BOOT_RAW
334287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
335a0392222SJohn Crispin	select USE_OF
3363f8c50c9SJohn Crispin	select PINCTRL
3373f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
338c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
339c530781cSJohn Crispin	select RESET_CONTROLLER
340171bb2f1SJohn Crispin
3411f21d2bdSBrian Murphyconfig LASAT
3421f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
34342f77542SRalf Baechle	select CEVT_R4K
34416f0bbbcSRalf Baechle	select CRC32
345940f6b48SRalf Baechle	select CSRC_R4K
3461f21d2bdSBrian Murphy	select DMA_NONCOHERENT
3471f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
3481f21d2bdSBrian Murphy	select HW_HAS_PCI
34967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3501f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
3511f21d2bdSBrian Murphy	select MIPS_NILE4
3521f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
3531f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
3541f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
3551f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
3561f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
3571f21d2bdSBrian Murphy
35830ad29bbSHuacai Chenconfig MACH_LOONGSON32
35930ad29bbSHuacai Chen	bool "Loongson-1 family of machines"
360c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
361ade299d8SYoichi Yuasa	help
36230ad29bbSHuacai Chen	  This enables support for the Loongson-1 family of machines.
36385749d24SWu Zhangjin
36430ad29bbSHuacai Chen	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
36530ad29bbSHuacai Chen	  the Institute of Computing Technology (ICT), Chinese Academy of
36630ad29bbSHuacai Chen	  Sciences (CAS).
367ade299d8SYoichi Yuasa
36830ad29bbSHuacai Chenconfig MACH_LOONGSON64
36930ad29bbSHuacai Chen	bool "Loongson-2/3 family of machines"
370ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
371ca585cf9SKelvin Cheung	help
37230ad29bbSHuacai Chen	  This enables the support of Loongson-2/3 family of machines.
373ca585cf9SKelvin Cheung
37430ad29bbSHuacai Chen	  Loongson-2 is a family of single-core CPUs and Loongson-3 is a
37530ad29bbSHuacai Chen	  family of multi-core CPUs. They are both 64-bit general-purpose
37630ad29bbSHuacai Chen	  MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
37730ad29bbSHuacai Chen	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
37830ad29bbSHuacai Chen	  in the People's Republic of China. The chief architect is Professor
37930ad29bbSHuacai Chen	  Weiwu Hu.
380ca585cf9SKelvin Cheung
3816a438309SAndrew Brestickerconfig MACH_PISTACHIO
3826a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
3836a438309SAndrew Bresticker	select BOOT_ELF32
3846a438309SAndrew Bresticker	select BOOT_RAW
3856a438309SAndrew Bresticker	select CEVT_R4K
3866a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
3876a438309SAndrew Bresticker	select COMMON_CLK
3886a438309SAndrew Bresticker	select CSRC_R4K
389645c7827SZubair Lutfullah Kakakhel	select DMA_NONCOHERENT
390d30a2b47SLinus Walleij	select GPIOLIB
39167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3926a438309SAndrew Bresticker	select LIBFDT
3936a438309SAndrew Bresticker	select MFD_SYSCON
3946a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
3956a438309SAndrew Bresticker	select MIPS_GIC
3966a438309SAndrew Bresticker	select PINCTRL
3976a438309SAndrew Bresticker	select REGULATOR
3986a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
3996a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
4006a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
4016a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
4026a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
40341cc07beSMatt Redfearn	select SYS_SUPPORTS_RELOCATABLE
4046a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
405018f62eeSEzequiel Garcia	select SYS_HAS_EARLY_PRINTK
406018f62eeSEzequiel Garcia	select USE_GENERIC_EARLY_PRINTK_8250
4076a438309SAndrew Bresticker	select USE_OF
4086a438309SAndrew Bresticker	help
4096a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
4106a438309SAndrew Bresticker
4119937f5ffSZubair Lutfullah Kakakhelconfig MACH_XILFPGA
4129937f5ffSZubair Lutfullah Kakakhel	bool "MIPSfpga Xilinx based boards"
4139937f5ffSZubair Lutfullah Kakakhel	select BOOT_ELF32
4149937f5ffSZubair Lutfullah Kakakhel	select BOOT_RAW
4159937f5ffSZubair Lutfullah Kakakhel	select BUILTIN_DTB
4169937f5ffSZubair Lutfullah Kakakhel	select CEVT_R4K
4179937f5ffSZubair Lutfullah Kakakhel	select COMMON_CLK
4189937f5ffSZubair Lutfullah Kakakhel	select CSRC_R4K
419d30a2b47SLinus Walleij	select GPIOLIB
4209937f5ffSZubair Lutfullah Kakakhel	select IRQ_MIPS_CPU
4219937f5ffSZubair Lutfullah Kakakhel	select LIBFDT
4229937f5ffSZubair Lutfullah Kakakhel	select MIPS_CPU_SCACHE
4239937f5ffSZubair Lutfullah Kakakhel	select SYS_HAS_EARLY_PRINTK
4249937f5ffSZubair Lutfullah Kakakhel	select SYS_HAS_CPU_MIPS32_R2
4259937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_32BIT_KERNEL
4269937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_LITTLE_ENDIAN
4279937f5ffSZubair Lutfullah Kakakhel	select SYS_SUPPORTS_ZBOOT_UART16550
4289937f5ffSZubair Lutfullah Kakakhel	select USE_OF
4299937f5ffSZubair Lutfullah Kakakhel	select USE_GENERIC_EARLY_PRINTK_8250
4309937f5ffSZubair Lutfullah Kakakhel	help
4319937f5ffSZubair Lutfullah Kakakhel	  This enables support for the IMG University Program MIPSfpga platform.
4329937f5ffSZubair Lutfullah Kakakhel
4331da177e4SLinus Torvaldsconfig MIPS_MALTA
4343fa986faSMartin Michlmayr	bool "MIPS Malta board"
43561ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
4361da177e4SLinus Torvalds	select BOOT_ELF32
437fa71c960SRalf Baechle	select BOOT_RAW
438e8823d26SPaul Burton	select BUILTIN_DTB
43942f77542SRalf Baechle	select CEVT_R4K
440940f6b48SRalf Baechle	select CSRC_R4K
441fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
44242b002abSGuenter Roeck	select COMMON_CLK
443885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
4441da177e4SLinus Torvalds	select GENERIC_ISA_DMA
4458a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
44667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4478a19b8f1SAndrew Bresticker	select MIPS_GIC
4481da177e4SLinus Torvalds	select HW_HAS_PCI
449d865bea4SRalf Baechle	select I8253
4501da177e4SLinus Torvalds	select I8259
4515e83d430SRalf Baechle	select MIPS_BONITO64
4529318c51aSChris Dearman	select MIPS_CPU_SCACHE
453a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
454252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
4555e83d430SRalf Baechle	select MIPS_MSC
456ecafe3e9SPaul Burton	select SMP_UP if SMP
4571da177e4SLinus Torvalds	select SWAP_IO_SPACE
4587cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
4597cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
460bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
461c5b36783SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R5
462575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
4637cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
4645d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
465575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
4667cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
4677cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
468ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
469ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4705e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
471c5b36783SSteven J. Hill	select SYS_SUPPORTS_HIGHMEM
4725e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
473424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
4740365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
475e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
476377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
477f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
4789693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
4791b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
4808c530ea3SMatt Redfearn	select SYS_SUPPORTS_RELOCATABLE
481e8823d26SPaul Burton	select USE_OF
482abcc82b1SJames Hogan	select ZONE_DMA32 if 64BIT
483e81a8c7dSPaul Burton	select BUILTIN_DTB
484e81a8c7dSPaul Burton	select LIBFDT
4851da177e4SLinus Torvalds	help
486f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
4871da177e4SLinus Torvalds	  board.
4881da177e4SLinus Torvalds
4892572f00dSJoshua Hendersonconfig MACH_PIC32
4902572f00dSJoshua Henderson	bool "Microchip PIC32 Family"
4912572f00dSJoshua Henderson	help
4922572f00dSJoshua Henderson	  This enables support for the Microchip PIC32 family of platforms.
4932572f00dSJoshua Henderson
4942572f00dSJoshua Henderson	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
4952572f00dSJoshua Henderson	  microcontrollers.
4962572f00dSJoshua Henderson
497ec47b274SSteven J. Hillconfig MIPS_SEAD3
498ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
499ec47b274SSteven J. Hill	select BOOT_ELF32
500ec47b274SSteven J. Hill	select BOOT_RAW
501f262b5f2SAndrew Bresticker	select BUILTIN_DTB
502ec47b274SSteven J. Hill	select CEVT_R4K
503ec47b274SSteven J. Hill	select CSRC_R4K
504fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
50542b002abSGuenter Roeck	select COMMON_CLK
506ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
507ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
508ec47b274SSteven J. Hill	select DMA_NONCOHERENT
50967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5108a19b8f1SAndrew Bresticker	select MIPS_GIC
51144327236SQais Yousef	select LIBFDT
512ec47b274SSteven J. Hill	select MIPS_MSC
513ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
514ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
515d4594b27SPaul Burton	select SYS_HAS_CPU_MIPS32_R6
516ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
517ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
518ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
519ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
520ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
521ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
522ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
523a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
524377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
5258c530ea3SMatt Redfearn	select SYS_SUPPORTS_RELOCATABLE
526ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
527ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
5289b731009SSteven J. Hill	select USE_OF
529ec47b274SSteven J. Hill	help
530ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
531ec47b274SSteven J. Hill	  board.
532ec47b274SSteven J. Hill
533a83860c2SRalf Baechleconfig NEC_MARKEINS
534a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
535a83860c2SRalf Baechle	select SOC_EMMA2RH
536a83860c2SRalf Baechle	select HW_HAS_PCI
537a83860c2SRalf Baechle	help
538a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
539ade299d8SYoichi Yuasa
5405e83d430SRalf Baechleconfig MACH_VR41XX
54174142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
54242f77542SRalf Baechle	select CEVT_R4K
543940f6b48SRalf Baechle	select CSRC_R4K
5447cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
545377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
546d30a2b47SLinus Walleij	select GPIOLIB
5475e83d430SRalf Baechle
548edb6310aSDaniel Lairdconfig NXP_STB220
549edb6310aSDaniel Laird	bool "NXP STB220 board"
550edb6310aSDaniel Laird	select SOC_PNX833X
551edb6310aSDaniel Laird	help
552edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
553edb6310aSDaniel Laird
554edb6310aSDaniel Lairdconfig NXP_STB225
555edb6310aSDaniel Laird	bool "NXP 225 board"
556edb6310aSDaniel Laird	select SOC_PNX833X
557edb6310aSDaniel Laird	select SOC_PNX8335
558edb6310aSDaniel Laird	help
559edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
560edb6310aSDaniel Laird
5619267a30dSMarc St-Jeanconfig PMC_MSP
5629267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
56339d30c13SAnoop P A	select CEVT_R4K
56439d30c13SAnoop P A	select CSRC_R4K
5659267a30dSMarc St-Jean	select DMA_NONCOHERENT
5669267a30dSMarc St-Jean	select SWAP_IO_SPACE
5679267a30dSMarc St-Jean	select NO_EXCEPT_FILL
5689267a30dSMarc St-Jean	select BOOT_RAW
5699267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
5709267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
5719267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
5729267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
573377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
57467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5759267a30dSMarc St-Jean	select SERIAL_8250
5769267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
5779296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
5789296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
5799267a30dSMarc St-Jean	help
5809267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
5819267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
5829267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
5839267a30dSMarc St-Jean	  a variety of MIPS cores.
5849267a30dSMarc St-Jean
585ae2b5bb6SJohn Crispinconfig RALINK
586ae2b5bb6SJohn Crispin	bool "Ralink based machines"
587ae2b5bb6SJohn Crispin	select CEVT_R4K
588ae2b5bb6SJohn Crispin	select CSRC_R4K
589ae2b5bb6SJohn Crispin	select BOOT_RAW
590ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
59167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
592ae2b5bb6SJohn Crispin	select USE_OF
593ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
594ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
595ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
596ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
597377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
598ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
599ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
6002a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
6012a153f1cSJohn Crispin	select RESET_CONTROLLER
602ae2b5bb6SJohn Crispin
6031da177e4SLinus Torvaldsconfig SGI_IP22
6043fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
6050e2794b0SRalf Baechle	select FW_ARC
6060e2794b0SRalf Baechle	select FW_ARC32
6071da177e4SLinus Torvalds	select BOOT_ELF32
60842f77542SRalf Baechle	select CEVT_R4K
609940f6b48SRalf Baechle	select CSRC_R4K
610e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
6111da177e4SLinus Torvalds	select DMA_NONCOHERENT
6125e83d430SRalf Baechle	select HW_HAS_EISA
613d865bea4SRalf Baechle	select I8253
61468de4803SThomas Bogendoerfer	select I8259
6151da177e4SLinus Torvalds	select IP22_CPU_SCACHE
61667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
617aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
618e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
619e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
62036e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
621e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
622e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
623e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
6241da177e4SLinus Torvalds	select SWAP_IO_SPACE
6257cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
6267cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
6272b5e63f6SMartin Michlmayr	#
6282b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6292b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6302b5e63f6SMartin Michlmayr	#
6312b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6322b5e63f6SMartin Michlmayr	# for a more details discussion
6332b5e63f6SMartin Michlmayr	#
6342b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
635ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
636ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6375e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
638930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6391da177e4SLinus Torvalds	help
6401da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
6411da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
6421da177e4SLinus Torvalds	  that runs on these, say Y here.
6431da177e4SLinus Torvalds
6441da177e4SLinus Torvaldsconfig SGI_IP27
6453fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
6460e2794b0SRalf Baechle	select FW_ARC
6470e2794b0SRalf Baechle	select FW_ARC64
6485e83d430SRalf Baechle	select BOOT_ELF64
649e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
650634286f1SRalf Baechle	select DMA_COHERENT
65136a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
6521da177e4SLinus Torvalds	select HW_HAS_PCI
653130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
6547cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
655ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6565e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
657d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
6581a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
659930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6601da177e4SLinus Torvalds	help
6611da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
6621da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
6631da177e4SLinus Torvalds	  here.
6641da177e4SLinus Torvalds
665e2defae5SThomas Bogendoerferconfig SGI_IP28
6667d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
6670e2794b0SRalf Baechle	select FW_ARC
6680e2794b0SRalf Baechle	select FW_ARC64
669e2defae5SThomas Bogendoerfer	select BOOT_ELF64
670e2defae5SThomas Bogendoerfer	select CEVT_R4K
671e2defae5SThomas Bogendoerfer	select CSRC_R4K
672e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
673e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
674e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
67567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
676e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
677e2defae5SThomas Bogendoerfer	select I8253
678e2defae5SThomas Bogendoerfer	select I8259
679e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
680e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6815b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
682e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
683e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
684e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
685e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
686e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6872b5e63f6SMartin Michlmayr	#
6882b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6892b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6902b5e63f6SMartin Michlmayr	#
6912b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6922b5e63f6SMartin Michlmayr	# for a more details discussion
6932b5e63f6SMartin Michlmayr	#
6942b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
695e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
696e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
697dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
698e2defae5SThomas Bogendoerfer      help
699e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
700e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
701e2defae5SThomas Bogendoerfer
7021da177e4SLinus Torvaldsconfig SGI_IP32
703cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
7040e2794b0SRalf Baechle	select FW_ARC
7050e2794b0SRalf Baechle	select FW_ARC32
7061da177e4SLinus Torvalds	select BOOT_ELF32
70742f77542SRalf Baechle	select CEVT_R4K
708940f6b48SRalf Baechle	select CSRC_R4K
7091da177e4SLinus Torvalds	select DMA_NONCOHERENT
7101da177e4SLinus Torvalds	select HW_HAS_PCI
71167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7121da177e4SLinus Torvalds	select R5000_CPU_SCACHE
7131da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
7147cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
7157cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
7167cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
717dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
718ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
7195e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7201da177e4SLinus Torvalds	help
7211da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
7221da177e4SLinus Torvalds
723ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
724ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
7255e83d430SRalf Baechle	select BOOT_ELF32
7265e83d430SRalf Baechle	select DMA_COHERENT
7275e83d430SRalf Baechle	select SIBYTE_BCM1120
7285e83d430SRalf Baechle	select SWAP_IO_SPACE
7297cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7305e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7315e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7325e83d430SRalf Baechle
733ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
734ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
7355e83d430SRalf Baechle	select BOOT_ELF32
7365e83d430SRalf Baechle	select DMA_COHERENT
7375e83d430SRalf Baechle	select SIBYTE_BCM1120
7385e83d430SRalf Baechle	select SWAP_IO_SPACE
7397cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7405e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7415e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7425e83d430SRalf Baechle
7435e83d430SRalf Baechleconfig SIBYTE_CRHONE
7443fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
7455e83d430SRalf Baechle	select BOOT_ELF32
7465e83d430SRalf Baechle	select DMA_COHERENT
7475e83d430SRalf Baechle	select SIBYTE_BCM1125
7485e83d430SRalf Baechle	select SWAP_IO_SPACE
7497cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7505e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7515e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7525e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7535e83d430SRalf Baechle
754ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
755ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
756ade299d8SYoichi Yuasa	select BOOT_ELF32
757ade299d8SYoichi Yuasa	select DMA_COHERENT
758ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
759ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
760ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
761ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
762ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
763ade299d8SYoichi Yuasa
764ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
765ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
766ade299d8SYoichi Yuasa	select BOOT_ELF32
767ade299d8SYoichi Yuasa	select DMA_COHERENT
768fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
769ade299d8SYoichi Yuasa	select SIBYTE_SB1250
770ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
771ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
772ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
773ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
774ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
775cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
776ade299d8SYoichi Yuasa
777ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
778ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
779ade299d8SYoichi Yuasa	select BOOT_ELF32
780ade299d8SYoichi Yuasa	select DMA_COHERENT
781fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
782ade299d8SYoichi Yuasa	select SIBYTE_SB1250
783ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
784ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
785ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
786ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
787ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
788ade299d8SYoichi Yuasa
789ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
790ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
791ade299d8SYoichi Yuasa	select BOOT_ELF32
792ade299d8SYoichi Yuasa	select DMA_COHERENT
793ade299d8SYoichi Yuasa	select SIBYTE_SB1250
794ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
795ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
796ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
797ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
798ade299d8SYoichi Yuasa
799ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
800ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
801ade299d8SYoichi Yuasa	select BOOT_ELF32
802ade299d8SYoichi Yuasa	select DMA_COHERENT
803ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
804ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
805ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
806ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
807ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
808651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
809ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
810cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
811ade299d8SYoichi Yuasa
81214b36af4SThomas Bogendoerferconfig SNI_RM
81314b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
8140e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
8150e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
816aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
8175e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
8185e83d430SRalf Baechle	select BOOT_ELF32
81942f77542SRalf Baechle	select CEVT_R4K
820940f6b48SRalf Baechle	select CSRC_R4K
821e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
8225e83d430SRalf Baechle	select DMA_NONCOHERENT
8235e83d430SRalf Baechle	select GENERIC_ISA_DMA
8248a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
8255e83d430SRalf Baechle	select HW_HAS_EISA
8265e83d430SRalf Baechle	select HW_HAS_PCI
82767e38cf2SRalf Baechle	select IRQ_MIPS_CPU
828d865bea4SRalf Baechle	select I8253
8295e83d430SRalf Baechle	select I8259
8305e83d430SRalf Baechle	select ISA
8314a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
8327cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
8334a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
834c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
8354a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
83636a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
837ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
8387d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
8394a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
8405e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
8415e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8421da177e4SLinus Torvalds	help
84314b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
84414b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
8455e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
8465e83d430SRalf Baechle	  support this machine type.
8471da177e4SLinus Torvalds
848edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
849edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
8505e83d430SRalf Baechle
851edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
852edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
85323fbee9dSRalf Baechle
85473b4390fSRalf Baechleconfig MIKROTIK_RB532
85573b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
85673b4390fSRalf Baechle	select CEVT_R4K
85773b4390fSRalf Baechle	select CSRC_R4K
85873b4390fSRalf Baechle	select DMA_NONCOHERENT
85973b4390fSRalf Baechle	select HW_HAS_PCI
86067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
86173b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
86273b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
86373b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
86473b4390fSRalf Baechle	select SWAP_IO_SPACE
86573b4390fSRalf Baechle	select BOOT_RAW
866d30a2b47SLinus Walleij	select GPIOLIB
867930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
86873b4390fSRalf Baechle	help
86973b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
87073b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
87173b4390fSRalf Baechle
8729ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
8739ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
874a86c7f72SDavid Daney	select CEVT_R4K
87534adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
876a86c7f72SDavid Daney	select DMA_COHERENT
877a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
878a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
879f65aad41SRalf Baechle	select EDAC_SUPPORT
880b01aec9bSBorislav Petkov	select EDAC_ATOMIC_SCRUB
88173569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
88273569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
883a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
8845e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
885e8635b48SDavid Daney	select HW_HAS_PCI
886f00e001eSDavid Daney	select ZONE_DMA32
887465aaed0SDavid Daney	select HOLES_IN_ZONE
888d30a2b47SLinus Walleij	select GPIOLIB
8896e511163SDavid Daney	select LIBFDT
8906e511163SDavid Daney	select USE_OF
8916e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
8926e511163SDavid Daney	select SYS_SUPPORTS_SMP
8936e511163SDavid Daney	select NR_CPUS_DEFAULT_16
894e326479fSAndrew Bresticker	select BUILTIN_DTB
8958c1e6b14SDavid Daney	select MTD_COMPLEX_MAPPINGS
896a86c7f72SDavid Daney	help
897a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
898a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
899a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
900a86c7f72SDavid Daney	  Some of the supported boards are:
901a86c7f72SDavid Daney		EBT3000
902a86c7f72SDavid Daney		EBH3000
903a86c7f72SDavid Daney		EBH3100
904a86c7f72SDavid Daney		Thunder
905a86c7f72SDavid Daney		Kodama
906a86c7f72SDavid Daney		Hikari
907a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
908a86c7f72SDavid Daney
9097f058e85SJayachandran Cconfig NLM_XLR_BOARD
9107f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
9117f058e85SJayachandran C	select BOOT_ELF32
9127f058e85SJayachandran C	select NLM_COMMON
9137f058e85SJayachandran C	select SYS_HAS_CPU_XLR
9147f058e85SJayachandran C	select SYS_SUPPORTS_SMP
9157f058e85SJayachandran C	select HW_HAS_PCI
9167f058e85SJayachandran C	select SWAP_IO_SPACE
9177f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9187f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
91934adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
9207f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9217f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9227f058e85SJayachandran C	select DMA_COHERENT
9237f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
9247f058e85SJayachandran C	select CEVT_R4K
9257f058e85SJayachandran C	select CSRC_R4K
92667e38cf2SRalf Baechle	select IRQ_MIPS_CPU
927b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9287f058e85SJayachandran C	select SYNC_R4K
9297f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
9308f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9318f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9327f058e85SJayachandran C	help
9337f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
9347f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
9357f058e85SJayachandran C
9361c773ea4SJayachandran Cconfig NLM_XLP_BOARD
9371c773ea4SJayachandran C	bool "Netlogic XLP based systems"
9381c773ea4SJayachandran C	select BOOT_ELF32
9391c773ea4SJayachandran C	select NLM_COMMON
9401c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
9411c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
9421c773ea4SJayachandran C	select HW_HAS_PCI
9431c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9441c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
94534adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
946d30a2b47SLinus Walleij	select GPIOLIB
9471c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9481c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
9491c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9501c773ea4SJayachandran C	select DMA_COHERENT
9511c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
9521c773ea4SJayachandran C	select CEVT_R4K
9531c773ea4SJayachandran C	select CSRC_R4K
95467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
955b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9561c773ea4SJayachandran C	select SYNC_R4K
9571c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
9582f6528e1SJayachandran C	select USE_OF
9598f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9608f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9611c773ea4SJayachandran C	help
9621c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
9631c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
9641c773ea4SJayachandran C
9659bc463beSDavid Daneyconfig MIPS_PARAVIRT
9669bc463beSDavid Daney	bool "Para-Virtualized guest system"
9679bc463beSDavid Daney	select CEVT_R4K
9689bc463beSDavid Daney	select CSRC_R4K
9699bc463beSDavid Daney	select DMA_COHERENT
9709bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
9719bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
9729bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
9739bc463beSDavid Daney	select SYS_SUPPORTS_SMP
9749bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
9759bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
9769bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
9779bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
9789bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
9799bc463beSDavid Daney	select HW_HAS_PCI
9809bc463beSDavid Daney	select SWAP_IO_SPACE
9819bc463beSDavid Daney	help
9829bc463beSDavid Daney	  This option supports guest running under ????
9839bc463beSDavid Daney
9841da177e4SLinus Torvaldsendchoice
9851da177e4SLinus Torvalds
986e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
9873b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
988d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
989a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
990e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
9918945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig"
9925e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
9935ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
9948ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
9951f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
9962572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig"
997af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig"
9980f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
999ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
100029c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
100138b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
100222b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
10035e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
1004a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
100530ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig"
100630ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig"
10077f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
1008ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
10099937f5ffSZubair Lutfullah Kakakhelsource "arch/mips/xilfpga/Kconfig"
101038b18f72SRalf Baechle
10115e83d430SRalf Baechleendmenu
10125e83d430SRalf Baechle
10131da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
10141da177e4SLinus Torvalds	bool
10151da177e4SLinus Torvalds	default y
10161da177e4SLinus Torvalds
10171da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
10181da177e4SLinus Torvalds	bool
10191da177e4SLinus Torvalds
1020f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
1021f0d1b0b3SDavid Howells	bool
1022f0d1b0b3SDavid Howells	default n
1023f0d1b0b3SDavid Howells
1024f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
1025f0d1b0b3SDavid Howells	bool
1026f0d1b0b3SDavid Howells	default n
1027f0d1b0b3SDavid Howells
10283c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
10293c9ee7efSAkinobu Mita	bool
10303c9ee7efSAkinobu Mita	default y
10313c9ee7efSAkinobu Mita
10321da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
10331da177e4SLinus Torvalds	bool
10341da177e4SLinus Torvalds	default y
10351da177e4SLinus Torvalds
1036ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
10371cc89038SAtsushi Nemoto	bool
10381cc89038SAtsushi Nemoto	default y
10391cc89038SAtsushi Nemoto
10401da177e4SLinus Torvalds#
10411da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
10421da177e4SLinus Torvalds#
10430e2794b0SRalf Baechleconfig FW_ARC
10441da177e4SLinus Torvalds	bool
10451da177e4SLinus Torvalds
104661ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
104761ed242dSRalf Baechle	bool
104861ed242dSRalf Baechle
10499267a30dSMarc St-Jeanconfig BOOT_RAW
10509267a30dSMarc St-Jean	bool
10519267a30dSMarc St-Jean
1052217dd11eSRalf Baechleconfig CEVT_BCM1480
1053217dd11eSRalf Baechle	bool
1054217dd11eSRalf Baechle
10556457d9fcSYoichi Yuasaconfig CEVT_DS1287
10566457d9fcSYoichi Yuasa	bool
10576457d9fcSYoichi Yuasa
10581097c6acSYoichi Yuasaconfig CEVT_GT641XX
10591097c6acSYoichi Yuasa	bool
10601097c6acSYoichi Yuasa
106142f77542SRalf Baechleconfig CEVT_R4K
106242f77542SRalf Baechle	bool
106342f77542SRalf Baechle
1064217dd11eSRalf Baechleconfig CEVT_SB1250
1065217dd11eSRalf Baechle	bool
1066217dd11eSRalf Baechle
1067229f773eSAtsushi Nemotoconfig CEVT_TXX9
1068229f773eSAtsushi Nemoto	bool
1069229f773eSAtsushi Nemoto
1070217dd11eSRalf Baechleconfig CSRC_BCM1480
1071217dd11eSRalf Baechle	bool
1072217dd11eSRalf Baechle
10734247417dSYoichi Yuasaconfig CSRC_IOASIC
10744247417dSYoichi Yuasa	bool
10754247417dSYoichi Yuasa
1076940f6b48SRalf Baechleconfig CSRC_R4K
1077940f6b48SRalf Baechle	bool
1078940f6b48SRalf Baechle
1079217dd11eSRalf Baechleconfig CSRC_SB1250
1080217dd11eSRalf Baechle	bool
1081217dd11eSRalf Baechle
1082a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL
1083a7f4df4eSAlex Smith	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1084a7f4df4eSAlex Smith
1085a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
1086d30a2b47SLinus Walleij	select GPIOLIB
1087a9aec7feSAtsushi Nemoto	bool
1088a9aec7feSAtsushi Nemoto
10890e2794b0SRalf Baechleconfig FW_CFE
1090df78b5c8SAurelien Jarno	bool
1091df78b5c8SAurelien Jarno
10924bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
109334adb28dSRalf Baechle	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
10944bafad92SFUJITA Tomonori
109540e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES
109640e084a5SRalf Baechle	bool
109740e084a5SRalf Baechle
1098885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1099885014bcSFelix Fietkau	select DMA_NONCOHERENT
1100885014bcSFelix Fietkau	bool
1101885014bcSFelix Fietkau
11021da177e4SLinus Torvaldsconfig DMA_COHERENT
11031da177e4SLinus Torvalds	bool
11041da177e4SLinus Torvalds
11051da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
11061da177e4SLinus Torvalds	bool
1107e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
11084ce588cdSRalf Baechle
1109e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
11104ce588cdSRalf Baechle	bool
11111da177e4SLinus Torvalds
111236a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
11131da177e4SLinus Torvalds	bool
11141da177e4SLinus Torvalds
11151b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1116dbb74540SRalf Baechle	bool
1117dbb74540SRalf Baechle
11181da177e4SLinus Torvaldsconfig MIPS_BONITO64
11191da177e4SLinus Torvalds	bool
11201da177e4SLinus Torvalds
11211da177e4SLinus Torvaldsconfig MIPS_MSC
11221da177e4SLinus Torvalds	bool
11231da177e4SLinus Torvalds
11241f21d2bdSBrian Murphyconfig MIPS_NILE4
11251f21d2bdSBrian Murphy	bool
11261f21d2bdSBrian Murphy
112739b8d525SRalf Baechleconfig SYNC_R4K
112839b8d525SRalf Baechle	bool
112939b8d525SRalf Baechle
1130487d70d0SGabor Juhosconfig MIPS_MACHINE
1131487d70d0SGabor Juhos	def_bool n
1132487d70d0SGabor Juhos
1133ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1134d388d685SMaciej W. Rozycki	def_bool n
1135d388d685SMaciej W. Rozycki
11364e0748f5SMarkos Chandrasconfig GENERIC_CSUM
11374e0748f5SMarkos Chandras	bool
11384e0748f5SMarkos Chandras
11398313da30SRalf Baechleconfig GENERIC_ISA_DMA
11408313da30SRalf Baechle	bool
11418313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1142a35bee8aSNamhyung Kim	select ISA_DMA_API
11438313da30SRalf Baechle
1144aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1145aa414dffSRalf Baechle	bool
11468313da30SRalf Baechle	select GENERIC_ISA_DMA
1147aa414dffSRalf Baechle
1148a35bee8aSNamhyung Kimconfig ISA_DMA_API
1149a35bee8aSNamhyung Kim	bool
1150a35bee8aSNamhyung Kim
1151465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1152465aaed0SDavid Daney	bool
1153465aaed0SDavid Daney
11548c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE
11558c530ea3SMatt Redfearn	bool
11568c530ea3SMatt Redfearn	help
11578c530ea3SMatt Redfearn	 Selected if the platform supports relocating the kernel.
11588c530ea3SMatt Redfearn	 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
11598c530ea3SMatt Redfearn	 to allow access to command line and entropy sources.
11608c530ea3SMatt Redfearn
11615e83d430SRalf Baechle#
11626b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
11635e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
11645e83d430SRalf Baechle# choice statement should be more obvious to the user.
11655e83d430SRalf Baechle#
11665e83d430SRalf Baechlechoice
11676b2aac42SMasanari Iida	prompt "Endianness selection"
11681da177e4SLinus Torvalds	help
11691da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
11705e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
11713cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
11725e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
11733dde6ad8SDavid Sterba	  one or the other endianness.
11745e83d430SRalf Baechle
11755e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
11765e83d430SRalf Baechle	bool "Big endian"
11775e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
11785e83d430SRalf Baechle
11795e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
11805e83d430SRalf Baechle	bool "Little endian"
11815e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
11825e83d430SRalf Baechle
11835e83d430SRalf Baechleendchoice
11845e83d430SRalf Baechle
118522b0763aSDavid Daneyconfig EXPORT_UASM
118622b0763aSDavid Daney	bool
118722b0763aSDavid Daney
11882116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
11892116245eSRalf Baechle	bool
11902116245eSRalf Baechle
11915e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
11925e83d430SRalf Baechle	bool
11935e83d430SRalf Baechle
11945e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
11955e83d430SRalf Baechle	bool
11961da177e4SLinus Torvalds
11979cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
11989cffd154SDavid Daney	bool
11999cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
12009cffd154SDavid Daney	default y
12019cffd154SDavid Daney
1202aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1203aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1204aa1762f4SDavid Daney
12051da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
12061da177e4SLinus Torvalds	bool
12071da177e4SLinus Torvalds
12089267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
12099267a30dSMarc St-Jean	bool
12109267a30dSMarc St-Jean
12119267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
12129267a30dSMarc St-Jean	bool
12139267a30dSMarc St-Jean
12148420fd00SAtsushi Nemotoconfig IRQ_TXX9
12158420fd00SAtsushi Nemoto	bool
12168420fd00SAtsushi Nemoto
1217d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1218d5ab1a69SYoichi Yuasa	bool
1219d5ab1a69SYoichi Yuasa
1220252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
12211da177e4SLinus Torvalds	bool
12221da177e4SLinus Torvalds
12239267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
12249267a30dSMarc St-Jean	bool
12259267a30dSMarc St-Jean
1226a83860c2SRalf Baechleconfig SOC_EMMA2RH
1227a83860c2SRalf Baechle	bool
1228a83860c2SRalf Baechle	select CEVT_R4K
1229a83860c2SRalf Baechle	select CSRC_R4K
1230a83860c2SRalf Baechle	select DMA_NONCOHERENT
123167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1232a83860c2SRalf Baechle	select SWAP_IO_SPACE
1233a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1234a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1235a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1236a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1237a83860c2SRalf Baechle
1238edb6310aSDaniel Lairdconfig SOC_PNX833X
1239edb6310aSDaniel Laird	bool
1240edb6310aSDaniel Laird	select CEVT_R4K
1241edb6310aSDaniel Laird	select CSRC_R4K
124267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1243edb6310aSDaniel Laird	select DMA_NONCOHERENT
1244edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1245edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1246edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1247edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1248377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1249edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1250edb6310aSDaniel Laird
1251edb6310aSDaniel Lairdconfig SOC_PNX8335
1252edb6310aSDaniel Laird	bool
1253edb6310aSDaniel Laird	select SOC_PNX833X
1254edb6310aSDaniel Laird
1255a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1256a7e07b1aSMarkos Chandras	bool
1257a7e07b1aSMarkos Chandras
12581da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
12591da177e4SLinus Torvalds	bool
12601da177e4SLinus Torvalds
1261e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1262e2defae5SThomas Bogendoerfer	bool
1263e2defae5SThomas Bogendoerfer
12645b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
12655b438c44SThomas Bogendoerfer	bool
12665b438c44SThomas Bogendoerfer
1267e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1268e2defae5SThomas Bogendoerfer	bool
1269e2defae5SThomas Bogendoerfer
1270e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1271e2defae5SThomas Bogendoerfer	bool
1272e2defae5SThomas Bogendoerfer
1273e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1274e2defae5SThomas Bogendoerfer	bool
1275e2defae5SThomas Bogendoerfer
1276e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1277e2defae5SThomas Bogendoerfer	bool
1278e2defae5SThomas Bogendoerfer
1279e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1280e2defae5SThomas Bogendoerfer	bool
1281e2defae5SThomas Bogendoerfer
12820e2794b0SRalf Baechleconfig FW_ARC32
12835e83d430SRalf Baechle	bool
12845e83d430SRalf Baechle
1285aaa9fad3SPaul Bolleconfig FW_SNIPROM
1286231a35d3SThomas Bogendoerfer	bool
1287231a35d3SThomas Bogendoerfer
12881da177e4SLinus Torvaldsconfig BOOT_ELF32
12891da177e4SLinus Torvalds	bool
12901da177e4SLinus Torvalds
1291930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1292930beb5aSFlorian Fainelli	bool
1293930beb5aSFlorian Fainelli
1294930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1295930beb5aSFlorian Fainelli	bool
1296930beb5aSFlorian Fainelli
1297930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1298930beb5aSFlorian Fainelli	bool
1299930beb5aSFlorian Fainelli
1300930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1301930beb5aSFlorian Fainelli	bool
1302930beb5aSFlorian Fainelli
13031da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
13041da177e4SLinus Torvalds	int
1305a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
13065432eeb6SKevin Cernekee	default "6" if MIPS_L1_CACHE_SHIFT_6
13075432eeb6SKevin Cernekee	default "5" if MIPS_L1_CACHE_SHIFT_5
13085432eeb6SKevin Cernekee	default "4" if MIPS_L1_CACHE_SHIFT_4
13091da177e4SLinus Torvalds	default "5"
13101da177e4SLinus Torvalds
13111da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
13121da177e4SLinus Torvalds	bool
13131da177e4SLinus Torvalds
13141da177e4SLinus Torvaldsconfig ARC_CONSOLE
13151da177e4SLinus Torvalds	bool "ARC console support"
1316e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
13171da177e4SLinus Torvalds
13181da177e4SLinus Torvaldsconfig ARC_MEMORY
13191da177e4SLinus Torvalds	bool
132014b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
13211da177e4SLinus Torvalds	default y
13221da177e4SLinus Torvalds
13231da177e4SLinus Torvaldsconfig ARC_PROMLIB
13241da177e4SLinus Torvalds	bool
1325e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
13261da177e4SLinus Torvalds	default y
13271da177e4SLinus Torvalds
13280e2794b0SRalf Baechleconfig FW_ARC64
13291da177e4SLinus Torvalds	bool
13301da177e4SLinus Torvalds
13311da177e4SLinus Torvaldsconfig BOOT_ELF64
13321da177e4SLinus Torvalds	bool
13331da177e4SLinus Torvalds
13341da177e4SLinus Torvaldsmenu "CPU selection"
13351da177e4SLinus Torvalds
13361da177e4SLinus Torvaldschoice
13371da177e4SLinus Torvalds	prompt "CPU type"
13381da177e4SLinus Torvalds	default CPU_R4X00
13391da177e4SLinus Torvalds
13400e476d91SHuacai Chenconfig CPU_LOONGSON3
13410e476d91SHuacai Chen	bool "Loongson 3 CPU"
13420e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
13430e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
13440e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
13450e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
13460e476d91SHuacai Chen	select WEAK_ORDERING
13470e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
1348b2edcfc8SHuacai Chen	select MIPS_PGD_C0_CONTEXT
1349d30a2b47SLinus Walleij	select GPIOLIB
13500e476d91SHuacai Chen	help
13510e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
13520e476d91SHuacai Chen		set with many extensions.
13530e476d91SHuacai Chen
13541e820da3SHuacai Chenconfig LOONGSON3_ENHANCEMENT
13551e820da3SHuacai Chen	bool "New Loongson 3 CPU Enhancements"
13561e820da3SHuacai Chen	default n
13571e820da3SHuacai Chen	select CPU_MIPSR2
13581e820da3SHuacai Chen	select CPU_HAS_PREFETCH
13591e820da3SHuacai Chen	depends on CPU_LOONGSON3
13601e820da3SHuacai Chen	help
13611e820da3SHuacai Chen	  New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
13621e820da3SHuacai Chen	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
13631e820da3SHuacai Chen	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
13641e820da3SHuacai Chen	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
13651e820da3SHuacai Chen	  Fast TLB refill support, etc.
13661e820da3SHuacai Chen
13671e820da3SHuacai Chen	  This option enable those enhancements which are not probed at run
13681e820da3SHuacai Chen	  time. If you want a generic kernel to run on all Loongson 3 machines,
13691e820da3SHuacai Chen	  please say 'N' here. If you want a high-performance kernel to run on
13701e820da3SHuacai Chen	  new Loongson 3 machines only, please say 'Y' here.
13711e820da3SHuacai Chen
13723702bba5SWu Zhangjinconfig CPU_LOONGSON2E
13733702bba5SWu Zhangjin	bool "Loongson 2E"
13743702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
13753702bba5SWu Zhangjin	select CPU_LOONGSON2
13762a21c730SFuxin Zhang	help
13772a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
13782a21c730SFuxin Zhang	  with many extensions.
13792a21c730SFuxin Zhang
138025985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
13816f7a251aSWu Zhangjin	  bonito64.
13826f7a251aSWu Zhangjin
13836f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
13846f7a251aSWu Zhangjin	bool "Loongson 2F"
13856f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
13866f7a251aSWu Zhangjin	select CPU_LOONGSON2
1387d30a2b47SLinus Walleij	select GPIOLIB
13886f7a251aSWu Zhangjin	help
13896f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
13906f7a251aSWu Zhangjin	  with many extensions.
13916f7a251aSWu Zhangjin
13926f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
13936f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
13946f7a251aSWu Zhangjin	  Loongson2E.
13956f7a251aSWu Zhangjin
1396ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1397ca585cf9SKelvin Cheung	bool "Loongson 1B"
1398ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1399ca585cf9SKelvin Cheung	select CPU_LOONGSON1
14009ec88b60SKelvin Cheung	select LEDS_GPIO_REGISTER
1401ca585cf9SKelvin Cheung	help
1402ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1403ca585cf9SKelvin Cheung	  release 2 instruction set.
1404ca585cf9SKelvin Cheung
1405*12e3280bSYang Lingconfig CPU_LOONGSON1C
1406*12e3280bSYang Ling	bool "Loongson 1C"
1407*12e3280bSYang Ling	depends on SYS_HAS_CPU_LOONGSON1C
1408*12e3280bSYang Ling	select CPU_LOONGSON1
1409*12e3280bSYang Ling	select ARCH_WANT_OPTIONAL_GPIOLIB
1410*12e3280bSYang Ling	select LEDS_GPIO_REGISTER
1411*12e3280bSYang Ling	help
1412*12e3280bSYang Ling	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1413*12e3280bSYang Ling	  release 2 instruction set.
1414*12e3280bSYang Ling
14156e760c8dSRalf Baechleconfig CPU_MIPS32_R1
14166e760c8dSRalf Baechle	bool "MIPS32 Release 1"
14177cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
14186e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1419797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1420ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14216e760c8dSRalf Baechle	help
14225e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
14231e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
14241e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
14251e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
14261e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
14271e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
14281e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
14291e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
14301e5f1caaSRalf Baechle	  performance.
14311e5f1caaSRalf Baechle
14321e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
14331e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
14347cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
14351e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1436797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1437ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1438a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14392235a54dSSanjay Lal	select HAVE_KVM
14401e5f1caaSRalf Baechle	help
14415e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14426e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
14436e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
14446e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14456e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
14461da177e4SLinus Torvalds
14477fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
1448674d10e2SMarkos Chandras	bool "MIPS32 Release 6"
14497fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
14507fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14517fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14527fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14537fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14544e0748f5SMarkos Chandras	select GENERIC_CSUM
14557fd08ca5SLeonid Yegoshin	select HAVE_KVM
14567fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
14577fd08ca5SLeonid Yegoshin	help
14587fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14597fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
14607fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
14617fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
14627fd08ca5SLeonid Yegoshin
14636e760c8dSRalf Baechleconfig CPU_MIPS64_R1
14646e760c8dSRalf Baechle	bool "MIPS64 Release 1"
14657cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1466797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1467ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1468ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1469ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14709cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
14716e760c8dSRalf Baechle	help
14726e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
14736e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14746e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14756e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14766e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14771e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
14781e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
14791e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
14801e5f1caaSRalf Baechle	  performance.
14811e5f1caaSRalf Baechle
14821e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
14831e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
14847cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1485797798c1SRalf Baechle	select CPU_HAS_PREFETCH
14861e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
14871e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1488ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14899cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1490a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
149140a2df49SJames Hogan	select HAVE_KVM
14921e5f1caaSRalf Baechle	help
14931e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14941e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14951e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14961e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
14971e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14981da177e4SLinus Torvalds
14997fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
1500674d10e2SMarkos Chandras	bool "MIPS64 Release 6"
15017fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
15027fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
15037fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
15047fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
15057fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
15067fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
15074e0748f5SMarkos Chandras	select GENERIC_CSUM
15084e9d324dSPaul Burton	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
150940a2df49SJames Hogan	select HAVE_KVM
15107fd08ca5SLeonid Yegoshin	help
15117fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
15127fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
15137fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
15147fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
15157fd08ca5SLeonid Yegoshin
15161da177e4SLinus Torvaldsconfig CPU_R3000
15171da177e4SLinus Torvalds	bool "R3000"
15187cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1519f7062ddbSRalf Baechle	select CPU_HAS_WB
1520ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1521797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
15221da177e4SLinus Torvalds	help
15231da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
15241da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
15251da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
15261da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
15271da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
15281da177e4SLinus Torvalds	  try to recompile with R3000.
15291da177e4SLinus Torvalds
15301da177e4SLinus Torvaldsconfig CPU_TX39XX
15311da177e4SLinus Torvalds	bool "R39XX"
15327cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1533ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
15341da177e4SLinus Torvalds
15351da177e4SLinus Torvaldsconfig CPU_VR41XX
15361da177e4SLinus Torvalds	bool "R41xx"
15377cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1538ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1539ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15401da177e4SLinus Torvalds	help
15415e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
15421da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
15431da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
15441da177e4SLinus Torvalds	  processor or vice versa.
15451da177e4SLinus Torvalds
15461da177e4SLinus Torvaldsconfig CPU_R4300
15471da177e4SLinus Torvalds	bool "R4300"
15487cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1549ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1550ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15511da177e4SLinus Torvalds	help
15521da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
15531da177e4SLinus Torvalds
15541da177e4SLinus Torvaldsconfig CPU_R4X00
15551da177e4SLinus Torvalds	bool "R4x00"
15567cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1557ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1558ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1559970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15601da177e4SLinus Torvalds	help
15611da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
15621da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
15631da177e4SLinus Torvalds
15641da177e4SLinus Torvaldsconfig CPU_TX49XX
15651da177e4SLinus Torvalds	bool "R49XX"
15667cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1567de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1568ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1569ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1570970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15711da177e4SLinus Torvalds
15721da177e4SLinus Torvaldsconfig CPU_R5000
15731da177e4SLinus Torvalds	bool "R5000"
15747cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1575ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1576ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1577970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15781da177e4SLinus Torvalds	help
15791da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
15801da177e4SLinus Torvalds
15811da177e4SLinus Torvaldsconfig CPU_R5432
15821da177e4SLinus Torvalds	bool "R5432"
15837cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
15845e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
15855e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1586970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15871da177e4SLinus Torvalds
1588542c1020SShinya Kuribayashiconfig CPU_R5500
1589542c1020SShinya Kuribayashi	bool "R5500"
1590542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1591542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1592542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
15939cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1594542c1020SShinya Kuribayashi	help
1595542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1596542c1020SShinya Kuribayashi	  instruction set.
1597542c1020SShinya Kuribayashi
15981da177e4SLinus Torvaldsconfig CPU_R6000
15991da177e4SLinus Torvalds	bool "R6000"
16007cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1601ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
16021da177e4SLinus Torvalds	help
16031da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1604c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
16051da177e4SLinus Torvalds
16061da177e4SLinus Torvaldsconfig CPU_NEVADA
16071da177e4SLinus Torvalds	bool "RM52xx"
16087cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1609ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1610ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1611970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16121da177e4SLinus Torvalds	help
16131da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
16141da177e4SLinus Torvalds
16151da177e4SLinus Torvaldsconfig CPU_R8000
16161da177e4SLinus Torvalds	bool "R8000"
16177cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
16185e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1619ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
16201da177e4SLinus Torvalds	help
16211da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
16221da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
16231da177e4SLinus Torvalds
16241da177e4SLinus Torvaldsconfig CPU_R10000
16251da177e4SLinus Torvalds	bool "R10000"
16267cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
16275e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1628ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1629ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1630797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1631970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16321da177e4SLinus Torvalds	help
16331da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
16341da177e4SLinus Torvalds
16351da177e4SLinus Torvaldsconfig CPU_RM7000
16361da177e4SLinus Torvalds	bool "RM7000"
16377cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
16385e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1639ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1640ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1641797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1642970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16431da177e4SLinus Torvalds
16441da177e4SLinus Torvaldsconfig CPU_SB1
16451da177e4SLinus Torvalds	bool "SB1"
16467cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1647ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1648ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1649797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1650970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16510004a9dfSRalf Baechle	select WEAK_ORDERING
16521da177e4SLinus Torvalds
1653a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1654a86c7f72SDavid Daney	bool "Cavium Octeon processor"
16555e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1656a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1657a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1658a86c7f72SDavid Daney	select WEAK_ORDERING
1659a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
16609cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1661df115f3eSBen Hutchings	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1662df115f3eSBen Hutchings	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1663930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
1664a86c7f72SDavid Daney	help
1665a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1666a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1667a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1668a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1669a86c7f72SDavid Daney
1670cd746249SJonas Gorskiconfig CPU_BMIPS
1671cd746249SJonas Gorski	bool "Broadcom BMIPS"
1672cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1673cd746249SJonas Gorski	select CPU_MIPS32
1674fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1675cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1676cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1677cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1678cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1679cd746249SJonas Gorski	select DMA_NONCOHERENT
168067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1681cd746249SJonas Gorski	select SWAP_IO_SPACE
1682cd746249SJonas Gorski	select WEAK_ORDERING
1683c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
168469aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1685c1c0c461SKevin Cernekee	help
1686fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1687c1c0c461SKevin Cernekee
16887f058e85SJayachandran Cconfig CPU_XLR
16897f058e85SJayachandran C	bool "Netlogic XLR SoC"
16907f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
16917f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16927f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16937f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1694970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16957f058e85SJayachandran C	select WEAK_ORDERING
16967f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
16977f058e85SJayachandran C	help
16987f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
16991c773ea4SJayachandran C
17001c773ea4SJayachandran Cconfig CPU_XLP
17011c773ea4SJayachandran C	bool "Netlogic XLP SoC"
17021c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
17031c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
17041c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
17051c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
17061c773ea4SJayachandran C	select WEAK_ORDERING
17071c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
17081c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1709d6504846SJayachandran C	select CPU_MIPSR2
1710ddba6833SPrem Mallappa	select CPU_SUPPORTS_HUGEPAGES
17112db003a5SPaul Burton	select MIPS_ASID_BITS_VARIABLE
17121c773ea4SJayachandran C	help
17131c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
17141da177e4SLinus Torvaldsendchoice
17151da177e4SLinus Torvalds
1716a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1717a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1718a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
17197fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1720a6e18781SLeonid Yegoshin	help
1721a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1722a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1723a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1724a6e18781SLeonid Yegoshin
1725a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1726a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1727a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1728a6e18781SLeonid Yegoshin	select EVA
1729a6e18781SLeonid Yegoshin	default y
1730a6e18781SLeonid Yegoshin	help
1731a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1732a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1733a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1734a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1735a6e18781SLeonid Yegoshin
1736c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES
1737c5b36783SSteven J. Hill	bool "MIPS32 Release 5 Features"
1738c5b36783SSteven J. Hill	depends on SYS_HAS_CPU_MIPS32_R5
1739c5b36783SSteven J. Hill	depends on CPU_MIPS32_R2
1740c5b36783SSteven J. Hill	help
1741c5b36783SSteven J. Hill	  Choose this option to build a kernel for release 2 or later of the
1742c5b36783SSteven J. Hill	  MIPS32 architecture including features from release 5 such as
1743c5b36783SSteven J. Hill	  support for Extended Physical Addressing (XPA).
1744c5b36783SSteven J. Hill
1745c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA
1746c5b36783SSteven J. Hill	bool "Extended Physical Addressing (XPA)"
1747c5b36783SSteven J. Hill	depends on CPU_MIPS32_R5_FEATURES
1748c5b36783SSteven J. Hill	depends on !EVA
1749c5b36783SSteven J. Hill	depends on !PAGE_SIZE_4KB
1750c5b36783SSteven J. Hill	depends on SYS_SUPPORTS_HIGHMEM
1751c5b36783SSteven J. Hill	select XPA
1752c5b36783SSteven J. Hill	select HIGHMEM
1753c5b36783SSteven J. Hill	select ARCH_PHYS_ADDR_T_64BIT
1754c5b36783SSteven J. Hill	default n
1755c5b36783SSteven J. Hill	help
1756c5b36783SSteven J. Hill	  Choose this option if you want to enable the Extended Physical
1757c5b36783SSteven J. Hill	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1758c5b36783SSteven J. Hill	  benefit is to increase physical addressing equal to or greater
1759c5b36783SSteven J. Hill	  than 40 bits. Note that this has the side effect of turning on
1760c5b36783SSteven J. Hill	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1761c5b36783SSteven J. Hill	  If unsure, say 'N' here.
1762c5b36783SSteven J. Hill
1763622844bfSWu Zhangjinif CPU_LOONGSON2F
1764622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1765622844bfSWu Zhangjin	bool
1766622844bfSWu Zhangjin
1767622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1768622844bfSWu Zhangjin	bool
1769622844bfSWu Zhangjin
1770622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1771622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1772622844bfSWu Zhangjin	default y
1773622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1774622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1775622844bfSWu Zhangjin	help
1776622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1777622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1778622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1779622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1780622844bfSWu Zhangjin
1781622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1782622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1783622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1784622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1785622844bfSWu Zhangjin	  systems.
1786622844bfSWu Zhangjin
1787622844bfSWu Zhangjin	  If unsure, please say Y.
1788622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1789622844bfSWu Zhangjin
17901b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
17911b93b3c3SWu Zhangjin	bool
17921b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
17931b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
179431c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
17951b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1796fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
17974e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
17981b93b3c3SWu Zhangjin
17991b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
18001b93b3c3SWu Zhangjin	bool
18011b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
18021b93b3c3SWu Zhangjin
1803dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM
1804dbb98314SAlban Bedel	bool
1805dbb98314SAlban Bedel	select SYS_SUPPORTS_ZBOOT
1806dbb98314SAlban Bedel
18073702bba5SWu Zhangjinconfig CPU_LOONGSON2
18083702bba5SWu Zhangjin	bool
18093702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
18103702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
18113702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1812970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
18133702bba5SWu Zhangjin
1814ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1815ca585cf9SKelvin Cheung	bool
1816ca585cf9SKelvin Cheung	select CPU_MIPS32
1817ca585cf9SKelvin Cheung	select CPU_MIPSR2
1818ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1819ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1820ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1821f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1822ca585cf9SKelvin Cheung
1823fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
182404fa8bf7SJonas Gorski	select SMP_UP if SMP
18251bbb6c1bSKevin Cernekee	bool
1826cd746249SJonas Gorski
1827cd746249SJonas Gorskiconfig CPU_BMIPS4350
1828cd746249SJonas Gorski	bool
1829cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1830cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1831cd746249SJonas Gorski
1832cd746249SJonas Gorskiconfig CPU_BMIPS4380
1833cd746249SJonas Gorski	bool
1834bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1835cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1836cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1837b4720809SFlorian Fainelli	select CPU_HAS_RIXI
1838cd746249SJonas Gorski
1839cd746249SJonas Gorskiconfig CPU_BMIPS5000
1840cd746249SJonas Gorski	bool
1841cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1842bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1843cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1844cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1845b4720809SFlorian Fainelli	select CPU_HAS_RIXI
18461bbb6c1bSKevin Cernekee
18470e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
18480e476d91SHuacai Chen	bool
18490e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
1850b2edcfc8SHuacai Chen	select CPU_HAS_RIXI
18510e476d91SHuacai Chen
18523702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
18532a21c730SFuxin Zhang	bool
18542a21c730SFuxin Zhang
18556f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
18566f7a251aSWu Zhangjin	bool
185755045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
185855045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
185922f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
18606f7a251aSWu Zhangjin
1861ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1862ca585cf9SKelvin Cheung	bool
1863ca585cf9SKelvin Cheung
1864*12e3280bSYang Lingconfig SYS_HAS_CPU_LOONGSON1C
1865*12e3280bSYang Ling	bool
1866*12e3280bSYang Ling
18677cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
18687cf8053bSRalf Baechle	bool
18697cf8053bSRalf Baechle
18707cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
18717cf8053bSRalf Baechle	bool
18727cf8053bSRalf Baechle
1873a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1874a6e18781SLeonid Yegoshin	bool
1875a6e18781SLeonid Yegoshin
1876c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5
1877c5b36783SSteven J. Hill	bool
1878c5b36783SSteven J. Hill
18797fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
18807fd08ca5SLeonid Yegoshin	bool
18817fd08ca5SLeonid Yegoshin
18827cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
18837cf8053bSRalf Baechle	bool
18847cf8053bSRalf Baechle
18857cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
18867cf8053bSRalf Baechle	bool
18877cf8053bSRalf Baechle
18887fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
18897fd08ca5SLeonid Yegoshin	bool
18907fd08ca5SLeonid Yegoshin
18917cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
18927cf8053bSRalf Baechle	bool
18937cf8053bSRalf Baechle
18947cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
18957cf8053bSRalf Baechle	bool
18967cf8053bSRalf Baechle
18977cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
18987cf8053bSRalf Baechle	bool
18997cf8053bSRalf Baechle
19007cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
19017cf8053bSRalf Baechle	bool
19027cf8053bSRalf Baechle
19037cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
19047cf8053bSRalf Baechle	bool
19057cf8053bSRalf Baechle
19067cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
19077cf8053bSRalf Baechle	bool
19087cf8053bSRalf Baechle
19097cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
19107cf8053bSRalf Baechle	bool
19117cf8053bSRalf Baechle
19127cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
19137cf8053bSRalf Baechle	bool
19147cf8053bSRalf Baechle
1915542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1916542c1020SShinya Kuribayashi	bool
1917542c1020SShinya Kuribayashi
19187cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
19197cf8053bSRalf Baechle	bool
19207cf8053bSRalf Baechle
19217cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
19227cf8053bSRalf Baechle	bool
19237cf8053bSRalf Baechle
19247cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
19257cf8053bSRalf Baechle	bool
19267cf8053bSRalf Baechle
19277cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
19287cf8053bSRalf Baechle	bool
19297cf8053bSRalf Baechle
19307cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
19317cf8053bSRalf Baechle	bool
19327cf8053bSRalf Baechle
19337cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
19347cf8053bSRalf Baechle	bool
19357cf8053bSRalf Baechle
19365e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
19375e683389SDavid Daney	bool
19385e683389SDavid Daney
1939cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1940c1c0c461SKevin Cernekee	bool
1941c1c0c461SKevin Cernekee
1942fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1943c1c0c461SKevin Cernekee	bool
1944cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1945c1c0c461SKevin Cernekee
1946c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1947c1c0c461SKevin Cernekee	bool
1948cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1949c1c0c461SKevin Cernekee
1950c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1951c1c0c461SKevin Cernekee	bool
1952cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1953c1c0c461SKevin Cernekee
1954c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1955c1c0c461SKevin Cernekee	bool
1956cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1957c1c0c461SKevin Cernekee
19587f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
19597f058e85SJayachandran C	bool
19607f058e85SJayachandran C
19611c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
19621c773ea4SJayachandran C	bool
19631c773ea4SJayachandran C
1964b6911bbaSPaul Burtonconfig MIPS_MALTA_PM
1965b6911bbaSPaul Burton	depends on MIPS_MALTA
1966b6911bbaSPaul Burton	depends on PCI
1967b6911bbaSPaul Burton	bool
1968b6911bbaSPaul Burton	default y
1969b6911bbaSPaul Burton
197017099b11SRalf Baechle#
197117099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
197217099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
197317099b11SRalf Baechle#
19740004a9dfSRalf Baechleconfig WEAK_ORDERING
19750004a9dfSRalf Baechle	bool
197617099b11SRalf Baechle
197717099b11SRalf Baechle#
197817099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
197917099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
198017099b11SRalf Baechle#
198117099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
198217099b11SRalf Baechle	bool
19835e83d430SRalf Baechleendmenu
19845e83d430SRalf Baechle
19855e83d430SRalf Baechle#
19865e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
19875e83d430SRalf Baechle#
19885e83d430SRalf Baechleconfig CPU_MIPS32
19895e83d430SRalf Baechle	bool
19907fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
19915e83d430SRalf Baechle
19925e83d430SRalf Baechleconfig CPU_MIPS64
19935e83d430SRalf Baechle	bool
19947fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
19955e83d430SRalf Baechle
19965e83d430SRalf Baechle#
1997c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
19985e83d430SRalf Baechle#
19995e83d430SRalf Baechleconfig CPU_MIPSR1
20005e83d430SRalf Baechle	bool
20015e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
20025e83d430SRalf Baechle
20035e83d430SRalf Baechleconfig CPU_MIPSR2
20045e83d430SRalf Baechle	bool
2005a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
20068256b17eSFlorian Fainelli	select CPU_HAS_RIXI
2007a7e07b1aSMarkos Chandras	select MIPS_SPRAM
20085e83d430SRalf Baechle
20097fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
20107fd08ca5SLeonid Yegoshin	bool
20117fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
20128256b17eSFlorian Fainelli	select CPU_HAS_RIXI
201387321fddSPaul Burton	select HAVE_ARCH_BITREVERSE
20142db003a5SPaul Burton	select MIPS_ASID_BITS_VARIABLE
2015a7e07b1aSMarkos Chandras	select MIPS_SPRAM
20165e83d430SRalf Baechle
2017a6e18781SLeonid Yegoshinconfig EVA
2018a6e18781SLeonid Yegoshin	bool
2019a6e18781SLeonid Yegoshin
2020c5b36783SSteven J. Hillconfig XPA
2021c5b36783SSteven J. Hill	bool
2022c5b36783SSteven J. Hill
20235e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
20245e83d430SRalf Baechle	bool
20255e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
20265e83d430SRalf Baechle	bool
20275e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
20285e83d430SRalf Baechle	bool
20295e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
20305e83d430SRalf Baechle	bool
203155045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
203255045ff5SWu Zhangjin	bool
203355045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
203455045ff5SWu Zhangjin	bool
20359cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
20369cffd154SDavid Daney	bool
203722f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
203822f1fdfdSWu Zhangjin	bool
203982622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
204082622284SDavid Daney	bool
2041d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
20425e83d430SRalf Baechle
20438192c9eaSDavid Daney#
20448192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
20458192c9eaSDavid Daney#
20468192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
20478192c9eaSDavid Daney       bool
2048679eb637SJames Hogan       default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
20498192c9eaSDavid Daney
20505e83d430SRalf Baechlemenu "Kernel type"
20515e83d430SRalf Baechle
20525e83d430SRalf Baechlechoice
20535e83d430SRalf Baechle	prompt "Kernel code model"
20545e83d430SRalf Baechle	help
20555e83d430SRalf Baechle	  You should only select this option if you have a workload that
20565e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
20575e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
20585e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
20595e83d430SRalf Baechle
20605e83d430SRalf Baechleconfig 32BIT
20615e83d430SRalf Baechle	bool "32-bit kernel"
20625e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
20635e83d430SRalf Baechle	select TRAD_SIGNALS
20645e83d430SRalf Baechle	help
20655e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
2066f17c4ca3SRalf Baechle
20675e83d430SRalf Baechleconfig 64BIT
20685e83d430SRalf Baechle	bool "64-bit kernel"
20695e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
20705e83d430SRalf Baechle	help
20715e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
20725e83d430SRalf Baechle
20735e83d430SRalf Baechleendchoice
20745e83d430SRalf Baechle
20752235a54dSSanjay Lalconfig KVM_GUEST
20762235a54dSSanjay Lal	bool "KVM Guest Kernel"
2077f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
20782235a54dSSanjay Lal	help
2079caa1faa7SJames Hogan	  Select this option if building a guest kernel for KVM (Trap & Emulate)
2080caa1faa7SJames Hogan	  mode.
20812235a54dSSanjay Lal
2082eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
2083eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
20842235a54dSSanjay Lal	depends on KVM_GUEST
2085eda3d33cSJames Hogan	default 100
20862235a54dSSanjay Lal	help
2087eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
2088eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
2089eda3d33cSJames Hogan	  timer frequency is specified directly.
20902235a54dSSanjay Lal
20911e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48
20921e321fa9SLeonid Yegoshin	bool "48 bits virtual memory"
20931e321fa9SLeonid Yegoshin	depends on 64BIT
20941e321fa9SLeonid Yegoshin	help
20951e321fa9SLeonid Yegoshin	  Support a maximum at least 48 bits of application virtual memory.
20961e321fa9SLeonid Yegoshin	  Default is 40 bits or less, depending on the CPU.
20971e321fa9SLeonid Yegoshin	  This option result in a small memory overhead for page tables.
20981e321fa9SLeonid Yegoshin	  This option is only supported with 16k and 64k page sizes.
20991e321fa9SLeonid Yegoshin	  If unsure, say N.
21001e321fa9SLeonid Yegoshin
21011da177e4SLinus Torvaldschoice
21021da177e4SLinus Torvalds	prompt "Kernel page size"
21031da177e4SLinus Torvalds	default PAGE_SIZE_4KB
21041da177e4SLinus Torvalds
21051da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
21061da177e4SLinus Torvalds	bool "4kB"
21070e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
21081e321fa9SLeonid Yegoshin	depends on !MIPS_VA_BITS_48
21091da177e4SLinus Torvalds	help
21101da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
21111da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
21121da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
21131da177e4SLinus Torvalds	 recommended for low memory systems.
21141da177e4SLinus Torvalds
21151da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
21161da177e4SLinus Torvalds	bool "8kB"
21177d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
21181e321fa9SLeonid Yegoshin	depends on !MIPS_VA_BITS_48
21191da177e4SLinus Torvalds	help
21201da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
21211da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
2122c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
2123c52399beSRalf Baechle	  suitable Linux distribution to support this.
21241da177e4SLinus Torvalds
21251da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
21261da177e4SLinus Torvalds	bool "16kB"
2127714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
21281da177e4SLinus Torvalds	help
21291da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
21301da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
2131714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
2132714bfad6SRalf Baechle	  Linux distribution to support this.
21331da177e4SLinus Torvalds
2134c52399beSRalf Baechleconfig PAGE_SIZE_32KB
2135c52399beSRalf Baechle	bool "32kB"
2136c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
21371e321fa9SLeonid Yegoshin	depends on !MIPS_VA_BITS_48
2138c52399beSRalf Baechle	help
2139c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
2140c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
2141c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
2142c52399beSRalf Baechle	  distribution to support this.
2143c52399beSRalf Baechle
21441da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
21451da177e4SLinus Torvalds	bool "64kB"
214674c81ecdSRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
21471da177e4SLinus Torvalds	help
21481da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
21491da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
21501da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
2151714bfad6SRalf Baechle	  writing this option is still high experimental.
21521da177e4SLinus Torvalds
21531da177e4SLinus Torvaldsendchoice
21541da177e4SLinus Torvalds
2155c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
2156c9bace7cSDavid Daney	int "Maximum zone order"
2157e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2158e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2159e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2160e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2161e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2162e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2163c9bace7cSDavid Daney	range 11 64
2164c9bace7cSDavid Daney	default "11"
2165c9bace7cSDavid Daney	help
2166c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
2167c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
2168c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
2169c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2170c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2171c9bace7cSDavid Daney	  increase this value.
2172c9bace7cSDavid Daney
2173c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2174c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2175c9bace7cSDavid Daney
2176c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2177c9bace7cSDavid Daney	  when choosing a value for this option.
2178c9bace7cSDavid Daney
21791da177e4SLinus Torvaldsconfig BOARD_SCACHE
21801da177e4SLinus Torvalds	bool
21811da177e4SLinus Torvalds
21821da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
21831da177e4SLinus Torvalds	bool
21841da177e4SLinus Torvalds	select BOARD_SCACHE
21851da177e4SLinus Torvalds
21869318c51aSChris Dearman#
21879318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
21889318c51aSChris Dearman#
21899318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
21909318c51aSChris Dearman	bool
21919318c51aSChris Dearman	select BOARD_SCACHE
21929318c51aSChris Dearman
21931da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
21941da177e4SLinus Torvalds	bool
21951da177e4SLinus Torvalds	select BOARD_SCACHE
21961da177e4SLinus Torvalds
21971da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
21981da177e4SLinus Torvalds	bool
21991da177e4SLinus Torvalds	select BOARD_SCACHE
22001da177e4SLinus Torvalds
22011da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
22021da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
22031da177e4SLinus Torvalds	depends on CPU_SB1
22041da177e4SLinus Torvalds	help
22051da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
22061da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
22071da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
22081da177e4SLinus Torvalds
22091da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2210c8094b53SRalf Baechle	bool
22111da177e4SLinus Torvalds
22123165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
22133165c846SFlorian Fainelli	bool
22143165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
22153165c846SFlorian Fainelli
221691405eb6SFlorian Fainelliconfig CPU_R4K_FPU
221791405eb6SFlorian Fainelli	bool
221891405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
221991405eb6SFlorian Fainelli
222062cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
222162cedc4fSFlorian Fainelli	bool
222262cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
222362cedc4fSFlorian Fainelli
222459d6ab86SRalf Baechleconfig MIPS_MT_SMP
2225a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
22265676319cSMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
222759d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2228d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2229c080faa5SSteven J. Hill	select SYNC_R4K
223059d6ab86SRalf Baechle	select MIPS_MT
223159d6ab86SRalf Baechle	select SMP
223287353d8aSRalf Baechle	select SMP_UP
2233c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2234c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2235399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
223659d6ab86SRalf Baechle	help
2237c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2238c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2239c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2240c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2241c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
224259d6ab86SRalf Baechle
2243f41ae0b2SRalf Baechleconfig MIPS_MT
2244f41ae0b2SRalf Baechle	bool
2245f41ae0b2SRalf Baechle
22460ab7aefcSRalf Baechleconfig SCHED_SMT
22470ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
22480ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
22490ab7aefcSRalf Baechle	default n
22500ab7aefcSRalf Baechle	help
22510ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
22520ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
22530ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
22540ab7aefcSRalf Baechle
22550ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
22560ab7aefcSRalf Baechle	bool
22570ab7aefcSRalf Baechle
2258f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2259f41ae0b2SRalf Baechle	bool
2260f41ae0b2SRalf Baechle
2261f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2262f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2263f088fc84SRalf Baechle	default y
2264b633648cSRalf Baechle	depends on MIPS_MT_SMP
226507cc0c9eSRalf Baechle
2266b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2267b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
2268b0a668fbSLeonid Yegoshin	depends on CPU_MIPSR6 && !SMP
2269b0a668fbSLeonid Yegoshin	default y
2270b0a668fbSLeonid Yegoshin	help
2271b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2272b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
227307edf0d4SMarkos Chandras	  default. You can enable it using the 'mipsr2emu' kernel option.
2274b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2275b0a668fbSLeonid Yegoshin	  final kernel image.
2276b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels"
2277b0a668fbSLeonid Yegoshin	depends on SMP && CPU_MIPSR6
2278b0a668fbSLeonid Yegoshin
227907cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
228007cc0c9eSRalf Baechle	bool "VPE loader support."
2281704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
228207cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
228307cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
228407cc0c9eSRalf Baechle	select MIPS_MT
228507cc0c9eSRalf Baechle	help
228607cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
228707cc0c9eSRalf Baechle	  onto another VPE and running it.
2288f088fc84SRalf Baechle
228917a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
229017a1d523SDeng-Cheng Zhu	bool
229117a1d523SDeng-Cheng Zhu	default "y"
229217a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
229317a1d523SDeng-Cheng Zhu
22941a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
22951a2a6d7eSDeng-Cheng Zhu	bool
22961a2a6d7eSDeng-Cheng Zhu	default "y"
22971a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
22981a2a6d7eSDeng-Cheng Zhu
2299e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2300e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2301e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2302e01402b1SRalf Baechle	default y
2303e01402b1SRalf Baechle	help
2304e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2305e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2306e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2307e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2308e01402b1SRalf Baechle
2309e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2310e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2311e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
23125e83d430SRalf Baechle	help
2313e01402b1SRalf Baechle
2314da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2315da615cf6SDeng-Cheng Zhu	bool
2316da615cf6SDeng-Cheng Zhu	default "y"
2317da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2318da615cf6SDeng-Cheng Zhu
23192c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
23202c973ef0SDeng-Cheng Zhu	bool
23212c973ef0SDeng-Cheng Zhu	default "y"
23222c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
23232c973ef0SDeng-Cheng Zhu
23244a16ff4cSRalf Baechleconfig MIPS_CMP
23255cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
23265676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2327b10b43baSMarkos Chandras	select SMP
2328eb9b5141STim Anderson	select SYNC_R4K
2329b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
23304a16ff4cSRalf Baechle	select WEAK_ORDERING
23314a16ff4cSRalf Baechle	default n
23324a16ff4cSRalf Baechle	help
2333044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2334044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2335044505c7SPaul Burton	  its ability to start secondary CPUs.
23364a16ff4cSRalf Baechle
23375cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
23385cac93b3SPaul Burton	  instead of this.
23395cac93b3SPaul Burton
23400ee958e1SPaul Burtonconfig MIPS_CPS
23410ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
23425a3e7c02SPaul Burton	depends on SYS_SUPPORTS_MIPS_CPS
23430ee958e1SPaul Burton	select MIPS_CM
23440ee958e1SPaul Burton	select MIPS_CPC
23451d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
23460ee958e1SPaul Burton	select SMP
23470ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
23481d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
23490ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
23500ee958e1SPaul Burton	select WEAK_ORDERING
23510ee958e1SPaul Burton	help
23520ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
23530ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
23540ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
23550ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
23560ee958e1SPaul Burton	  support is unavailable.
23570ee958e1SPaul Burton
23583179d37eSPaul Burtonconfig MIPS_CPS_PM
235939a59593SMarkos Chandras	depends on MIPS_CPS
2360a8b84677SPaul Burton	select MIPS_CPC
23613179d37eSPaul Burton	bool
23623179d37eSPaul Burton
23639f98f3ddSPaul Burtonconfig MIPS_CM
23649f98f3ddSPaul Burton	bool
23659f98f3ddSPaul Burton
23669c38cf44SPaul Burtonconfig MIPS_CPC
23679c38cf44SPaul Burton	bool
23682600990eSRalf Baechle
23691da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
23701da177e4SLinus Torvalds	bool
23711da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
23721da177e4SLinus Torvalds	default y
23731da177e4SLinus Torvalds
23741da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
23751da177e4SLinus Torvalds	bool
23761da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
23771da177e4SLinus Torvalds	default y
23781da177e4SLinus Torvalds
23792235a54dSSanjay Lal
238060ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
238134adb28dSRalf Baechle       bool
238260ec6571Spascal@pabr.org
23839e2b5372SMarkos Chandraschoice
23849e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
23859e2b5372SMarkos Chandras
23869e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
23879e2b5372SMarkos Chandras	bool "None"
23889e2b5372SMarkos Chandras	help
23899e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
23909e2b5372SMarkos Chandras
23919693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
23929693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
23939e2b5372SMarkos Chandras	bool "SmartMIPS"
23949693a853SFranck Bui-Huu	help
23959693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
23969693a853SFranck Bui-Huu	  increased security at both hardware and software level for
23979693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
23989693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
23999693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
24009693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
24019693a853SFranck Bui-Huu	  here.
24029693a853SFranck Bui-Huu
2403bce86083SSteven J. Hillconfig CPU_MICROMIPS
24047fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
24059e2b5372SMarkos Chandras	bool "microMIPS"
2406bce86083SSteven J. Hill	help
2407bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2408bce86083SSteven J. Hill	  microMIPS ISA
2409bce86083SSteven J. Hill
24109e2b5372SMarkos Chandrasendchoice
24119e2b5372SMarkos Chandras
2412a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
24130ce3417eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2414a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
24152a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2416a5e9a69eSPaul Burton	help
2417a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2418a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
24191db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
24201db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
24211db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
24221db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
24231db1af84SPaul Burton	  the size & complexity of your kernel.
2424a5e9a69eSPaul Burton
2425a5e9a69eSPaul Burton	  If unsure, say Y.
2426a5e9a69eSPaul Burton
24271da177e4SLinus Torvaldsconfig CPU_HAS_WB
2428f7062ddbSRalf Baechle	bool
2429e01402b1SRalf Baechle
2430df0ac8a4SKevin Cernekeeconfig XKS01
2431df0ac8a4SKevin Cernekee	bool
2432df0ac8a4SKevin Cernekee
24338256b17eSFlorian Fainelliconfig CPU_HAS_RIXI
24348256b17eSFlorian Fainelli	bool
24358256b17eSFlorian Fainelli
2436f41ae0b2SRalf Baechle#
2437f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2438f41ae0b2SRalf Baechle#
2439e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2440f41ae0b2SRalf Baechle	bool
2441e01402b1SRalf Baechle
2442f41ae0b2SRalf Baechle#
2443f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2444f41ae0b2SRalf Baechle#
2445e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2446f41ae0b2SRalf Baechle	bool
2447e01402b1SRalf Baechle
24481da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
24491da177e4SLinus Torvalds	bool
24501da177e4SLinus Torvalds	depends on !CPU_R3000
24511da177e4SLinus Torvalds	default y
24521da177e4SLinus Torvalds
24531da177e4SLinus Torvalds#
245420d60d99SMaciej W. Rozycki# CPU non-features
245520d60d99SMaciej W. Rozycki#
245620d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
245720d60d99SMaciej W. Rozycki	bool
245820d60d99SMaciej W. Rozycki
245920d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
246020d60d99SMaciej W. Rozycki	bool
246120d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
246220d60d99SMaciej W. Rozycki
246320d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
246420d60d99SMaciej W. Rozycki	bool
246520d60d99SMaciej W. Rozycki
24664edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT
24674edf00a4SPaul Burton	int
24684edf00a4SPaul Burton	default 6 if CPU_R3000 || CPU_TX39XX
24694edf00a4SPaul Burton	default 4 if CPU_R8000
24704edf00a4SPaul Burton	default 0
24714edf00a4SPaul Burton
24724edf00a4SPaul Burtonconfig MIPS_ASID_BITS
24734edf00a4SPaul Burton	int
24742db003a5SPaul Burton	default 0 if MIPS_ASID_BITS_VARIABLE
24754edf00a4SPaul Burton	default 6 if CPU_R3000 || CPU_TX39XX
24764edf00a4SPaul Burton	default 8
24774edf00a4SPaul Burton
24782db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE
24792db003a5SPaul Burton	bool
24802db003a5SPaul Burton
248120d60d99SMaciej W. Rozycki#
24821da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
24831da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
24841da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
24851da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
24861da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
24871da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
24881da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
24891da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2490797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2491797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2492797798c1SRalf Baechle#   support.
24931da177e4SLinus Torvalds#
24941da177e4SLinus Torvaldsconfig HIGHMEM
24951da177e4SLinus Torvalds	bool "High Memory Support"
2496a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2497797798c1SRalf Baechle
2498797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2499797798c1SRalf Baechle	bool
2500797798c1SRalf Baechle
2501797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2502797798c1SRalf Baechle	bool
25031da177e4SLinus Torvalds
25049693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
25059693a853SFranck Bui-Huu	bool
25069693a853SFranck Bui-Huu
2507a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2508a6a4834cSSteven J. Hill	bool
2509a6a4834cSSteven J. Hill
2510377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2511377cb1b6SRalf Baechle	bool
2512377cb1b6SRalf Baechle	help
2513377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2514377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2515377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2516377cb1b6SRalf Baechle
2517a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2518a5e9a69eSPaul Burton	bool
2519a5e9a69eSPaul Burton
2520b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2521b4819b59SYoichi Yuasa	def_bool y
2522f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2523b4819b59SYoichi Yuasa
2524d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2525d8cb4e11SRalf Baechle	bool
2526d8cb4e11SRalf Baechle	default y if SGI_IP27
2527d8cb4e11SRalf Baechle	help
25283dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2529d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2530d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2531d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2532d8cb4e11SRalf Baechle
2533b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2534b1c6cd42SAtsushi Nemoto	bool
25357de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
253631473747SAtsushi Nemoto
2537d8cb4e11SRalf Baechleconfig NUMA
2538d8cb4e11SRalf Baechle	bool "NUMA Support"
2539d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2540d8cb4e11SRalf Baechle	help
2541d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2542d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2543d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2544d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2545d8cb4e11SRalf Baechle	  disabled.
2546d8cb4e11SRalf Baechle
2547d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2548d8cb4e11SRalf Baechle	bool
2549d8cb4e11SRalf Baechle
25508c530ea3SMatt Redfearnconfig RELOCATABLE
25518c530ea3SMatt Redfearn	bool "Relocatable kernel"
25528c530ea3SMatt Redfearn	depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6)
25538c530ea3SMatt Redfearn	help
25548c530ea3SMatt Redfearn	  This builds a kernel image that retains relocation information
25558c530ea3SMatt Redfearn	  so it can be loaded someplace besides the default 1MB.
25568c530ea3SMatt Redfearn	  The relocations make the kernel binary about 15% larger,
25578c530ea3SMatt Redfearn	  but are discarded at runtime
25588c530ea3SMatt Redfearn
2559069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE
2560069fd766SMatt Redfearn	hex "Relocation table size"
2561069fd766SMatt Redfearn	depends on RELOCATABLE
2562069fd766SMatt Redfearn	range 0x0 0x01000000
2563069fd766SMatt Redfearn	default "0x00100000"
2564069fd766SMatt Redfearn	---help---
2565069fd766SMatt Redfearn	  A table of relocation data will be appended to the kernel binary
2566069fd766SMatt Redfearn	  and parsed at boot to fix up the relocated kernel.
2567069fd766SMatt Redfearn
2568069fd766SMatt Redfearn	  This option allows the amount of space reserved for the table to be
2569069fd766SMatt Redfearn	  adjusted, although the default of 1Mb should be ok in most cases.
2570069fd766SMatt Redfearn
2571069fd766SMatt Redfearn	  The build will fail and a valid size suggested if this is too small.
2572069fd766SMatt Redfearn
2573069fd766SMatt Redfearn	  If unsure, leave at the default value.
2574069fd766SMatt Redfearn
2575405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE
2576405bc8fdSMatt Redfearn	bool "Randomize the address of the kernel image"
2577405bc8fdSMatt Redfearn	depends on RELOCATABLE
2578405bc8fdSMatt Redfearn	---help---
2579405bc8fdSMatt Redfearn	   Randomizes the physical and virtual address at which the
2580405bc8fdSMatt Redfearn	   kernel image is loaded, as a security feature that
2581405bc8fdSMatt Redfearn	   deters exploit attempts relying on knowledge of the location
2582405bc8fdSMatt Redfearn	   of kernel internals.
2583405bc8fdSMatt Redfearn
2584405bc8fdSMatt Redfearn	   Entropy is generated using any coprocessor 0 registers available.
2585405bc8fdSMatt Redfearn
2586405bc8fdSMatt Redfearn	   The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2587405bc8fdSMatt Redfearn
2588405bc8fdSMatt Redfearn	   If unsure, say N.
2589405bc8fdSMatt Redfearn
2590405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET
2591405bc8fdSMatt Redfearn	hex "Maximum kASLR offset" if EXPERT
2592405bc8fdSMatt Redfearn	depends on RANDOMIZE_BASE
2593405bc8fdSMatt Redfearn	range 0x0 0x40000000 if EVA || 64BIT
2594405bc8fdSMatt Redfearn	range 0x0 0x08000000
2595405bc8fdSMatt Redfearn	default "0x01000000"
2596405bc8fdSMatt Redfearn	---help---
2597405bc8fdSMatt Redfearn	  When kASLR is active, this provides the maximum offset that will
2598405bc8fdSMatt Redfearn	  be applied to the kernel image. It should be set according to the
2599405bc8fdSMatt Redfearn	  amount of physical RAM available in the target system minus
2600405bc8fdSMatt Redfearn	  PHYSICAL_START and must be a power of 2.
2601405bc8fdSMatt Redfearn
2602405bc8fdSMatt Redfearn	  This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2603405bc8fdSMatt Redfearn	  EVA or 64-bit. The default is 16Mb.
2604405bc8fdSMatt Redfearn
2605c80d79d7SYasunori Gotoconfig NODES_SHIFT
2606c80d79d7SYasunori Goto	int
2607c80d79d7SYasunori Goto	default "6"
2608c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2609c80d79d7SYasunori Goto
261014f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
261114f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
261223021b2bSYang Shi	depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
261314f70012SDeng-Cheng Zhu	default y
261414f70012SDeng-Cheng Zhu	help
261514f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
261614f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
261714f70012SDeng-Cheng Zhu
2618b4819b59SYoichi Yuasasource "mm/Kconfig"
2619b4819b59SYoichi Yuasa
26201da177e4SLinus Torvaldsconfig SMP
26211da177e4SLinus Torvalds	bool "Multi-Processing support"
2622e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2623e73ea273SRalf Baechle	help
26241da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
26254a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
26264a474157SRobert Graffham	  than one CPU, say Y.
26271da177e4SLinus Torvalds
26284a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
26291da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
26301da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
26314a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
26321da177e4SLinus Torvalds	  will run faster if you say N here.
26331da177e4SLinus Torvalds
26341da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
26351da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
26361da177e4SLinus Torvalds
263703502faaSAdrian Bunk	  See also the SMP-HOWTO available at
263803502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
26391da177e4SLinus Torvalds
26401da177e4SLinus Torvalds	  If you don't know what to do here, say N.
26411da177e4SLinus Torvalds
26427840d618SMatt Redfearnconfig HOTPLUG_CPU
26437840d618SMatt Redfearn	bool "Support for hot-pluggable CPUs"
26447840d618SMatt Redfearn	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
26457840d618SMatt Redfearn	help
26467840d618SMatt Redfearn	  Say Y here to allow turning CPUs off and on. CPUs can be
26477840d618SMatt Redfearn	  controlled through /sys/devices/system/cpu.
26487840d618SMatt Redfearn	  (Note: power management support will enable this option
26497840d618SMatt Redfearn	    automatically on SMP systems. )
26507840d618SMatt Redfearn	  Say N if you want to disable CPU hotplug.
26517840d618SMatt Redfearn
265287353d8aSRalf Baechleconfig SMP_UP
265387353d8aSRalf Baechle	bool
265487353d8aSRalf Baechle
26554a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
26564a16ff4cSRalf Baechle	bool
26574a16ff4cSRalf Baechle
26580ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
26590ee958e1SPaul Burton	bool
26600ee958e1SPaul Burton
2661e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2662e73ea273SRalf Baechle	bool
2663e73ea273SRalf Baechle
2664130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2665130e2fb7SRalf Baechle	bool
2666130e2fb7SRalf Baechle
2667130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2668130e2fb7SRalf Baechle	bool
2669130e2fb7SRalf Baechle
2670130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2671130e2fb7SRalf Baechle	bool
2672130e2fb7SRalf Baechle
2673130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2674130e2fb7SRalf Baechle	bool
2675130e2fb7SRalf Baechle
2676130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2677130e2fb7SRalf Baechle	bool
2678130e2fb7SRalf Baechle
26791da177e4SLinus Torvaldsconfig NR_CPUS
2680a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2681a91796a9SJayachandran C	range 2 256
26821da177e4SLinus Torvalds	depends on SMP
2683130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2684130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2685130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2686130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2687130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
26881da177e4SLinus Torvalds	help
26891da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
26901da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
26911da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
269272ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
269372ede9b1SAtsushi Nemoto	  and 2 for all others.
26941da177e4SLinus Torvalds
26951da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
269672ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
269772ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
269872ede9b1SAtsushi Nemoto	  power of two.
26991da177e4SLinus Torvalds
2700399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2701399aaa25SAl Cooper	bool
2702399aaa25SAl Cooper
27031723b4a3SAtsushi Nemoto#
27041723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
27051723b4a3SAtsushi Nemoto#
27061723b4a3SAtsushi Nemoto
27071723b4a3SAtsushi Nemotochoice
27081723b4a3SAtsushi Nemoto	prompt "Timer frequency"
27091723b4a3SAtsushi Nemoto	default HZ_250
27101723b4a3SAtsushi Nemoto	help
27111723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
27121723b4a3SAtsushi Nemoto
271367596573SPaul Burton	config HZ_24
271467596573SPaul Burton		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
271567596573SPaul Burton
27161723b4a3SAtsushi Nemoto	config HZ_48
27170f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
27181723b4a3SAtsushi Nemoto
27191723b4a3SAtsushi Nemoto	config HZ_100
27201723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
27211723b4a3SAtsushi Nemoto
27221723b4a3SAtsushi Nemoto	config HZ_128
27231723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
27241723b4a3SAtsushi Nemoto
27251723b4a3SAtsushi Nemoto	config HZ_250
27261723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
27271723b4a3SAtsushi Nemoto
27281723b4a3SAtsushi Nemoto	config HZ_256
27291723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
27301723b4a3SAtsushi Nemoto
27311723b4a3SAtsushi Nemoto	config HZ_1000
27321723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
27331723b4a3SAtsushi Nemoto
27341723b4a3SAtsushi Nemoto	config HZ_1024
27351723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
27361723b4a3SAtsushi Nemoto
27371723b4a3SAtsushi Nemotoendchoice
27381723b4a3SAtsushi Nemoto
273967596573SPaul Burtonconfig SYS_SUPPORTS_24HZ
274067596573SPaul Burton	bool
274167596573SPaul Burton
27421723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
27431723b4a3SAtsushi Nemoto	bool
27441723b4a3SAtsushi Nemoto
27451723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
27461723b4a3SAtsushi Nemoto	bool
27471723b4a3SAtsushi Nemoto
27481723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
27491723b4a3SAtsushi Nemoto	bool
27501723b4a3SAtsushi Nemoto
27511723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
27521723b4a3SAtsushi Nemoto	bool
27531723b4a3SAtsushi Nemoto
27541723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
27551723b4a3SAtsushi Nemoto	bool
27561723b4a3SAtsushi Nemoto
27571723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
27581723b4a3SAtsushi Nemoto	bool
27591723b4a3SAtsushi Nemoto
27601723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
27611723b4a3SAtsushi Nemoto	bool
27621723b4a3SAtsushi Nemoto
27631723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
27641723b4a3SAtsushi Nemoto	bool
276567596573SPaul Burton	default y if !SYS_SUPPORTS_24HZ && \
276667596573SPaul Burton		     !SYS_SUPPORTS_48HZ && \
276767596573SPaul Burton		     !SYS_SUPPORTS_100HZ && \
276867596573SPaul Burton		     !SYS_SUPPORTS_128HZ && \
276967596573SPaul Burton		     !SYS_SUPPORTS_250HZ && \
277067596573SPaul Burton		     !SYS_SUPPORTS_256HZ && \
277167596573SPaul Burton		     !SYS_SUPPORTS_1000HZ && \
27721723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
27731723b4a3SAtsushi Nemoto
27741723b4a3SAtsushi Nemotoconfig HZ
27751723b4a3SAtsushi Nemoto	int
277667596573SPaul Burton	default 24 if HZ_24
27771723b4a3SAtsushi Nemoto	default 48 if HZ_48
27781723b4a3SAtsushi Nemoto	default 100 if HZ_100
27791723b4a3SAtsushi Nemoto	default 128 if HZ_128
27801723b4a3SAtsushi Nemoto	default 250 if HZ_250
27811723b4a3SAtsushi Nemoto	default 256 if HZ_256
27821723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
27831723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
27841723b4a3SAtsushi Nemoto
278596685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
278696685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
278796685b17SDeng-Cheng Zhu
2788e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
27891da177e4SLinus Torvalds
2790ea6e942bSAtsushi Nemotoconfig KEXEC
27917d60717eSKees Cook	bool "Kexec system call"
27922965faa5SDave Young	select KEXEC_CORE
2793ea6e942bSAtsushi Nemoto	help
2794ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2795ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
27963dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2797ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2798ea6e942bSAtsushi Nemoto
279901dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2800ea6e942bSAtsushi Nemoto
2801ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2802ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2803bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2804bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2805bf220695SGeert Uytterhoeven	  made.
2806ea6e942bSAtsushi Nemoto
28077aa1c8f4SRalf Baechleconfig CRASH_DUMP
28087aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
28097aa1c8f4SRalf Baechle	  help
28107aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
28117aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
28127aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
28137aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
28147aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
28157aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
28167aa1c8f4SRalf Baechle	  PHYSICAL_START.
28177aa1c8f4SRalf Baechle
28187aa1c8f4SRalf Baechleconfig PHYSICAL_START
28197aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
28207aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
28217aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
28227aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
28237aa1c8f4SRalf Baechle	  help
28247aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
28257aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
28267aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
28277aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
28287aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
28297aa1c8f4SRalf Baechle
2830ea6e942bSAtsushi Nemotoconfig SECCOMP
2831ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2832293c5bd1SRalf Baechle	depends on PROC_FS
2833ea6e942bSAtsushi Nemoto	default y
2834ea6e942bSAtsushi Nemoto	help
2835ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2836ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2837ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2838ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2839ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2840ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2841ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2842ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2843ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2844ea6e942bSAtsushi Nemoto
2845ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2846ea6e942bSAtsushi Nemoto
2847597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
28480ce3417eSPaul Burton	bool "Support for O32 binaries using 64-bit FP"
2849597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2850597ce172SPaul Burton	help
2851597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2852597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2853597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2854597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2855597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2856597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2857597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2858597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2859597ce172SPaul Burton	  saying N here.
2860597ce172SPaul Burton
286106e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
286206e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
286306e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
286406e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
286506e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
286606e2e882SPaul Burton	  said details.
286706e2e882SPaul Burton
286806e2e882SPaul Burton	  If unsure, say N.
2869597ce172SPaul Burton
2870f2ffa5abSDezhong Diaoconfig USE_OF
28710b3e06fdSJonas Gorski	bool
2872f2ffa5abSDezhong Diao	select OF
2873e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2874abd2363fSGrant Likely	select IRQ_DOMAIN
2875f2ffa5abSDezhong Diao
28767fafb068SAndrew Brestickerconfig BUILTIN_DTB
28777fafb068SAndrew Bresticker	bool
28787fafb068SAndrew Bresticker
28791da8f179SJonas Gorskichoice
28805b24d52cSJonas Gorski	prompt "Kernel appended dtb support" if USE_OF
28811da8f179SJonas Gorski	default MIPS_NO_APPENDED_DTB
28821da8f179SJonas Gorski
28831da8f179SJonas Gorski	config MIPS_NO_APPENDED_DTB
28841da8f179SJonas Gorski		bool "None"
28851da8f179SJonas Gorski		help
28861da8f179SJonas Gorski		  Do not enable appended dtb support.
28871da8f179SJonas Gorski
288887db537dSAaro Koskinen	config MIPS_ELF_APPENDED_DTB
288987db537dSAaro Koskinen		bool "vmlinux"
289087db537dSAaro Koskinen		help
289187db537dSAaro Koskinen		  With this option, the boot code will look for a device tree binary
289287db537dSAaro Koskinen		  DTB) included in the vmlinux ELF section .appended_dtb. By default
289387db537dSAaro Koskinen		  it is empty and the DTB can be appended using binutils command
289487db537dSAaro Koskinen		  objcopy:
289587db537dSAaro Koskinen
289687db537dSAaro Koskinen		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
289787db537dSAaro Koskinen
289887db537dSAaro Koskinen		  This is meant as a backward compatiblity convenience for those
289987db537dSAaro Koskinen		  systems with a bootloader that can't be upgraded to accommodate
290087db537dSAaro Koskinen		  the documented boot protocol using a device tree.
290187db537dSAaro Koskinen
29021da8f179SJonas Gorski	config MIPS_RAW_APPENDED_DTB
2903b8f54f2cSJonas Gorski		bool "vmlinux.bin or vmlinuz.bin"
29041da8f179SJonas Gorski		help
29051da8f179SJonas Gorski		  With this option, the boot code will look for a device tree binary
2906b8f54f2cSJonas Gorski		  DTB) appended to raw vmlinux.bin or vmlinuz.bin.
29071da8f179SJonas Gorski		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
29081da8f179SJonas Gorski
29091da8f179SJonas Gorski		  This is meant as a backward compatibility convenience for those
29101da8f179SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
29111da8f179SJonas Gorski		  the documented boot protocol using a device tree.
29121da8f179SJonas Gorski
29131da8f179SJonas Gorski		  Beware that there is very little in terms of protection against
29141da8f179SJonas Gorski		  this option being confused by leftover garbage in memory that might
29151da8f179SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
29161da8f179SJonas Gorski		  to vmlinux.bin.  Do not leave this option active in a production kernel
29171da8f179SJonas Gorski		  if you don't intend to always append a DTB.
29181da8f179SJonas Gorskiendchoice
29191da8f179SJonas Gorski
29202024972eSJonas Gorskichoice
29212024972eSJonas Gorski	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
29222bcef9b4SJonas Gorski	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
29232bcef9b4SJonas Gorski					 !MIPS_MALTA && !MIPS_SEAD3 && \
29242bcef9b4SJonas Gorski					 !CAVIUM_OCTEON_SOC
29252024972eSJonas Gorski	default MIPS_CMDLINE_FROM_BOOTLOADER
29262024972eSJonas Gorski
29272024972eSJonas Gorski	config MIPS_CMDLINE_FROM_DTB
29282024972eSJonas Gorski		depends on USE_OF
29292024972eSJonas Gorski		bool "Dtb kernel arguments if available"
29302024972eSJonas Gorski
29312024972eSJonas Gorski	config MIPS_CMDLINE_DTB_EXTEND
29322024972eSJonas Gorski		depends on USE_OF
29332024972eSJonas Gorski		bool "Extend dtb kernel arguments with bootloader arguments"
29342024972eSJonas Gorski
29352024972eSJonas Gorski	config MIPS_CMDLINE_FROM_BOOTLOADER
29362024972eSJonas Gorski		bool "Bootloader kernel arguments if available"
2937ed47e153SRabin Vincent
2938ed47e153SRabin Vincent	config MIPS_CMDLINE_BUILTIN_EXTEND
2939ed47e153SRabin Vincent		depends on CMDLINE_BOOL
2940ed47e153SRabin Vincent		bool "Extend builtin kernel arguments with bootloader arguments"
29412024972eSJonas Gorskiendchoice
29422024972eSJonas Gorski
29435e83d430SRalf Baechleendmenu
29445e83d430SRalf Baechle
29451df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
29461df0f0ffSAtsushi Nemoto	bool
29471df0f0ffSAtsushi Nemoto	default y
29481df0f0ffSAtsushi Nemoto
29491df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
29501df0f0ffSAtsushi Nemoto	bool
29511df0f0ffSAtsushi Nemoto	default y
29521df0f0ffSAtsushi Nemoto
2953e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT
2954e1e16115SAaro Koskinen	bool
2955e1e16115SAaro Koskinen	default y
2956e1e16115SAaro Koskinen
2957a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS
2958a728ab52SKirill A. Shutemov	int
2959a728ab52SKirill A. Shutemov	default 3 if 64BIT && !PAGE_SIZE_64KB
2960a728ab52SKirill A. Shutemov	default 2
2961a728ab52SKirill A. Shutemov
2962b6c3539bSRalf Baechlesource "init/Kconfig"
2963b6c3539bSRalf Baechle
2964dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2965dc52ddc0SMatt Helsley
29661da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
29671da177e4SLinus Torvalds
29685e83d430SRalf Baechleconfig HW_HAS_EISA
29695e83d430SRalf Baechle	bool
29701da177e4SLinus Torvaldsconfig HW_HAS_PCI
29711da177e4SLinus Torvalds	bool
29721da177e4SLinus Torvalds
29731da177e4SLinus Torvaldsconfig PCI
29741da177e4SLinus Torvalds	bool "Support for PCI controller"
29751da177e4SLinus Torvalds	depends on HW_HAS_PCI
2976abb4ae46SRalf Baechle	select PCI_DOMAINS
29770f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
29781da177e4SLinus Torvalds	help
29791da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
29801da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
29811da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
29821da177e4SLinus Torvalds	  say Y, otherwise N.
29831da177e4SLinus Torvalds
29840e476d91SHuacai Chenconfig HT_PCI
29850e476d91SHuacai Chen	bool "Support for HT-linked PCI"
29860e476d91SHuacai Chen	default y
29870e476d91SHuacai Chen	depends on CPU_LOONGSON3
29880e476d91SHuacai Chen	select PCI
29890e476d91SHuacai Chen	select PCI_DOMAINS
29900e476d91SHuacai Chen	help
29910e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
29920e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
29930e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
29940e476d91SHuacai Chen
29951da177e4SLinus Torvaldsconfig PCI_DOMAINS
29961da177e4SLinus Torvalds	bool
29971da177e4SLinus Torvalds
29981da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
29991da177e4SLinus Torvalds
30001da177e4SLinus Torvalds#
30011da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
30021da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
30031da177e4SLinus Torvalds# users to choose the right thing ...
30041da177e4SLinus Torvalds#
30051da177e4SLinus Torvaldsconfig ISA
30061da177e4SLinus Torvalds	bool
30071da177e4SLinus Torvalds
30081da177e4SLinus Torvaldsconfig EISA
30091da177e4SLinus Torvalds	bool "EISA support"
30105e83d430SRalf Baechle	depends on HW_HAS_EISA
30111da177e4SLinus Torvalds	select ISA
3012aa414dffSRalf Baechle	select GENERIC_ISA_DMA
30131da177e4SLinus Torvalds	---help---
30141da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
30151da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
30161da177e4SLinus Torvalds
30171da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
30181da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
30191da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
30201da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
30211da177e4SLinus Torvalds
30221da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
30231da177e4SLinus Torvalds
30241da177e4SLinus Torvalds	  Otherwise, say N.
30251da177e4SLinus Torvalds
30261da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
30271da177e4SLinus Torvalds
30281da177e4SLinus Torvaldsconfig TC
30291da177e4SLinus Torvalds	bool "TURBOchannel support"
30301da177e4SLinus Torvalds	depends on MACH_DECSTATION
30311da177e4SLinus Torvalds	help
303250a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
303350a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
303450a23e6eSJustin P. Mattock	  at:
303550a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
303650a23e6eSJustin P. Mattock	  and:
303750a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
303850a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
303950a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
30401da177e4SLinus Torvalds
30411da177e4SLinus Torvaldsconfig MMU
30421da177e4SLinus Torvalds	bool
30431da177e4SLinus Torvalds	default y
30441da177e4SLinus Torvalds
3045d865bea4SRalf Baechleconfig I8253
3046d865bea4SRalf Baechle	bool
3047798778b8SRussell King	select CLKSRC_I8253
30482d02612fSThomas Gleixner	select CLKEVT_I8253
30499726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
3050d865bea4SRalf Baechle
3051e05eb3f8SRalf Baechleconfig ZONE_DMA
3052e05eb3f8SRalf Baechle	bool
3053e05eb3f8SRalf Baechle
3054cce335aeSRalf Baechleconfig ZONE_DMA32
3055cce335aeSRalf Baechle	bool
3056cce335aeSRalf Baechle
30571da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
30581da177e4SLinus Torvalds
3059388b78adSAlexandre Bounineconfig RAPIDIO
306056abde72SAlexandre Bounine	tristate "RapidIO support"
3061388b78adSAlexandre Bounine	depends on PCI
3062388b78adSAlexandre Bounine	default n
3063388b78adSAlexandre Bounine	help
3064388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
3065388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
3066388b78adSAlexandre Bounine
3067388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
3068388b78adSAlexandre Bounine
30691da177e4SLinus Torvaldsendmenu
30701da177e4SLinus Torvalds
30711da177e4SLinus Torvaldsmenu "Executable file formats"
30721da177e4SLinus Torvalds
30731da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
30741da177e4SLinus Torvalds
30751da177e4SLinus Torvaldsconfig TRAD_SIGNALS
30761da177e4SLinus Torvalds	bool
30771da177e4SLinus Torvalds
30781da177e4SLinus Torvaldsconfig MIPS32_COMPAT
307978aaf956SRalf Baechle	bool
30801da177e4SLinus Torvalds
30811da177e4SLinus Torvaldsconfig COMPAT
30821da177e4SLinus Torvalds	bool
30831da177e4SLinus Torvalds
308405e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
308505e43966SAtsushi Nemoto	bool
308605e43966SAtsushi Nemoto
30871da177e4SLinus Torvaldsconfig MIPS32_O32
30881da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
308978aaf956SRalf Baechle	depends on 64BIT
309078aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
309178aaf956SRalf Baechle	select COMPAT
309278aaf956SRalf Baechle	select MIPS32_COMPAT
309378aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
30941da177e4SLinus Torvalds	help
30951da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
30961da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
30971da177e4SLinus Torvalds	  existing binaries are in this format.
30981da177e4SLinus Torvalds
30991da177e4SLinus Torvalds	  If unsure, say Y.
31001da177e4SLinus Torvalds
31011da177e4SLinus Torvaldsconfig MIPS32_N32
31021da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
3103c22eacfeSRalf Baechle	depends on 64BIT
310478aaf956SRalf Baechle	select COMPAT
310578aaf956SRalf Baechle	select MIPS32_COMPAT
310678aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
31071da177e4SLinus Torvalds	help
31081da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
31091da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
31101da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
31111da177e4SLinus Torvalds	  cases.
31121da177e4SLinus Torvalds
31131da177e4SLinus Torvalds	  If unsure, say N.
31141da177e4SLinus Torvalds
31151da177e4SLinus Torvaldsconfig BINFMT_ELF32
31161da177e4SLinus Torvalds	bool
31171da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
3118f43edca7SRalf Baechle	select ELFCORE
31191da177e4SLinus Torvalds
31202116245eSRalf Baechleendmenu
31211da177e4SLinus Torvalds
31222116245eSRalf Baechlemenu "Power management options"
3123952fa954SRodolfo Giometti
3124363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
3125363c55caSWu Zhangjin	def_bool y
31263f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3127363c55caSWu Zhangjin
3128f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
3129f4cb5700SJohannes Berg	def_bool y
31303f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3131f4cb5700SJohannes Berg
31322116245eSRalf Baechlesource "kernel/power/Kconfig"
3133952fa954SRodolfo Giometti
31341da177e4SLinus Torvaldsendmenu
31351da177e4SLinus Torvalds
31367a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
31377a998935SViresh Kumar	bool
31387a998935SViresh Kumar
31397a998935SViresh Kumarmenu "CPU Power Management"
3140c095ebafSPaul Burton
3141c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
31427a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
31437a998935SViresh Kumarendif
31449726b43aSWu Zhangjin
3145c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
3146c095ebafSPaul Burton
3147c095ebafSPaul Burtonendmenu
3148c095ebafSPaul Burton
3149d5950b43SSam Ravnborgsource "net/Kconfig"
3150d5950b43SSam Ravnborg
31511da177e4SLinus Torvaldssource "drivers/Kconfig"
31521da177e4SLinus Torvalds
315398cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
315498cdee0eSRalf Baechle
31551da177e4SLinus Torvaldssource "fs/Kconfig"
31561da177e4SLinus Torvalds
31571da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
31581da177e4SLinus Torvalds
31591da177e4SLinus Torvaldssource "security/Kconfig"
31601da177e4SLinus Torvalds
31611da177e4SLinus Torvaldssource "crypto/Kconfig"
31621da177e4SLinus Torvalds
31631da177e4SLinus Torvaldssource "lib/Kconfig"
31642235a54dSSanjay Lal
31652235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
3166