xref: /linux/arch/mips/Kconfig (revision 0e476d91244ec6a9f6be3eb1963627340d031f99)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
4a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
5393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
6c3fc5cd5SRalf Baechle	select HAVE_CONTEXT_TRACKING
7f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
8ec7748b5SSam Ravnborg	select HAVE_IDE
942d4b839SMathieu Desnoyers	select HAVE_OPROFILE
107f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
117f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
1288547001SJason Wessel	select HAVE_ARCH_KGDB
13490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
14c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
157563bbf8SMark Brown	select ARCH_HAVE_CUSTOM_GPIO_H
16d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
1769a7d1b3SWu Zhangjin	select HAVE_FUNCTION_TRACE_MCOUNT_TEST
18538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
19538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
2064575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
2129c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
22c1bf207dSDavid Daney	select HAVE_KPROBES
23c1bf207dSDavid Daney	select HAVE_KRETPROBES
24b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
251d7bf993SRalf Baechle	select HAVE_SYSCALL_TRACEPOINTS
26e26d196cSDavid Daney	select ARCH_BINFMT_ELF_RANDOMIZE_PIE
27383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
2821a41faaSWu Zhangjin	select RTC_LIB if !MACH_LOONGSON
292b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
307463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
3148e1fd5aSDavid Daney	select HAVE_DMA_ATTRS
3248e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
333bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
34f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3578857614SMarkos Chandras	select GENERIC_PCI_IOMAP
3694bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
37c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
380f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
399d15ffc8STejun Heo	select HAVE_MEMBLOCK
409d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
419d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
42360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
434b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
44cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
45cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
46786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
474febd95aSStephen Rothwell	select VIRT_TO_BUS
482f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
492f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
5050150d2bSAl Viro	select CLONE_BACKWARDS
51d1a1dc0bSDave Hansen	select HAVE_DEBUG_STACKOVERFLOW
5219952a92SKees Cook	select HAVE_CC_STACKPROTECTOR
531da177e4SLinus Torvalds
541da177e4SLinus Torvaldsmenu "Machine selection"
551da177e4SLinus Torvalds
565e83d430SRalf Baechlechoice
575e83d430SRalf Baechle	prompt "System type"
585e83d430SRalf Baechle	default SGI_IP22
591da177e4SLinus Torvalds
6042a4f17dSManuel Laussconfig MIPS_ALCHEMY
61c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
6242a4f17dSManuel Lauss	select 64BIT_PHYS_ADDR
63f772cdb2SRalf Baechle	select CEVT_R4K
64d7ea335cSSteven J. Hill	select CSRC_R4K
6542a4f17dSManuel Lauss	select IRQ_CPU
6688e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
6742a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
6842a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
6942a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
70efb12436SAlexandre Courbot	select ARCH_REQUIRE_GPIOLIB
711b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
7237663860SManuel Lauss	select USB_ARCH_HAS_OHCI
7337663860SManuel Lauss	select USB_ARCH_HAS_EHCI
741da177e4SLinus Torvalds
757ca5dc14SFlorian Fainelliconfig AR7
767ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
777ca5dc14SFlorian Fainelli	select BOOT_ELF32
787ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
797ca5dc14SFlorian Fainelli	select CEVT_R4K
807ca5dc14SFlorian Fainelli	select CSRC_R4K
817ca5dc14SFlorian Fainelli	select IRQ_CPU
827ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
837ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
847ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
857ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
867ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
877ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
881b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
895f3c9098SFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
907ca5dc14SFlorian Fainelli	select VLYNQ
918551fb64SYoichi Yuasa	select HAVE_CLK
927ca5dc14SFlorian Fainelli	help
937ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
947ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
957ca5dc14SFlorian Fainelli
96d4a67d9dSGabor Juhosconfig ATH79
97d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
986eae43c5SGabor Juhos	select ARCH_REQUIRE_GPIOLIB
99d4a67d9dSGabor Juhos	select BOOT_RAW
100d4a67d9dSGabor Juhos	select CEVT_R4K
101d4a67d9dSGabor Juhos	select CSRC_R4K
102d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
10394638067SGabor Juhos	select HAVE_CLK
1042c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
105d4a67d9dSGabor Juhos	select IRQ_CPU
1060aabf1a4SGabor Juhos	select MIPS_MACHINE
107d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
108d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
109d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
110d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
111d4a67d9dSGabor Juhos	help
112d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
113d4a67d9dSGabor Juhos
1141c0c13ebSAurelien Jarnoconfig BCM47XX
115c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
1162da4c74dSHauke Mehrtens	select ARCH_WANT_OPTIONAL_GPIOLIB
117fe08f8c2SHauke Mehrtens	select BOOT_RAW
11842f77542SRalf Baechle	select CEVT_R4K
119940f6b48SRalf Baechle	select CSRC_R4K
1201c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1211c0c13ebSAurelien Jarno	select HW_HAS_PCI
1221c0c13ebSAurelien Jarno	select IRQ_CPU
123314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
124dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1251c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1261c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
12725e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
128e1ccbb65SHauke Mehrtens	select EARLY_PRINTK_8250 if EARLY_PRINTK
1291c0c13ebSAurelien Jarno	help
1301c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
1311c0c13ebSAurelien Jarno
132e7300d04SMaxime Bizonconfig BCM63XX
133e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
134ae8de61cSFlorian Fainelli	select BOOT_RAW
135e7300d04SMaxime Bizon	select CEVT_R4K
136e7300d04SMaxime Bizon	select CSRC_R4K
137e7300d04SMaxime Bizon	select DMA_NONCOHERENT
138e7300d04SMaxime Bizon	select IRQ_CPU
139e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
140e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
141e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
142e7300d04SMaxime Bizon	select SWAP_IO_SPACE
143e7300d04SMaxime Bizon	select ARCH_REQUIRE_GPIOLIB
1443e82eeebSYoichi Yuasa	select HAVE_CLK
145af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
146e7300d04SMaxime Bizon	help
147e7300d04SMaxime Bizon	 Support for BCM63XX based boards
148e7300d04SMaxime Bizon
1491da177e4SLinus Torvaldsconfig MIPS_COBALT
1503fa986faSMartin Michlmayr	bool "Cobalt Server"
15142f77542SRalf Baechle	select CEVT_R4K
152940f6b48SRalf Baechle	select CSRC_R4K
1531097c6acSYoichi Yuasa	select CEVT_GT641XX
1541da177e4SLinus Torvalds	select DMA_NONCOHERENT
1558a8594a7SYoichi Yuasa	select EARLY_PRINTK_8250 if EARLY_PRINTK
1561da177e4SLinus Torvalds	select HW_HAS_PCI
157d865bea4SRalf Baechle	select I8253
1581da177e4SLinus Torvalds	select I8259
1591da177e4SLinus Torvalds	select IRQ_CPU
160d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
161252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
162e25bfc92SYoichi Yuasa	select PCI
1637cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
1640a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
165ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
1660e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
1675e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
1681da177e4SLinus Torvalds
1691da177e4SLinus Torvaldsconfig MACH_DECSTATION
1703fa986faSMartin Michlmayr	bool "DECstations"
1711da177e4SLinus Torvalds	select BOOT_ELF32
1726457d9fcSYoichi Yuasa	select CEVT_DS1287
17342f77542SRalf Baechle	select CEVT_R4K
1744247417dSYoichi Yuasa	select CSRC_IOASIC
175940f6b48SRalf Baechle	select CSRC_R4K
17620d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
17720d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
17820d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
1791da177e4SLinus Torvalds	select DMA_NONCOHERENT
180d388d685SMaciej W. Rozycki	select NO_IOPORT
1811da177e4SLinus Torvalds	select IRQ_CPU
1827cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
1837cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
184ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
1857d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
1865e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
1871723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
1881723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
1891723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
190930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
1915e83d430SRalf Baechle	help
1921da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
1931da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
1941da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
1951da177e4SLinus Torvalds
1961da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
1971da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
1981da177e4SLinus Torvalds
1991da177e4SLinus Torvalds		DECstation 5000/50
2001da177e4SLinus Torvalds		DECstation 5000/150
2011da177e4SLinus Torvalds		DECstation 5000/260
2021da177e4SLinus Torvalds		DECsystem 5900/260
2031da177e4SLinus Torvalds
2041da177e4SLinus Torvalds	  otherwise choose R3000.
2051da177e4SLinus Torvalds
2065e83d430SRalf Baechleconfig MACH_JAZZ
2073fa986faSMartin Michlmayr	bool "Jazz family of machines"
2080e2794b0SRalf Baechle	select FW_ARC
2090e2794b0SRalf Baechle	select FW_ARC32
2105e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
21142f77542SRalf Baechle	select CEVT_R4K
212940f6b48SRalf Baechle	select CSRC_R4K
213e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2145e83d430SRalf Baechle	select GENERIC_ISA_DMA
2158a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
216ea202c63SThomas Bogendoerfer	select IRQ_CPU
217d865bea4SRalf Baechle	select I8253
2185e83d430SRalf Baechle	select I8259
2195e83d430SRalf Baechle	select ISA
2207cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2215e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2227d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2231723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2241da177e4SLinus Torvalds	help
2255e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
2265e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
227692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
2285e83d430SRalf Baechle	 Olivetti M700-10 workstations.
2295e83d430SRalf Baechle
2305ebabe59SLars-Peter Clausenconfig MACH_JZ4740
2315ebabe59SLars-Peter Clausen	bool "Ingenic JZ4740 based machines"
2325ebabe59SLars-Peter Clausen	select SYS_HAS_CPU_MIPS32_R1
2335ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
2345ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
235f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
2365ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
2375ebabe59SLars-Peter Clausen	select IRQ_CPU
2385ebabe59SLars-Peter Clausen	select ARCH_REQUIRE_GPIOLIB
2395ebabe59SLars-Peter Clausen	select SYS_HAS_EARLY_PRINTK
240ab5330ebSMaurus Cuelenaere	select HAVE_CLK
24183bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
2425ebabe59SLars-Peter Clausen
243171bb2f1SJohn Crispinconfig LANTIQ
244171bb2f1SJohn Crispin	bool "Lantiq based platforms"
245171bb2f1SJohn Crispin	select DMA_NONCOHERENT
246171bb2f1SJohn Crispin	select IRQ_CPU
247171bb2f1SJohn Crispin	select CEVT_R4K
248171bb2f1SJohn Crispin	select CSRC_R4K
249171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
250171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
251171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
252171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
253171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
254171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
255171bb2f1SJohn Crispin	select ARCH_REQUIRE_GPIOLIB
256171bb2f1SJohn Crispin	select SWAP_IO_SPACE
257171bb2f1SJohn Crispin	select BOOT_RAW
258287e3f3fSJohn Crispin	select HAVE_MACH_CLKDEV
259287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
260a0392222SJohn Crispin	select USE_OF
2613f8c50c9SJohn Crispin	select PINCTRL
2623f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
263171bb2f1SJohn Crispin
2641f21d2bdSBrian Murphyconfig LASAT
2651f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
26642f77542SRalf Baechle	select CEVT_R4K
267940f6b48SRalf Baechle	select CSRC_R4K
2681f21d2bdSBrian Murphy	select DMA_NONCOHERENT
2691f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
2701f21d2bdSBrian Murphy	select HW_HAS_PCI
271a5ccfe5cSRalf Baechle	select IRQ_CPU
2721f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
2731f21d2bdSBrian Murphy	select MIPS_NILE4
2741f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
2751f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
2761f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
2771f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
2781f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
2791f21d2bdSBrian Murphy
28085749d24SWu Zhangjinconfig MACH_LOONGSON
28185749d24SWu Zhangjin	bool "Loongson family of machines"
282c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
283ade299d8SYoichi Yuasa	help
28485749d24SWu Zhangjin	  This enables the support of Loongson family of machines.
28585749d24SWu Zhangjin
28685749d24SWu Zhangjin	  Loongson is a family of general-purpose MIPS-compatible CPUs.
28785749d24SWu Zhangjin	  developed at Institute of Computing Technology (ICT),
28885749d24SWu Zhangjin	  Chinese Academy of Sciences (CAS) in the People's Republic
28985749d24SWu Zhangjin	  of China. The chief architect is Professor Weiwu Hu.
290ade299d8SYoichi Yuasa
291ca585cf9SKelvin Cheungconfig MACH_LOONGSON1
292ca585cf9SKelvin Cheung	bool "Loongson 1 family of machines"
293ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
294ca585cf9SKelvin Cheung	help
295ca585cf9SKelvin Cheung	  This enables support for the Loongson 1 based machines.
296ca585cf9SKelvin Cheung
297ca585cf9SKelvin Cheung	  Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by
298ca585cf9SKelvin Cheung	  the ICT (Institute of Computing Technology) and the Chinese Academy
299ca585cf9SKelvin Cheung	  of Sciences.
300ca585cf9SKelvin Cheung
3011da177e4SLinus Torvaldsconfig MIPS_MALTA
3023fa986faSMartin Michlmayr	bool "MIPS Malta board"
30361ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
3041da177e4SLinus Torvalds	select BOOT_ELF32
305fa71c960SRalf Baechle	select BOOT_RAW
30642f77542SRalf Baechle	select CEVT_R4K
307940f6b48SRalf Baechle	select CSRC_R4K
308778eeb1bSSteven J. Hill	select CSRC_GIC
309885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
3101da177e4SLinus Torvalds	select GENERIC_ISA_DMA
3118a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
312aa414dffSRalf Baechle	select IRQ_CPU
31339b8d525SRalf Baechle	select IRQ_GIC
3141da177e4SLinus Torvalds	select HW_HAS_PCI
315d865bea4SRalf Baechle	select I8253
3161da177e4SLinus Torvalds	select I8259
3175e83d430SRalf Baechle	select MIPS_BONITO64
3189318c51aSChris Dearman	select MIPS_CPU_SCACHE
319252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
3205e83d430SRalf Baechle	select MIPS_MSC
3211da177e4SLinus Torvalds	select SWAP_IO_SPACE
3227cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
3237cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
324bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
3257cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
3265d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
3277cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
3287cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
329ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
330ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
3315e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
3325e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
3330365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
334e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
335f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
3369693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
3371b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
3381da177e4SLinus Torvalds	help
339f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
3401da177e4SLinus Torvalds	  board.
3411da177e4SLinus Torvalds
342ec47b274SSteven J. Hillconfig MIPS_SEAD3
343ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
344ec47b274SSteven J. Hill	select BOOT_ELF32
345ec47b274SSteven J. Hill	select BOOT_RAW
346ec47b274SSteven J. Hill	select CEVT_R4K
347ec47b274SSteven J. Hill	select CSRC_R4K
348dfa762e1SSteven J. Hill	select CSRC_GIC
349ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
350ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
351ec47b274SSteven J. Hill	select DMA_NONCOHERENT
352ec47b274SSteven J. Hill	select IRQ_CPU
353ec47b274SSteven J. Hill	select IRQ_GIC
35444327236SQais Yousef	select LIBFDT
355ec47b274SSteven J. Hill	select MIPS_MSC
356ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
357ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
358ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
359ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
360ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
361ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
362ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
363ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
364ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
365a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
366ec47b274SSteven J. Hill	select USB_ARCH_HAS_EHCI
367ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
368ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
3699b731009SSteven J. Hill	select USE_OF
370ec47b274SSteven J. Hill	help
371ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
372ec47b274SSteven J. Hill	  board.
373ec47b274SSteven J. Hill
374a83860c2SRalf Baechleconfig NEC_MARKEINS
375a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
376a83860c2SRalf Baechle	select SOC_EMMA2RH
377a83860c2SRalf Baechle	select HW_HAS_PCI
378a83860c2SRalf Baechle	help
379a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
380ade299d8SYoichi Yuasa
3815e83d430SRalf Baechleconfig MACH_VR41XX
38274142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
38342f77542SRalf Baechle	select CEVT_R4K
384940f6b48SRalf Baechle	select CSRC_R4K
3857cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
38627fdd325SYoichi Yuasa	select ARCH_REQUIRE_GPIOLIB
3875e83d430SRalf Baechle
388edb6310aSDaniel Lairdconfig NXP_STB220
389edb6310aSDaniel Laird	bool "NXP STB220 board"
390edb6310aSDaniel Laird	select SOC_PNX833X
391edb6310aSDaniel Laird	help
392edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
393edb6310aSDaniel Laird
394edb6310aSDaniel Lairdconfig NXP_STB225
395edb6310aSDaniel Laird	bool "NXP 225 board"
396edb6310aSDaniel Laird	select SOC_PNX833X
397edb6310aSDaniel Laird	select SOC_PNX8335
398edb6310aSDaniel Laird	help
399edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
400edb6310aSDaniel Laird
4019267a30dSMarc St-Jeanconfig PMC_MSP
4029267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
40339d30c13SAnoop P A	select CEVT_R4K
40439d30c13SAnoop P A	select CSRC_R4K
4059267a30dSMarc St-Jean	select DMA_NONCOHERENT
4069267a30dSMarc St-Jean	select SWAP_IO_SPACE
4079267a30dSMarc St-Jean	select NO_EXCEPT_FILL
4089267a30dSMarc St-Jean	select BOOT_RAW
4099267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
4109267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
4119267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
4129267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
4139267a30dSMarc St-Jean	select IRQ_CPU
4149267a30dSMarc St-Jean	select SERIAL_8250
4159267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
4169296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
4179296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
4189267a30dSMarc St-Jean	help
4199267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
4209267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
4219267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
4229267a30dSMarc St-Jean	  a variety of MIPS cores.
4239267a30dSMarc St-Jean
424ae2b5bb6SJohn Crispinconfig RALINK
425ae2b5bb6SJohn Crispin	bool "Ralink based machines"
426ae2b5bb6SJohn Crispin	select CEVT_R4K
427ae2b5bb6SJohn Crispin	select CSRC_R4K
428ae2b5bb6SJohn Crispin	select BOOT_RAW
429ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
430ae2b5bb6SJohn Crispin	select IRQ_CPU
431ae2b5bb6SJohn Crispin	select USE_OF
432ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
433ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
434ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
435ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
436ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
437ae2b5bb6SJohn Crispin	select HAVE_MACH_CLKDEV
438ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
4392a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
4402a153f1cSJohn Crispin	select RESET_CONTROLLER
441ae2b5bb6SJohn Crispin
4421da177e4SLinus Torvaldsconfig SGI_IP22
4433fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
4440e2794b0SRalf Baechle	select FW_ARC
4450e2794b0SRalf Baechle	select FW_ARC32
4461da177e4SLinus Torvalds	select BOOT_ELF32
44742f77542SRalf Baechle	select CEVT_R4K
448940f6b48SRalf Baechle	select CSRC_R4K
449e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
4501da177e4SLinus Torvalds	select DMA_NONCOHERENT
4515e83d430SRalf Baechle	select HW_HAS_EISA
452d865bea4SRalf Baechle	select I8253
45368de4803SThomas Bogendoerfer	select I8259
4541da177e4SLinus Torvalds	select IP22_CPU_SCACHE
4551da177e4SLinus Torvalds	select IRQ_CPU
456aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
457e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
458e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
45936e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
460e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
461e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
462e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
4631da177e4SLinus Torvalds	select SWAP_IO_SPACE
4647cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
4657cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
4662b5e63f6SMartin Michlmayr	#
4672b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
4682b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
4692b5e63f6SMartin Michlmayr	#
4702b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
4712b5e63f6SMartin Michlmayr	# for a more details discussion
4722b5e63f6SMartin Michlmayr	#
4732b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
474ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
475ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4765e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
477930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
4781da177e4SLinus Torvalds	help
4791da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
4801da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
4811da177e4SLinus Torvalds	  that runs on these, say Y here.
4821da177e4SLinus Torvalds
4831da177e4SLinus Torvaldsconfig SGI_IP27
4843fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
4850e2794b0SRalf Baechle	select FW_ARC
4860e2794b0SRalf Baechle	select FW_ARC64
4875e83d430SRalf Baechle	select BOOT_ELF64
488e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
489634286f1SRalf Baechle	select DMA_COHERENT
49036a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
4911da177e4SLinus Torvalds	select HW_HAS_PCI
492130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
4937cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
494ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4955e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
496d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
4971a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
498930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
4991da177e4SLinus Torvalds	help
5001da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
5011da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
5021da177e4SLinus Torvalds	  here.
5031da177e4SLinus Torvalds
504e2defae5SThomas Bogendoerferconfig SGI_IP28
5057d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
5060e2794b0SRalf Baechle	select FW_ARC
5070e2794b0SRalf Baechle	select FW_ARC64
508e2defae5SThomas Bogendoerfer	select BOOT_ELF64
509e2defae5SThomas Bogendoerfer	select CEVT_R4K
510e2defae5SThomas Bogendoerfer	select CSRC_R4K
511e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
512e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
513e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
514e2defae5SThomas Bogendoerfer	select IRQ_CPU
515e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
516e2defae5SThomas Bogendoerfer	select I8253
517e2defae5SThomas Bogendoerfer	select I8259
518e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
519e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
5205b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
521e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
522e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
523e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
524e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
525e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
5262b5e63f6SMartin Michlmayr	#
5272b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
5282b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
5292b5e63f6SMartin Michlmayr	#
5302b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
5312b5e63f6SMartin Michlmayr	# for a more details discussion
5322b5e63f6SMartin Michlmayr	#
5332b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
534e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
535e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
536e2defae5SThomas Bogendoerfer      help
537e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
538e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
539e2defae5SThomas Bogendoerfer
5401da177e4SLinus Torvaldsconfig SGI_IP32
541cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
5420e2794b0SRalf Baechle	select FW_ARC
5430e2794b0SRalf Baechle	select FW_ARC32
5441da177e4SLinus Torvalds	select BOOT_ELF32
54542f77542SRalf Baechle	select CEVT_R4K
546940f6b48SRalf Baechle	select CSRC_R4K
5471da177e4SLinus Torvalds	select DMA_NONCOHERENT
5481da177e4SLinus Torvalds	select HW_HAS_PCI
549dd67b155SRalf Baechle	select IRQ_CPU
5501da177e4SLinus Torvalds	select R5000_CPU_SCACHE
5511da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
5527cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
5537cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
5547cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
555dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
556ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5575e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
5581da177e4SLinus Torvalds	help
5591da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
5601da177e4SLinus Torvalds
561ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
562ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
5635e83d430SRalf Baechle	select BOOT_ELF32
5645e83d430SRalf Baechle	select DMA_COHERENT
5655e83d430SRalf Baechle	select SIBYTE_BCM1120
5665e83d430SRalf Baechle	select SWAP_IO_SPACE
5677cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
5685e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
5695e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
5705e83d430SRalf Baechle
571ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
572ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
5735e83d430SRalf Baechle	select BOOT_ELF32
5745e83d430SRalf Baechle	select DMA_COHERENT
5755e83d430SRalf Baechle	select SIBYTE_BCM1120
5765e83d430SRalf Baechle	select SWAP_IO_SPACE
5777cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
5785e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
5795e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
5805e83d430SRalf Baechle
5815e83d430SRalf Baechleconfig SIBYTE_CRHONE
5823fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
5835e83d430SRalf Baechle	select BOOT_ELF32
5845e83d430SRalf Baechle	select DMA_COHERENT
5855e83d430SRalf Baechle	select SIBYTE_BCM1125
5865e83d430SRalf Baechle	select SWAP_IO_SPACE
5877cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
5885e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
5895e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
5905e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
5915e83d430SRalf Baechle
592ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
593ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
594ade299d8SYoichi Yuasa	select BOOT_ELF32
595ade299d8SYoichi Yuasa	select DMA_COHERENT
596ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
597ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
598ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
599ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
600ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
601ade299d8SYoichi Yuasa
602ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
603ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
604ade299d8SYoichi Yuasa	select BOOT_ELF32
605ade299d8SYoichi Yuasa	select DMA_COHERENT
606fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
607ade299d8SYoichi Yuasa	select SIBYTE_SB1250
608ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
609ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
610ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
611ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
612ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
613cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
614ade299d8SYoichi Yuasa
615ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
616ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
617ade299d8SYoichi Yuasa	select BOOT_ELF32
618ade299d8SYoichi Yuasa	select DMA_COHERENT
619fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
620ade299d8SYoichi Yuasa	select SIBYTE_SB1250
621ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
622ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
623ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
624ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
625ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
626ade299d8SYoichi Yuasa
627ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
628ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
629ade299d8SYoichi Yuasa	select BOOT_ELF32
630ade299d8SYoichi Yuasa	select DMA_COHERENT
631ade299d8SYoichi Yuasa	select SIBYTE_SB1250
632ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
633ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
634ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
635ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
636ade299d8SYoichi Yuasa
637ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
638ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
639ade299d8SYoichi Yuasa	select BOOT_ELF32
640ade299d8SYoichi Yuasa	select DMA_COHERENT
641ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
642ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
643ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
644ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
645ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
646651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
647ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
648cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
649ade299d8SYoichi Yuasa
65014b36af4SThomas Bogendoerferconfig SNI_RM
65114b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
6520e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
6530e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
654aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
6555e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
6565e83d430SRalf Baechle	select BOOT_ELF32
65742f77542SRalf Baechle	select CEVT_R4K
658940f6b48SRalf Baechle	select CSRC_R4K
659e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
6605e83d430SRalf Baechle	select DMA_NONCOHERENT
6615e83d430SRalf Baechle	select GENERIC_ISA_DMA
6628a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
6635e83d430SRalf Baechle	select HW_HAS_EISA
6645e83d430SRalf Baechle	select HW_HAS_PCI
665c066a32aSThomas Bogendoerfer	select IRQ_CPU
666d865bea4SRalf Baechle	select I8253
6675e83d430SRalf Baechle	select I8259
6685e83d430SRalf Baechle	select ISA
6694a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
6707cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
6714a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
672c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6734a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
67436a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
675ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
6767d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
6774a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
6785e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
6795e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6801da177e4SLinus Torvalds	help
68114b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
68214b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
6835e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
6845e83d430SRalf Baechle	  support this machine type.
6851da177e4SLinus Torvalds
686edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
687edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
6885e83d430SRalf Baechle
689edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
690edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
69123fbee9dSRalf Baechle
69273b4390fSRalf Baechleconfig MIKROTIK_RB532
69373b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
69473b4390fSRalf Baechle	select CEVT_R4K
69573b4390fSRalf Baechle	select CSRC_R4K
69673b4390fSRalf Baechle	select DMA_NONCOHERENT
69773b4390fSRalf Baechle	select HW_HAS_PCI
69873b4390fSRalf Baechle	select IRQ_CPU
69973b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
70073b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
70173b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
70273b4390fSRalf Baechle	select SWAP_IO_SPACE
70373b4390fSRalf Baechle	select BOOT_RAW
704d888e25bSFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
705930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
70673b4390fSRalf Baechle	help
70773b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
70873b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
70973b4390fSRalf Baechle
7109ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
7119ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
712a86c7f72SDavid Daney	select CEVT_R4K
713a86c7f72SDavid Daney	select 64BIT_PHYS_ADDR
714a86c7f72SDavid Daney	select DMA_COHERENT
715a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
716a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
717f65aad41SRalf Baechle	select EDAC_SUPPORT
718773cb77dSRalf Baechle	select SYS_SUPPORTS_HOTPLUG_CPU
719a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
7205e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
721a86c7f72SDavid Daney	select SWAP_IO_SPACE
722e8635b48SDavid Daney	select HW_HAS_PCI
723f00e001eSDavid Daney	select ZONE_DMA32
724340fbb8bSDavid Daney	select USB_ARCH_HAS_OHCI
725340fbb8bSDavid Daney	select USB_ARCH_HAS_EHCI
726465aaed0SDavid Daney	select HOLES_IN_ZONE
72799cab4bbSDavid Daney	select ARCH_REQUIRE_GPIOLIB
728a86c7f72SDavid Daney	help
729a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
730a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
731a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
732a86c7f72SDavid Daney	  Some of the supported boards are:
733a86c7f72SDavid Daney		EBT3000
734a86c7f72SDavid Daney		EBH3000
735a86c7f72SDavid Daney		EBH3100
736a86c7f72SDavid Daney		Thunder
737a86c7f72SDavid Daney		Kodama
738a86c7f72SDavid Daney		Hikari
739a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
740a86c7f72SDavid Daney
7417f058e85SJayachandran Cconfig NLM_XLR_BOARD
7427f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
7437f058e85SJayachandran C	select BOOT_ELF32
7447f058e85SJayachandran C	select NLM_COMMON
7457f058e85SJayachandran C	select SYS_HAS_CPU_XLR
7467f058e85SJayachandran C	select SYS_SUPPORTS_SMP
7477f058e85SJayachandran C	select HW_HAS_PCI
7487f058e85SJayachandran C	select SWAP_IO_SPACE
7497f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
7507f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
7517f058e85SJayachandran C	select 64BIT_PHYS_ADDR
7527f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
7537f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
7547f058e85SJayachandran C	select DMA_COHERENT
7557f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
7567f058e85SJayachandran C	select CEVT_R4K
7577f058e85SJayachandran C	select CSRC_R4K
7587f058e85SJayachandran C	select IRQ_CPU
759b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
7607f058e85SJayachandran C	select SYNC_R4K
7617f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
762f35574a3SJayachandran C	select USB_ARCH_HAS_OHCI if USB_SUPPORT
763f35574a3SJayachandran C	select USB_ARCH_HAS_EHCI if USB_SUPPORT
7648f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
7658f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
7667f058e85SJayachandran C	help
7677f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
7687f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
7697f058e85SJayachandran C
7701c773ea4SJayachandran Cconfig NLM_XLP_BOARD
7711c773ea4SJayachandran C	bool "Netlogic XLP based systems"
7721c773ea4SJayachandran C	select BOOT_ELF32
7731c773ea4SJayachandran C	select NLM_COMMON
7741c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
7751c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
7761c773ea4SJayachandran C	select HW_HAS_PCI
7771c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
7781c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
7791c773ea4SJayachandran C	select 64BIT_PHYS_ADDR
7801c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
7811c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
7821c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
7831c773ea4SJayachandran C	select DMA_COHERENT
7841c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
7851c773ea4SJayachandran C	select CEVT_R4K
7861c773ea4SJayachandran C	select CSRC_R4K
7871c773ea4SJayachandran C	select IRQ_CPU
788b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
7891c773ea4SJayachandran C	select SYNC_R4K
7901c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
7912f6528e1SJayachandran C	select USE_OF
7928f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
7938f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
7941c773ea4SJayachandran C	help
7951c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
7961c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
7971c773ea4SJayachandran C
7981da177e4SLinus Torvaldsendchoice
7991da177e4SLinus Torvalds
800e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
801d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
802a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
803e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
8045e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
8055ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
8068ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
8071f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
8080f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
809ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
81029c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
81138b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
81222b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
8135e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
814a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
81585749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig"
816ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig"
8177f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
81838b18f72SRalf Baechle
8195e83d430SRalf Baechleendmenu
8205e83d430SRalf Baechle
8211da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
8221da177e4SLinus Torvalds	bool
8231da177e4SLinus Torvalds	default y
8241da177e4SLinus Torvalds
8251da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
8261da177e4SLinus Torvalds	bool
8271da177e4SLinus Torvalds
828f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
829f0d1b0b3SDavid Howells	bool
830f0d1b0b3SDavid Howells	default n
831f0d1b0b3SDavid Howells
832f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
833f0d1b0b3SDavid Howells	bool
834f0d1b0b3SDavid Howells	default n
835f0d1b0b3SDavid Howells
8363c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
8373c9ee7efSAkinobu Mita	bool
8383c9ee7efSAkinobu Mita	default y
8393c9ee7efSAkinobu Mita
8401da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
8411da177e4SLinus Torvalds	bool
8421da177e4SLinus Torvalds	default y
8431da177e4SLinus Torvalds
844ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
8451cc89038SAtsushi Nemoto	bool
8461cc89038SAtsushi Nemoto	default y
8471cc89038SAtsushi Nemoto
8481da177e4SLinus Torvalds#
8491da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
8501da177e4SLinus Torvalds#
8510e2794b0SRalf Baechleconfig FW_ARC
8521da177e4SLinus Torvalds	bool
8531da177e4SLinus Torvalds
85461ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
85561ed242dSRalf Baechle	bool
85661ed242dSRalf Baechle
8579267a30dSMarc St-Jeanconfig BOOT_RAW
8589267a30dSMarc St-Jean	bool
8599267a30dSMarc St-Jean
860217dd11eSRalf Baechleconfig CEVT_BCM1480
861217dd11eSRalf Baechle	bool
862217dd11eSRalf Baechle
8636457d9fcSYoichi Yuasaconfig CEVT_DS1287
8646457d9fcSYoichi Yuasa	bool
8656457d9fcSYoichi Yuasa
8661097c6acSYoichi Yuasaconfig CEVT_GT641XX
8671097c6acSYoichi Yuasa	bool
8681097c6acSYoichi Yuasa
86942f77542SRalf Baechleconfig CEVT_R4K
87042f77542SRalf Baechle	bool
87142f77542SRalf Baechle
8720ab2b7d0SRaghu Gandhamconfig CEVT_GIC
873237036deSPaul Burton	select MIPS_CM
8740ab2b7d0SRaghu Gandham	bool
8750ab2b7d0SRaghu Gandham
876217dd11eSRalf Baechleconfig CEVT_SB1250
877217dd11eSRalf Baechle	bool
878217dd11eSRalf Baechle
879229f773eSAtsushi Nemotoconfig CEVT_TXX9
880229f773eSAtsushi Nemoto	bool
881229f773eSAtsushi Nemoto
882217dd11eSRalf Baechleconfig CSRC_BCM1480
883217dd11eSRalf Baechle	bool
884217dd11eSRalf Baechle
8854247417dSYoichi Yuasaconfig CSRC_IOASIC
8864247417dSYoichi Yuasa	bool
8874247417dSYoichi Yuasa
888940f6b48SRalf Baechleconfig CSRC_R4K
889940f6b48SRalf Baechle	bool
890940f6b48SRalf Baechle
891778eeb1bSSteven J. Hillconfig CSRC_GIC
892237036deSPaul Burton	select MIPS_CM
893778eeb1bSSteven J. Hill	bool
894778eeb1bSSteven J. Hill
895217dd11eSRalf Baechleconfig CSRC_SB1250
896217dd11eSRalf Baechle	bool
897217dd11eSRalf Baechle
898a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
8997444a72eSMichael Buesch	select ARCH_REQUIRE_GPIOLIB
900a9aec7feSAtsushi Nemoto	bool
901a9aec7feSAtsushi Nemoto
9020e2794b0SRalf Baechleconfig FW_CFE
903df78b5c8SAurelien Jarno	bool
904df78b5c8SAurelien Jarno
9054bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
9064bafad92SFUJITA Tomonori	def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
9074bafad92SFUJITA Tomonori
908885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
909885014bcSFelix Fietkau	select DMA_NONCOHERENT
910885014bcSFelix Fietkau	bool
911885014bcSFelix Fietkau
9121da177e4SLinus Torvaldsconfig DMA_COHERENT
9131da177e4SLinus Torvalds	bool
9141da177e4SLinus Torvalds
9151da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
9161da177e4SLinus Torvalds	bool
917e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
9184ce588cdSRalf Baechle
919e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
9204ce588cdSRalf Baechle	bool
9211da177e4SLinus Torvalds
92236a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
9231da177e4SLinus Torvalds	bool
9241da177e4SLinus Torvalds
925dbb74540SRalf Baechleconfig HOTPLUG_CPU
9261b2bc75cSRalf Baechle	bool "Support for hot-pluggable CPUs"
92740b31360SStephen Rothwell	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
9281b2bc75cSRalf Baechle	help
9291b2bc75cSRalf Baechle	  Say Y here to allow turning CPUs off and on. CPUs can be
9301b2bc75cSRalf Baechle	  controlled through /sys/devices/system/cpu.
9311b2bc75cSRalf Baechle	  (Note: power management support will enable this option
9321b2bc75cSRalf Baechle	    automatically on SMP systems. )
9331b2bc75cSRalf Baechle	  Say N if you want to disable CPU hotplug.
9341b2bc75cSRalf Baechle
9351b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
936dbb74540SRalf Baechle	bool
937dbb74540SRalf Baechle
9381da177e4SLinus Torvaldsconfig I8259
9391da177e4SLinus Torvalds	bool
9401da177e4SLinus Torvalds
9411da177e4SLinus Torvaldsconfig MIPS_BONITO64
9421da177e4SLinus Torvalds	bool
9431da177e4SLinus Torvalds
9441da177e4SLinus Torvaldsconfig MIPS_MSC
9451da177e4SLinus Torvalds	bool
9461da177e4SLinus Torvalds
9471f21d2bdSBrian Murphyconfig MIPS_NILE4
9481f21d2bdSBrian Murphy	bool
9491f21d2bdSBrian Murphy
95039b8d525SRalf Baechleconfig SYNC_R4K
95139b8d525SRalf Baechle	bool
95239b8d525SRalf Baechle
953487d70d0SGabor Juhosconfig MIPS_MACHINE
954487d70d0SGabor Juhos	def_bool n
955487d70d0SGabor Juhos
956d388d685SMaciej W. Rozyckiconfig NO_IOPORT
957d388d685SMaciej W. Rozycki	def_bool n
958d388d685SMaciej W. Rozycki
9598313da30SRalf Baechleconfig GENERIC_ISA_DMA
9608313da30SRalf Baechle	bool
9618313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
962a35bee8aSNamhyung Kim	select ISA_DMA_API
9638313da30SRalf Baechle
964aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
965aa414dffSRalf Baechle	bool
9668313da30SRalf Baechle	select GENERIC_ISA_DMA
967aa414dffSRalf Baechle
968a35bee8aSNamhyung Kimconfig ISA_DMA_API
969a35bee8aSNamhyung Kim	bool
970a35bee8aSNamhyung Kim
971465aaed0SDavid Daneyconfig HOLES_IN_ZONE
972465aaed0SDavid Daney	bool
973465aaed0SDavid Daney
9745e83d430SRalf Baechle#
9756b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
9765e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
9775e83d430SRalf Baechle# choice statement should be more obvious to the user.
9785e83d430SRalf Baechle#
9795e83d430SRalf Baechlechoice
9806b2aac42SMasanari Iida	prompt "Endianness selection"
9811da177e4SLinus Torvalds	help
9821da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
9835e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
9843cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
9855e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
9863dde6ad8SDavid Sterba	  one or the other endianness.
9875e83d430SRalf Baechle
9885e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
9895e83d430SRalf Baechle	bool "Big endian"
9905e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
9915e83d430SRalf Baechle
9925e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
9935e83d430SRalf Baechle	bool "Little endian"
9945e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
9955e83d430SRalf Baechle
9965e83d430SRalf Baechleendchoice
9975e83d430SRalf Baechle
99822b0763aSDavid Daneyconfig EXPORT_UASM
99922b0763aSDavid Daney	bool
100022b0763aSDavid Daney
10012116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
10022116245eSRalf Baechle	bool
10032116245eSRalf Baechle
10045e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
10055e83d430SRalf Baechle	bool
10065e83d430SRalf Baechle
10075e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
10085e83d430SRalf Baechle	bool
10091da177e4SLinus Torvalds
10109cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
10119cffd154SDavid Daney	bool
10129cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
10139cffd154SDavid Daney	default y
10149cffd154SDavid Daney
1015aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1016aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1017aa1762f4SDavid Daney
10181da177e4SLinus Torvaldsconfig IRQ_CPU
10191da177e4SLinus Torvalds	bool
10201da177e4SLinus Torvalds
10211da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
10221da177e4SLinus Torvalds	bool
10231da177e4SLinus Torvalds
10249267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
10259267a30dSMarc St-Jean	bool
10269267a30dSMarc St-Jean
10279267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
10289267a30dSMarc St-Jean	bool
10299267a30dSMarc St-Jean
10308420fd00SAtsushi Nemotoconfig IRQ_TXX9
10318420fd00SAtsushi Nemoto	bool
10328420fd00SAtsushi Nemoto
1033d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1034d5ab1a69SYoichi Yuasa	bool
1035d5ab1a69SYoichi Yuasa
103639b8d525SRalf Baechleconfig IRQ_GIC
1037237036deSPaul Burton	select MIPS_CM
103839b8d525SRalf Baechle	bool
103939b8d525SRalf Baechle
1040252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
10411da177e4SLinus Torvalds	bool
10421da177e4SLinus Torvalds
10439267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
10449267a30dSMarc St-Jean	bool
10459267a30dSMarc St-Jean
1046a83860c2SRalf Baechleconfig SOC_EMMA2RH
1047a83860c2SRalf Baechle	bool
1048a83860c2SRalf Baechle	select CEVT_R4K
1049a83860c2SRalf Baechle	select CSRC_R4K
1050a83860c2SRalf Baechle	select DMA_NONCOHERENT
1051a83860c2SRalf Baechle	select IRQ_CPU
1052a83860c2SRalf Baechle	select SWAP_IO_SPACE
1053a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1054a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1055a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1056a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1057a83860c2SRalf Baechle
1058edb6310aSDaniel Lairdconfig SOC_PNX833X
1059edb6310aSDaniel Laird	bool
1060edb6310aSDaniel Laird	select CEVT_R4K
1061edb6310aSDaniel Laird	select CSRC_R4K
1062edb6310aSDaniel Laird	select IRQ_CPU
1063edb6310aSDaniel Laird	select DMA_NONCOHERENT
1064edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1065edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1066edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1067edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1068edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1069edb6310aSDaniel Laird
1070edb6310aSDaniel Lairdconfig SOC_PNX8335
1071edb6310aSDaniel Laird	bool
1072edb6310aSDaniel Laird	select SOC_PNX833X
1073edb6310aSDaniel Laird
10741da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
10751da177e4SLinus Torvalds	bool
10761da177e4SLinus Torvalds
1077e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1078e2defae5SThomas Bogendoerfer	bool
1079e2defae5SThomas Bogendoerfer
10805b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
10815b438c44SThomas Bogendoerfer	bool
10825b438c44SThomas Bogendoerfer
1083e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1084e2defae5SThomas Bogendoerfer	bool
1085e2defae5SThomas Bogendoerfer
1086e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1087e2defae5SThomas Bogendoerfer	bool
1088e2defae5SThomas Bogendoerfer
1089e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1090e2defae5SThomas Bogendoerfer	bool
1091e2defae5SThomas Bogendoerfer
1092e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1093e2defae5SThomas Bogendoerfer	bool
1094e2defae5SThomas Bogendoerfer
1095e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1096e2defae5SThomas Bogendoerfer	bool
1097e2defae5SThomas Bogendoerfer
10980e2794b0SRalf Baechleconfig FW_ARC32
10995e83d430SRalf Baechle	bool
11005e83d430SRalf Baechle
1101aaa9fad3SPaul Bolleconfig FW_SNIPROM
1102231a35d3SThomas Bogendoerfer	bool
1103231a35d3SThomas Bogendoerfer
11041da177e4SLinus Torvaldsconfig BOOT_ELF32
11051da177e4SLinus Torvalds	bool
11061da177e4SLinus Torvalds
1107930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1108930beb5aSFlorian Fainelli	bool
1109930beb5aSFlorian Fainelli
1110930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1111930beb5aSFlorian Fainelli	bool
1112930beb5aSFlorian Fainelli
1113930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1114930beb5aSFlorian Fainelli	bool
1115930beb5aSFlorian Fainelli
1116930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1117930beb5aSFlorian Fainelli	bool
1118930beb5aSFlorian Fainelli
11191da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
11201da177e4SLinus Torvalds	int
1121a4c0201eSFlorian Fainelli	default "4" if MIPS_L1_CACHE_SHIFT_4
1122a4c0201eSFlorian Fainelli	default "5" if MIPS_L1_CACHE_SHIFT_5
1123a4c0201eSFlorian Fainelli	default "6" if MIPS_L1_CACHE_SHIFT_6
1124a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
11251da177e4SLinus Torvalds	default "5"
11261da177e4SLinus Torvalds
11271da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
11281da177e4SLinus Torvalds	bool
11291da177e4SLinus Torvalds
11301da177e4SLinus Torvaldsconfig ARC_CONSOLE
11311da177e4SLinus Torvalds	bool "ARC console support"
1132e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
11331da177e4SLinus Torvalds
11341da177e4SLinus Torvaldsconfig ARC_MEMORY
11351da177e4SLinus Torvalds	bool
113614b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
11371da177e4SLinus Torvalds	default y
11381da177e4SLinus Torvalds
11391da177e4SLinus Torvaldsconfig ARC_PROMLIB
11401da177e4SLinus Torvalds	bool
1141e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
11421da177e4SLinus Torvalds	default y
11431da177e4SLinus Torvalds
11440e2794b0SRalf Baechleconfig FW_ARC64
11451da177e4SLinus Torvalds	bool
11461da177e4SLinus Torvalds
11471da177e4SLinus Torvaldsconfig BOOT_ELF64
11481da177e4SLinus Torvalds	bool
11491da177e4SLinus Torvalds
11501da177e4SLinus Torvaldsmenu "CPU selection"
11511da177e4SLinus Torvalds
11521da177e4SLinus Torvaldschoice
11531da177e4SLinus Torvalds	prompt "CPU type"
11541da177e4SLinus Torvalds	default CPU_R4X00
11551da177e4SLinus Torvalds
1156*0e476d91SHuacai Chenconfig CPU_LOONGSON3
1157*0e476d91SHuacai Chen	bool "Loongson 3 CPU"
1158*0e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
1159*0e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
1160*0e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
1161*0e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
1162*0e476d91SHuacai Chen	select WEAK_ORDERING
1163*0e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
1164*0e476d91SHuacai Chen	help
1165*0e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
1166*0e476d91SHuacai Chen		set with many extensions.
1167*0e476d91SHuacai Chen
11683702bba5SWu Zhangjinconfig CPU_LOONGSON2E
11693702bba5SWu Zhangjin	bool "Loongson 2E"
11703702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
11713702bba5SWu Zhangjin	select CPU_LOONGSON2
11722a21c730SFuxin Zhang	help
11732a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
11742a21c730SFuxin Zhang	  with many extensions.
11752a21c730SFuxin Zhang
117625985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
11776f7a251aSWu Zhangjin	  bonito64.
11786f7a251aSWu Zhangjin
11796f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
11806f7a251aSWu Zhangjin	bool "Loongson 2F"
11816f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
11826f7a251aSWu Zhangjin	select CPU_LOONGSON2
1183c197da91SArnaud Patard	select ARCH_REQUIRE_GPIOLIB
11846f7a251aSWu Zhangjin	help
11856f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
11866f7a251aSWu Zhangjin	  with many extensions.
11876f7a251aSWu Zhangjin
11886f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
11896f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
11906f7a251aSWu Zhangjin	  Loongson2E.
11916f7a251aSWu Zhangjin
1192ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1193ca585cf9SKelvin Cheung	bool "Loongson 1B"
1194ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1195ca585cf9SKelvin Cheung	select CPU_LOONGSON1
1196ca585cf9SKelvin Cheung	help
1197ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1198ca585cf9SKelvin Cheung	  release 2 instruction set.
1199ca585cf9SKelvin Cheung
12006e760c8dSRalf Baechleconfig CPU_MIPS32_R1
12016e760c8dSRalf Baechle	bool "MIPS32 Release 1"
12027cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
12036e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1204797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1205ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
12066e760c8dSRalf Baechle	help
12075e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
12081e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
12091e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
12101e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
12111e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
12121e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
12131e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
12141e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
12151e5f1caaSRalf Baechle	  performance.
12161e5f1caaSRalf Baechle
12171e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
12181e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
12197cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
12201e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1221797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1222ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1223a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
12242235a54dSSanjay Lal	select HAVE_KVM
12251e5f1caaSRalf Baechle	help
12265e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
12276e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
12286e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
12296e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
12306e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
12311da177e4SLinus Torvalds
12326e760c8dSRalf Baechleconfig CPU_MIPS64_R1
12336e760c8dSRalf Baechle	bool "MIPS64 Release 1"
12347cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1235797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1236ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1237ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1238ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
12399cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
12406e760c8dSRalf Baechle	help
12416e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
12426e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
12436e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
12446e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
12456e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
12461e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
12471e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
12481e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
12491e5f1caaSRalf Baechle	  performance.
12501e5f1caaSRalf Baechle
12511e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
12521e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
12537cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1254797798c1SRalf Baechle	select CPU_HAS_PREFETCH
12551e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
12561e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1257ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
12589cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1259a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
12601e5f1caaSRalf Baechle	help
12611e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
12621e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
12631e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
12641e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
12651e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
12661da177e4SLinus Torvalds
12671da177e4SLinus Torvaldsconfig CPU_R3000
12681da177e4SLinus Torvalds	bool "R3000"
12697cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1270f7062ddbSRalf Baechle	select CPU_HAS_WB
1271ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1272797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
12731da177e4SLinus Torvalds	help
12741da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
12751da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
12761da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
12771da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
12781da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
12791da177e4SLinus Torvalds	  try to recompile with R3000.
12801da177e4SLinus Torvalds
12811da177e4SLinus Torvaldsconfig CPU_TX39XX
12821da177e4SLinus Torvalds	bool "R39XX"
12837cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1284ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
12851da177e4SLinus Torvalds
12861da177e4SLinus Torvaldsconfig CPU_VR41XX
12871da177e4SLinus Torvalds	bool "R41xx"
12887cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1289ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1290ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
12911da177e4SLinus Torvalds	help
12925e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
12931da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
12941da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
12951da177e4SLinus Torvalds	  processor or vice versa.
12961da177e4SLinus Torvalds
12971da177e4SLinus Torvaldsconfig CPU_R4300
12981da177e4SLinus Torvalds	bool "R4300"
12997cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1300ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1301ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
13021da177e4SLinus Torvalds	help
13031da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
13041da177e4SLinus Torvalds
13051da177e4SLinus Torvaldsconfig CPU_R4X00
13061da177e4SLinus Torvalds	bool "R4x00"
13077cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1308ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1309ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1310970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
13111da177e4SLinus Torvalds	help
13121da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
13131da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
13141da177e4SLinus Torvalds
13151da177e4SLinus Torvaldsconfig CPU_TX49XX
13161da177e4SLinus Torvalds	bool "R49XX"
13177cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1318de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1319ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1320ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1321970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
13221da177e4SLinus Torvalds
13231da177e4SLinus Torvaldsconfig CPU_R5000
13241da177e4SLinus Torvalds	bool "R5000"
13257cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1326ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1327ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1328970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
13291da177e4SLinus Torvalds	help
13301da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
13311da177e4SLinus Torvalds
13321da177e4SLinus Torvaldsconfig CPU_R5432
13331da177e4SLinus Torvalds	bool "R5432"
13347cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
13355e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
13365e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1337970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
13381da177e4SLinus Torvalds
1339542c1020SShinya Kuribayashiconfig CPU_R5500
1340542c1020SShinya Kuribayashi	bool "R5500"
1341542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1342542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1343542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
13449cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1345542c1020SShinya Kuribayashi	help
1346542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1347542c1020SShinya Kuribayashi	  instruction set.
1348542c1020SShinya Kuribayashi
13491da177e4SLinus Torvaldsconfig CPU_R6000
13501da177e4SLinus Torvalds	bool "R6000"
13517cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1352ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
13531da177e4SLinus Torvalds	help
13541da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1355c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
13561da177e4SLinus Torvalds
13571da177e4SLinus Torvaldsconfig CPU_NEVADA
13581da177e4SLinus Torvalds	bool "RM52xx"
13597cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1360ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1361ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1362970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
13631da177e4SLinus Torvalds	help
13641da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
13651da177e4SLinus Torvalds
13661da177e4SLinus Torvaldsconfig CPU_R8000
13671da177e4SLinus Torvalds	bool "R8000"
13687cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
13695e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1370ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
13711da177e4SLinus Torvalds	help
13721da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
13731da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
13741da177e4SLinus Torvalds
13751da177e4SLinus Torvaldsconfig CPU_R10000
13761da177e4SLinus Torvalds	bool "R10000"
13777cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
13785e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1379ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1380ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1381797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1382970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
13831da177e4SLinus Torvalds	help
13841da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
13851da177e4SLinus Torvalds
13861da177e4SLinus Torvaldsconfig CPU_RM7000
13871da177e4SLinus Torvalds	bool "RM7000"
13887cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
13895e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1390ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1391ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1392797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1393970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
13941da177e4SLinus Torvalds
13951da177e4SLinus Torvaldsconfig CPU_SB1
13961da177e4SLinus Torvalds	bool "SB1"
13977cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1398ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1399ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1400797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1401970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14020004a9dfSRalf Baechle	select WEAK_ORDERING
14031da177e4SLinus Torvalds
1404a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1405a86c7f72SDavid Daney	bool "Cavium Octeon processor"
14065e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
14077ee91de4SYoichi Yuasa	select ARCH_SPARSEMEM_ENABLE
1408a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1409a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1410a86c7f72SDavid Daney	select SYS_SUPPORTS_SMP
1411a86c7f72SDavid Daney	select NR_CPUS_DEFAULT_16
1412a86c7f72SDavid Daney	select WEAK_ORDERING
1413a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
14149cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
14157ed18152SDavid Daney	select LIBFDT
14167ed18152SDavid Daney	select USE_OF
14179296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
1418930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
1419a86c7f72SDavid Daney	help
1420a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1421a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1422a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1423a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1424a86c7f72SDavid Daney
1425cd746249SJonas Gorskiconfig CPU_BMIPS
1426cd746249SJonas Gorski	bool "Broadcom BMIPS"
1427cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1428cd746249SJonas Gorski	select CPU_MIPS32
1429fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1430cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1431cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1432cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1433cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1434cd746249SJonas Gorski	select DMA_NONCOHERENT
1435cd746249SJonas Gorski	select IRQ_CPU
1436cd746249SJonas Gorski	select SWAP_IO_SPACE
1437cd746249SJonas Gorski	select WEAK_ORDERING
1438c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
143969aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1440c1c0c461SKevin Cernekee	help
1441fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1442c1c0c461SKevin Cernekee
14437f058e85SJayachandran Cconfig CPU_XLR
14447f058e85SJayachandran C	bool "Netlogic XLR SoC"
14457f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
14467f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
14477f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
14487f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1449970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14507f058e85SJayachandran C	select WEAK_ORDERING
14517f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
14527f058e85SJayachandran C	help
14537f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
14541c773ea4SJayachandran C
14551c773ea4SJayachandran Cconfig CPU_XLP
14561c773ea4SJayachandran C	bool "Netlogic XLP SoC"
14571c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
14581c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
14591c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
14601c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
14611c773ea4SJayachandran C	select WEAK_ORDERING
14621c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
14631c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1464d6504846SJayachandran C	select CPU_MIPSR2
14651c773ea4SJayachandran C	help
14661c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
14671da177e4SLinus Torvaldsendchoice
14681da177e4SLinus Torvalds
1469a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1470a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1471a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
1472a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_R2
1473a6e18781SLeonid Yegoshin	help
1474a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1475a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1476a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1477a6e18781SLeonid Yegoshin
1478a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1479a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1480a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1481a6e18781SLeonid Yegoshin	select EVA
1482a6e18781SLeonid Yegoshin	default y
1483a6e18781SLeonid Yegoshin	help
1484a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1485a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1486a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1487a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1488a6e18781SLeonid Yegoshin
1489622844bfSWu Zhangjinif CPU_LOONGSON2F
1490622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1491622844bfSWu Zhangjin	bool
1492622844bfSWu Zhangjin
1493622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1494622844bfSWu Zhangjin	bool
1495622844bfSWu Zhangjin
1496622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1497622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1498622844bfSWu Zhangjin	default y
1499622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1500622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1501622844bfSWu Zhangjin	help
1502622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1503622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1504622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1505622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1506622844bfSWu Zhangjin
1507622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1508622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1509622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1510622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1511622844bfSWu Zhangjin	  systems.
1512622844bfSWu Zhangjin
1513622844bfSWu Zhangjin	  If unsure, please say Y.
1514622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1515622844bfSWu Zhangjin
15161b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
15171b93b3c3SWu Zhangjin	bool
15181b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
15191b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
152031c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
15211b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1522fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
15234e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
15241b93b3c3SWu Zhangjin
15251b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
15261b93b3c3SWu Zhangjin	bool
15271b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
15281b93b3c3SWu Zhangjin
15293702bba5SWu Zhangjinconfig CPU_LOONGSON2
15303702bba5SWu Zhangjin	bool
15313702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
15323702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
15333702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1534970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15353702bba5SWu Zhangjin
1536ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1537ca585cf9SKelvin Cheung	bool
1538ca585cf9SKelvin Cheung	select CPU_MIPS32
1539ca585cf9SKelvin Cheung	select CPU_MIPSR2
1540ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1541ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1542ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1543ca585cf9SKelvin Cheung
1544fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
154504fa8bf7SJonas Gorski	select SMP_UP if SMP
15461bbb6c1bSKevin Cernekee	bool
1547cd746249SJonas Gorski
1548cd746249SJonas Gorskiconfig CPU_BMIPS4350
1549cd746249SJonas Gorski	bool
1550cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1551cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1552cd746249SJonas Gorski
1553cd746249SJonas Gorskiconfig CPU_BMIPS4380
1554cd746249SJonas Gorski	bool
1555cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1556cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1557cd746249SJonas Gorski
1558cd746249SJonas Gorskiconfig CPU_BMIPS5000
1559cd746249SJonas Gorski	bool
1560cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1561cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1562cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
15631bbb6c1bSKevin Cernekee
1564*0e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
1565*0e476d91SHuacai Chen	bool
1566*0e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
1567*0e476d91SHuacai Chen
15683702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
15692a21c730SFuxin Zhang	bool
15702a21c730SFuxin Zhang
15716f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
15726f7a251aSWu Zhangjin	bool
157355045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
157455045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
157522f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
15766f7a251aSWu Zhangjin
1577ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1578ca585cf9SKelvin Cheung	bool
1579ca585cf9SKelvin Cheung
15807cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
15817cf8053bSRalf Baechle	bool
15827cf8053bSRalf Baechle
15837cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
15847cf8053bSRalf Baechle	bool
15857cf8053bSRalf Baechle
1586a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1587a6e18781SLeonid Yegoshin	bool
1588a6e18781SLeonid Yegoshin
15897cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
15907cf8053bSRalf Baechle	bool
15917cf8053bSRalf Baechle
15927cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
15937cf8053bSRalf Baechle	bool
15947cf8053bSRalf Baechle
15957cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
15967cf8053bSRalf Baechle	bool
15977cf8053bSRalf Baechle
15987cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
15997cf8053bSRalf Baechle	bool
16007cf8053bSRalf Baechle
16017cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
16027cf8053bSRalf Baechle	bool
16037cf8053bSRalf Baechle
16047cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
16057cf8053bSRalf Baechle	bool
16067cf8053bSRalf Baechle
16077cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
16087cf8053bSRalf Baechle	bool
16097cf8053bSRalf Baechle
16107cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
16117cf8053bSRalf Baechle	bool
16127cf8053bSRalf Baechle
16137cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
16147cf8053bSRalf Baechle	bool
16157cf8053bSRalf Baechle
16167cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
16177cf8053bSRalf Baechle	bool
16187cf8053bSRalf Baechle
1619542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1620542c1020SShinya Kuribayashi	bool
1621542c1020SShinya Kuribayashi
16227cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
16237cf8053bSRalf Baechle	bool
16247cf8053bSRalf Baechle
16257cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
16267cf8053bSRalf Baechle	bool
16277cf8053bSRalf Baechle
16287cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
16297cf8053bSRalf Baechle	bool
16307cf8053bSRalf Baechle
16317cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
16327cf8053bSRalf Baechle	bool
16337cf8053bSRalf Baechle
16347cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
16357cf8053bSRalf Baechle	bool
16367cf8053bSRalf Baechle
16377cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
16387cf8053bSRalf Baechle	bool
16397cf8053bSRalf Baechle
16405e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
16415e683389SDavid Daney	bool
16425e683389SDavid Daney
1643cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1644c1c0c461SKevin Cernekee	bool
1645c1c0c461SKevin Cernekee
1646fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1647c1c0c461SKevin Cernekee	bool
1648cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1649c1c0c461SKevin Cernekee
1650c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1651c1c0c461SKevin Cernekee	bool
1652cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1653c1c0c461SKevin Cernekee
1654c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1655c1c0c461SKevin Cernekee	bool
1656cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1657c1c0c461SKevin Cernekee
1658c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1659c1c0c461SKevin Cernekee	bool
1660cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1661c1c0c461SKevin Cernekee
16627f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
16637f058e85SJayachandran C	bool
16647f058e85SJayachandran C
16651c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
16661c773ea4SJayachandran C	bool
16671c773ea4SJayachandran C
166817099b11SRalf Baechle#
166917099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
167017099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
167117099b11SRalf Baechle#
16720004a9dfSRalf Baechleconfig WEAK_ORDERING
16730004a9dfSRalf Baechle	bool
167417099b11SRalf Baechle
167517099b11SRalf Baechle#
167617099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
167717099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
167817099b11SRalf Baechle#
167917099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
168017099b11SRalf Baechle	bool
16815e83d430SRalf Baechleendmenu
16825e83d430SRalf Baechle
16835e83d430SRalf Baechle#
16845e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
16855e83d430SRalf Baechle#
16865e83d430SRalf Baechleconfig CPU_MIPS32
16875e83d430SRalf Baechle	bool
16885e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
16895e83d430SRalf Baechle
16905e83d430SRalf Baechleconfig CPU_MIPS64
16915e83d430SRalf Baechle	bool
16925e83d430SRalf Baechle	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
16935e83d430SRalf Baechle
16945e83d430SRalf Baechle#
1695c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
16965e83d430SRalf Baechle#
16975e83d430SRalf Baechleconfig CPU_MIPSR1
16985e83d430SRalf Baechle	bool
16995e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
17005e83d430SRalf Baechle
17015e83d430SRalf Baechleconfig CPU_MIPSR2
17025e83d430SRalf Baechle	bool
1703a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
17045e83d430SRalf Baechle
1705a6e18781SLeonid Yegoshinconfig EVA
1706a6e18781SLeonid Yegoshin	bool
1707a6e18781SLeonid Yegoshin
17085e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
17095e83d430SRalf Baechle	bool
17105e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
17115e83d430SRalf Baechle	bool
17125e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
17135e83d430SRalf Baechle	bool
17145e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
17155e83d430SRalf Baechle	bool
171655045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
171755045ff5SWu Zhangjin	bool
171855045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
171955045ff5SWu Zhangjin	bool
17209cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
17219cffd154SDavid Daney	bool
172222f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
172322f1fdfdSWu Zhangjin	bool
172482622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
172582622284SDavid Daney	bool
1726d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
17275e83d430SRalf Baechle
17288192c9eaSDavid Daney#
17298192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
17308192c9eaSDavid Daney#
17318192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
17328192c9eaSDavid Daney       bool
1733f839490aSDavid Daney       default y if CPU_MIPSR1 || CPU_MIPSR2
17348192c9eaSDavid Daney
17355e83d430SRalf Baechlemenu "Kernel type"
17365e83d430SRalf Baechle
17375e83d430SRalf Baechlechoice
17385e83d430SRalf Baechle	prompt "Kernel code model"
17395e83d430SRalf Baechle	help
17405e83d430SRalf Baechle	  You should only select this option if you have a workload that
17415e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
17425e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
17435e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
17445e83d430SRalf Baechle
17455e83d430SRalf Baechleconfig 32BIT
17465e83d430SRalf Baechle	bool "32-bit kernel"
17475e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
17485e83d430SRalf Baechle	select TRAD_SIGNALS
17495e83d430SRalf Baechle	help
17505e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
17515e83d430SRalf Baechleconfig 64BIT
17525e83d430SRalf Baechle	bool "64-bit kernel"
17535e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
17545e83d430SRalf Baechle	help
17555e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
17565e83d430SRalf Baechle
17575e83d430SRalf Baechleendchoice
17585e83d430SRalf Baechle
17592235a54dSSanjay Lalconfig KVM_GUEST
17602235a54dSSanjay Lal	bool "KVM Guest Kernel"
1761f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
17622235a54dSSanjay Lal	help
17632235a54dSSanjay Lal	  Select this option if building a guest kernel for KVM (Trap & Emulate) mode
17642235a54dSSanjay Lal
17652235a54dSSanjay Lalconfig KVM_HOST_FREQ
17662235a54dSSanjay Lal	int "KVM Host Processor Frequency (MHz)"
17672235a54dSSanjay Lal	depends on KVM_GUEST
17682235a54dSSanjay Lal	default 500
17692235a54dSSanjay Lal	help
17702235a54dSSanjay Lal	  Select this option if building a guest kernel for KVM to skip
17712235a54dSSanjay Lal	  RTC emulation when determining guest CPU Frequency.  Instead, the guest
17722235a54dSSanjay Lal	  processor frequency is automatically derived from the host frequency.
17732235a54dSSanjay Lal
17741da177e4SLinus Torvaldschoice
17751da177e4SLinus Torvalds	prompt "Kernel page size"
17761da177e4SLinus Torvalds	default PAGE_SIZE_4KB
17771da177e4SLinus Torvalds
17781da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
17791da177e4SLinus Torvalds	bool "4kB"
1780*0e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
17811da177e4SLinus Torvalds	help
17821da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
17831da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
17841da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
17851da177e4SLinus Torvalds	 recommended for low memory systems.
17861da177e4SLinus Torvalds
17871da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
17881da177e4SLinus Torvalds	bool "8kB"
17897d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
17901da177e4SLinus Torvalds	help
17911da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
17921da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
1793c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
1794c52399beSRalf Baechle	  suitable Linux distribution to support this.
17951da177e4SLinus Torvalds
17961da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
17971da177e4SLinus Torvalds	bool "16kB"
1798714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
17991da177e4SLinus Torvalds	help
18001da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
18011da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
1802714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
1803714bfad6SRalf Baechle	  Linux distribution to support this.
18041da177e4SLinus Torvalds
1805c52399beSRalf Baechleconfig PAGE_SIZE_32KB
1806c52399beSRalf Baechle	bool "32kB"
1807c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
1808c52399beSRalf Baechle	help
1809c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
1810c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
1811c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
1812c52399beSRalf Baechle	  distribution to support this.
1813c52399beSRalf Baechle
18141da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
18151da177e4SLinus Torvalds	bool "64kB"
18167d60717eSKees Cook	depends on !CPU_R3000 && !CPU_TX39XX
18171da177e4SLinus Torvalds	help
18181da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
18191da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
18201da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
1821714bfad6SRalf Baechle	  writing this option is still high experimental.
18221da177e4SLinus Torvalds
18231da177e4SLinus Torvaldsendchoice
18241da177e4SLinus Torvalds
1825c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
1826c9bace7cSDavid Daney	int "Maximum zone order"
182785f993b8SDavid Daney	range 14 64 if HUGETLB_PAGE && PAGE_SIZE_64KB
182885f993b8SDavid Daney	default "14" if HUGETLB_PAGE && PAGE_SIZE_64KB
182985f993b8SDavid Daney	range 13 64 if HUGETLB_PAGE && PAGE_SIZE_32KB
183085f993b8SDavid Daney	default "13" if HUGETLB_PAGE && PAGE_SIZE_32KB
183185f993b8SDavid Daney	range 12 64 if HUGETLB_PAGE && PAGE_SIZE_16KB
183285f993b8SDavid Daney	default "12" if HUGETLB_PAGE && PAGE_SIZE_16KB
1833c9bace7cSDavid Daney	range 11 64
1834c9bace7cSDavid Daney	default "11"
1835c9bace7cSDavid Daney	help
1836c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
1837c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
1838c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
1839c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
1840c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
1841c9bace7cSDavid Daney	  increase this value.
1842c9bace7cSDavid Daney
1843c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
1844c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
1845c9bace7cSDavid Daney
1846c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
1847c9bace7cSDavid Daney	  when choosing a value for this option.
1848c9bace7cSDavid Daney
18490ab2b7d0SRaghu Gandhamconfig CEVT_GIC
18500ab2b7d0SRaghu Gandham	bool "Use GIC global counter for clock events"
18510ab2b7d0SRaghu Gandham	depends on IRQ_GIC && !(MIPS_SEAD3 || MIPS_MT_SMTC)
18520ab2b7d0SRaghu Gandham	help
18530ab2b7d0SRaghu Gandham	  Use the GIC global counter for the clock events. The R4K clock
18540ab2b7d0SRaghu Gandham	  event driver is always present, so if the platform ends up not
18550ab2b7d0SRaghu Gandham	  detecting a GIC, it will fall back to the R4K timer for the
18560ab2b7d0SRaghu Gandham	  generation of clock events.
18570ab2b7d0SRaghu Gandham
18581da177e4SLinus Torvaldsconfig BOARD_SCACHE
18591da177e4SLinus Torvalds	bool
18601da177e4SLinus Torvalds
18611da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
18621da177e4SLinus Torvalds	bool
18631da177e4SLinus Torvalds	select BOARD_SCACHE
18641da177e4SLinus Torvalds
18659318c51aSChris Dearman#
18669318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
18679318c51aSChris Dearman#
18689318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
18699318c51aSChris Dearman	bool
18709318c51aSChris Dearman	select BOARD_SCACHE
1871930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_6
18729318c51aSChris Dearman
18731da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
18741da177e4SLinus Torvalds	bool
18751da177e4SLinus Torvalds	select BOARD_SCACHE
18761da177e4SLinus Torvalds
18771da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
18781da177e4SLinus Torvalds	bool
18791da177e4SLinus Torvalds	select BOARD_SCACHE
18801da177e4SLinus Torvalds
18811da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
18821da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
18831da177e4SLinus Torvalds	depends on CPU_SB1
18841da177e4SLinus Torvalds	help
18851da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
18861da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
18871da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
18881da177e4SLinus Torvalds
18891da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
1890c8094b53SRalf Baechle	bool
18911da177e4SLinus Torvalds
18923165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
18933165c846SFlorian Fainelli	bool
18943165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
18953165c846SFlorian Fainelli
189691405eb6SFlorian Fainelliconfig CPU_R4K_FPU
189791405eb6SFlorian Fainelli	bool
189891405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
189991405eb6SFlorian Fainelli
190062cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
190162cedc4fSFlorian Fainelli	bool
190262cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
190362cedc4fSFlorian Fainelli
1904340ee4b9SRalf Baechlechoice
1905340ee4b9SRalf Baechle	prompt "MIPS MT options"
1906f41ae0b2SRalf Baechle
1907f41ae0b2SRalf Baechleconfig MIPS_MT_DISABLED
1908c080faa5SSteven J. Hill	bool "Disable multithreading support"
1909f41ae0b2SRalf Baechle	help
1910c080faa5SSteven J. Hill	  Use this option if your platform does not support the MT ASE
1911c080faa5SSteven J. Hill	  which is hardware multithreading support. On systems without
1912c080faa5SSteven J. Hill	  an MT-enabled processor, this will be the only option that is
1913c080faa5SSteven J. Hill	  available in this menu.
1914340ee4b9SRalf Baechle
191559d6ab86SRalf Baechleconfig MIPS_MT_SMP
191659d6ab86SRalf Baechle	bool "Use 1 TC on each available VPE for SMP"
191759d6ab86SRalf Baechle	depends on SYS_SUPPORTS_MULTITHREADING
191859d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
1919d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
1920c080faa5SSteven J. Hill	select SYNC_R4K
192159d6ab86SRalf Baechle	select MIPS_MT
192259d6ab86SRalf Baechle	select SMP
192387353d8aSRalf Baechle	select SMP_UP
1924c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
1925c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
1926399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
192759d6ab86SRalf Baechle	help
1928c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
1929c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
1930c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
1931c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
1932c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
193359d6ab86SRalf Baechle
193441c594abSRalf Baechleconfig MIPS_MT_SMTC
1935c080faa5SSteven J. Hill	bool "Use all TCs on all VPEs for SMP (DEPRECATED)"
1936f41ae0b2SRalf Baechle	depends on CPU_MIPS32_R2
1937f41ae0b2SRalf Baechle	depends on SYS_SUPPORTS_MULTITHREADING
19380ee958e1SPaul Burton	depends on !MIPS_CPS
1939f7062ddbSRalf Baechle	select CPU_MIPSR2_IRQ_VI
1940d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
1941f41ae0b2SRalf Baechle	select MIPS_MT
194241c594abSRalf Baechle	select SMP
194387353d8aSRalf Baechle	select SMP_UP
1944c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
1945c080faa5SSteven J. Hill	select NR_CPUS_DEFAULT_8
1946f41ae0b2SRalf Baechle	help
1947c080faa5SSteven J. Hill	  This is a kernel model which is known as SMTC. This is
1948c080faa5SSteven J. Hill	  supported on cores with the MT ASE and presents all TCs
1949c080faa5SSteven J. Hill	  available on all VPEs to support SMP. For further
1950c080faa5SSteven J. Hill	  information see <http://www.linux-mips.org/wiki/34K#SMTC>.
195141c594abSRalf Baechle
1952340ee4b9SRalf Baechleendchoice
1953340ee4b9SRalf Baechle
1954f41ae0b2SRalf Baechleconfig MIPS_MT
1955f41ae0b2SRalf Baechle	bool
1956f41ae0b2SRalf Baechle
19570ab7aefcSRalf Baechleconfig SCHED_SMT
19580ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
19590ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
19600ab7aefcSRalf Baechle	default n
19610ab7aefcSRalf Baechle	help
19620ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
19630ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
19640ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
19650ab7aefcSRalf Baechle
19660ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
19670ab7aefcSRalf Baechle	bool
19680ab7aefcSRalf Baechle
1969f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
1970f41ae0b2SRalf Baechle	bool
1971f41ae0b2SRalf Baechle
1972f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
1973f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
1974f088fc84SRalf Baechle	default y
197507cc0c9eSRalf Baechle	depends on MIPS_MT_SMP || MIPS_MT_SMTC
197607cc0c9eSRalf Baechle
197707cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
197807cc0c9eSRalf Baechle	bool "VPE loader support."
1979704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
198007cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
198107cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
198207cc0c9eSRalf Baechle	select MIPS_MT
198307cc0c9eSRalf Baechle	help
198407cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
198507cc0c9eSRalf Baechle	  onto another VPE and running it.
1986f088fc84SRalf Baechle
198717a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
198817a1d523SDeng-Cheng Zhu	bool
198917a1d523SDeng-Cheng Zhu	default "y"
199017a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
199117a1d523SDeng-Cheng Zhu
19921a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
19931a2a6d7eSDeng-Cheng Zhu	bool
19941a2a6d7eSDeng-Cheng Zhu	default "y"
19951a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
19961a2a6d7eSDeng-Cheng Zhu
19970db34215SKevin D. Kissellconfig MIPS_MT_SMTC_IM_BACKSTOP
19980db34215SKevin D. Kissell	bool "Use per-TC register bits as backstop for inhibited IM bits"
19990db34215SKevin D. Kissell	depends on MIPS_MT_SMTC
20008531a35eSKevin D. Kissell	default n
20010db34215SKevin D. Kissell	help
20020db34215SKevin D. Kissell	  To support multiple TC microthreads acting as "CPUs" within
20030db34215SKevin D. Kissell	  a VPE, VPE-wide interrupt mask bits must be specially manipulated
20040db34215SKevin D. Kissell	  during interrupt handling. To support legacy drivers and interrupt
20050db34215SKevin D. Kissell	  controller management code, SMTC has a "backstop" to track and
20060db34215SKevin D. Kissell	  if necessary restore the interrupt mask. This has some performance
20078531a35eSKevin D. Kissell	  impact on interrupt service overhead.
20080db34215SKevin D. Kissell
2009f571eff0SKevin D. Kissellconfig MIPS_MT_SMTC_IRQAFF
2010f571eff0SKevin D. Kissell	bool "Support IRQ affinity API"
2011f571eff0SKevin D. Kissell	depends on MIPS_MT_SMTC
2012f571eff0SKevin D. Kissell	default n
2013f571eff0SKevin D. Kissell	help
2014f571eff0SKevin D. Kissell	  Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.)
2015f571eff0SKevin D. Kissell	  for SMTC Linux kernel. Requires platform support, of which
2016f571eff0SKevin D. Kissell	  an example can be found in the MIPS kernel i8259 and Malta
20178531a35eSKevin D. Kissell	  platform code.  Adds some overhead to interrupt dispatch, and
20188531a35eSKevin D. Kissell	  should be used only if you know what you are doing.
2019f571eff0SKevin D. Kissell
2020e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2021e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2022e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2023e01402b1SRalf Baechle	default y
2024e01402b1SRalf Baechle	help
2025e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2026e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2027e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2028e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2029e01402b1SRalf Baechle
2030e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2031e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2032e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
20335e83d430SRalf Baechle	help
2034e01402b1SRalf Baechle
2035da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2036da615cf6SDeng-Cheng Zhu	bool
2037da615cf6SDeng-Cheng Zhu	default "y"
2038da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2039da615cf6SDeng-Cheng Zhu
20402c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
20412c973ef0SDeng-Cheng Zhu	bool
20422c973ef0SDeng-Cheng Zhu	default "y"
20432c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
20442c973ef0SDeng-Cheng Zhu
20454a16ff4cSRalf Baechleconfig MIPS_CMP
20465cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
2047a6ce202eSPaul Burton	depends on SYS_SUPPORTS_MIPS_CMP && !MIPS_MT_SMTC
204872e20142SPaul Burton	select MIPS_GIC_IPI
2049eb9b5141STim Anderson	select SYNC_R4K
20504a16ff4cSRalf Baechle	select WEAK_ORDERING
20514a16ff4cSRalf Baechle	default n
20524a16ff4cSRalf Baechle	help
2053044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2054044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2055044505c7SPaul Burton	  its ability to start secondary CPUs.
20564a16ff4cSRalf Baechle
20575cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
20585cac93b3SPaul Burton	  instead of this.
20595cac93b3SPaul Burton
20600ee958e1SPaul Burtonconfig MIPS_CPS
20610ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
20620ee958e1SPaul Burton	depends on SYS_SUPPORTS_MIPS_CPS
20630ee958e1SPaul Burton	select MIPS_CM
20640ee958e1SPaul Burton	select MIPS_CPC
20650ee958e1SPaul Burton	select MIPS_GIC_IPI
20660ee958e1SPaul Burton	select SMP
20670ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
20680ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
20690ee958e1SPaul Burton	select WEAK_ORDERING
20700ee958e1SPaul Burton	help
20710ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
20720ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
20730ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
20740ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
20750ee958e1SPaul Burton	  support is unavailable.
20760ee958e1SPaul Burton
207772e20142SPaul Burtonconfig MIPS_GIC_IPI
207872e20142SPaul Burton	bool
207972e20142SPaul Burton
20809f98f3ddSPaul Burtonconfig MIPS_CM
20819f98f3ddSPaul Burton	bool
20829f98f3ddSPaul Burton
20839c38cf44SPaul Burtonconfig MIPS_CPC
20849c38cf44SPaul Burton	bool
20859c38cf44SPaul Burton
20861da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS
20871da177e4SLinus Torvalds	bool
20881da177e4SLinus Torvalds	depends on CPU_SB1_PASS_1
20891da177e4SLinus Torvalds	default y
20901da177e4SLinus Torvalds
20911da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
20921da177e4SLinus Torvalds	bool
20931da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
20941da177e4SLinus Torvalds	default y
20951da177e4SLinus Torvalds
20961da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
20971da177e4SLinus Torvalds	bool
20981da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
20991da177e4SLinus Torvalds	default y
21001da177e4SLinus Torvalds
21012235a54dSSanjay Lal
21021da177e4SLinus Torvaldsconfig 64BIT_PHYS_ADDR
2103d806cb2bSRalf Baechle	bool
21041da177e4SLinus Torvalds
210560ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
210660ec6571Spascal@pabr.org       def_bool 64BIT_PHYS_ADDR
210760ec6571Spascal@pabr.org
21089693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
21099693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
21109693a853SFranck Bui-Huu	bool "Support for the SmartMIPS ASE"
21119693a853SFranck Bui-Huu	help
21129693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
21139693a853SFranck Bui-Huu	  increased security at both hardware and software level for
21149693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
21159693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
21169693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
21179693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
21189693a853SFranck Bui-Huu	  here.
21199693a853SFranck Bui-Huu
2120bce86083SSteven J. Hillconfig CPU_MICROMIPS
2121bce86083SSteven J. Hill	depends on SYS_SUPPORTS_MICROMIPS
2122bce86083SSteven J. Hill	bool "Build kernel using microMIPS ISA"
2123bce86083SSteven J. Hill	help
2124bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2125bce86083SSteven J. Hill	  microMIPS ISA
2126bce86083SSteven J. Hill
2127a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
2128a5e9a69eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2129a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
2130a5e9a69eSPaul Burton	default y
2131a5e9a69eSPaul Burton	help
2132a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2133a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
21341db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
21351db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
21361db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
21371db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
21381db1af84SPaul Burton	  the size & complexity of your kernel.
2139a5e9a69eSPaul Burton
2140a5e9a69eSPaul Burton	  If unsure, say Y.
2141a5e9a69eSPaul Burton
21421da177e4SLinus Torvaldsconfig CPU_HAS_WB
2143f7062ddbSRalf Baechle	bool
2144e01402b1SRalf Baechle
2145df0ac8a4SKevin Cernekeeconfig XKS01
2146df0ac8a4SKevin Cernekee	bool
2147df0ac8a4SKevin Cernekee
2148f41ae0b2SRalf Baechle#
2149f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2150f41ae0b2SRalf Baechle#
2151e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2152f41ae0b2SRalf Baechle	bool
2153e01402b1SRalf Baechle
2154f41ae0b2SRalf Baechle#
2155f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2156f41ae0b2SRalf Baechle#
2157e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2158f41ae0b2SRalf Baechle	bool
2159e01402b1SRalf Baechle
21601da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
21611da177e4SLinus Torvalds	bool
21621da177e4SLinus Torvalds	depends on !CPU_R3000
21631da177e4SLinus Torvalds	default y
21641da177e4SLinus Torvalds
21651da177e4SLinus Torvalds#
216620d60d99SMaciej W. Rozycki# CPU non-features
216720d60d99SMaciej W. Rozycki#
216820d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
216920d60d99SMaciej W. Rozycki	bool
217020d60d99SMaciej W. Rozycki
217120d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
217220d60d99SMaciej W. Rozycki	bool
217320d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
217420d60d99SMaciej W. Rozycki
217520d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
217620d60d99SMaciej W. Rozycki	bool
217720d60d99SMaciej W. Rozycki
217820d60d99SMaciej W. Rozycki#
21791da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
21801da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
21811da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
21821da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
21831da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
21841da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
21851da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
21861da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2187797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2188797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2189797798c1SRalf Baechle#   support.
21901da177e4SLinus Torvalds#
21911da177e4SLinus Torvaldsconfig HIGHMEM
21921da177e4SLinus Torvalds	bool "High Memory Support"
2193a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2194797798c1SRalf Baechle
2195797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2196797798c1SRalf Baechle	bool
2197797798c1SRalf Baechle
2198797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2199797798c1SRalf Baechle	bool
22001da177e4SLinus Torvalds
22019693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
22029693a853SFranck Bui-Huu	bool
22039693a853SFranck Bui-Huu
2204a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2205a6a4834cSSteven J. Hill	bool
2206a6a4834cSSteven J. Hill
2207a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2208a5e9a69eSPaul Burton	bool
2209a5e9a69eSPaul Burton
2210b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2211b4819b59SYoichi Yuasa	def_bool y
2212f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2213b4819b59SYoichi Yuasa
2214d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2215d8cb4e11SRalf Baechle	bool
2216d8cb4e11SRalf Baechle	default y if SGI_IP27
2217d8cb4e11SRalf Baechle	help
22183dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2219d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2220d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2221d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2222d8cb4e11SRalf Baechle
2223b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2224b1c6cd42SAtsushi Nemoto	bool
22257de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
222631473747SAtsushi Nemoto
2227d8cb4e11SRalf Baechleconfig NUMA
2228d8cb4e11SRalf Baechle	bool "NUMA Support"
2229d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2230d8cb4e11SRalf Baechle	help
2231d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2232d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2233d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2234d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2235d8cb4e11SRalf Baechle	  disabled.
2236d8cb4e11SRalf Baechle
2237d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2238d8cb4e11SRalf Baechle	bool
2239d8cb4e11SRalf Baechle
2240c80d79d7SYasunori Gotoconfig NODES_SHIFT
2241c80d79d7SYasunori Goto	int
2242c80d79d7SYasunori Goto	default "6"
2243c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2244c80d79d7SYasunori Goto
224514f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
224614f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
22474be3d2f3SZi Shen Lim	depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP)
224814f70012SDeng-Cheng Zhu	default y
224914f70012SDeng-Cheng Zhu	help
225014f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
225114f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
225214f70012SDeng-Cheng Zhu
2253b4819b59SYoichi Yuasasource "mm/Kconfig"
2254b4819b59SYoichi Yuasa
22551da177e4SLinus Torvaldsconfig SMP
22561da177e4SLinus Torvalds	bool "Multi-Processing support"
2257e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2258e73ea273SRalf Baechle	help
22591da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
22604a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
22614a474157SRobert Graffham	  than one CPU, say Y.
22621da177e4SLinus Torvalds
22634a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
22641da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
22651da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
22664a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
22671da177e4SLinus Torvalds	  will run faster if you say N here.
22681da177e4SLinus Torvalds
22691da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
22701da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
22711da177e4SLinus Torvalds
227203502faaSAdrian Bunk	  See also the SMP-HOWTO available at
227303502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
22741da177e4SLinus Torvalds
22751da177e4SLinus Torvalds	  If you don't know what to do here, say N.
22761da177e4SLinus Torvalds
227787353d8aSRalf Baechleconfig SMP_UP
227887353d8aSRalf Baechle	bool
227987353d8aSRalf Baechle
22804a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
22814a16ff4cSRalf Baechle	bool
22824a16ff4cSRalf Baechle
22830ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
22840ee958e1SPaul Burton	bool
22850ee958e1SPaul Burton
2286e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2287e73ea273SRalf Baechle	bool
2288e73ea273SRalf Baechle
2289130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2290130e2fb7SRalf Baechle	bool
2291130e2fb7SRalf Baechle
2292130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2293130e2fb7SRalf Baechle	bool
2294130e2fb7SRalf Baechle
2295130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2296130e2fb7SRalf Baechle	bool
2297130e2fb7SRalf Baechle
2298130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2299130e2fb7SRalf Baechle	bool
2300130e2fb7SRalf Baechle
2301130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2302130e2fb7SRalf Baechle	bool
2303130e2fb7SRalf Baechle
23041da177e4SLinus Torvaldsconfig NR_CPUS
23051da177e4SLinus Torvalds	int "Maximum number of CPUs (2-64)"
2306c5eaff3eSMarkos Chandras	range 2 64
23071da177e4SLinus Torvalds	depends on SMP
2308130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2309130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2310130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2311130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2312130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
23131da177e4SLinus Torvalds	help
23141da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
23151da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
23161da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
231772ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
231872ede9b1SAtsushi Nemoto	  and 2 for all others.
23191da177e4SLinus Torvalds
23201da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
232172ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
232272ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
232372ede9b1SAtsushi Nemoto	  power of two.
23241da177e4SLinus Torvalds
2325399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2326399aaa25SAl Cooper	bool
2327399aaa25SAl Cooper
23281723b4a3SAtsushi Nemoto#
23291723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
23301723b4a3SAtsushi Nemoto#
23311723b4a3SAtsushi Nemoto
23321723b4a3SAtsushi Nemotochoice
23331723b4a3SAtsushi Nemoto	prompt "Timer frequency"
23341723b4a3SAtsushi Nemoto	default HZ_250
23351723b4a3SAtsushi Nemoto	help
23361723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
23371723b4a3SAtsushi Nemoto
23381723b4a3SAtsushi Nemoto	config HZ_48
23390f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
23401723b4a3SAtsushi Nemoto
23411723b4a3SAtsushi Nemoto	config HZ_100
23421723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
23431723b4a3SAtsushi Nemoto
23441723b4a3SAtsushi Nemoto	config HZ_128
23451723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
23461723b4a3SAtsushi Nemoto
23471723b4a3SAtsushi Nemoto	config HZ_250
23481723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
23491723b4a3SAtsushi Nemoto
23501723b4a3SAtsushi Nemoto	config HZ_256
23511723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
23521723b4a3SAtsushi Nemoto
23531723b4a3SAtsushi Nemoto	config HZ_1000
23541723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
23551723b4a3SAtsushi Nemoto
23561723b4a3SAtsushi Nemoto	config HZ_1024
23571723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
23581723b4a3SAtsushi Nemoto
23591723b4a3SAtsushi Nemotoendchoice
23601723b4a3SAtsushi Nemoto
23611723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
23621723b4a3SAtsushi Nemoto	bool
23631723b4a3SAtsushi Nemoto
23641723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
23651723b4a3SAtsushi Nemoto	bool
23661723b4a3SAtsushi Nemoto
23671723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
23681723b4a3SAtsushi Nemoto	bool
23691723b4a3SAtsushi Nemoto
23701723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
23711723b4a3SAtsushi Nemoto	bool
23721723b4a3SAtsushi Nemoto
23731723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
23741723b4a3SAtsushi Nemoto	bool
23751723b4a3SAtsushi Nemoto
23761723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
23771723b4a3SAtsushi Nemoto	bool
23781723b4a3SAtsushi Nemoto
23791723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
23801723b4a3SAtsushi Nemoto	bool
23811723b4a3SAtsushi Nemoto
23821723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
23831723b4a3SAtsushi Nemoto	bool
23841723b4a3SAtsushi Nemoto	default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
23851723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
23861723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
23871723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
23881723b4a3SAtsushi Nemoto
23891723b4a3SAtsushi Nemotoconfig HZ
23901723b4a3SAtsushi Nemoto	int
23911723b4a3SAtsushi Nemoto	default 48 if HZ_48
23921723b4a3SAtsushi Nemoto	default 100 if HZ_100
23931723b4a3SAtsushi Nemoto	default 128 if HZ_128
23941723b4a3SAtsushi Nemoto	default 250 if HZ_250
23951723b4a3SAtsushi Nemoto	default 256 if HZ_256
23961723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
23971723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
23981723b4a3SAtsushi Nemoto
2399e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
24001da177e4SLinus Torvalds
2401ea6e942bSAtsushi Nemotoconfig KEXEC
24027d60717eSKees Cook	bool "Kexec system call"
2403ea6e942bSAtsushi Nemoto	help
2404ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2405ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
24063dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2407ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2408ea6e942bSAtsushi Nemoto
240901dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2410ea6e942bSAtsushi Nemoto
2411ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2412ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2413bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2414bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2415bf220695SGeert Uytterhoeven	  made.
2416ea6e942bSAtsushi Nemoto
24177aa1c8f4SRalf Baechleconfig CRASH_DUMP
24187aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
24197aa1c8f4SRalf Baechle	  help
24207aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
24217aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
24227aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
24237aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
24247aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
24257aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
24267aa1c8f4SRalf Baechle	  PHYSICAL_START.
24277aa1c8f4SRalf Baechle
24287aa1c8f4SRalf Baechleconfig PHYSICAL_START
24297aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
24307aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
24317aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
24327aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
24337aa1c8f4SRalf Baechle	  help
24347aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
24357aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
24367aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
24377aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
24387aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
24397aa1c8f4SRalf Baechle
2440ea6e942bSAtsushi Nemotoconfig SECCOMP
2441ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2442293c5bd1SRalf Baechle	depends on PROC_FS
2443ea6e942bSAtsushi Nemoto	default y
2444ea6e942bSAtsushi Nemoto	help
2445ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2446ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2447ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2448ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2449ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2450ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2451ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2452ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2453ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2454ea6e942bSAtsushi Nemoto
2455ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2456ea6e942bSAtsushi Nemoto
2457597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
2458597ce172SPaul Burton	bool "Support for O32 binaries using 64-bit FP"
2459597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2460597ce172SPaul Burton	default y
2461597ce172SPaul Burton	help
2462597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2463597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2464597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2465597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2466597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2467597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2468597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2469597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2470597ce172SPaul Burton	  saying N here.
2471597ce172SPaul Burton
2472597ce172SPaul Burton	  If unsure, say Y.
2473597ce172SPaul Burton
2474f2ffa5abSDezhong Diaoconfig USE_OF
24750b3e06fdSJonas Gorski	bool
2476f2ffa5abSDezhong Diao	select OF
2477e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2478abd2363fSGrant Likely	select IRQ_DOMAIN
2479f2ffa5abSDezhong Diao
24805e83d430SRalf Baechleendmenu
24815e83d430SRalf Baechle
24821df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
24831df0f0ffSAtsushi Nemoto	bool
24841df0f0ffSAtsushi Nemoto	default y
24851df0f0ffSAtsushi Nemoto
24861df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
24871df0f0ffSAtsushi Nemoto	bool
24881df0f0ffSAtsushi Nemoto	default y
24891df0f0ffSAtsushi Nemoto
2490b6c3539bSRalf Baechlesource "init/Kconfig"
2491b6c3539bSRalf Baechle
2492dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2493dc52ddc0SMatt Helsley
24941da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
24951da177e4SLinus Torvalds
24965e83d430SRalf Baechleconfig HW_HAS_EISA
24975e83d430SRalf Baechle	bool
24981da177e4SLinus Torvaldsconfig HW_HAS_PCI
24991da177e4SLinus Torvalds	bool
25001da177e4SLinus Torvalds
25011da177e4SLinus Torvaldsconfig PCI
25021da177e4SLinus Torvalds	bool "Support for PCI controller"
25031da177e4SLinus Torvalds	depends on HW_HAS_PCI
2504abb4ae46SRalf Baechle	select PCI_DOMAINS
25050f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
25061da177e4SLinus Torvalds	help
25071da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
25081da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
25091da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
25101da177e4SLinus Torvalds	  say Y, otherwise N.
25111da177e4SLinus Torvalds
2512*0e476d91SHuacai Chenconfig HT_PCI
2513*0e476d91SHuacai Chen	bool "Support for HT-linked PCI"
2514*0e476d91SHuacai Chen	default y
2515*0e476d91SHuacai Chen	depends on CPU_LOONGSON3
2516*0e476d91SHuacai Chen	select PCI
2517*0e476d91SHuacai Chen	select PCI_DOMAINS
2518*0e476d91SHuacai Chen	help
2519*0e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
2520*0e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
2521*0e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
2522*0e476d91SHuacai Chen
25231da177e4SLinus Torvaldsconfig PCI_DOMAINS
25241da177e4SLinus Torvalds	bool
25251da177e4SLinus Torvalds
25261da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
25271da177e4SLinus Torvalds
25283f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig"
25293f787ca4SJonas Gorski
25301da177e4SLinus Torvalds#
25311da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
25321da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
25331da177e4SLinus Torvalds# users to choose the right thing ...
25341da177e4SLinus Torvalds#
25351da177e4SLinus Torvaldsconfig ISA
25361da177e4SLinus Torvalds	bool
25371da177e4SLinus Torvalds
25381da177e4SLinus Torvaldsconfig EISA
25391da177e4SLinus Torvalds	bool "EISA support"
25405e83d430SRalf Baechle	depends on HW_HAS_EISA
25411da177e4SLinus Torvalds	select ISA
2542aa414dffSRalf Baechle	select GENERIC_ISA_DMA
25431da177e4SLinus Torvalds	---help---
25441da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
25451da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
25461da177e4SLinus Torvalds
25471da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
25481da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
25491da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
25501da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
25511da177e4SLinus Torvalds
25521da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
25531da177e4SLinus Torvalds
25541da177e4SLinus Torvalds	  Otherwise, say N.
25551da177e4SLinus Torvalds
25561da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
25571da177e4SLinus Torvalds
25581da177e4SLinus Torvaldsconfig TC
25591da177e4SLinus Torvalds	bool "TURBOchannel support"
25601da177e4SLinus Torvalds	depends on MACH_DECSTATION
25611da177e4SLinus Torvalds	help
256250a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
256350a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
256450a23e6eSJustin P. Mattock	  at:
256550a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
256650a23e6eSJustin P. Mattock	  and:
256750a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
256850a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
256950a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
25701da177e4SLinus Torvalds
25711da177e4SLinus Torvaldsconfig MMU
25721da177e4SLinus Torvalds	bool
25731da177e4SLinus Torvalds	default y
25741da177e4SLinus Torvalds
2575d865bea4SRalf Baechleconfig I8253
2576d865bea4SRalf Baechle	bool
2577798778b8SRussell King	select CLKSRC_I8253
25782d02612fSThomas Gleixner	select CLKEVT_I8253
25799726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
2580d865bea4SRalf Baechle
2581e05eb3f8SRalf Baechleconfig ZONE_DMA
2582e05eb3f8SRalf Baechle	bool
2583e05eb3f8SRalf Baechle
2584cce335aeSRalf Baechleconfig ZONE_DMA32
2585cce335aeSRalf Baechle	bool
2586cce335aeSRalf Baechle
25871da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
25881da177e4SLinus Torvalds
25891da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig"
25901da177e4SLinus Torvalds
2591388b78adSAlexandre Bounineconfig RAPIDIO
259256abde72SAlexandre Bounine	tristate "RapidIO support"
2593388b78adSAlexandre Bounine	depends on PCI
2594388b78adSAlexandre Bounine	default n
2595388b78adSAlexandre Bounine	help
2596388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
2597388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
2598388b78adSAlexandre Bounine
2599388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
2600388b78adSAlexandre Bounine
26011da177e4SLinus Torvaldsendmenu
26021da177e4SLinus Torvalds
26031da177e4SLinus Torvaldsmenu "Executable file formats"
26041da177e4SLinus Torvalds
26051da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
26061da177e4SLinus Torvalds
26071da177e4SLinus Torvaldsconfig TRAD_SIGNALS
26081da177e4SLinus Torvalds	bool
26091da177e4SLinus Torvalds
26101da177e4SLinus Torvaldsconfig MIPS32_COMPAT
26111da177e4SLinus Torvalds	bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
2612875d43e7SRalf Baechle	depends on 64BIT
26131da177e4SLinus Torvalds	help
26141da177e4SLinus Torvalds	  Select this option if you want Linux/MIPS 32-bit binary
26151da177e4SLinus Torvalds	  compatibility. Since all software available for Linux/MIPS is
26161da177e4SLinus Torvalds	  currently 32-bit you should say Y here.
26171da177e4SLinus Torvalds
26181da177e4SLinus Torvaldsconfig COMPAT
26191da177e4SLinus Torvalds	bool
26201da177e4SLinus Torvalds	depends on MIPS32_COMPAT
262148b25c43SChris Metcalf	select ARCH_WANT_OLD_COMPAT_IPC
26221da177e4SLinus Torvalds	default y
26231da177e4SLinus Torvalds
262405e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
262505e43966SAtsushi Nemoto	bool
262605e43966SAtsushi Nemoto	depends on COMPAT && SYSVIPC
262705e43966SAtsushi Nemoto	default y
262805e43966SAtsushi Nemoto
26291da177e4SLinus Torvaldsconfig MIPS32_O32
26301da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
26311da177e4SLinus Torvalds	depends on MIPS32_COMPAT
26321da177e4SLinus Torvalds	help
26331da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
26341da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
26351da177e4SLinus Torvalds	  existing binaries are in this format.
26361da177e4SLinus Torvalds
26371da177e4SLinus Torvalds	  If unsure, say Y.
26381da177e4SLinus Torvalds
26391da177e4SLinus Torvaldsconfig MIPS32_N32
26401da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
26411da177e4SLinus Torvalds	depends on MIPS32_COMPAT
26421da177e4SLinus Torvalds	help
26431da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
26441da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
26451da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
26461da177e4SLinus Torvalds	  cases.
26471da177e4SLinus Torvalds
26481da177e4SLinus Torvalds	  If unsure, say N.
26491da177e4SLinus Torvalds
26501da177e4SLinus Torvaldsconfig BINFMT_ELF32
26511da177e4SLinus Torvalds	bool
26521da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
26531da177e4SLinus Torvalds
26542116245eSRalf Baechleendmenu
26551da177e4SLinus Torvalds
26562116245eSRalf Baechlemenu "Power management options"
2657952fa954SRodolfo Giometti
2658363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
2659363c55caSWu Zhangjin	def_bool y
26603f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2661363c55caSWu Zhangjin
2662f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
2663f4cb5700SJohannes Berg	def_bool y
26643f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2665f4cb5700SJohannes Berg
26662116245eSRalf Baechlesource "kernel/power/Kconfig"
2667952fa954SRodolfo Giometti
26681da177e4SLinus Torvaldsendmenu
26691da177e4SLinus Torvalds
26707a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
26717a998935SViresh Kumar	bool
26727a998935SViresh Kumar
26737a998935SViresh Kumarif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
26747a998935SViresh Kumarmenu "CPU Power Management"
26757a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
26767a998935SViresh Kumarendmenu
26777a998935SViresh Kumarendif
26789726b43aSWu Zhangjin
2679d5950b43SSam Ravnborgsource "net/Kconfig"
2680d5950b43SSam Ravnborg
26811da177e4SLinus Torvaldssource "drivers/Kconfig"
26821da177e4SLinus Torvalds
268398cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
268498cdee0eSRalf Baechle
26851da177e4SLinus Torvaldssource "fs/Kconfig"
26861da177e4SLinus Torvalds
26871da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
26881da177e4SLinus Torvalds
26891da177e4SLinus Torvaldssource "security/Kconfig"
26901da177e4SLinus Torvalds
26911da177e4SLinus Torvaldssource "crypto/Kconfig"
26921da177e4SLinus Torvalds
26931da177e4SLinus Torvaldssource "lib/Kconfig"
26942235a54dSSanjay Lal
26952235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
2696