1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 21da177e4SLinus Torvaldsconfig MIPS 31da177e4SLinus Torvalds bool 41da177e4SLinus Torvalds default y 512597988SMatt Redfearn select ARCH_BINFMT_ELF_STATE 612597988SMatt Redfearn select ARCH_CLOCKSOURCE_DATA 712597988SMatt Redfearn select ARCH_DISCARD_MEMBLOCK 812597988SMatt Redfearn select ARCH_HAS_ELF_RANDOMIZE 912597988SMatt Redfearn select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 1012597988SMatt Redfearn select ARCH_SUPPORTS_UPROBES 111ee3630aSRalf Baechle select ARCH_USE_BUILTIN_BSWAP 1212597988SMatt Redfearn select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 1325da4e9dSPaul Burton select ARCH_USE_QUEUED_RWLOCKS 140b17c967SPaul Burton select ARCH_USE_QUEUED_SPINLOCKS 1512597988SMatt Redfearn select ARCH_WANT_IPC_PARSE_VERSION 1612597988SMatt Redfearn select BUILDTIME_EXTABLE_SORT 1712597988SMatt Redfearn select CLONE_BACKWARDS 1812597988SMatt Redfearn select CPU_PM if CPU_IDLE 19dffbfde7SChristoph Hellwig select DMA_DIRECT_OPS 2012597988SMatt Redfearn select GENERIC_ATOMIC64 if !64BIT 2112597988SMatt Redfearn select GENERIC_CLOCKEVENTS 2212597988SMatt Redfearn select GENERIC_CMOS_UPDATE 2312597988SMatt Redfearn select GENERIC_CPU_AUTOPROBE 2412597988SMatt Redfearn select GENERIC_IRQ_PROBE 2512597988SMatt Redfearn select GENERIC_IRQ_SHOW 26740129b3SAntony Pavlov select GENERIC_LIB_ASHLDI3 27740129b3SAntony Pavlov select GENERIC_LIB_ASHRDI3 28740129b3SAntony Pavlov select GENERIC_LIB_CMPDI2 29740129b3SAntony Pavlov select GENERIC_LIB_LSHRDI3 30740129b3SAntony Pavlov select GENERIC_LIB_UCMPDI2 3112597988SMatt Redfearn select GENERIC_PCI_IOMAP 3212597988SMatt Redfearn select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 3312597988SMatt Redfearn select GENERIC_SMP_IDLE_THREAD 3412597988SMatt Redfearn select GENERIC_TIME_VSYSCALL 3512597988SMatt Redfearn select HANDLE_DOMAIN_IRQ 3612597988SMatt Redfearn select HAVE_ARCH_JUMP_LABEL 3788547001SJason Wessel select HAVE_ARCH_KGDB 38109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_BITS if MMU 39109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 40490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 41c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 4212597988SMatt Redfearn select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 43f381bf6dSDavid Daney select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS) 44f381bf6dSDavid Daney select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS) 4512597988SMatt Redfearn select HAVE_CONTEXT_TRACKING 4612597988SMatt Redfearn select HAVE_COPY_THREAD_TLS 4764575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 4812597988SMatt Redfearn select HAVE_DEBUG_KMEMLEAK 4912597988SMatt Redfearn select HAVE_DEBUG_STACKOVERFLOW 5012597988SMatt Redfearn select HAVE_DMA_CONTIGUOUS 5112597988SMatt Redfearn select HAVE_DYNAMIC_FTRACE 5212597988SMatt Redfearn select HAVE_EXIT_THREAD 5312597988SMatt Redfearn select HAVE_FTRACE_MCOUNT_RECORD 5429c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 5512597988SMatt Redfearn select HAVE_FUNCTION_TRACER 5612597988SMatt Redfearn select HAVE_GENERIC_DMA_COHERENT 5712597988SMatt Redfearn select HAVE_IDE 5812597988SMatt Redfearn select HAVE_IRQ_EXIT_ON_IRQ_STACK 5912597988SMatt Redfearn select HAVE_IRQ_TIME_ACCOUNTING 60c1bf207dSDavid Daney select HAVE_KPROBES 61c1bf207dSDavid Daney select HAVE_KRETPROBES 629d15ffc8STejun Heo select HAVE_MEMBLOCK 639d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 64786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 6542a0bb3fSPetr Mladek select HAVE_NMI 6612597988SMatt Redfearn select HAVE_OPROFILE 6712597988SMatt Redfearn select HAVE_PERF_EVENTS 6808bccf43SMarcin Nowakowski select HAVE_REGS_AND_STACK_ACCESS_API 699ea141adSPaul Burton select HAVE_RSEQ 70d148eac0SMasahiro Yamada select HAVE_STACKPROTECTOR 7112597988SMatt Redfearn select HAVE_SYSCALL_TRACEPOINTS 72a3f14310SBen Hutchings select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP 7312597988SMatt Redfearn select IRQ_FORCED_THREADING 7412597988SMatt Redfearn select MODULES_USE_ELF_RELA if MODULES && 64BIT 7512597988SMatt Redfearn select MODULES_USE_ELF_REL if MODULES 7612597988SMatt Redfearn select PERF_USE_VMALLOC 7712597988SMatt Redfearn select RTC_LIB if !MACH_LOONGSON64 7812597988SMatt Redfearn select SYSCTL_EXCEPTION_TRACE 7912597988SMatt Redfearn select VIRT_TO_BUS 801da177e4SLinus Torvalds 811da177e4SLinus Torvaldsmenu "Machine selection" 821da177e4SLinus Torvalds 835e83d430SRalf Baechlechoice 845e83d430SRalf Baechle prompt "System type" 85d41e6858SMatt Redfearn default MIPS_GENERIC 861da177e4SLinus Torvalds 87eed0eabdSPaul Burtonconfig MIPS_GENERIC 88eed0eabdSPaul Burton bool "Generic board-agnostic MIPS kernel" 89eed0eabdSPaul Burton select BOOT_RAW 90eed0eabdSPaul Burton select BUILTIN_DTB 91eed0eabdSPaul Burton select CEVT_R4K 92eed0eabdSPaul Burton select CLKSRC_MIPS_GIC 93eed0eabdSPaul Burton select COMMON_CLK 94eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_VI 95eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_EI 96eed0eabdSPaul Burton select CSRC_R4K 97eed0eabdSPaul Burton select DMA_PERDEV_COHERENT 98eed0eabdSPaul Burton select HW_HAS_PCI 99eed0eabdSPaul Burton select IRQ_MIPS_CPU 100eed0eabdSPaul Burton select LIBFDT 101*0211d49eSPaul Burton select MIPS_AUTO_PFN_OFFSET 102eed0eabdSPaul Burton select MIPS_CPU_SCACHE 103eed0eabdSPaul Burton select MIPS_GIC 104eed0eabdSPaul Burton select MIPS_L1_CACHE_SHIFT_7 105eed0eabdSPaul Burton select NO_EXCEPT_FILL 106eed0eabdSPaul Burton select PCI_DRIVERS_GENERIC 107eed0eabdSPaul Burton select PINCTRL 108eed0eabdSPaul Burton select SMP_UP if SMP 109a3078e59SMatt Redfearn select SWAP_IO_SPACE 110eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R1 111eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R2 112eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R6 113eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R1 114eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R2 115eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R6 116eed0eabdSPaul Burton select SYS_SUPPORTS_32BIT_KERNEL 117eed0eabdSPaul Burton select SYS_SUPPORTS_64BIT_KERNEL 118eed0eabdSPaul Burton select SYS_SUPPORTS_BIG_ENDIAN 119eed0eabdSPaul Burton select SYS_SUPPORTS_HIGHMEM 120eed0eabdSPaul Burton select SYS_SUPPORTS_LITTLE_ENDIAN 121eed0eabdSPaul Burton select SYS_SUPPORTS_MICROMIPS 122eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS_CPS 123eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS16 124eed0eabdSPaul Burton select SYS_SUPPORTS_MULTITHREADING 125eed0eabdSPaul Burton select SYS_SUPPORTS_RELOCATABLE 126eed0eabdSPaul Burton select SYS_SUPPORTS_SMARTMIPS 1272e6522c5SCorentin Labbe select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1282e6522c5SCorentin Labbe select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1292e6522c5SCorentin Labbe select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1302e6522c5SCorentin Labbe select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1312e6522c5SCorentin Labbe select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1322e6522c5SCorentin Labbe select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 133eed0eabdSPaul Burton select USE_OF 134eed0eabdSPaul Burton help 135eed0eabdSPaul Burton Select this to build a kernel which aims to support multiple boards, 136eed0eabdSPaul Burton generally using a flattened device tree passed from the bootloader 137eed0eabdSPaul Burton using the boot protocol defined in the UHI (Unified Hosting 138eed0eabdSPaul Burton Interface) specification. 139eed0eabdSPaul Burton 14042a4f17dSManuel Laussconfig MIPS_ALCHEMY 141c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 142d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 143f772cdb2SRalf Baechle select CEVT_R4K 144d7ea335cSSteven J. Hill select CSRC_R4K 14567e38cf2SRalf Baechle select IRQ_MIPS_CPU 14688e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 14742a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 14842a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 14942a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 150d30a2b47SLinus Walleij select GPIOLIB 1511b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 15247440229SManuel Lauss select COMMON_CLK 1531da177e4SLinus Torvalds 1547ca5dc14SFlorian Fainelliconfig AR7 1557ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 1567ca5dc14SFlorian Fainelli select BOOT_ELF32 1577ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 1587ca5dc14SFlorian Fainelli select CEVT_R4K 1597ca5dc14SFlorian Fainelli select CSRC_R4K 16067e38cf2SRalf Baechle select IRQ_MIPS_CPU 1617ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 1627ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 1637ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 1647ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 1657ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 1667ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 167377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1681b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 169d30a2b47SLinus Walleij select GPIOLIB 1707ca5dc14SFlorian Fainelli select VLYNQ 1718551fb64SYoichi Yuasa select HAVE_CLK 1727ca5dc14SFlorian Fainelli help 1737ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1747ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1757ca5dc14SFlorian Fainelli 17643cc739fSSergey Ryazanovconfig ATH25 17743cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 17843cc739fSSergey Ryazanov select CEVT_R4K 17943cc739fSSergey Ryazanov select CSRC_R4K 18043cc739fSSergey Ryazanov select DMA_NONCOHERENT 18167e38cf2SRalf Baechle select IRQ_MIPS_CPU 1821753e74eSSergey Ryazanov select IRQ_DOMAIN 18343cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 18443cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 18543cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1868aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 18743cc739fSSergey Ryazanov help 18843cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 18943cc739fSSergey Ryazanov 190d4a67d9dSGabor Juhosconfig ATH79 191d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 192ff591a91SAlban Bedel select ARCH_HAS_RESET_CONTROLLER 193d4a67d9dSGabor Juhos select BOOT_RAW 194d4a67d9dSGabor Juhos select CEVT_R4K 195d4a67d9dSGabor Juhos select CSRC_R4K 196d4a67d9dSGabor Juhos select DMA_NONCOHERENT 197d30a2b47SLinus Walleij select GPIOLIB 198a08227a2SJohn Crispin select PINCTRL 19994638067SGabor Juhos select HAVE_CLK 200411520afSAlban Bedel select COMMON_CLK 2012c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 20267e38cf2SRalf Baechle select IRQ_MIPS_CPU 2030aabf1a4SGabor Juhos select MIPS_MACHINE 204d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 205d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 206d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 207d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 208377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 209b3f0a250SAlban Bedel select SYS_SUPPORTS_ZBOOT_UART_PROM 21003c8c407SAlban Bedel select USE_OF 21153d473fcSAlban Bedel select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM 212d4a67d9dSGabor Juhos help 213d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 214d4a67d9dSGabor Juhos 2155f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 2165f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 217d59098a0SChristoph Hellwig select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL 218d59098a0SChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 219d666cd02SKevin Cernekee select BOOT_RAW 220d666cd02SKevin Cernekee select NO_EXCEPT_FILL 221d666cd02SKevin Cernekee select USE_OF 222d666cd02SKevin Cernekee select CEVT_R4K 223d666cd02SKevin Cernekee select CSRC_R4K 224d666cd02SKevin Cernekee select SYNC_R4K 225d666cd02SKevin Cernekee select COMMON_CLK 226c7c42ec2SSimon Arlott select BCM6345_L1_IRQ 22760b858f2SKevin Cernekee select BCM7038_L1_IRQ 22860b858f2SKevin Cernekee select BCM7120_L2_IRQ 22960b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 23067e38cf2SRalf Baechle select IRQ_MIPS_CPU 23160b858f2SKevin Cernekee select DMA_NONCOHERENT 232d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 23360b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 234d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 235d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 23660b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 23760b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 23860b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 239d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 240d666cd02SKevin Cernekee select SWAP_IO_SPACE 24160b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 24260b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 24360b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 24460b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 2454dc4704cSJustin Chen select HARDIRQS_SW_RESEND 246d666cd02SKevin Cernekee help 2475f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 2485f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 2495f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 2505f2d4459SKevin Cernekee must be set appropriately for your board. 251d666cd02SKevin Cernekee 2521c0c13ebSAurelien Jarnoconfig BCM47XX 253c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 254fe08f8c2SHauke Mehrtens select BOOT_RAW 25542f77542SRalf Baechle select CEVT_R4K 256940f6b48SRalf Baechle select CSRC_R4K 2571c0c13ebSAurelien Jarno select DMA_NONCOHERENT 2581c0c13ebSAurelien Jarno select HW_HAS_PCI 25967e38cf2SRalf Baechle select IRQ_MIPS_CPU 260314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 261dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 2621c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 2631c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 264377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 2656507831fSAaro Koskinen select SYS_SUPPORTS_ZBOOT 26625e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 267e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 268c949c0bcSRafał Miłecki select GPIOLIB 269c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 270f6e734a8SRafał Miłecki select BCM47XX_NVRAM 2712ab71a02SRafał Miłecki select BCM47XX_SPROM 272dfe00495SMatt Redfearn select BCM47XX_SSB if !BCM47XX_BCMA 2731c0c13ebSAurelien Jarno help 2741c0c13ebSAurelien Jarno Support for BCM47XX based boards 2751c0c13ebSAurelien Jarno 276e7300d04SMaxime Bizonconfig BCM63XX 277e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 278ae8de61cSFlorian Fainelli select BOOT_RAW 279e7300d04SMaxime Bizon select CEVT_R4K 280e7300d04SMaxime Bizon select CSRC_R4K 281fc264022SJonas Gorski select SYNC_R4K 282e7300d04SMaxime Bizon select DMA_NONCOHERENT 28367e38cf2SRalf Baechle select IRQ_MIPS_CPU 284e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 285e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 286e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 287e7300d04SMaxime Bizon select SWAP_IO_SPACE 288d30a2b47SLinus Walleij select GPIOLIB 2893e82eeebSYoichi Yuasa select HAVE_CLK 290af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 291c5af3c2dSJonas Gorski select CLKDEV_LOOKUP 292e7300d04SMaxime Bizon help 293e7300d04SMaxime Bizon Support for BCM63XX based boards 294e7300d04SMaxime Bizon 2951da177e4SLinus Torvaldsconfig MIPS_COBALT 2963fa986faSMartin Michlmayr bool "Cobalt Server" 29742f77542SRalf Baechle select CEVT_R4K 298940f6b48SRalf Baechle select CSRC_R4K 2991097c6acSYoichi Yuasa select CEVT_GT641XX 3001da177e4SLinus Torvalds select DMA_NONCOHERENT 3011da177e4SLinus Torvalds select HW_HAS_PCI 302d865bea4SRalf Baechle select I8253 3031da177e4SLinus Torvalds select I8259 30467e38cf2SRalf Baechle select IRQ_MIPS_CPU 305d5ab1a69SYoichi Yuasa select IRQ_GT641XX 306252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 307e25bfc92SYoichi Yuasa select PCI 3087cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3090a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 310ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3110e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 3125e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 313e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 3141da177e4SLinus Torvalds 3151da177e4SLinus Torvaldsconfig MACH_DECSTATION 3163fa986faSMartin Michlmayr bool "DECstations" 3171da177e4SLinus Torvalds select BOOT_ELF32 3186457d9fcSYoichi Yuasa select CEVT_DS1287 31981d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 3204247417dSYoichi Yuasa select CSRC_IOASIC 32181d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 32220d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 32320d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 32420d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 3251da177e4SLinus Torvalds select DMA_NONCOHERENT 326ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 32767e38cf2SRalf Baechle select IRQ_MIPS_CPU 3287cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 3297cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 330ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3317d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3325e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3331723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 3341723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 3351723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 336930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 3375e83d430SRalf Baechle help 3381da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 3391da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 3401da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 3411da177e4SLinus Torvalds 3421da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 3431da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 3441da177e4SLinus Torvalds 3451da177e4SLinus Torvalds DECstation 5000/50 3461da177e4SLinus Torvalds DECstation 5000/150 3471da177e4SLinus Torvalds DECstation 5000/260 3481da177e4SLinus Torvalds DECsystem 5900/260 3491da177e4SLinus Torvalds 3501da177e4SLinus Torvalds otherwise choose R3000. 3511da177e4SLinus Torvalds 3525e83d430SRalf Baechleconfig MACH_JAZZ 3533fa986faSMartin Michlmayr bool "Jazz family of machines" 354a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 3557a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 3560e2794b0SRalf Baechle select FW_ARC 3570e2794b0SRalf Baechle select FW_ARC32 3585e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 35942f77542SRalf Baechle select CEVT_R4K 360940f6b48SRalf Baechle select CSRC_R4K 361e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 3625e83d430SRalf Baechle select GENERIC_ISA_DMA 3638a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 36467e38cf2SRalf Baechle select IRQ_MIPS_CPU 365d865bea4SRalf Baechle select I8253 3665e83d430SRalf Baechle select I8259 3675e83d430SRalf Baechle select ISA 3687cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 3695e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 3707d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3711723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 3721da177e4SLinus Torvalds help 3735e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 3745e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 375692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 3765e83d430SRalf Baechle Olivetti M700-10 workstations. 3775e83d430SRalf Baechle 378de361e8bSPaul Burtonconfig MACH_INGENIC 379de361e8bSPaul Burton bool "Ingenic SoC based machines" 3805ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 3815ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 382f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 3835ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 38467e38cf2SRalf Baechle select IRQ_MIPS_CPU 38537b4c3caSPaul Cercueil select PINCTRL 386d30a2b47SLinus Walleij select GPIOLIB 387ff1930c6SPaul Burton select COMMON_CLK 38883bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 389ffb1843dSPaul Burton select BUILTIN_DTB 390ffb1843dSPaul Burton select USE_OF 3916ec127fbSPaul Burton select LIBFDT 3925ebabe59SLars-Peter Clausen 393171bb2f1SJohn Crispinconfig LANTIQ 394171bb2f1SJohn Crispin bool "Lantiq based platforms" 395171bb2f1SJohn Crispin select DMA_NONCOHERENT 39667e38cf2SRalf Baechle select IRQ_MIPS_CPU 397171bb2f1SJohn Crispin select CEVT_R4K 398171bb2f1SJohn Crispin select CSRC_R4K 399171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 400171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 401171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 402171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 403377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 404171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 405f35764e7SJames Hogan select SYS_SUPPORTS_VPE_LOADER 406171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 407d30a2b47SLinus Walleij select GPIOLIB 408171bb2f1SJohn Crispin select SWAP_IO_SPACE 409171bb2f1SJohn Crispin select BOOT_RAW 410287e3f3fSJohn Crispin select CLKDEV_LOOKUP 411a0392222SJohn Crispin select USE_OF 4123f8c50c9SJohn Crispin select PINCTRL 4133f8c50c9SJohn Crispin select PINCTRL_LANTIQ 414c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 415c530781cSJohn Crispin select RESET_CONTROLLER 416171bb2f1SJohn Crispin 4171f21d2bdSBrian Murphyconfig LASAT 4181f21d2bdSBrian Murphy bool "LASAT Networks platforms" 41942f77542SRalf Baechle select CEVT_R4K 42016f0bbbcSRalf Baechle select CRC32 421940f6b48SRalf Baechle select CSRC_R4K 4221f21d2bdSBrian Murphy select DMA_NONCOHERENT 4231f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 4241f21d2bdSBrian Murphy select HW_HAS_PCI 42567e38cf2SRalf Baechle select IRQ_MIPS_CPU 4261f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 4271f21d2bdSBrian Murphy select MIPS_NILE4 4281f21d2bdSBrian Murphy select R5000_CPU_SCACHE 4291f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 4301f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 4311f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 4321f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 4331f21d2bdSBrian Murphy 43430ad29bbSHuacai Chenconfig MACH_LOONGSON32 43530ad29bbSHuacai Chen bool "Loongson-1 family of machines" 436c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 437ade299d8SYoichi Yuasa help 43830ad29bbSHuacai Chen This enables support for the Loongson-1 family of machines. 43985749d24SWu Zhangjin 44030ad29bbSHuacai Chen Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 44130ad29bbSHuacai Chen the Institute of Computing Technology (ICT), Chinese Academy of 44230ad29bbSHuacai Chen Sciences (CAS). 443ade299d8SYoichi Yuasa 44430ad29bbSHuacai Chenconfig MACH_LOONGSON64 44530ad29bbSHuacai Chen bool "Loongson-2/3 family of machines" 446ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 447ca585cf9SKelvin Cheung help 44830ad29bbSHuacai Chen This enables the support of Loongson-2/3 family of machines. 449ca585cf9SKelvin Cheung 45030ad29bbSHuacai Chen Loongson-2 is a family of single-core CPUs and Loongson-3 is a 45130ad29bbSHuacai Chen family of multi-core CPUs. They are both 64-bit general-purpose 45230ad29bbSHuacai Chen MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute 45330ad29bbSHuacai Chen of Computing Technology (ICT), Chinese Academy of Sciences (CAS) 45430ad29bbSHuacai Chen in the People's Republic of China. The chief architect is Professor 45530ad29bbSHuacai Chen Weiwu Hu. 456ca585cf9SKelvin Cheung 4576a438309SAndrew Brestickerconfig MACH_PISTACHIO 4586a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 4596a438309SAndrew Bresticker select BOOT_ELF32 4606a438309SAndrew Bresticker select BOOT_RAW 4616a438309SAndrew Bresticker select CEVT_R4K 4626a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 4636a438309SAndrew Bresticker select COMMON_CLK 4646a438309SAndrew Bresticker select CSRC_R4K 465645c7827SZubair Lutfullah Kakakhel select DMA_NONCOHERENT 466d30a2b47SLinus Walleij select GPIOLIB 46767e38cf2SRalf Baechle select IRQ_MIPS_CPU 4686a438309SAndrew Bresticker select LIBFDT 4696a438309SAndrew Bresticker select MFD_SYSCON 4706a438309SAndrew Bresticker select MIPS_CPU_SCACHE 4716a438309SAndrew Bresticker select MIPS_GIC 4726a438309SAndrew Bresticker select PINCTRL 4736a438309SAndrew Bresticker select REGULATOR 4746a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 4756a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 4766a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 4776a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 4786a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 47941cc07beSMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 4806a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 481018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 482018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 4836a438309SAndrew Bresticker select USE_OF 4846a438309SAndrew Bresticker help 4856a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 4866a438309SAndrew Bresticker 4871da177e4SLinus Torvaldsconfig MIPS_MALTA 4883fa986faSMartin Michlmayr bool "MIPS Malta board" 48961ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 490a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 4917a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 4921da177e4SLinus Torvalds select BOOT_ELF32 493fa71c960SRalf Baechle select BOOT_RAW 494e8823d26SPaul Burton select BUILTIN_DTB 49542f77542SRalf Baechle select CEVT_R4K 496940f6b48SRalf Baechle select CSRC_R4K 497fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 49842b002abSGuenter Roeck select COMMON_CLK 499885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 5001da177e4SLinus Torvalds select GENERIC_ISA_DMA 5018a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 50267e38cf2SRalf Baechle select IRQ_MIPS_CPU 5038a19b8f1SAndrew Bresticker select MIPS_GIC 5041da177e4SLinus Torvalds select HW_HAS_PCI 505d865bea4SRalf Baechle select I8253 5061da177e4SLinus Torvalds select I8259 5075e83d430SRalf Baechle select MIPS_BONITO64 5089318c51aSChris Dearman select MIPS_CPU_SCACHE 509a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 510252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 5115e83d430SRalf Baechle select MIPS_MSC 512ecafe3e9SPaul Burton select SMP_UP if SMP 5131da177e4SLinus Torvalds select SWAP_IO_SPACE 5147cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 5157cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 516bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 517c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 518575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 5197cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 5205d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 521575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 5227cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 5237cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 524ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 525ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5265e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 527c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 5285e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 529424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 5300365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 531e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 532377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 533f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 5349693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 535f35764e7SJames Hogan select SYS_SUPPORTS_VPE_LOADER 5361b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 5378c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 538e8823d26SPaul Burton select USE_OF 53938ec82feSPaul Burton select LIBFDT 540abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 541e81a8c7dSPaul Burton select BUILTIN_DTB 542e81a8c7dSPaul Burton select LIBFDT 5431da177e4SLinus Torvalds help 544f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 5451da177e4SLinus Torvalds board. 5461da177e4SLinus Torvalds 5472572f00dSJoshua Hendersonconfig MACH_PIC32 5482572f00dSJoshua Henderson bool "Microchip PIC32 Family" 5492572f00dSJoshua Henderson help 5502572f00dSJoshua Henderson This enables support for the Microchip PIC32 family of platforms. 5512572f00dSJoshua Henderson 5522572f00dSJoshua Henderson Microchip PIC32 is a family of general-purpose 32 bit MIPS core 5532572f00dSJoshua Henderson microcontrollers. 5542572f00dSJoshua Henderson 555a83860c2SRalf Baechleconfig NEC_MARKEINS 556a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 557a83860c2SRalf Baechle select SOC_EMMA2RH 558a83860c2SRalf Baechle select HW_HAS_PCI 559a83860c2SRalf Baechle help 560a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 561ade299d8SYoichi Yuasa 5625e83d430SRalf Baechleconfig MACH_VR41XX 56374142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 56442f77542SRalf Baechle select CEVT_R4K 565940f6b48SRalf Baechle select CSRC_R4K 5667cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 567377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 568d30a2b47SLinus Walleij select GPIOLIB 5695e83d430SRalf Baechle 570edb6310aSDaniel Lairdconfig NXP_STB220 571edb6310aSDaniel Laird bool "NXP STB220 board" 572edb6310aSDaniel Laird select SOC_PNX833X 573edb6310aSDaniel Laird help 574edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 575edb6310aSDaniel Laird 576edb6310aSDaniel Lairdconfig NXP_STB225 577edb6310aSDaniel Laird bool "NXP 225 board" 578edb6310aSDaniel Laird select SOC_PNX833X 579edb6310aSDaniel Laird select SOC_PNX8335 580edb6310aSDaniel Laird help 581edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 582edb6310aSDaniel Laird 5839267a30dSMarc St-Jeanconfig PMC_MSP 5849267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 58539d30c13SAnoop P A select CEVT_R4K 58639d30c13SAnoop P A select CSRC_R4K 5879267a30dSMarc St-Jean select DMA_NONCOHERENT 5889267a30dSMarc St-Jean select SWAP_IO_SPACE 5899267a30dSMarc St-Jean select NO_EXCEPT_FILL 5909267a30dSMarc St-Jean select BOOT_RAW 5919267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 5929267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 5939267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 5949267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 595377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 59667e38cf2SRalf Baechle select IRQ_MIPS_CPU 5979267a30dSMarc St-Jean select SERIAL_8250 5989267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 5999296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 6009296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 6019267a30dSMarc St-Jean help 6029267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 6039267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 6049267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 6059267a30dSMarc St-Jean a variety of MIPS cores. 6069267a30dSMarc St-Jean 607ae2b5bb6SJohn Crispinconfig RALINK 608ae2b5bb6SJohn Crispin bool "Ralink based machines" 609ae2b5bb6SJohn Crispin select CEVT_R4K 610ae2b5bb6SJohn Crispin select CSRC_R4K 611ae2b5bb6SJohn Crispin select BOOT_RAW 612ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 61367e38cf2SRalf Baechle select IRQ_MIPS_CPU 614ae2b5bb6SJohn Crispin select USE_OF 615ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 616ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 617ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 618ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 619377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 620ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 621ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 6222a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 6232a153f1cSJohn Crispin select RESET_CONTROLLER 624ae2b5bb6SJohn Crispin 6251da177e4SLinus Torvaldsconfig SGI_IP22 6263fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 6270e2794b0SRalf Baechle select FW_ARC 6280e2794b0SRalf Baechle select FW_ARC32 6297a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 6301da177e4SLinus Torvalds select BOOT_ELF32 63142f77542SRalf Baechle select CEVT_R4K 632940f6b48SRalf Baechle select CSRC_R4K 633e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 6341da177e4SLinus Torvalds select DMA_NONCOHERENT 6355e83d430SRalf Baechle select HW_HAS_EISA 636d865bea4SRalf Baechle select I8253 63768de4803SThomas Bogendoerfer select I8259 6381da177e4SLinus Torvalds select IP22_CPU_SCACHE 63967e38cf2SRalf Baechle select IRQ_MIPS_CPU 640aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 641e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 642e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 64336e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 644e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 645e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 646e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 6471da177e4SLinus Torvalds select SWAP_IO_SPACE 6487cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6497cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6502b5e63f6SMartin Michlmayr # 6512b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6522b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6532b5e63f6SMartin Michlmayr # 6542b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6552b5e63f6SMartin Michlmayr # for a more details discussion 6562b5e63f6SMartin Michlmayr # 6572b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 658ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 659ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6605e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 661930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6621da177e4SLinus Torvalds help 6631da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 6641da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 6651da177e4SLinus Torvalds that runs on these, say Y here. 6661da177e4SLinus Torvalds 6671da177e4SLinus Torvaldsconfig SGI_IP27 6683fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 66954aed4ddSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 6700e2794b0SRalf Baechle select FW_ARC 6710e2794b0SRalf Baechle select FW_ARC64 6725e83d430SRalf Baechle select BOOT_ELF64 673e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 67436a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 6751da177e4SLinus Torvalds select HW_HAS_PCI 676130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 6777cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 678ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6795e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 680d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 6811a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 682930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6831da177e4SLinus Torvalds help 6841da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 6851da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 6861da177e4SLinus Torvalds here. 6871da177e4SLinus Torvalds 688e2defae5SThomas Bogendoerferconfig SGI_IP28 6897d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 6900e2794b0SRalf Baechle select FW_ARC 6910e2794b0SRalf Baechle select FW_ARC64 6927a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 693e2defae5SThomas Bogendoerfer select BOOT_ELF64 694e2defae5SThomas Bogendoerfer select CEVT_R4K 695e2defae5SThomas Bogendoerfer select CSRC_R4K 696e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 697e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 698e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 69967e38cf2SRalf Baechle select IRQ_MIPS_CPU 700e2defae5SThomas Bogendoerfer select HW_HAS_EISA 701e2defae5SThomas Bogendoerfer select I8253 702e2defae5SThomas Bogendoerfer select I8259 703e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 704e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 7055b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 706e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 707e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 708e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 709e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 710e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 7112b5e63f6SMartin Michlmayr # 7122b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 7132b5e63f6SMartin Michlmayr # memory during early boot on some machines. 7142b5e63f6SMartin Michlmayr # 7152b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 7162b5e63f6SMartin Michlmayr # for a more details discussion 7172b5e63f6SMartin Michlmayr # 7182b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 719e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 720e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 721dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 722e2defae5SThomas Bogendoerfer help 723e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 724e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 725e2defae5SThomas Bogendoerfer 7261da177e4SLinus Torvaldsconfig SGI_IP32 727cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 72803df8229SChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 7290e2794b0SRalf Baechle select FW_ARC 7300e2794b0SRalf Baechle select FW_ARC32 7311da177e4SLinus Torvalds select BOOT_ELF32 73242f77542SRalf Baechle select CEVT_R4K 733940f6b48SRalf Baechle select CSRC_R4K 7341da177e4SLinus Torvalds select DMA_NONCOHERENT 7351da177e4SLinus Torvalds select HW_HAS_PCI 73667e38cf2SRalf Baechle select IRQ_MIPS_CPU 7371da177e4SLinus Torvalds select R5000_CPU_SCACHE 7381da177e4SLinus Torvalds select RM7000_CPU_SCACHE 7397cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 7407cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 7417cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 742dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 743ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 7445e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7451da177e4SLinus Torvalds help 7461da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 7471da177e4SLinus Torvalds 748ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 749ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 7505e83d430SRalf Baechle select BOOT_ELF32 7515e83d430SRalf Baechle select SIBYTE_BCM1120 7525e83d430SRalf Baechle select SWAP_IO_SPACE 7537cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7545e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7555e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7565e83d430SRalf Baechle 757ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 758ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 7595e83d430SRalf Baechle select BOOT_ELF32 7605e83d430SRalf Baechle select SIBYTE_BCM1120 7615e83d430SRalf Baechle select SWAP_IO_SPACE 7627cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7635e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7645e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7655e83d430SRalf Baechle 7665e83d430SRalf Baechleconfig SIBYTE_CRHONE 7673fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 7685e83d430SRalf Baechle select BOOT_ELF32 7695e83d430SRalf Baechle select SIBYTE_BCM1125 7705e83d430SRalf Baechle select SWAP_IO_SPACE 7717cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7725e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7735e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7745e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7755e83d430SRalf Baechle 776ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 777ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 778ade299d8SYoichi Yuasa select BOOT_ELF32 779ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 780ade299d8SYoichi Yuasa select SWAP_IO_SPACE 781ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 782ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 783ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 784ade299d8SYoichi Yuasa 785ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 786ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 787ade299d8SYoichi Yuasa select BOOT_ELF32 788fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 789ade299d8SYoichi Yuasa select SIBYTE_SB1250 790ade299d8SYoichi Yuasa select SWAP_IO_SPACE 791ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 792ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 793ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 794ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 795cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 796ade299d8SYoichi Yuasa 797ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 798ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 799ade299d8SYoichi Yuasa select BOOT_ELF32 800fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 801ade299d8SYoichi Yuasa select SIBYTE_SB1250 802ade299d8SYoichi Yuasa select SWAP_IO_SPACE 803ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 804ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 805ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 806ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 807ade299d8SYoichi Yuasa 808ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 809ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 810ade299d8SYoichi Yuasa select BOOT_ELF32 811ade299d8SYoichi Yuasa select SIBYTE_SB1250 812ade299d8SYoichi Yuasa select SWAP_IO_SPACE 813ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 814ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 815ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 816ade299d8SYoichi Yuasa 817ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 818ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 819ade299d8SYoichi Yuasa select BOOT_ELF32 820ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 821ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 822ade299d8SYoichi Yuasa select SWAP_IO_SPACE 823ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 824ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 825651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 826ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 827cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 828ade299d8SYoichi Yuasa 82914b36af4SThomas Bogendoerferconfig SNI_RM 83014b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 8310e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 8320e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 833aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 8345e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 835a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 8367a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 8375e83d430SRalf Baechle select BOOT_ELF32 83842f77542SRalf Baechle select CEVT_R4K 839940f6b48SRalf Baechle select CSRC_R4K 840e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 8415e83d430SRalf Baechle select DMA_NONCOHERENT 8425e83d430SRalf Baechle select GENERIC_ISA_DMA 8438a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 8445e83d430SRalf Baechle select HW_HAS_EISA 8455e83d430SRalf Baechle select HW_HAS_PCI 84667e38cf2SRalf Baechle select IRQ_MIPS_CPU 847d865bea4SRalf Baechle select I8253 8485e83d430SRalf Baechle select I8259 8495e83d430SRalf Baechle select ISA 8504a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 8517cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 8524a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 853c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 8544a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 85536a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 856ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 8577d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 8584a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 8595e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 8605e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8611da177e4SLinus Torvalds help 86214b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 86314b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 8645e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 8655e83d430SRalf Baechle support this machine type. 8661da177e4SLinus Torvalds 867edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 868edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 8695e83d430SRalf Baechle 870edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 871edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 87223fbee9dSRalf Baechle 87373b4390fSRalf Baechleconfig MIKROTIK_RB532 87473b4390fSRalf Baechle bool "Mikrotik RB532 boards" 87573b4390fSRalf Baechle select CEVT_R4K 87673b4390fSRalf Baechle select CSRC_R4K 87773b4390fSRalf Baechle select DMA_NONCOHERENT 87873b4390fSRalf Baechle select HW_HAS_PCI 87967e38cf2SRalf Baechle select IRQ_MIPS_CPU 88073b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 88173b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 88273b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 88373b4390fSRalf Baechle select SWAP_IO_SPACE 88473b4390fSRalf Baechle select BOOT_RAW 885d30a2b47SLinus Walleij select GPIOLIB 886930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 88773b4390fSRalf Baechle help 88873b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 88973b4390fSRalf Baechle based on the IDT RC32434 SoC. 89073b4390fSRalf Baechle 8919ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 8929ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 893a86c7f72SDavid Daney select CEVT_R4K 894ea8c64acSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 895491ec155SAlexander Sverdlin select HAS_RAPIDIO 896d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 897a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 898a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 899f65aad41SRalf Baechle select EDAC_SUPPORT 900b01aec9bSBorislav Petkov select EDAC_ATOMIC_SCRUB 90173569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 90273569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 903a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 9045e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 905e8635b48SDavid Daney select HW_HAS_PCI 906f00e001eSDavid Daney select ZONE_DMA32 907465aaed0SDavid Daney select HOLES_IN_ZONE 908d30a2b47SLinus Walleij select GPIOLIB 9096e511163SDavid Daney select LIBFDT 9106e511163SDavid Daney select USE_OF 9116e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 9126e511163SDavid Daney select SYS_SUPPORTS_SMP 9137820b84bSDavid Daney select NR_CPUS_DEFAULT_64 9147820b84bSDavid Daney select MIPS_NR_CPU_NR_MAP_1024 915e326479fSAndrew Bresticker select BUILTIN_DTB 9168c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 91709230cbcSChristoph Hellwig select SWIOTLB 9183ff72be4SSteven J. Hill select SYS_SUPPORTS_RELOCATABLE 919a86c7f72SDavid Daney help 920a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 921a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 922a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 923a86c7f72SDavid Daney Some of the supported boards are: 924a86c7f72SDavid Daney EBT3000 925a86c7f72SDavid Daney EBH3000 926a86c7f72SDavid Daney EBH3100 927a86c7f72SDavid Daney Thunder 928a86c7f72SDavid Daney Kodama 929a86c7f72SDavid Daney Hikari 930a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 931a86c7f72SDavid Daney 9327f058e85SJayachandran Cconfig NLM_XLR_BOARD 9337f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 9347f058e85SJayachandran C select BOOT_ELF32 9357f058e85SJayachandran C select NLM_COMMON 9367f058e85SJayachandran C select SYS_HAS_CPU_XLR 9377f058e85SJayachandran C select SYS_SUPPORTS_SMP 9387f058e85SJayachandran C select HW_HAS_PCI 9397f058e85SJayachandran C select SWAP_IO_SPACE 9407f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9417f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 942d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 9437f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9447f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 9457f058e85SJayachandran C select NR_CPUS_DEFAULT_32 9467f058e85SJayachandran C select CEVT_R4K 9477f058e85SJayachandran C select CSRC_R4K 94867e38cf2SRalf Baechle select IRQ_MIPS_CPU 949b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9507f058e85SJayachandran C select SYNC_R4K 9517f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 9528f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9538f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9547f058e85SJayachandran C help 9557f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 9567f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 9577f058e85SJayachandran C 9581c773ea4SJayachandran Cconfig NLM_XLP_BOARD 9591c773ea4SJayachandran C bool "Netlogic XLP based systems" 9601c773ea4SJayachandran C select BOOT_ELF32 9611c773ea4SJayachandran C select NLM_COMMON 9621c773ea4SJayachandran C select SYS_HAS_CPU_XLP 9631c773ea4SJayachandran C select SYS_SUPPORTS_SMP 9641c773ea4SJayachandran C select HW_HAS_PCI 9651c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9661c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 967d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 968d30a2b47SLinus Walleij select GPIOLIB 9691c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9701c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 9711c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 9721c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 9731c773ea4SJayachandran C select CEVT_R4K 9741c773ea4SJayachandran C select CSRC_R4K 97567e38cf2SRalf Baechle select IRQ_MIPS_CPU 976b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9771c773ea4SJayachandran C select SYNC_R4K 9781c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 9792f6528e1SJayachandran C select USE_OF 9808f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9818f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9821c773ea4SJayachandran C help 9831c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 9841c773ea4SJayachandran C Say Y here if you have a XLP based board. 9851c773ea4SJayachandran C 9869bc463beSDavid Daneyconfig MIPS_PARAVIRT 9879bc463beSDavid Daney bool "Para-Virtualized guest system" 9889bc463beSDavid Daney select CEVT_R4K 9899bc463beSDavid Daney select CSRC_R4K 9909bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 9919bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 9929bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 9939bc463beSDavid Daney select SYS_SUPPORTS_SMP 9949bc463beSDavid Daney select NR_CPUS_DEFAULT_4 9959bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 9969bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 9979bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 9989bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 9999bc463beSDavid Daney select HW_HAS_PCI 10009bc463beSDavid Daney select SWAP_IO_SPACE 10019bc463beSDavid Daney help 10029bc463beSDavid Daney This option supports guest running under ???? 10039bc463beSDavid Daney 10041da177e4SLinus Torvaldsendchoice 10051da177e4SLinus Torvalds 1006e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 10073b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 1008d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 1009a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 1010e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 10118945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 1012eed0eabdSPaul Burtonsource "arch/mips/generic/Kconfig" 10135e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 10145ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 10158ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 10161f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 10172572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig" 1018af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig" 10190f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 1020ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 102129c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 102238b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 102322b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 10245e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 1025a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 102630ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig" 102730ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig" 10287f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 1029ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 103038b18f72SRalf Baechle 10315e83d430SRalf Baechleendmenu 10325e83d430SRalf Baechle 10331da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 10341da177e4SLinus Torvalds bool 10351da177e4SLinus Torvalds default y 10361da177e4SLinus Torvalds 10371da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 10381da177e4SLinus Torvalds bool 10391da177e4SLinus Torvalds 10403c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 10413c9ee7efSAkinobu Mita bool 10423c9ee7efSAkinobu Mita default y 10433c9ee7efSAkinobu Mita 10441da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 10451da177e4SLinus Torvalds bool 10461da177e4SLinus Torvalds default y 10471da177e4SLinus Torvalds 1048ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 10491cc89038SAtsushi Nemoto bool 10501cc89038SAtsushi Nemoto default y 10511cc89038SAtsushi Nemoto 10521da177e4SLinus Torvalds# 10531da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 10541da177e4SLinus Torvalds# 10550e2794b0SRalf Baechleconfig FW_ARC 10561da177e4SLinus Torvalds bool 10571da177e4SLinus Torvalds 105861ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 105961ed242dSRalf Baechle bool 106061ed242dSRalf Baechle 10619267a30dSMarc St-Jeanconfig BOOT_RAW 10629267a30dSMarc St-Jean bool 10639267a30dSMarc St-Jean 1064217dd11eSRalf Baechleconfig CEVT_BCM1480 1065217dd11eSRalf Baechle bool 1066217dd11eSRalf Baechle 10676457d9fcSYoichi Yuasaconfig CEVT_DS1287 10686457d9fcSYoichi Yuasa bool 10696457d9fcSYoichi Yuasa 10701097c6acSYoichi Yuasaconfig CEVT_GT641XX 10711097c6acSYoichi Yuasa bool 10721097c6acSYoichi Yuasa 107342f77542SRalf Baechleconfig CEVT_R4K 107442f77542SRalf Baechle bool 107542f77542SRalf Baechle 1076217dd11eSRalf Baechleconfig CEVT_SB1250 1077217dd11eSRalf Baechle bool 1078217dd11eSRalf Baechle 1079229f773eSAtsushi Nemotoconfig CEVT_TXX9 1080229f773eSAtsushi Nemoto bool 1081229f773eSAtsushi Nemoto 1082217dd11eSRalf Baechleconfig CSRC_BCM1480 1083217dd11eSRalf Baechle bool 1084217dd11eSRalf Baechle 10854247417dSYoichi Yuasaconfig CSRC_IOASIC 10864247417dSYoichi Yuasa bool 10874247417dSYoichi Yuasa 1088940f6b48SRalf Baechleconfig CSRC_R4K 1089940f6b48SRalf Baechle bool 1090940f6b48SRalf Baechle 1091217dd11eSRalf Baechleconfig CSRC_SB1250 1092217dd11eSRalf Baechle bool 1093217dd11eSRalf Baechle 1094a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL 1095a7f4df4eSAlex Smith def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1096a7f4df4eSAlex Smith 1097a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 1098d30a2b47SLinus Walleij select GPIOLIB 1099a9aec7feSAtsushi Nemoto bool 1100a9aec7feSAtsushi Nemoto 11010e2794b0SRalf Baechleconfig FW_CFE 1102df78b5c8SAurelien Jarno bool 1103df78b5c8SAurelien Jarno 110440e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES 110540e084a5SRalf Baechle bool 110640e084a5SRalf Baechle 1107885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1108885014bcSFelix Fietkau select DMA_NONCOHERENT 1109885014bcSFelix Fietkau bool 1110885014bcSFelix Fietkau 111120d33064SPaul Burtonconfig DMA_PERDEV_COHERENT 111220d33064SPaul Burton bool 111320d33064SPaul Burton select DMA_MAYBE_COHERENT 111420d33064SPaul Burton 11151da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 11161da177e4SLinus Torvalds bool 1117f8c55dc6SChristoph Hellwig select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1118f8c55dc6SChristoph Hellwig select ARCH_HAS_SYNC_DMA_FOR_CPU 1119e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 1120f8c55dc6SChristoph Hellwig select DMA_NONCOHERENT_MMAP 1121f8c55dc6SChristoph Hellwig select DMA_NONCOHERENT_CACHE_SYNC 112228f512d9SChristoph Hellwig select DMA_NONCOHERENT_OPS 11234ce588cdSRalf Baechle 112436a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 11251da177e4SLinus Torvalds bool 11261da177e4SLinus Torvalds 11271b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1128dbb74540SRalf Baechle bool 1129dbb74540SRalf Baechle 11301da177e4SLinus Torvaldsconfig MIPS_BONITO64 11311da177e4SLinus Torvalds bool 11321da177e4SLinus Torvalds 11331da177e4SLinus Torvaldsconfig MIPS_MSC 11341da177e4SLinus Torvalds bool 11351da177e4SLinus Torvalds 11361f21d2bdSBrian Murphyconfig MIPS_NILE4 11371f21d2bdSBrian Murphy bool 11381f21d2bdSBrian Murphy 113939b8d525SRalf Baechleconfig SYNC_R4K 114039b8d525SRalf Baechle bool 114139b8d525SRalf Baechle 1142487d70d0SGabor Juhosconfig MIPS_MACHINE 1143487d70d0SGabor Juhos def_bool n 1144487d70d0SGabor Juhos 1145ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1146d388d685SMaciej W. Rozycki def_bool n 1147d388d685SMaciej W. Rozycki 11484e0748f5SMarkos Chandrasconfig GENERIC_CSUM 11494e0748f5SMarkos Chandras bool 11504e0748f5SMarkos Chandras 11518313da30SRalf Baechleconfig GENERIC_ISA_DMA 11528313da30SRalf Baechle bool 11538313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1154a35bee8aSNamhyung Kim select ISA_DMA_API 11558313da30SRalf Baechle 1156aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1157aa414dffSRalf Baechle bool 11588313da30SRalf Baechle select GENERIC_ISA_DMA 1159aa414dffSRalf Baechle 1160a35bee8aSNamhyung Kimconfig ISA_DMA_API 1161a35bee8aSNamhyung Kim bool 1162a35bee8aSNamhyung Kim 1163465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1164465aaed0SDavid Daney bool 1165465aaed0SDavid Daney 11668c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE 11678c530ea3SMatt Redfearn bool 11688c530ea3SMatt Redfearn help 11698c530ea3SMatt Redfearn Selected if the platform supports relocating the kernel. 11708c530ea3SMatt Redfearn The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF 11718c530ea3SMatt Redfearn to allow access to command line and entropy sources. 11728c530ea3SMatt Redfearn 1173f381bf6dSDavid Daneyconfig MIPS_CBPF_JIT 1174f381bf6dSDavid Daney def_bool y 1175f381bf6dSDavid Daney depends on BPF_JIT && HAVE_CBPF_JIT 1176f381bf6dSDavid Daney 1177f381bf6dSDavid Daneyconfig MIPS_EBPF_JIT 1178f381bf6dSDavid Daney def_bool y 1179f381bf6dSDavid Daney depends on BPF_JIT && HAVE_EBPF_JIT 1180f381bf6dSDavid Daney 1181f381bf6dSDavid Daney 11825e83d430SRalf Baechle# 11836b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 11845e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 11855e83d430SRalf Baechle# choice statement should be more obvious to the user. 11865e83d430SRalf Baechle# 11875e83d430SRalf Baechlechoice 11886b2aac42SMasanari Iida prompt "Endianness selection" 11891da177e4SLinus Torvalds help 11901da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 11915e83d430SRalf Baechle byte order. These modes require different kernels and a different 11923cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 11935e83d430SRalf Baechle particular system but some systems are just as commonly used in the 11943dde6ad8SDavid Sterba one or the other endianness. 11955e83d430SRalf Baechle 11965e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 11975e83d430SRalf Baechle bool "Big endian" 11985e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 11995e83d430SRalf Baechle 12005e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 12015e83d430SRalf Baechle bool "Little endian" 12025e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 12035e83d430SRalf Baechle 12045e83d430SRalf Baechleendchoice 12055e83d430SRalf Baechle 120622b0763aSDavid Daneyconfig EXPORT_UASM 120722b0763aSDavid Daney bool 120822b0763aSDavid Daney 12092116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 12102116245eSRalf Baechle bool 12112116245eSRalf Baechle 12125e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 12135e83d430SRalf Baechle bool 12145e83d430SRalf Baechle 12155e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 12165e83d430SRalf Baechle bool 12171da177e4SLinus Torvalds 12189cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 12199cffd154SDavid Daney bool 12209cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 12219cffd154SDavid Daney default y 12229cffd154SDavid Daney 1223aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1224aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1225aa1762f4SDavid Daney 12261da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 12271da177e4SLinus Torvalds bool 12281da177e4SLinus Torvalds 12299267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 12309267a30dSMarc St-Jean bool 12319267a30dSMarc St-Jean 12329267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 12339267a30dSMarc St-Jean bool 12349267a30dSMarc St-Jean 12358420fd00SAtsushi Nemotoconfig IRQ_TXX9 12368420fd00SAtsushi Nemoto bool 12378420fd00SAtsushi Nemoto 1238d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1239d5ab1a69SYoichi Yuasa bool 1240d5ab1a69SYoichi Yuasa 1241252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 12421da177e4SLinus Torvalds bool 12431da177e4SLinus Torvalds 12449267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 12459267a30dSMarc St-Jean bool 12469267a30dSMarc St-Jean 1247a83860c2SRalf Baechleconfig SOC_EMMA2RH 1248a83860c2SRalf Baechle bool 1249a83860c2SRalf Baechle select CEVT_R4K 1250a83860c2SRalf Baechle select CSRC_R4K 1251a83860c2SRalf Baechle select DMA_NONCOHERENT 125267e38cf2SRalf Baechle select IRQ_MIPS_CPU 1253a83860c2SRalf Baechle select SWAP_IO_SPACE 1254a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1255a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1256a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1257a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1258a83860c2SRalf Baechle 1259edb6310aSDaniel Lairdconfig SOC_PNX833X 1260edb6310aSDaniel Laird bool 1261edb6310aSDaniel Laird select CEVT_R4K 1262edb6310aSDaniel Laird select CSRC_R4K 126367e38cf2SRalf Baechle select IRQ_MIPS_CPU 1264edb6310aSDaniel Laird select DMA_NONCOHERENT 1265edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1266edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1267edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1268edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1269377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1270edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1271edb6310aSDaniel Laird 1272edb6310aSDaniel Lairdconfig SOC_PNX8335 1273edb6310aSDaniel Laird bool 1274edb6310aSDaniel Laird select SOC_PNX833X 1275edb6310aSDaniel Laird 1276a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1277a7e07b1aSMarkos Chandras bool 1278a7e07b1aSMarkos Chandras 12791da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 12801da177e4SLinus Torvalds bool 12811da177e4SLinus Torvalds 1282e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1283e2defae5SThomas Bogendoerfer bool 1284e2defae5SThomas Bogendoerfer 12855b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 12865b438c44SThomas Bogendoerfer bool 12875b438c44SThomas Bogendoerfer 1288e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1289e2defae5SThomas Bogendoerfer bool 1290e2defae5SThomas Bogendoerfer 1291e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1292e2defae5SThomas Bogendoerfer bool 1293e2defae5SThomas Bogendoerfer 1294e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1295e2defae5SThomas Bogendoerfer bool 1296e2defae5SThomas Bogendoerfer 1297e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1298e2defae5SThomas Bogendoerfer bool 1299e2defae5SThomas Bogendoerfer 1300e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1301e2defae5SThomas Bogendoerfer bool 1302e2defae5SThomas Bogendoerfer 13030e2794b0SRalf Baechleconfig FW_ARC32 13045e83d430SRalf Baechle bool 13055e83d430SRalf Baechle 1306aaa9fad3SPaul Bolleconfig FW_SNIPROM 1307231a35d3SThomas Bogendoerfer bool 1308231a35d3SThomas Bogendoerfer 13091da177e4SLinus Torvaldsconfig BOOT_ELF32 13101da177e4SLinus Torvalds bool 13111da177e4SLinus Torvalds 1312930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1313930beb5aSFlorian Fainelli bool 1314930beb5aSFlorian Fainelli 1315930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1316930beb5aSFlorian Fainelli bool 1317930beb5aSFlorian Fainelli 1318930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1319930beb5aSFlorian Fainelli bool 1320930beb5aSFlorian Fainelli 1321930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1322930beb5aSFlorian Fainelli bool 1323930beb5aSFlorian Fainelli 13241da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 13251da177e4SLinus Torvalds int 1326a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 13275432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 13285432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 13295432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 13301da177e4SLinus Torvalds default "5" 13311da177e4SLinus Torvalds 13321da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 13331da177e4SLinus Torvalds bool 13341da177e4SLinus Torvalds 13351da177e4SLinus Torvaldsconfig ARC_CONSOLE 13361da177e4SLinus Torvalds bool "ARC console support" 1337e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 13381da177e4SLinus Torvalds 13391da177e4SLinus Torvaldsconfig ARC_MEMORY 13401da177e4SLinus Torvalds bool 134114b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 13421da177e4SLinus Torvalds default y 13431da177e4SLinus Torvalds 13441da177e4SLinus Torvaldsconfig ARC_PROMLIB 13451da177e4SLinus Torvalds bool 1346e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 13471da177e4SLinus Torvalds default y 13481da177e4SLinus Torvalds 13490e2794b0SRalf Baechleconfig FW_ARC64 13501da177e4SLinus Torvalds bool 13511da177e4SLinus Torvalds 13521da177e4SLinus Torvaldsconfig BOOT_ELF64 13531da177e4SLinus Torvalds bool 13541da177e4SLinus Torvalds 13551da177e4SLinus Torvaldsmenu "CPU selection" 13561da177e4SLinus Torvalds 13571da177e4SLinus Torvaldschoice 13581da177e4SLinus Torvalds prompt "CPU type" 13591da177e4SLinus Torvalds default CPU_R4X00 13601da177e4SLinus Torvalds 13610e476d91SHuacai Chenconfig CPU_LOONGSON3 13620e476d91SHuacai Chen bool "Loongson 3 CPU" 13630e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 1364d3bc81beSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 13650e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 13660e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 13670e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 13680e476d91SHuacai Chen select WEAK_ORDERING 13690e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 1370b2edcfc8SHuacai Chen select MIPS_PGD_C0_CONTEXT 137117c99d94SHuacai Chen select MIPS_L1_CACHE_SHIFT_6 1372d30a2b47SLinus Walleij select GPIOLIB 137309230cbcSChristoph Hellwig select SWIOTLB 13740e476d91SHuacai Chen help 13750e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 13760e476d91SHuacai Chen set with many extensions. 13770e476d91SHuacai Chen 13781e820da3SHuacai Chenconfig LOONGSON3_ENHANCEMENT 13791e820da3SHuacai Chen bool "New Loongson 3 CPU Enhancements" 13801e820da3SHuacai Chen default n 13811e820da3SHuacai Chen select CPU_MIPSR2 13821e820da3SHuacai Chen select CPU_HAS_PREFETCH 13831e820da3SHuacai Chen depends on CPU_LOONGSON3 13841e820da3SHuacai Chen help 13851e820da3SHuacai Chen New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A 13861e820da3SHuacai Chen R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as 13871e820da3SHuacai Chen FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User 13881e820da3SHuacai Chen Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), 13891e820da3SHuacai Chen Fast TLB refill support, etc. 13901e820da3SHuacai Chen 13911e820da3SHuacai Chen This option enable those enhancements which are not probed at run 13921e820da3SHuacai Chen time. If you want a generic kernel to run on all Loongson 3 machines, 13931e820da3SHuacai Chen please say 'N' here. If you want a high-performance kernel to run on 13941e820da3SHuacai Chen new Loongson 3 machines only, please say 'Y' here. 13951e820da3SHuacai Chen 13963702bba5SWu Zhangjinconfig CPU_LOONGSON2E 13973702bba5SWu Zhangjin bool "Loongson 2E" 13983702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 13993702bba5SWu Zhangjin select CPU_LOONGSON2 14002a21c730SFuxin Zhang help 14012a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 14022a21c730SFuxin Zhang with many extensions. 14032a21c730SFuxin Zhang 140425985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 14056f7a251aSWu Zhangjin bonito64. 14066f7a251aSWu Zhangjin 14076f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 14086f7a251aSWu Zhangjin bool "Loongson 2F" 14096f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 14106f7a251aSWu Zhangjin select CPU_LOONGSON2 1411d30a2b47SLinus Walleij select GPIOLIB 14126f7a251aSWu Zhangjin help 14136f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 14146f7a251aSWu Zhangjin with many extensions. 14156f7a251aSWu Zhangjin 14166f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 14176f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 14186f7a251aSWu Zhangjin Loongson2E. 14196f7a251aSWu Zhangjin 1420ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1421ca585cf9SKelvin Cheung bool "Loongson 1B" 1422ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1423ca585cf9SKelvin Cheung select CPU_LOONGSON1 14249ec88b60SKelvin Cheung select LEDS_GPIO_REGISTER 1425ca585cf9SKelvin Cheung help 1426ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1427ca585cf9SKelvin Cheung release 2 instruction set. 1428ca585cf9SKelvin Cheung 142912e3280bSYang Lingconfig CPU_LOONGSON1C 143012e3280bSYang Ling bool "Loongson 1C" 143112e3280bSYang Ling depends on SYS_HAS_CPU_LOONGSON1C 143212e3280bSYang Ling select CPU_LOONGSON1 143312e3280bSYang Ling select LEDS_GPIO_REGISTER 143412e3280bSYang Ling help 143512e3280bSYang Ling The Loongson 1C is a 32-bit SoC, which implements the MIPS32 143612e3280bSYang Ling release 2 instruction set. 143712e3280bSYang Ling 14386e760c8dSRalf Baechleconfig CPU_MIPS32_R1 14396e760c8dSRalf Baechle bool "MIPS32 Release 1" 14407cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 14416e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1442797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1443ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14446e760c8dSRalf Baechle help 14455e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 14461e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14471e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14481e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14491e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14501e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 14511e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 14521e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 14531e5f1caaSRalf Baechle performance. 14541e5f1caaSRalf Baechle 14551e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 14561e5f1caaSRalf Baechle bool "MIPS32 Release 2" 14577cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 14581e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1459797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1460ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1461a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14622235a54dSSanjay Lal select HAVE_KVM 14631e5f1caaSRalf Baechle help 14645e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 14656e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14666e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14676e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14686e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14691da177e4SLinus Torvalds 14707fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 1471674d10e2SMarkos Chandras bool "MIPS32 Release 6" 14727fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 14737fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14747fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14757fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14767fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14774e0748f5SMarkos Chandras select GENERIC_CSUM 14787fd08ca5SLeonid Yegoshin select HAVE_KVM 14797fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 14807fd08ca5SLeonid Yegoshin help 14817fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14827fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 14837fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 14847fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 14857fd08ca5SLeonid Yegoshin 14866e760c8dSRalf Baechleconfig CPU_MIPS64_R1 14876e760c8dSRalf Baechle bool "MIPS64 Release 1" 14887cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1489797798c1SRalf Baechle select CPU_HAS_PREFETCH 1490ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1491ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1492ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14939cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14946e760c8dSRalf Baechle help 14956e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 14966e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 14976e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 14986e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14996e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 15001e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 15011e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 15021e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 15031e5f1caaSRalf Baechle performance. 15041e5f1caaSRalf Baechle 15051e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 15061e5f1caaSRalf Baechle bool "MIPS64 Release 2" 15077cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1508797798c1SRalf Baechle select CPU_HAS_PREFETCH 15091e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 15101e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1511ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15129cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1513a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 151440a2df49SJames Hogan select HAVE_KVM 15151e5f1caaSRalf Baechle help 15161e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 15171e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 15181e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 15191e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 15201e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 15211da177e4SLinus Torvalds 15227fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 1523674d10e2SMarkos Chandras bool "MIPS64 Release 6" 15247fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 15257fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 15267fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 15277fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 15287fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 15297fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 15304e0748f5SMarkos Chandras select GENERIC_CSUM 15312e6c7747SJames Hogan select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 153240a2df49SJames Hogan select HAVE_KVM 15337fd08ca5SLeonid Yegoshin help 15347fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 15357fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 15367fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 15377fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 15387fd08ca5SLeonid Yegoshin 15391da177e4SLinus Torvaldsconfig CPU_R3000 15401da177e4SLinus Torvalds bool "R3000" 15417cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1542f7062ddbSRalf Baechle select CPU_HAS_WB 1543ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1544797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15451da177e4SLinus Torvalds help 15461da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 15471da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 15481da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 15491da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 15501da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 15511da177e4SLinus Torvalds try to recompile with R3000. 15521da177e4SLinus Torvalds 15531da177e4SLinus Torvaldsconfig CPU_TX39XX 15541da177e4SLinus Torvalds bool "R39XX" 15557cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1556ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15571da177e4SLinus Torvalds 15581da177e4SLinus Torvaldsconfig CPU_VR41XX 15591da177e4SLinus Torvalds bool "R41xx" 15607cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1561ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1562ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15631da177e4SLinus Torvalds help 15645e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 15651da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 15661da177e4SLinus Torvalds kernel built with this option will not run on any other type of 15671da177e4SLinus Torvalds processor or vice versa. 15681da177e4SLinus Torvalds 15691da177e4SLinus Torvaldsconfig CPU_R4300 15701da177e4SLinus Torvalds bool "R4300" 15717cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1572ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1573ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15741da177e4SLinus Torvalds help 15751da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 15761da177e4SLinus Torvalds 15771da177e4SLinus Torvaldsconfig CPU_R4X00 15781da177e4SLinus Torvalds bool "R4x00" 15797cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1580ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1581ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1582970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15831da177e4SLinus Torvalds help 15841da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 15851da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 15861da177e4SLinus Torvalds 15871da177e4SLinus Torvaldsconfig CPU_TX49XX 15881da177e4SLinus Torvalds bool "R49XX" 15897cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1590de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1591ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1592ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1593970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15941da177e4SLinus Torvalds 15951da177e4SLinus Torvaldsconfig CPU_R5000 15961da177e4SLinus Torvalds bool "R5000" 15977cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1598ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1599ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1600970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16011da177e4SLinus Torvalds help 16021da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 16031da177e4SLinus Torvalds 16041da177e4SLinus Torvaldsconfig CPU_R5432 16051da177e4SLinus Torvalds bool "R5432" 16067cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 16075e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 16085e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1609970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16101da177e4SLinus Torvalds 1611542c1020SShinya Kuribayashiconfig CPU_R5500 1612542c1020SShinya Kuribayashi bool "R5500" 1613542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1614542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1615542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 16169cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1617542c1020SShinya Kuribayashi help 1618542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1619542c1020SShinya Kuribayashi instruction set. 1620542c1020SShinya Kuribayashi 16211da177e4SLinus Torvaldsconfig CPU_NEVADA 16221da177e4SLinus Torvalds bool "RM52xx" 16237cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1624ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1625ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1626970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16271da177e4SLinus Torvalds help 16281da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 16291da177e4SLinus Torvalds 16301da177e4SLinus Torvaldsconfig CPU_R8000 16311da177e4SLinus Torvalds bool "R8000" 16327cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 16335e83d430SRalf Baechle select CPU_HAS_PREFETCH 1634ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 16351da177e4SLinus Torvalds help 16361da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 16371da177e4SLinus Torvalds uncommon and the support for them is incomplete. 16381da177e4SLinus Torvalds 16391da177e4SLinus Torvaldsconfig CPU_R10000 16401da177e4SLinus Torvalds bool "R10000" 16417cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 16425e83d430SRalf Baechle select CPU_HAS_PREFETCH 1643ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1644ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1645797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1646970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16471da177e4SLinus Torvalds help 16481da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 16491da177e4SLinus Torvalds 16501da177e4SLinus Torvaldsconfig CPU_RM7000 16511da177e4SLinus Torvalds bool "RM7000" 16527cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 16535e83d430SRalf Baechle select CPU_HAS_PREFETCH 1654ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1655ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1656797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1657970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16581da177e4SLinus Torvalds 16591da177e4SLinus Torvaldsconfig CPU_SB1 16601da177e4SLinus Torvalds bool "SB1" 16617cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1662ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1663ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1664797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1665970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16660004a9dfSRalf Baechle select WEAK_ORDERING 16671da177e4SLinus Torvalds 1668a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1669a86c7f72SDavid Daney bool "Cavium Octeon processor" 16705e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1671a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1672a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1673a86c7f72SDavid Daney select WEAK_ORDERING 1674a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 16759cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1676df115f3eSBen Hutchings select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1677df115f3eSBen Hutchings select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1678930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 16790ae3abcdSJames Hogan select HAVE_KVM 1680a86c7f72SDavid Daney help 1681a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1682a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1683a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1684a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1685a86c7f72SDavid Daney 1686cd746249SJonas Gorskiconfig CPU_BMIPS 1687cd746249SJonas Gorski bool "Broadcom BMIPS" 1688cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1689cd746249SJonas Gorski select CPU_MIPS32 1690fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1691cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1692cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1693cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1694cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1695cd746249SJonas Gorski select DMA_NONCOHERENT 169667e38cf2SRalf Baechle select IRQ_MIPS_CPU 1697cd746249SJonas Gorski select SWAP_IO_SPACE 1698cd746249SJonas Gorski select WEAK_ORDERING 1699c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 170069aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1701a8d709b0SMarkus Mayer select CPU_SUPPORTS_CPUFREQ 1702a8d709b0SMarkus Mayer select MIPS_EXTERNAL_TIMER 1703c1c0c461SKevin Cernekee help 1704fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1705c1c0c461SKevin Cernekee 17067f058e85SJayachandran Cconfig CPU_XLR 17077f058e85SJayachandran C bool "Netlogic XLR SoC" 17087f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 17097f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17107f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17117f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1712970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17137f058e85SJayachandran C select WEAK_ORDERING 17147f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17157f058e85SJayachandran C help 17167f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 17171c773ea4SJayachandran C 17181c773ea4SJayachandran Cconfig CPU_XLP 17191c773ea4SJayachandran C bool "Netlogic XLP SoC" 17201c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 17211c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17221c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17231c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 17241c773ea4SJayachandran C select WEAK_ORDERING 17251c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17261c773ea4SJayachandran C select CPU_HAS_PREFETCH 1727d6504846SJayachandran C select CPU_MIPSR2 1728ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 17292db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 17301c773ea4SJayachandran C help 17311c773ea4SJayachandran C Netlogic Microsystems XLP processors. 17321da177e4SLinus Torvaldsendchoice 17331da177e4SLinus Torvalds 1734a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1735a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1736a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 17377fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1738a6e18781SLeonid Yegoshin help 1739a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1740a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1741a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1742a6e18781SLeonid Yegoshin 1743a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1744a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1745a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1746a6e18781SLeonid Yegoshin select EVA 1747a6e18781SLeonid Yegoshin default y 1748a6e18781SLeonid Yegoshin help 1749a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1750a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1751a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1752a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1753a6e18781SLeonid Yegoshin 1754c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1755c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1756c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1757c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1758c5b36783SSteven J. Hill help 1759c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1760c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1761c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1762c5b36783SSteven J. Hill 1763c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1764c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1765c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1766c5b36783SSteven J. Hill depends on !EVA 1767c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1768c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1769c5b36783SSteven J. Hill select XPA 1770c5b36783SSteven J. Hill select HIGHMEM 1771d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 1772c5b36783SSteven J. Hill default n 1773c5b36783SSteven J. Hill help 1774c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1775c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1776c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1777c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1778c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1779c5b36783SSteven J. Hill If unsure, say 'N' here. 1780c5b36783SSteven J. Hill 1781622844bfSWu Zhangjinif CPU_LOONGSON2F 1782622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1783622844bfSWu Zhangjin bool 1784622844bfSWu Zhangjin 1785622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1786622844bfSWu Zhangjin bool 1787622844bfSWu Zhangjin 1788622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1789622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1790622844bfSWu Zhangjin default y 1791622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1792622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1793622844bfSWu Zhangjin help 1794622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1795622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1796622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1797622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1798622844bfSWu Zhangjin 1799622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1800622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1801622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1802622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1803622844bfSWu Zhangjin systems. 1804622844bfSWu Zhangjin 1805622844bfSWu Zhangjin If unsure, please say Y. 1806622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1807622844bfSWu Zhangjin 18081b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 18091b93b3c3SWu Zhangjin bool 18101b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 18111b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 181231c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 18131b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1814fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 18154e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 18161b93b3c3SWu Zhangjin 18171b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 18181b93b3c3SWu Zhangjin bool 18191b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 18201b93b3c3SWu Zhangjin 1821dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM 1822dbb98314SAlban Bedel bool 1823dbb98314SAlban Bedel select SYS_SUPPORTS_ZBOOT 1824dbb98314SAlban Bedel 18253702bba5SWu Zhangjinconfig CPU_LOONGSON2 18263702bba5SWu Zhangjin bool 18273702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 18283702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 18293702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1830970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 1831e905086eSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 18323702bba5SWu Zhangjin 1833ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1834ca585cf9SKelvin Cheung bool 1835ca585cf9SKelvin Cheung select CPU_MIPS32 1836ca585cf9SKelvin Cheung select CPU_MIPSR2 1837ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1838ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1839ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1840f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1841ca585cf9SKelvin Cheung 1842fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 184304fa8bf7SJonas Gorski select SMP_UP if SMP 18441bbb6c1bSKevin Cernekee bool 1845cd746249SJonas Gorski 1846cd746249SJonas Gorskiconfig CPU_BMIPS4350 1847cd746249SJonas Gorski bool 1848cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1849cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1850cd746249SJonas Gorski 1851cd746249SJonas Gorskiconfig CPU_BMIPS4380 1852cd746249SJonas Gorski bool 1853bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1854cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1855cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1856b4720809SFlorian Fainelli select CPU_HAS_RIXI 1857cd746249SJonas Gorski 1858cd746249SJonas Gorskiconfig CPU_BMIPS5000 1859cd746249SJonas Gorski bool 1860cd746249SJonas Gorski select MIPS_CPU_SCACHE 1861bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1862cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1863cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1864b4720809SFlorian Fainelli select CPU_HAS_RIXI 18651bbb6c1bSKevin Cernekee 18660e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 18670e476d91SHuacai Chen bool 18680e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 1869b2edcfc8SHuacai Chen select CPU_HAS_RIXI 18700e476d91SHuacai Chen 18713702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 18722a21c730SFuxin Zhang bool 18732a21c730SFuxin Zhang 18746f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 18756f7a251aSWu Zhangjin bool 187655045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 187755045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 187822f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 18796f7a251aSWu Zhangjin 1880ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1881ca585cf9SKelvin Cheung bool 1882ca585cf9SKelvin Cheung 188312e3280bSYang Lingconfig SYS_HAS_CPU_LOONGSON1C 188412e3280bSYang Ling bool 188512e3280bSYang Ling 18867cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 18877cf8053bSRalf Baechle bool 18887cf8053bSRalf Baechle 18897cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 18907cf8053bSRalf Baechle bool 18917cf8053bSRalf Baechle 1892a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1893a6e18781SLeonid Yegoshin bool 1894a6e18781SLeonid Yegoshin 1895c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1896c5b36783SSteven J. Hill bool 1897c5b36783SSteven J. Hill 18987fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 18997fd08ca5SLeonid Yegoshin bool 19007fd08ca5SLeonid Yegoshin 19017cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 19027cf8053bSRalf Baechle bool 19037cf8053bSRalf Baechle 19047cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 19057cf8053bSRalf Baechle bool 19067cf8053bSRalf Baechle 19077fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 19087fd08ca5SLeonid Yegoshin bool 19097fd08ca5SLeonid Yegoshin 19107cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 19117cf8053bSRalf Baechle bool 19127cf8053bSRalf Baechle 19137cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 19147cf8053bSRalf Baechle bool 19157cf8053bSRalf Baechle 19167cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 19177cf8053bSRalf Baechle bool 19187cf8053bSRalf Baechle 19197cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 19207cf8053bSRalf Baechle bool 19217cf8053bSRalf Baechle 19227cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 19237cf8053bSRalf Baechle bool 19247cf8053bSRalf Baechle 19257cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 19267cf8053bSRalf Baechle bool 19277cf8053bSRalf Baechle 19287cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 19297cf8053bSRalf Baechle bool 19307cf8053bSRalf Baechle 19317cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 19327cf8053bSRalf Baechle bool 19337cf8053bSRalf Baechle 1934542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1935542c1020SShinya Kuribayashi bool 1936542c1020SShinya Kuribayashi 19377cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 19387cf8053bSRalf Baechle bool 19397cf8053bSRalf Baechle 19407cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 19417cf8053bSRalf Baechle bool 19427cf8053bSRalf Baechle 19437cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 19447cf8053bSRalf Baechle bool 19457cf8053bSRalf Baechle 19467cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 19477cf8053bSRalf Baechle bool 19487cf8053bSRalf Baechle 19497cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 19507cf8053bSRalf Baechle bool 19517cf8053bSRalf Baechle 19525e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 19535e683389SDavid Daney bool 19545e683389SDavid Daney 1955cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1956c1c0c461SKevin Cernekee bool 1957c1c0c461SKevin Cernekee 1958fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1959c1c0c461SKevin Cernekee bool 1960cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1961c1c0c461SKevin Cernekee 1962c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1963c1c0c461SKevin Cernekee bool 1964cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1965c1c0c461SKevin Cernekee 1966c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1967c1c0c461SKevin Cernekee bool 1968cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1969c1c0c461SKevin Cernekee 1970c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1971c1c0c461SKevin Cernekee bool 1972cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1973c1c0c461SKevin Cernekee 19747f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 19757f058e85SJayachandran C bool 19767f058e85SJayachandran C 19771c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 19781c773ea4SJayachandran C bool 19791c773ea4SJayachandran C 198017099b11SRalf Baechle# 198117099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 198217099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 198317099b11SRalf Baechle# 19840004a9dfSRalf Baechleconfig WEAK_ORDERING 19850004a9dfSRalf Baechle bool 198617099b11SRalf Baechle 198717099b11SRalf Baechle# 198817099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 198917099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 199017099b11SRalf Baechle# 199117099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 199217099b11SRalf Baechle bool 19935e83d430SRalf Baechleendmenu 19945e83d430SRalf Baechle 19955e83d430SRalf Baechle# 19965e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 19975e83d430SRalf Baechle# 19985e83d430SRalf Baechleconfig CPU_MIPS32 19995e83d430SRalf Baechle bool 20007fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 20015e83d430SRalf Baechle 20025e83d430SRalf Baechleconfig CPU_MIPS64 20035e83d430SRalf Baechle bool 20047fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 20055e83d430SRalf Baechle 20065e83d430SRalf Baechle# 2007c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 20085e83d430SRalf Baechle# 20095e83d430SRalf Baechleconfig CPU_MIPSR1 20105e83d430SRalf Baechle bool 20115e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 20125e83d430SRalf Baechle 20135e83d430SRalf Baechleconfig CPU_MIPSR2 20145e83d430SRalf Baechle bool 2015a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 20168256b17eSFlorian Fainelli select CPU_HAS_RIXI 2017a7e07b1aSMarkos Chandras select MIPS_SPRAM 20185e83d430SRalf Baechle 20197fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 20207fd08ca5SLeonid Yegoshin bool 20217fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 20228256b17eSFlorian Fainelli select CPU_HAS_RIXI 202387321fddSPaul Burton select HAVE_ARCH_BITREVERSE 20242db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 20254a5dc51eSMarcin Nowakowski select MIPS_CRC_SUPPORT 2026a7e07b1aSMarkos Chandras select MIPS_SPRAM 20275e83d430SRalf Baechle 2028a6e18781SLeonid Yegoshinconfig EVA 2029a6e18781SLeonid Yegoshin bool 2030a6e18781SLeonid Yegoshin 2031c5b36783SSteven J. Hillconfig XPA 2032c5b36783SSteven J. Hill bool 2033c5b36783SSteven J. Hill 20345e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 20355e83d430SRalf Baechle bool 20365e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 20375e83d430SRalf Baechle bool 20385e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 20395e83d430SRalf Baechle bool 20405e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 20415e83d430SRalf Baechle bool 204255045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 204355045ff5SWu Zhangjin bool 204455045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 204555045ff5SWu Zhangjin bool 20469cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 20479cffd154SDavid Daney bool 204822f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 204922f1fdfdSWu Zhangjin bool 205082622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 205182622284SDavid Daney bool 2052cebf8c0fSPaul Burton default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP 20535e83d430SRalf Baechle 20548192c9eaSDavid Daney# 20558192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 20568192c9eaSDavid Daney# 20578192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 20588192c9eaSDavid Daney bool 2059679eb637SJames Hogan default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 20608192c9eaSDavid Daney 20615e83d430SRalf Baechlemenu "Kernel type" 20625e83d430SRalf Baechle 20635e83d430SRalf Baechlechoice 20645e83d430SRalf Baechle prompt "Kernel code model" 20655e83d430SRalf Baechle help 20665e83d430SRalf Baechle You should only select this option if you have a workload that 20675e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 20685e83d430SRalf Baechle large memory. You will only be presented a single option in this 20695e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 20705e83d430SRalf Baechle 20715e83d430SRalf Baechleconfig 32BIT 20725e83d430SRalf Baechle bool "32-bit kernel" 20735e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 20745e83d430SRalf Baechle select TRAD_SIGNALS 20755e83d430SRalf Baechle help 20765e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 2077f17c4ca3SRalf Baechle 20785e83d430SRalf Baechleconfig 64BIT 20795e83d430SRalf Baechle bool "64-bit kernel" 20805e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 20815e83d430SRalf Baechle help 20825e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 20835e83d430SRalf Baechle 20845e83d430SRalf Baechleendchoice 20855e83d430SRalf Baechle 20862235a54dSSanjay Lalconfig KVM_GUEST 20872235a54dSSanjay Lal bool "KVM Guest Kernel" 2088f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 20892235a54dSSanjay Lal help 2090caa1faa7SJames Hogan Select this option if building a guest kernel for KVM (Trap & Emulate) 2091caa1faa7SJames Hogan mode. 20922235a54dSSanjay Lal 2093eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 2094eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 20952235a54dSSanjay Lal depends on KVM_GUEST 2096eda3d33cSJames Hogan default 100 20972235a54dSSanjay Lal help 2098eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 2099eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 2100eda3d33cSJames Hogan timer frequency is specified directly. 21012235a54dSSanjay Lal 21021e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48 21031e321fa9SLeonid Yegoshin bool "48 bits virtual memory" 21041e321fa9SLeonid Yegoshin depends on 64BIT 21051e321fa9SLeonid Yegoshin help 21063377e227SAlex Belits Support a maximum at least 48 bits of application virtual 21073377e227SAlex Belits memory. Default is 40 bits or less, depending on the CPU. 21083377e227SAlex Belits For page sizes 16k and above, this option results in a small 21093377e227SAlex Belits memory overhead for page tables. For 4k page size, a fourth 21103377e227SAlex Belits level of page tables is added which imposes both a memory 21113377e227SAlex Belits overhead as well as slower TLB fault handling. 21123377e227SAlex Belits 21131e321fa9SLeonid Yegoshin If unsure, say N. 21141e321fa9SLeonid Yegoshin 21151da177e4SLinus Torvaldschoice 21161da177e4SLinus Torvalds prompt "Kernel page size" 21171da177e4SLinus Torvalds default PAGE_SIZE_4KB 21181da177e4SLinus Torvalds 21191da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 21201da177e4SLinus Torvalds bool "4kB" 21210e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 21221da177e4SLinus Torvalds help 21231da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 21241da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 21251da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 21261da177e4SLinus Torvalds recommended for low memory systems. 21271da177e4SLinus Torvalds 21281da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 21291da177e4SLinus Torvalds bool "8kB" 21307d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 21311e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 21321da177e4SLinus Torvalds help 21331da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 21341da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2135c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 2136c52399beSRalf Baechle suitable Linux distribution to support this. 21371da177e4SLinus Torvalds 21381da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 21391da177e4SLinus Torvalds bool "16kB" 2140714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 21411da177e4SLinus Torvalds help 21421da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 21431da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2144714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2145714bfad6SRalf Baechle Linux distribution to support this. 21461da177e4SLinus Torvalds 2147c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2148c52399beSRalf Baechle bool "32kB" 2149c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 21501e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 2151c52399beSRalf Baechle help 2152c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2153c52399beSRalf Baechle the price of higher memory consumption. This option is available 2154c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2155c52399beSRalf Baechle distribution to support this. 2156c52399beSRalf Baechle 21571da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 21581da177e4SLinus Torvalds bool "64kB" 21593b2db173SPaul Burton depends on !CPU_R3000 && !CPU_TX39XX 21601da177e4SLinus Torvalds help 21611da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 21621da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 21631da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2164714bfad6SRalf Baechle writing this option is still high experimental. 21651da177e4SLinus Torvalds 21661da177e4SLinus Torvaldsendchoice 21671da177e4SLinus Torvalds 2168c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2169c9bace7cSDavid Daney int "Maximum zone order" 2170e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2171e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2172e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2173e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2174e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2175e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2176c9bace7cSDavid Daney range 11 64 2177c9bace7cSDavid Daney default "11" 2178c9bace7cSDavid Daney help 2179c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2180c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2181c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2182c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2183c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2184c9bace7cSDavid Daney increase this value. 2185c9bace7cSDavid Daney 2186c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2187c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2188c9bace7cSDavid Daney 2189c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2190c9bace7cSDavid Daney when choosing a value for this option. 2191c9bace7cSDavid Daney 21921da177e4SLinus Torvaldsconfig BOARD_SCACHE 21931da177e4SLinus Torvalds bool 21941da177e4SLinus Torvalds 21951da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 21961da177e4SLinus Torvalds bool 21971da177e4SLinus Torvalds select BOARD_SCACHE 21981da177e4SLinus Torvalds 21999318c51aSChris Dearman# 22009318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 22019318c51aSChris Dearman# 22029318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 22039318c51aSChris Dearman bool 22049318c51aSChris Dearman select BOARD_SCACHE 22059318c51aSChris Dearman 22061da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 22071da177e4SLinus Torvalds bool 22081da177e4SLinus Torvalds select BOARD_SCACHE 22091da177e4SLinus Torvalds 22101da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 22111da177e4SLinus Torvalds bool 22121da177e4SLinus Torvalds select BOARD_SCACHE 22131da177e4SLinus Torvalds 22141da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 22151da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 22161da177e4SLinus Torvalds depends on CPU_SB1 22171da177e4SLinus Torvalds help 22181da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 22191da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 22201da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 22211da177e4SLinus Torvalds 22221da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2223c8094b53SRalf Baechle bool 22241da177e4SLinus Torvalds 22253165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 22263165c846SFlorian Fainelli bool 22273b2db173SPaul Burton default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX) 22283165c846SFlorian Fainelli 222991405eb6SFlorian Fainelliconfig CPU_R4K_FPU 223091405eb6SFlorian Fainelli bool 2231a2aea699SPaul Burton default y if !(CPU_R3000 || CPU_TX39XX) 223291405eb6SFlorian Fainelli 223362cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 223462cedc4fSFlorian Fainelli bool 223562cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 223662cedc4fSFlorian Fainelli 223759d6ab86SRalf Baechleconfig MIPS_MT_SMP 2238a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 22395cbf9688SPaul Burton default y 2240527f1028SPaul Burton depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS 224159d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2242d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2243c080faa5SSteven J. Hill select SYNC_R4K 224459d6ab86SRalf Baechle select MIPS_MT 224559d6ab86SRalf Baechle select SMP 224687353d8aSRalf Baechle select SMP_UP 2247c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2248c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2249399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 225059d6ab86SRalf Baechle help 2251c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2252c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2253c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2254c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2255c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 225659d6ab86SRalf Baechle 2257f41ae0b2SRalf Baechleconfig MIPS_MT 2258f41ae0b2SRalf Baechle bool 2259f41ae0b2SRalf Baechle 22600ab7aefcSRalf Baechleconfig SCHED_SMT 22610ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 22620ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 22630ab7aefcSRalf Baechle default n 22640ab7aefcSRalf Baechle help 22650ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 22660ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 22670ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 22680ab7aefcSRalf Baechle 22690ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 22700ab7aefcSRalf Baechle bool 22710ab7aefcSRalf Baechle 2272f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2273f41ae0b2SRalf Baechle bool 2274f41ae0b2SRalf Baechle 2275f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2276f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2277f088fc84SRalf Baechle default y 2278b633648cSRalf Baechle depends on MIPS_MT_SMP 227907cc0c9eSRalf Baechle 2280b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2281b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 22829eaa9a82SPaul Burton depends on CPU_MIPSR6 2283b0a668fbSLeonid Yegoshin default y 2284b0a668fbSLeonid Yegoshin help 2285b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2286b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 228707edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2288b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2289b0a668fbSLeonid Yegoshin final kernel image. 2290b0a668fbSLeonid Yegoshin 2291f35764e7SJames Hoganconfig SYS_SUPPORTS_VPE_LOADER 2292f35764e7SJames Hogan bool 2293f35764e7SJames Hogan depends on SYS_SUPPORTS_MULTITHREADING 2294f35764e7SJames Hogan help 2295f35764e7SJames Hogan Indicates that the platform supports the VPE loader, and provides 2296f35764e7SJames Hogan physical_memsize. 2297f35764e7SJames Hogan 229807cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 229907cc0c9eSRalf Baechle bool "VPE loader support." 2300f35764e7SJames Hogan depends on SYS_SUPPORTS_VPE_LOADER && MODULES 230107cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 230207cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 230307cc0c9eSRalf Baechle select MIPS_MT 230407cc0c9eSRalf Baechle help 230507cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 230607cc0c9eSRalf Baechle onto another VPE and running it. 2307f088fc84SRalf Baechle 230817a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 230917a1d523SDeng-Cheng Zhu bool 231017a1d523SDeng-Cheng Zhu default "y" 231117a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 231217a1d523SDeng-Cheng Zhu 23131a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 23141a2a6d7eSDeng-Cheng Zhu bool 23151a2a6d7eSDeng-Cheng Zhu default "y" 23161a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 23171a2a6d7eSDeng-Cheng Zhu 2318e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2319e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2320e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2321e01402b1SRalf Baechle default y 2322e01402b1SRalf Baechle help 2323e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2324e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2325e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2326e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2327e01402b1SRalf Baechle 2328e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2329e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2330e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2331e01402b1SRalf Baechle 2332da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2333da615cf6SDeng-Cheng Zhu bool 2334da615cf6SDeng-Cheng Zhu default "y" 2335da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2336da615cf6SDeng-Cheng Zhu 23372c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 23382c973ef0SDeng-Cheng Zhu bool 23392c973ef0SDeng-Cheng Zhu default "y" 23402c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 23412c973ef0SDeng-Cheng Zhu 23424a16ff4cSRalf Baechleconfig MIPS_CMP 23435cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 23445676319cSMarkos Chandras depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 2345b10b43baSMarkos Chandras select SMP 2346eb9b5141STim Anderson select SYNC_R4K 2347b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 23484a16ff4cSRalf Baechle select WEAK_ORDERING 23494a16ff4cSRalf Baechle default n 23504a16ff4cSRalf Baechle help 2351044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2352044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2353044505c7SPaul Burton its ability to start secondary CPUs. 23544a16ff4cSRalf Baechle 23555cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 23565cac93b3SPaul Burton instead of this. 23575cac93b3SPaul Burton 23580ee958e1SPaul Burtonconfig MIPS_CPS 23590ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 23605a3e7c02SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 23610ee958e1SPaul Burton select MIPS_CM 23621d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 23630ee958e1SPaul Burton select SMP 23640ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 23651d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 2366c8b7712cSPaul Burton select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 23670ee958e1SPaul Burton select SYS_SUPPORTS_SMP 23680ee958e1SPaul Burton select WEAK_ORDERING 23690ee958e1SPaul Burton help 23700ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 23710ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 23720ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 23730ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 23740ee958e1SPaul Burton support is unavailable. 23750ee958e1SPaul Burton 23763179d37eSPaul Burtonconfig MIPS_CPS_PM 237739a59593SMarkos Chandras depends on MIPS_CPS 23783179d37eSPaul Burton bool 23793179d37eSPaul Burton 23809f98f3ddSPaul Burtonconfig MIPS_CM 23819f98f3ddSPaul Burton bool 23823c9b4166SPaul Burton select MIPS_CPC 23839f98f3ddSPaul Burton 23849c38cf44SPaul Burtonconfig MIPS_CPC 23859c38cf44SPaul Burton bool 23862600990eSRalf Baechle 23871da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 23881da177e4SLinus Torvalds bool 23891da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 23901da177e4SLinus Torvalds default y 23911da177e4SLinus Torvalds 23921da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 23931da177e4SLinus Torvalds bool 23941da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 23951da177e4SLinus Torvalds default y 23961da177e4SLinus Torvalds 23972235a54dSSanjay Lal 23989e2b5372SMarkos Chandraschoice 23999e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 24009e2b5372SMarkos Chandras 24019e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 24029e2b5372SMarkos Chandras bool "None" 24039e2b5372SMarkos Chandras help 24049e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 24059e2b5372SMarkos Chandras 24069693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 24079693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 24089e2b5372SMarkos Chandras bool "SmartMIPS" 24099693a853SFranck Bui-Huu help 24109693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 24119693a853SFranck Bui-Huu increased security at both hardware and software level for 24129693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 24139693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 24149693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 24159693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 24169693a853SFranck Bui-Huu here. 24179693a853SFranck Bui-Huu 2418bce86083SSteven J. Hillconfig CPU_MICROMIPS 24197fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 24209e2b5372SMarkos Chandras bool "microMIPS" 2421bce86083SSteven J. Hill help 2422bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2423bce86083SSteven J. Hill microMIPS ISA 2424bce86083SSteven J. Hill 24259e2b5372SMarkos Chandrasendchoice 24269e2b5372SMarkos Chandras 2427a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 24280ce3417eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2429a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 24302a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2431a5e9a69eSPaul Burton help 2432a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2433a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 24341db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 24351db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 24361db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 24371db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 24381db1af84SPaul Burton the size & complexity of your kernel. 2439a5e9a69eSPaul Burton 2440a5e9a69eSPaul Burton If unsure, say Y. 2441a5e9a69eSPaul Burton 24421da177e4SLinus Torvaldsconfig CPU_HAS_WB 2443f7062ddbSRalf Baechle bool 2444e01402b1SRalf Baechle 2445df0ac8a4SKevin Cernekeeconfig XKS01 2446df0ac8a4SKevin Cernekee bool 2447df0ac8a4SKevin Cernekee 24488256b17eSFlorian Fainelliconfig CPU_HAS_RIXI 24498256b17eSFlorian Fainelli bool 24508256b17eSFlorian Fainelli 2451f41ae0b2SRalf Baechle# 2452f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2453f41ae0b2SRalf Baechle# 2454e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2455f41ae0b2SRalf Baechle bool 2456e01402b1SRalf Baechle 2457f41ae0b2SRalf Baechle# 2458f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2459f41ae0b2SRalf Baechle# 2460e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2461f41ae0b2SRalf Baechle bool 2462e01402b1SRalf Baechle 24631da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 24641da177e4SLinus Torvalds bool 24651da177e4SLinus Torvalds depends on !CPU_R3000 24661da177e4SLinus Torvalds default y 24671da177e4SLinus Torvalds 24681da177e4SLinus Torvalds# 246920d60d99SMaciej W. Rozycki# CPU non-features 247020d60d99SMaciej W. Rozycki# 247120d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 247220d60d99SMaciej W. Rozycki bool 247320d60d99SMaciej W. Rozycki 247420d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 247520d60d99SMaciej W. Rozycki bool 247620d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 247720d60d99SMaciej W. Rozycki 247820d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 247920d60d99SMaciej W. Rozycki bool 248020d60d99SMaciej W. Rozycki 24814edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT 24824edf00a4SPaul Burton int 24834edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24844edf00a4SPaul Burton default 4 if CPU_R8000 24854edf00a4SPaul Burton default 0 24864edf00a4SPaul Burton 24874edf00a4SPaul Burtonconfig MIPS_ASID_BITS 24884edf00a4SPaul Burton int 24892db003a5SPaul Burton default 0 if MIPS_ASID_BITS_VARIABLE 24904edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24914edf00a4SPaul Burton default 8 24924edf00a4SPaul Burton 24932db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE 24942db003a5SPaul Burton bool 24952db003a5SPaul Burton 24964a5dc51eSMarcin Nowakowskiconfig MIPS_CRC_SUPPORT 24974a5dc51eSMarcin Nowakowski bool 24984a5dc51eSMarcin Nowakowski 249920d60d99SMaciej W. Rozycki# 25001da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 25011da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 25021da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 25031da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 25041da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 25051da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 25061da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 25071da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2508797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2509797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2510797798c1SRalf Baechle# support. 25111da177e4SLinus Torvalds# 25121da177e4SLinus Torvaldsconfig HIGHMEM 25131da177e4SLinus Torvalds bool "High Memory Support" 2514a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2515797798c1SRalf Baechle 2516797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2517797798c1SRalf Baechle bool 2518797798c1SRalf Baechle 2519797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2520797798c1SRalf Baechle bool 25211da177e4SLinus Torvalds 25229693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 25239693a853SFranck Bui-Huu bool 25249693a853SFranck Bui-Huu 2525a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2526a6a4834cSSteven J. Hill bool 2527a6a4834cSSteven J. Hill 2528377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2529377cb1b6SRalf Baechle bool 2530377cb1b6SRalf Baechle help 2531377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2532377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2533377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2534377cb1b6SRalf Baechle 2535a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2536a5e9a69eSPaul Burton bool 2537a5e9a69eSPaul Burton 2538b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2539b4819b59SYoichi Yuasa def_bool y 2540f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2541b4819b59SYoichi Yuasa 2542d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2543d8cb4e11SRalf Baechle bool 2544d8cb4e11SRalf Baechle default y if SGI_IP27 2545d8cb4e11SRalf Baechle help 25463dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2547d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2548d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2549ad56b738SMike Rapoport See <file:Documentation/vm/numa.rst> for more. 2550d8cb4e11SRalf Baechle 2551b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2552b1c6cd42SAtsushi Nemoto bool 25537de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 255431473747SAtsushi Nemoto 2555d8cb4e11SRalf Baechleconfig NUMA 2556d8cb4e11SRalf Baechle bool "NUMA Support" 2557d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2558d8cb4e11SRalf Baechle help 2559d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2560d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2561d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2562d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2563d8cb4e11SRalf Baechle disabled. 2564d8cb4e11SRalf Baechle 2565d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2566d8cb4e11SRalf Baechle bool 2567d8cb4e11SRalf Baechle 25688c530ea3SMatt Redfearnconfig RELOCATABLE 25698c530ea3SMatt Redfearn bool "Relocatable kernel" 25703ff72be4SSteven J. Hill depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) 25718c530ea3SMatt Redfearn help 25728c530ea3SMatt Redfearn This builds a kernel image that retains relocation information 25738c530ea3SMatt Redfearn so it can be loaded someplace besides the default 1MB. 25748c530ea3SMatt Redfearn The relocations make the kernel binary about 15% larger, 25758c530ea3SMatt Redfearn but are discarded at runtime 25768c530ea3SMatt Redfearn 2577069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE 2578069fd766SMatt Redfearn hex "Relocation table size" 2579069fd766SMatt Redfearn depends on RELOCATABLE 2580069fd766SMatt Redfearn range 0x0 0x01000000 2581069fd766SMatt Redfearn default "0x00100000" 2582069fd766SMatt Redfearn ---help--- 2583069fd766SMatt Redfearn A table of relocation data will be appended to the kernel binary 2584069fd766SMatt Redfearn and parsed at boot to fix up the relocated kernel. 2585069fd766SMatt Redfearn 2586069fd766SMatt Redfearn This option allows the amount of space reserved for the table to be 2587069fd766SMatt Redfearn adjusted, although the default of 1Mb should be ok in most cases. 2588069fd766SMatt Redfearn 2589069fd766SMatt Redfearn The build will fail and a valid size suggested if this is too small. 2590069fd766SMatt Redfearn 2591069fd766SMatt Redfearn If unsure, leave at the default value. 2592069fd766SMatt Redfearn 2593405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE 2594405bc8fdSMatt Redfearn bool "Randomize the address of the kernel image" 2595405bc8fdSMatt Redfearn depends on RELOCATABLE 2596405bc8fdSMatt Redfearn ---help--- 2597405bc8fdSMatt Redfearn Randomizes the physical and virtual address at which the 2598405bc8fdSMatt Redfearn kernel image is loaded, as a security feature that 2599405bc8fdSMatt Redfearn deters exploit attempts relying on knowledge of the location 2600405bc8fdSMatt Redfearn of kernel internals. 2601405bc8fdSMatt Redfearn 2602405bc8fdSMatt Redfearn Entropy is generated using any coprocessor 0 registers available. 2603405bc8fdSMatt Redfearn 2604405bc8fdSMatt Redfearn The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2605405bc8fdSMatt Redfearn 2606405bc8fdSMatt Redfearn If unsure, say N. 2607405bc8fdSMatt Redfearn 2608405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET 2609405bc8fdSMatt Redfearn hex "Maximum kASLR offset" if EXPERT 2610405bc8fdSMatt Redfearn depends on RANDOMIZE_BASE 2611405bc8fdSMatt Redfearn range 0x0 0x40000000 if EVA || 64BIT 2612405bc8fdSMatt Redfearn range 0x0 0x08000000 2613405bc8fdSMatt Redfearn default "0x01000000" 2614405bc8fdSMatt Redfearn ---help--- 2615405bc8fdSMatt Redfearn When kASLR is active, this provides the maximum offset that will 2616405bc8fdSMatt Redfearn be applied to the kernel image. It should be set according to the 2617405bc8fdSMatt Redfearn amount of physical RAM available in the target system minus 2618405bc8fdSMatt Redfearn PHYSICAL_START and must be a power of 2. 2619405bc8fdSMatt Redfearn 2620405bc8fdSMatt Redfearn This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2621405bc8fdSMatt Redfearn EVA or 64-bit. The default is 16Mb. 2622405bc8fdSMatt Redfearn 2623c80d79d7SYasunori Gotoconfig NODES_SHIFT 2624c80d79d7SYasunori Goto int 2625c80d79d7SYasunori Goto default "6" 2626c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2627c80d79d7SYasunori Goto 262814f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 262914f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 263023021b2bSYang Shi depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) 263114f70012SDeng-Cheng Zhu default y 263214f70012SDeng-Cheng Zhu help 263314f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 263414f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 263514f70012SDeng-Cheng Zhu 2636b4819b59SYoichi Yuasasource "mm/Kconfig" 2637b4819b59SYoichi Yuasa 26381da177e4SLinus Torvaldsconfig SMP 26391da177e4SLinus Torvalds bool "Multi-Processing support" 2640e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2641e73ea273SRalf Baechle help 26421da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 26434a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 26444a474157SRobert Graffham than one CPU, say Y. 26451da177e4SLinus Torvalds 26464a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 26471da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 26481da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 26494a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 26501da177e4SLinus Torvalds will run faster if you say N here. 26511da177e4SLinus Torvalds 26521da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 26531da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 26541da177e4SLinus Torvalds 265503502faaSAdrian Bunk See also the SMP-HOWTO available at 265603502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 26571da177e4SLinus Torvalds 26581da177e4SLinus Torvalds If you don't know what to do here, say N. 26591da177e4SLinus Torvalds 26607840d618SMatt Redfearnconfig HOTPLUG_CPU 26617840d618SMatt Redfearn bool "Support for hot-pluggable CPUs" 26627840d618SMatt Redfearn depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 26637840d618SMatt Redfearn help 26647840d618SMatt Redfearn Say Y here to allow turning CPUs off and on. CPUs can be 26657840d618SMatt Redfearn controlled through /sys/devices/system/cpu. 26667840d618SMatt Redfearn (Note: power management support will enable this option 26677840d618SMatt Redfearn automatically on SMP systems. ) 26687840d618SMatt Redfearn Say N if you want to disable CPU hotplug. 26697840d618SMatt Redfearn 267087353d8aSRalf Baechleconfig SMP_UP 267187353d8aSRalf Baechle bool 267287353d8aSRalf Baechle 26734a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 26744a16ff4cSRalf Baechle bool 26754a16ff4cSRalf Baechle 26760ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 26770ee958e1SPaul Burton bool 26780ee958e1SPaul Burton 2679e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2680e73ea273SRalf Baechle bool 2681e73ea273SRalf Baechle 2682130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2683130e2fb7SRalf Baechle bool 2684130e2fb7SRalf Baechle 2685130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2686130e2fb7SRalf Baechle bool 2687130e2fb7SRalf Baechle 2688130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2689130e2fb7SRalf Baechle bool 2690130e2fb7SRalf Baechle 2691130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2692130e2fb7SRalf Baechle bool 2693130e2fb7SRalf Baechle 2694130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2695130e2fb7SRalf Baechle bool 2696130e2fb7SRalf Baechle 26971da177e4SLinus Torvaldsconfig NR_CPUS 2698a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2699a91796a9SJayachandran C range 2 256 27001da177e4SLinus Torvalds depends on SMP 2701130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2702130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2703130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2704130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2705130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 27061da177e4SLinus Torvalds help 27071da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 27081da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 27091da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 271072ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 271172ede9b1SAtsushi Nemoto and 2 for all others. 27121da177e4SLinus Torvalds 27131da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 271472ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 271572ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 271672ede9b1SAtsushi Nemoto power of two. 27171da177e4SLinus Torvalds 2718399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2719399aaa25SAl Cooper bool 2720399aaa25SAl Cooper 27217820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP_1024 27227820b84bSDavid Daney bool 27237820b84bSDavid Daney 27247820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP 27257820b84bSDavid Daney int 27267820b84bSDavid Daney depends on SMP 27277820b84bSDavid Daney default 1024 if MIPS_NR_CPU_NR_MAP_1024 27287820b84bSDavid Daney default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 27297820b84bSDavid Daney 27301723b4a3SAtsushi Nemoto# 27311723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 27321723b4a3SAtsushi Nemoto# 27331723b4a3SAtsushi Nemoto 27341723b4a3SAtsushi Nemotochoice 27351723b4a3SAtsushi Nemoto prompt "Timer frequency" 27361723b4a3SAtsushi Nemoto default HZ_250 27371723b4a3SAtsushi Nemoto help 27381723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 27391723b4a3SAtsushi Nemoto 274067596573SPaul Burton config HZ_24 274167596573SPaul Burton bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 274267596573SPaul Burton 27431723b4a3SAtsushi Nemoto config HZ_48 27440f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 27451723b4a3SAtsushi Nemoto 27461723b4a3SAtsushi Nemoto config HZ_100 27471723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 27481723b4a3SAtsushi Nemoto 27491723b4a3SAtsushi Nemoto config HZ_128 27501723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 27511723b4a3SAtsushi Nemoto 27521723b4a3SAtsushi Nemoto config HZ_250 27531723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 27541723b4a3SAtsushi Nemoto 27551723b4a3SAtsushi Nemoto config HZ_256 27561723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 27571723b4a3SAtsushi Nemoto 27581723b4a3SAtsushi Nemoto config HZ_1000 27591723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 27601723b4a3SAtsushi Nemoto 27611723b4a3SAtsushi Nemoto config HZ_1024 27621723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 27631723b4a3SAtsushi Nemoto 27641723b4a3SAtsushi Nemotoendchoice 27651723b4a3SAtsushi Nemoto 276667596573SPaul Burtonconfig SYS_SUPPORTS_24HZ 276767596573SPaul Burton bool 276867596573SPaul Burton 27691723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 27701723b4a3SAtsushi Nemoto bool 27711723b4a3SAtsushi Nemoto 27721723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 27731723b4a3SAtsushi Nemoto bool 27741723b4a3SAtsushi Nemoto 27751723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 27761723b4a3SAtsushi Nemoto bool 27771723b4a3SAtsushi Nemoto 27781723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 27791723b4a3SAtsushi Nemoto bool 27801723b4a3SAtsushi Nemoto 27811723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 27821723b4a3SAtsushi Nemoto bool 27831723b4a3SAtsushi Nemoto 27841723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 27851723b4a3SAtsushi Nemoto bool 27861723b4a3SAtsushi Nemoto 27871723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 27881723b4a3SAtsushi Nemoto bool 27891723b4a3SAtsushi Nemoto 27901723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 27911723b4a3SAtsushi Nemoto bool 279267596573SPaul Burton default y if !SYS_SUPPORTS_24HZ && \ 279367596573SPaul Burton !SYS_SUPPORTS_48HZ && \ 279467596573SPaul Burton !SYS_SUPPORTS_100HZ && \ 279567596573SPaul Burton !SYS_SUPPORTS_128HZ && \ 279667596573SPaul Burton !SYS_SUPPORTS_250HZ && \ 279767596573SPaul Burton !SYS_SUPPORTS_256HZ && \ 279867596573SPaul Burton !SYS_SUPPORTS_1000HZ && \ 27991723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 28001723b4a3SAtsushi Nemoto 28011723b4a3SAtsushi Nemotoconfig HZ 28021723b4a3SAtsushi Nemoto int 280367596573SPaul Burton default 24 if HZ_24 28041723b4a3SAtsushi Nemoto default 48 if HZ_48 28051723b4a3SAtsushi Nemoto default 100 if HZ_100 28061723b4a3SAtsushi Nemoto default 128 if HZ_128 28071723b4a3SAtsushi Nemoto default 250 if HZ_250 28081723b4a3SAtsushi Nemoto default 256 if HZ_256 28091723b4a3SAtsushi Nemoto default 1000 if HZ_1000 28101723b4a3SAtsushi Nemoto default 1024 if HZ_1024 28111723b4a3SAtsushi Nemoto 281296685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 281396685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 281496685b17SDeng-Cheng Zhu 2815e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 28161da177e4SLinus Torvalds 2817ea6e942bSAtsushi Nemotoconfig KEXEC 28187d60717eSKees Cook bool "Kexec system call" 28192965faa5SDave Young select KEXEC_CORE 2820ea6e942bSAtsushi Nemoto help 2821ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2822ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 28233dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2824ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2825ea6e942bSAtsushi Nemoto 282601dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2827ea6e942bSAtsushi Nemoto 2828ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2829ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2830bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2831bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2832bf220695SGeert Uytterhoeven made. 2833ea6e942bSAtsushi Nemoto 28347aa1c8f4SRalf Baechleconfig CRASH_DUMP 28357aa1c8f4SRalf Baechle bool "Kernel crash dumps" 28367aa1c8f4SRalf Baechle help 28377aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 28387aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 28397aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 28407aa1c8f4SRalf Baechle a specially reserved region and then later executed after 28417aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 28427aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 28437aa1c8f4SRalf Baechle PHYSICAL_START. 28447aa1c8f4SRalf Baechle 28457aa1c8f4SRalf Baechleconfig PHYSICAL_START 28467aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 28478bda3e26SMaciej W. Rozycki default "0xffffffff84000000" 28487aa1c8f4SRalf Baechle depends on CRASH_DUMP 28497aa1c8f4SRalf Baechle help 28507aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 28517aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 28527aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 28537aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 28547aa1c8f4SRalf Baechle passed to the panic-ed kernel). 28557aa1c8f4SRalf Baechle 2856ea6e942bSAtsushi Nemotoconfig SECCOMP 2857ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2858293c5bd1SRalf Baechle depends on PROC_FS 2859ea6e942bSAtsushi Nemoto default y 2860ea6e942bSAtsushi Nemoto help 2861ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2862ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2863ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2864ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2865ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2866ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2867ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2868ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2869ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2870ea6e942bSAtsushi Nemoto 2871ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2872ea6e942bSAtsushi Nemoto 2873597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 28740ce3417eSPaul Burton bool "Support for O32 binaries using 64-bit FP" 2875597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2876597ce172SPaul Burton help 2877597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2878597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2879597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2880597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2881597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2882597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2883597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2884597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2885597ce172SPaul Burton saying N here. 2886597ce172SPaul Burton 288706e2e882SPaul Burton Although binutils currently supports use of this flag the details 288806e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 288906e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 289006e2e882SPaul Burton behaviour before the details have been finalised, this option should 289106e2e882SPaul Burton be considered experimental and only enabled by those working upon 289206e2e882SPaul Burton said details. 289306e2e882SPaul Burton 289406e2e882SPaul Burton If unsure, say N. 2895597ce172SPaul Burton 2896f2ffa5abSDezhong Diaoconfig USE_OF 28970b3e06fdSJonas Gorski bool 2898f2ffa5abSDezhong Diao select OF 2899e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2900abd2363fSGrant Likely select IRQ_DOMAIN 2901f2ffa5abSDezhong Diao 29027fafb068SAndrew Brestickerconfig BUILTIN_DTB 29037fafb068SAndrew Bresticker bool 29047fafb068SAndrew Bresticker 29051da8f179SJonas Gorskichoice 29065b24d52cSJonas Gorski prompt "Kernel appended dtb support" if USE_OF 29071da8f179SJonas Gorski default MIPS_NO_APPENDED_DTB 29081da8f179SJonas Gorski 29091da8f179SJonas Gorski config MIPS_NO_APPENDED_DTB 29101da8f179SJonas Gorski bool "None" 29111da8f179SJonas Gorski help 29121da8f179SJonas Gorski Do not enable appended dtb support. 29131da8f179SJonas Gorski 291487db537dSAaro Koskinen config MIPS_ELF_APPENDED_DTB 291587db537dSAaro Koskinen bool "vmlinux" 291687db537dSAaro Koskinen help 291787db537dSAaro Koskinen With this option, the boot code will look for a device tree binary 291887db537dSAaro Koskinen DTB) included in the vmlinux ELF section .appended_dtb. By default 291987db537dSAaro Koskinen it is empty and the DTB can be appended using binutils command 292087db537dSAaro Koskinen objcopy: 292187db537dSAaro Koskinen 292287db537dSAaro Koskinen objcopy --update-section .appended_dtb=<filename>.dtb vmlinux 292387db537dSAaro Koskinen 292487db537dSAaro Koskinen This is meant as a backward compatiblity convenience for those 292587db537dSAaro Koskinen systems with a bootloader that can't be upgraded to accommodate 292687db537dSAaro Koskinen the documented boot protocol using a device tree. 292787db537dSAaro Koskinen 29281da8f179SJonas Gorski config MIPS_RAW_APPENDED_DTB 2929b8f54f2cSJonas Gorski bool "vmlinux.bin or vmlinuz.bin" 29301da8f179SJonas Gorski help 29311da8f179SJonas Gorski With this option, the boot code will look for a device tree binary 2932b8f54f2cSJonas Gorski DTB) appended to raw vmlinux.bin or vmlinuz.bin. 29331da8f179SJonas Gorski (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 29341da8f179SJonas Gorski 29351da8f179SJonas Gorski This is meant as a backward compatibility convenience for those 29361da8f179SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 29371da8f179SJonas Gorski the documented boot protocol using a device tree. 29381da8f179SJonas Gorski 29391da8f179SJonas Gorski Beware that there is very little in terms of protection against 29401da8f179SJonas Gorski this option being confused by leftover garbage in memory that might 29411da8f179SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 29421da8f179SJonas Gorski to vmlinux.bin. Do not leave this option active in a production kernel 29431da8f179SJonas Gorski if you don't intend to always append a DTB. 29441da8f179SJonas Gorskiendchoice 29451da8f179SJonas Gorski 29462024972eSJonas Gorskichoice 29472024972eSJonas Gorski prompt "Kernel command line type" if !CMDLINE_OVERRIDE 29482bcef9b4SJonas Gorski default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 29493f5f0a44SPaul Burton !MIPS_MALTA && \ 29502bcef9b4SJonas Gorski !CAVIUM_OCTEON_SOC 29512024972eSJonas Gorski default MIPS_CMDLINE_FROM_BOOTLOADER 29522024972eSJonas Gorski 29532024972eSJonas Gorski config MIPS_CMDLINE_FROM_DTB 29542024972eSJonas Gorski depends on USE_OF 29552024972eSJonas Gorski bool "Dtb kernel arguments if available" 29562024972eSJonas Gorski 29572024972eSJonas Gorski config MIPS_CMDLINE_DTB_EXTEND 29582024972eSJonas Gorski depends on USE_OF 29592024972eSJonas Gorski bool "Extend dtb kernel arguments with bootloader arguments" 29602024972eSJonas Gorski 29612024972eSJonas Gorski config MIPS_CMDLINE_FROM_BOOTLOADER 29622024972eSJonas Gorski bool "Bootloader kernel arguments if available" 2963ed47e153SRabin Vincent 2964ed47e153SRabin Vincent config MIPS_CMDLINE_BUILTIN_EXTEND 2965ed47e153SRabin Vincent depends on CMDLINE_BOOL 2966ed47e153SRabin Vincent bool "Extend builtin kernel arguments with bootloader arguments" 29672024972eSJonas Gorskiendchoice 29682024972eSJonas Gorski 29695e83d430SRalf Baechleendmenu 29705e83d430SRalf Baechle 29711df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 29721df0f0ffSAtsushi Nemoto bool 29731df0f0ffSAtsushi Nemoto default y 29741df0f0ffSAtsushi Nemoto 29751df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 29761df0f0ffSAtsushi Nemoto bool 29771df0f0ffSAtsushi Nemoto default y 29781df0f0ffSAtsushi Nemoto 2979e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT 2980e1e16115SAaro Koskinen bool 2981e1e16115SAaro Koskinen default y 2982e1e16115SAaro Koskinen 2983a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 2984a728ab52SKirill A. Shutemov int 29853377e227SAlex Belits default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 2986a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 2987a728ab52SKirill A. Shutemov default 2 2988a728ab52SKirill A. Shutemov 29896c359eb1SPaul Burtonconfig MIPS_AUTO_PFN_OFFSET 29906c359eb1SPaul Burton bool 29916c359eb1SPaul Burton 2992b6c3539bSRalf Baechlesource "init/Kconfig" 2993b6c3539bSRalf Baechle 2994dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2995dc52ddc0SMatt Helsley 29961da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 29971da177e4SLinus Torvalds 29985e83d430SRalf Baechleconfig HW_HAS_EISA 29995e83d430SRalf Baechle bool 30001da177e4SLinus Torvaldsconfig HW_HAS_PCI 30011da177e4SLinus Torvalds bool 30021da177e4SLinus Torvalds 30031da177e4SLinus Torvaldsconfig PCI 30041da177e4SLinus Torvalds bool "Support for PCI controller" 30051da177e4SLinus Torvalds depends on HW_HAS_PCI 3006abb4ae46SRalf Baechle select PCI_DOMAINS 30071da177e4SLinus Torvalds help 30081da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 30091da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 30101da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 30111da177e4SLinus Torvalds say Y, otherwise N. 30121da177e4SLinus Torvalds 30130e476d91SHuacai Chenconfig HT_PCI 30140e476d91SHuacai Chen bool "Support for HT-linked PCI" 30150e476d91SHuacai Chen default y 30160e476d91SHuacai Chen depends on CPU_LOONGSON3 30170e476d91SHuacai Chen select PCI 30180e476d91SHuacai Chen select PCI_DOMAINS 30190e476d91SHuacai Chen help 30200e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 30210e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 30220e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 30230e476d91SHuacai Chen 30241da177e4SLinus Torvaldsconfig PCI_DOMAINS 30251da177e4SLinus Torvalds bool 30261da177e4SLinus Torvalds 302788555b48SPaul Burtonconfig PCI_DOMAINS_GENERIC 302888555b48SPaul Burton bool 302988555b48SPaul Burton 3030c5611df9SPaul Burtonconfig PCI_DRIVERS_GENERIC 303187dd9a4dSPaul Burton select PCI_DOMAINS_GENERIC if PCI_DOMAINS 3032c5611df9SPaul Burton bool 3033c5611df9SPaul Burton 3034c5611df9SPaul Burtonconfig PCI_DRIVERS_LEGACY 3035c5611df9SPaul Burton def_bool !PCI_DRIVERS_GENERIC 3036c5611df9SPaul Burton select NO_GENERIC_PCI_IOPORT_MAP 3037c5611df9SPaul Burton 30381da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 30391da177e4SLinus Torvalds 30401da177e4SLinus Torvalds# 30411da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 30421da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 30431da177e4SLinus Torvalds# users to choose the right thing ... 30441da177e4SLinus Torvalds# 30451da177e4SLinus Torvaldsconfig ISA 30461da177e4SLinus Torvalds bool 30471da177e4SLinus Torvalds 30481da177e4SLinus Torvaldsconfig EISA 30491da177e4SLinus Torvalds bool "EISA support" 30505e83d430SRalf Baechle depends on HW_HAS_EISA 30511da177e4SLinus Torvalds select ISA 3052aa414dffSRalf Baechle select GENERIC_ISA_DMA 30531da177e4SLinus Torvalds ---help--- 30541da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 30551da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 30561da177e4SLinus Torvalds 30571da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 30581da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 30591da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 30601da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 30611da177e4SLinus Torvalds 30621da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 30631da177e4SLinus Torvalds 30641da177e4SLinus Torvalds Otherwise, say N. 30651da177e4SLinus Torvalds 30661da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 30671da177e4SLinus Torvalds 30681da177e4SLinus Torvaldsconfig TC 30691da177e4SLinus Torvalds bool "TURBOchannel support" 30701da177e4SLinus Torvalds depends on MACH_DECSTATION 30711da177e4SLinus Torvalds help 307250a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 307350a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 307450a23e6eSJustin P. Mattock at: 307550a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 307650a23e6eSJustin P. Mattock and: 307750a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 307850a23e6eSJustin P. Mattock Linux driver support status is documented at: 307950a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 30801da177e4SLinus Torvalds 30811da177e4SLinus Torvaldsconfig MMU 30821da177e4SLinus Torvalds bool 30831da177e4SLinus Torvalds default y 30841da177e4SLinus Torvalds 3085109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MIN 3086109c32ffSMatt Redfearn default 12 if 64BIT 3087109c32ffSMatt Redfearn default 8 3088109c32ffSMatt Redfearn 3089109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MAX 3090109c32ffSMatt Redfearn default 18 if 64BIT 3091109c32ffSMatt Redfearn default 15 3092109c32ffSMatt Redfearn 3093109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3094109c32ffSMatt Redfearn default 8 3095109c32ffSMatt Redfearn 3096109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3097109c32ffSMatt Redfearn default 15 3098109c32ffSMatt Redfearn 3099d865bea4SRalf Baechleconfig I8253 3100d865bea4SRalf Baechle bool 3101798778b8SRussell King select CLKSRC_I8253 31022d02612fSThomas Gleixner select CLKEVT_I8253 31039726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 3104d865bea4SRalf Baechle 3105e05eb3f8SRalf Baechleconfig ZONE_DMA 3106e05eb3f8SRalf Baechle bool 3107e05eb3f8SRalf Baechle 3108cce335aeSRalf Baechleconfig ZONE_DMA32 3109cce335aeSRalf Baechle bool 3110cce335aeSRalf Baechle 31111da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 31121da177e4SLinus Torvalds 3113fc5d9888SAlexander Sverdlinconfig HAS_RAPIDIO 3114fc5d9888SAlexander Sverdlin bool 3115fc5d9888SAlexander Sverdlin default n 3116fc5d9888SAlexander Sverdlin 3117388b78adSAlexandre Bounineconfig RAPIDIO 311856abde72SAlexandre Bounine tristate "RapidIO support" 3119fc5d9888SAlexander Sverdlin depends on HAS_RAPIDIO || PCI 3120388b78adSAlexandre Bounine help 3121388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 3122388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 3123388b78adSAlexandre Bounine 3124388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 3125388b78adSAlexandre Bounine 31261da177e4SLinus Torvaldsendmenu 31271da177e4SLinus Torvalds 31281da177e4SLinus Torvaldsmenu "Executable file formats" 31291da177e4SLinus Torvalds 31301da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 31311da177e4SLinus Torvalds 31321da177e4SLinus Torvaldsconfig TRAD_SIGNALS 31331da177e4SLinus Torvalds bool 31341da177e4SLinus Torvalds 31351da177e4SLinus Torvaldsconfig MIPS32_COMPAT 313678aaf956SRalf Baechle bool 31371da177e4SLinus Torvalds 31381da177e4SLinus Torvaldsconfig COMPAT 31391da177e4SLinus Torvalds bool 31401da177e4SLinus Torvalds 314105e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 314205e43966SAtsushi Nemoto bool 314305e43966SAtsushi Nemoto 31441da177e4SLinus Torvaldsconfig MIPS32_O32 31451da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 314678aaf956SRalf Baechle depends on 64BIT 314778aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 314878aaf956SRalf Baechle select COMPAT 314978aaf956SRalf Baechle select MIPS32_COMPAT 315078aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31511da177e4SLinus Torvalds help 31521da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 31531da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 31541da177e4SLinus Torvalds existing binaries are in this format. 31551da177e4SLinus Torvalds 31561da177e4SLinus Torvalds If unsure, say Y. 31571da177e4SLinus Torvalds 31581da177e4SLinus Torvaldsconfig MIPS32_N32 31591da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 3160c22eacfeSRalf Baechle depends on 64BIT 316178aaf956SRalf Baechle select COMPAT 316278aaf956SRalf Baechle select MIPS32_COMPAT 316378aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31641da177e4SLinus Torvalds help 31651da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 31661da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 31671da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 31681da177e4SLinus Torvalds cases. 31691da177e4SLinus Torvalds 31701da177e4SLinus Torvalds If unsure, say N. 31711da177e4SLinus Torvalds 31721da177e4SLinus Torvaldsconfig BINFMT_ELF32 31731da177e4SLinus Torvalds bool 31741da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 3175f43edca7SRalf Baechle select ELFCORE 31761da177e4SLinus Torvalds 31772116245eSRalf Baechleendmenu 31781da177e4SLinus Torvalds 31792116245eSRalf Baechlemenu "Power management options" 3180952fa954SRodolfo Giometti 3181363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 3182363c55caSWu Zhangjin def_bool y 31833f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3184363c55caSWu Zhangjin 3185f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 3186f4cb5700SJohannes Berg def_bool y 31873f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3188f4cb5700SJohannes Berg 31892116245eSRalf Baechlesource "kernel/power/Kconfig" 3190952fa954SRodolfo Giometti 31911da177e4SLinus Torvaldsendmenu 31921da177e4SLinus Torvalds 31937a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 31947a998935SViresh Kumar bool 31957a998935SViresh Kumar 31967a998935SViresh Kumarmenu "CPU Power Management" 3197c095ebafSPaul Burton 3198c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 31997a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 32007a998935SViresh Kumarendif 32019726b43aSWu Zhangjin 3202c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 3203c095ebafSPaul Burton 3204c095ebafSPaul Burtonendmenu 3205c095ebafSPaul Burton 3206d5950b43SSam Ravnborgsource "net/Kconfig" 3207d5950b43SSam Ravnborg 32081da177e4SLinus Torvaldssource "drivers/Kconfig" 32091da177e4SLinus Torvalds 321098cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 321198cdee0eSRalf Baechle 32121da177e4SLinus Torvaldssource "fs/Kconfig" 32131da177e4SLinus Torvalds 32141da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 32151da177e4SLinus Torvalds 32161da177e4SLinus Torvaldssource "security/Kconfig" 32171da177e4SLinus Torvalds 32181da177e4SLinus Torvaldssource "crypto/Kconfig" 32191da177e4SLinus Torvalds 32201da177e4SLinus Torvaldssource "lib/Kconfig" 32212235a54dSSanjay Lal 32222235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 3223