11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 5393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 6c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 7f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 8ec7748b5SSam Ravnborg select HAVE_IDE 942d4b839SMathieu Desnoyers select HAVE_OPROFILE 107f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 117f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1288547001SJason Wessel select HAVE_ARCH_KGDB 13490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 14c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 153f5fdb4bSMarkos Chandras select HAVE_BPF_JIT if !CPU_MICROMIPS 167563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 17d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 18538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 19538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2064575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2129c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 22c1bf207dSDavid Daney select HAVE_KPROBES 23c1bf207dSDavid Daney select HAVE_KRETPROBES 24fb59e394SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 25b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 261d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 272b68f6caSKees Cook select ARCH_HAS_ELF_RANDOMIZE 28383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 2921a41faaSWu Zhangjin select RTC_LIB if !MACH_LOONGSON 302b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 317463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3248e1fd5aSDavid Daney select HAVE_DMA_ATTRS 33f4649382SZubair Lutfullah Kakakhel select HAVE_DMA_CONTIGUOUS 3448e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 353bd27e32SDavid Daney select GENERIC_IRQ_PROBE 36f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3778857614SMarkos Chandras select GENERIC_PCI_IOMAP 3894bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 39c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 400f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 419d15ffc8STejun Heo select HAVE_MEMBLOCK 429d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 439d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 44360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 454b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 46cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 47929de4ccSDeng-Cheng Zhu select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 48cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 49786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 504febd95aSStephen Rothwell select VIRT_TO_BUS 512f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 522f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5350150d2bSAl Viro select CLONE_BACKWARDS 54d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5519952a92SKees Cook select HAVE_CC_STACKPROTECTOR 56b1d4c6caSJames Hogan select CPU_PM if CPU_IDLE 57cc7964afSPaul Burton select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 5890cee759SPaul Burton select ARCH_BINFMT_ELF_STATE 59d79d853dSMarkos Chandras select SYSCTL_EXCEPTION_TRACE 60bb877e96SDeng-Cheng Zhu select HAVE_VIRT_CPU_ACCOUNTING_GEN 61ec9ddad3SDeng-Cheng Zhu select HAVE_IRQ_TIME_ACCOUNTING 621da177e4SLinus Torvalds 631da177e4SLinus Torvaldsmenu "Machine selection" 641da177e4SLinus Torvalds 655e83d430SRalf Baechlechoice 665e83d430SRalf Baechle prompt "System type" 675e83d430SRalf Baechle default SGI_IP22 681da177e4SLinus Torvalds 6942a4f17dSManuel Laussconfig MIPS_ALCHEMY 70c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 7134adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 72f772cdb2SRalf Baechle select CEVT_R4K 73d7ea335cSSteven J. Hill select CSRC_R4K 7467e38cf2SRalf Baechle select IRQ_MIPS_CPU 7588e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 7642a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 7742a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 7842a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 79efb12436SAlexandre Courbot select ARCH_REQUIRE_GPIOLIB 801b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 8147440229SManuel Lauss select COMMON_CLK 821da177e4SLinus Torvalds 837ca5dc14SFlorian Fainelliconfig AR7 847ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 857ca5dc14SFlorian Fainelli select BOOT_ELF32 867ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 877ca5dc14SFlorian Fainelli select CEVT_R4K 887ca5dc14SFlorian Fainelli select CSRC_R4K 8967e38cf2SRalf Baechle select IRQ_MIPS_CPU 907ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 917ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 927ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 937ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 947ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 957ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 96377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 971b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 985f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 997ca5dc14SFlorian Fainelli select VLYNQ 1008551fb64SYoichi Yuasa select HAVE_CLK 1017ca5dc14SFlorian Fainelli help 1027ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1037ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1047ca5dc14SFlorian Fainelli 10543cc739fSSergey Ryazanovconfig ATH25 10643cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 10743cc739fSSergey Ryazanov select CEVT_R4K 10843cc739fSSergey Ryazanov select CSRC_R4K 10943cc739fSSergey Ryazanov select DMA_NONCOHERENT 11067e38cf2SRalf Baechle select IRQ_MIPS_CPU 1111753e74eSSergey Ryazanov select IRQ_DOMAIN 11243cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 11343cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 11443cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1158aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 11643cc739fSSergey Ryazanov help 11743cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 11843cc739fSSergey Ryazanov 119d4a67d9dSGabor Juhosconfig ATH79 120d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 1216eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 122d4a67d9dSGabor Juhos select BOOT_RAW 123d4a67d9dSGabor Juhos select CEVT_R4K 124d4a67d9dSGabor Juhos select CSRC_R4K 125d4a67d9dSGabor Juhos select DMA_NONCOHERENT 12694638067SGabor Juhos select HAVE_CLK 1272c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 12867e38cf2SRalf Baechle select IRQ_MIPS_CPU 1290aabf1a4SGabor Juhos select MIPS_MACHINE 130d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 131d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 132d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 133d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 134377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 135d4a67d9dSGabor Juhos help 136d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 137d4a67d9dSGabor Juhos 1385f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 1395f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 140d666cd02SKevin Cernekee select BOOT_RAW 141d666cd02SKevin Cernekee select NO_EXCEPT_FILL 142d666cd02SKevin Cernekee select USE_OF 143d666cd02SKevin Cernekee select CEVT_R4K 144d666cd02SKevin Cernekee select CSRC_R4K 145d666cd02SKevin Cernekee select SYNC_R4K 146d666cd02SKevin Cernekee select COMMON_CLK 14760b858f2SKevin Cernekee select BCM7038_L1_IRQ 14860b858f2SKevin Cernekee select BCM7120_L2_IRQ 14960b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 15067e38cf2SRalf Baechle select IRQ_MIPS_CPU 15160b858f2SKevin Cernekee select RAW_IRQ_ACCESSORS 15260b858f2SKevin Cernekee select DMA_NONCOHERENT 153d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 15460b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 155d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 156d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 15760b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 15860b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 15960b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 160d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 161d666cd02SKevin Cernekee select SWAP_IO_SPACE 16260b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 16360b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 16460b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 16560b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 166d666cd02SKevin Cernekee help 1675f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 1685f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 1695f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 1705f2d4459SKevin Cernekee must be set appropriately for your board. 171d666cd02SKevin Cernekee 1721c0c13ebSAurelien Jarnoconfig BCM47XX 173c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 1742da4c74dSHauke Mehrtens select ARCH_WANT_OPTIONAL_GPIOLIB 175fe08f8c2SHauke Mehrtens select BOOT_RAW 17642f77542SRalf Baechle select CEVT_R4K 177940f6b48SRalf Baechle select CSRC_R4K 1781c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1791c0c13ebSAurelien Jarno select HW_HAS_PCI 18067e38cf2SRalf Baechle select IRQ_MIPS_CPU 181314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 182dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1831c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1841c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 185377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 18625e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 187e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 188c949c0bcSRafał Miłecki select GPIOLIB 189c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 1901c0c13ebSAurelien Jarno help 1911c0c13ebSAurelien Jarno Support for BCM47XX based boards 1921c0c13ebSAurelien Jarno 193e7300d04SMaxime Bizonconfig BCM63XX 194e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 195ae8de61cSFlorian Fainelli select BOOT_RAW 196e7300d04SMaxime Bizon select CEVT_R4K 197e7300d04SMaxime Bizon select CSRC_R4K 198fc264022SJonas Gorski select SYNC_R4K 199e7300d04SMaxime Bizon select DMA_NONCOHERENT 20067e38cf2SRalf Baechle select IRQ_MIPS_CPU 201e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 202e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 203e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 204e7300d04SMaxime Bizon select SWAP_IO_SPACE 205e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 2063e82eeebSYoichi Yuasa select HAVE_CLK 207af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 208e7300d04SMaxime Bizon help 209e7300d04SMaxime Bizon Support for BCM63XX based boards 210e7300d04SMaxime Bizon 2111da177e4SLinus Torvaldsconfig MIPS_COBALT 2123fa986faSMartin Michlmayr bool "Cobalt Server" 21342f77542SRalf Baechle select CEVT_R4K 214940f6b48SRalf Baechle select CSRC_R4K 2151097c6acSYoichi Yuasa select CEVT_GT641XX 2161da177e4SLinus Torvalds select DMA_NONCOHERENT 2171da177e4SLinus Torvalds select HW_HAS_PCI 218d865bea4SRalf Baechle select I8253 2191da177e4SLinus Torvalds select I8259 22067e38cf2SRalf Baechle select IRQ_MIPS_CPU 221d5ab1a69SYoichi Yuasa select IRQ_GT641XX 222252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 223e25bfc92SYoichi Yuasa select PCI 2247cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 2250a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 226ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2270e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 2285e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 229e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 2301da177e4SLinus Torvalds 2311da177e4SLinus Torvaldsconfig MACH_DECSTATION 2323fa986faSMartin Michlmayr bool "DECstations" 2331da177e4SLinus Torvalds select BOOT_ELF32 2346457d9fcSYoichi Yuasa select CEVT_DS1287 23581d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 2364247417dSYoichi Yuasa select CSRC_IOASIC 23781d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 23820d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 23920d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 24020d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 2411da177e4SLinus Torvalds select DMA_NONCOHERENT 242ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 24367e38cf2SRalf Baechle select IRQ_MIPS_CPU 2447cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 2457cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 246ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2477d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2485e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 2491723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 2501723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 2511723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 252930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 2535e83d430SRalf Baechle help 2541da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 2551da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 2561da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 2571da177e4SLinus Torvalds 2581da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 2591da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 2601da177e4SLinus Torvalds 2611da177e4SLinus Torvalds DECstation 5000/50 2621da177e4SLinus Torvalds DECstation 5000/150 2631da177e4SLinus Torvalds DECstation 5000/260 2641da177e4SLinus Torvalds DECsystem 5900/260 2651da177e4SLinus Torvalds 2661da177e4SLinus Torvalds otherwise choose R3000. 2671da177e4SLinus Torvalds 2685e83d430SRalf Baechleconfig MACH_JAZZ 2693fa986faSMartin Michlmayr bool "Jazz family of machines" 2700e2794b0SRalf Baechle select FW_ARC 2710e2794b0SRalf Baechle select FW_ARC32 2725e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 27342f77542SRalf Baechle select CEVT_R4K 274940f6b48SRalf Baechle select CSRC_R4K 275e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2765e83d430SRalf Baechle select GENERIC_ISA_DMA 2778a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 27867e38cf2SRalf Baechle select IRQ_MIPS_CPU 279d865bea4SRalf Baechle select I8253 2805e83d430SRalf Baechle select I8259 2815e83d430SRalf Baechle select ISA 2827cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2835e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2847d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2851723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2861da177e4SLinus Torvalds help 2875e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2885e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 289692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2905e83d430SRalf Baechle Olivetti M700-10 workstations. 2915e83d430SRalf Baechle 292de361e8bSPaul Burtonconfig MACH_INGENIC 293de361e8bSPaul Burton bool "Ingenic SoC based machines" 2945ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2955ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 296f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 2975ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 29867e38cf2SRalf Baechle select IRQ_MIPS_CPU 2995ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 300ff1930c6SPaul Burton select COMMON_CLK 30183bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 302ffb1843dSPaul Burton select BUILTIN_DTB 303ffb1843dSPaul Burton select USE_OF 3046ec127fbSPaul Burton select LIBFDT 3055ebabe59SLars-Peter Clausen 306171bb2f1SJohn Crispinconfig LANTIQ 307171bb2f1SJohn Crispin bool "Lantiq based platforms" 308171bb2f1SJohn Crispin select DMA_NONCOHERENT 30967e38cf2SRalf Baechle select IRQ_MIPS_CPU 310171bb2f1SJohn Crispin select CEVT_R4K 311171bb2f1SJohn Crispin select CSRC_R4K 312171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 313171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 314171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 315171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 316377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 317171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 318171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 319171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 320171bb2f1SJohn Crispin select SWAP_IO_SPACE 321171bb2f1SJohn Crispin select BOOT_RAW 322287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 323287e3f3fSJohn Crispin select CLKDEV_LOOKUP 324a0392222SJohn Crispin select USE_OF 3253f8c50c9SJohn Crispin select PINCTRL 3263f8c50c9SJohn Crispin select PINCTRL_LANTIQ 327c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 328c530781cSJohn Crispin select RESET_CONTROLLER 329171bb2f1SJohn Crispin 3301f21d2bdSBrian Murphyconfig LASAT 3311f21d2bdSBrian Murphy bool "LASAT Networks platforms" 33242f77542SRalf Baechle select CEVT_R4K 33316f0bbbcSRalf Baechle select CRC32 334940f6b48SRalf Baechle select CSRC_R4K 3351f21d2bdSBrian Murphy select DMA_NONCOHERENT 3361f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 3371f21d2bdSBrian Murphy select HW_HAS_PCI 33867e38cf2SRalf Baechle select IRQ_MIPS_CPU 3391f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 3401f21d2bdSBrian Murphy select MIPS_NILE4 3411f21d2bdSBrian Murphy select R5000_CPU_SCACHE 3421f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 3431f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 3441f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 3451f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 3461f21d2bdSBrian Murphy 34785749d24SWu Zhangjinconfig MACH_LOONGSON 34885749d24SWu Zhangjin bool "Loongson family of machines" 349c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 350ade299d8SYoichi Yuasa help 35185749d24SWu Zhangjin This enables the support of Loongson family of machines. 35285749d24SWu Zhangjin 35385749d24SWu Zhangjin Loongson is a family of general-purpose MIPS-compatible CPUs. 35485749d24SWu Zhangjin developed at Institute of Computing Technology (ICT), 35585749d24SWu Zhangjin Chinese Academy of Sciences (CAS) in the People's Republic 35685749d24SWu Zhangjin of China. The chief architect is Professor Weiwu Hu. 357ade299d8SYoichi Yuasa 358ca585cf9SKelvin Cheungconfig MACH_LOONGSON1 359ca585cf9SKelvin Cheung bool "Loongson 1 family of machines" 360ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 361ca585cf9SKelvin Cheung help 362ca585cf9SKelvin Cheung This enables support for the Loongson 1 based machines. 363ca585cf9SKelvin Cheung 364ca585cf9SKelvin Cheung Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by 365ca585cf9SKelvin Cheung the ICT (Institute of Computing Technology) and the Chinese Academy 366ca585cf9SKelvin Cheung of Sciences. 367ca585cf9SKelvin Cheung 3686a438309SAndrew Brestickerconfig MACH_PISTACHIO 3696a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 3706a438309SAndrew Bresticker select ARCH_REQUIRE_GPIOLIB 3716a438309SAndrew Bresticker select BOOT_ELF32 3726a438309SAndrew Bresticker select BOOT_RAW 3736a438309SAndrew Bresticker select CEVT_R4K 3746a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 3756a438309SAndrew Bresticker select COMMON_CLK 3766a438309SAndrew Bresticker select CSRC_R4K 3776a438309SAndrew Bresticker select DMA_MAYBE_COHERENT 37867e38cf2SRalf Baechle select IRQ_MIPS_CPU 3796a438309SAndrew Bresticker select LIBFDT 3806a438309SAndrew Bresticker select MFD_SYSCON 3816a438309SAndrew Bresticker select MIPS_CPU_SCACHE 3826a438309SAndrew Bresticker select MIPS_GIC 3836a438309SAndrew Bresticker select PINCTRL 3846a438309SAndrew Bresticker select REGULATOR 3856a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 3866a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 3876a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 3886a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 3896a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 3906a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 391*018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 392*018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 3936a438309SAndrew Bresticker select USE_OF 3946a438309SAndrew Bresticker help 3956a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 3966a438309SAndrew Bresticker 3971da177e4SLinus Torvaldsconfig MIPS_MALTA 3983fa986faSMartin Michlmayr bool "MIPS Malta board" 39961ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 4001da177e4SLinus Torvalds select BOOT_ELF32 401fa71c960SRalf Baechle select BOOT_RAW 40242f77542SRalf Baechle select CEVT_R4K 403940f6b48SRalf Baechle select CSRC_R4K 404fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 405885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 4061da177e4SLinus Torvalds select GENERIC_ISA_DMA 4078a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 40867e38cf2SRalf Baechle select IRQ_MIPS_CPU 4098a19b8f1SAndrew Bresticker select MIPS_GIC 4101da177e4SLinus Torvalds select HW_HAS_PCI 411d865bea4SRalf Baechle select I8253 4121da177e4SLinus Torvalds select I8259 4135e83d430SRalf Baechle select MIPS_BONITO64 4149318c51aSChris Dearman select MIPS_CPU_SCACHE 415a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 416252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 4175e83d430SRalf Baechle select MIPS_MSC 4181da177e4SLinus Torvalds select SWAP_IO_SPACE 4197cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 4207cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 421bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 422c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 423575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 4247cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 4255d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 426575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 4277cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 4287cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 429ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 430ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4315e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 432c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 4335e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 434424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 4350365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 436e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 437377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 438f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 4399693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 4401b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 4411da177e4SLinus Torvalds help 442f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 4431da177e4SLinus Torvalds board. 4441da177e4SLinus Torvalds 445ec47b274SSteven J. Hillconfig MIPS_SEAD3 446ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 447ec47b274SSteven J. Hill select BOOT_ELF32 448ec47b274SSteven J. Hill select BOOT_RAW 449f262b5f2SAndrew Bresticker select BUILTIN_DTB 450ec47b274SSteven J. Hill select CEVT_R4K 451ec47b274SSteven J. Hill select CSRC_R4K 452fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 453ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 454ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 455ec47b274SSteven J. Hill select DMA_NONCOHERENT 45667e38cf2SRalf Baechle select IRQ_MIPS_CPU 4578a19b8f1SAndrew Bresticker select MIPS_GIC 45844327236SQais Yousef select LIBFDT 459ec47b274SSteven J. Hill select MIPS_MSC 460ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 461ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 462ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 463ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 464ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 465ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 466ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 467ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 468ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 469a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 470377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 471ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 472ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 4739b731009SSteven J. Hill select USE_OF 474ec47b274SSteven J. Hill help 475ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 476ec47b274SSteven J. Hill board. 477ec47b274SSteven J. Hill 478a83860c2SRalf Baechleconfig NEC_MARKEINS 479a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 480a83860c2SRalf Baechle select SOC_EMMA2RH 481a83860c2SRalf Baechle select HW_HAS_PCI 482a83860c2SRalf Baechle help 483a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 484ade299d8SYoichi Yuasa 4855e83d430SRalf Baechleconfig MACH_VR41XX 48674142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 48742f77542SRalf Baechle select CEVT_R4K 488940f6b48SRalf Baechle select CSRC_R4K 4897cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 490377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 49127fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 4925e83d430SRalf Baechle 493edb6310aSDaniel Lairdconfig NXP_STB220 494edb6310aSDaniel Laird bool "NXP STB220 board" 495edb6310aSDaniel Laird select SOC_PNX833X 496edb6310aSDaniel Laird help 497edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 498edb6310aSDaniel Laird 499edb6310aSDaniel Lairdconfig NXP_STB225 500edb6310aSDaniel Laird bool "NXP 225 board" 501edb6310aSDaniel Laird select SOC_PNX833X 502edb6310aSDaniel Laird select SOC_PNX8335 503edb6310aSDaniel Laird help 504edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 505edb6310aSDaniel Laird 5069267a30dSMarc St-Jeanconfig PMC_MSP 5079267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 50839d30c13SAnoop P A select CEVT_R4K 50939d30c13SAnoop P A select CSRC_R4K 5109267a30dSMarc St-Jean select DMA_NONCOHERENT 5119267a30dSMarc St-Jean select SWAP_IO_SPACE 5129267a30dSMarc St-Jean select NO_EXCEPT_FILL 5139267a30dSMarc St-Jean select BOOT_RAW 5149267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 5159267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 5169267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 5179267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 518377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 51967e38cf2SRalf Baechle select IRQ_MIPS_CPU 5209267a30dSMarc St-Jean select SERIAL_8250 5219267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 5229296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 5239296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 5249267a30dSMarc St-Jean help 5259267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 5269267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 5279267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 5289267a30dSMarc St-Jean a variety of MIPS cores. 5299267a30dSMarc St-Jean 530ae2b5bb6SJohn Crispinconfig RALINK 531ae2b5bb6SJohn Crispin bool "Ralink based machines" 532ae2b5bb6SJohn Crispin select CEVT_R4K 533ae2b5bb6SJohn Crispin select CSRC_R4K 534ae2b5bb6SJohn Crispin select BOOT_RAW 535ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 53667e38cf2SRalf Baechle select IRQ_MIPS_CPU 537ae2b5bb6SJohn Crispin select USE_OF 538ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 539ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 540ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 541ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 542377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 543ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 544ae2b5bb6SJohn Crispin select HAVE_MACH_CLKDEV 545ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 5462a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 5472a153f1cSJohn Crispin select RESET_CONTROLLER 548ae2b5bb6SJohn Crispin 5491da177e4SLinus Torvaldsconfig SGI_IP22 5503fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 5510e2794b0SRalf Baechle select FW_ARC 5520e2794b0SRalf Baechle select FW_ARC32 5531da177e4SLinus Torvalds select BOOT_ELF32 55442f77542SRalf Baechle select CEVT_R4K 555940f6b48SRalf Baechle select CSRC_R4K 556e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 5571da177e4SLinus Torvalds select DMA_NONCOHERENT 5585e83d430SRalf Baechle select HW_HAS_EISA 559d865bea4SRalf Baechle select I8253 56068de4803SThomas Bogendoerfer select I8259 5611da177e4SLinus Torvalds select IP22_CPU_SCACHE 56267e38cf2SRalf Baechle select IRQ_MIPS_CPU 563aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 564e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 565e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 56636e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 567e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 568e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 569e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 5701da177e4SLinus Torvalds select SWAP_IO_SPACE 5717cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 5727cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5732b5e63f6SMartin Michlmayr # 5742b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5752b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5762b5e63f6SMartin Michlmayr # 5772b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5782b5e63f6SMartin Michlmayr # for a more details discussion 5792b5e63f6SMartin Michlmayr # 5802b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 581ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 582ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5835e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 584930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 5851da177e4SLinus Torvalds help 5861da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 5871da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 5881da177e4SLinus Torvalds that runs on these, say Y here. 5891da177e4SLinus Torvalds 5901da177e4SLinus Torvaldsconfig SGI_IP27 5913fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 5920e2794b0SRalf Baechle select FW_ARC 5930e2794b0SRalf Baechle select FW_ARC64 5945e83d430SRalf Baechle select BOOT_ELF64 595e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 596634286f1SRalf Baechle select DMA_COHERENT 59736a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 5981da177e4SLinus Torvalds select HW_HAS_PCI 599130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 6007cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 601ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6025e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 603d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 6041a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 605930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6061da177e4SLinus Torvalds help 6071da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 6081da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 6091da177e4SLinus Torvalds here. 6101da177e4SLinus Torvalds 611e2defae5SThomas Bogendoerferconfig SGI_IP28 6127d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 6130e2794b0SRalf Baechle select FW_ARC 6140e2794b0SRalf Baechle select FW_ARC64 615e2defae5SThomas Bogendoerfer select BOOT_ELF64 616e2defae5SThomas Bogendoerfer select CEVT_R4K 617e2defae5SThomas Bogendoerfer select CSRC_R4K 618e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 619e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 620e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 62167e38cf2SRalf Baechle select IRQ_MIPS_CPU 622e2defae5SThomas Bogendoerfer select HW_HAS_EISA 623e2defae5SThomas Bogendoerfer select I8253 624e2defae5SThomas Bogendoerfer select I8259 625e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 626e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 6275b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 628e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 629e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 630e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 631e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 632e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 6332b5e63f6SMartin Michlmayr # 6342b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6352b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6362b5e63f6SMartin Michlmayr # 6372b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6382b5e63f6SMartin Michlmayr # for a more details discussion 6392b5e63f6SMartin Michlmayr # 6402b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 641e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 642e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 643dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 644e2defae5SThomas Bogendoerfer help 645e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 646e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 647e2defae5SThomas Bogendoerfer 6481da177e4SLinus Torvaldsconfig SGI_IP32 649cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 6500e2794b0SRalf Baechle select FW_ARC 6510e2794b0SRalf Baechle select FW_ARC32 6521da177e4SLinus Torvalds select BOOT_ELF32 65342f77542SRalf Baechle select CEVT_R4K 654940f6b48SRalf Baechle select CSRC_R4K 6551da177e4SLinus Torvalds select DMA_NONCOHERENT 6561da177e4SLinus Torvalds select HW_HAS_PCI 65767e38cf2SRalf Baechle select IRQ_MIPS_CPU 6581da177e4SLinus Torvalds select R5000_CPU_SCACHE 6591da177e4SLinus Torvalds select RM7000_CPU_SCACHE 6607cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6617cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 6627cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 663dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 664ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6655e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6661da177e4SLinus Torvalds help 6671da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 6681da177e4SLinus Torvalds 669ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 670ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 6715e83d430SRalf Baechle select BOOT_ELF32 6725e83d430SRalf Baechle select DMA_COHERENT 6735e83d430SRalf Baechle select SIBYTE_BCM1120 6745e83d430SRalf Baechle select SWAP_IO_SPACE 6757cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6765e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6775e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6785e83d430SRalf Baechle 679ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 680ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 6815e83d430SRalf Baechle select BOOT_ELF32 6825e83d430SRalf Baechle select DMA_COHERENT 6835e83d430SRalf Baechle select SIBYTE_BCM1120 6845e83d430SRalf Baechle select SWAP_IO_SPACE 6857cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6865e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6875e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6885e83d430SRalf Baechle 6895e83d430SRalf Baechleconfig SIBYTE_CRHONE 6903fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 6915e83d430SRalf Baechle select BOOT_ELF32 6925e83d430SRalf Baechle select DMA_COHERENT 6935e83d430SRalf Baechle select SIBYTE_BCM1125 6945e83d430SRalf Baechle select SWAP_IO_SPACE 6957cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6965e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6975e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 6985e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6995e83d430SRalf Baechle 700ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 701ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 702ade299d8SYoichi Yuasa select BOOT_ELF32 703ade299d8SYoichi Yuasa select DMA_COHERENT 704ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 705ade299d8SYoichi Yuasa select SWAP_IO_SPACE 706ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 707ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 708ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 709ade299d8SYoichi Yuasa 710ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 711ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 712ade299d8SYoichi Yuasa select BOOT_ELF32 713ade299d8SYoichi Yuasa select DMA_COHERENT 714fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 715ade299d8SYoichi Yuasa select SIBYTE_SB1250 716ade299d8SYoichi Yuasa select SWAP_IO_SPACE 717ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 718ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 719ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 720ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 721cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 722ade299d8SYoichi Yuasa 723ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 724ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 725ade299d8SYoichi Yuasa select BOOT_ELF32 726ade299d8SYoichi Yuasa select DMA_COHERENT 727fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 728ade299d8SYoichi Yuasa select SIBYTE_SB1250 729ade299d8SYoichi Yuasa select SWAP_IO_SPACE 730ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 731ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 732ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 733ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 734ade299d8SYoichi Yuasa 735ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 736ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 737ade299d8SYoichi Yuasa select BOOT_ELF32 738ade299d8SYoichi Yuasa select DMA_COHERENT 739ade299d8SYoichi Yuasa select SIBYTE_SB1250 740ade299d8SYoichi Yuasa select SWAP_IO_SPACE 741ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 742ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 743ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 744ade299d8SYoichi Yuasa 745ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 746ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 747ade299d8SYoichi Yuasa select BOOT_ELF32 748ade299d8SYoichi Yuasa select DMA_COHERENT 749ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 750ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 751ade299d8SYoichi Yuasa select SWAP_IO_SPACE 752ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 753ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 754651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 755ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 756cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 757ade299d8SYoichi Yuasa 75814b36af4SThomas Bogendoerferconfig SNI_RM 75914b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 7600e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 7610e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 762aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 7635e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 7645e83d430SRalf Baechle select BOOT_ELF32 76542f77542SRalf Baechle select CEVT_R4K 766940f6b48SRalf Baechle select CSRC_R4K 767e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 7685e83d430SRalf Baechle select DMA_NONCOHERENT 7695e83d430SRalf Baechle select GENERIC_ISA_DMA 7708a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 7715e83d430SRalf Baechle select HW_HAS_EISA 7725e83d430SRalf Baechle select HW_HAS_PCI 77367e38cf2SRalf Baechle select IRQ_MIPS_CPU 774d865bea4SRalf Baechle select I8253 7755e83d430SRalf Baechle select I8259 7765e83d430SRalf Baechle select ISA 7774a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 7787cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 7794a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 780c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 7814a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 78236a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 783ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 7847d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 7854a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 7865e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7875e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7881da177e4SLinus Torvalds help 78914b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 79014b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 7915e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 7925e83d430SRalf Baechle support this machine type. 7931da177e4SLinus Torvalds 794edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 795edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 7965e83d430SRalf Baechle 797edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 798edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 79923fbee9dSRalf Baechle 80073b4390fSRalf Baechleconfig MIKROTIK_RB532 80173b4390fSRalf Baechle bool "Mikrotik RB532 boards" 80273b4390fSRalf Baechle select CEVT_R4K 80373b4390fSRalf Baechle select CSRC_R4K 80473b4390fSRalf Baechle select DMA_NONCOHERENT 80573b4390fSRalf Baechle select HW_HAS_PCI 80667e38cf2SRalf Baechle select IRQ_MIPS_CPU 80773b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 80873b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 80973b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 81073b4390fSRalf Baechle select SWAP_IO_SPACE 81173b4390fSRalf Baechle select BOOT_RAW 812d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 813930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 81473b4390fSRalf Baechle help 81573b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 81673b4390fSRalf Baechle based on the IDT RC32434 SoC. 81773b4390fSRalf Baechle 8189ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 8199ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 820a86c7f72SDavid Daney select CEVT_R4K 82134adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 822a86c7f72SDavid Daney select DMA_COHERENT 823a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 824a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 825f65aad41SRalf Baechle select EDAC_SUPPORT 82673569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 82773569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 828a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 8295e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 830a86c7f72SDavid Daney select SWAP_IO_SPACE 831e8635b48SDavid Daney select HW_HAS_PCI 832f00e001eSDavid Daney select ZONE_DMA32 833465aaed0SDavid Daney select HOLES_IN_ZONE 83499cab4bbSDavid Daney select ARCH_REQUIRE_GPIOLIB 8356e511163SDavid Daney select LIBFDT 8366e511163SDavid Daney select USE_OF 8376e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 8386e511163SDavid Daney select SYS_SUPPORTS_SMP 8396e511163SDavid Daney select NR_CPUS_DEFAULT_16 840e326479fSAndrew Bresticker select BUILTIN_DTB 8418c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 842a86c7f72SDavid Daney help 843a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 844a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 845a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 846a86c7f72SDavid Daney Some of the supported boards are: 847a86c7f72SDavid Daney EBT3000 848a86c7f72SDavid Daney EBH3000 849a86c7f72SDavid Daney EBH3100 850a86c7f72SDavid Daney Thunder 851a86c7f72SDavid Daney Kodama 852a86c7f72SDavid Daney Hikari 853a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 854a86c7f72SDavid Daney 8557f058e85SJayachandran Cconfig NLM_XLR_BOARD 8567f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 8577f058e85SJayachandran C select BOOT_ELF32 8587f058e85SJayachandran C select NLM_COMMON 8597f058e85SJayachandran C select SYS_HAS_CPU_XLR 8607f058e85SJayachandran C select SYS_SUPPORTS_SMP 8617f058e85SJayachandran C select HW_HAS_PCI 8627f058e85SJayachandran C select SWAP_IO_SPACE 8637f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 8647f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 86534adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 8667f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 8677f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 8687f058e85SJayachandran C select DMA_COHERENT 8697f058e85SJayachandran C select NR_CPUS_DEFAULT_32 8707f058e85SJayachandran C select CEVT_R4K 8717f058e85SJayachandran C select CSRC_R4K 87267e38cf2SRalf Baechle select IRQ_MIPS_CPU 873b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 8747f058e85SJayachandran C select SYNC_R4K 8757f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 8768f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 8778f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 8787f058e85SJayachandran C help 8797f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 8807f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 8817f058e85SJayachandran C 8821c773ea4SJayachandran Cconfig NLM_XLP_BOARD 8831c773ea4SJayachandran C bool "Netlogic XLP based systems" 8841c773ea4SJayachandran C select BOOT_ELF32 8851c773ea4SJayachandran C select NLM_COMMON 8861c773ea4SJayachandran C select SYS_HAS_CPU_XLP 8871c773ea4SJayachandran C select SYS_SUPPORTS_SMP 8881c773ea4SJayachandran C select HW_HAS_PCI 8891c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 8901c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 89134adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 8921c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 8931c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 8941c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 8951c773ea4SJayachandran C select DMA_COHERENT 8961c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 8971c773ea4SJayachandran C select CEVT_R4K 8981c773ea4SJayachandran C select CSRC_R4K 89967e38cf2SRalf Baechle select IRQ_MIPS_CPU 900b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9011c773ea4SJayachandran C select SYNC_R4K 9021c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 9032f6528e1SJayachandran C select USE_OF 9048f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9058f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9061c773ea4SJayachandran C help 9071c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 9081c773ea4SJayachandran C Say Y here if you have a XLP based board. 9091c773ea4SJayachandran C 9109bc463beSDavid Daneyconfig MIPS_PARAVIRT 9119bc463beSDavid Daney bool "Para-Virtualized guest system" 9129bc463beSDavid Daney select CEVT_R4K 9139bc463beSDavid Daney select CSRC_R4K 9149bc463beSDavid Daney select DMA_COHERENT 9159bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 9169bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 9179bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 9189bc463beSDavid Daney select SYS_SUPPORTS_SMP 9199bc463beSDavid Daney select NR_CPUS_DEFAULT_4 9209bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 9219bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 9229bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 9239bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 9249bc463beSDavid Daney select HW_HAS_PCI 9259bc463beSDavid Daney select SWAP_IO_SPACE 9269bc463beSDavid Daney help 9279bc463beSDavid Daney This option supports guest running under ???? 9289bc463beSDavid Daney 9291da177e4SLinus Torvaldsendchoice 9301da177e4SLinus Torvalds 931e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 9323b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 933d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 934a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 935e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 9368945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 9375e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 9385ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 9398ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 9401f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 9410f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 942ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 94329c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 94438b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 94522b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 9465e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 947a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 94885749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig" 949ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig" 9507f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 951ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 95238b18f72SRalf Baechle 9535e83d430SRalf Baechleendmenu 9545e83d430SRalf Baechle 9551da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 9561da177e4SLinus Torvalds bool 9571da177e4SLinus Torvalds default y 9581da177e4SLinus Torvalds 9591da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 9601da177e4SLinus Torvalds bool 9611da177e4SLinus Torvalds 962f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 963f0d1b0b3SDavid Howells bool 964f0d1b0b3SDavid Howells default n 965f0d1b0b3SDavid Howells 966f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 967f0d1b0b3SDavid Howells bool 968f0d1b0b3SDavid Howells default n 969f0d1b0b3SDavid Howells 9703c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 9713c9ee7efSAkinobu Mita bool 9723c9ee7efSAkinobu Mita default y 9733c9ee7efSAkinobu Mita 9741da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 9751da177e4SLinus Torvalds bool 9761da177e4SLinus Torvalds default y 9771da177e4SLinus Torvalds 978ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 9791cc89038SAtsushi Nemoto bool 9801cc89038SAtsushi Nemoto default y 9811cc89038SAtsushi Nemoto 9821da177e4SLinus Torvalds# 9831da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 9841da177e4SLinus Torvalds# 9850e2794b0SRalf Baechleconfig FW_ARC 9861da177e4SLinus Torvalds bool 9871da177e4SLinus Torvalds 98861ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 98961ed242dSRalf Baechle bool 99061ed242dSRalf Baechle 9919267a30dSMarc St-Jeanconfig BOOT_RAW 9929267a30dSMarc St-Jean bool 9939267a30dSMarc St-Jean 994217dd11eSRalf Baechleconfig CEVT_BCM1480 995217dd11eSRalf Baechle bool 996217dd11eSRalf Baechle 9976457d9fcSYoichi Yuasaconfig CEVT_DS1287 9986457d9fcSYoichi Yuasa bool 9996457d9fcSYoichi Yuasa 10001097c6acSYoichi Yuasaconfig CEVT_GT641XX 10011097c6acSYoichi Yuasa bool 10021097c6acSYoichi Yuasa 100342f77542SRalf Baechleconfig CEVT_R4K 100442f77542SRalf Baechle bool 100542f77542SRalf Baechle 1006217dd11eSRalf Baechleconfig CEVT_SB1250 1007217dd11eSRalf Baechle bool 1008217dd11eSRalf Baechle 1009229f773eSAtsushi Nemotoconfig CEVT_TXX9 1010229f773eSAtsushi Nemoto bool 1011229f773eSAtsushi Nemoto 1012217dd11eSRalf Baechleconfig CSRC_BCM1480 1013217dd11eSRalf Baechle bool 1014217dd11eSRalf Baechle 10154247417dSYoichi Yuasaconfig CSRC_IOASIC 10164247417dSYoichi Yuasa bool 10174247417dSYoichi Yuasa 1018940f6b48SRalf Baechleconfig CSRC_R4K 1019940f6b48SRalf Baechle bool 1020940f6b48SRalf Baechle 1021217dd11eSRalf Baechleconfig CSRC_SB1250 1022217dd11eSRalf Baechle bool 1023217dd11eSRalf Baechle 1024a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 10257444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 1026a9aec7feSAtsushi Nemoto bool 1027a9aec7feSAtsushi Nemoto 10280e2794b0SRalf Baechleconfig FW_CFE 1029df78b5c8SAurelien Jarno bool 1030df78b5c8SAurelien Jarno 10314bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 103234adb28dSRalf Baechle def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 10334bafad92SFUJITA Tomonori 1034885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1035885014bcSFelix Fietkau select DMA_NONCOHERENT 1036885014bcSFelix Fietkau bool 1037885014bcSFelix Fietkau 10381da177e4SLinus Torvaldsconfig DMA_COHERENT 10391da177e4SLinus Torvalds bool 10401da177e4SLinus Torvalds 10411da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 10421da177e4SLinus Torvalds bool 1043e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 10444ce588cdSRalf Baechle 1045e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 10464ce588cdSRalf Baechle bool 10471da177e4SLinus Torvalds 104836a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 10491da177e4SLinus Torvalds bool 10501da177e4SLinus Torvalds 1051dbb74540SRalf Baechleconfig HOTPLUG_CPU 10521b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 105340b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 10541b2bc75cSRalf Baechle help 10551b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 10561b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 10571b2bc75cSRalf Baechle (Note: power management support will enable this option 10581b2bc75cSRalf Baechle automatically on SMP systems. ) 10591b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 10601b2bc75cSRalf Baechle 10611b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1062dbb74540SRalf Baechle bool 1063dbb74540SRalf Baechle 10641da177e4SLinus Torvaldsconfig I8259 10651da177e4SLinus Torvalds bool 1066079a4601SAndrew Bresticker select IRQ_DOMAIN 10671da177e4SLinus Torvalds 10681da177e4SLinus Torvaldsconfig MIPS_BONITO64 10691da177e4SLinus Torvalds bool 10701da177e4SLinus Torvalds 10711da177e4SLinus Torvaldsconfig MIPS_MSC 10721da177e4SLinus Torvalds bool 10731da177e4SLinus Torvalds 10741f21d2bdSBrian Murphyconfig MIPS_NILE4 10751f21d2bdSBrian Murphy bool 10761f21d2bdSBrian Murphy 107739b8d525SRalf Baechleconfig SYNC_R4K 107839b8d525SRalf Baechle bool 107939b8d525SRalf Baechle 1080487d70d0SGabor Juhosconfig MIPS_MACHINE 1081487d70d0SGabor Juhos def_bool n 1082487d70d0SGabor Juhos 1083ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1084d388d685SMaciej W. Rozycki def_bool n 1085d388d685SMaciej W. Rozycki 10864e0748f5SMarkos Chandrasconfig GENERIC_CSUM 10874e0748f5SMarkos Chandras bool 10884e0748f5SMarkos Chandras 10898313da30SRalf Baechleconfig GENERIC_ISA_DMA 10908313da30SRalf Baechle bool 10918313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1092a35bee8aSNamhyung Kim select ISA_DMA_API 10938313da30SRalf Baechle 1094aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1095aa414dffSRalf Baechle bool 10968313da30SRalf Baechle select GENERIC_ISA_DMA 1097aa414dffSRalf Baechle 1098a35bee8aSNamhyung Kimconfig ISA_DMA_API 1099a35bee8aSNamhyung Kim bool 1100a35bee8aSNamhyung Kim 1101465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1102465aaed0SDavid Daney bool 1103465aaed0SDavid Daney 11045e83d430SRalf Baechle# 11056b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 11065e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 11075e83d430SRalf Baechle# choice statement should be more obvious to the user. 11085e83d430SRalf Baechle# 11095e83d430SRalf Baechlechoice 11106b2aac42SMasanari Iida prompt "Endianness selection" 11111da177e4SLinus Torvalds help 11121da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 11135e83d430SRalf Baechle byte order. These modes require different kernels and a different 11143cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 11155e83d430SRalf Baechle particular system but some systems are just as commonly used in the 11163dde6ad8SDavid Sterba one or the other endianness. 11175e83d430SRalf Baechle 11185e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 11195e83d430SRalf Baechle bool "Big endian" 11205e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 11215e83d430SRalf Baechle 11225e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 11235e83d430SRalf Baechle bool "Little endian" 11245e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 11255e83d430SRalf Baechle 11265e83d430SRalf Baechleendchoice 11275e83d430SRalf Baechle 112822b0763aSDavid Daneyconfig EXPORT_UASM 112922b0763aSDavid Daney bool 113022b0763aSDavid Daney 11312116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 11322116245eSRalf Baechle bool 11332116245eSRalf Baechle 11345e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 11355e83d430SRalf Baechle bool 11365e83d430SRalf Baechle 11375e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 11385e83d430SRalf Baechle bool 11391da177e4SLinus Torvalds 11409cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 11419cffd154SDavid Daney bool 11429cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 11439cffd154SDavid Daney default y 11449cffd154SDavid Daney 1145aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1146aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1147aa1762f4SDavid Daney 11481da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 11491da177e4SLinus Torvalds bool 11501da177e4SLinus Torvalds 11519267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 11529267a30dSMarc St-Jean bool 11539267a30dSMarc St-Jean 11549267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 11559267a30dSMarc St-Jean bool 11569267a30dSMarc St-Jean 11578420fd00SAtsushi Nemotoconfig IRQ_TXX9 11588420fd00SAtsushi Nemoto bool 11598420fd00SAtsushi Nemoto 1160d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1161d5ab1a69SYoichi Yuasa bool 1162d5ab1a69SYoichi Yuasa 1163252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 11641da177e4SLinus Torvalds bool 11651da177e4SLinus Torvalds 11669267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 11679267a30dSMarc St-Jean bool 11689267a30dSMarc St-Jean 1169a83860c2SRalf Baechleconfig SOC_EMMA2RH 1170a83860c2SRalf Baechle bool 1171a83860c2SRalf Baechle select CEVT_R4K 1172a83860c2SRalf Baechle select CSRC_R4K 1173a83860c2SRalf Baechle select DMA_NONCOHERENT 117467e38cf2SRalf Baechle select IRQ_MIPS_CPU 1175a83860c2SRalf Baechle select SWAP_IO_SPACE 1176a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1177a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1178a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1179a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1180a83860c2SRalf Baechle 1181edb6310aSDaniel Lairdconfig SOC_PNX833X 1182edb6310aSDaniel Laird bool 1183edb6310aSDaniel Laird select CEVT_R4K 1184edb6310aSDaniel Laird select CSRC_R4K 118567e38cf2SRalf Baechle select IRQ_MIPS_CPU 1186edb6310aSDaniel Laird select DMA_NONCOHERENT 1187edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1188edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1189edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1190edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1191377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1192edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1193edb6310aSDaniel Laird 1194edb6310aSDaniel Lairdconfig SOC_PNX8335 1195edb6310aSDaniel Laird bool 1196edb6310aSDaniel Laird select SOC_PNX833X 1197edb6310aSDaniel Laird 1198a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1199a7e07b1aSMarkos Chandras bool 1200a7e07b1aSMarkos Chandras 12011da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 12021da177e4SLinus Torvalds bool 12031da177e4SLinus Torvalds 1204e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1205e2defae5SThomas Bogendoerfer bool 1206e2defae5SThomas Bogendoerfer 12075b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 12085b438c44SThomas Bogendoerfer bool 12095b438c44SThomas Bogendoerfer 1210e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1211e2defae5SThomas Bogendoerfer bool 1212e2defae5SThomas Bogendoerfer 1213e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1214e2defae5SThomas Bogendoerfer bool 1215e2defae5SThomas Bogendoerfer 1216e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1217e2defae5SThomas Bogendoerfer bool 1218e2defae5SThomas Bogendoerfer 1219e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1220e2defae5SThomas Bogendoerfer bool 1221e2defae5SThomas Bogendoerfer 1222e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1223e2defae5SThomas Bogendoerfer bool 1224e2defae5SThomas Bogendoerfer 12250e2794b0SRalf Baechleconfig FW_ARC32 12265e83d430SRalf Baechle bool 12275e83d430SRalf Baechle 1228aaa9fad3SPaul Bolleconfig FW_SNIPROM 1229231a35d3SThomas Bogendoerfer bool 1230231a35d3SThomas Bogendoerfer 12311da177e4SLinus Torvaldsconfig BOOT_ELF32 12321da177e4SLinus Torvalds bool 12331da177e4SLinus Torvalds 1234930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1235930beb5aSFlorian Fainelli bool 1236930beb5aSFlorian Fainelli 1237930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1238930beb5aSFlorian Fainelli bool 1239930beb5aSFlorian Fainelli 1240930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1241930beb5aSFlorian Fainelli bool 1242930beb5aSFlorian Fainelli 1243930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1244930beb5aSFlorian Fainelli bool 1245930beb5aSFlorian Fainelli 12461da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 12471da177e4SLinus Torvalds int 1248a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 12495432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 12505432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 12515432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 12521da177e4SLinus Torvalds default "5" 12531da177e4SLinus Torvalds 12541da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 12551da177e4SLinus Torvalds bool 12561da177e4SLinus Torvalds 12571da177e4SLinus Torvaldsconfig ARC_CONSOLE 12581da177e4SLinus Torvalds bool "ARC console support" 1259e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 12601da177e4SLinus Torvalds 12611da177e4SLinus Torvaldsconfig ARC_MEMORY 12621da177e4SLinus Torvalds bool 126314b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 12641da177e4SLinus Torvalds default y 12651da177e4SLinus Torvalds 12661da177e4SLinus Torvaldsconfig ARC_PROMLIB 12671da177e4SLinus Torvalds bool 1268e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 12691da177e4SLinus Torvalds default y 12701da177e4SLinus Torvalds 12710e2794b0SRalf Baechleconfig FW_ARC64 12721da177e4SLinus Torvalds bool 12731da177e4SLinus Torvalds 12741da177e4SLinus Torvaldsconfig BOOT_ELF64 12751da177e4SLinus Torvalds bool 12761da177e4SLinus Torvalds 12771da177e4SLinus Torvaldsmenu "CPU selection" 12781da177e4SLinus Torvalds 12791da177e4SLinus Torvaldschoice 12801da177e4SLinus Torvalds prompt "CPU type" 12811da177e4SLinus Torvalds default CPU_R4X00 12821da177e4SLinus Torvalds 12830e476d91SHuacai Chenconfig CPU_LOONGSON3 12840e476d91SHuacai Chen bool "Loongson 3 CPU" 12850e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 12860e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 12870e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 12880e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 12890e476d91SHuacai Chen select WEAK_ORDERING 12900e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 1291cbfb3ea7SHuacai Chen select ARCH_REQUIRE_GPIOLIB 12920e476d91SHuacai Chen help 12930e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 12940e476d91SHuacai Chen set with many extensions. 12950e476d91SHuacai Chen 12963702bba5SWu Zhangjinconfig CPU_LOONGSON2E 12973702bba5SWu Zhangjin bool "Loongson 2E" 12983702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 12993702bba5SWu Zhangjin select CPU_LOONGSON2 13002a21c730SFuxin Zhang help 13012a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 13022a21c730SFuxin Zhang with many extensions. 13032a21c730SFuxin Zhang 130425985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 13056f7a251aSWu Zhangjin bonito64. 13066f7a251aSWu Zhangjin 13076f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 13086f7a251aSWu Zhangjin bool "Loongson 2F" 13096f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 13106f7a251aSWu Zhangjin select CPU_LOONGSON2 1311c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 13126f7a251aSWu Zhangjin help 13136f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 13146f7a251aSWu Zhangjin with many extensions. 13156f7a251aSWu Zhangjin 13166f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 13176f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 13186f7a251aSWu Zhangjin Loongson2E. 13196f7a251aSWu Zhangjin 1320ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1321ca585cf9SKelvin Cheung bool "Loongson 1B" 1322ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1323ca585cf9SKelvin Cheung select CPU_LOONGSON1 1324ca585cf9SKelvin Cheung help 1325ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1326ca585cf9SKelvin Cheung release 2 instruction set. 1327ca585cf9SKelvin Cheung 13286e760c8dSRalf Baechleconfig CPU_MIPS32_R1 13296e760c8dSRalf Baechle bool "MIPS32 Release 1" 13307cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 13316e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1332797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1333ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13346e760c8dSRalf Baechle help 13355e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 13361e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 13371e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 13381e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 13391e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 13401e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 13411e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 13421e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 13431e5f1caaSRalf Baechle performance. 13441e5f1caaSRalf Baechle 13451e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 13461e5f1caaSRalf Baechle bool "MIPS32 Release 2" 13477cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 13481e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1349797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1350ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1351a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 13522235a54dSSanjay Lal select HAVE_KVM 13531e5f1caaSRalf Baechle help 13545e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 13556e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 13566e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 13576e760c8dSRalf Baechle specific type of processor in your system, choose those that one 13586e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 13591da177e4SLinus Torvalds 13607fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 13617fd08ca5SLeonid Yegoshin bool "MIPS32 Release 6 (EXPERIMENTAL)" 13627fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 13637fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 13647fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 13657fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 13667fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 13674e0748f5SMarkos Chandras select GENERIC_CSUM 13687fd08ca5SLeonid Yegoshin select HAVE_KVM 13697fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 13707fd08ca5SLeonid Yegoshin help 13717fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 13727fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 13737fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 13747fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 13757fd08ca5SLeonid Yegoshin 13766e760c8dSRalf Baechleconfig CPU_MIPS64_R1 13776e760c8dSRalf Baechle bool "MIPS64 Release 1" 13787cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1379797798c1SRalf Baechle select CPU_HAS_PREFETCH 1380ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1381ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1382ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13839cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 13846e760c8dSRalf Baechle help 13856e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 13866e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 13876e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 13886e760c8dSRalf Baechle specific type of processor in your system, choose those that one 13896e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 13901e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 13911e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 13921e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 13931e5f1caaSRalf Baechle performance. 13941e5f1caaSRalf Baechle 13951e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 13961e5f1caaSRalf Baechle bool "MIPS64 Release 2" 13977cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1398797798c1SRalf Baechle select CPU_HAS_PREFETCH 13991e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 14001e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1401ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14029cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1403a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14041e5f1caaSRalf Baechle help 14051e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 14061e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 14071e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 14081e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14091e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 14101da177e4SLinus Torvalds 14117fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 14127fd08ca5SLeonid Yegoshin bool "MIPS64 Release 6 (EXPERIMENTAL)" 14137fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 14147fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14157fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14167fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 14177fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14187fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14194e0748f5SMarkos Chandras select GENERIC_CSUM 14207fd08ca5SLeonid Yegoshin help 14217fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14227fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 14237fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 14247fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 14257fd08ca5SLeonid Yegoshin 14261da177e4SLinus Torvaldsconfig CPU_R3000 14271da177e4SLinus Torvalds bool "R3000" 14287cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1429f7062ddbSRalf Baechle select CPU_HAS_WB 1430ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1431797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14321da177e4SLinus Torvalds help 14331da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 14341da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 14351da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 14361da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 14371da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 14381da177e4SLinus Torvalds try to recompile with R3000. 14391da177e4SLinus Torvalds 14401da177e4SLinus Torvaldsconfig CPU_TX39XX 14411da177e4SLinus Torvalds bool "R39XX" 14427cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1443ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 14441da177e4SLinus Torvalds 14451da177e4SLinus Torvaldsconfig CPU_VR41XX 14461da177e4SLinus Torvalds bool "R41xx" 14477cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1448ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1449ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 14501da177e4SLinus Torvalds help 14515e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 14521da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 14531da177e4SLinus Torvalds kernel built with this option will not run on any other type of 14541da177e4SLinus Torvalds processor or vice versa. 14551da177e4SLinus Torvalds 14561da177e4SLinus Torvaldsconfig CPU_R4300 14571da177e4SLinus Torvalds bool "R4300" 14587cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1459ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1460ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 14611da177e4SLinus Torvalds help 14621da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 14631da177e4SLinus Torvalds 14641da177e4SLinus Torvaldsconfig CPU_R4X00 14651da177e4SLinus Torvalds bool "R4x00" 14667cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1467ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1468ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1469970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14701da177e4SLinus Torvalds help 14711da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 14721da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 14731da177e4SLinus Torvalds 14741da177e4SLinus Torvaldsconfig CPU_TX49XX 14751da177e4SLinus Torvalds bool "R49XX" 14767cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1477de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1478ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1479ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1480970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14811da177e4SLinus Torvalds 14821da177e4SLinus Torvaldsconfig CPU_R5000 14831da177e4SLinus Torvalds bool "R5000" 14847cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1485ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1486ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1487970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14881da177e4SLinus Torvalds help 14891da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 14901da177e4SLinus Torvalds 14911da177e4SLinus Torvaldsconfig CPU_R5432 14921da177e4SLinus Torvalds bool "R5432" 14937cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 14945e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 14955e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1496970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14971da177e4SLinus Torvalds 1498542c1020SShinya Kuribayashiconfig CPU_R5500 1499542c1020SShinya Kuribayashi bool "R5500" 1500542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1501542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1502542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 15039cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1504542c1020SShinya Kuribayashi help 1505542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1506542c1020SShinya Kuribayashi instruction set. 1507542c1020SShinya Kuribayashi 15081da177e4SLinus Torvaldsconfig CPU_R6000 15091da177e4SLinus Torvalds bool "R6000" 15107cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1511ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15121da177e4SLinus Torvalds help 15131da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1514c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 15151da177e4SLinus Torvalds 15161da177e4SLinus Torvaldsconfig CPU_NEVADA 15171da177e4SLinus Torvalds bool "RM52xx" 15187cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1519ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1520ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1521970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15221da177e4SLinus Torvalds help 15231da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 15241da177e4SLinus Torvalds 15251da177e4SLinus Torvaldsconfig CPU_R8000 15261da177e4SLinus Torvalds bool "R8000" 15277cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 15285e83d430SRalf Baechle select CPU_HAS_PREFETCH 1529ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15301da177e4SLinus Torvalds help 15311da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 15321da177e4SLinus Torvalds uncommon and the support for them is incomplete. 15331da177e4SLinus Torvalds 15341da177e4SLinus Torvaldsconfig CPU_R10000 15351da177e4SLinus Torvalds bool "R10000" 15367cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 15375e83d430SRalf Baechle select CPU_HAS_PREFETCH 1538ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1539ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1540797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1541970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15421da177e4SLinus Torvalds help 15431da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 15441da177e4SLinus Torvalds 15451da177e4SLinus Torvaldsconfig CPU_RM7000 15461da177e4SLinus Torvalds bool "RM7000" 15477cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 15485e83d430SRalf Baechle select CPU_HAS_PREFETCH 1549ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1550ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1551797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1552970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15531da177e4SLinus Torvalds 15541da177e4SLinus Torvaldsconfig CPU_SB1 15551da177e4SLinus Torvalds bool "SB1" 15567cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1557ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1558ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1559797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1560970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15610004a9dfSRalf Baechle select WEAK_ORDERING 15621da177e4SLinus Torvalds 1563a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1564a86c7f72SDavid Daney bool "Cavium Octeon processor" 15655e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1566a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1567a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1568a86c7f72SDavid Daney select WEAK_ORDERING 1569a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 15709cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 15719296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 1572930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1573a86c7f72SDavid Daney help 1574a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1575a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1576a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1577a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1578a86c7f72SDavid Daney 1579cd746249SJonas Gorskiconfig CPU_BMIPS 1580cd746249SJonas Gorski bool "Broadcom BMIPS" 1581cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1582cd746249SJonas Gorski select CPU_MIPS32 1583fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1584cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1585cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1586cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1587cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1588cd746249SJonas Gorski select DMA_NONCOHERENT 158967e38cf2SRalf Baechle select IRQ_MIPS_CPU 1590cd746249SJonas Gorski select SWAP_IO_SPACE 1591cd746249SJonas Gorski select WEAK_ORDERING 1592c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 159369aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1594c1c0c461SKevin Cernekee help 1595fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1596c1c0c461SKevin Cernekee 15977f058e85SJayachandran Cconfig CPU_XLR 15987f058e85SJayachandran C bool "Netlogic XLR SoC" 15997f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 16007f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 16017f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 16027f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1603970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16047f058e85SJayachandran C select WEAK_ORDERING 16057f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 16067f058e85SJayachandran C help 16077f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 16081c773ea4SJayachandran C 16091c773ea4SJayachandran Cconfig CPU_XLP 16101c773ea4SJayachandran C bool "Netlogic XLP SoC" 16111c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 16121c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 16131c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 16141c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 16151c773ea4SJayachandran C select WEAK_ORDERING 16161c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 16171c773ea4SJayachandran C select CPU_HAS_PREFETCH 1618d6504846SJayachandran C select CPU_MIPSR2 1619ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 16201c773ea4SJayachandran C help 16211c773ea4SJayachandran C Netlogic Microsystems XLP processors. 16221da177e4SLinus Torvaldsendchoice 16231da177e4SLinus Torvalds 1624a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1625a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1626a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 16277fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1628a6e18781SLeonid Yegoshin help 1629a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1630a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1631a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1632a6e18781SLeonid Yegoshin 1633a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1634a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1635a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1636a6e18781SLeonid Yegoshin select EVA 1637a6e18781SLeonid Yegoshin default y 1638a6e18781SLeonid Yegoshin help 1639a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1640a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1641a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1642a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1643a6e18781SLeonid Yegoshin 1644c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1645c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1646c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1647c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1648c5b36783SSteven J. Hill help 1649c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1650c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1651c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1652c5b36783SSteven J. Hill 1653c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1654c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1655c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1656c5b36783SSteven J. Hill depends on !EVA 1657c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1658c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1659c5b36783SSteven J. Hill select XPA 1660c5b36783SSteven J. Hill select HIGHMEM 1661c5b36783SSteven J. Hill select ARCH_PHYS_ADDR_T_64BIT 1662c5b36783SSteven J. Hill default n 1663c5b36783SSteven J. Hill help 1664c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1665c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1666c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1667c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1668c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1669c5b36783SSteven J. Hill If unsure, say 'N' here. 1670c5b36783SSteven J. Hill 1671622844bfSWu Zhangjinif CPU_LOONGSON2F 1672622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1673622844bfSWu Zhangjin bool 1674622844bfSWu Zhangjin 1675622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1676622844bfSWu Zhangjin bool 1677622844bfSWu Zhangjin 1678622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1679622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1680622844bfSWu Zhangjin default y 1681622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1682622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1683622844bfSWu Zhangjin help 1684622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1685622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1686622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1687622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1688622844bfSWu Zhangjin 1689622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1690622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1691622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1692622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1693622844bfSWu Zhangjin systems. 1694622844bfSWu Zhangjin 1695622844bfSWu Zhangjin If unsure, please say Y. 1696622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1697622844bfSWu Zhangjin 16981b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 16991b93b3c3SWu Zhangjin bool 17001b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 17011b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 170231c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 17031b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1704fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 17054e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 17061b93b3c3SWu Zhangjin 17071b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 17081b93b3c3SWu Zhangjin bool 17091b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 17101b93b3c3SWu Zhangjin 17113702bba5SWu Zhangjinconfig CPU_LOONGSON2 17123702bba5SWu Zhangjin bool 17133702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 17143702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 17153702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1716970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17173702bba5SWu Zhangjin 1718ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1719ca585cf9SKelvin Cheung bool 1720ca585cf9SKelvin Cheung select CPU_MIPS32 1721ca585cf9SKelvin Cheung select CPU_MIPSR2 1722ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1723ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1724ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1725f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1726ca585cf9SKelvin Cheung 1727fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 172804fa8bf7SJonas Gorski select SMP_UP if SMP 17291bbb6c1bSKevin Cernekee bool 1730cd746249SJonas Gorski 1731cd746249SJonas Gorskiconfig CPU_BMIPS4350 1732cd746249SJonas Gorski bool 1733cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1734cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1735cd746249SJonas Gorski 1736cd746249SJonas Gorskiconfig CPU_BMIPS4380 1737cd746249SJonas Gorski bool 1738bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1739cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1740cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1741cd746249SJonas Gorski 1742cd746249SJonas Gorskiconfig CPU_BMIPS5000 1743cd746249SJonas Gorski bool 1744cd746249SJonas Gorski select MIPS_CPU_SCACHE 1745bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1746cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1747cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 17481bbb6c1bSKevin Cernekee 17490e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 17500e476d91SHuacai Chen bool 17510e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 17520e476d91SHuacai Chen 17533702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 17542a21c730SFuxin Zhang bool 17552a21c730SFuxin Zhang 17566f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 17576f7a251aSWu Zhangjin bool 175855045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 175955045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 176022f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 17616f7a251aSWu Zhangjin 1762ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1763ca585cf9SKelvin Cheung bool 1764ca585cf9SKelvin Cheung 17657cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 17667cf8053bSRalf Baechle bool 17677cf8053bSRalf Baechle 17687cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 17697cf8053bSRalf Baechle bool 17707cf8053bSRalf Baechle 1771a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1772a6e18781SLeonid Yegoshin bool 1773a6e18781SLeonid Yegoshin 1774c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1775c5b36783SSteven J. Hill bool 1776c5b36783SSteven J. Hill 17777fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 17787fd08ca5SLeonid Yegoshin bool 17797fd08ca5SLeonid Yegoshin 17807cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 17817cf8053bSRalf Baechle bool 17827cf8053bSRalf Baechle 17837cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 17847cf8053bSRalf Baechle bool 17857cf8053bSRalf Baechle 17867fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 17877fd08ca5SLeonid Yegoshin bool 17887fd08ca5SLeonid Yegoshin 17897cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 17907cf8053bSRalf Baechle bool 17917cf8053bSRalf Baechle 17927cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 17937cf8053bSRalf Baechle bool 17947cf8053bSRalf Baechle 17957cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 17967cf8053bSRalf Baechle bool 17977cf8053bSRalf Baechle 17987cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 17997cf8053bSRalf Baechle bool 18007cf8053bSRalf Baechle 18017cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 18027cf8053bSRalf Baechle bool 18037cf8053bSRalf Baechle 18047cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 18057cf8053bSRalf Baechle bool 18067cf8053bSRalf Baechle 18077cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 18087cf8053bSRalf Baechle bool 18097cf8053bSRalf Baechle 18107cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 18117cf8053bSRalf Baechle bool 18127cf8053bSRalf Baechle 1813542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1814542c1020SShinya Kuribayashi bool 1815542c1020SShinya Kuribayashi 18167cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 18177cf8053bSRalf Baechle bool 18187cf8053bSRalf Baechle 18197cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 18207cf8053bSRalf Baechle bool 18217cf8053bSRalf Baechle 18227cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 18237cf8053bSRalf Baechle bool 18247cf8053bSRalf Baechle 18257cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 18267cf8053bSRalf Baechle bool 18277cf8053bSRalf Baechle 18287cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 18297cf8053bSRalf Baechle bool 18307cf8053bSRalf Baechle 18317cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 18327cf8053bSRalf Baechle bool 18337cf8053bSRalf Baechle 18345e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 18355e683389SDavid Daney bool 18365e683389SDavid Daney 1837cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1838c1c0c461SKevin Cernekee bool 1839c1c0c461SKevin Cernekee 1840fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1841c1c0c461SKevin Cernekee bool 1842cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1843c1c0c461SKevin Cernekee 1844c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1845c1c0c461SKevin Cernekee bool 1846cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1847c1c0c461SKevin Cernekee 1848c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1849c1c0c461SKevin Cernekee bool 1850cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1851c1c0c461SKevin Cernekee 1852c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1853c1c0c461SKevin Cernekee bool 1854cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1855c1c0c461SKevin Cernekee 18567f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 18577f058e85SJayachandran C bool 18587f058e85SJayachandran C 18591c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 18601c773ea4SJayachandran C bool 18611c773ea4SJayachandran C 1862b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 1863b6911bbaSPaul Burton depends on MIPS_MALTA 1864b6911bbaSPaul Burton depends on PCI 1865b6911bbaSPaul Burton bool 1866b6911bbaSPaul Burton default y 1867b6911bbaSPaul Burton 186817099b11SRalf Baechle# 186917099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 187017099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 187117099b11SRalf Baechle# 18720004a9dfSRalf Baechleconfig WEAK_ORDERING 18730004a9dfSRalf Baechle bool 187417099b11SRalf Baechle 187517099b11SRalf Baechle# 187617099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 187717099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 187817099b11SRalf Baechle# 187917099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 188017099b11SRalf Baechle bool 18815e83d430SRalf Baechleendmenu 18825e83d430SRalf Baechle 18835e83d430SRalf Baechle# 18845e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 18855e83d430SRalf Baechle# 18865e83d430SRalf Baechleconfig CPU_MIPS32 18875e83d430SRalf Baechle bool 18887fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 18895e83d430SRalf Baechle 18905e83d430SRalf Baechleconfig CPU_MIPS64 18915e83d430SRalf Baechle bool 18927fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 18935e83d430SRalf Baechle 18945e83d430SRalf Baechle# 1895c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 18965e83d430SRalf Baechle# 18975e83d430SRalf Baechleconfig CPU_MIPSR1 18985e83d430SRalf Baechle bool 18995e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 19005e83d430SRalf Baechle 19015e83d430SRalf Baechleconfig CPU_MIPSR2 19025e83d430SRalf Baechle bool 1903a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 1904a7e07b1aSMarkos Chandras select MIPS_SPRAM 19055e83d430SRalf Baechle 19067fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 19077fd08ca5SLeonid Yegoshin bool 19087fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 1909a7e07b1aSMarkos Chandras select MIPS_SPRAM 19105e83d430SRalf Baechle 1911a6e18781SLeonid Yegoshinconfig EVA 1912a6e18781SLeonid Yegoshin bool 1913a6e18781SLeonid Yegoshin 1914c5b36783SSteven J. Hillconfig XPA 1915c5b36783SSteven J. Hill bool 1916c5b36783SSteven J. Hill 19175e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 19185e83d430SRalf Baechle bool 19195e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 19205e83d430SRalf Baechle bool 19215e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 19225e83d430SRalf Baechle bool 19235e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 19245e83d430SRalf Baechle bool 192555045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 192655045ff5SWu Zhangjin bool 192755045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 192855045ff5SWu Zhangjin bool 19299cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 19309cffd154SDavid Daney bool 193122f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 193222f1fdfdSWu Zhangjin bool 193382622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 193482622284SDavid Daney bool 1935d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 19365e83d430SRalf Baechle 19378192c9eaSDavid Daney# 19388192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 19398192c9eaSDavid Daney# 19408192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 19418192c9eaSDavid Daney bool 1942f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 19438192c9eaSDavid Daney 19445e83d430SRalf Baechlemenu "Kernel type" 19455e83d430SRalf Baechle 19465e83d430SRalf Baechlechoice 19475e83d430SRalf Baechle prompt "Kernel code model" 19485e83d430SRalf Baechle help 19495e83d430SRalf Baechle You should only select this option if you have a workload that 19505e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 19515e83d430SRalf Baechle large memory. You will only be presented a single option in this 19525e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 19535e83d430SRalf Baechle 19545e83d430SRalf Baechleconfig 32BIT 19555e83d430SRalf Baechle bool "32-bit kernel" 19565e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 19575e83d430SRalf Baechle select TRAD_SIGNALS 19585e83d430SRalf Baechle help 19595e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 19605e83d430SRalf Baechleconfig 64BIT 19615e83d430SRalf Baechle bool "64-bit kernel" 19625e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 19635e83d430SRalf Baechle help 19645e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 19655e83d430SRalf Baechle 19665e83d430SRalf Baechleendchoice 19675e83d430SRalf Baechle 19682235a54dSSanjay Lalconfig KVM_GUEST 19692235a54dSSanjay Lal bool "KVM Guest Kernel" 1970f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 19712235a54dSSanjay Lal help 19722235a54dSSanjay Lal Select this option if building a guest kernel for KVM (Trap & Emulate) mode 19732235a54dSSanjay Lal 1974eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 1975eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 19762235a54dSSanjay Lal depends on KVM_GUEST 1977eda3d33cSJames Hogan default 100 19782235a54dSSanjay Lal help 1979eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 1980eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 1981eda3d33cSJames Hogan timer frequency is specified directly. 19822235a54dSSanjay Lal 19831da177e4SLinus Torvaldschoice 19841da177e4SLinus Torvalds prompt "Kernel page size" 19851da177e4SLinus Torvalds default PAGE_SIZE_4KB 19861da177e4SLinus Torvalds 19871da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 19881da177e4SLinus Torvalds bool "4kB" 19890e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 19901da177e4SLinus Torvalds help 19911da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 19921da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 19931da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 19941da177e4SLinus Torvalds recommended for low memory systems. 19951da177e4SLinus Torvalds 19961da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 19971da177e4SLinus Torvalds bool "8kB" 19987d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 19991da177e4SLinus Torvalds help 20001da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 20011da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2002c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 2003c52399beSRalf Baechle suitable Linux distribution to support this. 20041da177e4SLinus Torvalds 20051da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 20061da177e4SLinus Torvalds bool "16kB" 2007714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 20081da177e4SLinus Torvalds help 20091da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 20101da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2011714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2012714bfad6SRalf Baechle Linux distribution to support this. 20131da177e4SLinus Torvalds 2014c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2015c52399beSRalf Baechle bool "32kB" 2016c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 2017c52399beSRalf Baechle help 2018c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2019c52399beSRalf Baechle the price of higher memory consumption. This option is available 2020c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2021c52399beSRalf Baechle distribution to support this. 2022c52399beSRalf Baechle 20231da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 20241da177e4SLinus Torvalds bool "64kB" 20257d60717eSKees Cook depends on !CPU_R3000 && !CPU_TX39XX 20261da177e4SLinus Torvalds help 20271da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 20281da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 20291da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2030714bfad6SRalf Baechle writing this option is still high experimental. 20311da177e4SLinus Torvalds 20321da177e4SLinus Torvaldsendchoice 20331da177e4SLinus Torvalds 2034c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2035c9bace7cSDavid Daney int "Maximum zone order" 2036e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2037e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2038e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2039e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2040e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2041e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2042c9bace7cSDavid Daney range 11 64 2043c9bace7cSDavid Daney default "11" 2044c9bace7cSDavid Daney help 2045c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2046c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2047c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2048c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2049c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2050c9bace7cSDavid Daney increase this value. 2051c9bace7cSDavid Daney 2052c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2053c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2054c9bace7cSDavid Daney 2055c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2056c9bace7cSDavid Daney when choosing a value for this option. 2057c9bace7cSDavid Daney 20581da177e4SLinus Torvaldsconfig BOARD_SCACHE 20591da177e4SLinus Torvalds bool 20601da177e4SLinus Torvalds 20611da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 20621da177e4SLinus Torvalds bool 20631da177e4SLinus Torvalds select BOARD_SCACHE 20641da177e4SLinus Torvalds 20659318c51aSChris Dearman# 20669318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 20679318c51aSChris Dearman# 20689318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 20699318c51aSChris Dearman bool 20709318c51aSChris Dearman select BOARD_SCACHE 20719318c51aSChris Dearman 20721da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 20731da177e4SLinus Torvalds bool 20741da177e4SLinus Torvalds select BOARD_SCACHE 20751da177e4SLinus Torvalds 20761da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 20771da177e4SLinus Torvalds bool 20781da177e4SLinus Torvalds select BOARD_SCACHE 20791da177e4SLinus Torvalds 20801da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 20811da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 20821da177e4SLinus Torvalds depends on CPU_SB1 20831da177e4SLinus Torvalds help 20841da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 20851da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 20861da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 20871da177e4SLinus Torvalds 20881da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2089c8094b53SRalf Baechle bool 20901da177e4SLinus Torvalds 20913165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 20923165c846SFlorian Fainelli bool 20933165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 20943165c846SFlorian Fainelli 209591405eb6SFlorian Fainelliconfig CPU_R4K_FPU 209691405eb6SFlorian Fainelli bool 209791405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 209891405eb6SFlorian Fainelli 209962cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 210062cedc4fSFlorian Fainelli bool 210162cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 210262cedc4fSFlorian Fainelli 210359d6ab86SRalf Baechleconfig MIPS_MT_SMP 2104a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 210559d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 210659d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2107d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2108c080faa5SSteven J. Hill select SYNC_R4K 21090c2cb004SPaul Burton select MIPS_GIC_IPI 211059d6ab86SRalf Baechle select MIPS_MT 211159d6ab86SRalf Baechle select SMP 211287353d8aSRalf Baechle select SMP_UP 2113c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2114c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2115399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 211659d6ab86SRalf Baechle help 2117c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2118c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2119c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2120c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2121c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 212259d6ab86SRalf Baechle 2123f41ae0b2SRalf Baechleconfig MIPS_MT 2124f41ae0b2SRalf Baechle bool 2125f41ae0b2SRalf Baechle 21260ab7aefcSRalf Baechleconfig SCHED_SMT 21270ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 21280ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 21290ab7aefcSRalf Baechle default n 21300ab7aefcSRalf Baechle help 21310ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 21320ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 21330ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 21340ab7aefcSRalf Baechle 21350ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 21360ab7aefcSRalf Baechle bool 21370ab7aefcSRalf Baechle 2138f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2139f41ae0b2SRalf Baechle bool 2140f41ae0b2SRalf Baechle 2141f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2142f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2143f088fc84SRalf Baechle default y 2144b633648cSRalf Baechle depends on MIPS_MT_SMP 214507cc0c9eSRalf Baechle 2146b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2147b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 2148b0a668fbSLeonid Yegoshin depends on CPU_MIPSR6 && !SMP 2149b0a668fbSLeonid Yegoshin default y 2150b0a668fbSLeonid Yegoshin help 2151b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2152b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 215307edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2154b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2155b0a668fbSLeonid Yegoshin final kernel image. 2156b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels" 2157b0a668fbSLeonid Yegoshin depends on SMP && CPU_MIPSR6 2158b0a668fbSLeonid Yegoshin 215907cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 216007cc0c9eSRalf Baechle bool "VPE loader support." 2161704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 216207cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 216307cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 216407cc0c9eSRalf Baechle select MIPS_MT 216507cc0c9eSRalf Baechle help 216607cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 216707cc0c9eSRalf Baechle onto another VPE and running it. 2168f088fc84SRalf Baechle 216917a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 217017a1d523SDeng-Cheng Zhu bool 217117a1d523SDeng-Cheng Zhu default "y" 217217a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 217317a1d523SDeng-Cheng Zhu 21741a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 21751a2a6d7eSDeng-Cheng Zhu bool 21761a2a6d7eSDeng-Cheng Zhu default "y" 21771a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 21781a2a6d7eSDeng-Cheng Zhu 2179e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2180e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2181e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2182e01402b1SRalf Baechle default y 2183e01402b1SRalf Baechle help 2184e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2185e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2186e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2187e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2188e01402b1SRalf Baechle 2189e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2190e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2191e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 21925e83d430SRalf Baechle help 2193e01402b1SRalf Baechle 2194da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2195da615cf6SDeng-Cheng Zhu bool 2196da615cf6SDeng-Cheng Zhu default "y" 2197da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2198da615cf6SDeng-Cheng Zhu 21992c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 22002c973ef0SDeng-Cheng Zhu bool 22012c973ef0SDeng-Cheng Zhu default "y" 22022c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 22032c973ef0SDeng-Cheng Zhu 22044a16ff4cSRalf Baechleconfig MIPS_CMP 22055cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 2206b633648cSRalf Baechle depends on SYS_SUPPORTS_MIPS_CMP 220772e20142SPaul Burton select MIPS_GIC_IPI 2208b10b43baSMarkos Chandras select SMP 2209eb9b5141STim Anderson select SYNC_R4K 2210b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 22114a16ff4cSRalf Baechle select WEAK_ORDERING 22124a16ff4cSRalf Baechle default n 22134a16ff4cSRalf Baechle help 2214044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2215044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2216044505c7SPaul Burton its ability to start secondary CPUs. 22174a16ff4cSRalf Baechle 22185cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 22195cac93b3SPaul Burton instead of this. 22205cac93b3SPaul Burton 22210ee958e1SPaul Burtonconfig MIPS_CPS 22220ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 22236ca716f2SMarkos Chandras depends on SYS_SUPPORTS_MIPS_CPS && !64BIT 22240ee958e1SPaul Burton select MIPS_CM 22250ee958e1SPaul Burton select MIPS_CPC 22261d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 22270ee958e1SPaul Burton select MIPS_GIC_IPI 22280ee958e1SPaul Burton select SMP 22290ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 22301d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 22310ee958e1SPaul Burton select SYS_SUPPORTS_SMP 22320ee958e1SPaul Burton select WEAK_ORDERING 22330ee958e1SPaul Burton help 22340ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 22350ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 22360ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 22370ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 22380ee958e1SPaul Burton support is unavailable. 22390ee958e1SPaul Burton 22403179d37eSPaul Burtonconfig MIPS_CPS_PM 224139a59593SMarkos Chandras depends on MIPS_CPS 2242a8b84677SPaul Burton select MIPS_CPC 22433179d37eSPaul Burton bool 22443179d37eSPaul Burton 224572e20142SPaul Burtonconfig MIPS_GIC_IPI 224672e20142SPaul Burton bool 224772e20142SPaul Burton 22489f98f3ddSPaul Burtonconfig MIPS_CM 22499f98f3ddSPaul Burton bool 22509f98f3ddSPaul Burton 22519c38cf44SPaul Burtonconfig MIPS_CPC 22529c38cf44SPaul Burton bool 22532600990eSRalf Baechle 22541da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 22551da177e4SLinus Torvalds bool 22561da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 22571da177e4SLinus Torvalds default y 22581da177e4SLinus Torvalds 22591da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 22601da177e4SLinus Torvalds bool 22611da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 22621da177e4SLinus Torvalds default y 22631da177e4SLinus Torvalds 22641da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 22651da177e4SLinus Torvalds bool 22661da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 22671da177e4SLinus Torvalds default y 22681da177e4SLinus Torvalds 22692235a54dSSanjay Lal 227060ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 227134adb28dSRalf Baechle bool 227260ec6571Spascal@pabr.org 22739e2b5372SMarkos Chandraschoice 22749e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 22759e2b5372SMarkos Chandras 22769e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 22779e2b5372SMarkos Chandras bool "None" 22789e2b5372SMarkos Chandras help 22799e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 22809e2b5372SMarkos Chandras 22819693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 22829693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 22839e2b5372SMarkos Chandras bool "SmartMIPS" 22849693a853SFranck Bui-Huu help 22859693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 22869693a853SFranck Bui-Huu increased security at both hardware and software level for 22879693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 22889693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 22899693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 22909693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 22919693a853SFranck Bui-Huu here. 22929693a853SFranck Bui-Huu 2293bce86083SSteven J. Hillconfig CPU_MICROMIPS 22947fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 22959e2b5372SMarkos Chandras bool "microMIPS" 2296bce86083SSteven J. Hill help 2297bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2298bce86083SSteven J. Hill microMIPS ISA 2299bce86083SSteven J. Hill 23009e2b5372SMarkos Chandrasendchoice 23019e2b5372SMarkos Chandras 2302a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 23034af94d5dSPaul Burton bool "Support for the MIPS SIMD Architecture (EXPERIMENTAL)" 2304a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 23052a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2306a5e9a69eSPaul Burton help 2307a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2308a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 23091db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 23101db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 23111db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 23121db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 23131db1af84SPaul Burton the size & complexity of your kernel. 2314a5e9a69eSPaul Burton 2315a5e9a69eSPaul Burton If unsure, say Y. 2316a5e9a69eSPaul Burton 23171da177e4SLinus Torvaldsconfig CPU_HAS_WB 2318f7062ddbSRalf Baechle bool 2319e01402b1SRalf Baechle 2320df0ac8a4SKevin Cernekeeconfig XKS01 2321df0ac8a4SKevin Cernekee bool 2322df0ac8a4SKevin Cernekee 2323f41ae0b2SRalf Baechle# 2324f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2325f41ae0b2SRalf Baechle# 2326e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2327f41ae0b2SRalf Baechle bool 2328e01402b1SRalf Baechle 2329f41ae0b2SRalf Baechle# 2330f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2331f41ae0b2SRalf Baechle# 2332e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2333f41ae0b2SRalf Baechle bool 2334e01402b1SRalf Baechle 23351da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 23361da177e4SLinus Torvalds bool 23371da177e4SLinus Torvalds depends on !CPU_R3000 23381da177e4SLinus Torvalds default y 23391da177e4SLinus Torvalds 23401da177e4SLinus Torvalds# 234120d60d99SMaciej W. Rozycki# CPU non-features 234220d60d99SMaciej W. Rozycki# 234320d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 234420d60d99SMaciej W. Rozycki bool 234520d60d99SMaciej W. Rozycki 234620d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 234720d60d99SMaciej W. Rozycki bool 234820d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 234920d60d99SMaciej W. Rozycki 235020d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 235120d60d99SMaciej W. Rozycki bool 235220d60d99SMaciej W. Rozycki 235320d60d99SMaciej W. Rozycki# 23541da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 23551da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 23561da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 23571da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 23581da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 23591da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 23601da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 23611da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2362797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2363797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2364797798c1SRalf Baechle# support. 23651da177e4SLinus Torvalds# 23661da177e4SLinus Torvaldsconfig HIGHMEM 23671da177e4SLinus Torvalds bool "High Memory Support" 2368a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2369797798c1SRalf Baechle 2370797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2371797798c1SRalf Baechle bool 2372797798c1SRalf Baechle 2373797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2374797798c1SRalf Baechle bool 23751da177e4SLinus Torvalds 23769693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 23779693a853SFranck Bui-Huu bool 23789693a853SFranck Bui-Huu 2379a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2380a6a4834cSSteven J. Hill bool 2381a6a4834cSSteven J. Hill 2382377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2383377cb1b6SRalf Baechle bool 2384377cb1b6SRalf Baechle help 2385377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2386377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2387377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2388377cb1b6SRalf Baechle 2389a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2390a5e9a69eSPaul Burton bool 2391a5e9a69eSPaul Burton 2392b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2393b4819b59SYoichi Yuasa def_bool y 2394f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2395b4819b59SYoichi Yuasa 2396d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2397d8cb4e11SRalf Baechle bool 2398d8cb4e11SRalf Baechle default y if SGI_IP27 2399d8cb4e11SRalf Baechle help 24003dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2401d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2402d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2403d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2404d8cb4e11SRalf Baechle 2405b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2406b1c6cd42SAtsushi Nemoto bool 24077de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 240831473747SAtsushi Nemoto 2409d8cb4e11SRalf Baechleconfig NUMA 2410d8cb4e11SRalf Baechle bool "NUMA Support" 2411d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2412d8cb4e11SRalf Baechle help 2413d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2414d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2415d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2416d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2417d8cb4e11SRalf Baechle disabled. 2418d8cb4e11SRalf Baechle 2419d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2420d8cb4e11SRalf Baechle bool 2421d8cb4e11SRalf Baechle 2422c80d79d7SYasunori Gotoconfig NODES_SHIFT 2423c80d79d7SYasunori Goto int 2424c80d79d7SYasunori Goto default "6" 2425c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2426c80d79d7SYasunori Goto 242714f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 242814f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 2429f14ceff7SHuacai Chen depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) 243014f70012SDeng-Cheng Zhu default y 243114f70012SDeng-Cheng Zhu help 243214f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 243314f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 243414f70012SDeng-Cheng Zhu 2435b4819b59SYoichi Yuasasource "mm/Kconfig" 2436b4819b59SYoichi Yuasa 24371da177e4SLinus Torvaldsconfig SMP 24381da177e4SLinus Torvalds bool "Multi-Processing support" 2439e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2440e73ea273SRalf Baechle help 24411da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 24424a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 24434a474157SRobert Graffham than one CPU, say Y. 24441da177e4SLinus Torvalds 24454a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 24461da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 24471da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 24484a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 24491da177e4SLinus Torvalds will run faster if you say N here. 24501da177e4SLinus Torvalds 24511da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 24521da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 24531da177e4SLinus Torvalds 245403502faaSAdrian Bunk See also the SMP-HOWTO available at 245503502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 24561da177e4SLinus Torvalds 24571da177e4SLinus Torvalds If you don't know what to do here, say N. 24581da177e4SLinus Torvalds 245987353d8aSRalf Baechleconfig SMP_UP 246087353d8aSRalf Baechle bool 246187353d8aSRalf Baechle 24624a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 24634a16ff4cSRalf Baechle bool 24644a16ff4cSRalf Baechle 24650ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 24660ee958e1SPaul Burton bool 24670ee958e1SPaul Burton 2468e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2469e73ea273SRalf Baechle bool 2470e73ea273SRalf Baechle 2471130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2472130e2fb7SRalf Baechle bool 2473130e2fb7SRalf Baechle 2474130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2475130e2fb7SRalf Baechle bool 2476130e2fb7SRalf Baechle 2477130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2478130e2fb7SRalf Baechle bool 2479130e2fb7SRalf Baechle 2480130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2481130e2fb7SRalf Baechle bool 2482130e2fb7SRalf Baechle 2483130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2484130e2fb7SRalf Baechle bool 2485130e2fb7SRalf Baechle 24861da177e4SLinus Torvaldsconfig NR_CPUS 2487a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2488a91796a9SJayachandran C range 2 256 24891da177e4SLinus Torvalds depends on SMP 2490130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2491130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2492130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2493130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2494130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 24951da177e4SLinus Torvalds help 24961da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 24971da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 24981da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 249972ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 250072ede9b1SAtsushi Nemoto and 2 for all others. 25011da177e4SLinus Torvalds 25021da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 250372ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 250472ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 250572ede9b1SAtsushi Nemoto power of two. 25061da177e4SLinus Torvalds 2507399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2508399aaa25SAl Cooper bool 2509399aaa25SAl Cooper 25101723b4a3SAtsushi Nemoto# 25111723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 25121723b4a3SAtsushi Nemoto# 25131723b4a3SAtsushi Nemoto 25141723b4a3SAtsushi Nemotochoice 25151723b4a3SAtsushi Nemoto prompt "Timer frequency" 25161723b4a3SAtsushi Nemoto default HZ_250 25171723b4a3SAtsushi Nemoto help 25181723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 25191723b4a3SAtsushi Nemoto 25201723b4a3SAtsushi Nemoto config HZ_48 25210f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 25221723b4a3SAtsushi Nemoto 25231723b4a3SAtsushi Nemoto config HZ_100 25241723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 25251723b4a3SAtsushi Nemoto 25261723b4a3SAtsushi Nemoto config HZ_128 25271723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 25281723b4a3SAtsushi Nemoto 25291723b4a3SAtsushi Nemoto config HZ_250 25301723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 25311723b4a3SAtsushi Nemoto 25321723b4a3SAtsushi Nemoto config HZ_256 25331723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 25341723b4a3SAtsushi Nemoto 25351723b4a3SAtsushi Nemoto config HZ_1000 25361723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 25371723b4a3SAtsushi Nemoto 25381723b4a3SAtsushi Nemoto config HZ_1024 25391723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 25401723b4a3SAtsushi Nemoto 25411723b4a3SAtsushi Nemotoendchoice 25421723b4a3SAtsushi Nemoto 25431723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 25441723b4a3SAtsushi Nemoto bool 25451723b4a3SAtsushi Nemoto 25461723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 25471723b4a3SAtsushi Nemoto bool 25481723b4a3SAtsushi Nemoto 25491723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 25501723b4a3SAtsushi Nemoto bool 25511723b4a3SAtsushi Nemoto 25521723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 25531723b4a3SAtsushi Nemoto bool 25541723b4a3SAtsushi Nemoto 25551723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 25561723b4a3SAtsushi Nemoto bool 25571723b4a3SAtsushi Nemoto 25581723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 25591723b4a3SAtsushi Nemoto bool 25601723b4a3SAtsushi Nemoto 25611723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 25621723b4a3SAtsushi Nemoto bool 25631723b4a3SAtsushi Nemoto 25641723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 25651723b4a3SAtsushi Nemoto bool 25661723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 25671723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 25681723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 25691723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 25701723b4a3SAtsushi Nemoto 25711723b4a3SAtsushi Nemotoconfig HZ 25721723b4a3SAtsushi Nemoto int 25731723b4a3SAtsushi Nemoto default 48 if HZ_48 25741723b4a3SAtsushi Nemoto default 100 if HZ_100 25751723b4a3SAtsushi Nemoto default 128 if HZ_128 25761723b4a3SAtsushi Nemoto default 250 if HZ_250 25771723b4a3SAtsushi Nemoto default 256 if HZ_256 25781723b4a3SAtsushi Nemoto default 1000 if HZ_1000 25791723b4a3SAtsushi Nemoto default 1024 if HZ_1024 25801723b4a3SAtsushi Nemoto 258196685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 258296685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 258396685b17SDeng-Cheng Zhu 2584e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 25851da177e4SLinus Torvalds 2586ea6e942bSAtsushi Nemotoconfig KEXEC 25877d60717eSKees Cook bool "Kexec system call" 2588ea6e942bSAtsushi Nemoto help 2589ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2590ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 25913dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2592ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2593ea6e942bSAtsushi Nemoto 259401dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2595ea6e942bSAtsushi Nemoto 2596ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2597ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2598bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2599bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2600bf220695SGeert Uytterhoeven made. 2601ea6e942bSAtsushi Nemoto 26027aa1c8f4SRalf Baechleconfig CRASH_DUMP 26037aa1c8f4SRalf Baechle bool "Kernel crash dumps" 26047aa1c8f4SRalf Baechle help 26057aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 26067aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 26077aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 26087aa1c8f4SRalf Baechle a specially reserved region and then later executed after 26097aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 26107aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 26117aa1c8f4SRalf Baechle PHYSICAL_START. 26127aa1c8f4SRalf Baechle 26137aa1c8f4SRalf Baechleconfig PHYSICAL_START 26147aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 26157aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 26167aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 26177aa1c8f4SRalf Baechle depends on CRASH_DUMP 26187aa1c8f4SRalf Baechle help 26197aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 26207aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 26217aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 26227aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 26237aa1c8f4SRalf Baechle passed to the panic-ed kernel). 26247aa1c8f4SRalf Baechle 2625ea6e942bSAtsushi Nemotoconfig SECCOMP 2626ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2627293c5bd1SRalf Baechle depends on PROC_FS 2628ea6e942bSAtsushi Nemoto default y 2629ea6e942bSAtsushi Nemoto help 2630ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2631ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2632ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2633ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2634ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2635ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2636ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2637ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2638ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2639ea6e942bSAtsushi Nemoto 2640ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2641ea6e942bSAtsushi Nemoto 2642597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 264306e2e882SPaul Burton bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)" 2644597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2645597ce172SPaul Burton help 2646597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2647597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2648597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2649597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2650597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2651597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2652597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2653597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2654597ce172SPaul Burton saying N here. 2655597ce172SPaul Burton 265606e2e882SPaul Burton Although binutils currently supports use of this flag the details 265706e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 265806e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 265906e2e882SPaul Burton behaviour before the details have been finalised, this option should 266006e2e882SPaul Burton be considered experimental and only enabled by those working upon 266106e2e882SPaul Burton said details. 266206e2e882SPaul Burton 266306e2e882SPaul Burton If unsure, say N. 2664597ce172SPaul Burton 2665f2ffa5abSDezhong Diaoconfig USE_OF 26660b3e06fdSJonas Gorski bool 2667f2ffa5abSDezhong Diao select OF 2668e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2669abd2363fSGrant Likely select IRQ_DOMAIN 2670f2ffa5abSDezhong Diao 26717fafb068SAndrew Brestickerconfig BUILTIN_DTB 26727fafb068SAndrew Bresticker bool 26737fafb068SAndrew Bresticker 26745e83d430SRalf Baechleendmenu 26755e83d430SRalf Baechle 26761df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 26771df0f0ffSAtsushi Nemoto bool 26781df0f0ffSAtsushi Nemoto default y 26791df0f0ffSAtsushi Nemoto 26801df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 26811df0f0ffSAtsushi Nemoto bool 26821df0f0ffSAtsushi Nemoto default y 26831df0f0ffSAtsushi Nemoto 2684a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 2685a728ab52SKirill A. Shutemov int 2686a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 2687a728ab52SKirill A. Shutemov default 2 2688a728ab52SKirill A. Shutemov 2689b6c3539bSRalf Baechlesource "init/Kconfig" 2690b6c3539bSRalf Baechle 2691dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2692dc52ddc0SMatt Helsley 26931da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 26941da177e4SLinus Torvalds 26955e83d430SRalf Baechleconfig HW_HAS_EISA 26965e83d430SRalf Baechle bool 26971da177e4SLinus Torvaldsconfig HW_HAS_PCI 26981da177e4SLinus Torvalds bool 26991da177e4SLinus Torvalds 27001da177e4SLinus Torvaldsconfig PCI 27011da177e4SLinus Torvalds bool "Support for PCI controller" 27021da177e4SLinus Torvalds depends on HW_HAS_PCI 2703abb4ae46SRalf Baechle select PCI_DOMAINS 27040f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 27051da177e4SLinus Torvalds help 27061da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 27071da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 27081da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 27091da177e4SLinus Torvalds say Y, otherwise N. 27101da177e4SLinus Torvalds 27110e476d91SHuacai Chenconfig HT_PCI 27120e476d91SHuacai Chen bool "Support for HT-linked PCI" 27130e476d91SHuacai Chen default y 27140e476d91SHuacai Chen depends on CPU_LOONGSON3 27150e476d91SHuacai Chen select PCI 27160e476d91SHuacai Chen select PCI_DOMAINS 27170e476d91SHuacai Chen help 27180e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 27190e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 27200e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 27210e476d91SHuacai Chen 27221da177e4SLinus Torvaldsconfig PCI_DOMAINS 27231da177e4SLinus Torvalds bool 27241da177e4SLinus Torvalds 27251da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 27261da177e4SLinus Torvalds 27273f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 27283f787ca4SJonas Gorski 27291da177e4SLinus Torvalds# 27301da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 27311da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 27321da177e4SLinus Torvalds# users to choose the right thing ... 27331da177e4SLinus Torvalds# 27341da177e4SLinus Torvaldsconfig ISA 27351da177e4SLinus Torvalds bool 27361da177e4SLinus Torvalds 27371da177e4SLinus Torvaldsconfig EISA 27381da177e4SLinus Torvalds bool "EISA support" 27395e83d430SRalf Baechle depends on HW_HAS_EISA 27401da177e4SLinus Torvalds select ISA 2741aa414dffSRalf Baechle select GENERIC_ISA_DMA 27421da177e4SLinus Torvalds ---help--- 27431da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 27441da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 27451da177e4SLinus Torvalds 27461da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 27471da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 27481da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 27491da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 27501da177e4SLinus Torvalds 27511da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 27521da177e4SLinus Torvalds 27531da177e4SLinus Torvalds Otherwise, say N. 27541da177e4SLinus Torvalds 27551da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 27561da177e4SLinus Torvalds 27571da177e4SLinus Torvaldsconfig TC 27581da177e4SLinus Torvalds bool "TURBOchannel support" 27591da177e4SLinus Torvalds depends on MACH_DECSTATION 27601da177e4SLinus Torvalds help 276150a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 276250a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 276350a23e6eSJustin P. Mattock at: 276450a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 276550a23e6eSJustin P. Mattock and: 276650a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 276750a23e6eSJustin P. Mattock Linux driver support status is documented at: 276850a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 27691da177e4SLinus Torvalds 27701da177e4SLinus Torvaldsconfig MMU 27711da177e4SLinus Torvalds bool 27721da177e4SLinus Torvalds default y 27731da177e4SLinus Torvalds 2774d865bea4SRalf Baechleconfig I8253 2775d865bea4SRalf Baechle bool 2776798778b8SRussell King select CLKSRC_I8253 27772d02612fSThomas Gleixner select CLKEVT_I8253 27789726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2779d865bea4SRalf Baechle 2780e05eb3f8SRalf Baechleconfig ZONE_DMA 2781e05eb3f8SRalf Baechle bool 2782e05eb3f8SRalf Baechle 2783cce335aeSRalf Baechleconfig ZONE_DMA32 2784cce335aeSRalf Baechle bool 2785cce335aeSRalf Baechle 27861da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 27871da177e4SLinus Torvalds 27881da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 27891da177e4SLinus Torvalds 2790388b78adSAlexandre Bounineconfig RAPIDIO 279156abde72SAlexandre Bounine tristate "RapidIO support" 2792388b78adSAlexandre Bounine depends on PCI 2793388b78adSAlexandre Bounine default n 2794388b78adSAlexandre Bounine help 2795388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2796388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2797388b78adSAlexandre Bounine 2798388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2799388b78adSAlexandre Bounine 28001da177e4SLinus Torvaldsendmenu 28011da177e4SLinus Torvalds 28021da177e4SLinus Torvaldsmenu "Executable file formats" 28031da177e4SLinus Torvalds 28041da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 28051da177e4SLinus Torvalds 28061da177e4SLinus Torvaldsconfig TRAD_SIGNALS 28071da177e4SLinus Torvalds bool 28081da177e4SLinus Torvalds 28091da177e4SLinus Torvaldsconfig MIPS32_COMPAT 281078aaf956SRalf Baechle bool 28111da177e4SLinus Torvalds 28121da177e4SLinus Torvaldsconfig COMPAT 28131da177e4SLinus Torvalds bool 28141da177e4SLinus Torvalds 281505e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 281605e43966SAtsushi Nemoto bool 281705e43966SAtsushi Nemoto 28181da177e4SLinus Torvaldsconfig MIPS32_O32 28191da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 282078aaf956SRalf Baechle depends on 64BIT 282178aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 282278aaf956SRalf Baechle select COMPAT 282378aaf956SRalf Baechle select MIPS32_COMPAT 282478aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 28251da177e4SLinus Torvalds help 28261da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 28271da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 28281da177e4SLinus Torvalds existing binaries are in this format. 28291da177e4SLinus Torvalds 28301da177e4SLinus Torvalds If unsure, say Y. 28311da177e4SLinus Torvalds 28321da177e4SLinus Torvaldsconfig MIPS32_N32 28331da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 2834c22eacfeSRalf Baechle depends on 64BIT 283578aaf956SRalf Baechle select COMPAT 283678aaf956SRalf Baechle select MIPS32_COMPAT 283778aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 28381da177e4SLinus Torvalds help 28391da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 28401da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 28411da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 28421da177e4SLinus Torvalds cases. 28431da177e4SLinus Torvalds 28441da177e4SLinus Torvalds If unsure, say N. 28451da177e4SLinus Torvalds 28461da177e4SLinus Torvaldsconfig BINFMT_ELF32 28471da177e4SLinus Torvalds bool 28481da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 28491da177e4SLinus Torvalds 28502116245eSRalf Baechleendmenu 28511da177e4SLinus Torvalds 28522116245eSRalf Baechlemenu "Power management options" 2853952fa954SRodolfo Giometti 2854363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2855363c55caSWu Zhangjin def_bool y 28563f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2857363c55caSWu Zhangjin 2858f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2859f4cb5700SJohannes Berg def_bool y 28603f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2861f4cb5700SJohannes Berg 28622116245eSRalf Baechlesource "kernel/power/Kconfig" 2863952fa954SRodolfo Giometti 28641da177e4SLinus Torvaldsendmenu 28651da177e4SLinus Torvalds 28667a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 28677a998935SViresh Kumar bool 28687a998935SViresh Kumar 28697a998935SViresh Kumarmenu "CPU Power Management" 2870c095ebafSPaul Burton 2871c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 28727a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 28737a998935SViresh Kumarendif 28749726b43aSWu Zhangjin 2875c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 2876c095ebafSPaul Burton 2877c095ebafSPaul Burtonendmenu 2878c095ebafSPaul Burton 2879d5950b43SSam Ravnborgsource "net/Kconfig" 2880d5950b43SSam Ravnborg 28811da177e4SLinus Torvaldssource "drivers/Kconfig" 28821da177e4SLinus Torvalds 288398cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 288498cdee0eSRalf Baechle 28851da177e4SLinus Torvaldssource "fs/Kconfig" 28861da177e4SLinus Torvalds 28871da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 28881da177e4SLinus Torvalds 28891da177e4SLinus Torvaldssource "security/Kconfig" 28901da177e4SLinus Torvalds 28911da177e4SLinus Torvaldssource "crypto/Kconfig" 28921da177e4SLinus Torvalds 28931da177e4SLinus Torvaldssource "lib/Kconfig" 28942235a54dSSanjay Lal 28952235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 2896