1*4e07dba7SMichal Simek#include <linux/linkage.h> 2*4e07dba7SMichal Simek 3*4e07dba7SMichal Simek/* 4*4e07dba7SMichal Simek* modulo operation for 32 bit integers. 5*4e07dba7SMichal Simek* Input : op1 in Reg r5 6*4e07dba7SMichal Simek* op2 in Reg r6 7*4e07dba7SMichal Simek* Output: op1 mod op2 in Reg r3 8*4e07dba7SMichal Simek*/ 9*4e07dba7SMichal Simek 10*4e07dba7SMichal Simek .text 11*4e07dba7SMichal Simek .globl __modsi3 12*4e07dba7SMichal Simek .type __modsi3, @function 13*4e07dba7SMichal Simek .ent __modsi3 14*4e07dba7SMichal Simek 15*4e07dba7SMichal Simek__modsi3: 16*4e07dba7SMichal Simek .frame r1, 0, r15 17*4e07dba7SMichal Simek 18*4e07dba7SMichal Simek addik r1, r1, -16 19*4e07dba7SMichal Simek swi r28, r1, 0 20*4e07dba7SMichal Simek swi r29, r1, 4 21*4e07dba7SMichal Simek swi r30, r1, 8 22*4e07dba7SMichal Simek swi r31, r1, 12 23*4e07dba7SMichal Simek 24*4e07dba7SMichal Simek beqi r6, div_by_zero /* div_by_zero division error */ 25*4e07dba7SMichal Simek beqi r5, result_is_zero /* result is zero */ 26*4e07dba7SMichal Simek bgeid r5, r5_pos 27*4e07dba7SMichal Simek /* get the sign of the result [ depends only on the first arg] */ 28*4e07dba7SMichal Simek add r28, r5, r0 29*4e07dba7SMichal Simek rsubi r5, r5, 0 /* make r5 positive */ 30*4e07dba7SMichal Simekr5_pos: 31*4e07dba7SMichal Simek bgei r6, r6_pos 32*4e07dba7SMichal Simek rsubi r6, r6, 0 /* make r6 positive */ 33*4e07dba7SMichal Simekr6_pos: 34*4e07dba7SMichal Simek addik r3, r0, 0 /* clear mod */ 35*4e07dba7SMichal Simek addik r30, r0, 0 /* clear div */ 36*4e07dba7SMichal Simek addik r29, r0, 32 /* initialize the loop count */ 37*4e07dba7SMichal Simek/* first part try to find the first '1' in the r5 */ 38*4e07dba7SMichal Simekdiv1: 39*4e07dba7SMichal Simek add r5, r5, r5 /* left shift logical r5 */ 40*4e07dba7SMichal Simek bgeid r5, div1 41*4e07dba7SMichal Simek addik r29, r29, -1 42*4e07dba7SMichal Simekdiv2: 43*4e07dba7SMichal Simek /* left shift logical r5 get the '1' into the carry */ 44*4e07dba7SMichal Simek add r5, r5, r5 45*4e07dba7SMichal Simek addc r3, r3, r3 /* move that bit into the mod register */ 46*4e07dba7SMichal Simek rsub r31, r6, r3 /* try to subtract (r30 a r6) */ 47*4e07dba7SMichal Simek blti r31, mod_too_small 48*4e07dba7SMichal Simek /* move the r31 to mod since the result was positive */ 49*4e07dba7SMichal Simek or r3, r0, r31 50*4e07dba7SMichal Simek addik r30, r30, 1 51*4e07dba7SMichal Simekmod_too_small: 52*4e07dba7SMichal Simek addik r29, r29, -1 53*4e07dba7SMichal Simek beqi r29, loop_end 54*4e07dba7SMichal Simek add r30, r30, r30 /* shift in the '1' into div */ 55*4e07dba7SMichal Simek bri div2 /* div2 */ 56*4e07dba7SMichal Simekloop_end: 57*4e07dba7SMichal Simek bgei r28, return_here 58*4e07dba7SMichal Simek brid return_here 59*4e07dba7SMichal Simek rsubi r3, r3, 0 /* negate the result */ 60*4e07dba7SMichal Simekdiv_by_zero: 61*4e07dba7SMichal Simekresult_is_zero: 62*4e07dba7SMichal Simek or r3, r0, r0 /* set result to 0 [both mod as well as div are 0] */ 63*4e07dba7SMichal Simekreturn_here: 64*4e07dba7SMichal Simek/* restore values of csrs and that of r3 and the divisor and the dividend */ 65*4e07dba7SMichal Simek lwi r28, r1, 0 66*4e07dba7SMichal Simek lwi r29, r1, 4 67*4e07dba7SMichal Simek lwi r30, r1, 8 68*4e07dba7SMichal Simek lwi r31, r1, 12 69*4e07dba7SMichal Simek rtsd r15, 8 70*4e07dba7SMichal Simek addik r1, r1, 16 71*4e07dba7SMichal Simek 72*4e07dba7SMichal Simek.size __modsi3, . - __modsi3 73*4e07dba7SMichal Simek.end __modsi3 74