xref: /linux/arch/microblaze/kernel/entry.S (revision a234ca0faa65dcd5cc473915bd925130ebb7b74b)
1/*
2 * Low-level system-call handling, trap handlers and context-switching
3 *
4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2008-2009 PetaLogix
6 * Copyright (C) 2003		John Williams <jwilliams@itee.uq.edu.au>
7 * Copyright (C) 2001,2002	NEC Corporation
8 * Copyright (C) 2001,2002	Miles Bader <miles@gnu.org>
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file COPYING in the main directory of this
12 * archive for more details.
13 *
14 * Written by Miles Bader <miles@gnu.org>
15 * Heavily modified by John Williams for Microblaze
16 */
17
18#include <linux/sys.h>
19#include <linux/linkage.h>
20
21#include <asm/entry.h>
22#include <asm/current.h>
23#include <asm/processor.h>
24#include <asm/exceptions.h>
25#include <asm/asm-offsets.h>
26#include <asm/thread_info.h>
27
28#include <asm/page.h>
29#include <asm/unistd.h>
30
31#include <linux/errno.h>
32#include <asm/signal.h>
33
34#undef DEBUG
35
36/* The size of a state save frame. */
37#define STATE_SAVE_SIZE		(PT_SIZE + STATE_SAVE_ARG_SPACE)
38
39/* The offset of the struct pt_regs in a `state save frame' on the stack. */
40#define PTO	STATE_SAVE_ARG_SPACE /* 24 the space for args */
41
42#define C_ENTRY(name)	.globl name; .align 4; name
43
44/*
45 * Various ways of setting and clearing BIP in flags reg.
46 * This is mucky, but necessary using microblaze version that
47 * allows msr ops to write to BIP
48 */
49#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
50	.macro	clear_bip
51	msrclr	r0, MSR_BIP
52	.endm
53
54	.macro	set_bip
55	msrset	r0, MSR_BIP
56	.endm
57
58	.macro	clear_eip
59	msrclr	r0, MSR_EIP
60	.endm
61
62	.macro	set_ee
63	msrset	r0, MSR_EE
64	.endm
65
66	.macro	disable_irq
67	msrclr	r0, MSR_IE
68	.endm
69
70	.macro	enable_irq
71	msrset	r0, MSR_IE
72	.endm
73
74	.macro	set_ums
75	msrset	r0, MSR_UMS
76	msrclr	r0, MSR_VMS
77	.endm
78
79	.macro	set_vms
80	msrclr	r0, MSR_UMS
81	msrset	r0, MSR_VMS
82	.endm
83
84	.macro	clear_ums
85	msrclr	r0, MSR_UMS
86	.endm
87
88	.macro	clear_vms_ums
89	msrclr	r0, MSR_VMS | MSR_UMS
90	.endm
91#else
92	.macro	clear_bip
93	mfs	r11, rmsr
94	andi	r11, r11, ~MSR_BIP
95	mts	rmsr, r11
96	.endm
97
98	.macro	set_bip
99	mfs	r11, rmsr
100	ori	r11, r11, MSR_BIP
101	mts	rmsr, r11
102	.endm
103
104	.macro	clear_eip
105	mfs	r11, rmsr
106	andi	r11, r11, ~MSR_EIP
107	mts	rmsr, r11
108	.endm
109
110	.macro	set_ee
111	mfs	r11, rmsr
112	ori	r11, r11, MSR_EE
113	mts	rmsr, r11
114	.endm
115
116	.macro	disable_irq
117	mfs	r11, rmsr
118	andi	r11, r11, ~MSR_IE
119	mts	rmsr, r11
120	.endm
121
122	.macro	enable_irq
123	mfs	r11, rmsr
124	ori	r11, r11, MSR_IE
125	mts	rmsr, r11
126	.endm
127
128	.macro set_ums
129	mfs	r11, rmsr
130	ori	r11, r11, MSR_VMS
131	andni	r11, r11, MSR_UMS
132	mts	rmsr, r11
133	.endm
134
135	.macro	set_vms
136	mfs	r11, rmsr
137	ori	r11, r11, MSR_VMS
138	andni	r11, r11, MSR_UMS
139	mts	rmsr, r11
140	.endm
141
142	.macro	clear_ums
143	mfs	r11, rmsr
144	andni	r11, r11, MSR_UMS
145	mts	rmsr,r11
146	.endm
147
148	.macro	clear_vms_ums
149	mfs	r11, rmsr
150	andni	r11, r11, (MSR_VMS|MSR_UMS)
151	mts	rmsr,r11
152	.endm
153#endif
154
155/* Define how to call high-level functions. With MMU, virtual mode must be
156 * enabled when calling the high-level function. Clobbers R11.
157 * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL
158 */
159
160/* turn on virtual protected mode save */
161#define VM_ON		\
162	set_ums;	\
163	rted	r0, 2f;	\
164	nop; \
1652:
166
167/* turn off virtual protected mode save and user mode save*/
168#define VM_OFF			\
169	clear_vms_ums;		\
170	rted	r0, TOPHYS(1f);	\
171	nop; \
1721:
173
174#define SAVE_REGS \
175	swi	r2, r1, PTO+PT_R2;	/* Save SDA */			\
176	swi	r3, r1, PTO+PT_R3;					\
177	swi	r4, r1, PTO+PT_R4;					\
178	swi	r5, r1, PTO+PT_R5;					\
179	swi	r6, r1, PTO+PT_R6;					\
180	swi	r7, r1, PTO+PT_R7;					\
181	swi	r8, r1, PTO+PT_R8;					\
182	swi	r9, r1, PTO+PT_R9;					\
183	swi	r10, r1, PTO+PT_R10;					\
184	swi	r11, r1, PTO+PT_R11;	/* save clobbered regs after rval */\
185	swi	r12, r1, PTO+PT_R12;					\
186	swi	r13, r1, PTO+PT_R13;	/* Save SDA2 */			\
187	swi	r14, r1, PTO+PT_PC;	/* PC, before IRQ/trap */	\
188	swi	r15, r1, PTO+PT_R15;	/* Save LP */			\
189	swi	r18, r1, PTO+PT_R18;	/* Save asm scratch reg */	\
190	swi	r19, r1, PTO+PT_R19;					\
191	swi	r20, r1, PTO+PT_R20;					\
192	swi	r21, r1, PTO+PT_R21;					\
193	swi	r22, r1, PTO+PT_R22;					\
194	swi	r23, r1, PTO+PT_R23;					\
195	swi	r24, r1, PTO+PT_R24;					\
196	swi	r25, r1, PTO+PT_R25;					\
197	swi	r26, r1, PTO+PT_R26;					\
198	swi	r27, r1, PTO+PT_R27;					\
199	swi	r28, r1, PTO+PT_R28;					\
200	swi	r29, r1, PTO+PT_R29;					\
201	swi	r30, r1, PTO+PT_R30;					\
202	swi	r31, r1, PTO+PT_R31;	/* Save current task reg */	\
203	mfs	r11, rmsr;		/* save MSR */			\
204	swi	r11, r1, PTO+PT_MSR;
205
206#define RESTORE_REGS \
207	lwi	r11, r1, PTO+PT_MSR;					\
208	mts	rmsr , r11;						\
209	lwi	r2, r1, PTO+PT_R2;	/* restore SDA */		\
210	lwi	r3, r1, PTO+PT_R3;					\
211	lwi	r4, r1, PTO+PT_R4;					\
212	lwi	r5, r1, PTO+PT_R5;					\
213	lwi	r6, r1, PTO+PT_R6;					\
214	lwi	r7, r1, PTO+PT_R7;					\
215	lwi	r8, r1, PTO+PT_R8;					\
216	lwi	r9, r1, PTO+PT_R9;					\
217	lwi	r10, r1, PTO+PT_R10;					\
218	lwi	r11, r1, PTO+PT_R11;	/* restore clobbered regs after rval */\
219	lwi	r12, r1, PTO+PT_R12;					\
220	lwi	r13, r1, PTO+PT_R13;	/* restore SDA2 */		\
221	lwi	r14, r1, PTO+PT_PC;	/* RESTORE_LINK PC, before IRQ/trap */\
222	lwi	r15, r1, PTO+PT_R15;	/* restore LP */		\
223	lwi	r18, r1, PTO+PT_R18;	/* restore asm scratch reg */	\
224	lwi	r19, r1, PTO+PT_R19;					\
225	lwi	r20, r1, PTO+PT_R20;					\
226	lwi	r21, r1, PTO+PT_R21;					\
227	lwi	r22, r1, PTO+PT_R22;					\
228	lwi	r23, r1, PTO+PT_R23;					\
229	lwi	r24, r1, PTO+PT_R24;					\
230	lwi	r25, r1, PTO+PT_R25;					\
231	lwi	r26, r1, PTO+PT_R26;					\
232	lwi	r27, r1, PTO+PT_R27;					\
233	lwi	r28, r1, PTO+PT_R28;					\
234	lwi	r29, r1, PTO+PT_R29;					\
235	lwi	r30, r1, PTO+PT_R30;					\
236	lwi	r31, r1, PTO+PT_R31;	/* Restore cur task reg */
237
238#define SAVE_STATE	\
239	swi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */	\
240	/* See if already in kernel mode.*/				\
241	mfs	r1, rmsr;						\
242	andi	r1, r1, MSR_UMS;					\
243	bnei	r1, 1f;						\
244	/* Kernel-mode state save.  */					\
245	/* Reload kernel stack-ptr. */					\
246	lwi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP));			\
247	/* FIXME: I can add these two lines to one */			\
248	/* tophys(r1,r1); */						\
249	/* addik	r1, r1, -STATE_SAVE_SIZE; */			\
250	addik	r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; \
251	SAVE_REGS							\
252	brid	2f;							\
253	swi	r1, r1, PTO+PT_MODE; 	 				\
2541:	/* User-mode state save.  */					\
255	lwi	r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
256	tophys(r1,r1);							\
257	lwi	r1, r1, TS_THREAD_INFO;	/* get the thread info */	\
258	/* MS these three instructions can be added to one */		\
259	/* addik	r1, r1, THREAD_SIZE; */				\
260	/* tophys(r1,r1); */						\
261	/* addik	r1, r1, -STATE_SAVE_SIZE; */			\
262	addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; \
263	SAVE_REGS							\
264	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));			\
265	swi	r11, r1, PTO+PT_R1; /* Store user SP.  */		\
266	swi	r0, r1, PTO + PT_MODE; /* Was in user-mode.  */		\
267	/* MS: I am clearing UMS even in case when I come from kernel space */ \
268	clear_ums; 							\
2692:	lwi	CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
270
271.text
272
273/*
274 * User trap.
275 *
276 * System calls are handled here.
277 *
278 * Syscall protocol:
279 * Syscall number in r12, args in r5-r10
280 * Return value in r3
281 *
282 * Trap entered via brki instruction, so BIP bit is set, and interrupts
283 * are masked. This is nice, means we don't have to CLI before state save
284 */
285C_ENTRY(_user_exception):
286	addi	r14, r14, 4	/* return address is 4 byte after call */
287	swi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
288
289	lwi	r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
290	tophys(r1,r1);
291	lwi	r1, r1, TS_THREAD_INFO;	/* get stack from task_struct */
292	/* MS these three instructions can be added to one */
293	/* addik	r1, r1, THREAD_SIZE; */
294	/* tophys(r1,r1); */
295	/* addik	r1, r1, -STATE_SAVE_SIZE; */
296	addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE;
297	SAVE_REGS
298
299	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
300	swi	r11, r1, PTO+PT_R1;		/* Store user SP.  */
301	clear_ums;
302	lwi	CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
303	/* Save away the syscall number.  */
304	swi	r12, r1, PTO+PT_R0;
305	tovirt(r1,r1)
306
307/* where the trap should return need -8 to adjust for rtsd r15, 8*/
308/* Jump to the appropriate function for the system call number in r12
309 * (r12 is not preserved), or return an error if r12 is not valid. The LP
310 * register should point to the location where
311 * the called function should return.  [note that MAKE_SYS_CALL uses label 1] */
312
313	/* Step into virtual mode */
314	rtbd	r0, 3f
315	nop
3163:
317	lwi	r11, CURRENT_TASK, TS_THREAD_INFO /* get thread info */
318	lwi	r11, r11, TI_FLAGS	 /* get flags in thread info */
319	andi	r11, r11, _TIF_WORK_SYSCALL_MASK
320	beqi	r11, 4f
321
322	addik	r3, r0, -ENOSYS
323	swi	r3, r1, PTO + PT_R3
324	brlid	r15, do_syscall_trace_enter
325	addik	r5, r1, PTO + PT_R0
326
327	# do_syscall_trace_enter returns the new syscall nr.
328	addk	r12, r0, r3
329	lwi	r5, r1, PTO+PT_R5;
330	lwi	r6, r1, PTO+PT_R6;
331	lwi	r7, r1, PTO+PT_R7;
332	lwi	r8, r1, PTO+PT_R8;
333	lwi	r9, r1, PTO+PT_R9;
334	lwi	r10, r1, PTO+PT_R10;
3354:
336/* Jump to the appropriate function for the system call number in r12
337 * (r12 is not preserved), or return an error if r12 is not valid.
338 * The LP register should point to the location where the called function
339 * should return.  [note that MAKE_SYS_CALL uses label 1] */
340	/* See if the system call number is valid */
341	addi	r11, r12, -__NR_syscalls;
342	bgei	r11,5f;
343	/* Figure out which function to use for this system call.  */
344	/* Note Microblaze barrel shift is optional, so don't rely on it */
345	add	r12, r12, r12;			/* convert num -> ptr */
346	add	r12, r12, r12;
347
348#ifdef DEBUG
349	/* Trac syscalls and stored them to r0_ram */
350	lwi	r3, r12, 0x400 + r0_ram
351	addi	r3, r3, 1
352	swi	r3, r12, 0x400 + r0_ram
353#endif
354
355	# Find and jump into the syscall handler.
356	lwi	r12, r12, sys_call_table
357	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
358	addi	r15, r0, ret_from_trap-8
359	bra	r12
360
361	/* The syscall number is invalid, return an error.  */
3625:
363	rtsd	r15, 8;		/* looks like a normal subroutine return */
364	addi	r3, r0, -ENOSYS;
365
366/* Entry point used to return from a syscall/trap */
367/* We re-enable BIP bit before state restore */
368C_ENTRY(ret_from_trap):
369	swi	r3, r1, PTO + PT_R3
370	swi	r4, r1, PTO + PT_R4
371
372	/* We're returning to user mode, so check for various conditions that
373	 * trigger rescheduling. */
374	/* FIXME: Restructure all these flag checks. */
375	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
376	lwi	r11, r11, TI_FLAGS;		/* get flags in thread info */
377	andi	r11, r11, _TIF_WORK_SYSCALL_MASK
378	beqi	r11, 1f
379
380	brlid	r15, do_syscall_trace_leave
381	addik	r5, r1, PTO + PT_R0
3821:
383	/* We're returning to user mode, so check for various conditions that
384	 * trigger rescheduling. */
385	/* get thread info from current task */
386	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;
387	lwi	r11, r11, TI_FLAGS;		/* get flags in thread info */
388	andi	r11, r11, _TIF_NEED_RESCHED;
389	beqi	r11, 5f;
390
391	bralid	r15, schedule;	/* Call scheduler */
392	nop;				/* delay slot */
393
394	/* Maybe handle a signal */
3955:	/* get thread info from current task*/
396	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;
397	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */
398	andi	r11, r11, _TIF_SIGPENDING;
399	beqi	r11, 1f;		/* Signals to handle, handle them */
400
401	addik	r5, r1, PTO;		/* Arg 1: struct pt_regs *regs */
402	addi	r7, r0, 1;		/* Arg 3: int in_syscall */
403	bralid	r15, do_signal;	/* Handle any signals */
404	add	r6, r0, r0;		/* Arg 2: sigset_t *oldset */
405
406/* Finally, return to user state.  */
4071:	set_bip;			/*  Ints masked for state restore */
408	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
409	VM_OFF;
410	tophys(r1,r1);
411	RESTORE_REGS;
412	addik	r1, r1, STATE_SAVE_SIZE		/* Clean up stack space.  */
413	lwi	r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */
414TRAP_return:		/* Make global symbol for debugging */
415	rtbd	r14, 0;	/* Instructions to return from an IRQ */
416	nop;
417
418
419/* These syscalls need access to the struct pt_regs on the stack, so we
420   implement them in assembly (they're basically all wrappers anyway).  */
421
422C_ENTRY(sys_fork_wrapper):
423	addi	r5, r0, SIGCHLD			/* Arg 0: flags */
424	lwi	r6, r1, PTO+PT_R1	/* Arg 1: child SP (use parent's) */
425	addik	r7, r1, PTO			/* Arg 2: parent context */
426	add	r8. r0, r0			/* Arg 3: (unused) */
427	add	r9, r0, r0;			/* Arg 4: (unused) */
428	brid	do_fork		/* Do real work (tail-call) */
429	add	r10, r0, r0;			/* Arg 5: (unused) */
430
431/* This the initial entry point for a new child thread, with an appropriate
432   stack in place that makes it look the the child is in the middle of an
433   syscall.  This function is actually `returned to' from switch_thread
434   (copy_thread makes ret_from_fork the return address in each new thread's
435   saved context).  */
436C_ENTRY(ret_from_fork):
437	bralid	r15, schedule_tail; /* ...which is schedule_tail's arg */
438	add	r3, r5, r0;	/* switch_thread returns the prev task */
439				/* ( in the delay slot ) */
440	brid	ret_from_trap;	/* Do normal trap return */
441	add	r3, r0, r0;	/* Child's fork call should return 0. */
442
443C_ENTRY(sys_vfork):
444	brid	microblaze_vfork	/* Do real work (tail-call) */
445	addik	r5, r1, PTO
446
447C_ENTRY(sys_clone):
448	bnei	r6, 1f;			/* See if child SP arg (arg 1) is 0. */
449	lwi	r6, r1, PTO + PT_R1;	/* If so, use paret's stack ptr */
4501:	addik	r7, r1, PTO;			/* Arg 2: parent context */
451	add	r8, r0, r0;			/* Arg 3: (unused) */
452	add	r9, r0, r0;			/* Arg 4: (unused) */
453	brid	do_fork		/* Do real work (tail-call) */
454	add	r10, r0, r0;			/* Arg 5: (unused) */
455
456C_ENTRY(sys_execve):
457	brid	microblaze_execve;	/* Do real work (tail-call).*/
458	addik	r8, r1, PTO;		/* add user context as 4th arg */
459
460C_ENTRY(sys_rt_sigreturn_wrapper):
461	swi	r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
462	swi	r4, r1, PTO+PT_R4;
463	brlid	r15, sys_rt_sigreturn	/* Do real work */
464	addik	r5, r1, PTO;		/* add user context as 1st arg */
465	lwi	r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
466	lwi	r4, r1, PTO+PT_R4;
467	bri ret_from_trap /* fall through will not work here due to align */
468	nop;
469
470/*
471 * HW EXCEPTION rutine start
472 */
473C_ENTRY(full_exception_trap):
474	/* adjust exception address for privileged instruction
475	 * for finding where is it */
476	addik	r17, r17, -4
477	SAVE_STATE /* Save registers */
478	/* PC, before IRQ/trap - this is one instruction above */
479	swi	r17, r1, PTO+PT_PC;
480	tovirt(r1,r1)
481	/* FIXME this can be store directly in PT_ESR reg.
482	 * I tested it but there is a fault */
483	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
484	addik	r15, r0, ret_from_exc - 8
485	mfs	r6, resr
486	mfs	r7, rfsr;		/* save FSR */
487	mts	rfsr, r0;	/* Clear sticky fsr */
488	rted	r0, full_exception
489	addik	r5, r1, PTO		 /* parameter struct pt_regs * regs */
490
491/*
492 * Unaligned data trap.
493 *
494 * Unaligned data trap last on 4k page is handled here.
495 *
496 * Trap entered via exception, so EE bit is set, and interrupts
497 * are masked.  This is nice, means we don't have to CLI before state save
498 *
499 * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S"
500 */
501C_ENTRY(unaligned_data_trap):
502	/* MS: I have to save r11 value and then restore it because
503	 * set_bit, clear_eip, set_ee use r11 as temp register if MSR
504	 * instructions are not used. We don't need to do if MSR instructions
505	 * are used and they use r0 instead of r11.
506	 * I am using ENTRY_SP which should be primary used only for stack
507	 * pointer saving. */
508	swi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
509	set_bip;        /* equalize initial state for all possible entries */
510	clear_eip;
511	set_ee;
512	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
513	SAVE_STATE		/* Save registers.*/
514	/* PC, before IRQ/trap - this is one instruction above */
515	swi	r17, r1, PTO+PT_PC;
516	tovirt(r1,r1)
517	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
518	addik	r15, r0, ret_from_exc-8
519	mfs	r3, resr		/* ESR */
520	mfs	r4, rear		/* EAR */
521	rtbd	r0, _unaligned_data_exception
522	addik	r7, r1, PTO		/* parameter struct pt_regs * regs */
523
524/*
525 * Page fault traps.
526 *
527 * If the real exception handler (from hw_exception_handler.S) didn't find
528 * the mapping for the process, then we're thrown here to handle such situation.
529 *
530 * Trap entered via exceptions, so EE bit is set, and interrupts
531 * are masked.  This is nice, means we don't have to CLI before state save
532 *
533 * Build a standard exception frame for TLB Access errors.  All TLB exceptions
534 * will bail out to this point if they can't resolve the lightweight TLB fault.
535 *
536 * The C function called is in "arch/microblaze/mm/fault.c", declared as:
537 * void do_page_fault(struct pt_regs *regs,
538 *				unsigned long address,
539 *				unsigned long error_code)
540 */
541/* data and intruction trap - which is choose is resolved int fault.c */
542C_ENTRY(page_fault_data_trap):
543	SAVE_STATE		/* Save registers.*/
544	/* PC, before IRQ/trap - this is one instruction above */
545	swi	r17, r1, PTO+PT_PC;
546	tovirt(r1,r1)
547	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
548	addik	r15, r0, ret_from_exc-8
549	mfs	r6, rear		/* parameter unsigned long address */
550	mfs	r7, resr		/* parameter unsigned long error_code */
551	rted	r0, do_page_fault
552	addik	r5, r1, PTO		/* parameter struct pt_regs * regs */
553
554C_ENTRY(page_fault_instr_trap):
555	SAVE_STATE		/* Save registers.*/
556	/* PC, before IRQ/trap - this is one instruction above */
557	swi	r17, r1, PTO+PT_PC;
558	tovirt(r1,r1)
559	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
560	addik	r15, r0, ret_from_exc-8
561	mfs	r6, rear		/* parameter unsigned long address */
562	ori	r7, r0, 0		/* parameter unsigned long error_code */
563	rted	r0, do_page_fault
564	addik	r5, r1, PTO		/* parameter struct pt_regs * regs */
565
566/* Entry point used to return from an exception.  */
567C_ENTRY(ret_from_exc):
568	lwi	r11, r1, PTO + PT_MODE;
569	bnei	r11, 2f;		/* See if returning to kernel mode, */
570					/* ... if so, skip resched &c.  */
571
572	/* We're returning to user mode, so check for various conditions that
573	   trigger rescheduling. */
574	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
575	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */
576	andi	r11, r11, _TIF_NEED_RESCHED;
577	beqi	r11, 5f;
578
579/* Call the scheduler before returning from a syscall/trap. */
580	bralid	r15, schedule;	/* Call scheduler */
581	nop;				/* delay slot */
582
583	/* Maybe handle a signal */
5845:	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
585	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */
586	andi	r11, r11, _TIF_SIGPENDING;
587	beqi	r11, 1f;		/* Signals to handle, handle them */
588
589	/*
590	 * Handle a signal return; Pending signals should be in r18.
591	 *
592	 * Not all registers are saved by the normal trap/interrupt entry
593	 * points (for instance, call-saved registers (because the normal
594	 * C-compiler calling sequence in the kernel makes sure they're
595	 * preserved), and call-clobbered registers in the case of
596	 * traps), but signal handlers may want to examine or change the
597	 * complete register state.  Here we save anything not saved by
598	 * the normal entry sequence, so that it may be safely restored
599	 * (in a possibly modified form) after do_signal returns. */
600	addik	r5, r1, PTO;		/* Arg 1: struct pt_regs *regs */
601	addi	r7, r0, 0;		/* Arg 3: int in_syscall */
602	bralid	r15, do_signal;	/* Handle any signals */
603	add	r6, r0, r0;		/* Arg 2: sigset_t *oldset */
604
605/* Finally, return to user state.  */
6061:	set_bip;			/* Ints masked for state restore */
607	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
608	VM_OFF;
609	tophys(r1,r1);
610
611	RESTORE_REGS;
612	addik	r1, r1, STATE_SAVE_SIZE		/* Clean up stack space.  */
613
614	lwi	r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */
615	bri	6f;
616/* Return to kernel state.  */
6172:	set_bip;			/* Ints masked for state restore */
618	VM_OFF;
619	tophys(r1,r1);
620	RESTORE_REGS;
621	addik	r1, r1, STATE_SAVE_SIZE		/* Clean up stack space.  */
622
623	tovirt(r1,r1);
6246:
625EXC_return:		/* Make global symbol for debugging */
626	rtbd	r14, 0;	/* Instructions to return from an IRQ */
627	nop;
628
629/*
630 * HW EXCEPTION rutine end
631 */
632
633/*
634 * Hardware maskable interrupts.
635 *
636 * The stack-pointer (r1) should have already been saved to the memory
637 * location PER_CPU(ENTRY_SP).
638 */
639C_ENTRY(_interrupt):
640/* MS: we are in physical address */
641/* Save registers, switch to proper stack, convert SP to virtual.*/
642	swi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
643	/* MS: See if already in kernel mode. */
644	mfs	r1, rmsr
645	nop
646	andi	r1, r1, MSR_UMS
647	bnei	r1, 1f
648
649/* Kernel-mode state save. */
650	lwi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
651	tophys(r1,r1); /* MS: I have in r1 physical address where stack is */
652	/* save registers */
653/* MS: Make room on the stack -> activation record */
654	addik	r1, r1, -STATE_SAVE_SIZE;
655	SAVE_REGS
656	brid	2f;
657	swi	r1, r1, PTO + PT_MODE; /* 0 - user mode, 1 - kernel mode */
6581:
659/* User-mode state save. */
660 /* MS: get the saved current */
661	lwi	r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
662	tophys(r1,r1);
663	lwi	r1, r1, TS_THREAD_INFO;
664	addik	r1, r1, THREAD_SIZE;
665	tophys(r1,r1);
666	/* save registers */
667	addik	r1, r1, -STATE_SAVE_SIZE;
668	SAVE_REGS
669	/* calculate mode */
670	swi	r0, r1, PTO + PT_MODE;
671	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
672	swi	r11, r1, PTO+PT_R1;
673	clear_ums;
6742:
675	lwi	CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
676	tovirt(r1,r1)
677	addik	r15, r0, irq_call;
678irq_call:rtbd	r0, do_IRQ;
679	addik	r5, r1, PTO;
680
681/* MS: we are in virtual mode */
682ret_from_irq:
683	lwi	r11, r1, PTO + PT_MODE;
684	bnei	r11, 2f;
685
686	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;
687	lwi	r11, r11, TI_FLAGS; /* MS: get flags from thread info */
688	andi	r11, r11, _TIF_NEED_RESCHED;
689	beqi	r11, 5f
690	bralid	r15, schedule;
691	nop; /* delay slot */
692
693    /* Maybe handle a signal */
6945:	lwi	r11, CURRENT_TASK, TS_THREAD_INFO; /* MS: get thread info */
695	lwi	r11, r11, TI_FLAGS; /* get flags in thread info */
696	andi	r11, r11, _TIF_SIGPENDING;
697	beqid	r11, no_intr_resched
698/* Handle a signal return; Pending signals should be in r18. */
699	addi	r7, r0, 0; /* Arg 3: int in_syscall */
700	addik	r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
701	bralid	r15, do_signal;	/* Handle any signals */
702	add	r6, r0, r0; /* Arg 2: sigset_t *oldset */
703
704/* Finally, return to user state. */
705no_intr_resched:
706    /* Disable interrupts, we are now committed to the state restore */
707	disable_irq
708	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE);
709	VM_OFF;
710	tophys(r1,r1);
711	RESTORE_REGS
712	addik	r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
713	lwi	r1, r1, PT_R1 - PT_SIZE;
714	bri	6f;
715/* MS: Return to kernel state. */
7162:
717#ifdef CONFIG_PREEMPT
718	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;
719	/* MS: get preempt_count from thread info */
720	lwi	r5, r11, TI_PREEMPT_COUNT;
721	bgti	r5, restore;
722
723	lwi	r5, r11, TI_FLAGS;		/* get flags in thread info */
724	andi	r5, r5, _TIF_NEED_RESCHED;
725	beqi	r5, restore /* if zero jump over */
726
727preempt:
728	/* interrupts are off that's why I am calling preempt_chedule_irq */
729	bralid	r15, preempt_schedule_irq
730	nop
731	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
732	lwi	r5, r11, TI_FLAGS;		/* get flags in thread info */
733	andi	r5, r5, _TIF_NEED_RESCHED;
734	bnei	r5, preempt /* if non zero jump to resched */
735restore:
736#endif
737	VM_OFF /* MS: turn off MMU */
738	tophys(r1,r1)
739	RESTORE_REGS
740	addik	r1, r1, STATE_SAVE_SIZE	/* MS: Clean up stack space. */
741	tovirt(r1,r1);
7426:
743IRQ_return: /* MS: Make global symbol for debugging */
744	rtid	r14, 0
745	nop
746
747/*
748 * Debug trap for KGDB. Enter to _debug_exception by brki r16, 0x18
749 * and call handling function with saved pt_regs
750 */
751C_ENTRY(_debug_exception):
752	/* BIP bit is set on entry, no interrupts can occur */
753	swi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
754
755	mfs	r1, rmsr
756	nop
757	andi	r1, r1, MSR_UMS
758	bnei	r1, 1f
759/* MS: Kernel-mode state save - kgdb */
760	lwi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
761
762	/* BIP bit is set on entry, no interrupts can occur */
763	addik   r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE;
764	SAVE_REGS;
765	/* save all regs to pt_reg structure */
766	swi	r0, r1, PTO+PT_R0;	/* R0 must be saved too */
767	swi	r14, r1, PTO+PT_R14	/* rewrite saved R14 value */
768	swi	r16, r1, PTO+PT_R16
769	swi	r16, r1, PTO+PT_PC; /* PC and r16 are the same */
770	swi	r17, r1, PTO+PT_R17
771	/* save special purpose registers to pt_regs */
772	mfs	r11, rear;
773	swi	r11, r1, PTO+PT_EAR;
774	mfs	r11, resr;
775	swi	r11, r1, PTO+PT_ESR;
776	mfs	r11, rfsr;
777	swi	r11, r1, PTO+PT_FSR;
778
779	/* stack pointer is in physical address at it is decrease
780	 * by STATE_SAVE_SIZE but we need to get correct R1 value */
781	addik   r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + STATE_SAVE_SIZE;
782	swi	r11, r1, PTO+PT_R1
783	/* MS: r31 - current pointer isn't changed */
784	tovirt(r1,r1)
785#ifdef CONFIG_KGDB
786	addi	r5, r1, PTO /* pass pt_reg address as the first arg */
787	la	r15, r0, dbtrap_call; /* return address */
788	rtbd	r0, microblaze_kgdb_break
789	nop;
790#endif
791	/* MS: Place handler for brki from kernel space if KGDB is OFF.
792	 * It is very unlikely that another brki instruction is called. */
793	bri 0
794
795/* MS: User-mode state save - gdb */
7961:	lwi	r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
797	tophys(r1,r1);
798	lwi	r1, r1, TS_THREAD_INFO;	/* get the thread info */
799	addik	r1, r1, THREAD_SIZE;	/* calculate kernel stack pointer */
800	tophys(r1,r1);
801
802	addik	r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack.  */
803	SAVE_REGS;
804	swi	r17, r1, PTO+PT_R17;
805	swi	r16, r1, PTO+PT_R16;
806	swi	r16, r1, PTO+PT_PC;	/* Save LP */
807	swi	r0, r1, PTO + PT_MODE; /* Was in user-mode.  */
808	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
809	swi	r11, r1, PTO+PT_R1; /* Store user SP.  */
810	lwi	CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
811	tovirt(r1,r1)
812	set_vms;
813	addik	r5, r1, PTO;
814	addik	r15, r0, dbtrap_call;
815dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
816	rtbd	r0, sw_exception
817	nop
818
819	/* MS: The first instruction for the second part of the gdb/kgdb */
820	set_bip; /* Ints masked for state restore */
821	lwi	r11, r1, PTO + PT_MODE;
822	bnei	r11, 2f;
823/* MS: Return to user space - gdb */
824	/* Get current task ptr into r11 */
825	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
826	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */
827	andi	r11, r11, _TIF_NEED_RESCHED;
828	beqi	r11, 5f;
829
830	/* Call the scheduler before returning from a syscall/trap. */
831	bralid	r15, schedule;	/* Call scheduler */
832	nop;				/* delay slot */
833
834	/* Maybe handle a signal */
8355:	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
836	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */
837	andi	r11, r11, _TIF_SIGPENDING;
838	beqi	r11, 1f;		/* Signals to handle, handle them */
839
840	addik	r5, r1, PTO;		/* Arg 1: struct pt_regs *regs */
841	addi  r7, r0, 0;	/* Arg 3: int in_syscall */
842	bralid	r15, do_signal;	/* Handle any signals */
843	add	r6, r0, r0;		/* Arg 2: sigset_t *oldset */
844
845/* Finally, return to user state.  */
8461:	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
847	VM_OFF;
848	tophys(r1,r1);
849	/* MS: Restore all regs */
850	RESTORE_REGS
851	lwi	r17, r1, PTO+PT_R17;
852	lwi	r16, r1, PTO+PT_R16;
853	addik	r1, r1, STATE_SAVE_SIZE	 /* Clean up stack space */
854	lwi	r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer */
855DBTRAP_return_user: /* MS: Make global symbol for debugging */
856	rtbd	r16, 0; /* MS: Instructions to return from a debug trap */
857	nop;
858
859/* MS: Return to kernel state - kgdb */
8602:	VM_OFF;
861	tophys(r1,r1);
862	/* MS: Restore all regs */
863	RESTORE_REGS
864	lwi	r14, r1, PTO+PT_R14;
865	lwi	r16, r1, PTO+PT_PC;
866	lwi	r17, r1, PTO+PT_R17;
867	addik	r1, r1, STATE_SAVE_SIZE; /* MS: Clean up stack space */
868	tovirt(r1,r1);
869DBTRAP_return_kernel: /* MS: Make global symbol for debugging */
870	rtbd	r16, 0; /* MS: Instructions to return from a debug trap */
871	nop;
872
873
874ENTRY(_switch_to)
875	/* prepare return value */
876	addk	r3, r0, CURRENT_TASK
877
878	/* save registers in cpu_context */
879	/* use r11 and r12, volatile registers, as temp register */
880	/* give start of cpu_context for previous process */
881	addik	r11, r5, TI_CPU_CONTEXT
882	swi	r1, r11, CC_R1
883	swi	r2, r11, CC_R2
884	/* skip volatile registers.
885	 * they are saved on stack when we jumped to _switch_to() */
886	/* dedicated registers */
887	swi	r13, r11, CC_R13
888	swi	r14, r11, CC_R14
889	swi	r15, r11, CC_R15
890	swi	r16, r11, CC_R16
891	swi	r17, r11, CC_R17
892	swi	r18, r11, CC_R18
893	/* save non-volatile registers */
894	swi	r19, r11, CC_R19
895	swi	r20, r11, CC_R20
896	swi	r21, r11, CC_R21
897	swi	r22, r11, CC_R22
898	swi	r23, r11, CC_R23
899	swi	r24, r11, CC_R24
900	swi	r25, r11, CC_R25
901	swi	r26, r11, CC_R26
902	swi	r27, r11, CC_R27
903	swi	r28, r11, CC_R28
904	swi	r29, r11, CC_R29
905	swi	r30, r11, CC_R30
906	/* special purpose registers */
907	mfs	r12, rmsr
908	swi	r12, r11, CC_MSR
909	mfs	r12, rear
910	swi	r12, r11, CC_EAR
911	mfs	r12, resr
912	swi	r12, r11, CC_ESR
913	mfs	r12, rfsr
914	swi	r12, r11, CC_FSR
915
916	/* update r31, the current-give me pointer to task which will be next */
917	lwi	CURRENT_TASK, r6, TI_TASK
918	/* stored it to current_save too */
919	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE)
920
921	/* get new process' cpu context and restore */
922	/* give me start where start context of next task */
923	addik	r11, r6, TI_CPU_CONTEXT
924
925	/* non-volatile registers */
926	lwi	r30, r11, CC_R30
927	lwi	r29, r11, CC_R29
928	lwi	r28, r11, CC_R28
929	lwi	r27, r11, CC_R27
930	lwi	r26, r11, CC_R26
931	lwi	r25, r11, CC_R25
932	lwi	r24, r11, CC_R24
933	lwi	r23, r11, CC_R23
934	lwi	r22, r11, CC_R22
935	lwi	r21, r11, CC_R21
936	lwi	r20, r11, CC_R20
937	lwi	r19, r11, CC_R19
938	/* dedicated registers */
939	lwi	r18, r11, CC_R18
940	lwi	r17, r11, CC_R17
941	lwi	r16, r11, CC_R16
942	lwi	r15, r11, CC_R15
943	lwi	r14, r11, CC_R14
944	lwi	r13, r11, CC_R13
945	/* skip volatile registers */
946	lwi	r2, r11, CC_R2
947	lwi	r1, r11, CC_R1
948
949	/* special purpose registers */
950	lwi	r12, r11, CC_FSR
951	mts	rfsr, r12
952	lwi	r12, r11, CC_MSR
953	mts	rmsr, r12
954
955	rtsd	r15, 8
956	nop
957
958ENTRY(_reset)
959	brai	0x70; /* Jump back to FS-boot */
960
961	/* These are compiled and loaded into high memory, then
962	 * copied into place in mach_early_setup */
963	.section	.init.ivt, "ax"
964	.org	0x0
965	/* this is very important - here is the reset vector */
966	/* in current MMU branch you don't care what is here - it is
967	 * used from bootloader site - but this is correct for FS-BOOT */
968	brai	0x70
969	nop
970	brai	TOPHYS(_user_exception); /* syscall handler */
971	brai	TOPHYS(_interrupt);	/* Interrupt handler */
972	brai	TOPHYS(_debug_exception);	/* debug trap handler */
973	brai	TOPHYS(_hw_exception_handler);	/* HW exception handler */
974
975.section .rodata,"a"
976#include "syscall_table.S"
977
978syscall_table_size=(.-sys_call_table)
979
980type_SYSCALL:
981	.ascii "SYSCALL\0"
982type_IRQ:
983	.ascii "IRQ\0"
984type_IRQ_PREEMPT:
985	.ascii "IRQ (PREEMPTED)\0"
986type_SYSCALL_PREEMPT:
987	.ascii " SYSCALL (PREEMPTED)\0"
988
989	/*
990	 * Trap decoding for stack unwinder
991	 * Tuples are (start addr, end addr, string)
992	 * If return address lies on [start addr, end addr],
993	 * unwinder displays 'string'
994	 */
995
996	.align 4
997.global microblaze_trap_handlers
998microblaze_trap_handlers:
999	/* Exact matches come first */
1000	.word ret_from_trap; .word ret_from_trap   ; .word type_SYSCALL
1001	.word ret_from_irq ; .word ret_from_irq    ; .word type_IRQ
1002	/* Fuzzy matches go here */
1003	.word ret_from_irq ; .word no_intr_resched ; .word type_IRQ_PREEMPT
1004	.word ret_from_trap; .word TRAP_return     ; .word type_SYSCALL_PREEMPT
1005	/* End of table */
1006	.word 0               ; .word 0               ; .word 0
1007