xref: /linux/arch/microblaze/include/asm/cacheflush.h (revision 3252b11fc4790d046b93f300c898df2f7cd7c176)
1 /*
2  * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3  * Copyright (C) 2007-2009 PetaLogix
4  * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
5  * based on v850 version which was
6  * Copyright (C) 2001,02,03 NEC Electronics Corporation
7  * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
8  *
9  * This file is subject to the terms and conditions of the GNU General
10  * Public License. See the file COPYING in the main directory of this
11  * archive for more details.
12  *
13  */
14 
15 #ifndef _ASM_MICROBLAZE_CACHEFLUSH_H
16 #define _ASM_MICROBLAZE_CACHEFLUSH_H
17 
18 /* Somebody depends on this; sigh... */
19 #include <linux/mm.h>
20 
21 /*
22  * Cache handling functions.
23  * Microblaze has a write-through data cache, meaning that the data cache
24  * never needs to be flushed.  The only flushing operations that are
25  * implemented are to invalidate the instruction cache.  These are called
26  * after loading a user application into memory, we must invalidate the
27  * instruction cache to make sure we don't fetch old, bad code.
28  */
29 
30 /* FIXME for LL-temac driver */
31 #define invalidate_dcache_range(start, end) \
32 			__invalidate_dcache_range(start, end)
33 
34 #define flush_cache_all()			__invalidate_cache_all()
35 #define flush_cache_mm(mm)			do { } while (0)
36 #define flush_cache_range(vma, start, end)	__invalidate_cache_all()
37 #define flush_cache_page(vma, vmaddr, pfn)	do { } while (0)
38 
39 #define flush_dcache_range(start, end)	__invalidate_dcache_range(start, end)
40 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
41 #define flush_dcache_page(page)			do { } while (0)
42 #define flush_dcache_mmap_lock(mapping)		do { } while (0)
43 #define flush_dcache_mmap_unlock(mapping)	do { } while (0)
44 
45 #define flush_icache_range(start, len)	__invalidate_icache_range(start, len)
46 #define flush_icache_page(vma, pg)		do { } while (0)
47 
48 #ifndef CONFIG_MMU
49 # define flush_icache_user_range(start, len)	do { } while (0)
50 #else
51 # define flush_icache_user_range(vma, pg, adr, len) __invalidate_icache_all()
52 
53 # define flush_page_to_ram(page)		do { } while (0)
54 
55 # define flush_icache()			__invalidate_icache_all()
56 # define flush_cache_sigtramp(vaddr) \
57 			__invalidate_icache_range(vaddr, vaddr + 8)
58 
59 # define flush_dcache_mmap_lock(mapping)	do { } while (0)
60 # define flush_dcache_mmap_unlock(mapping)	do { } while (0)
61 
62 # define flush_cache_dup_mm(mm)			do { } while (0)
63 #endif
64 
65 #define flush_cache_vmap(start, end)		do { } while (0)
66 #define flush_cache_vunmap(start, end)		do { } while (0)
67 
68 struct page;
69 struct mm_struct;
70 struct vm_area_struct;
71 
72 /* see arch/microblaze/kernel/cache.c */
73 extern void __invalidate_icache_all(void);
74 extern void __invalidate_icache_range(unsigned long start, unsigned long end);
75 extern void __invalidate_icache_page(struct vm_area_struct *vma,
76 				struct page *page);
77 extern void __invalidate_icache_user_range(struct vm_area_struct *vma,
78 				struct page *page,
79 				unsigned long adr, int len);
80 extern void __invalidate_cache_sigtramp(unsigned long addr);
81 
82 extern void __invalidate_dcache_all(void);
83 extern void __invalidate_dcache_range(unsigned long start, unsigned long end);
84 extern void __invalidate_dcache_page(struct vm_area_struct *vma,
85 				struct page *page);
86 extern void __invalidate_dcache_user_range(struct vm_area_struct *vma,
87 				struct page *page,
88 				unsigned long adr, int len);
89 
90 extern inline void __invalidate_cache_all(void)
91 {
92 	__invalidate_icache_all();
93 	__invalidate_dcache_all();
94 }
95 
96 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
97 do { memcpy((dst), (src), (len)); \
98 	flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
99 } while (0)
100 
101 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
102 	memcpy((dst), (src), (len))
103 
104 #endif /* _ASM_MICROBLAZE_CACHEFLUSH_H */
105