1# SPDX-License-Identifier: GPL-2.0-only 2config MICROBLAZE 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_NO_SWAP 6 select ARCH_HAS_BINFMT_FLAT if !MMU 7 select ARCH_HAS_DMA_PREP_COHERENT 8 select ARCH_HAS_GCOV_PROFILE_ALL 9 select ARCH_HAS_SYNC_DMA_FOR_CPU 10 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 11 select ARCH_HAS_DMA_SET_UNCACHED if !MMU 12 select ARCH_MIGHT_HAVE_PC_PARPORT 13 select ARCH_WANT_IPC_PARSE_VERSION 14 select BUILDTIME_TABLE_SORT 15 select TIMER_OF 16 select CLONE_BACKWARDS3 17 select COMMON_CLK 18 select DMA_DIRECT_REMAP if MMU 19 select GENERIC_ATOMIC64 20 select GENERIC_CLOCKEVENTS 21 select GENERIC_CPU_DEVICES 22 select GENERIC_IDLE_POLL_SETUP 23 select GENERIC_IRQ_PROBE 24 select GENERIC_IRQ_SHOW 25 select GENERIC_PCI_IOMAP 26 select GENERIC_SCHED_CLOCK 27 select HAVE_ARCH_HASH 28 select HAVE_ARCH_KGDB 29 select HAVE_DEBUG_KMEMLEAK 30 select HAVE_DMA_CONTIGUOUS 31 select HAVE_DYNAMIC_FTRACE 32 select HAVE_FTRACE_MCOUNT_RECORD 33 select HAVE_FUNCTION_GRAPH_TRACER 34 select HAVE_FUNCTION_TRACER 35 select HAVE_MEMBLOCK_NODE_MAP 36 select HAVE_OPROFILE 37 select HAVE_PCI 38 select IRQ_DOMAIN 39 select XILINX_INTC 40 select MODULES_USE_ELF_RELA 41 select OF 42 select OF_EARLY_FLATTREE 43 select PCI_DOMAINS_GENERIC if PCI 44 select PCI_SYSCALL if PCI 45 select TRACING_SUPPORT 46 select VIRT_TO_BUS 47 select CPU_NO_EFFICIENT_FFS 48 select MMU_GATHER_NO_RANGE if MMU 49 select SPARSE_IRQ 50 select GENERIC_IRQ_MULTI_HANDLER 51 select HANDLE_DOMAIN_IRQ 52 53# Endianness selection 54choice 55 prompt "Endianness selection" 56 default CPU_LITTLE_ENDIAN 57 help 58 microblaze architectures can be configured for either little or 59 big endian formats. Be sure to select the appropriate mode. 60 61config CPU_BIG_ENDIAN 62 bool "Big endian" 63 64config CPU_LITTLE_ENDIAN 65 bool "Little endian" 66 67endchoice 68 69config ZONE_DMA 70 def_bool y 71 72config ARCH_HAS_ILOG2_U32 73 def_bool n 74 75config ARCH_HAS_ILOG2_U64 76 def_bool n 77 78config GENERIC_HWEIGHT 79 def_bool y 80 81config GENERIC_CALIBRATE_DELAY 82 def_bool y 83 84config GENERIC_CSUM 85 def_bool y 86 87config STACKTRACE_SUPPORT 88 def_bool y 89 90config LOCKDEP_SUPPORT 91 def_bool y 92 93source "arch/microblaze/Kconfig.platform" 94 95menu "Processor type and features" 96 97source "kernel/Kconfig.hz" 98 99config MMU 100 bool "MMU support" 101 default n 102 103comment "Boot options" 104 105config CMDLINE_BOOL 106 bool "Default bootloader kernel arguments" 107 108config CMDLINE 109 string "Default kernel command string" 110 depends on CMDLINE_BOOL 111 default "console=ttyUL0,115200" 112 help 113 On some architectures there is currently no way for the boot loader 114 to pass arguments to the kernel. For these architectures, you should 115 supply some command-line options at build time by entering them 116 here. 117 118config CMDLINE_FORCE 119 bool "Force default kernel command string" 120 depends on CMDLINE_BOOL 121 default n 122 help 123 Set this to have arguments from the default kernel command string 124 override those passed by the boot loader. 125 126config SECCOMP 127 bool "Enable seccomp to safely compute untrusted bytecode" 128 depends on PROC_FS 129 default y 130 help 131 This kernel feature is useful for number crunching applications 132 that may need to compute untrusted bytecode during their 133 execution. By using pipes or other transports made available to 134 the process as file descriptors supporting the read/write 135 syscalls, it's possible to isolate those applications in 136 their own address space using seccomp. Once seccomp is 137 enabled via /proc/<pid>/seccomp, it cannot be disabled 138 and the task is only allowed to execute a few safe syscalls 139 defined by each seccomp mode. 140 141 If unsure, say Y. Only embedded should say N here. 142 143endmenu 144 145menu "Kernel features" 146 147config NR_CPUS 148 int 149 default "1" 150 151config ADVANCED_OPTIONS 152 bool "Prompt for advanced kernel configuration options" 153 help 154 This option will enable prompting for a variety of advanced kernel 155 configuration options. These options can cause the kernel to not 156 work if they are set incorrectly, but can be used to optimize certain 157 aspects of kernel memory management. 158 159 Unless you know what you are doing, say N here. 160 161comment "Default settings for advanced configuration options are used" 162 depends on !ADVANCED_OPTIONS 163 164config XILINX_UNCACHED_SHADOW 165 bool "Are you using uncached shadow for RAM ?" 166 depends on ADVANCED_OPTIONS && !MMU 167 default n 168 help 169 This is needed to be able to allocate uncachable memory regions. 170 The feature requires the design to define the RAM memory controller 171 window to be twice as large as the actual physical memory. 172 173config HIGHMEM 174 bool "High memory support" 175 depends on MMU 176 help 177 The address space of Microblaze processors is only 4 Gigabytes large 178 and it has to accommodate user address space, kernel address 179 space as well as some memory mapped IO. That means that, if you 180 have a large amount of physical memory and/or IO, not all of the 181 memory can be "permanently mapped" by the kernel. The physical 182 memory that is not permanently mapped is called "high memory". 183 184 If unsure, say n. 185 186config LOWMEM_SIZE_BOOL 187 bool "Set maximum low memory" 188 depends on ADVANCED_OPTIONS && MMU 189 help 190 This option allows you to set the maximum amount of memory which 191 will be used as "low memory", that is, memory which the kernel can 192 access directly, without having to set up a kernel virtual mapping. 193 This can be useful in optimizing the layout of kernel virtual 194 memory. 195 196 Say N here unless you know what you are doing. 197 198config LOWMEM_SIZE 199 hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL 200 default "0x30000000" 201 202config MANUAL_RESET_VECTOR 203 hex "Microblaze reset vector address setup" 204 default "0x0" 205 help 206 Set this option to have the kernel override the CPU Reset vector. 207 If zero, no change will be made to the MicroBlaze reset vector at 208 address 0x0. 209 If non-zero, a jump instruction to this address, will be written 210 to the reset vector at address 0x0. 211 If you are unsure, set it to default value 0x0. 212 213config KERNEL_START_BOOL 214 bool "Set custom kernel base address" 215 depends on ADVANCED_OPTIONS 216 help 217 This option allows you to set the kernel virtual address at which 218 the kernel will map low memory (the kernel image will be linked at 219 this address). This can be useful in optimizing the virtual memory 220 layout of the system. 221 222 Say N here unless you know what you are doing. 223 224config KERNEL_START 225 hex "Virtual address of kernel base" if KERNEL_START_BOOL 226 default "0xc0000000" if MMU 227 default KERNEL_BASE_ADDR if !MMU 228 229config TASK_SIZE_BOOL 230 bool "Set custom user task size" 231 depends on ADVANCED_OPTIONS && MMU 232 help 233 This option allows you to set the amount of virtual address space 234 allocated to user tasks. This can be useful in optimizing the 235 virtual memory layout of the system. 236 237 Say N here unless you know what you are doing. 238 239config TASK_SIZE 240 hex "Size of user task space" if TASK_SIZE_BOOL 241 default "0x80000000" 242 243choice 244 prompt "Page size" 245 default MICROBLAZE_4K_PAGES 246 depends on ADVANCED_OPTIONS && !MMU 247 help 248 Select the kernel logical page size. Increasing the page size 249 will reduce software overhead at each page boundary, allow 250 hardware prefetch mechanisms to be more effective, and allow 251 larger dma transfers increasing IO efficiency and reducing 252 overhead. However the utilization of memory will increase. 253 For example, each cached file will using a multiple of the 254 page size to hold its contents and the difference between the 255 end of file and the end of page is wasted. 256 257 If unsure, choose 4K_PAGES. 258 259config MICROBLAZE_4K_PAGES 260 bool "4k page size" 261 262config MICROBLAZE_16K_PAGES 263 bool "16k page size" 264 265config MICROBLAZE_64K_PAGES 266 bool "64k page size" 267 268endchoice 269 270endmenu 271 272menu "Bus Options" 273 274config PCI_XILINX 275 bool "Xilinx PCI host bridge support" 276 depends on PCI 277 278endmenu 279