1# SPDX-License-Identifier: GPL-2.0-only 2config MICROBLAZE 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_NO_SWAP 6 select ARCH_HAS_BINFMT_FLAT if !MMU 7 select ARCH_HAS_DMA_PREP_COHERENT 8 select ARCH_HAS_GCOV_PROFILE_ALL 9 select ARCH_HAS_SYNC_DMA_FOR_CPU 10 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 11 select ARCH_HAS_UNCACHED_SEGMENT if !MMU 12 select ARCH_MIGHT_HAVE_PC_PARPORT 13 select ARCH_WANT_IPC_PARSE_VERSION 14 select BUILDTIME_EXTABLE_SORT 15 select TIMER_OF 16 select CLONE_BACKWARDS3 17 select COMMON_CLK 18 select DMA_DIRECT_REMAP if MMU 19 select GENERIC_ATOMIC64 20 select GENERIC_CLOCKEVENTS 21 select GENERIC_CPU_DEVICES 22 select GENERIC_IDLE_POLL_SETUP 23 select GENERIC_IRQ_PROBE 24 select GENERIC_IRQ_SHOW 25 select GENERIC_PCI_IOMAP 26 select GENERIC_SCHED_CLOCK 27 select HAVE_ARCH_HASH 28 select HAVE_ARCH_KGDB 29 select HAVE_DEBUG_KMEMLEAK 30 select HAVE_DYNAMIC_FTRACE 31 select HAVE_FTRACE_MCOUNT_RECORD 32 select HAVE_FUNCTION_GRAPH_TRACER 33 select HAVE_FUNCTION_TRACER 34 select HAVE_MEMBLOCK_NODE_MAP 35 select HAVE_OPROFILE 36 select HAVE_PCI 37 select IRQ_DOMAIN 38 select XILINX_INTC 39 select MODULES_USE_ELF_RELA 40 select OF 41 select OF_EARLY_FLATTREE 42 select PCI_DOMAINS_GENERIC if PCI 43 select PCI_SYSCALL if PCI 44 select TRACING_SUPPORT 45 select VIRT_TO_BUS 46 select CPU_NO_EFFICIENT_FFS 47 select MMU_GATHER_NO_RANGE if MMU 48 select SPARSE_IRQ 49 50# Endianness selection 51choice 52 prompt "Endianness selection" 53 default CPU_LITTLE_ENDIAN 54 help 55 microblaze architectures can be configured for either little or 56 big endian formats. Be sure to select the appropriate mode. 57 58config CPU_BIG_ENDIAN 59 bool "Big endian" 60 61config CPU_LITTLE_ENDIAN 62 bool "Little endian" 63 64endchoice 65 66config ZONE_DMA 67 def_bool y 68 69config ARCH_HAS_ILOG2_U32 70 def_bool n 71 72config ARCH_HAS_ILOG2_U64 73 def_bool n 74 75config GENERIC_HWEIGHT 76 def_bool y 77 78config GENERIC_CALIBRATE_DELAY 79 def_bool y 80 81config GENERIC_CSUM 82 def_bool y 83 84config STACKTRACE_SUPPORT 85 def_bool y 86 87config LOCKDEP_SUPPORT 88 def_bool y 89 90source "arch/microblaze/Kconfig.platform" 91 92menu "Processor type and features" 93 94source "kernel/Kconfig.hz" 95 96config MMU 97 bool "MMU support" 98 default n 99 100comment "Boot options" 101 102config CMDLINE_BOOL 103 bool "Default bootloader kernel arguments" 104 105config CMDLINE 106 string "Default kernel command string" 107 depends on CMDLINE_BOOL 108 default "console=ttyUL0,115200" 109 help 110 On some architectures there is currently no way for the boot loader 111 to pass arguments to the kernel. For these architectures, you should 112 supply some command-line options at build time by entering them 113 here. 114 115config CMDLINE_FORCE 116 bool "Force default kernel command string" 117 depends on CMDLINE_BOOL 118 default n 119 help 120 Set this to have arguments from the default kernel command string 121 override those passed by the boot loader. 122 123config SECCOMP 124 bool "Enable seccomp to safely compute untrusted bytecode" 125 depends on PROC_FS 126 default y 127 help 128 This kernel feature is useful for number crunching applications 129 that may need to compute untrusted bytecode during their 130 execution. By using pipes or other transports made available to 131 the process as file descriptors supporting the read/write 132 syscalls, it's possible to isolate those applications in 133 their own address space using seccomp. Once seccomp is 134 enabled via /proc/<pid>/seccomp, it cannot be disabled 135 and the task is only allowed to execute a few safe syscalls 136 defined by each seccomp mode. 137 138 If unsure, say Y. Only embedded should say N here. 139 140endmenu 141 142menu "Kernel features" 143 144config NR_CPUS 145 int 146 default "1" 147 148config ADVANCED_OPTIONS 149 bool "Prompt for advanced kernel configuration options" 150 help 151 This option will enable prompting for a variety of advanced kernel 152 configuration options. These options can cause the kernel to not 153 work if they are set incorrectly, but can be used to optimize certain 154 aspects of kernel memory management. 155 156 Unless you know what you are doing, say N here. 157 158comment "Default settings for advanced configuration options are used" 159 depends on !ADVANCED_OPTIONS 160 161config XILINX_UNCACHED_SHADOW 162 bool "Are you using uncached shadow for RAM ?" 163 depends on ADVANCED_OPTIONS && !MMU 164 default n 165 help 166 This is needed to be able to allocate uncachable memory regions. 167 The feature requires the design to define the RAM memory controller 168 window to be twice as large as the actual physical memory. 169 170config HIGHMEM 171 bool "High memory support" 172 depends on MMU 173 help 174 The address space of Microblaze processors is only 4 Gigabytes large 175 and it has to accommodate user address space, kernel address 176 space as well as some memory mapped IO. That means that, if you 177 have a large amount of physical memory and/or IO, not all of the 178 memory can be "permanently mapped" by the kernel. The physical 179 memory that is not permanently mapped is called "high memory". 180 181 If unsure, say n. 182 183config LOWMEM_SIZE_BOOL 184 bool "Set maximum low memory" 185 depends on ADVANCED_OPTIONS && MMU 186 help 187 This option allows you to set the maximum amount of memory which 188 will be used as "low memory", that is, memory which the kernel can 189 access directly, without having to set up a kernel virtual mapping. 190 This can be useful in optimizing the layout of kernel virtual 191 memory. 192 193 Say N here unless you know what you are doing. 194 195config LOWMEM_SIZE 196 hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL 197 default "0x30000000" 198 199config MANUAL_RESET_VECTOR 200 hex "Microblaze reset vector address setup" 201 default "0x0" 202 help 203 Set this option to have the kernel override the CPU Reset vector. 204 If zero, no change will be made to the MicroBlaze reset vector at 205 address 0x0. 206 If non-zero, a jump instruction to this address, will be written 207 to the reset vector at address 0x0. 208 If you are unsure, set it to default value 0x0. 209 210config KERNEL_START_BOOL 211 bool "Set custom kernel base address" 212 depends on ADVANCED_OPTIONS 213 help 214 This option allows you to set the kernel virtual address at which 215 the kernel will map low memory (the kernel image will be linked at 216 this address). This can be useful in optimizing the virtual memory 217 layout of the system. 218 219 Say N here unless you know what you are doing. 220 221config KERNEL_START 222 hex "Virtual address of kernel base" if KERNEL_START_BOOL 223 default "0xc0000000" if MMU 224 default KERNEL_BASE_ADDR if !MMU 225 226config TASK_SIZE_BOOL 227 bool "Set custom user task size" 228 depends on ADVANCED_OPTIONS && MMU 229 help 230 This option allows you to set the amount of virtual address space 231 allocated to user tasks. This can be useful in optimizing the 232 virtual memory layout of the system. 233 234 Say N here unless you know what you are doing. 235 236config TASK_SIZE 237 hex "Size of user task space" if TASK_SIZE_BOOL 238 default "0x80000000" 239 240choice 241 prompt "Page size" 242 default MICROBLAZE_4K_PAGES 243 depends on ADVANCED_OPTIONS && !MMU 244 help 245 Select the kernel logical page size. Increasing the page size 246 will reduce software overhead at each page boundary, allow 247 hardware prefetch mechanisms to be more effective, and allow 248 larger dma transfers increasing IO efficiency and reducing 249 overhead. However the utilization of memory will increase. 250 For example, each cached file will using a multiple of the 251 page size to hold its contents and the difference between the 252 end of file and the end of page is wasted. 253 254 If unsure, choose 4K_PAGES. 255 256config MICROBLAZE_4K_PAGES 257 bool "4k page size" 258 259config MICROBLAZE_16K_PAGES 260 bool "16k page size" 261 262config MICROBLAZE_64K_PAGES 263 bool "64k page size" 264 265endchoice 266 267endmenu 268 269menu "Bus Options" 270 271config PCI_XILINX 272 bool "Xilinx PCI host bridge support" 273 depends on PCI 274 275endmenu 276