1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * arch/m68k/mvme16x/config.c 4 * 5 * Copyright (C) 1995 Richard Hirst [richard@sleepie.demon.co.uk] 6 * 7 * Based on: 8 * 9 * linux/amiga/config.c 10 * 11 * Copyright (C) 1993 Hamish Macdonald 12 */ 13 14 #include <linux/types.h> 15 #include <linux/kernel.h> 16 #include <linux/mm.h> 17 #include <linux/seq_file.h> 18 #include <linux/tty.h> 19 #include <linux/clocksource.h> 20 #include <linux/console.h> 21 #include <linux/linkage.h> 22 #include <linux/init.h> 23 #include <linux/major.h> 24 #include <linux/interrupt.h> 25 #include <linux/module.h> 26 #include <linux/platform_device.h> 27 #include <linux/rtc/m48t59.h> 28 29 #include <asm/bootinfo.h> 30 #include <asm/bootinfo-vme.h> 31 #include <asm/byteorder.h> 32 #include <asm/setup.h> 33 #include <asm/irq.h> 34 #include <asm/traps.h> 35 #include <asm/machdep.h> 36 #include <asm/mvme16xhw.h> 37 #include <asm/config.h> 38 39 #include "mvme16x.h" 40 41 extern t_bdid mvme_bdid; 42 43 static void mvme16x_get_model(char *model); 44 extern void mvme16x_sched_init(void); 45 extern void mvme16x_reset (void); 46 47 unsigned short mvme16x_config; 48 EXPORT_SYMBOL(mvme16x_config); 49 50 51 int __init mvme16x_parse_bootinfo(const struct bi_record *bi) 52 { 53 uint16_t tag = be16_to_cpu(bi->tag); 54 if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO) 55 return 0; 56 else 57 return 1; 58 } 59 60 void mvme16x_reset(void) 61 { 62 pr_info("\r\n\nCalled mvme16x_reset\r\n" 63 "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r"); 64 /* The string of returns is to delay the reset until the whole 65 * message is output. Assert reset bit in GCSR */ 66 *(volatile char *)0xfff40107 = 0x80; 67 } 68 69 static void mvme16x_get_model(char *model) 70 { 71 p_bdid p = &mvme_bdid; 72 char suf[4]; 73 74 suf[1] = p->brdsuffix[0]; 75 suf[2] = p->brdsuffix[1]; 76 suf[3] = '\0'; 77 suf[0] = suf[1] ? '-' : '\0'; 78 79 sprintf(model, "Motorola MVME%x%s", be16_to_cpu(p->brdno), suf); 80 } 81 82 83 static void mvme16x_get_hardware_list(struct seq_file *m) 84 { 85 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno); 86 87 if (brdno == 0x0162 || brdno == 0x0172) 88 { 89 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG; 90 91 seq_printf (m, "VMEchip2 %spresent\n", 92 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : ""); 93 seq_printf (m, "SCSI interface %spresent\n", 94 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : ""); 95 seq_printf (m, "Ethernet i/f %spresent\n", 96 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : ""); 97 } 98 } 99 100 /* 101 * This function is called during kernel startup to initialize 102 * the mvme16x IRQ handling routines. Should probably ensure 103 * that the base vectors for the VMEChip2 and PCCChip2 are valid. 104 */ 105 106 static void __init mvme16x_init_IRQ (void) 107 { 108 m68k_setup_user_interrupt(VEC_USER, 192); 109 } 110 111 #define PCC2CHIP (0xfff42000) 112 #define PCCSCCMICR (PCC2CHIP + 0x1d) 113 #define PCCSCCTICR (PCC2CHIP + 0x1e) 114 #define PCCSCCRICR (PCC2CHIP + 0x1f) 115 #define PCCTPIACKR (PCC2CHIP + 0x25) 116 117 #ifdef CONFIG_EARLY_PRINTK 118 119 /**** cd2401 registers ****/ 120 #define CD2401_ADDR (0xfff45000) 121 122 #define CyGFRCR (0x81) 123 #define CyCCR (0x13) 124 #define CyCLR_CHAN (0x40) 125 #define CyINIT_CHAN (0x20) 126 #define CyCHIP_RESET (0x10) 127 #define CyENB_XMTR (0x08) 128 #define CyDIS_XMTR (0x04) 129 #define CyENB_RCVR (0x02) 130 #define CyDIS_RCVR (0x01) 131 #define CyCAR (0xee) 132 #define CyIER (0x11) 133 #define CyMdmCh (0x80) 134 #define CyRxExc (0x20) 135 #define CyRxData (0x08) 136 #define CyTxMpty (0x02) 137 #define CyTxRdy (0x01) 138 #define CyLICR (0x26) 139 #define CyRISR (0x89) 140 #define CyTIMEOUT (0x80) 141 #define CySPECHAR (0x70) 142 #define CyOVERRUN (0x08) 143 #define CyPARITY (0x04) 144 #define CyFRAME (0x02) 145 #define CyBREAK (0x01) 146 #define CyREOIR (0x84) 147 #define CyTEOIR (0x85) 148 #define CyMEOIR (0x86) 149 #define CyNOTRANS (0x08) 150 #define CyRFOC (0x30) 151 #define CyRDR (0xf8) 152 #define CyTDR (0xf8) 153 #define CyMISR (0x8b) 154 #define CyRISR (0x89) 155 #define CyTISR (0x8a) 156 #define CyMSVR1 (0xde) 157 #define CyMSVR2 (0xdf) 158 #define CyDSR (0x80) 159 #define CyDCD (0x40) 160 #define CyCTS (0x20) 161 #define CyDTR (0x02) 162 #define CyRTS (0x01) 163 #define CyRTPRL (0x25) 164 #define CyRTPRH (0x24) 165 #define CyCOR1 (0x10) 166 #define CyPARITY_NONE (0x00) 167 #define CyPARITY_E (0x40) 168 #define CyPARITY_O (0xC0) 169 #define Cy_5_BITS (0x04) 170 #define Cy_6_BITS (0x05) 171 #define Cy_7_BITS (0x06) 172 #define Cy_8_BITS (0x07) 173 #define CyCOR2 (0x17) 174 #define CyETC (0x20) 175 #define CyCtsAE (0x02) 176 #define CyCOR3 (0x16) 177 #define Cy_1_STOP (0x02) 178 #define Cy_2_STOP (0x04) 179 #define CyCOR4 (0x15) 180 #define CyREC_FIFO (0x0F) /* Receive FIFO threshold */ 181 #define CyCOR5 (0x14) 182 #define CyCOR6 (0x18) 183 #define CyCOR7 (0x07) 184 #define CyRBPR (0xcb) 185 #define CyRCOR (0xc8) 186 #define CyTBPR (0xc3) 187 #define CyTCOR (0xc0) 188 #define CySCHR1 (0x1f) 189 #define CySCHR2 (0x1e) 190 #define CyTPR (0xda) 191 #define CyPILR1 (0xe3) 192 #define CyPILR2 (0xe0) 193 #define CyPILR3 (0xe1) 194 #define CyCMR (0x1b) 195 #define CyASYNC (0x02) 196 #define CyLICR (0x26) 197 #define CyLIVR (0x09) 198 #define CySCRL (0x23) 199 #define CySCRH (0x22) 200 #define CyTFTC (0x80) 201 202 void mvme16x_cons_write(struct console *co, const char *str, unsigned count) 203 { 204 volatile unsigned char *base_addr = (u_char *)CD2401_ADDR; 205 u_char ier; 206 int port; 207 u_char do_lf = 0; 208 int i = 0; 209 210 /* Ensure transmitter is enabled! */ 211 212 port = 0; 213 base_addr[CyCAR] = (u_char)port; 214 while (base_addr[CyCCR]) 215 ; 216 base_addr[CyCCR] = CyENB_XMTR; 217 218 ier = base_addr[CyIER]; 219 base_addr[CyIER] = CyTxMpty; 220 221 while (1) { 222 if (in_8(PCCSCCTICR) & 0x20) 223 { 224 /* We have a Tx int. Acknowledge it */ 225 in_8(PCCTPIACKR); 226 if ((base_addr[CyLICR] >> 2) == port) { 227 if (i == count) { 228 /* Last char of string is now output */ 229 base_addr[CyTEOIR] = CyNOTRANS; 230 break; 231 } 232 if (do_lf) { 233 base_addr[CyTDR] = '\n'; 234 str++; 235 i++; 236 do_lf = 0; 237 } 238 else if (*str == '\n') { 239 base_addr[CyTDR] = '\r'; 240 do_lf = 1; 241 } 242 else { 243 base_addr[CyTDR] = *str++; 244 i++; 245 } 246 base_addr[CyTEOIR] = 0; 247 } 248 else 249 base_addr[CyTEOIR] = CyNOTRANS; 250 } 251 } 252 253 base_addr[CyIER] = ier; 254 } 255 256 #endif 257 258 void __init config_mvme16x(void) 259 { 260 p_bdid p = &mvme_bdid; 261 char id[40]; 262 uint16_t brdno = be16_to_cpu(p->brdno); 263 264 mach_sched_init = mvme16x_sched_init; 265 mach_init_IRQ = mvme16x_init_IRQ; 266 mach_reset = mvme16x_reset; 267 mach_get_model = mvme16x_get_model; 268 mach_get_hardware_list = mvme16x_get_hardware_list; 269 270 /* Report board revision */ 271 272 if (strncmp("BDID", p->bdid, 4)) 273 { 274 pr_crit("Bug call .BRD_ID returned garbage - giving up\n"); 275 while (1) 276 ; 277 } 278 /* Board type is only set by newer versions of vmelilo/tftplilo */ 279 if (vme_brdtype == 0) 280 vme_brdtype = brdno; 281 282 mvme16x_get_model(id); 283 pr_info("BRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev >> 4, 284 p->rev & 0xf, p->yr, p->mth, p->day); 285 if (brdno == 0x0162 || brdno == 0x172) 286 { 287 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG; 288 289 mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA; 290 291 pr_info("MVME%x Hardware status:\n", brdno); 292 pr_info(" CPU Type 68%s040\n", 293 rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC"); 294 pr_info(" CPU clock %dMHz\n", 295 rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25); 296 pr_info(" VMEchip2 %spresent\n", 297 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : ""); 298 pr_info(" SCSI interface %spresent\n", 299 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : ""); 300 pr_info(" Ethernet interface %spresent\n", 301 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : ""); 302 } 303 else 304 { 305 mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401; 306 } 307 } 308 309 static struct resource m48t59_rsrc[] = { 310 DEFINE_RES_MEM(MVME_RTC_BASE, 0x2000), 311 }; 312 313 static struct m48t59_plat_data m48t59_data = { 314 .type = M48T59RTC_TYPE_M48T08, 315 .yy_offset = 70, 316 }; 317 318 static int __init mvme16x_platform_init(void) 319 { 320 if (!MACH_IS_MVME16x) 321 return 0; 322 323 platform_device_register_resndata(NULL, "rtc-m48t59", -1, 324 m48t59_rsrc, ARRAY_SIZE(m48t59_rsrc), 325 &m48t59_data, sizeof(m48t59_data)); 326 return 0; 327 } 328 329 arch_initcall(mvme16x_platform_init); 330 331 static irqreturn_t mvme16x_abort_int (int irq, void *dev_id) 332 { 333 unsigned long *new = (unsigned long *)vectors; 334 unsigned long *old = (unsigned long *)0xffe00000; 335 volatile unsigned char uc, *ucp; 336 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno); 337 338 if (brdno == 0x0162 || brdno == 0x172) 339 { 340 ucp = (volatile unsigned char *)0xfff42043; 341 uc = *ucp | 8; 342 *ucp = uc; 343 } 344 else 345 { 346 *(volatile unsigned long *)0xfff40074 = 0x40000000; 347 } 348 *(new+4) = *(old+4); /* Illegal instruction */ 349 *(new+9) = *(old+9); /* Trace */ 350 *(new+47) = *(old+47); /* Trap #15 */ 351 352 if (brdno == 0x0162 || brdno == 0x172) 353 *(new+0x5e) = *(old+0x5e); /* ABORT switch */ 354 else 355 *(new+0x6e) = *(old+0x6e); /* ABORT switch */ 356 return IRQ_HANDLED; 357 } 358 359 static u64 mvme16x_read_clk(struct clocksource *cs); 360 361 static struct clocksource mvme16x_clk = { 362 .name = "pcc", 363 .rating = 250, 364 .read = mvme16x_read_clk, 365 .mask = CLOCKSOURCE_MASK(32), 366 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 367 }; 368 369 static u32 clk_total; 370 371 #define PCC_TIMER_CLOCK_FREQ 1000000 372 #define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ) 373 374 #define PCCTCMP1 (PCC2CHIP + 0x04) 375 #define PCCTCNT1 (PCC2CHIP + 0x08) 376 #define PCCTOVR1 (PCC2CHIP + 0x17) 377 #define PCCTIC1 (PCC2CHIP + 0x1b) 378 379 #define PCCTOVR1_TIC_EN 0x01 380 #define PCCTOVR1_COC_EN 0x02 381 #define PCCTOVR1_OVR_CLR 0x04 382 383 #define PCCTIC1_INT_LEVEL 6 384 #define PCCTIC1_INT_CLR 0x08 385 #define PCCTIC1_INT_EN 0x10 386 387 static irqreturn_t mvme16x_timer_int (int irq, void *dev_id) 388 { 389 unsigned long flags; 390 391 local_irq_save(flags); 392 out_8(PCCTOVR1, PCCTOVR1_OVR_CLR | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN); 393 out_8(PCCTIC1, PCCTIC1_INT_EN | PCCTIC1_INT_CLR | PCCTIC1_INT_LEVEL); 394 clk_total += PCC_TIMER_CYCLES; 395 legacy_timer_tick(1); 396 local_irq_restore(flags); 397 398 return IRQ_HANDLED; 399 } 400 401 void mvme16x_sched_init(void) 402 { 403 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno); 404 int irq; 405 406 /* Using PCCchip2 or MC2 chip tick timer 1 */ 407 if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, IRQF_TIMER, "timer", 408 NULL)) 409 panic ("Couldn't register timer int"); 410 411 out_be32(PCCTCNT1, 0); 412 out_be32(PCCTCMP1, PCC_TIMER_CYCLES); 413 out_8(PCCTOVR1, PCCTOVR1_OVR_CLR | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN); 414 out_8(PCCTIC1, PCCTIC1_INT_EN | PCCTIC1_INT_CLR | PCCTIC1_INT_LEVEL); 415 416 clocksource_register_hz(&mvme16x_clk, PCC_TIMER_CLOCK_FREQ); 417 418 if (brdno == 0x0162 || brdno == 0x172) 419 irq = MVME162_IRQ_ABORT; 420 else 421 irq = MVME167_IRQ_ABORT; 422 if (request_irq(irq, mvme16x_abort_int, 0, 423 "abort", mvme16x_abort_int)) 424 panic ("Couldn't register abort int"); 425 } 426 427 static u64 mvme16x_read_clk(struct clocksource *cs) 428 { 429 unsigned long flags; 430 u8 overflow, tmp; 431 u32 ticks; 432 433 local_irq_save(flags); 434 tmp = in_8(PCCTOVR1) >> 4; 435 ticks = in_be32(PCCTCNT1); 436 overflow = in_8(PCCTOVR1) >> 4; 437 if (overflow != tmp) 438 ticks = in_be32(PCCTCNT1); 439 ticks += overflow * PCC_TIMER_CYCLES; 440 ticks += clk_total; 441 local_irq_restore(flags); 442 443 return ticks; 444 } 445