1*1da177e4SLinus Torvalds/* 2*1da177e4SLinus Torvalds * fp_movem.S 3*1da177e4SLinus Torvalds * 4*1da177e4SLinus Torvalds * Copyright Roman Zippel, 1997. All rights reserved. 5*1da177e4SLinus Torvalds * 6*1da177e4SLinus Torvalds * Redistribution and use in source and binary forms, with or without 7*1da177e4SLinus Torvalds * modification, are permitted provided that the following conditions 8*1da177e4SLinus Torvalds * are met: 9*1da177e4SLinus Torvalds * 1. Redistributions of source code must retain the above copyright 10*1da177e4SLinus Torvalds * notice, and the entire permission notice in its entirety, 11*1da177e4SLinus Torvalds * including the disclaimer of warranties. 12*1da177e4SLinus Torvalds * 2. Redistributions in binary form must reproduce the above copyright 13*1da177e4SLinus Torvalds * notice, this list of conditions and the following disclaimer in the 14*1da177e4SLinus Torvalds * documentation and/or other materials provided with the distribution. 15*1da177e4SLinus Torvalds * 3. The name of the author may not be used to endorse or promote 16*1da177e4SLinus Torvalds * products derived from this software without specific prior 17*1da177e4SLinus Torvalds * written permission. 18*1da177e4SLinus Torvalds * 19*1da177e4SLinus Torvalds * ALTERNATIVELY, this product may be distributed under the terms of 20*1da177e4SLinus Torvalds * the GNU General Public License, in which case the provisions of the GPL are 21*1da177e4SLinus Torvalds * required INSTEAD OF the above restrictions. (This clause is 22*1da177e4SLinus Torvalds * necessary due to a potential bad interaction between the GPL and 23*1da177e4SLinus Torvalds * the restrictions contained in a BSD-style copyright.) 24*1da177e4SLinus Torvalds * 25*1da177e4SLinus Torvalds * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 26*1da177e4SLinus Torvalds * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27*1da177e4SLinus Torvalds * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28*1da177e4SLinus Torvalds * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 29*1da177e4SLinus Torvalds * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30*1da177e4SLinus Torvalds * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31*1da177e4SLinus Torvalds * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32*1da177e4SLinus Torvalds * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 33*1da177e4SLinus Torvalds * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34*1da177e4SLinus Torvalds * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 35*1da177e4SLinus Torvalds * OF THE POSSIBILITY OF SUCH DAMAGE. 36*1da177e4SLinus Torvalds */ 37*1da177e4SLinus Torvalds 38*1da177e4SLinus Torvalds#include "fp_emu.h" 39*1da177e4SLinus Torvalds#include "fp_decode.h" 40*1da177e4SLinus Torvalds 41*1da177e4SLinus Torvalds| set flags for decode macros for fmovem 42*1da177e4SLinus Torvaldsdo_fmovem=1 43*1da177e4SLinus Torvalds 44*1da177e4SLinus Torvalds .globl fp_fmovem_fp, fp_fmovem_cr 45*1da177e4SLinus Torvalds 46*1da177e4SLinus Torvalds| %d1 contains the mask and count of the register list 47*1da177e4SLinus Torvalds| for other register usage see fp_decode.h 48*1da177e4SLinus Torvalds 49*1da177e4SLinus Torvaldsfp_fmovem_fp: 50*1da177e4SLinus Torvalds printf PDECODE,"fmovem.x " 51*1da177e4SLinus Torvalds | get register list and count them 52*1da177e4SLinus Torvalds btst #11,%d2 53*1da177e4SLinus Torvalds jne 1f 54*1da177e4SLinus Torvalds bfextu %d2{#24,#8},%d0 | static register list 55*1da177e4SLinus Torvalds jra 2f 56*1da177e4SLinus Torvalds1: bfextu %d2{#25,#3},%d0 | dynamic register list 57*1da177e4SLinus Torvalds jsr fp_get_data_reg 58*1da177e4SLinus Torvalds2: move.l %d0,%d1 59*1da177e4SLinus Torvalds swap %d1 60*1da177e4SLinus Torvalds jra 2f 61*1da177e4SLinus Torvalds1: addq.w #1,%d1 | count the # of registers in 62*1da177e4SLinus Torvalds2: lsr.b #1,%d0 | register list and keep it in %d1 63*1da177e4SLinus Torvalds jcs 1b 64*1da177e4SLinus Torvalds jne 2b 65*1da177e4SLinus Torvalds printf PDECODE,"#%08x",1,%d1 66*1da177e4SLinus Torvalds#ifdef FPU_EMU_DEBUG 67*1da177e4SLinus Torvalds btst #12,%d2 68*1da177e4SLinus Torvalds jne 1f 69*1da177e4SLinus Torvalds printf PDECODE,"-" | decremental move 70*1da177e4SLinus Torvalds jra 2f 71*1da177e4SLinus Torvalds1: printf PDECODE,"+" | incremental move 72*1da177e4SLinus Torvalds2: btst #13,%d2 73*1da177e4SLinus Torvalds jeq 1f 74*1da177e4SLinus Torvalds printf PDECODE,"->" | fpu -> cpu 75*1da177e4SLinus Torvalds jra 2f 76*1da177e4SLinus Torvalds1: printf PDECODE,"<-" | fpu <- cpu 77*1da177e4SLinus Torvalds2: 78*1da177e4SLinus Torvalds#endif 79*1da177e4SLinus Torvalds 80*1da177e4SLinus Torvalds | decode address mode 81*1da177e4SLinus Torvalds fp_decode_addr_mode 82*1da177e4SLinus Torvalds 83*1da177e4SLinus Torvalds .long fp_ill, fp_ill 84*1da177e4SLinus Torvalds .long fpr_indirect, fpr_postinc 85*1da177e4SLinus Torvalds .long fpr_predecr, fpr_disp16 86*1da177e4SLinus Torvalds .long fpr_extmode0, fpr_extmode1 87*1da177e4SLinus Torvalds 88*1da177e4SLinus Torvalds | addressing mode: address register indirect 89*1da177e4SLinus Torvaldsfpr_indirect: 90*1da177e4SLinus Torvalds fp_mode_addr_indirect 91*1da177e4SLinus Torvalds jra fpr_do_movem 92*1da177e4SLinus Torvalds 93*1da177e4SLinus Torvalds | addressing mode: address register indirect with postincrement 94*1da177e4SLinus Torvaldsfpr_postinc: 95*1da177e4SLinus Torvalds fp_mode_addr_indirect_postinc 96*1da177e4SLinus Torvalds jra fpr_do_movem 97*1da177e4SLinus Torvalds 98*1da177e4SLinus Torvaldsfpr_predecr: 99*1da177e4SLinus Torvalds fp_mode_addr_indirect_predec 100*1da177e4SLinus Torvalds jra fpr_do_movem 101*1da177e4SLinus Torvalds 102*1da177e4SLinus Torvalds | addressing mode: address register/programm counter indirect 103*1da177e4SLinus Torvalds | with 16bit displacement 104*1da177e4SLinus Torvaldsfpr_disp16: 105*1da177e4SLinus Torvalds fp_mode_addr_indirect_disp16 106*1da177e4SLinus Torvalds jra fpr_do_movem 107*1da177e4SLinus Torvalds 108*1da177e4SLinus Torvaldsfpr_extmode0: 109*1da177e4SLinus Torvalds fp_mode_addr_indirect_extmode0 110*1da177e4SLinus Torvalds jra fpr_do_movem 111*1da177e4SLinus Torvalds 112*1da177e4SLinus Torvaldsfpr_extmode1: 113*1da177e4SLinus Torvalds fp_decode_addr_reg 114*1da177e4SLinus Torvalds jmp ([0f:w,%pc,%d0*4]) 115*1da177e4SLinus Torvalds 116*1da177e4SLinus Torvalds .align 4 117*1da177e4SLinus Torvalds0: 118*1da177e4SLinus Torvalds .long fpr_absolute_short, fpr_absolute_long 119*1da177e4SLinus Torvalds .long fpr_disp16, fpr_extmode0 120*1da177e4SLinus Torvalds .long fp_ill, fp_ill 121*1da177e4SLinus Torvalds .long fp_ill, fp_ill 122*1da177e4SLinus Torvalds 123*1da177e4SLinus Torvaldsfpr_absolute_short: 124*1da177e4SLinus Torvalds fp_mode_abs_short 125*1da177e4SLinus Torvalds jra fpr_do_movem 126*1da177e4SLinus Torvalds 127*1da177e4SLinus Torvaldsfpr_absolute_long: 128*1da177e4SLinus Torvalds fp_mode_abs_long 129*1da177e4SLinus Torvalds| jra fpr_do_movem 130*1da177e4SLinus Torvalds 131*1da177e4SLinus Torvaldsfpr_do_movem: 132*1da177e4SLinus Torvalds swap %d1 | get fpu register list 133*1da177e4SLinus Torvalds lea (FPD_FPREG,FPDATA),%a1 134*1da177e4SLinus Torvalds moveq #12,%d0 135*1da177e4SLinus Torvalds btst #12,%d2 136*1da177e4SLinus Torvalds jne 1f 137*1da177e4SLinus Torvalds lea (-12,%a1,%d0*8),%a1 138*1da177e4SLinus Torvalds neg.l %d0 139*1da177e4SLinus Torvalds1: btst #13,%d2 140*1da177e4SLinus Torvalds jne 4f 141*1da177e4SLinus Torvalds | move register from memory into fpu 142*1da177e4SLinus Torvalds jra 3f 143*1da177e4SLinus Torvalds1: printf PMOVEM,"(%p>%p)",2,%a0,%a1 144*1da177e4SLinus Torvalds getuser.l (%a0)+,%d2,fp_err_ua1,%a0 145*1da177e4SLinus Torvalds lsr.l #8,%d2 146*1da177e4SLinus Torvalds lsr.l #7,%d2 147*1da177e4SLinus Torvalds lsr.w #1,%d2 148*1da177e4SLinus Torvalds move.l %d2,(%a1)+ 149*1da177e4SLinus Torvalds getuser.l (%a0)+,%d2,fp_err_ua1,%a0 150*1da177e4SLinus Torvalds move.l %d2,(%a1)+ 151*1da177e4SLinus Torvalds getuser.l (%a0),%d2,fp_err_ua1,%a0 152*1da177e4SLinus Torvalds move.l %d2,(%a1) 153*1da177e4SLinus Torvalds subq.l #8,%a0 154*1da177e4SLinus Torvalds subq.l #8,%a1 155*1da177e4SLinus Torvalds add.l %d0,%a0 156*1da177e4SLinus Torvalds2: add.l %d0,%a1 157*1da177e4SLinus Torvalds3: lsl.b #1,%d1 158*1da177e4SLinus Torvalds jcs 1b 159*1da177e4SLinus Torvalds jne 2b 160*1da177e4SLinus Torvalds jra 5f 161*1da177e4SLinus Torvalds | move register from fpu into memory 162*1da177e4SLinus Torvalds1: printf PMOVEM,"(%p>%p)",2,%a1,%a0 163*1da177e4SLinus Torvalds move.l (%a1)+,%d2 164*1da177e4SLinus Torvalds lsl.w #1,%d2 165*1da177e4SLinus Torvalds lsl.l #7,%d2 166*1da177e4SLinus Torvalds lsl.l #8,%d2 167*1da177e4SLinus Torvalds putuser.l %d2,(%a0)+,fp_err_ua1,%a0 168*1da177e4SLinus Torvalds move.l (%a1)+,%d2 169*1da177e4SLinus Torvalds putuser.l %d2,(%a0)+,fp_err_ua1,%a0 170*1da177e4SLinus Torvalds move.l (%a1),%d2 171*1da177e4SLinus Torvalds putuser.l %d2,(%a0),fp_err_ua1,%a0 172*1da177e4SLinus Torvalds subq.l #8,%a1 173*1da177e4SLinus Torvalds subq.l #8,%a0 174*1da177e4SLinus Torvalds add.l %d0,%a0 175*1da177e4SLinus Torvalds2: add.l %d0,%a1 176*1da177e4SLinus Torvalds4: lsl.b #1,%d1 177*1da177e4SLinus Torvalds jcs 1b 178*1da177e4SLinus Torvalds jne 2b 179*1da177e4SLinus Torvalds5: 180*1da177e4SLinus Torvalds printf PDECODE,"\n" 181*1da177e4SLinus Torvalds#if 0 182*1da177e4SLinus Torvalds lea (FPD_FPREG,FPDATA),%a0 183*1da177e4SLinus Torvalds printf PMOVEM,"fp:" 184*1da177e4SLinus Torvalds printx PMOVEM,%a0@(0) 185*1da177e4SLinus Torvalds printx PMOVEM,%a0@(12) 186*1da177e4SLinus Torvalds printf PMOVEM,"\n " 187*1da177e4SLinus Torvalds printx PMOVEM,%a0@(24) 188*1da177e4SLinus Torvalds printx PMOVEM,%a0@(36) 189*1da177e4SLinus Torvalds printf PMOVEM,"\n " 190*1da177e4SLinus Torvalds printx PMOVEM,%a0@(48) 191*1da177e4SLinus Torvalds printx PMOVEM,%a0@(60) 192*1da177e4SLinus Torvalds printf PMOVEM,"\n " 193*1da177e4SLinus Torvalds printx PMOVEM,%a0@(72) 194*1da177e4SLinus Torvalds printx PMOVEM,%a0@(84) 195*1da177e4SLinus Torvalds printf PMOVEM,"\n" 196*1da177e4SLinus Torvalds#endif 197*1da177e4SLinus Torvalds jra fp_end 198*1da177e4SLinus Torvalds 199*1da177e4SLinus Torvalds| set flags for decode macros for fmovem control register 200*1da177e4SLinus Torvaldsdo_fmovem=1 201*1da177e4SLinus Torvaldsdo_fmovem_cr=1 202*1da177e4SLinus Torvalds 203*1da177e4SLinus Torvaldsfp_fmovem_cr: 204*1da177e4SLinus Torvalds printf PDECODE,"fmovem.cr " 205*1da177e4SLinus Torvalds | get register list and count them 206*1da177e4SLinus Torvalds bfextu %d2{#19,#3},%d0 207*1da177e4SLinus Torvalds move.l %d0,%d1 208*1da177e4SLinus Torvalds swap %d1 209*1da177e4SLinus Torvalds jra 2f 210*1da177e4SLinus Torvalds1: addq.w #1,%d1 211*1da177e4SLinus Torvalds2: lsr.l #1,%d0 212*1da177e4SLinus Torvalds jcs 1b 213*1da177e4SLinus Torvalds jne 2b 214*1da177e4SLinus Torvalds printf PDECODE,"#%08x",1,%d1 215*1da177e4SLinus Torvalds#ifdef FPU_EMU_DEBUG 216*1da177e4SLinus Torvalds btst #13,%d2 217*1da177e4SLinus Torvalds jeq 1f 218*1da177e4SLinus Torvalds printf PDECODE,"->" | fpu -> cpu 219*1da177e4SLinus Torvalds jra 2f 220*1da177e4SLinus Torvalds1: printf PDECODE,"<-" | fpu <- cpu 221*1da177e4SLinus Torvalds2: 222*1da177e4SLinus Torvalds#endif 223*1da177e4SLinus Torvalds 224*1da177e4SLinus Torvalds | decode address mode 225*1da177e4SLinus Torvalds fp_decode_addr_mode 226*1da177e4SLinus Torvalds 227*1da177e4SLinus Torvalds .long fpc_data, fpc_addr 228*1da177e4SLinus Torvalds .long fpc_indirect, fpc_postinc 229*1da177e4SLinus Torvalds .long fpc_predecr, fpc_disp16 230*1da177e4SLinus Torvalds .long fpc_extmode0, fpc_extmode1 231*1da177e4SLinus Torvalds 232*1da177e4SLinus Torvaldsfpc_data: 233*1da177e4SLinus Torvalds fp_mode_data_direct 234*1da177e4SLinus Torvalds move.w %d0,%d1 235*1da177e4SLinus Torvalds bfffo %d2{#19,#3},%d0 236*1da177e4SLinus Torvalds sub.w #19,%d0 237*1da177e4SLinus Torvalds lea (FPD_FPCR,FPDATA,%d0.w*4),%a1 238*1da177e4SLinus Torvalds btst #13,%d2 239*1da177e4SLinus Torvalds jne 1f 240*1da177e4SLinus Torvalds move.w %d1,%d0 241*1da177e4SLinus Torvalds jsr fp_get_data_reg 242*1da177e4SLinus Torvalds move.l %d0,(%a1) 243*1da177e4SLinus Torvalds jra fpc_movem_fin 244*1da177e4SLinus Torvalds1: move.l (%a1),%d0 245*1da177e4SLinus Torvalds jsr fp_put_data_reg 246*1da177e4SLinus Torvalds jra fpc_movem_fin 247*1da177e4SLinus Torvalds 248*1da177e4SLinus Torvaldsfpc_addr: 249*1da177e4SLinus Torvalds fp_decode_addr_reg 250*1da177e4SLinus Torvalds printf PDECODE,"a%d",1,%d0 251*1da177e4SLinus Torvalds btst #13,%d2 252*1da177e4SLinus Torvalds jne 1f 253*1da177e4SLinus Torvalds jsr fp_get_addr_reg 254*1da177e4SLinus Torvalds move.l %a0,(FPD_FPIAR,FPDATA) 255*1da177e4SLinus Torvalds jra fpc_movem_fin 256*1da177e4SLinus Torvalds1: move.l (FPD_FPIAR,FPDATA),%a0 257*1da177e4SLinus Torvalds jsr fp_put_addr_reg 258*1da177e4SLinus Torvalds jra fpc_movem_fin 259*1da177e4SLinus Torvalds 260*1da177e4SLinus Torvaldsfpc_indirect: 261*1da177e4SLinus Torvalds fp_mode_addr_indirect 262*1da177e4SLinus Torvalds jra fpc_do_movem 263*1da177e4SLinus Torvalds 264*1da177e4SLinus Torvaldsfpc_postinc: 265*1da177e4SLinus Torvalds fp_mode_addr_indirect_postinc 266*1da177e4SLinus Torvalds jra fpc_do_movem 267*1da177e4SLinus Torvalds 268*1da177e4SLinus Torvaldsfpc_predecr: 269*1da177e4SLinus Torvalds fp_mode_addr_indirect_predec 270*1da177e4SLinus Torvalds jra fpc_do_movem 271*1da177e4SLinus Torvalds 272*1da177e4SLinus Torvaldsfpc_disp16: 273*1da177e4SLinus Torvalds fp_mode_addr_indirect_disp16 274*1da177e4SLinus Torvalds jra fpc_do_movem 275*1da177e4SLinus Torvalds 276*1da177e4SLinus Torvaldsfpc_extmode0: 277*1da177e4SLinus Torvalds fp_mode_addr_indirect_extmode0 278*1da177e4SLinus Torvalds jra fpc_do_movem 279*1da177e4SLinus Torvalds 280*1da177e4SLinus Torvaldsfpc_extmode1: 281*1da177e4SLinus Torvalds fp_decode_addr_reg 282*1da177e4SLinus Torvalds jmp ([0f:w,%pc,%d0*4]) 283*1da177e4SLinus Torvalds 284*1da177e4SLinus Torvalds .align 4 285*1da177e4SLinus Torvalds0: 286*1da177e4SLinus Torvalds .long fpc_absolute_short, fpc_absolute_long 287*1da177e4SLinus Torvalds .long fpc_disp16, fpc_extmode0 288*1da177e4SLinus Torvalds .long fpc_immediate, fp_ill 289*1da177e4SLinus Torvalds .long fp_ill, fp_ill 290*1da177e4SLinus Torvalds 291*1da177e4SLinus Torvaldsfpc_absolute_short: 292*1da177e4SLinus Torvalds fp_mode_abs_short 293*1da177e4SLinus Torvalds jra fpc_do_movem 294*1da177e4SLinus Torvalds 295*1da177e4SLinus Torvaldsfpc_absolute_long: 296*1da177e4SLinus Torvalds fp_mode_abs_long 297*1da177e4SLinus Torvalds jra fpc_do_movem 298*1da177e4SLinus Torvalds 299*1da177e4SLinus Torvaldsfpc_immediate: 300*1da177e4SLinus Torvalds fp_get_pc %a0 301*1da177e4SLinus Torvalds lea (%a0,%d1.w*4),%a1 302*1da177e4SLinus Torvalds fp_put_pc %a1 303*1da177e4SLinus Torvalds printf PDECODE,"#imm" 304*1da177e4SLinus Torvalds| jra fpc_do_movem 305*1da177e4SLinus Torvalds#if 0 306*1da177e4SLinus Torvalds swap %d1 307*1da177e4SLinus Torvalds lsl.l #5,%d1 308*1da177e4SLinus Torvalds lea (FPD_FPCR,FPDATA),%a0 309*1da177e4SLinus Torvalds jra 3f 310*1da177e4SLinus Torvalds1: move.l %d0,(%a0) 311*1da177e4SLinus Torvalds2: addq.l #4,%a0 312*1da177e4SLinus Torvalds3: lsl.b #1,%d1 313*1da177e4SLinus Torvalds jcs 1b 314*1da177e4SLinus Torvalds jne 2b 315*1da177e4SLinus Torvalds jra fpc_movem_fin 316*1da177e4SLinus Torvalds#endif 317*1da177e4SLinus Torvalds 318*1da177e4SLinus Torvaldsfpc_do_movem: 319*1da177e4SLinus Torvalds swap %d1 | get fpu register list 320*1da177e4SLinus Torvalds lsl.l #5,%d1 321*1da177e4SLinus Torvalds lea (FPD_FPCR,FPDATA),%a1 322*1da177e4SLinus Torvalds1: btst #13,%d2 323*1da177e4SLinus Torvalds jne 4f 324*1da177e4SLinus Torvalds 325*1da177e4SLinus Torvalds | move register from memory into fpu 326*1da177e4SLinus Torvalds jra 3f 327*1da177e4SLinus Torvalds1: printf PMOVEM,"(%p>%p)",2,%a0,%a1 328*1da177e4SLinus Torvalds getuser.l (%a0)+,%d0,fp_err_ua1,%a0 329*1da177e4SLinus Torvalds move.l %d0,(%a1) 330*1da177e4SLinus Torvalds2: addq.l #4,%a1 331*1da177e4SLinus Torvalds3: lsl.b #1,%d1 332*1da177e4SLinus Torvalds jcs 1b 333*1da177e4SLinus Torvalds jne 2b 334*1da177e4SLinus Torvalds jra fpc_movem_fin 335*1da177e4SLinus Torvalds 336*1da177e4SLinus Torvalds | move register from fpu into memory 337*1da177e4SLinus Torvalds1: printf PMOVEM,"(%p>%p)",2,%a1,%a0 338*1da177e4SLinus Torvalds move.l (%a1),%d0 339*1da177e4SLinus Torvalds putuser.l %d0,(%a0)+,fp_err_ua1,%a0 340*1da177e4SLinus Torvalds2: addq.l #4,%a1 341*1da177e4SLinus Torvalds4: lsl.b #1,%d1 342*1da177e4SLinus Torvalds jcs 1b 343*1da177e4SLinus Torvalds jne 2b 344*1da177e4SLinus Torvalds 345*1da177e4SLinus Torvaldsfpc_movem_fin: 346*1da177e4SLinus Torvalds and.l #0x0000fff0,(FPD_FPCR,FPDATA) 347*1da177e4SLinus Torvalds and.l #0x0ffffff8,(FPD_FPSR,FPDATA) 348*1da177e4SLinus Torvalds move.l (FPD_FPCR,FPDATA),%d0 349*1da177e4SLinus Torvalds lsr.l #4,%d0 350*1da177e4SLinus Torvalds moveq #3,%d1 351*1da177e4SLinus Torvalds and.l %d0,%d1 352*1da177e4SLinus Torvalds move.w %d1,(FPD_RND,FPDATA) 353*1da177e4SLinus Torvalds lsr.l #2,%d0 354*1da177e4SLinus Torvalds moveq #3,%d1 355*1da177e4SLinus Torvalds and.l %d0,%d1 356*1da177e4SLinus Torvalds move.w %d1,(FPD_PREC,FPDATA) 357*1da177e4SLinus Torvalds printf PDECODE,"\n" 358*1da177e4SLinus Torvalds#if 0 359*1da177e4SLinus Torvalds printf PMOVEM,"fpcr : %08x\n",1,FPDATA@(FPD_FPCR) 360*1da177e4SLinus Torvalds printf PMOVEM,"fpsr : %08x\n",1,FPDATA@(FPD_FPSR) 361*1da177e4SLinus Torvalds printf PMOVEM,"fpiar: %08x\n",1,FPDATA@(FPD_FPIAR) 362*1da177e4SLinus Torvalds clr.l %d0 363*1da177e4SLinus Torvalds move.w (FPD_PREC,FPDATA),%d0 364*1da177e4SLinus Torvalds printf PMOVEM,"prec : %04x\n",1,%d0 365*1da177e4SLinus Torvalds move.w (FPD_RND,FPDATA),%d0 366*1da177e4SLinus Torvalds printf PMOVEM,"rnd : %04x\n",1,%d0 367*1da177e4SLinus Torvalds#endif 368*1da177e4SLinus Torvalds jra fp_end 369