xref: /linux/arch/m68k/kernel/traps.c (revision 5e8d780d745c1619aba81fe7166c5a4b5cad2b84) 
1 /*
2  *  linux/arch/m68k/kernel/traps.c
3  *
4  *  Copyright (C) 1993, 1994 by Hamish Macdonald
5  *
6  *  68040 fixes by Michael Rausch
7  *  68040 fixes by Martin Apel
8  *  68040 fixes and writeback by Richard Zidlicky
9  *  68060 fixes by Roman Hodek
10  *  68060 fixes by Jesper Skov
11  *
12  * This file is subject to the terms and conditions of the GNU General Public
13  * License.  See the file COPYING in the main directory of this archive
14  * for more details.
15  */
16 
17 /*
18  * Sets up all exception vectors
19  */
20 
21 #include <linux/config.h>
22 #include <linux/sched.h>
23 #include <linux/signal.h>
24 #include <linux/kernel.h>
25 #include <linux/mm.h>
26 #include <linux/module.h>
27 #include <linux/a.out.h>
28 #include <linux/user.h>
29 #include <linux/string.h>
30 #include <linux/linkage.h>
31 #include <linux/init.h>
32 #include <linux/ptrace.h>
33 #include <linux/kallsyms.h>
34 
35 #include <asm/setup.h>
36 #include <asm/fpu.h>
37 #include <asm/system.h>
38 #include <asm/uaccess.h>
39 #include <asm/traps.h>
40 #include <asm/pgalloc.h>
41 #include <asm/machdep.h>
42 #include <asm/siginfo.h>
43 
44 /* assembler routines */
45 asmlinkage void system_call(void);
46 asmlinkage void buserr(void);
47 asmlinkage void trap(void);
48 asmlinkage void nmihandler(void);
49 #ifdef CONFIG_M68KFPU_EMU
50 asmlinkage void fpu_emu(void);
51 #endif
52 
53 e_vector vectors[256] = {
54 	[VEC_BUSERR]	= buserr,
55 	[VEC_SYS]	= system_call,
56 };
57 
58 /* nmi handler for the Amiga */
59 asm(".text\n"
60     __ALIGN_STR "\n"
61     "nmihandler: rte");
62 
63 /*
64  * this must be called very early as the kernel might
65  * use some instruction that are emulated on the 060
66  */
67 void __init base_trap_init(void)
68 {
69 	if(MACH_IS_SUN3X) {
70 		extern e_vector *sun3x_prom_vbr;
71 
72 		__asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr));
73 	}
74 
75 	/* setup the exception vector table */
76 	__asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors));
77 
78 	if (CPU_IS_060) {
79 		/* set up ISP entry points */
80 		asmlinkage void unimp_vec(void) asm ("_060_isp_unimp");
81 
82 		vectors[VEC_UNIMPII] = unimp_vec;
83 	}
84 }
85 
86 void __init trap_init (void)
87 {
88 	int i;
89 
90 	for (i = VEC_SPUR; i <= VEC_INT7; i++)
91 		vectors[i] = bad_inthandler;
92 
93 	for (i = 0; i < VEC_USER; i++)
94 		if (!vectors[i])
95 			vectors[i] = trap;
96 
97 	for (i = VEC_USER; i < 256; i++)
98 		vectors[i] = bad_inthandler;
99 
100 #ifdef CONFIG_M68KFPU_EMU
101 	if (FPU_IS_EMU)
102 		vectors[VEC_LINE11] = fpu_emu;
103 #endif
104 
105 	if (CPU_IS_040 && !FPU_IS_EMU) {
106 		/* set up FPSP entry points */
107 		asmlinkage void dz_vec(void) asm ("dz");
108 		asmlinkage void inex_vec(void) asm ("inex");
109 		asmlinkage void ovfl_vec(void) asm ("ovfl");
110 		asmlinkage void unfl_vec(void) asm ("unfl");
111 		asmlinkage void snan_vec(void) asm ("snan");
112 		asmlinkage void operr_vec(void) asm ("operr");
113 		asmlinkage void bsun_vec(void) asm ("bsun");
114 		asmlinkage void fline_vec(void) asm ("fline");
115 		asmlinkage void unsupp_vec(void) asm ("unsupp");
116 
117 		vectors[VEC_FPDIVZ] = dz_vec;
118 		vectors[VEC_FPIR] = inex_vec;
119 		vectors[VEC_FPOVER] = ovfl_vec;
120 		vectors[VEC_FPUNDER] = unfl_vec;
121 		vectors[VEC_FPNAN] = snan_vec;
122 		vectors[VEC_FPOE] = operr_vec;
123 		vectors[VEC_FPBRUC] = bsun_vec;
124 		vectors[VEC_LINE11] = fline_vec;
125 		vectors[VEC_FPUNSUP] = unsupp_vec;
126 	}
127 
128 	if (CPU_IS_060 && !FPU_IS_EMU) {
129 		/* set up IFPSP entry points */
130 		asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan");
131 		asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr");
132 		asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl");
133 		asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl");
134 		asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz");
135 		asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex");
136 		asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline");
137 		asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp");
138 		asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd");
139 
140 		vectors[VEC_FPNAN] = snan_vec6;
141 		vectors[VEC_FPOE] = operr_vec6;
142 		vectors[VEC_FPOVER] = ovfl_vec6;
143 		vectors[VEC_FPUNDER] = unfl_vec6;
144 		vectors[VEC_FPDIVZ] = dz_vec6;
145 		vectors[VEC_FPIR] = inex_vec6;
146 		vectors[VEC_LINE11] = fline_vec6;
147 		vectors[VEC_FPUNSUP] = unsupp_vec6;
148 		vectors[VEC_UNIMPEA] = effadd_vec6;
149 	}
150 
151         /* if running on an amiga, make the NMI interrupt do nothing */
152 	if (MACH_IS_AMIGA) {
153 		vectors[VEC_INT7] = nmihandler;
154 	}
155 }
156 
157 
158 static const char *vec_names[] = {
159 	[VEC_RESETSP]	= "RESET SP",
160 	[VEC_RESETPC]	= "RESET PC",
161 	[VEC_BUSERR]	= "BUS ERROR",
162 	[VEC_ADDRERR]	= "ADDRESS ERROR",
163 	[VEC_ILLEGAL]	= "ILLEGAL INSTRUCTION",
164 	[VEC_ZERODIV]	= "ZERO DIVIDE",
165 	[VEC_CHK]	= "CHK",
166 	[VEC_TRAP]	= "TRAPcc",
167 	[VEC_PRIV]	= "PRIVILEGE VIOLATION",
168 	[VEC_TRACE]	= "TRACE",
169 	[VEC_LINE10]	= "LINE 1010",
170 	[VEC_LINE11]	= "LINE 1111",
171 	[VEC_RESV12]	= "UNASSIGNED RESERVED 12",
172 	[VEC_COPROC]	= "COPROCESSOR PROTOCOL VIOLATION",
173 	[VEC_FORMAT]	= "FORMAT ERROR",
174 	[VEC_UNINT]	= "UNINITIALIZED INTERRUPT",
175 	[VEC_RESV16]	= "UNASSIGNED RESERVED 16",
176 	[VEC_RESV17]	= "UNASSIGNED RESERVED 17",
177 	[VEC_RESV18]	= "UNASSIGNED RESERVED 18",
178 	[VEC_RESV19]	= "UNASSIGNED RESERVED 19",
179 	[VEC_RESV20]	= "UNASSIGNED RESERVED 20",
180 	[VEC_RESV21]	= "UNASSIGNED RESERVED 21",
181 	[VEC_RESV22]	= "UNASSIGNED RESERVED 22",
182 	[VEC_RESV23]	= "UNASSIGNED RESERVED 23",
183 	[VEC_SPUR]	= "SPURIOUS INTERRUPT",
184 	[VEC_INT1]	= "LEVEL 1 INT",
185 	[VEC_INT2]	= "LEVEL 2 INT",
186 	[VEC_INT3]	= "LEVEL 3 INT",
187 	[VEC_INT4]	= "LEVEL 4 INT",
188 	[VEC_INT5]	= "LEVEL 5 INT",
189 	[VEC_INT6]	= "LEVEL 6 INT",
190 	[VEC_INT7]	= "LEVEL 7 INT",
191 	[VEC_SYS]	= "SYSCALL",
192 	[VEC_TRAP1]	= "TRAP #1",
193 	[VEC_TRAP2]	= "TRAP #2",
194 	[VEC_TRAP3]	= "TRAP #3",
195 	[VEC_TRAP4]	= "TRAP #4",
196 	[VEC_TRAP5]	= "TRAP #5",
197 	[VEC_TRAP6]	= "TRAP #6",
198 	[VEC_TRAP7]	= "TRAP #7",
199 	[VEC_TRAP8]	= "TRAP #8",
200 	[VEC_TRAP9]	= "TRAP #9",
201 	[VEC_TRAP10]	= "TRAP #10",
202 	[VEC_TRAP11]	= "TRAP #11",
203 	[VEC_TRAP12]	= "TRAP #12",
204 	[VEC_TRAP13]	= "TRAP #13",
205 	[VEC_TRAP14]	= "TRAP #14",
206 	[VEC_TRAP15]	= "TRAP #15",
207 	[VEC_FPBRUC]	= "FPCP BSUN",
208 	[VEC_FPIR]	= "FPCP INEXACT",
209 	[VEC_FPDIVZ]	= "FPCP DIV BY 0",
210 	[VEC_FPUNDER]	= "FPCP UNDERFLOW",
211 	[VEC_FPOE]	= "FPCP OPERAND ERROR",
212 	[VEC_FPOVER]	= "FPCP OVERFLOW",
213 	[VEC_FPNAN]	= "FPCP SNAN",
214 	[VEC_FPUNSUP]	= "FPCP UNSUPPORTED OPERATION",
215 	[VEC_MMUCFG]	= "MMU CONFIGURATION ERROR",
216 	[VEC_MMUILL]	= "MMU ILLEGAL OPERATION ERROR",
217 	[VEC_MMUACC]	= "MMU ACCESS LEVEL VIOLATION ERROR",
218 	[VEC_RESV59]	= "UNASSIGNED RESERVED 59",
219 	[VEC_UNIMPEA]	= "UNASSIGNED RESERVED 60",
220 	[VEC_UNIMPII]	= "UNASSIGNED RESERVED 61",
221 	[VEC_RESV62]	= "UNASSIGNED RESERVED 62",
222 	[VEC_RESV63]	= "UNASSIGNED RESERVED 63",
223 };
224 
225 static const char *space_names[] = {
226 	[0]		= "Space 0",
227 	[USER_DATA]	= "User Data",
228 	[USER_PROGRAM]	= "User Program",
229 #ifndef CONFIG_SUN3
230 	[3]		= "Space 3",
231 #else
232 	[FC_CONTROL]	= "Control",
233 #endif
234 	[4]		= "Space 4",
235 	[SUPER_DATA]	= "Super Data",
236 	[SUPER_PROGRAM]	= "Super Program",
237 	[CPU_SPACE]	= "CPU"
238 };
239 
240 void die_if_kernel(char *,struct pt_regs *,int);
241 asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
242                              unsigned long error_code);
243 int send_fault_sig(struct pt_regs *regs);
244 
245 asmlinkage void trap_c(struct frame *fp);
246 
247 #if defined (CONFIG_M68060)
248 static inline void access_error060 (struct frame *fp)
249 {
250 	unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
251 
252 #ifdef DEBUG
253 	printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
254 #endif
255 
256 	if (fslw & MMU060_BPE) {
257 		/* branch prediction error -> clear branch cache */
258 		__asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
259 				      "orl   #0x00400000,%/d0\n\t"
260 				      "movec %/d0,%/cacr"
261 				      : : : "d0" );
262 		/* return if there's no other error */
263 		if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
264 			return;
265 	}
266 
267 	if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
268 		unsigned long errorcode;
269 		unsigned long addr = fp->un.fmt4.effaddr;
270 
271 		if (fslw & MMU060_MA)
272 			addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
273 
274 		errorcode = 1;
275 		if (fslw & MMU060_DESC_ERR) {
276 			__flush_tlb040_one(addr);
277 			errorcode = 0;
278 		}
279 		if (fslw & MMU060_W)
280 			errorcode |= 2;
281 #ifdef DEBUG
282 		printk("errorcode = %d\n", errorcode );
283 #endif
284 		do_page_fault(&fp->ptregs, addr, errorcode);
285 	} else if (fslw & (MMU060_SEE)){
286 		/* Software Emulation Error.
287 		 * fault during mem_read/mem_write in ifpsp060/os.S
288 		 */
289 		send_fault_sig(&fp->ptregs);
290 	} else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
291 		   send_fault_sig(&fp->ptregs) > 0) {
292 		printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
293 		printk( "68060 access error, fslw=%lx\n", fslw );
294 		trap_c( fp );
295 	}
296 }
297 #endif /* CONFIG_M68060 */
298 
299 #if defined (CONFIG_M68040)
300 static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
301 {
302 	unsigned long mmusr;
303 	mm_segment_t old_fs = get_fs();
304 
305 	set_fs(MAKE_MM_SEG(wbs));
306 
307 	if (iswrite)
308 		asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
309 	else
310 		asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
311 
312 	asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
313 
314 	set_fs(old_fs);
315 
316 	return mmusr;
317 }
318 
319 static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
320 				   unsigned long wbd)
321 {
322 	int res = 0;
323 	mm_segment_t old_fs = get_fs();
324 
325 	/* set_fs can not be moved, otherwise put_user() may oops */
326 	set_fs(MAKE_MM_SEG(wbs));
327 
328 	switch (wbs & WBSIZ_040) {
329 	case BA_SIZE_BYTE:
330 		res = put_user(wbd & 0xff, (char *)wba);
331 		break;
332 	case BA_SIZE_WORD:
333 		res = put_user(wbd & 0xffff, (short *)wba);
334 		break;
335 	case BA_SIZE_LONG:
336 		res = put_user(wbd, (int *)wba);
337 		break;
338 	}
339 
340 	/* set_fs can not be moved, otherwise put_user() may oops */
341 	set_fs(old_fs);
342 
343 
344 #ifdef DEBUG
345 	printk("do_040writeback1, res=%d\n",res);
346 #endif
347 
348 	return res;
349 }
350 
351 /* after an exception in a writeback the stack frame corresponding
352  * to that exception is discarded, set a few bits in the old frame
353  * to simulate what it should look like
354  */
355 static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
356 {
357 	fp->un.fmt7.faddr = wba;
358 	fp->un.fmt7.ssw = wbs & 0xff;
359 	if (wba != current->thread.faddr)
360 	    fp->un.fmt7.ssw |= MA_040;
361 }
362 
363 static inline void do_040writebacks(struct frame *fp)
364 {
365 	int res = 0;
366 #if 0
367 	if (fp->un.fmt7.wb1s & WBV_040)
368 		printk("access_error040: cannot handle 1st writeback. oops.\n");
369 #endif
370 
371 	if ((fp->un.fmt7.wb2s & WBV_040) &&
372 	    !(fp->un.fmt7.wb2s & WBTT_040)) {
373 		res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
374 				       fp->un.fmt7.wb2d);
375 		if (res)
376 			fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
377 		else
378 			fp->un.fmt7.wb2s = 0;
379 	}
380 
381 	/* do the 2nd wb only if the first one was successful (except for a kernel wb) */
382 	if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
383 		res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
384 				       fp->un.fmt7.wb3d);
385 		if (res)
386 		    {
387 			fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
388 
389 			fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
390 			fp->un.fmt7.wb3s &= (~WBV_040);
391 			fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
392 			fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
393 		    }
394 		else
395 			fp->un.fmt7.wb3s = 0;
396 	}
397 
398 	if (res)
399 		send_fault_sig(&fp->ptregs);
400 }
401 
402 /*
403  * called from sigreturn(), must ensure userspace code didn't
404  * manipulate exception frame to circumvent protection, then complete
405  * pending writebacks
406  * we just clear TM2 to turn it into an userspace access
407  */
408 asmlinkage void berr_040cleanup(struct frame *fp)
409 {
410 	fp->un.fmt7.wb2s &= ~4;
411 	fp->un.fmt7.wb3s &= ~4;
412 
413 	do_040writebacks(fp);
414 }
415 
416 static inline void access_error040(struct frame *fp)
417 {
418 	unsigned short ssw = fp->un.fmt7.ssw;
419 	unsigned long mmusr;
420 
421 #ifdef DEBUG
422 	printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
423         printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
424 		fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
425 	printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
426 		fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
427 		fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
428 #endif
429 
430 	if (ssw & ATC_040) {
431 		unsigned long addr = fp->un.fmt7.faddr;
432 		unsigned long errorcode;
433 
434 		/*
435 		 * The MMU status has to be determined AFTER the address
436 		 * has been corrected if there was a misaligned access (MA).
437 		 */
438 		if (ssw & MA_040)
439 			addr = (addr + 7) & -8;
440 
441 		/* MMU error, get the MMUSR info for this access */
442 		mmusr = probe040(!(ssw & RW_040), addr, ssw);
443 #ifdef DEBUG
444 		printk("mmusr = %lx\n", mmusr);
445 #endif
446 		errorcode = 1;
447 		if (!(mmusr & MMU_R_040)) {
448 			/* clear the invalid atc entry */
449 			__flush_tlb040_one(addr);
450 			errorcode = 0;
451 		}
452 
453 		/* despite what documentation seems to say, RMW
454 		 * accesses have always both the LK and RW bits set */
455 		if (!(ssw & RW_040) || (ssw & LK_040))
456 			errorcode |= 2;
457 
458 		if (do_page_fault(&fp->ptregs, addr, errorcode)) {
459 #ifdef DEBUG
460 		        printk("do_page_fault() !=0 \n");
461 #endif
462 			if (user_mode(&fp->ptregs)){
463 				/* delay writebacks after signal delivery */
464 #ifdef DEBUG
465 			        printk(".. was usermode - return\n");
466 #endif
467 				return;
468 			}
469 			/* disable writeback into user space from kernel
470 			 * (if do_page_fault didn't fix the mapping,
471                          * the writeback won't do good)
472 			 */
473 #ifdef DEBUG
474 			printk(".. disabling wb2\n");
475 #endif
476 			if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
477 				fp->un.fmt7.wb2s &= ~WBV_040;
478 		}
479 	} else if (send_fault_sig(&fp->ptregs) > 0) {
480 		printk("68040 access error, ssw=%x\n", ssw);
481 		trap_c(fp);
482 	}
483 
484 	do_040writebacks(fp);
485 }
486 #endif /* CONFIG_M68040 */
487 
488 #if defined(CONFIG_SUN3)
489 #include <asm/sun3mmu.h>
490 
491 extern int mmu_emu_handle_fault (unsigned long, int, int);
492 
493 /* sun3 version of bus_error030 */
494 
495 static inline void bus_error030 (struct frame *fp)
496 {
497 	unsigned char buserr_type = sun3_get_buserr ();
498 	unsigned long addr, errorcode;
499 	unsigned short ssw = fp->un.fmtb.ssw;
500 	extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
501 
502 #ifdef DEBUG
503 	if (ssw & (FC | FB))
504 		printk ("Instruction fault at %#010lx\n",
505 			ssw & FC ?
506 			fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
507 			:
508 			fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
509 	if (ssw & DF)
510 		printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
511 			ssw & RW ? "read" : "write",
512 			fp->un.fmtb.daddr,
513 			space_names[ssw & DFC], fp->ptregs.pc);
514 #endif
515 
516 	/*
517 	 * Check if this page should be demand-mapped. This needs to go before
518 	 * the testing for a bad kernel-space access (demand-mapping applies
519 	 * to kernel accesses too).
520 	 */
521 
522 	if ((ssw & DF)
523 	    && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
524 		if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
525 			return;
526 	}
527 
528 	/* Check for kernel-space pagefault (BAD). */
529 	if (fp->ptregs.sr & PS_S) {
530 		/* kernel fault must be a data fault to user space */
531 		if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
532 		     // try checking the kernel mappings before surrender
533 		     if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
534 			  return;
535 			/* instruction fault or kernel data fault! */
536 			if (ssw & (FC | FB))
537 				printk ("Instruction fault at %#010lx\n",
538 					fp->ptregs.pc);
539 			if (ssw & DF) {
540 				/* was this fault incurred testing bus mappings? */
541 				if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
542 				   (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
543 					send_fault_sig(&fp->ptregs);
544 					return;
545 				}
546 
547 				printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
548 					ssw & RW ? "read" : "write",
549 					fp->un.fmtb.daddr,
550 					space_names[ssw & DFC], fp->ptregs.pc);
551 			}
552 			printk ("BAD KERNEL BUSERR\n");
553 
554 			die_if_kernel("Oops", &fp->ptregs,0);
555 			force_sig(SIGKILL, current);
556 			return;
557 		}
558 	} else {
559 		/* user fault */
560 		if (!(ssw & (FC | FB)) && !(ssw & DF))
561 			/* not an instruction fault or data fault! BAD */
562 			panic ("USER BUSERR w/o instruction or data fault");
563 	}
564 
565 
566 	/* First handle the data fault, if any.  */
567 	if (ssw & DF) {
568 		addr = fp->un.fmtb.daddr;
569 
570 // errorcode bit 0:	0 -> no page		1 -> protection fault
571 // errorcode bit 1:	0 -> read fault		1 -> write fault
572 
573 // (buserr_type & SUN3_BUSERR_PROTERR)	-> protection fault
574 // (buserr_type & SUN3_BUSERR_INVALID)	-> invalid page fault
575 
576 		if (buserr_type & SUN3_BUSERR_PROTERR)
577 			errorcode = 0x01;
578 		else if (buserr_type & SUN3_BUSERR_INVALID)
579 			errorcode = 0x00;
580 		else {
581 #ifdef DEBUG
582 			printk ("*** unexpected busfault type=%#04x\n", buserr_type);
583 			printk ("invalid %s access at %#lx from pc %#lx\n",
584 				!(ssw & RW) ? "write" : "read", addr,
585 				fp->ptregs.pc);
586 #endif
587 			die_if_kernel ("Oops", &fp->ptregs, buserr_type);
588 			force_sig (SIGBUS, current);
589 			return;
590 		}
591 
592 //todo: wtf is RM bit? --m
593 		if (!(ssw & RW) || ssw & RM)
594 			errorcode |= 0x02;
595 
596 		/* Handle page fault. */
597 		do_page_fault (&fp->ptregs, addr, errorcode);
598 
599 		/* Retry the data fault now. */
600 		return;
601 	}
602 
603 	/* Now handle the instruction fault. */
604 
605 	/* Get the fault address. */
606 	if (fp->ptregs.format == 0xA)
607 		addr = fp->ptregs.pc + 4;
608 	else
609 		addr = fp->un.fmtb.baddr;
610 	if (ssw & FC)
611 		addr -= 2;
612 
613 	if (buserr_type & SUN3_BUSERR_INVALID) {
614 		if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
615 			do_page_fault (&fp->ptregs, addr, 0);
616        } else {
617 #ifdef DEBUG
618 		printk ("protection fault on insn access (segv).\n");
619 #endif
620 		force_sig (SIGSEGV, current);
621        }
622 }
623 #else
624 #if defined(CPU_M68020_OR_M68030)
625 static inline void bus_error030 (struct frame *fp)
626 {
627 	volatile unsigned short temp;
628 	unsigned short mmusr;
629 	unsigned long addr, errorcode;
630 	unsigned short ssw = fp->un.fmtb.ssw;
631 #ifdef DEBUG
632 	unsigned long desc;
633 
634 	printk ("pid = %x  ", current->pid);
635 	printk ("SSW=%#06x  ", ssw);
636 
637 	if (ssw & (FC | FB))
638 		printk ("Instruction fault at %#010lx\n",
639 			ssw & FC ?
640 			fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
641 			:
642 			fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
643 	if (ssw & DF)
644 		printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
645 			ssw & RW ? "read" : "write",
646 			fp->un.fmtb.daddr,
647 			space_names[ssw & DFC], fp->ptregs.pc);
648 #endif
649 
650 	/* ++andreas: If a data fault and an instruction fault happen
651 	   at the same time map in both pages.  */
652 
653 	/* First handle the data fault, if any.  */
654 	if (ssw & DF) {
655 		addr = fp->un.fmtb.daddr;
656 
657 #ifdef DEBUG
658 		asm volatile ("ptestr %3,%2@,#7,%0\n\t"
659 			      "pmove %%psr,%1@"
660 			      : "=a&" (desc)
661 			      : "a" (&temp), "a" (addr), "d" (ssw));
662 #else
663 		asm volatile ("ptestr %2,%1@,#7\n\t"
664 			      "pmove %%psr,%0@"
665 			      : : "a" (&temp), "a" (addr), "d" (ssw));
666 #endif
667 		mmusr = temp;
668 
669 #ifdef DEBUG
670 		printk("mmusr is %#x for addr %#lx in task %p\n",
671 		       mmusr, addr, current);
672 		printk("descriptor address is %#lx, contents %#lx\n",
673 		       __va(desc), *(unsigned long *)__va(desc));
674 #endif
675 
676 		errorcode = (mmusr & MMU_I) ? 0 : 1;
677 		if (!(ssw & RW) || (ssw & RM))
678 			errorcode |= 2;
679 
680 		if (mmusr & (MMU_I | MMU_WP)) {
681 			if (ssw & 4) {
682 				printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
683 				       ssw & RW ? "read" : "write",
684 				       fp->un.fmtb.daddr,
685 				       space_names[ssw & DFC], fp->ptregs.pc);
686 				goto buserr;
687 			}
688 			/* Don't try to do anything further if an exception was
689 			   handled. */
690 			if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
691 				return;
692 		} else if (!(mmusr & MMU_I)) {
693 			/* probably a 020 cas fault */
694 			if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
695 				printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
696 		} else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
697 			printk("invalid %s access at %#lx from pc %#lx\n",
698 			       !(ssw & RW) ? "write" : "read", addr,
699 			       fp->ptregs.pc);
700 			die_if_kernel("Oops",&fp->ptregs,mmusr);
701 			force_sig(SIGSEGV, current);
702 			return;
703 		} else {
704 #if 0
705 			static volatile long tlong;
706 #endif
707 
708 			printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
709 			       !(ssw & RW) ? "write" : "read", addr,
710 			       fp->ptregs.pc, ssw);
711 			asm volatile ("ptestr #1,%1@,#0\n\t"
712 				      "pmove %%psr,%0@"
713 				      : /* no outputs */
714 				      : "a" (&temp), "a" (addr));
715 			mmusr = temp;
716 
717 			printk ("level 0 mmusr is %#x\n", mmusr);
718 #if 0
719 			asm volatile ("pmove %%tt0,%0@"
720 				      : /* no outputs */
721 				      : "a" (&tlong));
722 			printk("tt0 is %#lx, ", tlong);
723 			asm volatile ("pmove %%tt1,%0@"
724 				      : /* no outputs */
725 				      : "a" (&tlong));
726 			printk("tt1 is %#lx\n", tlong);
727 #endif
728 #ifdef DEBUG
729 			printk("Unknown SIGSEGV - 1\n");
730 #endif
731 			die_if_kernel("Oops",&fp->ptregs,mmusr);
732 			force_sig(SIGSEGV, current);
733 			return;
734 		}
735 
736 		/* setup an ATC entry for the access about to be retried */
737 		if (!(ssw & RW) || (ssw & RM))
738 			asm volatile ("ploadw %1,%0@" : /* no outputs */
739 				      : "a" (addr), "d" (ssw));
740 		else
741 			asm volatile ("ploadr %1,%0@" : /* no outputs */
742 				      : "a" (addr), "d" (ssw));
743 	}
744 
745 	/* Now handle the instruction fault. */
746 
747 	if (!(ssw & (FC|FB)))
748 		return;
749 
750 	if (fp->ptregs.sr & PS_S) {
751 		printk("Instruction fault at %#010lx\n",
752 			fp->ptregs.pc);
753 	buserr:
754 		printk ("BAD KERNEL BUSERR\n");
755 		die_if_kernel("Oops",&fp->ptregs,0);
756 		force_sig(SIGKILL, current);
757 		return;
758 	}
759 
760 	/* get the fault address */
761 	if (fp->ptregs.format == 10)
762 		addr = fp->ptregs.pc + 4;
763 	else
764 		addr = fp->un.fmtb.baddr;
765 	if (ssw & FC)
766 		addr -= 2;
767 
768 	if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
769 		/* Insn fault on same page as data fault.  But we
770 		   should still create the ATC entry.  */
771 		goto create_atc_entry;
772 
773 #ifdef DEBUG
774 	asm volatile ("ptestr #1,%2@,#7,%0\n\t"
775 		      "pmove %%psr,%1@"
776 		      : "=a&" (desc)
777 		      : "a" (&temp), "a" (addr));
778 #else
779 	asm volatile ("ptestr #1,%1@,#7\n\t"
780 		      "pmove %%psr,%0@"
781 		      : : "a" (&temp), "a" (addr));
782 #endif
783 	mmusr = temp;
784 
785 #ifdef DEBUG
786 	printk ("mmusr is %#x for addr %#lx in task %p\n",
787 		mmusr, addr, current);
788 	printk ("descriptor address is %#lx, contents %#lx\n",
789 		__va(desc), *(unsigned long *)__va(desc));
790 #endif
791 
792 	if (mmusr & MMU_I)
793 		do_page_fault (&fp->ptregs, addr, 0);
794 	else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
795 		printk ("invalid insn access at %#lx from pc %#lx\n",
796 			addr, fp->ptregs.pc);
797 #ifdef DEBUG
798 		printk("Unknown SIGSEGV - 2\n");
799 #endif
800 		die_if_kernel("Oops",&fp->ptregs,mmusr);
801 		force_sig(SIGSEGV, current);
802 		return;
803 	}
804 
805 create_atc_entry:
806 	/* setup an ATC entry for the access about to be retried */
807 	asm volatile ("ploadr #2,%0@" : /* no outputs */
808 		      : "a" (addr));
809 }
810 #endif /* CPU_M68020_OR_M68030 */
811 #endif /* !CONFIG_SUN3 */
812 
813 asmlinkage void buserr_c(struct frame *fp)
814 {
815 	/* Only set esp0 if coming from user mode */
816 	if (user_mode(&fp->ptregs))
817 		current->thread.esp0 = (unsigned long) fp;
818 
819 #ifdef DEBUG
820 	printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
821 #endif
822 
823 	switch (fp->ptregs.format) {
824 #if defined (CONFIG_M68060)
825 	case 4:				/* 68060 access error */
826 	  access_error060 (fp);
827 	  break;
828 #endif
829 #if defined (CONFIG_M68040)
830 	case 0x7:			/* 68040 access error */
831 	  access_error040 (fp);
832 	  break;
833 #endif
834 #if defined (CPU_M68020_OR_M68030)
835 	case 0xa:
836 	case 0xb:
837 	  bus_error030 (fp);
838 	  break;
839 #endif
840 	default:
841 	  die_if_kernel("bad frame format",&fp->ptregs,0);
842 #ifdef DEBUG
843 	  printk("Unknown SIGSEGV - 4\n");
844 #endif
845 	  force_sig(SIGSEGV, current);
846 	}
847 }
848 
849 
850 static int kstack_depth_to_print = 48;
851 
852 void show_trace(unsigned long *stack)
853 {
854 	unsigned long *endstack;
855 	unsigned long addr;
856 	int i;
857 
858 	printk("Call Trace:");
859 	addr = (unsigned long)stack + THREAD_SIZE - 1;
860 	endstack = (unsigned long *)(addr & -THREAD_SIZE);
861 	i = 0;
862 	while (stack + 1 <= endstack) {
863 		addr = *stack++;
864 		/*
865 		 * If the address is either in the text segment of the
866 		 * kernel, or in the region which contains vmalloc'ed
867 		 * memory, it *may* be the address of a calling
868 		 * routine; if so, print it so that someone tracing
869 		 * down the cause of the crash will be able to figure
870 		 * out the call path that was taken.
871 		 */
872 		if (__kernel_text_address(addr)) {
873 #ifndef CONFIG_KALLSYMS
874 			if (i % 5 == 0)
875 				printk("\n       ");
876 #endif
877 			printk(" [<%08lx>]", addr);
878 			print_symbol(" %s\n", addr);
879 			i++;
880 		}
881 	}
882 	printk("\n");
883 }
884 
885 void show_registers(struct pt_regs *regs)
886 {
887 	struct frame *fp = (struct frame *)regs;
888 	mm_segment_t old_fs = get_fs();
889 	u16 c, *cp;
890 	unsigned long addr;
891 	int i;
892 
893 	print_modules();
894 	printk("PC: [<%08lx>]",regs->pc);
895 	print_symbol(" %s", regs->pc);
896 	printk("\nSR: %04x  SP: %p  a2: %08lx\n",
897 	       regs->sr, regs, regs->a2);
898 	printk("d0: %08lx    d1: %08lx    d2: %08lx    d3: %08lx\n",
899 	       regs->d0, regs->d1, regs->d2, regs->d3);
900 	printk("d4: %08lx    d5: %08lx    a0: %08lx    a1: %08lx\n",
901 	       regs->d4, regs->d5, regs->a0, regs->a1);
902 
903 	printk("Process %s (pid: %d, task=%p)\n",
904 		current->comm, current->pid, current);
905 	addr = (unsigned long)&fp->un;
906 	printk("Frame format=%X ", regs->format);
907 	switch (regs->format) {
908 	case 0x2:
909 		printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
910 		addr += sizeof(fp->un.fmt2);
911 		break;
912 	case 0x3:
913 		printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
914 		addr += sizeof(fp->un.fmt3);
915 		break;
916 	case 0x4:
917 		printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
918 			: "eff addr=%08lx pc=%08lx\n"),
919 			fp->un.fmt4.effaddr, fp->un.fmt4.pc);
920 		addr += sizeof(fp->un.fmt4);
921 		break;
922 	case 0x7:
923 		printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
924 			fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
925 		printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
926 			fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
927 		printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
928 			fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
929 		printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
930 			fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
931 		printk("push data: %08lx %08lx %08lx %08lx\n",
932 			fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
933 			fp->un.fmt7.pd3);
934 		addr += sizeof(fp->un.fmt7);
935 		break;
936 	case 0x9:
937 		printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
938 		addr += sizeof(fp->un.fmt9);
939 		break;
940 	case 0xa:
941 		printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
942 			fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
943 			fp->un.fmta.daddr, fp->un.fmta.dobuf);
944 		addr += sizeof(fp->un.fmta);
945 		break;
946 	case 0xb:
947 		printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
948 			fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
949 			fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
950 		printk("baddr=%08lx dibuf=%08lx ver=%x\n",
951 			fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
952 		addr += sizeof(fp->un.fmtb);
953 		break;
954 	default:
955 		printk("\n");
956 	}
957 	show_stack(NULL, (unsigned long *)addr);
958 
959 	printk("Code:");
960 	set_fs(KERNEL_DS);
961 	cp = (u16 *)regs->pc;
962 	for (i = -8; i < 16; i++) {
963 		if (get_user(c, cp + i) && i >= 0) {
964 			printk(" Bad PC value.");
965 			break;
966 		}
967 		printk(i ? " %04x" : " <%04x>", c);
968 	}
969 	set_fs(old_fs);
970 	printk ("\n");
971 }
972 
973 void show_stack(struct task_struct *task, unsigned long *stack)
974 {
975 	unsigned long *p;
976 	unsigned long *endstack;
977 	int i;
978 
979 	if (!stack) {
980 		if (task)
981 			stack = (unsigned long *)task->thread.esp0;
982 		else
983 			stack = (unsigned long *)&stack;
984 	}
985 	endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
986 
987 	printk("Stack from %08lx:", (unsigned long)stack);
988 	p = stack;
989 	for (i = 0; i < kstack_depth_to_print; i++) {
990 		if (p + 1 > endstack)
991 			break;
992 		if (i % 8 == 0)
993 			printk("\n       ");
994 		printk(" %08lx", *p++);
995 	}
996 	printk("\n");
997 	show_trace(stack);
998 }
999 
1000 /*
1001  * The architecture-independent backtrace generator
1002  */
1003 void dump_stack(void)
1004 {
1005 	unsigned long stack;
1006 
1007 	show_trace(&stack);
1008 }
1009 
1010 EXPORT_SYMBOL(dump_stack);
1011 
1012 void bad_super_trap (struct frame *fp)
1013 {
1014 	console_verbose();
1015 	if (fp->ptregs.vector < 4*sizeof(vec_names)/sizeof(vec_names[0]))
1016 		printk ("*** %s ***   FORMAT=%X\n",
1017 			vec_names[(fp->ptregs.vector) >> 2],
1018 			fp->ptregs.format);
1019 	else
1020 		printk ("*** Exception %d ***   FORMAT=%X\n",
1021 			(fp->ptregs.vector) >> 2,
1022 			fp->ptregs.format);
1023 	if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) {
1024 		unsigned short ssw = fp->un.fmtb.ssw;
1025 
1026 		printk ("SSW=%#06x  ", ssw);
1027 
1028 		if (ssw & RC)
1029 			printk ("Pipe stage C instruction fault at %#010lx\n",
1030 				(fp->ptregs.format) == 0xA ?
1031 				fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
1032 		if (ssw & RB)
1033 			printk ("Pipe stage B instruction fault at %#010lx\n",
1034 				(fp->ptregs.format) == 0xA ?
1035 				fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
1036 		if (ssw & DF)
1037 			printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
1038 				ssw & RW ? "read" : "write",
1039 				fp->un.fmtb.daddr, space_names[ssw & DFC],
1040 				fp->ptregs.pc);
1041 	}
1042 	printk ("Current process id is %d\n", current->pid);
1043 	die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
1044 }
1045 
1046 asmlinkage void trap_c(struct frame *fp)
1047 {
1048 	int sig;
1049 	siginfo_t info;
1050 
1051 	if (fp->ptregs.sr & PS_S) {
1052 		if ((fp->ptregs.vector >> 2) == VEC_TRACE) {
1053 			/* traced a trapping instruction */
1054 			current->ptrace |= PT_DTRACE;
1055 		} else
1056 			bad_super_trap(fp);
1057 		return;
1058 	}
1059 
1060 	/* send the appropriate signal to the user program */
1061 	switch ((fp->ptregs.vector) >> 2) {
1062 	    case VEC_ADDRERR:
1063 		info.si_code = BUS_ADRALN;
1064 		sig = SIGBUS;
1065 		break;
1066 	    case VEC_ILLEGAL:
1067 	    case VEC_LINE10:
1068 	    case VEC_LINE11:
1069 		info.si_code = ILL_ILLOPC;
1070 		sig = SIGILL;
1071 		break;
1072 	    case VEC_PRIV:
1073 		info.si_code = ILL_PRVOPC;
1074 		sig = SIGILL;
1075 		break;
1076 	    case VEC_COPROC:
1077 		info.si_code = ILL_COPROC;
1078 		sig = SIGILL;
1079 		break;
1080 	    case VEC_TRAP1:
1081 	    case VEC_TRAP2:
1082 	    case VEC_TRAP3:
1083 	    case VEC_TRAP4:
1084 	    case VEC_TRAP5:
1085 	    case VEC_TRAP6:
1086 	    case VEC_TRAP7:
1087 	    case VEC_TRAP8:
1088 	    case VEC_TRAP9:
1089 	    case VEC_TRAP10:
1090 	    case VEC_TRAP11:
1091 	    case VEC_TRAP12:
1092 	    case VEC_TRAP13:
1093 	    case VEC_TRAP14:
1094 		info.si_code = ILL_ILLTRP;
1095 		sig = SIGILL;
1096 		break;
1097 	    case VEC_FPBRUC:
1098 	    case VEC_FPOE:
1099 	    case VEC_FPNAN:
1100 		info.si_code = FPE_FLTINV;
1101 		sig = SIGFPE;
1102 		break;
1103 	    case VEC_FPIR:
1104 		info.si_code = FPE_FLTRES;
1105 		sig = SIGFPE;
1106 		break;
1107 	    case VEC_FPDIVZ:
1108 		info.si_code = FPE_FLTDIV;
1109 		sig = SIGFPE;
1110 		break;
1111 	    case VEC_FPUNDER:
1112 		info.si_code = FPE_FLTUND;
1113 		sig = SIGFPE;
1114 		break;
1115 	    case VEC_FPOVER:
1116 		info.si_code = FPE_FLTOVF;
1117 		sig = SIGFPE;
1118 		break;
1119 	    case VEC_ZERODIV:
1120 		info.si_code = FPE_INTDIV;
1121 		sig = SIGFPE;
1122 		break;
1123 	    case VEC_CHK:
1124 	    case VEC_TRAP:
1125 		info.si_code = FPE_INTOVF;
1126 		sig = SIGFPE;
1127 		break;
1128 	    case VEC_TRACE:		/* ptrace single step */
1129 		info.si_code = TRAP_TRACE;
1130 		sig = SIGTRAP;
1131 		break;
1132 	    case VEC_TRAP15:		/* breakpoint */
1133 		info.si_code = TRAP_BRKPT;
1134 		sig = SIGTRAP;
1135 		break;
1136 	    default:
1137 		info.si_code = ILL_ILLOPC;
1138 		sig = SIGILL;
1139 		break;
1140 	}
1141 	info.si_signo = sig;
1142 	info.si_errno = 0;
1143 	switch (fp->ptregs.format) {
1144 	    default:
1145 		info.si_addr = (void *) fp->ptregs.pc;
1146 		break;
1147 	    case 2:
1148 		info.si_addr = (void *) fp->un.fmt2.iaddr;
1149 		break;
1150 	    case 7:
1151 		info.si_addr = (void *) fp->un.fmt7.effaddr;
1152 		break;
1153 	    case 9:
1154 		info.si_addr = (void *) fp->un.fmt9.iaddr;
1155 		break;
1156 	    case 10:
1157 		info.si_addr = (void *) fp->un.fmta.daddr;
1158 		break;
1159 	    case 11:
1160 		info.si_addr = (void *) fp->un.fmtb.daddr;
1161 		break;
1162 	}
1163 	force_sig_info (sig, &info, current);
1164 }
1165 
1166 void die_if_kernel (char *str, struct pt_regs *fp, int nr)
1167 {
1168 	if (!(fp->sr & PS_S))
1169 		return;
1170 
1171 	console_verbose();
1172 	printk("%s: %08x\n",str,nr);
1173 	show_registers(fp);
1174 	do_exit(SIGSEGV);
1175 }
1176 
1177 /*
1178  * This function is called if an error occur while accessing
1179  * user-space from the fpsp040 code.
1180  */
1181 asmlinkage void fpsp040_die(void)
1182 {
1183 	do_exit(SIGSEGV);
1184 }
1185 
1186 #ifdef CONFIG_M68KFPU_EMU
1187 asmlinkage void fpemu_signal(int signal, int code, void *addr)
1188 {
1189 	siginfo_t info;
1190 
1191 	info.si_signo = signal;
1192 	info.si_errno = 0;
1193 	info.si_code = code;
1194 	info.si_addr = addr;
1195 	force_sig_info(signal, &info, current);
1196 }
1197 #endif
1198