xref: /linux/arch/m68k/kernel/head.S (revision f3d9478b2ce468c3115b02ecae7e975990697f15)
1/* -*- mode: asm -*-
2**
3** head.S -- This file contains the initial boot code for the
4**	     Linux/68k kernel.
5**
6** Copyright 1993 by Hamish Macdonald
7**
8** 68040 fixes by Michael Rausch
9** 68060 fixes by Roman Hodek
10** MMU cleanup by Randy Thelen
11** Final MMU cleanup by Roman Zippel
12**
13** Atari support by Andreas Schwab, using ideas of Robert de Vries
14** and Bjoern Brauel
15** VME Support by Richard Hirst
16**
17** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
18** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
19** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
20** 95/11/18 Richard Hirst: Added MVME166 support
21** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
22**			      Magnum- and FX-alternate ram
23** 98/04/25 Phil Blundell: added HP300 support
24** 1998/08/30 David Kilzer: Added support for font_desc structures
25**            for linux-2.1.115
26** 9/02/11  Richard Zidlicky: added Q40 support (initial vesion 99/01/01)
27** 2004/05/13 Kars de Jong: Finalised HP300 support
28**
29** This file is subject to the terms and conditions of the GNU General Public
30** License. See the file README.legal in the main directory of this archive
31** for more details.
32**
33*/
34
35/*
36 * Linux startup code.
37 *
38 * At this point, the boot loader has:
39 * Disabled interrupts
40 * Disabled caches
41 * Put us in supervisor state.
42 *
43 * The kernel setup code takes the following steps:
44 * .  Raise interrupt level
45 * .  Set up initial kernel memory mapping.
46 *    .  This sets up a mapping of the 4M of memory the kernel is located in.
47 *    .  It also does a mapping of any initial machine specific areas.
48 * .  Enable the MMU
49 * .  Enable cache memories
50 * .  Jump to kernel startup
51 *
52 * Much of the file restructuring was to accomplish:
53 * 1) Remove register dependency through-out the file.
54 * 2) Increase use of subroutines to perform functions
55 * 3) Increase readability of the code
56 *
57 * Of course, readability is a subjective issue, so it will never be
58 * argued that that goal was accomplished.  It was merely a goal.
59 * A key way to help make code more readable is to give good
60 * documentation.  So, the first thing you will find is exaustive
61 * write-ups on the structure of the file, and the features of the
62 * functional subroutines.
63 *
64 * General Structure:
65 * ------------------
66 *	Without a doubt the single largest chunk of head.S is spent
67 * mapping the kernel and I/O physical space into the logical range
68 * for the kernel.
69 *	There are new subroutines and data structures to make MMU
70 * support cleaner and easier to understand.
71 *	First, you will find a routine call "mmu_map" which maps
72 * a logical to a physical region for some length given a cache
73 * type on behalf of the caller.  This routine makes writing the
74 * actual per-machine specific code very simple.
75 *	A central part of the code, but not a subroutine in itself,
76 * is the mmu_init code which is broken down into mapping the kernel
77 * (the same for all machines) and mapping machine-specific I/O
78 * regions.
79 *	Also, there will be a description of engaging the MMU and
80 * caches.
81 *	You will notice that there is a chunk of code which
82 * can emit the entire MMU mapping of the machine.  This is present
83 * only in debug modes and can be very helpful.
84 *	Further, there is a new console driver in head.S that is
85 * also only engaged in debug mode.  Currently, it's only supported
86 * on the Macintosh class of machines.  However, it is hoped that
87 * others will plug-in support for specific machines.
88 *
89 * ######################################################################
90 *
91 * mmu_map
92 * -------
93 *	mmu_map was written for two key reasons.  First, it was clear
94 * that it was very difficult to read the previous code for mapping
95 * regions of memory.  Second, the Macintosh required such extensive
96 * memory allocations that it didn't make sense to propagate the
97 * existing code any further.
98 *	mmu_map requires some parameters:
99 *
100 *	mmu_map (logical, physical, length, cache_type)
101 *
102 *	While this essentially describes the function in the abstract, you'll
103 * find more indepth description of other parameters at the implementation site.
104 *
105 * mmu_get_root_table_entry
106 * ------------------------
107 * mmu_get_ptr_table_entry
108 * -----------------------
109 * mmu_get_page_table_entry
110 * ------------------------
111 *
112 *	These routines are used by other mmu routines to get a pointer into
113 * a table, if necessary a new table is allocated. These routines are working
114 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
115 * table needs of course only to be allocated once in mmu_get_root_table_entry,
116 * so that here also some mmu specific initialization is done. The second page
117 * at the start of the kernel (the first page is unmapped later) is used for
118 * the kernel_pg_dir. It must be at a position known at link time (as it's used
119 * to initialize the init task struct) and since it needs special cache
120 * settings, it's the easiest to use this page, the rest of the page is used
121 * for further pointer tables.
122 * mmu_get_page_table_entry allocates always a whole page for page tables, this
123 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
124 * to manage page tables in smaller pieces as nearly all mappings have that
125 * size.
126 *
127 * ######################################################################
128 *
129 *
130 * ######################################################################
131 *
132 * mmu_engage
133 * ----------
134 *	Thanks to a small helping routine enabling the mmu got quite simple
135 * and there is only one way left. mmu_engage makes a complete a new mapping
136 * that only includes the absolute necessary to be able to jump to the final
137 * postion and to restore the original mapping.
138 * As this code doesn't need a transparent translation register anymore this
139 * means all registers are free to be used by machines that needs them for
140 * other purposes.
141 *
142 * ######################################################################
143 *
144 * mmu_print
145 * ---------
146 *	This algorithm will print out the page tables of the system as
147 * appropriate for an 030 or an 040.  This is useful for debugging purposes
148 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
149 *
150 * ######################################################################
151 *
152 * console_init
153 * ------------
154 *	The console is also able to be turned off.  The console in head.S
155 * is specifically for debugging and can be very useful.  It is surrounded by
156 * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good
157 * kernels.  It's basic algorithm is to determine the size of the screen
158 * (in height/width and bit depth) and then use that information for
159 * displaying an 8x8 font or an 8x16 (widthxheight).  I prefer the 8x8 for
160 * debugging so I can see more good data.  But it was trivial to add support
161 * for both fonts, so I included it.
162 *	Also, the algorithm for plotting pixels is abstracted so that in
163 * theory other platforms could add support for different kinds of frame
164 * buffers.  This could be very useful.
165 *
166 * console_put_penguin
167 * -------------------
168 *	An important part of any Linux bring up is the penguin and there's
169 * nothing like getting the Penguin on the screen!  This algorithm will work
170 * on any machine for which there is a console_plot_pixel.
171 *
172 * console_scroll
173 * --------------
174 *	My hope is that the scroll algorithm does the right thing on the
175 * various platforms, but it wouldn't be hard to add the test conditions
176 * and new code if it doesn't.
177 *
178 * console_putc
179 * -------------
180 *
181 * ######################################################################
182 *
183 *	Register usage has greatly simplified within head.S. Every subroutine
184 * saves and restores all registers that it modifies (except it returns a
185 * value in there of course). So the only register that needs to be initialized
186 * is the stack pointer.
187 * All other init code and data is now placed in the init section, so it will
188 * be automatically freed at the end of the kernel initialization.
189 *
190 * ######################################################################
191 *
192 * options
193 * -------
194 *	There are many options available in a build of this file.  I've
195 * taken the time to describe them here to save you the time of searching
196 * for them and trying to understand what they mean.
197 *
198 * CONFIG_xxx:	These are the obvious machine configuration defines created
199 * during configuration.  These are defined in include/linux/autoconf.h.
200 *
201 * CONSOLE:	There is support for head.S console in this file.  This
202 * console can talk to a Mac frame buffer, but could easily be extrapolated
203 * to extend it to support other platforms.
204 *
205 * TEST_MMU:	This is a test harness for running on any given machine but
206 * getting an MMU dump for another class of machine.  The classes of machines
207 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
208 * and any of the models (030, 040, 060, etc.).
209 *
210 *	NOTE:	TEST_MMU is NOT permanent!  It is scheduled to be removed
211 *		When head.S boots on Atari, Amiga, Macintosh, and VME
212 *		machines.  At that point the underlying logic will be
213 *		believed to be solid enough to be trusted, and TEST_MMU
214 *		can be dropped.  Do note that that will clean up the
215 *		head.S code significantly as large blocks of #if/#else
216 *		clauses can be removed.
217 *
218 * MMU_NOCACHE_KERNEL:	On the Macintosh platform there was an inquiry into
219 * determing why devices don't appear to work.  A test case was to remove
220 * the cacheability of the kernel bits.
221 *
222 * MMU_PRINT:	There is a routine built into head.S that can display the
223 * MMU data structures.  It outputs its result through the serial_putc
224 * interface.  So where ever that winds up driving data, that's where the
225 * mmu struct will appear.  On the Macintosh that's typically the console.
226 *
227 * SERIAL_DEBUG:	There are a series of putc() macro statements
228 * scattered through out the code to give progress of status to the
229 * person sitting at the console.  This constant determines whether those
230 * are used.
231 *
232 * DEBUG:	This is the standard DEBUG flag that can be set for building
233 *		the kernel.  It has the effect adding additional tests into
234 *		the code.
235 *
236 * FONT_6x11:
237 * FONT_8x8:
238 * FONT_8x16:
239 *		In theory these could be determined at run time or handed
240 *		over by the booter.  But, let's be real, it's a fine hard
241 *		coded value.  (But, you will notice the code is run-time
242 *		flexible!)  A pointer to the font's struct font_desc
243 *		is kept locally in Lconsole_font.  It is used to determine
244 *		font size information dynamically.
245 *
246 * Atari constants:
247 * USE_PRINTER:	Use the printer port for serial debug.
248 * USE_SCC_B:	Use the SCC port A (Serial2) for serial debug.
249 * USE_SCC_A:	Use the SCC port B (Modem2) for serial debug.
250 * USE_MFP:	Use the ST-MFP port (Modem1) for serial debug.
251 *
252 * Macintosh constants:
253 * MAC_SERIAL_DEBUG:	Turns on serial debug output for the Macintosh.
254 * MAC_USE_SCC_A:	Use the SCC port A (modem) for serial debug.
255 * MAC_USE_SCC_B:	Use the SCC port B (printer) for serial debug (default).
256 */
257
258#include <linux/config.h>
259#include <linux/linkage.h>
260#include <linux/init.h>
261#include <asm/bootinfo.h>
262#include <asm/setup.h>
263#include <asm/entry.h>
264#include <asm/pgtable.h>
265#include <asm/page.h>
266#include <asm/asm-offsets.h>
267
268#ifdef CONFIG_MAC
269
270#include <asm/machw.h>
271
272/*
273 * Macintosh console support
274 */
275
276#ifdef CONFIG_FRAMEBUFFER_CONSOLE
277#define CONSOLE
278#define CONSOLE_PENGUIN
279#endif
280
281/*
282 * Macintosh serial debug support; outputs boot info to the printer
283 *   and/or modem serial ports
284 */
285#undef MAC_SERIAL_DEBUG
286
287/*
288 * Macintosh serial debug port selection; define one or both;
289 *   requires MAC_SERIAL_DEBUG to be defined
290 */
291#define MAC_USE_SCC_A		/* Macintosh modem serial port */
292#define MAC_USE_SCC_B		/* Macintosh printer serial port */
293
294#endif	/* CONFIG_MAC */
295
296#undef MMU_PRINT
297#undef MMU_NOCACHE_KERNEL
298#define SERIAL_DEBUG
299#undef DEBUG
300
301/*
302 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
303 * The 8x8 font is harder to read but fits more on the screen.
304 */
305#define FONT_8x8	/* default */
306/* #define FONT_8x16 */	/* 2nd choice */
307/* #define FONT_6x11 */	/* 3rd choice */
308
309.globl kernel_pg_dir
310.globl availmem
311.globl m68k_pgtable_cachemode
312.globl m68k_supervisor_cachemode
313#ifdef CONFIG_MVME16x
314.globl mvme_bdid
315#endif
316#ifdef CONFIG_Q40
317.globl q40_mem_cptr
318#endif
319
320CPUTYPE_040	= 1	/* indicates an 040 */
321CPUTYPE_060	= 2	/* indicates an 060 */
322CPUTYPE_0460	= 3	/* if either above are set, this is set */
323CPUTYPE_020	= 4	/* indicates an 020 */
324
325/* Translation control register */
326TC_ENABLE = 0x8000
327TC_PAGE8K = 0x4000
328TC_PAGE4K = 0x0000
329
330/* Transparent translation registers */
331TTR_ENABLE	= 0x8000	/* enable transparent translation */
332TTR_ANYMODE	= 0x4000	/* user and kernel mode access */
333TTR_KERNELMODE	= 0x2000	/* only kernel mode access */
334TTR_USERMODE	= 0x0000	/* only user mode access */
335TTR_CI		= 0x0400	/* inhibit cache */
336TTR_RW		= 0x0200	/* read/write mode */
337TTR_RWM		= 0x0100	/* read/write mask */
338TTR_FCB2	= 0x0040	/* function code base bit 2 */
339TTR_FCB1	= 0x0020	/* function code base bit 1 */
340TTR_FCB0	= 0x0010	/* function code base bit 0 */
341TTR_FCM2	= 0x0004	/* function code mask bit 2 */
342TTR_FCM1	= 0x0002	/* function code mask bit 1 */
343TTR_FCM0	= 0x0001	/* function code mask bit 0 */
344
345/* Cache Control registers */
346CC6_ENABLE_D	= 0x80000000	/* enable data cache (680[46]0) */
347CC6_FREEZE_D	= 0x40000000	/* freeze data cache (68060) */
348CC6_ENABLE_SB	= 0x20000000	/* enable store buffer (68060) */
349CC6_PUSH_DPI	= 0x10000000	/* disable CPUSH invalidation (68060) */
350CC6_HALF_D	= 0x08000000	/* half-cache mode for data cache (68060) */
351CC6_ENABLE_B	= 0x00800000	/* enable branch cache (68060) */
352CC6_CLRA_B	= 0x00400000	/* clear all entries in branch cache (68060) */
353CC6_CLRU_B	= 0x00200000	/* clear user entries in branch cache (68060) */
354CC6_ENABLE_I	= 0x00008000	/* enable instruction cache (680[46]0) */
355CC6_FREEZE_I	= 0x00004000	/* freeze instruction cache (68060) */
356CC6_HALF_I	= 0x00002000	/* half-cache mode for instruction cache (68060) */
357CC3_ALLOC_WRITE	= 0x00002000	/* write allocate mode(68030) */
358CC3_ENABLE_DB	= 0x00001000	/* enable data burst (68030) */
359CC3_CLR_D	= 0x00000800	/* clear data cache (68030) */
360CC3_CLRE_D	= 0x00000400	/* clear entry in data cache (68030) */
361CC3_FREEZE_D	= 0x00000200	/* freeze data cache (68030) */
362CC3_ENABLE_D	= 0x00000100	/* enable data cache (68030) */
363CC3_ENABLE_IB	= 0x00000010	/* enable instruction burst (68030) */
364CC3_CLR_I	= 0x00000008	/* clear instruction cache (68030) */
365CC3_CLRE_I	= 0x00000004	/* clear entry in instruction cache (68030) */
366CC3_FREEZE_I	= 0x00000002	/* freeze instruction cache (68030) */
367CC3_ENABLE_I	= 0x00000001	/* enable instruction cache (68030) */
368
369/* Miscellaneous definitions */
370PAGESIZE	= 4096
371PAGESHIFT	= 12
372
373ROOT_TABLE_SIZE	= 128
374PTR_TABLE_SIZE	= 128
375PAGE_TABLE_SIZE	= 64
376ROOT_INDEX_SHIFT = 25
377PTR_INDEX_SHIFT  = 18
378PAGE_INDEX_SHIFT = 12
379
380#ifdef DEBUG
381/* When debugging use readable names for labels */
382#ifdef __STDC__
383#define L(name) .head.S.##name
384#else
385#define L(name) .head.S./**/name
386#endif
387#else
388#ifdef __STDC__
389#define L(name) .L##name
390#else
391#define L(name) .L/**/name
392#endif
393#endif
394
395/* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
396#ifndef __INITDATA
397#define __INITDATA	.data
398#define __FINIT		.previous
399#endif
400
401/* Several macros to make the writing of subroutines easier:
402 * - func_start marks the beginning of the routine which setups the frame
403 *   register and saves the registers, it also defines another macro
404 *   to automatically restore the registers again.
405 * - func_return marks the end of the routine and simply calls the prepared
406 *   macro to restore registers and jump back to the caller.
407 * - func_define generates another macro to automatically put arguments
408 *   onto the stack call the subroutine and cleanup the stack again.
409 */
410
411/* Within subroutines these macros can be used to access the arguments
412 * on the stack. With STACK some allocated memory on the stack can be
413 * accessed and ARG0 points to the return address (used by mmu_engage).
414 */
415#define	STACK	%a6@(stackstart)
416#define ARG0	%a6@(4)
417#define ARG1	%a6@(8)
418#define ARG2	%a6@(12)
419#define ARG3	%a6@(16)
420#define ARG4	%a6@(20)
421
422.macro	func_start	name,saveregs,stack=0
423L(\name):
424	linkw	%a6,#-\stack
425	moveml	\saveregs,%sp@-
426.set	stackstart,-\stack
427
428.macro	func_return_\name
429	moveml	%sp@+,\saveregs
430	unlk	%a6
431	rts
432.endm
433.endm
434
435.macro	func_return	name
436	func_return_\name
437.endm
438
439.macro	func_call	name
440	jbsr	L(\name)
441.endm
442
443.macro	move_stack	nr,arg1,arg2,arg3,arg4
444.if	\nr
445	move_stack	"(\nr-1)",\arg2,\arg3,\arg4
446	movel	\arg1,%sp@-
447.endif
448.endm
449
450.macro	func_define	name,nr=0
451.macro	\name	arg1,arg2,arg3,arg4
452	move_stack	\nr,\arg1,\arg2,\arg3,\arg4
453	func_call	\name
454.if	\nr
455	lea	%sp@(\nr*4),%sp
456.endif
457.endm
458.endm
459
460func_define	mmu_map,4
461func_define	mmu_map_tt,4
462func_define	mmu_fixup_page_mmu_cache,1
463func_define	mmu_temp_map,2
464func_define	mmu_engage
465func_define	mmu_get_root_table_entry,1
466func_define	mmu_get_ptr_table_entry,2
467func_define	mmu_get_page_table_entry,2
468func_define	mmu_print
469func_define	get_new_page
470#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
471func_define	set_leds
472#endif
473
474.macro	mmu_map_eq	arg1,arg2,arg3
475	mmu_map	\arg1,\arg1,\arg2,\arg3
476.endm
477
478.macro	get_bi_record	record
479	pea	\record
480	func_call	get_bi_record
481	addql	#4,%sp
482.endm
483
484func_define	serial_putc,1
485func_define	console_putc,1
486
487func_define	console_init
488func_define	console_put_stats
489func_define	console_put_penguin
490func_define	console_plot_pixel,3
491func_define	console_scroll
492
493.macro	putc	ch
494#if defined(CONSOLE) || defined(SERIAL_DEBUG)
495	pea	\ch
496#endif
497#ifdef CONSOLE
498	func_call	console_putc
499#endif
500#ifdef SERIAL_DEBUG
501	func_call	serial_putc
502#endif
503#if defined(CONSOLE) || defined(SERIAL_DEBUG)
504	addql	#4,%sp
505#endif
506.endm
507
508.macro	dputc	ch
509#ifdef DEBUG
510	putc	\ch
511#endif
512.endm
513
514func_define	putn,1
515
516.macro	dputn	nr
517#ifdef DEBUG
518	putn	\nr
519#endif
520.endm
521
522.macro	puts		string
523#if defined(CONSOLE) || defined(SERIAL_DEBUG)
524	__INITDATA
525.Lstr\@:
526	.string	"\string"
527	__FINIT
528	pea	%pc@(.Lstr\@)
529	func_call	puts
530	addql	#4,%sp
531#endif
532.endm
533
534.macro	dputs	string
535#ifdef DEBUG
536	puts	"\string"
537#endif
538.endm
539
540#define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
541#define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
542#define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
543#define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
544#define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
545#define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
546#define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
547#define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
548#define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
549#define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
550#define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
551#define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
552#define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
553
554#define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
555			jeq 42f; \
556			cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
557			jne lab ;\
558		42:\
559
560#define is_040_or_060(lab)	btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
561#define is_not_040_or_060(lab)	btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
562#define is_040(lab)		btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
563#define is_060(lab)		btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
564#define is_not_060(lab)		btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
565#define is_020(lab)		btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
566#define is_not_020(lab)		btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
567
568/* On the HP300 we use the on-board LEDs for debug output before
569   the console is running.  Writing a 1 bit turns the corresponding LED
570   _off_ - on the 340 bit 7 is towards the back panel of the machine.  */
571.macro	leds	mask
572#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
573	hasnt_leds(.Lled\@)
574	pea	\mask
575	func_call	set_leds
576	addql	#4,%sp
577.Lled\@:
578#endif
579.endm
580
581.text
582ENTRY(_stext)
583/*
584 * Version numbers of the bootinfo interface
585 * The area from _stext to _start will later be used as kernel pointer table
586 */
587	bras	1f	/* Jump over bootinfo version numbers */
588
589	.long	BOOTINFOV_MAGIC
590	.long	MACH_AMIGA, AMIGA_BOOTI_VERSION
591	.long	MACH_ATARI, ATARI_BOOTI_VERSION
592	.long	MACH_MVME147, MVME147_BOOTI_VERSION
593	.long	MACH_MVME16x, MVME16x_BOOTI_VERSION
594	.long	MACH_BVME6000, BVME6000_BOOTI_VERSION
595	.long	MACH_MAC, MAC_BOOTI_VERSION
596	.long	MACH_Q40, Q40_BOOTI_VERSION
597	.long	MACH_HP300, HP300_BOOTI_VERSION
598	.long	0
5991:	jra	__start
600
601.equ	kernel_pg_dir,_stext
602
603.equ	.,_stext+PAGESIZE
604
605ENTRY(_start)
606	jra	__start
607__INIT
608ENTRY(__start)
609/*
610 * Setup initial stack pointer
611 */
612	lea	%pc@(_stext),%sp
613
614/*
615 * Record the CPU and machine type.
616 */
617	get_bi_record	BI_MACHTYPE
618	lea	%pc@(m68k_machtype),%a1
619	movel	%a0@,%a1@
620
621	get_bi_record	BI_FPUTYPE
622	lea	%pc@(m68k_fputype),%a1
623	movel	%a0@,%a1@
624
625	get_bi_record	BI_MMUTYPE
626	lea	%pc@(m68k_mmutype),%a1
627	movel	%a0@,%a1@
628
629	get_bi_record	BI_CPUTYPE
630	lea	%pc@(m68k_cputype),%a1
631	movel	%a0@,%a1@
632
633	leds	0x1
634
635#ifdef CONFIG_MAC
636/*
637 * For Macintosh, we need to determine the display parameters early (at least
638 * while debugging it).
639 */
640
641	is_not_mac(L(test_notmac))
642
643	get_bi_record	BI_MAC_VADDR
644	lea	%pc@(L(mac_videobase)),%a1
645	movel	%a0@,%a1@
646
647	get_bi_record	BI_MAC_VDEPTH
648	lea	%pc@(L(mac_videodepth)),%a1
649	movel	%a0@,%a1@
650
651	get_bi_record	BI_MAC_VDIM
652	lea	%pc@(L(mac_dimensions)),%a1
653	movel	%a0@,%a1@
654
655	get_bi_record	BI_MAC_VROW
656	lea	%pc@(L(mac_rowbytes)),%a1
657	movel	%a0@,%a1@
658
659#ifdef MAC_SERIAL_DEBUG
660	get_bi_record	BI_MAC_SCCBASE
661	lea	%pc@(L(mac_sccbase)),%a1
662	movel	%a0@,%a1@
663#endif /* MAC_SERIAL_DEBUG */
664
665#if 0
666	/*
667	 * Clear the screen
668	 */
669	lea	%pc@(L(mac_videobase)),%a0
670	movel	%a0@,%a1
671	lea	%pc@(L(mac_dimensions)),%a0
672	movel	%a0@,%d1
673	swap	%d1		/* #rows is high bytes */
674	andl	#0xFFFF,%d1	/* rows */
675	subl	#10,%d1
676	lea	%pc@(L(mac_rowbytes)),%a0
677loopy2:
678	movel	%a0@,%d0
679	subql	#1,%d0
680loopx2:
681	moveb	#0x55, %a1@+
682	dbra	%d0,loopx2
683	dbra	%d1,loopy2
684#endif
685
686L(test_notmac):
687#endif /* CONFIG_MAC */
688
689
690/*
691 * There are ultimately two pieces of information we want for all kinds of
692 * processors CpuType and CacheBits.  The CPUTYPE was passed in from booter
693 * and is converted here from a booter type definition to a separate bit
694 * number which allows for the standard is_0x0 macro tests.
695 */
696	movel	%pc@(m68k_cputype),%d0
697	/*
698	 * Assume it's an 030
699	 */
700	clrl	%d1
701
702	/*
703	 * Test the BootInfo cputype for 060
704	 */
705	btst	#CPUB_68060,%d0
706	jeq	1f
707	bset	#CPUTYPE_060,%d1
708	bset	#CPUTYPE_0460,%d1
709	jra	3f
7101:
711	/*
712	 * Test the BootInfo cputype for 040
713	 */
714	btst	#CPUB_68040,%d0
715	jeq	2f
716	bset	#CPUTYPE_040,%d1
717	bset	#CPUTYPE_0460,%d1
718	jra	3f
7192:
720	/*
721	 * Test the BootInfo cputype for 020
722	 */
723	btst	#CPUB_68020,%d0
724	jeq	3f
725	bset	#CPUTYPE_020,%d1
726	jra	3f
7273:
728	/*
729	 * Record the cpu type
730	 */
731	lea	%pc@(L(cputype)),%a0
732	movel	%d1,%a0@
733
734	/*
735	 * NOTE:
736	 *
737	 * Now the macros are valid:
738	 *	is_040_or_060
739	 *	is_not_040_or_060
740	 *	is_040
741	 *	is_060
742	 *	is_not_060
743	 */
744
745	/*
746	 * Determine the cache mode for pages holding MMU tables
747	 * and for supervisor mode, unused for '020 and '030
748	 */
749	clrl	%d0
750	clrl	%d1
751
752	is_not_040_or_060(L(save_cachetype))
753
754	/*
755	 * '040 or '060
756	 * d1 := cacheable write-through
757	 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
758	 * but we have been using write-through since at least 2.0.29 so I
759	 * guess it is OK.
760	 */
761#ifdef CONFIG_060_WRITETHROUGH
762	/*
763	 * If this is a 68060 board using drivers with cache coherency
764	 * problems, then supervisor memory accesses need to be write-through
765	 * also; otherwise, we want copyback.
766	 */
767
768	is_not_060(1f)
769	movel	#_PAGE_CACHE040W,%d0
770	jra	L(save_cachetype)
771#endif /* CONFIG_060_WRITETHROUGH */
7721:
773	movew	#_PAGE_CACHE040,%d0
774
775	movel	#_PAGE_CACHE040W,%d1
776
777L(save_cachetype):
778	/* Save cache mode for supervisor mode and page tables
779	 */
780	lea	%pc@(m68k_supervisor_cachemode),%a0
781	movel	%d0,%a0@
782	lea	%pc@(m68k_pgtable_cachemode),%a0
783	movel	%d1,%a0@
784
785/*
786 * raise interrupt level
787 */
788	movew	#0x2700,%sr
789
790/*
791   If running on an Atari, determine the I/O base of the
792   serial port and test if we are running on a Medusa or Hades.
793   This test is necessary here, because on the Hades the serial
794   port is only accessible in the high I/O memory area.
795
796   The test whether it is a Medusa is done by writing to the byte at
797   phys. 0x0. This should result in a bus error on all other machines.
798
799   ...should, but doesn't. The Afterburner040 for the Falcon has the
800   same behaviour (0x0..0x7 are no ROM shadow). So we have to do
801   another test to distinguish Medusa and AB040. This is a
802   read attempt for 0x00ff82fe phys. that should bus error on a Falcon
803   (+AB040), but is in the range where the Medusa always asserts DTACK.
804
805   The test for the Hades is done by reading address 0xb0000000. This
806   should give a bus error on the Medusa.
807 */
808
809#ifdef CONFIG_ATARI
810	is_not_atari(L(notypetest))
811
812	/* get special machine type (Medusa/Hades/AB40) */
813	moveq	#0,%d3 /* default if tag doesn't exist */
814	get_bi_record	BI_ATARI_MCH_TYPE
815	tstl	%d0
816	jbmi	1f
817	movel	%a0@,%d3
818	lea	%pc@(atari_mch_type),%a0
819	movel	%d3,%a0@
8201:
821	/* On the Hades, the iobase must be set up before opening the
822	 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
823	moveq	#0,%d0
824	cmpl	#ATARI_MACH_HADES,%d3
825	jbne	1f
826	movel	#0xff000000,%d0		/* Hades I/O base addr: 0xff000000 */
8271:	lea     %pc@(L(iobase)),%a0
828	movel   %d0,%a0@
829
830L(notypetest):
831#endif
832
833#ifdef CONFIG_VME
834	is_mvme147(L(getvmetype))
835	is_bvme6000(L(getvmetype))
836	is_not_mvme16x(L(gvtdone))
837
838	/* See if the loader has specified the BI_VME_TYPE tag.  Recent
839	 * versions of VMELILO and TFTPLILO do this.  We have to do this
840	 * early so we know how to handle console output.  If the tag
841	 * doesn't exist then we use the Bug for output on MVME16x.
842	 */
843L(getvmetype):
844	get_bi_record	BI_VME_TYPE
845	tstl	%d0
846	jbmi	1f
847	movel	%a0@,%d3
848	lea	%pc@(vme_brdtype),%a0
849	movel	%d3,%a0@
8501:
851#ifdef CONFIG_MVME16x
852	is_not_mvme16x(L(gvtdone))
853
854	/* Need to get the BRD_ID info to differentiate between 162, 167,
855	 * etc.  This is available as a BI_VME_BRDINFO tag with later
856	 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
857	 */
858	get_bi_record	BI_VME_BRDINFO
859	tstl	%d0
860	jpl	1f
861
862	/* Get pointer to board ID data from Bug */
863	movel	%d2,%sp@-
864	trap	#15
865	.word	0x70		/* trap 0x70 - .BRD_ID */
866	movel	%sp@+,%a0
8671:
868	lea	%pc@(mvme_bdid),%a1
869	/* Structure is 32 bytes long */
870	movel	%a0@+,%a1@+
871	movel	%a0@+,%a1@+
872	movel	%a0@+,%a1@+
873	movel	%a0@+,%a1@+
874	movel	%a0@+,%a1@+
875	movel	%a0@+,%a1@+
876	movel	%a0@+,%a1@+
877	movel	%a0@+,%a1@+
878#endif
879
880L(gvtdone):
881
882#endif
883
884#ifdef CONFIG_HP300
885	is_not_hp300(L(nothp))
886
887	/* Get the address of the UART for serial debugging */
888	get_bi_record	BI_HP300_UART_ADDR
889	tstl	%d0
890	jbmi	1f
891	movel	%a0@,%d3
892	lea	%pc@(L(uartbase)),%a0
893	movel	%d3,%a0@
894	get_bi_record	BI_HP300_UART_SCODE
895	tstl	%d0
896	jbmi	1f
897	movel	%a0@,%d3
898	lea	%pc@(L(uart_scode)),%a0
899	movel	%d3,%a0@
9001:
901L(nothp):
902#endif
903
904/*
905 * Initialize serial port
906 */
907	jbsr	L(serial_init)
908
909/*
910 * Initialize console
911 */
912#ifdef CONFIG_MAC
913	is_not_mac(L(nocon))
914#ifdef CONSOLE
915	console_init
916#ifdef CONSOLE_PENGUIN
917	console_put_penguin
918#endif	/* CONSOLE_PENGUIN */
919	console_put_stats
920#endif	/* CONSOLE */
921L(nocon):
922#endif	/* CONFIG_MAC */
923
924
925	putc	'\n'
926	putc	'A'
927	leds	0x2
928	dputn	%pc@(L(cputype))
929	dputn	%pc@(m68k_supervisor_cachemode)
930	dputn	%pc@(m68k_pgtable_cachemode)
931	dputc	'\n'
932
933/*
934 * Save physical start address of kernel
935 */
936	lea	%pc@(L(phys_kernel_start)),%a0
937	lea	%pc@(_stext),%a1
938	subl	#_stext,%a1
939	addl	#PAGE_OFFSET,%a1
940	movel	%a1,%a0@
941
942	putc	'B'
943
944	leds	0x4
945
946/*
947 *	mmu_init
948 *
949 *	This block of code does what's necessary to map in the various kinds
950 *	of machines for execution of Linux.
951 *	First map the first 4 MB of kernel code & data
952 */
953
954	mmu_map	#PAGE_OFFSET,%pc@(L(phys_kernel_start)),#4*1024*1024,\
955		%pc@(m68k_supervisor_cachemode)
956
957	putc	'C'
958
959#ifdef CONFIG_AMIGA
960
961L(mmu_init_amiga):
962
963	is_not_amiga(L(mmu_init_not_amiga))
964/*
965 * mmu_init_amiga
966 */
967
968	putc	'D'
969
970	is_not_040_or_060(1f)
971
972	/*
973	 * 040: Map the 16Meg range physical 0x0 upto logical 0x8000.0000
974	 */
975	mmu_map		#0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
976	/*
977	 * Map the Zorro III I/O space with transparent translation
978	 * for frame buffer memory etc.
979	 */
980	mmu_map_tt	#1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
981
982	jbra	L(mmu_init_done)
983
9841:
985	/*
986	 * 030:	Map the 32Meg range physical 0x0 upto logical 0x8000.0000
987	 */
988	mmu_map		#0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
989	mmu_map_tt	#1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
990
991	jbra	L(mmu_init_done)
992
993L(mmu_init_not_amiga):
994#endif
995
996#ifdef CONFIG_ATARI
997
998L(mmu_init_atari):
999
1000	is_not_atari(L(mmu_init_not_atari))
1001
1002	putc	'E'
1003
1004/* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
1005   the last 16 MB of virtual address space to the first 16 MB (i.e.
1006   0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
1007   needed. I/O ranges are marked non-cachable.
1008
1009   For the Medusa it is better to map the I/O region transparently
1010   (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
1011   accessible only in the high area.
1012
1013   On the Hades all I/O registers are only accessible in the high
1014   area.
1015*/
1016
1017	/* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
1018	moveq	#0,%d0
1019	movel	%pc@(atari_mch_type),%d3
1020	cmpl	#ATARI_MACH_MEDUSA,%d3
1021	jbeq	2f
1022	cmpl	#ATARI_MACH_HADES,%d3
1023	jbne	1f
10242:	movel	#0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
10251:	movel	%d0,%d3
1026
1027	is_040_or_060(L(spata68040))
1028
1029	/* Map everything non-cacheable, though not all parts really
1030	 * need to disable caches (crucial only for 0xff8000..0xffffff
1031	 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
1032	 * isn't really used, except for sometimes peeking into the
1033	 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
1034	 * this. */
1035	mmu_map	#0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
1036
1037	jbra	L(mmu_init_done)
1038
1039L(spata68040):
1040
1041	mmu_map	#0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
1042
1043	jbra	L(mmu_init_done)
1044
1045L(mmu_init_not_atari):
1046#endif
1047
1048#ifdef CONFIG_Q40
1049	is_not_q40(L(notq40))
1050	/*
1051	 * add transparent mapping for 0xff00 0000 - 0xffff ffff
1052	 * non-cached serialized etc..
1053	 * this includes master chip, DAC, RTC and ISA ports
1054	 * 0xfe000000-0xfeffffff is for screen and ROM
1055	 */
1056
1057	putc    'Q'
1058
1059	mmu_map_tt	#0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
1060	mmu_map_tt	#1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
1061
1062	jbra	L(mmu_init_done)
1063
1064L(notq40):
1065#endif
1066
1067#ifdef CONFIG_HP300
1068	is_not_hp300(L(nothp300))
1069
1070	/* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
1071	 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx).
1072	 * The ROM mapping is needed because the LEDs are mapped there too.
1073	 */
1074
1075	is_040(1f)
1076
1077	/*
1078	 * 030: Map the 32Meg range physical 0x0 upto logical 0xf000.0000
1079	 */
1080	mmu_map	#0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
1081
1082	jbra	L(mmu_init_done)
1083
10841:
1085	/*
1086	 * 040: Map the 16Meg range physical 0x0 upto logical 0xf000.0000
1087	 */
1088	mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
1089
1090	jbra	L(mmu_init_done)
1091
1092L(nothp300):
1093#endif /* CONFIG_HP300 */
1094
1095#ifdef CONFIG_MVME147
1096
1097	is_not_mvme147(L(not147))
1098
1099	/*
1100	 * On MVME147 we have already created kernel page tables for
1101	 * 4MB of RAM at address 0, so now need to do a transparent
1102	 * mapping of the top of memory space.  Make it 0.5GByte for now,
1103	 * so we can access on-board i/o areas.
1104	 */
1105
1106	mmu_map_tt	#1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
1107
1108	jbra	L(mmu_init_done)
1109
1110L(not147):
1111#endif /* CONFIG_MVME147 */
1112
1113#ifdef CONFIG_MVME16x
1114
1115	is_not_mvme16x(L(not16x))
1116
1117	/*
1118	 * On MVME16x we have already created kernel page tables for
1119	 * 4MB of RAM at address 0, so now need to do a transparent
1120	 * mapping of the top of memory space.  Make it 0.5GByte for now.
1121	 * Supervisor only access, so transparent mapping doesn't
1122	 * clash with User code virtual address space.
1123	 * this covers IO devices, PROM and SRAM.  The PROM and SRAM
1124	 * mapping is needed to allow 167Bug to run.
1125	 * IO is in the range 0xfff00000 to 0xfffeffff.
1126	 * PROM is 0xff800000->0xffbfffff and SRAM is
1127	 * 0xffe00000->0xffe1ffff.
1128	 */
1129
1130	mmu_map_tt	#1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1131
1132	jbra	L(mmu_init_done)
1133
1134L(not16x):
1135#endif	/* CONFIG_MVME162 | CONFIG_MVME167 */
1136
1137#ifdef CONFIG_BVME6000
1138
1139	is_not_bvme6000(L(not6000))
1140
1141	/*
1142	 * On BVME6000 we have already created kernel page tables for
1143	 * 4MB of RAM at address 0, so now need to do a transparent
1144	 * mapping of the top of memory space.  Make it 0.5GByte for now,
1145	 * so we can access on-board i/o areas.
1146	 * Supervisor only access, so transparent mapping doesn't
1147	 * clash with User code virtual address space.
1148	 */
1149
1150	mmu_map_tt	#1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1151
1152	jbra	L(mmu_init_done)
1153
1154L(not6000):
1155#endif /* CONFIG_BVME6000 */
1156
1157/*
1158 * mmu_init_mac
1159 *
1160 * The Macintosh mappings are less clear.
1161 *
1162 * Even as of this writing, it is unclear how the
1163 * Macintosh mappings will be done.  However, as
1164 * the first author of this code I'm proposing the
1165 * following model:
1166 *
1167 * Map the kernel (that's already done),
1168 * Map the I/O (on most machines that's the
1169 * 0x5000.0000 ... 0x5300.0000 range,
1170 * Map the video frame buffer using as few pages
1171 * as absolutely (this requirement mostly stems from
1172 * the fact that when the frame buffer is at
1173 * 0x0000.0000 then we know there is valid RAM just
1174 * above the screen that we don't want to waste!).
1175 *
1176 * By the way, if the frame buffer is at 0x0000.0000
1177 * then the Macintosh is known as an RBV based Mac.
1178 *
1179 * By the way 2, the code currently maps in a bunch of
1180 * regions.  But I'd like to cut that out.  (And move most
1181 * of the mappings up into the kernel proper ... or only
1182 * map what's necessary.)
1183 */
1184
1185#ifdef CONFIG_MAC
1186
1187L(mmu_init_mac):
1188
1189	is_not_mac(L(mmu_init_not_mac))
1190
1191	putc	'F'
1192
1193	is_not_040_or_060(1f)
1194
1195	moveq	#_PAGE_NOCACHE_S,%d3
1196	jbra	2f
11971:
1198	moveq	#_PAGE_NOCACHE030,%d3
11992:
1200	/*
1201	 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
1202	 *	     we simply map the 4MB that contains the videomem
1203	 */
1204
1205	movel	#VIDEOMEMMASK,%d0
1206	andl	%pc@(L(mac_videobase)),%d0
1207
1208	mmu_map		#VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
1209	/* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
1210	mmu_map_eq	#0x40000000,#0x02000000,%d3
1211	/* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
1212	mmu_map_eq	#0x50000000,#0x03000000,%d3
1213	/* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
1214	mmu_map_tt	#1,#0xf8000000,#0x08000000,%d3
1215
1216	jbra	L(mmu_init_done)
1217
1218L(mmu_init_not_mac):
1219#endif
1220
1221#ifdef CONFIG_SUN3X
1222	is_not_sun3x(L(notsun3x))
1223
1224	/* oh, the pain..  We're gonna want the prom code after
1225	 * starting the MMU, so we copy the mappings, translating
1226	 * from 8k -> 4k pages as we go.
1227	 */
1228
1229	/* copy maps from 0xfee00000 to 0xff000000 */
1230	movel	#0xfee00000, %d0
1231	moveq	#ROOT_INDEX_SHIFT, %d1
1232	lsrl	%d1,%d0
1233	mmu_get_root_table_entry	%d0
1234
1235	movel	#0xfee00000, %d0
1236	moveq	#PTR_INDEX_SHIFT, %d1
1237	lsrl	%d1,%d0
1238	andl	#PTR_TABLE_SIZE-1, %d0
1239	mmu_get_ptr_table_entry		%a0,%d0
1240
1241	movel	#0xfee00000, %d0
1242	moveq	#PAGE_INDEX_SHIFT, %d1
1243	lsrl	%d1,%d0
1244	andl	#PAGE_TABLE_SIZE-1, %d0
1245	mmu_get_page_table_entry	%a0,%d0
1246
1247	/* this is where the prom page table lives */
1248	movel	0xfefe00d4, %a1
1249	movel	%a1@, %a1
1250
1251	movel	#((0x200000 >> 13)-1), %d1
1252
12531:
1254	movel	%a1@+, %d3
1255	movel	%d3,%a0@+
1256	addl	#0x1000,%d3
1257	movel	%d3,%a0@+
1258
1259	dbra	%d1,1b
1260
1261	/* setup tt1 for I/O */
1262	mmu_map_tt	#1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
1263	jbra	L(mmu_init_done)
1264
1265L(notsun3x):
1266#endif
1267
1268#ifdef CONFIG_APOLLO
1269	is_not_apollo(L(notapollo))
1270
1271	putc	'P'
1272	mmu_map         #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
1273
1274L(notapollo):
1275	jbra	L(mmu_init_done)
1276#endif
1277
1278L(mmu_init_done):
1279
1280	putc	'G'
1281	leds	0x8
1282
1283/*
1284 * mmu_fixup
1285 *
1286 * On the 040 class machines, all pages that are used for the
1287 * mmu have to be fixed up. According to Motorola, pages holding mmu
1288 * tables should be non-cacheable on a '040 and write-through on a
1289 * '060. But analysis of the reasons for this, and practical
1290 * experience, showed that write-through also works on a '040.
1291 *
1292 * Allocated memory so far goes from kernel_end to memory_start that
1293 * is used for all kind of tables, for that the cache attributes
1294 * are now fixed.
1295 */
1296L(mmu_fixup):
1297
1298	is_not_040_or_060(L(mmu_fixup_done))
1299
1300#ifdef MMU_NOCACHE_KERNEL
1301	jbra	L(mmu_fixup_done)
1302#endif
1303
1304	/* first fix the page at the start of the kernel, that
1305	 * contains also kernel_pg_dir.
1306	 */
1307	movel	%pc@(L(phys_kernel_start)),%d0
1308	subl	#PAGE_OFFSET,%d0
1309	lea	%pc@(_stext),%a0
1310	subl	%d0,%a0
1311	mmu_fixup_page_mmu_cache	%a0
1312
1313	movel	%pc@(L(kernel_end)),%a0
1314	subl	%d0,%a0
1315	movel	%pc@(L(memory_start)),%a1
1316	subl	%d0,%a1
1317	bra	2f
13181:
1319	mmu_fixup_page_mmu_cache	%a0
1320	addw	#PAGESIZE,%a0
13212:
1322	cmpl	%a0,%a1
1323	jgt	1b
1324
1325L(mmu_fixup_done):
1326
1327#ifdef MMU_PRINT
1328	mmu_print
1329#endif
1330
1331/*
1332 * mmu_engage
1333 *
1334 * This chunk of code performs the gruesome task of engaging the MMU.
1335 * The reason its gruesome is because when the MMU becomes engaged it
1336 * maps logical addresses to physical addresses.  The Program Counter
1337 * register is then passed through the MMU before the next instruction
1338 * is fetched (the instruction following the engage MMU instruction).
1339 * This may mean one of two things:
1340 * 1. The Program Counter falls within the logical address space of
1341 *    the kernel of which there are two sub-possibilities:
1342 *    A. The PC maps to the correct instruction (logical PC == physical
1343 *       code location), or
1344 *    B. The PC does not map through and the processor will read some
1345 *       data (or instruction) which is not the logically next instr.
1346 *    As you can imagine, A is good and B is bad.
1347 * Alternatively,
1348 * 2. The Program Counter does not map through the MMU.  The processor
1349 *    will take a Bus Error.
1350 * Clearly, 2 is bad.
1351 * It doesn't take a wiz kid to figure you want 1.A.
1352 * This code creates that possibility.
1353 * There are two possible 1.A. states (we now ignore the other above states):
1354 * A. The kernel is located at physical memory addressed the same as
1355 *    the logical memory for the kernel, i.e., 0x01000.
1356 * B. The kernel is located some where else.  e.g., 0x0400.0000
1357 *
1358 *    Under some conditions the Macintosh can look like A or B.
1359 * [A friend and I once noted that Apple hardware engineers should be
1360 * wacked twice each day: once when they show up at work (as in, Whack!,
1361 * "This is for the screwy hardware we know you're going to design today."),
1362 * and also at the end of the day (as in, Whack! "I don't know what
1363 * you designed today, but I'm sure it wasn't good."). -- rst]
1364 *
1365 * This code works on the following premise:
1366 * If the kernel start (%d5) is within the first 16 Meg of RAM,
1367 * then create a mapping for the kernel at logical 0x8000.0000 to
1368 * the physical location of the pc.  And, create a transparent
1369 * translation register for the first 16 Meg.  Then, after the MMU
1370 * is engaged, the PC can be moved up into the 0x8000.0000 range
1371 * and then the transparent translation can be turned off and then
1372 * the PC can jump to the correct logical location and it will be
1373 * home (finally).  This is essentially the code that the Amiga used
1374 * to use.  Now, it's generalized for all processors.  Which means
1375 * that a fresh (but temporary) mapping has to be created.  The mapping
1376 * is made in page 0 (an as of yet unused location -- except for the
1377 * stack!).  This temporary mapping will only require 1 pointer table
1378 * and a single page table (it can map 256K).
1379 *
1380 * OK, alternatively, imagine that the Program Counter is not within
1381 * the first 16 Meg.  Then, just use Transparent Translation registers
1382 * to do the right thing.
1383 *
1384 * Last, if _start is already at 0x01000, then there's nothing special
1385 * to do (in other words, in a degenerate case of the first case above,
1386 * do nothing).
1387 *
1388 * Let's do it.
1389 *
1390 *
1391 */
1392
1393	putc	'H'
1394
1395	mmu_engage
1396
1397/*
1398 * After this point no new memory is allocated and
1399 * the start of available memory is stored in availmem.
1400 * (The bootmem allocator requires now the physicall address.)
1401 */
1402
1403	movel	L(memory_start),availmem
1404
1405#ifdef CONFIG_AMIGA
1406	is_not_amiga(1f)
1407	/* fixup the Amiga custom register location before printing */
1408	clrl	L(custom)
14091:
1410#endif
1411
1412#ifdef CONFIG_ATARI
1413	is_not_atari(1f)
1414	/* fixup the Atari iobase register location before printing */
1415	movel	#0xff000000,L(iobase)
14161:
1417#endif
1418
1419#ifdef CONFIG_MAC
1420	is_not_mac(1f)
1421	movel	#~VIDEOMEMMASK,%d0
1422	andl	L(mac_videobase),%d0
1423	addl	#VIDEOMEMBASE,%d0
1424	movel	%d0,L(mac_videobase)
1425#if defined(CONSOLE)
1426	movel	%pc@(L(phys_kernel_start)),%d0
1427	subl	#PAGE_OFFSET,%d0
1428	subl	%d0,L(console_font)
1429	subl	%d0,L(console_font_data)
1430#endif
1431#ifdef MAC_SERIAL_DEBUG
1432	orl	#0x50000000,L(mac_sccbase)
1433#endif
14341:
1435#endif
1436
1437#ifdef CONFIG_HP300
1438	is_not_hp300(1f)
1439	/*
1440	 * Fix up the iobase register to point to the new location of the LEDs.
1441	 */
1442	movel	#0xf0000000,L(iobase)
1443
1444	/*
1445	 * Energise the FPU and caches.
1446	 */
1447	is_040(1f)
1448	movel	#0x60,0xf05f400c
1449	jbra	2f
1450
1451	/*
1452	 * 040: slightly different, apparently.
1453	 */
14541:	movew	#0,0xf05f400e
1455	movew	#0x64,0xf05f400e
14562:
1457#endif
1458
1459#ifdef CONFIG_SUN3X
1460	is_not_sun3x(1f)
1461
1462	/* enable copro */
1463	oriw	#0x4000,0x61000000
14641:
1465#endif
1466
1467#ifdef CONFIG_APOLLO
1468	is_not_apollo(1f)
1469
1470	/*
1471	 * Fix up the iobase before printing
1472	 */
1473	movel	#0x80000000,L(iobase)
14741:
1475#endif
1476
1477	putc	'I'
1478	leds	0x10
1479
1480/*
1481 * Enable caches
1482 */
1483
1484	is_not_040_or_060(L(cache_not_680460))
1485
1486L(cache680460):
1487	.chip	68040
1488	nop
1489	cpusha	%bc
1490	nop
1491
1492	is_060(L(cache68060))
1493
1494	movel	#CC6_ENABLE_D+CC6_ENABLE_I,%d0
1495	/* MMU stuff works in copyback mode now, so enable the cache */
1496	movec	%d0,%cacr
1497	jra	L(cache_done)
1498
1499L(cache68060):
1500	movel	#CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
1501	/* MMU stuff works in copyback mode now, so enable the cache */
1502	movec	%d0,%cacr
1503	/* enable superscalar dispatch in PCR */
1504	moveq	#1,%d0
1505	.chip	68060
1506	movec	%d0,%pcr
1507
1508	jbra	L(cache_done)
1509L(cache_not_680460):
1510L(cache68030):
1511	.chip	68030
1512	movel	#CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
1513	movec	%d0,%cacr
1514
1515	jra	L(cache_done)
1516	.chip	68k
1517L(cache_done):
1518
1519	putc	'J'
1520
1521/*
1522 * Setup initial stack pointer
1523 */
1524	lea	init_task,%curptr
1525	lea	init_thread_union+THREAD_SIZE,%sp
1526
1527	putc	'K'
1528
1529	subl	%a6,%a6		/* clear a6 for gdb */
1530
1531/*
1532 * The new 64bit printf support requires an early exception initialization.
1533 */
1534	jbsr	base_trap_init
1535
1536/* jump to the kernel start */
1537
1538	putc	'\n'
1539	leds	0x55
1540
1541	jbsr	start_kernel
1542
1543/*
1544 * Find a tag record in the bootinfo structure
1545 * The bootinfo structure is located right after the kernel bss
1546 * Returns: d0: size (-1 if not found)
1547 *          a0: data pointer (end-of-records if not found)
1548 */
1549func_start	get_bi_record,%d1
1550
1551	movel	ARG1,%d0
1552	lea	%pc@(_end),%a0
15531:	tstw	%a0@(BIR_TAG)
1554	jeq	3f
1555	cmpw	%a0@(BIR_TAG),%d0
1556	jeq	2f
1557	addw	%a0@(BIR_SIZE),%a0
1558	jra	1b
15592:	moveq	#0,%d0
1560	movew	%a0@(BIR_SIZE),%d0
1561	lea	%a0@(BIR_DATA),%a0
1562	jra	4f
15633:	moveq	#-1,%d0
1564	lea	%a0@(BIR_SIZE),%a0
15654:
1566func_return	get_bi_record
1567
1568
1569/*
1570 *	MMU Initialization Begins Here
1571 *
1572 *	The structure of the MMU tables on the 68k machines
1573 *	is thus:
1574 *	Root Table
1575 *		Logical addresses are translated through
1576 *	a hierarchical translation mechanism where the high-order
1577 *	seven bits of the logical address (LA) are used as an
1578 *	index into the "root table."  Each entry in the root
1579 *	table has a bit which specifies if it's a valid pointer to a
1580 *	pointer table.  Each entry defines a 32KMeg range of memory.
1581 *	If an entry is invalid then that logical range of 32M is
1582 *	invalid and references to that range of memory (when the MMU
1583 *	is enabled) will fault.  If the entry is valid, then it does
1584 *	one of two things.  On 040/060 class machines, it points to
1585 *	a pointer table which then describes more finely the memory
1586 *	within that 32M range.  On 020/030 class machines, a technique
1587 *	called "early terminating descriptors" are used.  This technique
1588 *	allows an entire 32Meg to be described by a single entry in the
1589 *	root table.  Thus, this entry in the root table, contains the
1590 *	physical address of the memory or I/O at the logical address
1591 *	which the entry represents and it also contains the necessary
1592 *	cache bits for this region.
1593 *
1594 *	Pointer Tables
1595 *		Per the Root Table, there will be one or more
1596 *	pointer tables.  Each pointer table defines a 32M range.
1597 *	Not all of the 32M range need be defined.  Again, the next
1598 *	seven bits of the logical address are used an index into
1599 *	the pointer table to point to page tables (if the pointer
1600 *	is valid).  There will undoubtedly be more than one
1601 *	pointer table for the kernel because each pointer table
1602 *	defines a range of only 32M.  Valid pointer table entries
1603 *	point to page tables, or are early terminating entries
1604 *	themselves.
1605 *
1606 *	Page Tables
1607 *		Per the Pointer Tables, each page table entry points
1608 *	to the physical page in memory that supports the logical
1609 *	address that translates to the particular index.
1610 *
1611 *	In short, the Logical Address gets translated as follows:
1612 *		bits 31..26 - index into the Root Table
1613 *		bits 25..18 - index into the Pointer Table
1614 *		bits 17..12 - index into the Page Table
1615 *		bits 11..0  - offset into a particular 4K page
1616 *
1617 *	The algorithms which follows do one thing: they abstract
1618 *	the MMU hardware.  For example, there are three kinds of
1619 *	cache settings that are relevant.  Either, memory is
1620 *	being mapped in which case it is either Kernel Code (or
1621 *	the RamDisk) or it is MMU data.  On the 030, the MMU data
1622 *	option also describes the kernel.  Or, I/O is being mapped
1623 *	in which case it has its own kind of cache bits.  There
1624 *	are constants which abstract these notions from the code that
1625 *	actually makes the call to map some range of memory.
1626 *
1627 *
1628 *
1629 */
1630
1631#ifdef MMU_PRINT
1632/*
1633 *	mmu_print
1634 *
1635 *	This algorithm will print out the current MMU mappings.
1636 *
1637 *	Input:
1638 *		%a5 points to the root table.  Everything else is calculated
1639 *			from this.
1640 */
1641
1642#define mmu_next_valid		0
1643#define mmu_start_logical	4
1644#define mmu_next_logical	8
1645#define mmu_start_physical	12
1646#define mmu_next_physical	16
1647
1648#define MMU_PRINT_INVALID		-1
1649#define MMU_PRINT_VALID			1
1650#define MMU_PRINT_UNINITED		0
1651
1652#define putZc(z,n)		jbne 1f; putc z; jbra 2f; 1: putc n; 2:
1653
1654func_start	mmu_print,%a0-%a6/%d0-%d7
1655
1656	movel	%pc@(L(kernel_pgdir_ptr)),%a5
1657	lea	%pc@(L(mmu_print_data)),%a0
1658	movel	#MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
1659
1660	is_not_040_or_060(mmu_030_print)
1661
1662mmu_040_print:
1663	puts	"\nMMU040\n"
1664	puts	"rp:"
1665	putn	%a5
1666	putc	'\n'
1667#if 0
1668	/*
1669	 * The following #if/#endif block is a tight algorithm for dumping the 040
1670	 * MMU Map in gory detail.  It really isn't that practical unless the
1671	 * MMU Map algorithm appears to go awry and you need to debug it at the
1672	 * entry per entry level.
1673	 */
1674	movel	#ROOT_TABLE_SIZE,%d5
1675#if 0
1676	movel	%a5@+,%d7		| Burn an entry to skip the kernel mappings,
1677	subql	#1,%d5			| they (might) work
1678#endif
16791:	tstl	%d5
1680	jbeq	mmu_print_done
1681	subq	#1,%d5
1682	movel	%a5@+,%d7
1683	btst	#1,%d7
1684	jbeq	1b
1685
16862:	putn	%d7
1687	andil	#0xFFFFFE00,%d7
1688	movel	%d7,%a4
1689	movel	#PTR_TABLE_SIZE,%d4
1690	putc	' '
16913:	tstl	%d4
1692	jbeq	11f
1693	subq	#1,%d4
1694	movel	%a4@+,%d7
1695	btst	#1,%d7
1696	jbeq	3b
1697
16984:	putn	%d7
1699	andil	#0xFFFFFF00,%d7
1700	movel	%d7,%a3
1701	movel	#PAGE_TABLE_SIZE,%d3
17025:	movel	#8,%d2
17036:	tstl	%d3
1704	jbeq	31f
1705	subq	#1,%d3
1706	movel	%a3@+,%d6
1707	btst	#0,%d6
1708	jbeq	6b
17097:	tstl	%d2
1710	jbeq	8f
1711	subq	#1,%d2
1712	putc	' '
1713	jbra	91f
17148:	putc	'\n'
1715	movel	#8+1+8+1+1,%d2
17169:	putc	' '
1717	dbra	%d2,9b
1718	movel	#7,%d2
171991:	putn	%d6
1720	jbra	6b
1721
172231:	putc	'\n'
1723	movel	#8+1,%d2
172432:	putc	' '
1725	dbra	%d2,32b
1726	jbra	3b
1727
172811:	putc	'\n'
1729	jbra	1b
1730#endif /* MMU 040 Dumping code that's gory and detailed */
1731
1732	lea	%pc@(kernel_pg_dir),%a5
1733	movel	%a5,%a0			/* a0 has the address of the root table ptr */
1734	movel	#0x00000000,%a4		/* logical address */
1735	moveql	#0,%d0
173640:
1737	/* Increment the logical address and preserve in d5 */
1738	movel	%a4,%d5
1739	addil	#PAGESIZE<<13,%d5
1740	movel	%a0@+,%d6
1741	btst	#1,%d6
1742	jbne	41f
1743	jbsr	mmu_print_tuple_invalidate
1744	jbra	48f
174541:
1746	movel	#0,%d1
1747	andil	#0xfffffe00,%d6
1748	movel	%d6,%a1
174942:
1750	movel	%a4,%d5
1751	addil	#PAGESIZE<<6,%d5
1752	movel	%a1@+,%d6
1753	btst	#1,%d6
1754	jbne	43f
1755	jbsr	mmu_print_tuple_invalidate
1756	jbra	47f
175743:
1758	movel	#0,%d2
1759	andil	#0xffffff00,%d6
1760	movel	%d6,%a2
176144:
1762	movel	%a4,%d5
1763	addil	#PAGESIZE,%d5
1764	movel	%a2@+,%d6
1765	btst	#0,%d6
1766	jbne	45f
1767	jbsr	mmu_print_tuple_invalidate
1768	jbra	46f
176945:
1770	moveml	%d0-%d1,%sp@-
1771	movel	%a4,%d0
1772	movel	%d6,%d1
1773	andil	#0xfffff4e0,%d1
1774	lea	%pc@(mmu_040_print_flags),%a6
1775	jbsr	mmu_print_tuple
1776	moveml	%sp@+,%d0-%d1
177746:
1778	movel	%d5,%a4
1779	addq	#1,%d2
1780	cmpib	#64,%d2
1781	jbne	44b
178247:
1783	movel	%d5,%a4
1784	addq	#1,%d1
1785	cmpib	#128,%d1
1786	jbne	42b
178748:
1788	movel	%d5,%a4			/* move to the next logical address */
1789	addq	#1,%d0
1790	cmpib	#128,%d0
1791	jbne	40b
1792
1793	.chip	68040
1794	movec	%dtt1,%d0
1795	movel	%d0,%d1
1796	andiw	#0x8000,%d1		/* is it valid ? */
1797	jbeq	1f			/* No, bail out */
1798
1799	movel	%d0,%d1
1800	andil	#0xff000000,%d1		/* Get the address */
1801	putn	%d1
1802	puts	"=="
1803	putn	%d1
1804
1805	movel	%d0,%d6
1806	jbsr	mmu_040_print_flags_tt
18071:
1808	movec	%dtt0,%d0
1809	movel	%d0,%d1
1810	andiw	#0x8000,%d1		/* is it valid ? */
1811	jbeq	1f			/* No, bail out */
1812
1813	movel	%d0,%d1
1814	andil	#0xff000000,%d1		/* Get the address */
1815	putn	%d1
1816	puts	"=="
1817	putn	%d1
1818
1819	movel	%d0,%d6
1820	jbsr	mmu_040_print_flags_tt
18211:
1822	.chip	68k
1823
1824	jbra	mmu_print_done
1825
1826mmu_040_print_flags:
1827	btstl	#10,%d6
1828	putZc(' ','G')	/* global bit */
1829	btstl	#7,%d6
1830	putZc(' ','S')	/* supervisor bit */
1831mmu_040_print_flags_tt:
1832	btstl	#6,%d6
1833	jbne	3f
1834	putc	'C'
1835	btstl	#5,%d6
1836	putZc('w','c')	/* write through or copy-back */
1837	jbra	4f
18383:
1839	putc	'N'
1840	btstl	#5,%d6
1841	putZc('s',' ')	/* serialized non-cacheable, or non-cacheable */
18424:
1843	rts
1844
1845mmu_030_print_flags:
1846	btstl	#6,%d6
1847	putZc('C','I')	/* write through or copy-back */
1848	rts
1849
1850mmu_030_print:
1851	puts	"\nMMU030\n"
1852	puts	"\nrp:"
1853	putn	%a5
1854	putc	'\n'
1855	movel	%a5,%d0
1856	andil	#0xfffffff0,%d0
1857	movel	%d0,%a0
1858	movel	#0x00000000,%a4		/* logical address */
1859	movel	#0,%d0
186030:
1861	movel	%a4,%d5
1862	addil	#PAGESIZE<<13,%d5
1863	movel	%a0@+,%d6
1864	btst	#1,%d6			/* is it a table ptr? */
1865	jbne	31f			/* yes */
1866	btst	#0,%d6			/* is it early terminating? */
1867	jbeq	1f			/* no */
1868	jbsr	mmu_030_print_helper
1869	jbra	38f
18701:
1871	jbsr	mmu_print_tuple_invalidate
1872	jbra	38f
187331:
1874	movel	#0,%d1
1875	andil	#0xfffffff0,%d6
1876	movel	%d6,%a1
187732:
1878	movel	%a4,%d5
1879	addil	#PAGESIZE<<6,%d5
1880	movel	%a1@+,%d6
1881	btst	#1,%d6			/* is it a table ptr? */
1882	jbne	33f			/* yes */
1883	btst	#0,%d6			/* is it a page descriptor? */
1884	jbeq	1f			/* no */
1885	jbsr	mmu_030_print_helper
1886	jbra	37f
18871:
1888	jbsr	mmu_print_tuple_invalidate
1889	jbra	37f
189033:
1891	movel	#0,%d2
1892	andil	#0xfffffff0,%d6
1893	movel	%d6,%a2
189434:
1895	movel	%a4,%d5
1896	addil	#PAGESIZE,%d5
1897	movel	%a2@+,%d6
1898	btst	#0,%d6
1899	jbne	35f
1900	jbsr	mmu_print_tuple_invalidate
1901	jbra	36f
190235:
1903	jbsr	mmu_030_print_helper
190436:
1905	movel	%d5,%a4
1906	addq	#1,%d2
1907	cmpib	#64,%d2
1908	jbne	34b
190937:
1910	movel	%d5,%a4
1911	addq	#1,%d1
1912	cmpib	#128,%d1
1913	jbne	32b
191438:
1915	movel	%d5,%a4			/* move to the next logical address */
1916	addq	#1,%d0
1917	cmpib	#128,%d0
1918	jbne	30b
1919
1920mmu_print_done:
1921	puts	"\n\n"
1922
1923func_return	mmu_print
1924
1925
1926mmu_030_print_helper:
1927	moveml	%d0-%d1,%sp@-
1928	movel	%a4,%d0
1929	movel	%d6,%d1
1930	lea	%pc@(mmu_030_print_flags),%a6
1931	jbsr	mmu_print_tuple
1932	moveml	%sp@+,%d0-%d1
1933	rts
1934
1935mmu_print_tuple_invalidate:
1936	moveml	%a0/%d7,%sp@-
1937
1938	lea	%pc@(L(mmu_print_data)),%a0
1939	tstl	%a0@(mmu_next_valid)
1940	jbmi	mmu_print_tuple_invalidate_exit
1941
1942	movel	#MMU_PRINT_INVALID,%a0@(mmu_next_valid)
1943
1944	putn	%a4
1945
1946	puts	"##\n"
1947
1948mmu_print_tuple_invalidate_exit:
1949	moveml	%sp@+,%a0/%d7
1950	rts
1951
1952
1953mmu_print_tuple:
1954	moveml	%d0-%d7/%a0,%sp@-
1955
1956	lea	%pc@(L(mmu_print_data)),%a0
1957
1958	tstl	%a0@(mmu_next_valid)
1959	jble	mmu_print_tuple_print
1960
1961	cmpl	%a0@(mmu_next_physical),%d1
1962	jbeq	mmu_print_tuple_increment
1963
1964mmu_print_tuple_print:
1965	putn	%d0
1966	puts	"->"
1967	putn	%d1
1968
1969	movel	%d1,%d6
1970	jbsr	%a6@
1971
1972mmu_print_tuple_record:
1973	movel	#MMU_PRINT_VALID,%a0@(mmu_next_valid)
1974
1975	movel	%d1,%a0@(mmu_next_physical)
1976
1977mmu_print_tuple_increment:
1978	movel	%d5,%d7
1979	subl	%a4,%d7
1980	addl	%d7,%a0@(mmu_next_physical)
1981
1982mmu_print_tuple_exit:
1983	moveml	%sp@+,%d0-%d7/%a0
1984	rts
1985
1986mmu_print_machine_cpu_types:
1987	puts	"machine: "
1988
1989	is_not_amiga(1f)
1990	puts	"amiga"
1991	jbra	9f
19921:
1993	is_not_atari(2f)
1994	puts	"atari"
1995	jbra	9f
19962:
1997	is_not_mac(3f)
1998	puts	"macintosh"
1999	jbra	9f
20003:	puts	"unknown"
20019:	putc	'\n'
2002
2003	puts	"cputype: 0"
2004	is_not_060(1f)
2005	putc	'6'
2006	jbra	9f
20071:
2008	is_not_040_or_060(2f)
2009	putc	'4'
2010	jbra	9f
20112:	putc	'3'
20129:	putc	'0'
2013	putc	'\n'
2014
2015	rts
2016#endif /* MMU_PRINT */
2017
2018/*
2019 * mmu_map_tt
2020 *
2021 * This is a specific function which works on all 680x0 machines.
2022 * On 030, 040 & 060 it will attempt to use Transparent Translation
2023 * registers (tt1).
2024 * On 020 it will call the standard mmu_map which will use early
2025 * terminating descriptors.
2026 */
2027func_start	mmu_map_tt,%d0/%d1/%a0,4
2028
2029	dputs	"mmu_map_tt:"
2030	dputn	ARG1
2031	dputn	ARG2
2032	dputn	ARG3
2033	dputn	ARG4
2034	dputc	'\n'
2035
2036	is_020(L(do_map))
2037
2038	/* Extract the highest bit set
2039	 */
2040	bfffo	ARG3{#0,#32},%d1
2041	cmpw	#8,%d1
2042	jcc	L(do_map)
2043
2044	/* And get the mask
2045	 */
2046	moveq	#-1,%d0
2047	lsrl	%d1,%d0
2048	lsrl	#1,%d0
2049
2050	/* Mask the address
2051	 */
2052	movel	%d0,%d1
2053	notl	%d1
2054	andl	ARG2,%d1
2055
2056	/* Generate the upper 16bit of the tt register
2057	 */
2058	lsrl	#8,%d0
2059	orl	%d0,%d1
2060	clrw	%d1
2061
2062	is_040_or_060(L(mmu_map_tt_040))
2063
2064	/* set 030 specific bits (read/write access for supervisor mode
2065	 * (highest function code set, lower two bits masked))
2066	 */
2067	orw	#TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
2068	movel	ARG4,%d0
2069	btst	#6,%d0
2070	jeq	1f
2071	orw	#TTR_CI,%d1
2072
20731:	lea	STACK,%a0
2074	dputn	%d1
2075	movel	%d1,%a0@
2076	.chip	68030
2077	tstl	ARG1
2078	jne	1f
2079	pmove	%a0@,%tt0
2080	jra	2f
20811:	pmove	%a0@,%tt1
20822:	.chip	68k
2083	jra	L(mmu_map_tt_done)
2084
2085	/* set 040 specific bits
2086	 */
2087L(mmu_map_tt_040):
2088	orw	#TTR_ENABLE+TTR_KERNELMODE,%d1
2089	orl	ARG4,%d1
2090	dputn	%d1
2091
2092	.chip	68040
2093	tstl	ARG1
2094	jne	1f
2095	movec	%d1,%itt0
2096	movec	%d1,%dtt0
2097	jra	2f
20981:	movec	%d1,%itt1
2099	movec	%d1,%dtt1
21002:	.chip	68k
2101
2102	jra	L(mmu_map_tt_done)
2103
2104L(do_map):
2105	mmu_map_eq	ARG2,ARG3,ARG4
2106
2107L(mmu_map_tt_done):
2108
2109func_return	mmu_map_tt
2110
2111/*
2112 *	mmu_map
2113 *
2114 *	This routine will map a range of memory using a pointer
2115 *	table and allocating the pages on the fly from the kernel.
2116 *	The pointer table does not have to be already linked into
2117 *	the root table, this routine will do that if necessary.
2118 *
2119 *	NOTE
2120 *	This routine will assert failure and use the serial_putc
2121 *	routines in the case of a run-time error.  For example,
2122 *	if the address is already mapped.
2123 *
2124 *	NOTE-2
2125 *	This routine will use early terminating descriptors
2126 *	where possible for the 68020+68851 and 68030 type
2127 *	processors.
2128 */
2129func_start	mmu_map,%d0-%d4/%a0-%a4
2130
2131	dputs	"\nmmu_map:"
2132	dputn	ARG1
2133	dputn	ARG2
2134	dputn	ARG3
2135	dputn	ARG4
2136	dputc	'\n'
2137
2138	/* Get logical address and round it down to 256KB
2139	 */
2140	movel	ARG1,%d0
2141	andl	#-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2142	movel	%d0,%a3
2143
2144	/* Get the end address
2145	 */
2146	movel	ARG1,%a4
2147	addl	ARG3,%a4
2148	subql	#1,%a4
2149
2150	/* Get physical address and round it down to 256KB
2151	 */
2152	movel	ARG2,%d0
2153	andl	#-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2154	movel	%d0,%a2
2155
2156	/* Add page attributes to the physical address
2157	 */
2158	movel	ARG4,%d0
2159	orw	#_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2160	addw	%d0,%a2
2161
2162	dputn	%a2
2163	dputn	%a3
2164	dputn	%a4
2165
2166	is_not_040_or_060(L(mmu_map_030))
2167
2168	addw	#_PAGE_GLOBAL040,%a2
2169/*
2170 *	MMU 040 & 060 Support
2171 *
2172 *	The MMU usage for the 040 and 060 is different enough from
2173 *	the 030 and 68851 that there is separate code.  This comment
2174 *	block describes the data structures and algorithms built by
2175 *	this code.
2176 *
2177 *	The 040 does not support early terminating descriptors, as
2178 *	the 030 does.  Therefore, a third level of table is needed
2179 *	for the 040, and that would be the page table.  In Linux,
2180 *	page tables are allocated directly from the memory above the
2181 *	kernel.
2182 *
2183 */
2184
2185L(mmu_map_040):
2186	/* Calculate the offset into the root table
2187	 */
2188	movel	%a3,%d0
2189	moveq	#ROOT_INDEX_SHIFT,%d1
2190	lsrl	%d1,%d0
2191	mmu_get_root_table_entry	%d0
2192
2193	/* Calculate the offset into the pointer table
2194	 */
2195	movel	%a3,%d0
2196	moveq	#PTR_INDEX_SHIFT,%d1
2197	lsrl	%d1,%d0
2198	andl	#PTR_TABLE_SIZE-1,%d0
2199	mmu_get_ptr_table_entry		%a0,%d0
2200
2201	/* Calculate the offset into the page table
2202	 */
2203	movel	%a3,%d0
2204	moveq	#PAGE_INDEX_SHIFT,%d1
2205	lsrl	%d1,%d0
2206	andl	#PAGE_TABLE_SIZE-1,%d0
2207	mmu_get_page_table_entry	%a0,%d0
2208
2209	/* The page table entry must not no be busy
2210	 */
2211	tstl	%a0@
2212	jne	L(mmu_map_error)
2213
2214	/* Do the mapping and advance the pointers
2215	 */
2216	movel	%a2,%a0@
22172:
2218	addw	#PAGESIZE,%a2
2219	addw	#PAGESIZE,%a3
2220
2221	/* Ready with mapping?
2222	 */
2223	lea	%a3@(-1),%a0
2224	cmpl	%a0,%a4
2225	jhi	L(mmu_map_040)
2226	jra	L(mmu_map_done)
2227
2228L(mmu_map_030):
2229	/* Calculate the offset into the root table
2230	 */
2231	movel	%a3,%d0
2232	moveq	#ROOT_INDEX_SHIFT,%d1
2233	lsrl	%d1,%d0
2234	mmu_get_root_table_entry	%d0
2235
2236	/* Check if logical address 32MB aligned,
2237	 * so we can try to map it once
2238	 */
2239	movel	%a3,%d0
2240	andl	#(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
2241	jne	1f
2242
2243	/* Is there enough to map for 32MB at once
2244	 */
2245	lea	%a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
2246	cmpl	%a1,%a4
2247	jcs	1f
2248
2249	addql	#1,%a1
2250
2251	/* The root table entry must not no be busy
2252	 */
2253	tstl	%a0@
2254	jne	L(mmu_map_error)
2255
2256	/* Do the mapping and advance the pointers
2257	 */
2258	dputs	"early term1"
2259	dputn	%a2
2260	dputn	%a3
2261	dputn	%a1
2262	dputc	'\n'
2263	movel	%a2,%a0@
2264
2265	movel	%a1,%a3
2266	lea	%a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
2267	jra	L(mmu_mapnext_030)
22681:
2269	/* Calculate the offset into the pointer table
2270	 */
2271	movel	%a3,%d0
2272	moveq	#PTR_INDEX_SHIFT,%d1
2273	lsrl	%d1,%d0
2274	andl	#PTR_TABLE_SIZE-1,%d0
2275	mmu_get_ptr_table_entry		%a0,%d0
2276
2277	/* The pointer table entry must not no be busy
2278	 */
2279	tstl	%a0@
2280	jne	L(mmu_map_error)
2281
2282	/* Do the mapping and advance the pointers
2283	 */
2284	dputs	"early term2"
2285	dputn	%a2
2286	dputn	%a3
2287	dputc	'\n'
2288	movel	%a2,%a0@
2289
2290	addl	#PAGE_TABLE_SIZE*PAGESIZE,%a2
2291	addl	#PAGE_TABLE_SIZE*PAGESIZE,%a3
2292
2293L(mmu_mapnext_030):
2294	/* Ready with mapping?
2295	 */
2296	lea	%a3@(-1),%a0
2297	cmpl	%a0,%a4
2298	jhi	L(mmu_map_030)
2299	jra	L(mmu_map_done)
2300
2301L(mmu_map_error):
2302
2303	dputs	"mmu_map error:"
2304	dputn	%a2
2305	dputn	%a3
2306	dputc	'\n'
2307
2308L(mmu_map_done):
2309
2310func_return	mmu_map
2311
2312/*
2313 *	mmu_fixup
2314 *
2315 *	On the 040 class machines, all pages that are used for the
2316 *	mmu have to be fixed up.
2317 */
2318
2319func_start	mmu_fixup_page_mmu_cache,%d0/%a0
2320
2321	dputs	"mmu_fixup_page_mmu_cache"
2322	dputn	ARG1
2323
2324	/* Calculate the offset into the root table
2325	 */
2326	movel	ARG1,%d0
2327	moveq	#ROOT_INDEX_SHIFT,%d1
2328	lsrl	%d1,%d0
2329	mmu_get_root_table_entry	%d0
2330
2331	/* Calculate the offset into the pointer table
2332	 */
2333	movel	ARG1,%d0
2334	moveq	#PTR_INDEX_SHIFT,%d1
2335	lsrl	%d1,%d0
2336	andl	#PTR_TABLE_SIZE-1,%d0
2337	mmu_get_ptr_table_entry		%a0,%d0
2338
2339	/* Calculate the offset into the page table
2340	 */
2341	movel	ARG1,%d0
2342	moveq	#PAGE_INDEX_SHIFT,%d1
2343	lsrl	%d1,%d0
2344	andl	#PAGE_TABLE_SIZE-1,%d0
2345	mmu_get_page_table_entry	%a0,%d0
2346
2347	movel	%a0@,%d0
2348	andil	#_CACHEMASK040,%d0
2349	orl	%pc@(m68k_pgtable_cachemode),%d0
2350	movel	%d0,%a0@
2351
2352	dputc	'\n'
2353
2354func_return	mmu_fixup_page_mmu_cache
2355
2356/*
2357 *	mmu_temp_map
2358 *
2359 *	create a temporary mapping to enable the mmu,
2360 *	this we don't need any transparation translation tricks.
2361 */
2362
2363func_start	mmu_temp_map,%d0/%d1/%a0/%a1
2364
2365	dputs	"mmu_temp_map"
2366	dputn	ARG1
2367	dputn	ARG2
2368	dputc	'\n'
2369
2370	lea	%pc@(L(temp_mmap_mem)),%a1
2371
2372	/* Calculate the offset in the root table
2373	 */
2374	movel	ARG2,%d0
2375	moveq	#ROOT_INDEX_SHIFT,%d1
2376	lsrl	%d1,%d0
2377	mmu_get_root_table_entry	%d0
2378
2379	/* Check if the table is temporary allocated, so we have to reuse it
2380	 */
2381	movel	%a0@,%d0
2382	cmpl	%pc@(L(memory_start)),%d0
2383	jcc	1f
2384
2385	/* Temporary allocate a ptr table and insert it into the root table
2386	 */
2387	movel	%a1@,%d0
2388	addl	#PTR_TABLE_SIZE*4,%a1@
2389	orw	#_PAGE_TABLE+_PAGE_ACCESSED,%d0
2390	movel	%d0,%a0@
2391	dputs	" (new)"
23921:
2393	dputn	%d0
2394	/* Mask the root table entry for the ptr table
2395	 */
2396	andw	#-ROOT_TABLE_SIZE,%d0
2397	movel	%d0,%a0
2398
2399	/* Calculate the offset into the pointer table
2400	 */
2401	movel	ARG2,%d0
2402	moveq	#PTR_INDEX_SHIFT,%d1
2403	lsrl	%d1,%d0
2404	andl	#PTR_TABLE_SIZE-1,%d0
2405	lea	%a0@(%d0*4),%a0
2406	dputn	%a0
2407
2408	/* Check if a temporary page table is already allocated
2409	 */
2410	movel	%a0@,%d0
2411	jne	1f
2412
2413	/* Temporary allocate a page table and insert it into the ptr table
2414	 */
2415	movel	%a1@,%d0
2416	/* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
2417	   alignment restriction for pointer tables on the '0[46]0.  */
2418	addl	#512,%a1@
2419	orw	#_PAGE_TABLE+_PAGE_ACCESSED,%d0
2420	movel	%d0,%a0@
2421	dputs	" (new)"
24221:
2423	dputn	%d0
2424	/* Mask the ptr table entry for the page table
2425	 */
2426	andw	#-PTR_TABLE_SIZE,%d0
2427	movel	%d0,%a0
2428
2429	/* Calculate the offset into the page table
2430	 */
2431	movel	ARG2,%d0
2432	moveq	#PAGE_INDEX_SHIFT,%d1
2433	lsrl	%d1,%d0
2434	andl	#PAGE_TABLE_SIZE-1,%d0
2435	lea	%a0@(%d0*4),%a0
2436	dputn	%a0
2437
2438	/* Insert the address into the page table
2439	 */
2440	movel	ARG1,%d0
2441	andw	#-PAGESIZE,%d0
2442	orw	#_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2443	movel	%d0,%a0@
2444	dputn	%d0
2445
2446	dputc	'\n'
2447
2448func_return	mmu_temp_map
2449
2450func_start	mmu_engage,%d0-%d2/%a0-%a3
2451
2452	moveq	#ROOT_TABLE_SIZE-1,%d0
2453	/* Temporarily use a different root table.  */
2454	lea	%pc@(L(kernel_pgdir_ptr)),%a0
2455	movel	%a0@,%a2
2456	movel	%pc@(L(memory_start)),%a1
2457	movel	%a1,%a0@
2458	movel	%a2,%a0
24591:
2460	movel	%a0@+,%a1@+
2461	dbra	%d0,1b
2462
2463	lea	%pc@(L(temp_mmap_mem)),%a0
2464	movel	%a1,%a0@
2465
2466	movew	#PAGESIZE-1,%d0
24671:
2468	clrl	%a1@+
2469	dbra	%d0,1b
2470
2471	lea	%pc@(1b),%a0
2472	movel	#1b,%a1
2473	/* Skip temp mappings if phys == virt */
2474	cmpl	%a0,%a1
2475	jeq	1f
2476
2477	mmu_temp_map	%a0,%a0
2478	mmu_temp_map	%a0,%a1
2479
2480	addw	#PAGESIZE,%a0
2481	addw	#PAGESIZE,%a1
2482	mmu_temp_map	%a0,%a0
2483	mmu_temp_map	%a0,%a1
24841:
2485	movel	%pc@(L(memory_start)),%a3
2486	movel	%pc@(L(phys_kernel_start)),%d2
2487
2488	is_not_040_or_060(L(mmu_engage_030))
2489
2490L(mmu_engage_040):
2491	.chip	68040
2492	nop
2493	cinva	%bc
2494	nop
2495	pflusha
2496	nop
2497	movec	%a3,%srp
2498	movel	#TC_ENABLE+TC_PAGE4K,%d0
2499	movec	%d0,%tc		/* enable the MMU */
2500	jmp	1f:l
25011:	nop
2502	movec	%a2,%srp
2503	nop
2504	cinva	%bc
2505	nop
2506	pflusha
2507	.chip	68k
2508	jra	L(mmu_engage_cleanup)
2509
2510L(mmu_engage_030_temp):
2511	.space	12
2512L(mmu_engage_030):
2513	.chip	68030
2514	lea	%pc@(L(mmu_engage_030_temp)),%a0
2515	movel	#0x80000002,%a0@
2516	movel	%a3,%a0@(4)
2517	movel	#0x0808,%d0
2518	movec	%d0,%cacr
2519	pmove	%a0@,%srp
2520	pflusha
2521	/*
2522	 * enable,super root enable,4096 byte pages,7 bit root index,
2523	 * 7 bit pointer index, 6 bit page table index.
2524	 */
2525	movel	#0x82c07760,%a0@(8)
2526	pmove	%a0@(8),%tc	/* enable the MMU */
2527	jmp	1f:l
25281:	movel	%a2,%a0@(4)
2529	movel	#0x0808,%d0
2530	movec	%d0,%cacr
2531	pmove	%a0@,%srp
2532	pflusha
2533	.chip	68k
2534
2535L(mmu_engage_cleanup):
2536	subl	#PAGE_OFFSET,%d2
2537	subl	%d2,%a2
2538	movel	%a2,L(kernel_pgdir_ptr)
2539	subl	%d2,%fp
2540	subl	%d2,%sp
2541	subl	%d2,ARG0
2542
2543func_return	mmu_engage
2544
2545func_start	mmu_get_root_table_entry,%d0/%a1
2546
2547#if 0
2548	dputs	"mmu_get_root_table_entry:"
2549	dputn	ARG1
2550	dputs	" ="
2551#endif
2552
2553	movel	%pc@(L(kernel_pgdir_ptr)),%a0
2554	tstl	%a0
2555	jne	2f
2556
2557	dputs	"\nmmu_init:"
2558
2559	/* Find the start of free memory, get_bi_record does this for us,
2560	 * as the bootinfo structure is located directly behind the kernel
2561	 * and and we simply search for the last entry.
2562	 */
2563	get_bi_record	BI_LAST
2564	addw	#PAGESIZE-1,%a0
2565	movel	%a0,%d0
2566	andw	#-PAGESIZE,%d0
2567
2568	dputn	%d0
2569
2570	lea	%pc@(L(memory_start)),%a0
2571	movel	%d0,%a0@
2572	lea	%pc@(L(kernel_end)),%a0
2573	movel	%d0,%a0@
2574
2575	/* we have to return the first page at _stext since the init code
2576	 * in mm/init.c simply expects kernel_pg_dir there, the rest of
2577	 * page is used for further ptr tables in get_ptr_table.
2578	 */
2579	lea	%pc@(_stext),%a0
2580	lea	%pc@(L(mmu_cached_pointer_tables)),%a1
2581	movel	%a0,%a1@
2582	addl	#ROOT_TABLE_SIZE*4,%a1@
2583
2584	lea	%pc@(L(mmu_num_pointer_tables)),%a1
2585	addql	#1,%a1@
2586
2587	/* clear the page
2588	 */
2589	movel	%a0,%a1
2590	movew	#PAGESIZE/4-1,%d0
25911:
2592	clrl	%a1@+
2593	dbra	%d0,1b
2594
2595	lea	%pc@(L(kernel_pgdir_ptr)),%a1
2596	movel	%a0,%a1@
2597
2598	dputn	%a0
2599	dputc	'\n'
26002:
2601	movel	ARG1,%d0
2602	lea	%a0@(%d0*4),%a0
2603
2604#if 0
2605	dputn	%a0
2606	dputc	'\n'
2607#endif
2608
2609func_return	mmu_get_root_table_entry
2610
2611
2612
2613func_start	mmu_get_ptr_table_entry,%d0/%a1
2614
2615#if 0
2616	dputs	"mmu_get_ptr_table_entry:"
2617	dputn	ARG1
2618	dputn	ARG2
2619	dputs	" ="
2620#endif
2621
2622	movel	ARG1,%a0
2623	movel	%a0@,%d0
2624	jne	2f
2625
2626	/* Keep track of the number of pointer tables we use
2627	 */
2628	dputs	"\nmmu_get_new_ptr_table:"
2629	lea	%pc@(L(mmu_num_pointer_tables)),%a0
2630	movel	%a0@,%d0
2631	addql	#1,%a0@
2632
2633	/* See if there is a free pointer table in our cache of pointer tables
2634	 */
2635	lea	%pc@(L(mmu_cached_pointer_tables)),%a1
2636	andw	#7,%d0
2637	jne	1f
2638
2639	/* Get a new pointer table page from above the kernel memory
2640	 */
2641	get_new_page
2642	movel	%a0,%a1@
26431:
2644	/* There is an unused pointer table in our cache... use it
2645	 */
2646	movel	%a1@,%d0
2647	addl	#PTR_TABLE_SIZE*4,%a1@
2648
2649	dputn	%d0
2650	dputc	'\n'
2651
2652	/* Insert the new pointer table into the root table
2653	 */
2654	movel	ARG1,%a0
2655	orw	#_PAGE_TABLE+_PAGE_ACCESSED,%d0
2656	movel	%d0,%a0@
26572:
2658	/* Extract the pointer table entry
2659	 */
2660	andw	#-PTR_TABLE_SIZE,%d0
2661	movel	%d0,%a0
2662	movel	ARG2,%d0
2663	lea	%a0@(%d0*4),%a0
2664
2665#if 0
2666	dputn	%a0
2667	dputc	'\n'
2668#endif
2669
2670func_return	mmu_get_ptr_table_entry
2671
2672
2673func_start	mmu_get_page_table_entry,%d0/%a1
2674
2675#if 0
2676	dputs	"mmu_get_page_table_entry:"
2677	dputn	ARG1
2678	dputn	ARG2
2679	dputs	" ="
2680#endif
2681
2682	movel	ARG1,%a0
2683	movel	%a0@,%d0
2684	jne	2f
2685
2686	/* If the page table entry doesn't exist, we allocate a complete new
2687	 * page and use it as one continues big page table which can cover
2688	 * 4MB of memory, nearly almost all mappings have that alignment.
2689	 */
2690	get_new_page
2691	addw	#_PAGE_TABLE+_PAGE_ACCESSED,%a0
2692
2693	/* align pointer table entry for a page of page tables
2694	 */
2695	movel	ARG1,%d0
2696	andw	#-(PAGESIZE/PAGE_TABLE_SIZE),%d0
2697	movel	%d0,%a1
2698
2699	/* Insert the page tables into the pointer entries
2700	 */
2701	moveq	#PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
27021:
2703	movel	%a0,%a1@+
2704	lea	%a0@(PAGE_TABLE_SIZE*4),%a0
2705	dbra	%d0,1b
2706
2707	/* Now we can get the initialized pointer table entry
2708	 */
2709	movel	ARG1,%a0
2710	movel	%a0@,%d0
27112:
2712	/* Extract the page table entry
2713	 */
2714	andw	#-PAGE_TABLE_SIZE,%d0
2715	movel	%d0,%a0
2716	movel	ARG2,%d0
2717	lea	%a0@(%d0*4),%a0
2718
2719#if 0
2720	dputn	%a0
2721	dputc	'\n'
2722#endif
2723
2724func_return	mmu_get_page_table_entry
2725
2726/*
2727 *	get_new_page
2728 *
2729 *	Return a new page from the memory start and clear it.
2730 */
2731func_start	get_new_page,%d0/%a1
2732
2733	dputs	"\nget_new_page:"
2734
2735	/* allocate the page and adjust memory_start
2736	 */
2737	lea	%pc@(L(memory_start)),%a0
2738	movel	%a0@,%a1
2739	addl	#PAGESIZE,%a0@
2740
2741	/* clear the new page
2742	 */
2743	movel	%a1,%a0
2744	movew	#PAGESIZE/4-1,%d0
27451:
2746	clrl	%a1@+
2747	dbra	%d0,1b
2748
2749	dputn	%a0
2750	dputc	'\n'
2751
2752func_return	get_new_page
2753
2754
2755
2756/*
2757 * Debug output support
2758 * Atarians have a choice between the parallel port, the serial port
2759 * from the MFP or a serial port of the SCC
2760 */
2761
2762#ifdef CONFIG_MAC
2763
2764L(scc_initable_mac):
2765	.byte	9,12		/* Reset */
2766	.byte	4,0x44		/* x16, 1 stopbit, no parity */
2767	.byte	3,0xc0		/* receiver: 8 bpc */
2768	.byte	5,0xe2		/* transmitter: 8 bpc, assert dtr/rts */
2769	.byte	9,0		/* no interrupts */
2770	.byte	10,0		/* NRZ */
2771	.byte	11,0x50		/* use baud rate generator */
2772	.byte	12,10,13,0	/* 9600 baud */
2773	.byte	14,1		/* Baud rate generator enable */
2774	.byte	3,0xc1		/* enable receiver */
2775	.byte	5,0xea		/* enable transmitter */
2776	.byte	-1
2777	.even
2778#endif
2779
2780#ifdef CONFIG_ATARI
2781/* #define USE_PRINTER */
2782/* #define USE_SCC_B */
2783/* #define USE_SCC_A */
2784#define USE_MFP
2785
2786#if defined(USE_SCC_A) || defined(USE_SCC_B)
2787#define USE_SCC
2788/* Initialisation table for SCC */
2789L(scc_initable):
2790	.byte	9,12		/* Reset */
2791	.byte	4,0x44		/* x16, 1 stopbit, no parity */
2792	.byte	3,0xc0		/* receiver: 8 bpc */
2793	.byte	5,0xe2		/* transmitter: 8 bpc, assert dtr/rts */
2794	.byte	9,0		/* no interrupts */
2795	.byte	10,0		/* NRZ */
2796	.byte	11,0x50		/* use baud rate generator */
2797	.byte	12,24,13,0	/* 9600 baud */
2798	.byte	14,2,14,3	/* use master clock for BRG, enable */
2799	.byte	3,0xc1		/* enable receiver */
2800	.byte	5,0xea		/* enable transmitter */
2801	.byte	-1
2802	.even
2803#endif
2804
2805#ifdef USE_PRINTER
2806
2807LPSG_SELECT	= 0xff8800
2808LPSG_READ	= 0xff8800
2809LPSG_WRITE	= 0xff8802
2810LPSG_IO_A	= 14
2811LPSG_IO_B	= 15
2812LPSG_CONTROL	= 7
2813LSTMFP_GPIP	= 0xfffa01
2814LSTMFP_DDR	= 0xfffa05
2815LSTMFP_IERB	= 0xfffa09
2816
2817#elif defined(USE_SCC_B)
2818
2819LSCC_CTRL	= 0xff8c85
2820LSCC_DATA	= 0xff8c87
2821
2822#elif defined(USE_SCC_A)
2823
2824LSCC_CTRL	= 0xff8c81
2825LSCC_DATA	= 0xff8c83
2826
2827#elif defined(USE_MFP)
2828
2829LMFP_UCR     = 0xfffa29
2830LMFP_TDCDR   = 0xfffa1d
2831LMFP_TDDR    = 0xfffa25
2832LMFP_TSR     = 0xfffa2d
2833LMFP_UDR     = 0xfffa2f
2834
2835#endif
2836#endif	/* CONFIG_ATARI */
2837
2838/*
2839 * Serial port output support.
2840 */
2841
2842/*
2843 * Initialize serial port hardware for 9600/8/1
2844 */
2845func_start	serial_init,%d0/%d1/%a0/%a1
2846	/*
2847	 *	Some of the register usage that follows
2848	 *	CONFIG_AMIGA
2849	 *		a0 = pointer to boot info record
2850	 *		d0 = boot info offset
2851	 *	CONFIG_ATARI
2852	 *		a0 = address of SCC
2853	 *		a1 = Liobase address/address of scc_initable
2854	 *		d0 = init data for serial port
2855	 *	CONFIG_MAC
2856	 *		a0 = address of SCC
2857	 *		a1 = address of scc_initable_mac
2858	 *		d0 = init data for serial port
2859	 */
2860
2861#ifdef CONFIG_AMIGA
2862#define SERIAL_DTR	7
2863#define SERIAL_CNTRL	CIABBASE+C_PRA
2864
2865	is_not_amiga(1f)
2866	lea	%pc@(L(custom)),%a0
2867	movel	#-ZTWOBASE,%a0@
2868	bclr	#SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
2869	get_bi_record	BI_AMIGA_SERPER
2870	movew	%a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
2871|	movew	#61,CUSTOMBASE+C_SERPER-ZTWOBASE
28721:
2873#endif
2874#ifdef CONFIG_ATARI
2875	is_not_atari(4f)
2876	movel	%pc@(L(iobase)),%a1
2877#if defined(USE_PRINTER)
2878	bclr	#0,%a1@(LSTMFP_IERB)
2879	bclr	#0,%a1@(LSTMFP_DDR)
2880	moveb	#LPSG_CONTROL,%a1@(LPSG_SELECT)
2881	moveb	#0xff,%a1@(LPSG_WRITE)
2882	moveb	#LPSG_IO_B,%a1@(LPSG_SELECT)
2883	clrb	%a1@(LPSG_WRITE)
2884	moveb	#LPSG_IO_A,%a1@(LPSG_SELECT)
2885	moveb	%a1@(LPSG_READ),%d0
2886	bset	#5,%d0
2887	moveb	%d0,%a1@(LPSG_WRITE)
2888#elif defined(USE_SCC)
2889	lea	%a1@(LSCC_CTRL),%a0
2890	lea	%pc@(L(scc_initable)),%a1
28912:	moveb	%a1@+,%d0
2892	jmi	3f
2893	moveb	%d0,%a0@
2894	moveb	%a1@+,%a0@
2895	jra	2b
28963:	clrb	%a0@
2897#elif defined(USE_MFP)
2898	bclr	#1,%a1@(LMFP_TSR)
2899	moveb   #0x88,%a1@(LMFP_UCR)
2900	andb	#0x70,%a1@(LMFP_TDCDR)
2901	moveb   #2,%a1@(LMFP_TDDR)
2902	orb	#1,%a1@(LMFP_TDCDR)
2903	bset	#1,%a1@(LMFP_TSR)
2904#endif
2905	jra	L(serial_init_done)
29064:
2907#endif
2908#ifdef CONFIG_MAC
2909	is_not_mac(L(serial_init_not_mac))
2910#ifdef MAC_SERIAL_DEBUG
2911#if !defined(MAC_USE_SCC_A) && !defined(MAC_USE_SCC_B)
2912#define MAC_USE_SCC_B
2913#endif
2914#define mac_scc_cha_b_ctrl_offset	0x0
2915#define mac_scc_cha_a_ctrl_offset	0x2
2916#define mac_scc_cha_b_data_offset	0x4
2917#define mac_scc_cha_a_data_offset	0x6
2918
2919#ifdef MAC_USE_SCC_A
2920	/* Initialize channel A */
2921	movel	%pc@(L(mac_sccbase)),%a0
2922	lea	%pc@(L(scc_initable_mac)),%a1
29235:	moveb	%a1@+,%d0
2924	jmi	6f
2925	moveb	%d0,%a0@(mac_scc_cha_a_ctrl_offset)
2926	moveb	%a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
2927	jra	5b
29286:
2929#endif	/* MAC_USE_SCC_A */
2930
2931#ifdef MAC_USE_SCC_B
2932	/* Initialize channel B */
2933#ifndef MAC_USE_SCC_A	/* Load mac_sccbase only if needed */
2934	movel	%pc@(L(mac_sccbase)),%a0
2935#endif	/* MAC_USE_SCC_A */
2936	lea	%pc@(L(scc_initable_mac)),%a1
29377:	moveb	%a1@+,%d0
2938	jmi	8f
2939	moveb	%d0,%a0@(mac_scc_cha_b_ctrl_offset)
2940	moveb	%a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
2941	jra	7b
29428:
2943#endif	/* MAC_USE_SCC_B */
2944#endif	/* MAC_SERIAL_DEBUG */
2945
2946	jra	L(serial_init_done)
2947L(serial_init_not_mac):
2948#endif	/* CONFIG_MAC */
2949
2950#ifdef CONFIG_Q40
2951	is_not_q40(2f)
2952/* debug output goes into SRAM, so we don't do it unless requested
2953   - check for '%LX$' signature in SRAM   */
2954	lea	%pc@(q40_mem_cptr),%a1
2955	move.l	#0xff020010,%a1@  /* must be inited - also used by debug=mem */
2956	move.l	#0xff020000,%a1
2957	cmp.b	#'%',%a1@
2958	bne	2f	/*nodbg*/
2959	addq.w	#4,%a1
2960	cmp.b	#'L',%a1@
2961	bne	2f	/*nodbg*/
2962	addq.w	#4,%a1
2963	cmp.b	#'X',%a1@
2964	bne	2f	/*nodbg*/
2965	addq.w	#4,%a1
2966	cmp.b	#'$',%a1@
2967	bne	2f	/*nodbg*/
2968	/* signature OK */
2969	lea	%pc@(L(q40_do_debug)),%a1
2970	tas	%a1@
2971/*nodbg: q40_do_debug is 0 by default*/
29722:
2973#endif
2974
2975#ifdef CONFIG_APOLLO
2976/* We count on the PROM initializing SIO1 */
2977#endif
2978
2979#ifdef CONFIG_HP300
2980/* We count on the boot loader initialising the UART */
2981#endif
2982
2983L(serial_init_done):
2984func_return	serial_init
2985
2986/*
2987 * Output character on serial port.
2988 */
2989func_start	serial_putc,%d0/%d1/%a0/%a1
2990
2991	movel	ARG1,%d0
2992	cmpib	#'\n',%d0
2993	jbne	1f
2994
2995	/* A little safe recursion is good for the soul */
2996	serial_putc	#'\r'
29971:
2998
2999#ifdef CONFIG_AMIGA
3000	is_not_amiga(2f)
3001	andw	#0x00ff,%d0
3002	oriw	#0x0100,%d0
3003	movel	%pc@(L(custom)),%a0
3004	movew	%d0,%a0@(CUSTOMBASE+C_SERDAT)
30051:	movew	%a0@(CUSTOMBASE+C_SERDATR),%d0
3006	andw	#0x2000,%d0
3007	jeq	1b
3008	jra	L(serial_putc_done)
30092:
3010#endif
3011
3012#ifdef CONFIG_MAC
3013	is_not_mac(5f)
3014
3015#ifdef MAC_SERIAL_DEBUG
3016
3017#ifdef MAC_USE_SCC_A
3018	movel	%pc@(L(mac_sccbase)),%a1
30193:	btst	#2,%a1@(mac_scc_cha_a_ctrl_offset)
3020	jeq	3b
3021	moveb	%d0,%a1@(mac_scc_cha_a_data_offset)
3022#endif	/* MAC_USE_SCC_A */
3023
3024#ifdef MAC_USE_SCC_B
3025#ifndef MAC_USE_SCC_A	/* Load mac_sccbase only if needed */
3026	movel	%pc@(L(mac_sccbase)),%a1
3027#endif	/* MAC_USE_SCC_A */
30284:	btst	#2,%a1@(mac_scc_cha_b_ctrl_offset)
3029	jeq	4b
3030	moveb	%d0,%a1@(mac_scc_cha_b_data_offset)
3031#endif	/* MAC_USE_SCC_B */
3032
3033#endif	/* MAC_SERIAL_DEBUG */
3034
3035	jra	L(serial_putc_done)
30365:
3037#endif	/* CONFIG_MAC */
3038
3039#ifdef CONFIG_ATARI
3040	is_not_atari(4f)
3041	movel	%pc@(L(iobase)),%a1
3042#if defined(USE_PRINTER)
30433:	btst	#0,%a1@(LSTMFP_GPIP)
3044	jne	3b
3045	moveb	#LPSG_IO_B,%a1@(LPSG_SELECT)
3046	moveb	%d0,%a1@(LPSG_WRITE)
3047	moveb	#LPSG_IO_A,%a1@(LPSG_SELECT)
3048	moveb	%a1@(LPSG_READ),%d0
3049	bclr	#5,%d0
3050	moveb	%d0,%a1@(LPSG_WRITE)
3051	nop
3052	nop
3053	bset	#5,%d0
3054	moveb	%d0,%a1@(LPSG_WRITE)
3055#elif defined(USE_SCC)
30563:	btst	#2,%a1@(LSCC_CTRL)
3057	jeq	3b
3058	moveb	%d0,%a1@(LSCC_DATA)
3059#elif defined(USE_MFP)
30603:	btst	#7,%a1@(LMFP_TSR)
3061	jeq	3b
3062	moveb	%d0,%a1@(LMFP_UDR)
3063#endif
3064	jra	L(serial_putc_done)
30654:
3066#endif	/* CONFIG_ATARI */
3067
3068#ifdef CONFIG_MVME147
3069	is_not_mvme147(2f)
30701:	btst	#2,M147_SCC_CTRL_A
3071	jeq	1b
3072	moveb	%d0,M147_SCC_DATA_A
3073	jbra	L(serial_putc_done)
30742:
3075#endif
3076
3077#ifdef CONFIG_MVME16x
3078	is_not_mvme16x(2f)
3079	/*
3080	 * If the loader gave us a board type then we can use that to
3081	 * select an appropriate output routine; otherwise we just use
3082	 * the Bug code.  If we haev to use the Bug that means the Bug
3083	 * workspace has to be valid, which means the Bug has to use
3084	 * the SRAM, which is non-standard.
3085	 */
3086	moveml	%d0-%d7/%a2-%a6,%sp@-
3087	movel	vme_brdtype,%d1
3088	jeq	1f			| No tag - use the Bug
3089	cmpi	#VME_TYPE_MVME162,%d1
3090	jeq	6f
3091	cmpi	#VME_TYPE_MVME172,%d1
3092	jne	5f
3093	/* 162/172; it's an SCC */
30946:	btst	#2,M162_SCC_CTRL_A
3095	nop
3096	nop
3097	nop
3098	jeq	6b
3099	moveb	#8,M162_SCC_CTRL_A
3100	nop
3101	nop
3102	nop
3103	moveb	%d0,M162_SCC_CTRL_A
3104	jra	3f
31055:
3106	/* 166/167/177; it's a CD2401 */
3107	moveb	#0,M167_CYCAR
3108	moveb	M167_CYIER,%d2
3109	moveb	#0x02,M167_CYIER
31107:
3111	btst	#5,M167_PCSCCTICR
3112	jeq	7b
3113	moveb	M167_PCTPIACKR,%d1
3114	moveb	M167_CYLICR,%d1
3115	jeq	8f
3116	moveb	#0x08,M167_CYTEOIR
3117	jra	7b
31188:
3119	moveb	%d0,M167_CYTDR
3120	moveb	#0,M167_CYTEOIR
3121	moveb	%d2,M167_CYIER
3122	jra	3f
31231:
3124	moveb	%d0,%sp@-
3125	trap	#15
3126	.word	0x0020	/* TRAP 0x020 */
31273:
3128	moveml	%sp@+,%d0-%d7/%a2-%a6
3129	jbra	L(serial_putc_done)
31302:
3131#endif /* CONFIG_MVME16x */
3132
3133#ifdef CONFIG_BVME6000
3134	is_not_bvme6000(2f)
3135	/*
3136	 * The BVME6000 machine has a serial port ...
3137	 */
31381:	btst	#2,BVME_SCC_CTRL_A
3139	jeq	1b
3140	moveb	%d0,BVME_SCC_DATA_A
3141	jbra	L(serial_putc_done)
31422:
3143#endif
3144
3145#ifdef CONFIG_SUN3X
3146	is_not_sun3x(2f)
3147	movel	%d0,-(%sp)
3148	movel	0xFEFE0018,%a1
3149	jbsr	(%a1)
3150	addq	#4,%sp
3151	jbra	L(serial_putc_done)
31522:
3153#endif
3154
3155#ifdef CONFIG_Q40
3156	is_not_q40(2f)
3157	tst.l	%pc@(L(q40_do_debug))	/* only debug if requested */
3158	beq	2f
3159	lea	%pc@(q40_mem_cptr),%a1
3160	move.l	%a1@,%a0
3161	move.b	%d0,%a0@
3162	addq.l	#4,%a0
3163	move.l	%a0,%a1@
3164	jbra    L(serial_putc_done)
31652:
3166#endif
3167
3168#ifdef CONFIG_APOLLO
3169	is_not_apollo(2f)
3170	movl    %pc@(L(iobase)),%a1
3171	moveb	%d0,%a1@(LTHRB0)
31721:      moveb   %a1@(LSRB0),%d0
3173	andb	#0x4,%d0
3174	beq	1b
3175	jbra	L(serial_putc_done)
31762:
3177#endif
3178
3179#ifdef CONFIG_HP300
3180	is_not_hp300(3f)
3181	movl    %pc@(L(iobase)),%a1
3182	addl	%pc@(L(uartbase)),%a1
3183	movel	%pc@(L(uart_scode)),%d1	/* Check the scode */
3184	jmi	3f			/* Unset? Exit */
3185	cmpi	#256,%d1		/* APCI scode? */
3186	jeq	2f
31871:      moveb   %a1@(DCALSR),%d1	/* Output to DCA */
3188	andb	#0x20,%d1
3189	beq	1b
3190	moveb	%d0,%a1@(DCADATA)
3191	jbra	L(serial_putc_done)
31922:	moveb	%a1@(APCILSR),%d1	/* Output to APCI */
3193	andb	#0x20,%d1
3194	beq	2b
3195	moveb	%d0,%a1@(APCIDATA)
3196	jbra	L(serial_putc_done)
31973:
3198#endif
3199
3200L(serial_putc_done):
3201func_return	serial_putc
3202
3203/*
3204 * Output a string.
3205 */
3206func_start	puts,%d0/%a0
3207
3208	movel	ARG1,%a0
3209	jra	2f
32101:
3211#ifdef CONSOLE
3212	console_putc	%d0
3213#endif
3214#ifdef SERIAL_DEBUG
3215	serial_putc	%d0
3216#endif
32172:	moveb	%a0@+,%d0
3218	jne	1b
3219
3220func_return	puts
3221
3222/*
3223 * Output number in hex notation.
3224 */
3225
3226func_start	putn,%d0-%d2
3227
3228	putc	' '
3229
3230	movel	ARG1,%d0
3231	moveq	#7,%d1
32321:	roll	#4,%d0
3233	move	%d0,%d2
3234	andb	#0x0f,%d2
3235	addb	#'0',%d2
3236	cmpb	#'9',%d2
3237	jls	2f
3238	addb	#'A'-('9'+1),%d2
32392:
3240#ifdef CONSOLE
3241	console_putc	%d2
3242#endif
3243#ifdef SERIAL_DEBUG
3244	serial_putc	%d2
3245#endif
3246	dbra	%d1,1b
3247
3248func_return	putn
3249
3250#ifdef CONFIG_MAC
3251/*
3252 *	mac_serial_print
3253 *
3254 *	This routine takes its parameters on the stack.  It then
3255 *	turns around and calls the internal routine.  This routine
3256 *	is used until the Linux console driver initializes itself.
3257 *
3258 *	The calling parameters are:
3259 *		void mac_serial_print(const char *str);
3260 *
3261 *	This routine does NOT understand variable arguments only
3262 *	simple strings!
3263 */
3264ENTRY(mac_serial_print)
3265	moveml	%d0/%a0,%sp@-
3266#if 1
3267	move	%sr,%sp@-
3268	ori	#0x0700,%sr
3269#endif
3270	movel	%sp@(10),%a0		/* fetch parameter */
3271	jra	2f
32721:	serial_putc	%d0
32732:	moveb	%a0@+,%d0
3274	jne	1b
3275#if 1
3276	move	%sp@+,%sr
3277#endif
3278	moveml	%sp@+,%d0/%a0
3279	rts
3280#endif /* CONFIG_MAC */
3281
3282#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3283func_start	set_leds,%d0/%a0
3284	movel	ARG1,%d0
3285#ifdef CONFIG_HP300
3286	is_not_hp300(1f)
3287	movel	%pc@(L(iobase)),%a0
3288	moveb	%d0,%a0@(0x1ffff)
3289	jra	2f
3290#endif
32911:
3292#ifdef CONFIG_APOLLO
3293	movel   %pc@(L(iobase)),%a0
3294	lsll    #8,%d0
3295	eorw    #0xff00,%d0
3296	moveb	%d0,%a0@(LCPUCTRL)
3297#endif
32982:
3299func_return	set_leds
3300#endif
3301
3302#ifdef CONSOLE
3303/*
3304 *	For continuity, see the data alignment
3305 *	to which this structure is tied.
3306 */
3307#define Lconsole_struct_cur_column	0
3308#define Lconsole_struct_cur_row		4
3309#define Lconsole_struct_num_columns	8
3310#define Lconsole_struct_num_rows	12
3311#define Lconsole_struct_left_edge	16
3312#define Lconsole_struct_penguin_putc	20
3313
3314func_start	console_init,%a0-%a4/%d0-%d7
3315	/*
3316	 *	Some of the register usage that follows
3317	 *		a0 = pointer to boot_info
3318	 *		a1 = pointer to screen
3319	 *		a2 = pointer to Lconsole_globals
3320	 *		d3 = pixel width of screen
3321	 *		d4 = pixel height of screen
3322	 *		(d3,d4) ~= (x,y) of a point just below
3323	 *			and to the right of the screen
3324	 *			NOT on the screen!
3325	 *		d5 = number of bytes per scan line
3326	 *		d6 = number of bytes on the entire screen
3327	 */
3328
3329	lea	%pc@(L(console_globals)),%a2
3330	movel	%pc@(L(mac_videobase)),%a1
3331	movel	%pc@(L(mac_rowbytes)),%d5
3332	movel	%pc@(L(mac_dimensions)),%d3	/* -> low byte */
3333	movel	%d3,%d4
3334	swap	%d4		/* -> high byte */
3335	andl	#0xffff,%d3	/* d3 = screen width in pixels */
3336	andl	#0xffff,%d4	/* d4 = screen height in pixels */
3337
3338	movel	%d5,%d6
3339|	subl	#20,%d6
3340	mulul	%d4,%d6		/* scan line bytes x num scan lines */
3341	divul	#8,%d6		/* we'll clear 8 bytes at a time */
3342	moveq	#-1,%d0		/* Mac_black */
3343	subq	#1,%d6
3344
3345L(console_clear_loop):
3346	movel	%d0,%a1@+
3347	movel	%d0,%a1@+
3348	dbra	%d6,L(console_clear_loop)
3349
3350	/* Calculate font size */
3351
3352#if   defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
3353	lea	%pc@(font_vga_8x8),%a0
3354#elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
3355	lea	%pc@(font_vga_8x16),%a0
3356#elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
3357	lea	%pc@(font_vga_6x11),%a0
3358#elif defined(CONFIG_FONT_8x8) /* default */
3359	lea	%pc@(font_vga_8x8),%a0
3360#else /* no compiled-in font */
3361	lea	0,%a0
3362#endif
3363
3364	/*
3365	 *	At this point we make a shift in register usage
3366	 *	a1 = address of console_font pointer
3367	 */
3368	lea	%pc@(L(console_font)),%a1
3369	movel	%a0,%a1@	/* store pointer to struct fbcon_font_desc in console_font */
3370	tstl	%a0
3371	jeq	1f
3372	lea	%pc@(L(console_font_data)),%a4
3373	movel	%a0@(FONT_DESC_DATA),%d0
3374	subl	#L(console_font),%a1
3375	addl	%a1,%d0
3376	movel	%d0,%a4@
3377
3378	/*
3379	 *	Calculate global maxs
3380	 *	Note - we can use either an
3381	 *	8 x 16 or 8 x 8 character font
3382	 *	6 x 11 also supported
3383	 */
3384		/* ASSERT: a0 = contents of Lconsole_font */
3385	movel	%d3,%d0				/* screen width in pixels */
3386	divul	%a0@(FONT_DESC_WIDTH),%d0	/* d0 = max num chars per row */
3387
3388	movel	%d4,%d1				/* screen height in pixels */
3389	divul	%a0@(FONT_DESC_HEIGHT),%d1	/* d1 = max num rows */
3390
3391	movel	%d0,%a2@(Lconsole_struct_num_columns)
3392	movel	%d1,%a2@(Lconsole_struct_num_rows)
3393
3394	/*
3395	 *	Clear the current row and column
3396	 */
3397	clrl	%a2@(Lconsole_struct_cur_column)
3398	clrl	%a2@(Lconsole_struct_cur_row)
3399	clrl	%a2@(Lconsole_struct_left_edge)
3400
3401	/*
3402	 * Initialization is complete
3403	 */
34041:
3405func_return	console_init
3406
3407func_start	console_put_stats,%a0/%d7
3408	/*
3409	 *	Some of the register usage that follows
3410	 *		a0 = pointer to boot_info
3411	 *		d7 = value of boot_info fields
3412	 */
3413	puts	"\nMacLinux\n\n"
3414
3415#ifdef SERIAL_DEBUG
3416	puts	" vidaddr:"
3417	putn	%pc@(L(mac_videobase))		/* video addr. */
3418
3419	puts	"\n  _stext:"
3420	lea	%pc@(_stext),%a0
3421	putn	%a0
3422
3423	puts	"\nbootinfo:"
3424	lea	%pc@(_end),%a0
3425	putn	%a0
3426
3427	puts	"\ncpuid:"
3428	putn	%pc@(L(cputype))
3429	putc	'\n'
3430
3431#ifdef MAC_SERIAL_DEBUG
3432	putn	%pc@(L(mac_sccbase))
3433	putc	'\n'
3434#endif
3435#  if defined(MMU_PRINT)
3436	jbsr	mmu_print_machine_cpu_types
3437#  endif /* MMU_PRINT */
3438#endif /* SERIAL_DEBUG */
3439
3440func_return	console_put_stats
3441
3442#ifdef CONSOLE_PENGUIN
3443func_start	console_put_penguin,%a0-%a1/%d0-%d7
3444	/*
3445	 *	Get 'that_penguin' onto the screen in the upper right corner
3446	 *	penguin is 64 x 74 pixels, align against right edge of screen
3447	 */
3448	lea	%pc@(L(mac_dimensions)),%a0
3449	movel	%a0@,%d0
3450	andil	#0xffff,%d0
3451	subil	#64,%d0		/* snug up against the right edge */
3452	clrl	%d1		/* start at the top */
3453	movel	#73,%d7
3454	lea	%pc@(L(that_penguin)),%a1
3455L(console_penguin_row):
3456	movel	#31,%d6
3457L(console_penguin_pixel_pair):
3458	moveb	%a1@,%d2
3459	lsrb	#4,%d2
3460	console_plot_pixel %d0,%d1,%d2
3461	addq	#1,%d0
3462	moveb	%a1@+,%d2
3463	console_plot_pixel %d0,%d1,%d2
3464	addq	#1,%d0
3465	dbra	%d6,L(console_penguin_pixel_pair)
3466
3467	subil	#64,%d0
3468	addq	#1,%d1
3469	dbra	%d7,L(console_penguin_row)
3470
3471func_return	console_put_penguin
3472
3473/* include penguin bitmap */
3474L(that_penguin):
3475#include "../mac/mac_penguin.S"
3476#endif
3477
3478	/*
3479	 * Calculate source and destination addresses
3480	 *	output	a1 = dest
3481	 *		a2 = source
3482	 */
3483
3484func_start	console_scroll,%a0-%a4/%d0-%d7
3485	lea	%pc@(L(mac_videobase)),%a0
3486	movel	%a0@,%a1
3487	movel	%a1,%a2
3488	lea	%pc@(L(mac_rowbytes)),%a0
3489	movel	%a0@,%d5
3490	movel	%pc@(L(console_font)),%a0
3491	tstl	%a0
3492	jeq	1f
3493	mulul	%a0@(FONT_DESC_HEIGHT),%d5	/* account for # scan lines per character */
3494	addal	%d5,%a2
3495
3496	/*
3497	 * Get dimensions
3498	 */
3499	lea	%pc@(L(mac_dimensions)),%a0
3500	movel	%a0@,%d3
3501	movel	%d3,%d4
3502	swap	%d4
3503	andl	#0xffff,%d3	/* d3 = screen width in pixels */
3504	andl	#0xffff,%d4	/* d4 = screen height in pixels */
3505
3506	/*
3507	 * Calculate number of bytes to move
3508	 */
3509	lea	%pc@(L(mac_rowbytes)),%a0
3510	movel	%a0@,%d6
3511	movel	%pc@(L(console_font)),%a0
3512	subl	%a0@(FONT_DESC_HEIGHT),%d4	/* we're not scrolling the top row! */
3513	mulul	%d4,%d6		/* scan line bytes x num scan lines */
3514	divul	#32,%d6		/* we'll move 8 longs at a time */
3515	subq	#1,%d6
3516
3517L(console_scroll_loop):
3518	movel	%a2@+,%a1@+
3519	movel	%a2@+,%a1@+
3520	movel	%a2@+,%a1@+
3521	movel	%a2@+,%a1@+
3522	movel	%a2@+,%a1@+
3523	movel	%a2@+,%a1@+
3524	movel	%a2@+,%a1@+
3525	movel	%a2@+,%a1@+
3526	dbra	%d6,L(console_scroll_loop)
3527
3528	lea	%pc@(L(mac_rowbytes)),%a0
3529	movel	%a0@,%d6
3530	movel	%pc@(L(console_font)),%a0
3531	mulul	%a0@(FONT_DESC_HEIGHT),%d6	/* scan line bytes x font height */
3532	divul	#32,%d6			/* we'll move 8 words at a time */
3533	subq	#1,%d6
3534
3535	moveq	#-1,%d0
3536L(console_scroll_clear_loop):
3537	movel	%d0,%a1@+
3538	movel	%d0,%a1@+
3539	movel	%d0,%a1@+
3540	movel	%d0,%a1@+
3541	movel	%d0,%a1@+
3542	movel	%d0,%a1@+
3543	movel	%d0,%a1@+
3544	movel	%d0,%a1@+
3545	dbra	%d6,L(console_scroll_clear_loop)
3546
35471:
3548func_return	console_scroll
3549
3550
3551func_start	console_putc,%a0/%a1/%d0-%d7
3552
3553	is_not_mac(L(console_exit))
3554	tstl	%pc@(L(console_font))
3555	jeq	L(console_exit)
3556
3557	/* Output character in d7 on console.
3558	 */
3559	movel	ARG1,%d7
3560	cmpib	#'\n',%d7
3561	jbne	1f
3562
3563	/* A little safe recursion is good for the soul */
3564	console_putc	#'\r'
35651:
3566	lea	%pc@(L(console_globals)),%a0
3567
3568	cmpib	#10,%d7
3569	jne	L(console_not_lf)
3570	movel	%a0@(Lconsole_struct_cur_row),%d0
3571	addil	#1,%d0
3572	movel	%d0,%a0@(Lconsole_struct_cur_row)
3573	movel	%a0@(Lconsole_struct_num_rows),%d1
3574	cmpl	%d1,%d0
3575	jcs	1f
3576	subil	#1,%d0
3577	movel	%d0,%a0@(Lconsole_struct_cur_row)
3578	console_scroll
35791:
3580	jra	L(console_exit)
3581
3582L(console_not_lf):
3583	cmpib	#13,%d7
3584	jne	L(console_not_cr)
3585	clrl	%a0@(Lconsole_struct_cur_column)
3586	jra	L(console_exit)
3587
3588L(console_not_cr):
3589	cmpib	#1,%d7
3590	jne	L(console_not_home)
3591	clrl	%a0@(Lconsole_struct_cur_row)
3592	clrl	%a0@(Lconsole_struct_cur_column)
3593	jra	L(console_exit)
3594
3595/*
3596 *	At this point we know that the %d7 character is going to be
3597 *	rendered on the screen.  Register usage is -
3598 *		a0 = pointer to console globals
3599 *		a1 = font data
3600 *		d0 = cursor column
3601 *		d1 = cursor row to draw the character
3602 *		d7 = character number
3603 */
3604L(console_not_home):
3605	movel	%a0@(Lconsole_struct_cur_column),%d0
3606	addql	#1,%a0@(Lconsole_struct_cur_column)
3607	movel	%a0@(Lconsole_struct_num_columns),%d1
3608	cmpl	%d1,%d0
3609	jcs	1f
3610	console_putc	#'\n'	/* recursion is OK! */
36111:
3612	movel	%a0@(Lconsole_struct_cur_row),%d1
3613
3614	/*
3615	 *	At this point we make a shift in register usage
3616	 *	a0 = address of pointer to font data (fbcon_font_desc)
3617	 */
3618	movel	%pc@(L(console_font)),%a0
3619	movel	%pc@(L(console_font_data)),%a1	/* Load fbcon_font_desc.data into a1 */
3620	andl	#0x000000ff,%d7
3621		/* ASSERT: a0 = contents of Lconsole_font */
3622	mulul	%a0@(FONT_DESC_HEIGHT),%d7	/* d7 = index into font data */
3623	addl	%d7,%a1			/* a1 = points to char image */
3624
3625	/*
3626	 *	At this point we make a shift in register usage
3627	 *	d0 = pixel coordinate, x
3628	 *	d1 = pixel coordinate, y
3629	 *	d2 = (bit 0) 1/0 for white/black (!) pixel on screen
3630	 *	d3 = font scan line data (8 pixels)
3631	 *	d6 = count down for the font's pixel width (8)
3632	 *	d7 = count down for the font's pixel count in height
3633	 */
3634		/* ASSERT: a0 = contents of Lconsole_font */
3635	mulul	%a0@(FONT_DESC_WIDTH),%d0
3636	mulul	%a0@(FONT_DESC_HEIGHT),%d1
3637	movel	%a0@(FONT_DESC_HEIGHT),%d7	/* Load fbcon_font_desc.height into d7 */
3638	subq	#1,%d7
3639L(console_read_char_scanline):
3640	moveb	%a1@+,%d3
3641
3642		/* ASSERT: a0 = contents of Lconsole_font */
3643	movel	%a0@(FONT_DESC_WIDTH),%d6	/* Load fbcon_font_desc.width into d6 */
3644	subql	#1,%d6
3645
3646L(console_do_font_scanline):
3647	lslb	#1,%d3
3648	scsb	%d2		/* convert 1 bit into a byte */
3649	console_plot_pixel %d0,%d1,%d2
3650	addq	#1,%d0
3651	dbra	%d6,L(console_do_font_scanline)
3652
3653		/* ASSERT: a0 = contents of Lconsole_font */
3654	subl	%a0@(FONT_DESC_WIDTH),%d0
3655	addq	#1,%d1
3656	dbra	%d7,L(console_read_char_scanline)
3657
3658L(console_exit):
3659func_return	console_putc
3660
3661	/*
3662	 *	Input:
3663	 *		d0 = x coordinate
3664	 *		d1 = y coordinate
3665	 *		d2 = (bit 0) 1/0 for white/black (!)
3666	 *	All registers are preserved
3667	 */
3668func_start	console_plot_pixel,%a0-%a1/%d0-%d4
3669
3670	movel	%pc@(L(mac_videobase)),%a1
3671	movel	%pc@(L(mac_videodepth)),%d3
3672	movel	ARG1,%d0
3673	movel	ARG2,%d1
3674	mulul	%pc@(L(mac_rowbytes)),%d1
3675	movel	ARG3,%d2
3676
3677	/*
3678	 *	Register usage:
3679	 *		d0 = x coord becomes byte offset into frame buffer
3680	 *		d1 = y coord
3681	 *		d2 = black or white (0/1)
3682	 *		d3 = video depth
3683	 *		d4 = temp of x (d0) for many bit depths
3684	 */
3685L(test_1bit):
3686	cmpb	#1,%d3
3687	jbne	L(test_2bit)
3688	movel	%d0,%d4		/* we need the low order 3 bits! */
3689	divul	#8,%d0
3690	addal	%d0,%a1
3691	addal	%d1,%a1
3692	andb	#7,%d4
3693	eorb	#7,%d4		/* reverse the x-coordinate w/ screen-bit # */
3694	andb	#1,%d2
3695	jbne	L(white_1)
3696	bsetb	%d4,%a1@
3697	jbra	L(console_plot_pixel_exit)
3698L(white_1):
3699	bclrb	%d4,%a1@
3700	jbra	L(console_plot_pixel_exit)
3701
3702L(test_2bit):
3703	cmpb	#2,%d3
3704	jbne	L(test_4bit)
3705	movel	%d0,%d4		/* we need the low order 2 bits! */
3706	divul	#4,%d0
3707	addal	%d0,%a1
3708	addal	%d1,%a1
3709	andb	#3,%d4
3710	eorb	#3,%d4		/* reverse the x-coordinate w/ screen-bit # */
3711	lsll	#1,%d4		/* ! */
3712	andb	#1,%d2
3713	jbne	L(white_2)
3714	bsetb	%d4,%a1@
3715	addq	#1,%d4
3716	bsetb	%d4,%a1@
3717	jbra	L(console_plot_pixel_exit)
3718L(white_2):
3719	bclrb	%d4,%a1@
3720	addq	#1,%d4
3721	bclrb	%d4,%a1@
3722	jbra	L(console_plot_pixel_exit)
3723
3724L(test_4bit):
3725	cmpb	#4,%d3
3726	jbne	L(test_8bit)
3727	movel	%d0,%d4		/* we need the low order bit! */
3728	divul	#2,%d0
3729	addal	%d0,%a1
3730	addal	%d1,%a1
3731	andb	#1,%d4
3732	eorb	#1,%d4
3733	lsll	#2,%d4		/* ! */
3734	andb	#1,%d2
3735	jbne	L(white_4)
3736	bsetb	%d4,%a1@
3737	addq	#1,%d4
3738	bsetb	%d4,%a1@
3739	addq	#1,%d4
3740	bsetb	%d4,%a1@
3741	addq	#1,%d4
3742	bsetb	%d4,%a1@
3743	jbra	L(console_plot_pixel_exit)
3744L(white_4):
3745	bclrb	%d4,%a1@
3746	addq	#1,%d4
3747	bclrb	%d4,%a1@
3748	addq	#1,%d4
3749	bclrb	%d4,%a1@
3750	addq	#1,%d4
3751	bclrb	%d4,%a1@
3752	jbra	L(console_plot_pixel_exit)
3753
3754L(test_8bit):
3755	cmpb	#8,%d3
3756	jbne	L(test_16bit)
3757	addal	%d0,%a1
3758	addal	%d1,%a1
3759	andb	#1,%d2
3760	jbne	L(white_8)
3761	moveb	#0xff,%a1@
3762	jbra	L(console_plot_pixel_exit)
3763L(white_8):
3764	clrb	%a1@
3765	jbra	L(console_plot_pixel_exit)
3766
3767L(test_16bit):
3768	cmpb	#16,%d3
3769	jbne	L(console_plot_pixel_exit)
3770	addal	%d0,%a1
3771	addal	%d0,%a1
3772	addal	%d1,%a1
3773	andb	#1,%d2
3774	jbne	L(white_16)
3775	clrw	%a1@
3776	jbra	L(console_plot_pixel_exit)
3777L(white_16):
3778	movew	#0x0fff,%a1@
3779	jbra	L(console_plot_pixel_exit)
3780
3781L(console_plot_pixel_exit):
3782func_return	console_plot_pixel
3783#endif /* CONSOLE */
3784
3785#if 0
3786/*
3787 * This is some old code lying around.  I don't believe
3788 * it's used or important anymore.  My guess is it contributed
3789 * to getting to this point, but it's done for now.
3790 * It was still in the 2.1.77 head.S, so it's still here.
3791 * (And still not used!)
3792 */
3793L(showtest):
3794	moveml	%a0/%d7,%sp@-
3795	puts	"A="
3796	putn	%a1
3797
3798	.long	0xf0119f15		| ptestr	#5,%a1@,#7,%a0
3799
3800	puts	"DA="
3801	putn	%a0
3802
3803	puts	"D="
3804	putn	%a0@
3805
3806	puts	"S="
3807	lea	%pc@(L(mmu)),%a0
3808	.long	0xf0106200		| pmove		%psr,%a0@
3809	clrl	%d7
3810	movew	%a0@,%d7
3811	putn	%d7
3812
3813	putc	'\n'
3814	moveml	%sp@+,%a0/%d7
3815	rts
3816#endif	/* 0 */
3817
3818__INITDATA
3819	.align	4
3820
3821#if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
3822    defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3823L(custom):
3824L(iobase):
3825	.long 0
3826#endif
3827
3828#if defined(CONSOLE)
3829L(console_globals):
3830	.long	0		/* cursor column */
3831	.long	0		/* cursor row */
3832	.long	0		/* max num columns */
3833	.long	0		/* max num rows */
3834	.long	0		/* left edge */
3835	.long	0		/* mac putc */
3836L(console_font):
3837	.long	0		/* pointer to console font (struct font_desc) */
3838L(console_font_data):
3839	.long	0		/* pointer to console font data */
3840#endif /* CONSOLE */
3841
3842#if defined(MMU_PRINT)
3843L(mmu_print_data):
3844	.long	0		/* valid flag */
3845	.long	0		/* start logical */
3846	.long	0		/* next logical */
3847	.long	0		/* start physical */
3848	.long	0		/* next physical */
3849#endif /* MMU_PRINT */
3850
3851L(cputype):
3852	.long	0
3853L(mmu_cached_pointer_tables):
3854	.long	0
3855L(mmu_num_pointer_tables):
3856	.long	0
3857L(phys_kernel_start):
3858	.long	0
3859L(kernel_end):
3860	.long	0
3861L(memory_start):
3862	.long	0
3863L(kernel_pgdir_ptr):
3864	.long	0
3865L(temp_mmap_mem):
3866	.long	0
3867
3868#if defined (CONFIG_MVME147)
3869M147_SCC_CTRL_A = 0xfffe3002
3870M147_SCC_DATA_A = 0xfffe3003
3871#endif
3872
3873#if defined (CONFIG_MVME16x)
3874M162_SCC_CTRL_A = 0xfff45005
3875M167_CYCAR = 0xfff450ee
3876M167_CYIER = 0xfff45011
3877M167_CYLICR = 0xfff45026
3878M167_CYTEOIR = 0xfff45085
3879M167_CYTDR = 0xfff450f8
3880M167_PCSCCTICR = 0xfff4201e
3881M167_PCTPIACKR = 0xfff42025
3882#endif
3883
3884#if defined (CONFIG_BVME6000)
3885BVME_SCC_CTRL_A	= 0xffb0000b
3886BVME_SCC_DATA_A	= 0xffb0000f
3887#endif
3888
3889#if defined(CONFIG_MAC)
3890L(mac_booter_data):
3891	.long	0
3892L(mac_videobase):
3893	.long	0
3894L(mac_videodepth):
3895	.long	0
3896L(mac_dimensions):
3897	.long	0
3898L(mac_rowbytes):
3899	.long	0
3900#ifdef MAC_SERIAL_DEBUG
3901L(mac_sccbase):
3902	.long	0
3903#endif /* MAC_SERIAL_DEBUG */
3904#endif
3905
3906#if defined (CONFIG_APOLLO)
3907LSRB0        = 0x10412
3908LTHRB0       = 0x10416
3909LCPUCTRL     = 0x10100
3910#endif
3911
3912#if defined(CONFIG_HP300)
3913DCADATA	     = 0x11
3914DCALSR	     = 0x1b
3915APCIDATA     = 0x00
3916APCILSR      = 0x14
3917L(uartbase):
3918	.long	0
3919L(uart_scode):
3920	.long	-1
3921#endif
3922
3923__FINIT
3924	.data
3925	.align	4
3926
3927availmem:
3928	.long	0
3929m68k_pgtable_cachemode:
3930	.long	0
3931m68k_supervisor_cachemode:
3932	.long	0
3933#if defined(CONFIG_MVME16x)
3934mvme_bdid:
3935	.long	0,0,0,0,0,0,0,0
3936#endif
3937#if defined(CONFIG_Q40)
3938q40_mem_cptr:
3939	.long	0
3940L(q40_do_debug):
3941	.long	0
3942#endif
3943