1/* SPDX-License-Identifier: GPL-2.0-or-later 2** -*- mode: asm -*- 3** 4** head.S -- This file contains the initial boot code for the 5** Linux/68k kernel. 6** 7** Copyright 1993 by Hamish Macdonald 8** 9** 68040 fixes by Michael Rausch 10** 68060 fixes by Roman Hodek 11** MMU cleanup by Randy Thelen 12** Final MMU cleanup by Roman Zippel 13** 14** Atari support by Andreas Schwab, using ideas of Robert de Vries 15** and Bjoern Brauel 16** VME Support by Richard Hirst 17** 18** 94/11/14 Andreas Schwab: put kernel at PAGESIZE 19** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari 20** ++ Bjoern & Roman: ATARI-68040 support for the Medusa 21** 95/11/18 Richard Hirst: Added MVME166 support 22** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with 23** Magnum- and FX-alternate ram 24** 98/04/25 Phil Blundell: added HP300 support 25** 1998/08/30 David Kilzer: Added support for font_desc structures 26** for linux-2.1.115 27** 1999/02/11 Richard Zidlicky: added Q40 support (initial version 99/01/01) 28** 2004/05/13 Kars de Jong: Finalised HP300 support 29*/ 30 31/* 32 * Linux startup code. 33 * 34 * At this point, the boot loader has: 35 * Disabled interrupts 36 * Disabled caches 37 * Put us in supervisor state. 38 * 39 * The kernel setup code takes the following steps: 40 * . Raise interrupt level 41 * . Set up initial kernel memory mapping. 42 * . This sets up a mapping of the 4M of memory the kernel is located in. 43 * . It also does a mapping of any initial machine specific areas. 44 * . Enable the MMU 45 * . Enable cache memories 46 * . Jump to kernel startup 47 * 48 * Much of the file restructuring was to accomplish: 49 * 1) Remove register dependency through-out the file. 50 * 2) Increase use of subroutines to perform functions 51 * 3) Increase readability of the code 52 * 53 * Of course, readability is a subjective issue, so it will never be 54 * argued that that goal was accomplished. It was merely a goal. 55 * A key way to help make code more readable is to give good 56 * documentation. So, the first thing you will find is exhaustive 57 * write-ups on the structure of the file, and the features of the 58 * functional subroutines. 59 * 60 * General Structure: 61 * ------------------ 62 * Without a doubt the single largest chunk of head.S is spent 63 * mapping the kernel and I/O physical space into the logical range 64 * for the kernel. 65 * There are new subroutines and data structures to make MMU 66 * support cleaner and easier to understand. 67 * First, you will find a routine call "mmu_map" which maps 68 * a logical to a physical region for some length given a cache 69 * type on behalf of the caller. This routine makes writing the 70 * actual per-machine specific code very simple. 71 * A central part of the code, but not a subroutine in itself, 72 * is the mmu_init code which is broken down into mapping the kernel 73 * (the same for all machines) and mapping machine-specific I/O 74 * regions. 75 * Also, there will be a description of engaging the MMU and 76 * caches. 77 * You will notice that there is a chunk of code which 78 * can emit the entire MMU mapping of the machine. This is present 79 * only in debug modes and can be very helpful. 80 * Further, there is a new console driver in head.S that is 81 * also only engaged in debug mode. Currently, it's only supported 82 * on the Macintosh class of machines. However, it is hoped that 83 * others will plug-in support for specific machines. 84 * 85 * ###################################################################### 86 * 87 * mmu_map 88 * ------- 89 * mmu_map was written for two key reasons. First, it was clear 90 * that it was very difficult to read the previous code for mapping 91 * regions of memory. Second, the Macintosh required such extensive 92 * memory allocations that it didn't make sense to propagate the 93 * existing code any further. 94 * mmu_map requires some parameters: 95 * 96 * mmu_map (logical, physical, length, cache_type) 97 * 98 * While this essentially describes the function in the abstract, you'll 99 * find more indepth description of other parameters at the implementation site. 100 * 101 * mmu_get_root_table_entry 102 * ------------------------ 103 * mmu_get_ptr_table_entry 104 * ----------------------- 105 * mmu_get_page_table_entry 106 * ------------------------ 107 * 108 * These routines are used by other mmu routines to get a pointer into 109 * a table, if necessary a new table is allocated. These routines are working 110 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root 111 * table needs of course only to be allocated once in mmu_get_root_table_entry, 112 * so that here also some mmu specific initialization is done. The second page 113 * at the start of the kernel (the first page is unmapped later) is used for 114 * the kernel_pg_dir. It must be at a position known at link time (as it's used 115 * to initialize the init task struct) and since it needs special cache 116 * settings, it's the easiest to use this page, the rest of the page is used 117 * for further pointer tables. 118 * mmu_get_page_table_entry allocates always a whole page for page tables, this 119 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense 120 * to manage page tables in smaller pieces as nearly all mappings have that 121 * size. 122 * 123 * ###################################################################### 124 * 125 * 126 * ###################################################################### 127 * 128 * mmu_engage 129 * ---------- 130 * Thanks to a small helping routine enabling the mmu got quite simple 131 * and there is only one way left. mmu_engage makes a complete a new mapping 132 * that only includes the absolute necessary to be able to jump to the final 133 * position and to restore the original mapping. 134 * As this code doesn't need a transparent translation register anymore this 135 * means all registers are free to be used by machines that needs them for 136 * other purposes. 137 * 138 * ###################################################################### 139 * 140 * mmu_print 141 * --------- 142 * This algorithm will print out the page tables of the system as 143 * appropriate for an 030 or an 040. This is useful for debugging purposes 144 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses. 145 * 146 * ###################################################################### 147 * 148 * console_init 149 * ------------ 150 * The console is also able to be turned off. The console in head.S 151 * is specifically for debugging and can be very useful. It is surrounded by 152 * #ifdef / #endif clauses so it doesn't have to ship in known-good 153 * kernels. It's basic algorithm is to determine the size of the screen 154 * (in height/width and bit depth) and then use that information for 155 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for 156 * debugging so I can see more good data. But it was trivial to add support 157 * for both fonts, so I included it. 158 * Also, the algorithm for plotting pixels is abstracted so that in 159 * theory other platforms could add support for different kinds of frame 160 * buffers. This could be very useful. 161 * 162 * console_put_penguin 163 * ------------------- 164 * An important part of any Linux bring up is the penguin and there's 165 * nothing like getting the Penguin on the screen! This algorithm will work 166 * on any machine for which there is a console_plot_pixel. 167 * 168 * console_scroll 169 * -------------- 170 * My hope is that the scroll algorithm does the right thing on the 171 * various platforms, but it wouldn't be hard to add the test conditions 172 * and new code if it doesn't. 173 * 174 * console_putc 175 * ------------- 176 * 177 * ###################################################################### 178 * 179 * Register usage has greatly simplified within head.S. Every subroutine 180 * saves and restores all registers that it modifies (except it returns a 181 * value in there of course). So the only register that needs to be initialized 182 * is the stack pointer. 183 * All other init code and data is now placed in the init section, so it will 184 * be automatically freed at the end of the kernel initialization. 185 * 186 * ###################################################################### 187 * 188 * options 189 * ------- 190 * There are many options available in a build of this file. I've 191 * taken the time to describe them here to save you the time of searching 192 * for them and trying to understand what they mean. 193 * 194 * CONFIG_xxx: These are the obvious machine configuration defines created 195 * during configuration. These are defined in autoconf.h. 196 * 197 * CONSOLE_DEBUG: Only supports a Mac frame buffer but could easily be 198 * extended to support other platforms. 199 * 200 * TEST_MMU: This is a test harness for running on any given machine but 201 * getting an MMU dump for another class of machine. The classes of machines 202 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.) 203 * and any of the models (030, 040, 060, etc.). 204 * 205 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed 206 * When head.S boots on Atari, Amiga, Macintosh, and VME 207 * machines. At that point the underlying logic will be 208 * believed to be solid enough to be trusted, and TEST_MMU 209 * can be dropped. Do note that that will clean up the 210 * head.S code significantly as large blocks of #if/#else 211 * clauses can be removed. 212 * 213 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into 214 * determing why devices don't appear to work. A test case was to remove 215 * the cacheability of the kernel bits. 216 * 217 * MMU_PRINT: There is a routine built into head.S that can display the 218 * MMU data structures. It outputs its result through the serial_putc 219 * interface. So where ever that winds up driving data, that's where the 220 * mmu struct will appear. 221 * 222 * SERIAL_DEBUG: There are a series of putc() macro statements 223 * scattered through out the code to give progress of status to the 224 * person sitting at the console. This constant determines whether those 225 * are used. 226 * 227 * DEBUG: This is the standard DEBUG flag that can be set for building 228 * the kernel. It has the effect adding additional tests into 229 * the code. 230 * 231 * FONT_6x11: 232 * FONT_8x8: 233 * FONT_8x16: 234 * In theory these could be determined at run time or handed 235 * over by the booter. But, let's be real, it's a fine hard 236 * coded value. (But, you will notice the code is run-time 237 * flexible!) A pointer to the font's struct font_desc 238 * is kept locally in Lconsole_font. It is used to determine 239 * font size information dynamically. 240 * 241 * Atari constants: 242 * USE_PRINTER: Use the printer port for serial debug. 243 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug. 244 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug. 245 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug. 246 * 247 * Macintosh constants: 248 * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug. 249 * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug. 250 */ 251 252#include <linux/linkage.h> 253#include <linux/init.h> 254#include <linux/pgtable.h> 255#include <asm/bootinfo.h> 256#include <asm/bootinfo-amiga.h> 257#include <asm/bootinfo-atari.h> 258#include <asm/bootinfo-hp300.h> 259#include <asm/bootinfo-mac.h> 260#include <asm/bootinfo-q40.h> 261#include <asm/bootinfo-virt.h> 262#include <asm/bootinfo-vme.h> 263#include <asm/setup.h> 264#include <asm/entry.h> 265#include <asm/page.h> 266#include <asm/asm-offsets.h> 267#ifdef CONFIG_MAC 268# include <asm/machw.h> 269#endif 270 271#ifdef CONFIG_EARLY_PRINTK 272# define SERIAL_DEBUG 273# if defined(CONFIG_MAC) && defined(CONFIG_FONT_SUPPORT) 274# define CONSOLE_DEBUG 275# endif 276#endif 277 278#undef MMU_PRINT 279#undef MMU_NOCACHE_KERNEL 280#undef DEBUG 281 282/* 283 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8. 284 * The 8x8 font is harder to read but fits more on the screen. 285 */ 286#define FONT_8x8 /* default */ 287/* #define FONT_8x16 */ /* 2nd choice */ 288/* #define FONT_6x11 */ /* 3rd choice */ 289 290.globl kernel_pg_dir 291.globl availmem 292.globl m68k_init_mapped_size 293.globl m68k_pgtable_cachemode 294.globl m68k_supervisor_cachemode 295#ifdef CONFIG_MVME16x 296.globl mvme_bdid 297#endif 298#ifdef CONFIG_Q40 299.globl q40_mem_cptr 300#endif 301 302CPUTYPE_040 = 1 /* indicates an 040 */ 303CPUTYPE_060 = 2 /* indicates an 060 */ 304CPUTYPE_0460 = 3 /* if either above are set, this is set */ 305CPUTYPE_020 = 4 /* indicates an 020 */ 306 307/* Translation control register */ 308TC_ENABLE = 0x8000 309TC_PAGE8K = 0x4000 310TC_PAGE4K = 0x0000 311 312/* Transparent translation registers */ 313TTR_ENABLE = 0x8000 /* enable transparent translation */ 314TTR_ANYMODE = 0x4000 /* user and kernel mode access */ 315TTR_KERNELMODE = 0x2000 /* only kernel mode access */ 316TTR_USERMODE = 0x0000 /* only user mode access */ 317TTR_CI = 0x0400 /* inhibit cache */ 318TTR_RW = 0x0200 /* read/write mode */ 319TTR_RWM = 0x0100 /* read/write mask */ 320TTR_FCB2 = 0x0040 /* function code base bit 2 */ 321TTR_FCB1 = 0x0020 /* function code base bit 1 */ 322TTR_FCB0 = 0x0010 /* function code base bit 0 */ 323TTR_FCM2 = 0x0004 /* function code mask bit 2 */ 324TTR_FCM1 = 0x0002 /* function code mask bit 1 */ 325TTR_FCM0 = 0x0001 /* function code mask bit 0 */ 326 327/* Cache Control registers */ 328CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */ 329CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */ 330CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */ 331CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */ 332CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */ 333CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */ 334CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */ 335CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */ 336CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */ 337CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */ 338CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */ 339CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */ 340CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */ 341CC3_CLR_D = 0x00000800 /* clear data cache (68030) */ 342CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */ 343CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */ 344CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */ 345CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */ 346CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */ 347CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */ 348CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */ 349CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */ 350 351/* Miscellaneous definitions */ 352PAGESIZE = 4096 353PAGESHIFT = 12 354 355ROOT_TABLE_SIZE = 128 356PTR_TABLE_SIZE = 128 357PAGE_TABLE_SIZE = 64 358ROOT_INDEX_SHIFT = 25 359PTR_INDEX_SHIFT = 18 360PAGE_INDEX_SHIFT = 12 361 362#ifdef DEBUG 363/* When debugging use readable names for labels */ 364#ifdef __STDC__ 365#define L(name) .head.S.##name 366#else 367#define L(name) .head.S./**/name 368#endif 369#else 370#ifdef __STDC__ 371#define L(name) .L##name 372#else 373#define L(name) .L/**/name 374#endif 375#endif 376 377/* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */ 378#ifndef __INITDATA 379#define __INITDATA .data 380#define __FINIT .previous 381#endif 382 383/* Several macros to make the writing of subroutines easier: 384 * - func_start marks the beginning of the routine which setups the frame 385 * register and saves the registers, it also defines another macro 386 * to automatically restore the registers again. 387 * - func_return marks the end of the routine and simply calls the prepared 388 * macro to restore registers and jump back to the caller. 389 * - func_define generates another macro to automatically put arguments 390 * onto the stack call the subroutine and cleanup the stack again. 391 */ 392 393/* Within subroutines these macros can be used to access the arguments 394 * on the stack. With STACK some allocated memory on the stack can be 395 * accessed and ARG0 points to the return address (used by mmu_engage). 396 */ 397#define STACK %a6@(stackstart) 398#define ARG0 %a6@(4) 399#define ARG1 %a6@(8) 400#define ARG2 %a6@(12) 401#define ARG3 %a6@(16) 402#define ARG4 %a6@(20) 403 404.macro func_start name,saveregs,stack=0 405L(\name): 406 linkw %a6,#-\stack 407 moveml \saveregs,%sp@- 408.set stackstart,-\stack 409 410.macro func_return_\name 411 moveml %sp@+,\saveregs 412 unlk %a6 413 rts 414.endm 415.endm 416 417.macro func_return name 418 func_return_\name 419.endm 420 421.macro func_call name 422 jbsr L(\name) 423.endm 424 425.macro move_stack nr,arg1,arg2,arg3,arg4 426.if \nr 427 move_stack "(\nr-1)",\arg2,\arg3,\arg4 428 movel \arg1,%sp@- 429.endif 430.endm 431 432.macro func_define name,nr=0 433.macro \name arg1,arg2,arg3,arg4 434 move_stack \nr,\arg1,\arg2,\arg3,\arg4 435 func_call \name 436.if \nr 437 lea %sp@(\nr*4),%sp 438.endif 439.endm 440.endm 441 442func_define mmu_map,4 443func_define mmu_map_tt,4 444func_define mmu_fixup_page_mmu_cache,1 445func_define mmu_temp_map,2 446func_define mmu_engage 447func_define mmu_get_root_table_entry,1 448func_define mmu_get_ptr_table_entry,2 449func_define mmu_get_page_table_entry,2 450func_define mmu_print 451func_define get_new_page 452#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO) 453func_define set_leds 454#endif 455 456.macro mmu_map_eq arg1,arg2,arg3 457 mmu_map \arg1,\arg1,\arg2,\arg3 458.endm 459 460.macro get_bi_record record 461 pea \record 462 func_call get_bi_record 463 addql #4,%sp 464.endm 465 466func_define serial_putc,1 467func_define console_putc,1 468 469func_define console_init 470func_define console_put_penguin 471func_define console_plot_pixel,3 472func_define console_scroll 473 474.macro putc ch 475#if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG) 476 pea \ch 477#endif 478#ifdef CONSOLE_DEBUG 479 func_call console_putc 480#endif 481#ifdef SERIAL_DEBUG 482 func_call serial_putc 483#endif 484#if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG) 485 addql #4,%sp 486#endif 487.endm 488 489.macro dputc ch 490#ifdef DEBUG 491 putc \ch 492#endif 493.endm 494 495func_define putn,1 496 497.macro dputn nr 498#ifdef DEBUG 499 putn \nr 500#endif 501.endm 502 503.macro puts string 504#if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG) 505 __INITDATA 506.Lstr\@: 507 .string "\string" 508 __FINIT 509 pea %pc@(.Lstr\@) 510 func_call puts 511 addql #4,%sp 512#endif 513.endm 514 515.macro dputs string 516#ifdef DEBUG 517 puts "\string" 518#endif 519.endm 520 521#define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab 522#define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab 523#define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab 524#define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab 525#define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab 526#define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab 527#define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab 528#define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab 529#define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab 530#define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab 531#define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab 532#define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab 533#define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab 534#define is_not_virt(lab) cmpl &MACH_VIRT,%pc@(m68k_machtype); jne lab 535 536#define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \ 537 jeq 42f; \ 538 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \ 539 jne lab ;\ 540 42:\ 541 542#define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab 543#define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab 544#define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab 545#define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab 546#define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab 547#define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab 548#define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab 549 550/* On the HP300 we use the on-board LEDs for debug output before 551 the console is running. Writing a 1 bit turns the corresponding LED 552 _off_ - on the 340 bit 7 is towards the back panel of the machine. */ 553.macro leds mask 554#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO) 555 hasnt_leds(.Lled\@) 556 pea \mask 557 func_call set_leds 558 addql #4,%sp 559.Lled\@: 560#endif 561.endm 562 563__HEAD 564ENTRY(_stext) 565/* 566 * Version numbers of the bootinfo interface 567 * The area from _stext to _start will later be used as kernel pointer table 568 */ 569 bras 1f /* Jump over bootinfo version numbers */ 570 571 .long BOOTINFOV_MAGIC 572 .long MACH_AMIGA, AMIGA_BOOTI_VERSION 573 .long MACH_ATARI, ATARI_BOOTI_VERSION 574 .long MACH_MVME147, MVME147_BOOTI_VERSION 575 .long MACH_MVME16x, MVME16x_BOOTI_VERSION 576 .long MACH_BVME6000, BVME6000_BOOTI_VERSION 577 .long MACH_MAC, MAC_BOOTI_VERSION 578 .long MACH_Q40, Q40_BOOTI_VERSION 579 .long MACH_HP300, HP300_BOOTI_VERSION 580 .long 0 5811: jra __start 582 583.equ kernel_pg_dir,_stext 584 585.equ .,_stext+PAGESIZE 586 587ENTRY(_start) 588 jra __start 589__INIT 590ENTRY(__start) 591/* 592 * Setup initial stack pointer 593 */ 594 lea %pc@(_stext),%sp 595 596/* 597 * Record the CPU and machine type. 598 */ 599 get_bi_record BI_MACHTYPE 600 lea %pc@(m68k_machtype),%a1 601 movel %a0@,%a1@ 602 603 get_bi_record BI_FPUTYPE 604 lea %pc@(m68k_fputype),%a1 605 movel %a0@,%a1@ 606 607 get_bi_record BI_MMUTYPE 608 lea %pc@(m68k_mmutype),%a1 609 movel %a0@,%a1@ 610 611 get_bi_record BI_CPUTYPE 612 lea %pc@(m68k_cputype),%a1 613 movel %a0@,%a1@ 614 615 leds 0x1 616 617#ifdef CONFIG_MAC 618/* 619 * For Macintosh, we need to determine the display parameters early (at least 620 * while debugging it). 621 */ 622 623 is_not_mac(L(test_notmac)) 624 625 get_bi_record BI_MAC_VADDR 626 lea %pc@(L(mac_videobase)),%a1 627 movel %a0@,%a1@ 628 629 get_bi_record BI_MAC_VDEPTH 630 lea %pc@(L(mac_videodepth)),%a1 631 movel %a0@,%a1@ 632 633 get_bi_record BI_MAC_VDIM 634 lea %pc@(L(mac_dimensions)),%a1 635 movel %a0@,%a1@ 636 637 get_bi_record BI_MAC_VROW 638 lea %pc@(L(mac_rowbytes)),%a1 639 movel %a0@,%a1@ 640 641 get_bi_record BI_MAC_SCCBASE 642 lea %pc@(L(mac_sccbase)),%a1 643 movel %a0@,%a1@ 644 645L(test_notmac): 646#endif /* CONFIG_MAC */ 647 648#ifdef CONFIG_VIRT 649 is_not_virt(L(test_notvirt)) 650 651 get_bi_record BI_VIRT_GF_TTY_BASE 652 lea %pc@(L(virt_gf_tty_base)),%a1 653 movel %a0@,%a1@ 654L(test_notvirt): 655#endif /* CONFIG_VIRT */ 656 657/* 658 * There are ultimately two pieces of information we want for all kinds of 659 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter 660 * and is converted here from a booter type definition to a separate bit 661 * number which allows for the standard is_0x0 macro tests. 662 */ 663 movel %pc@(m68k_cputype),%d0 664 /* 665 * Assume it's an 030 666 */ 667 clrl %d1 668 669 /* 670 * Test the BootInfo cputype for 060 671 */ 672 btst #CPUB_68060,%d0 673 jeq 1f 674 bset #CPUTYPE_060,%d1 675 bset #CPUTYPE_0460,%d1 676 jra 3f 6771: 678 /* 679 * Test the BootInfo cputype for 040 680 */ 681 btst #CPUB_68040,%d0 682 jeq 2f 683 bset #CPUTYPE_040,%d1 684 bset #CPUTYPE_0460,%d1 685 jra 3f 6862: 687 /* 688 * Test the BootInfo cputype for 020 689 */ 690 btst #CPUB_68020,%d0 691 jeq 3f 692 bset #CPUTYPE_020,%d1 693 jra 3f 6943: 695 /* 696 * Record the cpu type 697 */ 698 lea %pc@(L(cputype)),%a0 699 movel %d1,%a0@ 700 701 /* 702 * NOTE: 703 * 704 * Now the macros are valid: 705 * is_040_or_060 706 * is_not_040_or_060 707 * is_040 708 * is_060 709 * is_not_060 710 */ 711 712 /* 713 * Determine the cache mode for pages holding MMU tables 714 * and for supervisor mode, unused for '020 and '030 715 */ 716 clrl %d0 717 clrl %d1 718 719 is_not_040_or_060(L(save_cachetype)) 720 721 /* 722 * '040 or '060 723 * d1 := cacheable write-through 724 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables, 725 * but we have been using write-through since at least 2.0.29 so I 726 * guess it is OK. 727 */ 728#ifdef CONFIG_060_WRITETHROUGH 729 /* 730 * If this is a 68060 board using drivers with cache coherency 731 * problems, then supervisor memory accesses need to be write-through 732 * also; otherwise, we want copyback. 733 */ 734 735 is_not_060(1f) 736 movel #_PAGE_CACHE040W,%d0 737 jra L(save_cachetype) 738#endif /* CONFIG_060_WRITETHROUGH */ 7391: 740 movew #_PAGE_CACHE040,%d0 741 742 movel #_PAGE_CACHE040W,%d1 743 744L(save_cachetype): 745 /* Save cache mode for supervisor mode and page tables 746 */ 747 lea %pc@(m68k_supervisor_cachemode),%a0 748 movel %d0,%a0@ 749 lea %pc@(m68k_pgtable_cachemode),%a0 750 movel %d1,%a0@ 751 752/* 753 * raise interrupt level 754 */ 755 movew #0x2700,%sr 756 757/* 758 If running on an Atari, determine the I/O base of the 759 serial port and test if we are running on a Medusa or Hades. 760 This test is necessary here, because on the Hades the serial 761 port is only accessible in the high I/O memory area. 762 763 The test whether it is a Medusa is done by writing to the byte at 764 phys. 0x0. This should result in a bus error on all other machines. 765 766 ...should, but doesn't. The Afterburner040 for the Falcon has the 767 same behaviour (0x0..0x7 are no ROM shadow). So we have to do 768 another test to distinguish Medusa and AB040. This is a 769 read attempt for 0x00ff82fe phys. that should bus error on a Falcon 770 (+AB040), but is in the range where the Medusa always asserts DTACK. 771 772 The test for the Hades is done by reading address 0xb0000000. This 773 should give a bus error on the Medusa. 774 */ 775 776#ifdef CONFIG_ATARI 777 is_not_atari(L(notypetest)) 778 779 /* get special machine type (Medusa/Hades/AB40) */ 780 moveq #0,%d3 /* default if tag doesn't exist */ 781 get_bi_record BI_ATARI_MCH_TYPE 782 tstl %d0 783 jbmi 1f 784 movel %a0@,%d3 785 lea %pc@(atari_mch_type),%a0 786 movel %d3,%a0@ 7871: 788 /* On the Hades, the iobase must be set up before opening the 789 * serial port. There are no I/O regs at 0x00ffxxxx at all. */ 790 moveq #0,%d0 791 cmpl #ATARI_MACH_HADES,%d3 792 jbne 1f 793 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */ 7941: lea %pc@(L(iobase)),%a0 795 movel %d0,%a0@ 796 797L(notypetest): 798#endif 799 800#ifdef CONFIG_VME 801 is_mvme147(L(getvmetype)) 802 is_bvme6000(L(getvmetype)) 803 is_not_mvme16x(L(gvtdone)) 804 805 /* See if the loader has specified the BI_VME_TYPE tag. Recent 806 * versions of VMELILO and TFTPLILO do this. We have to do this 807 * early so we know how to handle console output. If the tag 808 * doesn't exist then we use the Bug for output on MVME16x. 809 */ 810L(getvmetype): 811 get_bi_record BI_VME_TYPE 812 tstl %d0 813 jbmi 1f 814 movel %a0@,%d3 815 lea %pc@(vme_brdtype),%a0 816 movel %d3,%a0@ 8171: 818#ifdef CONFIG_MVME16x 819 is_not_mvme16x(L(gvtdone)) 820 821 /* Need to get the BRD_ID info to differentiate between 162, 167, 822 * etc. This is available as a BI_VME_BRDINFO tag with later 823 * versions of VMELILO and TFTPLILO, otherwise we call the Bug. 824 */ 825 get_bi_record BI_VME_BRDINFO 826 tstl %d0 827 jpl 1f 828 829 /* Get pointer to board ID data from Bug */ 830 movel %d2,%sp@- 831 trap #15 832 .word 0x70 /* trap 0x70 - .BRD_ID */ 833 movel %sp@+,%a0 8341: 835 lea %pc@(mvme_bdid),%a1 836 /* Structure is 32 bytes long */ 837 movel %a0@+,%a1@+ 838 movel %a0@+,%a1@+ 839 movel %a0@+,%a1@+ 840 movel %a0@+,%a1@+ 841 movel %a0@+,%a1@+ 842 movel %a0@+,%a1@+ 843 movel %a0@+,%a1@+ 844 movel %a0@+,%a1@+ 845#endif 846 847L(gvtdone): 848 849#endif 850 851#ifdef CONFIG_HP300 852 is_not_hp300(L(nothp)) 853 854 /* Get the address of the UART for serial debugging */ 855 get_bi_record BI_HP300_UART_ADDR 856 tstl %d0 857 jbmi 1f 858 movel %a0@,%d3 859 lea %pc@(L(uartbase)),%a0 860 movel %d3,%a0@ 861 get_bi_record BI_HP300_UART_SCODE 862 tstl %d0 863 jbmi 1f 864 movel %a0@,%d3 865 lea %pc@(L(uart_scode)),%a0 866 movel %d3,%a0@ 8671: 868L(nothp): 869#endif 870 871/* 872 * Initialize serial port 873 */ 874 jbsr L(serial_init) 875 876/* 877 * Initialize console 878 */ 879#ifdef CONFIG_MAC 880 is_not_mac(L(nocon)) 881# ifdef CONSOLE_DEBUG 882 console_init 883# ifdef CONFIG_LOGO 884 console_put_penguin 885# endif /* CONFIG_LOGO */ 886# endif /* CONSOLE_DEBUG */ 887L(nocon): 888#endif /* CONFIG_MAC */ 889 890 891 putc '\n' 892 putc 'A' 893 leds 0x2 894 dputn %pc@(L(cputype)) 895 dputn %pc@(m68k_supervisor_cachemode) 896 dputn %pc@(m68k_pgtable_cachemode) 897 dputc '\n' 898 899/* 900 * Save physical start address of kernel 901 */ 902 lea %pc@(L(phys_kernel_start)),%a0 903 lea %pc@(_stext),%a1 904 subl #_stext,%a1 905 addl #PAGE_OFFSET,%a1 906 movel %a1,%a0@ 907 908 putc 'B' 909 910 leds 0x4 911 912/* 913 * mmu_init 914 * 915 * This block of code does what's necessary to map in the various kinds 916 * of machines for execution of Linux. 917 * First map the first 4, 8, or 16 MB of kernel code & data 918 */ 919 920 get_bi_record BI_MEMCHUNK 921 movel %a0@(4),%d0 922 movel #16*1024*1024,%d1 923 cmpl %d0,%d1 924 jls 1f 925 lsrl #1,%d1 926 cmpl %d0,%d1 927 jls 1f 928 lsrl #1,%d1 9291: 930 lea %pc@(m68k_init_mapped_size),%a0 931 movel %d1,%a0@ 932 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),%d1,\ 933 %pc@(m68k_supervisor_cachemode) 934 935 putc 'C' 936 937#ifdef CONFIG_AMIGA 938 939L(mmu_init_amiga): 940 941 is_not_amiga(L(mmu_init_not_amiga)) 942/* 943 * mmu_init_amiga 944 */ 945 946 putc 'D' 947 948 is_not_040_or_060(1f) 949 950 /* 951 * 040: Map the 16Meg range physical 0x0 up to logical 0x8000.0000 952 */ 953 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S 954 /* 955 * Map the Zorro III I/O space with transparent translation 956 * for frame buffer memory etc. 957 */ 958 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S 959 960 jbra L(mmu_init_done) 961 9621: 963 /* 964 * 030: Map the 32Meg range physical 0x0 up to logical 0x8000.0000 965 */ 966 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030 967 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030 968 969 jbra L(mmu_init_done) 970 971L(mmu_init_not_amiga): 972#endif 973 974#ifdef CONFIG_ATARI 975 976L(mmu_init_atari): 977 978 is_not_atari(L(mmu_init_not_atari)) 979 980 putc 'E' 981 982/* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping 983 the last 16 MB of virtual address space to the first 16 MB (i.e. 984 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is 985 needed. I/O ranges are marked non-cachable. 986 987 For the Medusa it is better to map the I/O region transparently 988 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are 989 accessible only in the high area. 990 991 On the Hades all I/O registers are only accessible in the high 992 area. 993*/ 994 995 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */ 996 moveq #0,%d0 997 movel %pc@(atari_mch_type),%d3 998 cmpl #ATARI_MACH_MEDUSA,%d3 999 jbeq 2f 1000 cmpl #ATARI_MACH_HADES,%d3 1001 jbne 1f 10022: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */ 10031: movel %d0,%d3 1004 1005 is_040_or_060(L(spata68040)) 1006 1007 /* Map everything non-cacheable, though not all parts really 1008 * need to disable caches (crucial only for 0xff8000..0xffffff 1009 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder 1010 * isn't really used, except for sometimes peeking into the 1011 * ROMs (mirror at phys. 0x0), so caching isn't necessary for 1012 * this. */ 1013 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030 1014 1015 jbra L(mmu_init_done) 1016 1017L(spata68040): 1018 1019 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S 1020 1021 jbra L(mmu_init_done) 1022 1023L(mmu_init_not_atari): 1024#endif 1025 1026#ifdef CONFIG_Q40 1027 is_not_q40(L(notq40)) 1028 /* 1029 * add transparent mapping for 0xff00 0000 - 0xffff ffff 1030 * non-cached serialized etc.. 1031 * this includes master chip, DAC, RTC and ISA ports 1032 * 0xfe000000-0xfeffffff is for screen and ROM 1033 */ 1034 1035 putc 'Q' 1036 1037 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W 1038 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S 1039 1040 jbra L(mmu_init_done) 1041 1042L(notq40): 1043#endif 1044 1045#ifdef CONFIG_HP300 1046 is_not_hp300(L(nothp300)) 1047 1048 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx) 1049 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx). 1050 * The ROM mapping is needed because the LEDs are mapped there too. 1051 */ 1052 1053 is_040(1f) 1054 1055 /* 1056 * 030: Map the 32Meg range physical 0x0 up to logical 0xf000.0000 1057 */ 1058 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030 1059 1060 jbra L(mmu_init_done) 1061 10621: 1063 /* 1064 * 040: Map the 16Meg range physical 0x0 up to logical 0xf000.0000 1065 */ 1066 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S 1067 1068 jbra L(mmu_init_done) 1069 1070L(nothp300): 1071#endif /* CONFIG_HP300 */ 1072 1073#ifdef CONFIG_MVME147 1074 1075 is_not_mvme147(L(not147)) 1076 1077 /* 1078 * On MVME147 we have already created kernel page tables for 1079 * 4MB of RAM at address 0, so now need to do a transparent 1080 * mapping of the top of memory space. Make it 0.5GByte for now, 1081 * so we can access on-board i/o areas. 1082 */ 1083 1084 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030 1085 1086 jbra L(mmu_init_done) 1087 1088L(not147): 1089#endif /* CONFIG_MVME147 */ 1090 1091#ifdef CONFIG_MVME16x 1092 1093 is_not_mvme16x(L(not16x)) 1094 1095 /* 1096 * On MVME16x we have already created kernel page tables for 1097 * 4MB of RAM at address 0, so now need to do a transparent 1098 * mapping of the top of memory space. Make it 0.5GByte for now. 1099 * Supervisor only access, so transparent mapping doesn't 1100 * clash with User code virtual address space. 1101 * this covers IO devices, PROM and SRAM. The PROM and SRAM 1102 * mapping is needed to allow 167Bug to run. 1103 * IO is in the range 0xfff00000 to 0xfffeffff. 1104 * PROM is 0xff800000->0xffbfffff and SRAM is 1105 * 0xffe00000->0xffe1ffff. 1106 */ 1107 1108 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S 1109 1110 jbra L(mmu_init_done) 1111 1112L(not16x): 1113#endif /* CONFIG_MVME162 | CONFIG_MVME167 */ 1114 1115#ifdef CONFIG_BVME6000 1116 1117 is_not_bvme6000(L(not6000)) 1118 1119 /* 1120 * On BVME6000 we have already created kernel page tables for 1121 * 4MB of RAM at address 0, so now need to do a transparent 1122 * mapping of the top of memory space. Make it 0.5GByte for now, 1123 * so we can access on-board i/o areas. 1124 * Supervisor only access, so transparent mapping doesn't 1125 * clash with User code virtual address space. 1126 */ 1127 1128 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S 1129 1130 jbra L(mmu_init_done) 1131 1132L(not6000): 1133#endif /* CONFIG_BVME6000 */ 1134 1135/* 1136 * mmu_init_mac 1137 * 1138 * The Macintosh mappings are less clear. 1139 * 1140 * Even as of this writing, it is unclear how the 1141 * Macintosh mappings will be done. However, as 1142 * the first author of this code I'm proposing the 1143 * following model: 1144 * 1145 * Map the kernel (that's already done), 1146 * Map the I/O (on most machines that's the 1147 * 0x5000.0000 ... 0x5300.0000 range, 1148 * Map the video frame buffer using as few pages 1149 * as absolutely (this requirement mostly stems from 1150 * the fact that when the frame buffer is at 1151 * 0x0000.0000 then we know there is valid RAM just 1152 * above the screen that we don't want to waste!). 1153 * 1154 * By the way, if the frame buffer is at 0x0000.0000 1155 * then the Macintosh is known as an RBV based Mac. 1156 * 1157 * By the way 2, the code currently maps in a bunch of 1158 * regions. But I'd like to cut that out. (And move most 1159 * of the mappings up into the kernel proper ... or only 1160 * map what's necessary.) 1161 */ 1162 1163#ifdef CONFIG_MAC 1164 1165L(mmu_init_mac): 1166 1167 is_not_mac(L(mmu_init_not_mac)) 1168 1169 putc 'F' 1170 1171 is_not_040_or_060(1f) 1172 1173 moveq #_PAGE_NOCACHE_S,%d3 1174 jbra 2f 11751: 1176 moveq #_PAGE_NOCACHE030,%d3 11772: 1178 /* 1179 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical> 1180 * we simply map the 4MB that contains the videomem 1181 */ 1182 1183 movel #VIDEOMEMMASK,%d0 1184 andl %pc@(L(mac_videobase)),%d0 1185 1186 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3 1187 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */ 1188 mmu_map_eq #0x40000000,#0x02000000,%d3 1189 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */ 1190 mmu_map_eq #0x50000000,#0x03000000,%d3 1191 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */ 1192 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3 1193 1194 jbra L(mmu_init_done) 1195 1196L(mmu_init_not_mac): 1197#endif 1198 1199#ifdef CONFIG_SUN3X 1200 is_not_sun3x(L(notsun3x)) 1201 1202 /* oh, the pain.. We're gonna want the prom code after 1203 * starting the MMU, so we copy the mappings, translating 1204 * from 8k -> 4k pages as we go. 1205 */ 1206 1207 /* copy maps from 0xfee00000 to 0xff000000 */ 1208 movel #0xfee00000, %d0 1209 moveq #ROOT_INDEX_SHIFT, %d1 1210 lsrl %d1,%d0 1211 mmu_get_root_table_entry %d0 1212 1213 movel #0xfee00000, %d0 1214 moveq #PTR_INDEX_SHIFT, %d1 1215 lsrl %d1,%d0 1216 andl #PTR_TABLE_SIZE-1, %d0 1217 mmu_get_ptr_table_entry %a0,%d0 1218 1219 movel #0xfee00000, %d0 1220 moveq #PAGE_INDEX_SHIFT, %d1 1221 lsrl %d1,%d0 1222 andl #PAGE_TABLE_SIZE-1, %d0 1223 mmu_get_page_table_entry %a0,%d0 1224 1225 /* this is where the prom page table lives */ 1226 movel 0xfefe00d4, %a1 1227 movel %a1@, %a1 1228 1229 movel #((0x200000 >> 13)-1), %d1 1230 12311: 1232 movel %a1@+, %d3 1233 movel %d3,%a0@+ 1234 addl #0x1000,%d3 1235 movel %d3,%a0@+ 1236 1237 dbra %d1,1b 1238 1239 /* setup tt1 for I/O */ 1240 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S 1241 jbra L(mmu_init_done) 1242 1243L(notsun3x): 1244#endif 1245 1246#ifdef CONFIG_VIRT 1247 is_not_virt(L(novirt)) 1248 mmu_map_tt #1,#0xFF000000,#0x01000000,#_PAGE_NOCACHE_S 1249 jbra L(mmu_init_done) 1250L(novirt): 1251#endif 1252 1253#ifdef CONFIG_APOLLO 1254 is_not_apollo(L(notapollo)) 1255 1256 putc 'P' 1257 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030 1258 1259L(notapollo): 1260 jbra L(mmu_init_done) 1261#endif 1262 1263L(mmu_init_done): 1264 1265 putc 'G' 1266 leds 0x8 1267 1268/* 1269 * mmu_fixup 1270 * 1271 * On the 040 class machines, all pages that are used for the 1272 * mmu have to be fixed up. According to Motorola, pages holding mmu 1273 * tables should be non-cacheable on a '040 and write-through on a 1274 * '060. But analysis of the reasons for this, and practical 1275 * experience, showed that write-through also works on a '040. 1276 * 1277 * Allocated memory so far goes from kernel_end to memory_start that 1278 * is used for all kind of tables, for that the cache attributes 1279 * are now fixed. 1280 */ 1281L(mmu_fixup): 1282 1283 is_not_040_or_060(L(mmu_fixup_done)) 1284 1285#ifdef MMU_NOCACHE_KERNEL 1286 jbra L(mmu_fixup_done) 1287#endif 1288 1289 /* first fix the page at the start of the kernel, that 1290 * contains also kernel_pg_dir. 1291 */ 1292 movel %pc@(L(phys_kernel_start)),%d0 1293 subl #PAGE_OFFSET,%d0 1294 lea %pc@(_stext),%a0 1295 subl %d0,%a0 1296 mmu_fixup_page_mmu_cache %a0 1297 1298 movel %pc@(L(kernel_end)),%a0 1299 subl %d0,%a0 1300 movel %pc@(L(memory_start)),%a1 1301 subl %d0,%a1 1302 bra 2f 13031: 1304 mmu_fixup_page_mmu_cache %a0 1305 addw #PAGESIZE,%a0 13062: 1307 cmpl %a0,%a1 1308 jgt 1b 1309 1310L(mmu_fixup_done): 1311 1312#ifdef MMU_PRINT 1313 mmu_print 1314#endif 1315 1316/* 1317 * mmu_engage 1318 * 1319 * This chunk of code performs the gruesome task of engaging the MMU. 1320 * The reason it's gruesome is because when the MMU becomes engaged it 1321 * maps logical addresses to physical addresses. The Program Counter 1322 * register is then passed through the MMU before the next instruction 1323 * is fetched (the instruction following the engage MMU instruction). 1324 * This may mean one of two things: 1325 * 1. The Program Counter falls within the logical address space of 1326 * the kernel of which there are two sub-possibilities: 1327 * A. The PC maps to the correct instruction (logical PC == physical 1328 * code location), or 1329 * B. The PC does not map through and the processor will read some 1330 * data (or instruction) which is not the logically next instr. 1331 * As you can imagine, A is good and B is bad. 1332 * Alternatively, 1333 * 2. The Program Counter does not map through the MMU. The processor 1334 * will take a Bus Error. 1335 * Clearly, 2 is bad. 1336 * It doesn't take a wiz kid to figure you want 1.A. 1337 * This code creates that possibility. 1338 * There are two possible 1.A. states (we now ignore the other above states): 1339 * A. The kernel is located at physical memory addressed the same as 1340 * the logical memory for the kernel, i.e., 0x01000. 1341 * B. The kernel is located some where else. e.g., 0x0400.0000 1342 * 1343 * Under some conditions the Macintosh can look like A or B. 1344 * [A friend and I once noted that Apple hardware engineers should be 1345 * wacked twice each day: once when they show up at work (as in, Whack!, 1346 * "This is for the screwy hardware we know you're going to design today."), 1347 * and also at the end of the day (as in, Whack! "I don't know what 1348 * you designed today, but I'm sure it wasn't good."). -- rst] 1349 * 1350 * This code works on the following premise: 1351 * If the kernel start (%d5) is within the first 16 Meg of RAM, 1352 * then create a mapping for the kernel at logical 0x8000.0000 to 1353 * the physical location of the pc. And, create a transparent 1354 * translation register for the first 16 Meg. Then, after the MMU 1355 * is engaged, the PC can be moved up into the 0x8000.0000 range 1356 * and then the transparent translation can be turned off and then 1357 * the PC can jump to the correct logical location and it will be 1358 * home (finally). This is essentially the code that the Amiga used 1359 * to use. Now, it's generalized for all processors. Which means 1360 * that a fresh (but temporary) mapping has to be created. The mapping 1361 * is made in page 0 (an as of yet unused location -- except for the 1362 * stack!). This temporary mapping will only require 1 pointer table 1363 * and a single page table (it can map 256K). 1364 * 1365 * OK, alternatively, imagine that the Program Counter is not within 1366 * the first 16 Meg. Then, just use Transparent Translation registers 1367 * to do the right thing. 1368 * 1369 * Last, if _start is already at 0x01000, then there's nothing special 1370 * to do (in other words, in a degenerate case of the first case above, 1371 * do nothing). 1372 * 1373 * Let's do it. 1374 * 1375 * 1376 */ 1377 1378 putc 'H' 1379 1380 mmu_engage 1381 1382/* 1383 * After this point no new memory is allocated and 1384 * the start of available memory is stored in availmem. 1385 * (The bootmem allocator requires now the physical address.) 1386 */ 1387 1388 movel L(memory_start),availmem 1389 1390#ifdef CONFIG_AMIGA 1391 is_not_amiga(1f) 1392 /* fixup the Amiga custom register location before printing */ 1393 clrl L(custom) 13941: 1395#endif 1396 1397#ifdef CONFIG_ATARI 1398 is_not_atari(1f) 1399 /* fixup the Atari iobase register location before printing */ 1400 movel #0xff000000,L(iobase) 14011: 1402#endif 1403 1404#ifdef CONFIG_MAC 1405 is_not_mac(1f) 1406 movel #~VIDEOMEMMASK,%d0 1407 andl L(mac_videobase),%d0 1408 addl #VIDEOMEMBASE,%d0 1409 movel %d0,L(mac_videobase) 1410#ifdef CONSOLE_DEBUG 1411 movel %pc@(L(phys_kernel_start)),%d0 1412 subl #PAGE_OFFSET,%d0 1413 subl %d0,L(console_font) 1414 subl %d0,L(console_font_data) 1415#endif 1416 orl #0x50000000,L(mac_sccbase) 14171: 1418#endif 1419 1420#ifdef CONFIG_HP300 1421 is_not_hp300(2f) 1422 /* 1423 * Fix up the iobase register to point to the new location of the LEDs. 1424 */ 1425 movel #0xf0000000,L(iobase) 1426 1427 /* 1428 * Energise the FPU and caches. 1429 */ 1430 is_040(1f) 1431 movel #0x60,0xf05f400c 1432 jbra 2f 1433 1434 /* 1435 * 040: slightly different, apparently. 1436 */ 14371: movew #0,0xf05f400e 1438 movew #0x64,0xf05f400e 14392: 1440#endif 1441 1442#ifdef CONFIG_SUN3X 1443 is_not_sun3x(1f) 1444 1445 /* enable copro */ 1446 oriw #0x4000,0x61000000 14471: 1448#endif 1449 1450#ifdef CONFIG_APOLLO 1451 is_not_apollo(1f) 1452 1453 /* 1454 * Fix up the iobase before printing 1455 */ 1456 movel #0x80000000,L(iobase) 14571: 1458#endif 1459 1460 putc 'I' 1461 leds 0x10 1462 1463/* 1464 * Enable caches 1465 */ 1466 1467 is_not_040_or_060(L(cache_not_680460)) 1468 1469L(cache680460): 1470 .chip 68040 1471 nop 1472 cpusha %bc 1473 nop 1474 1475 is_060(L(cache68060)) 1476 1477 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0 1478 /* MMU stuff works in copyback mode now, so enable the cache */ 1479 movec %d0,%cacr 1480 jra L(cache_done) 1481 1482L(cache68060): 1483 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0 1484 /* MMU stuff works in copyback mode now, so enable the cache */ 1485 movec %d0,%cacr 1486 /* enable superscalar dispatch in PCR */ 1487 moveq #1,%d0 1488 .chip 68060 1489 movec %d0,%pcr 1490 1491 jbra L(cache_done) 1492L(cache_not_680460): 1493L(cache68030): 1494 .chip 68030 1495 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0 1496 movec %d0,%cacr 1497 1498 jra L(cache_done) 1499 .chip 68k 1500L(cache_done): 1501 1502 putc 'J' 1503 1504/* 1505 * Setup initial stack pointer 1506 */ 1507 lea init_task,%curptr 1508 lea init_thread_union+THREAD_SIZE,%sp 1509 1510 putc 'K' 1511 1512 subl %a6,%a6 /* clear a6 for gdb */ 1513 1514/* 1515 * The new 64bit printf support requires an early exception initialization. 1516 */ 1517 jbsr base_trap_init 1518 1519/* jump to the kernel start */ 1520 1521 putc '\n' 1522 leds 0x55 1523 1524 jbsr start_kernel 1525 1526/* 1527 * Find a tag record in the bootinfo structure 1528 * The bootinfo structure is located right after the kernel 1529 * Returns: d0: size (-1 if not found) 1530 * a0: data pointer (end-of-records if not found) 1531 */ 1532func_start get_bi_record,%d1 1533 1534 movel ARG1,%d0 1535 lea %pc@(_end),%a0 15361: tstw %a0@(BIR_TAG) 1537 jeq 3f 1538 cmpw %a0@(BIR_TAG),%d0 1539 jeq 2f 1540 addw %a0@(BIR_SIZE),%a0 1541 jra 1b 15422: moveq #0,%d0 1543 movew %a0@(BIR_SIZE),%d0 1544 lea %a0@(BIR_DATA),%a0 1545 jra 4f 15463: moveq #-1,%d0 1547 lea %a0@(BIR_SIZE),%a0 15484: 1549func_return get_bi_record 1550 1551 1552/* 1553 * MMU Initialization Begins Here 1554 * 1555 * The structure of the MMU tables on the 68k machines 1556 * is thus: 1557 * Root Table 1558 * Logical addresses are translated through 1559 * a hierarchical translation mechanism where the high-order 1560 * seven bits of the logical address (LA) are used as an 1561 * index into the "root table." Each entry in the root 1562 * table has a bit which specifies if it's a valid pointer to a 1563 * pointer table. Each entry defines a 32Meg range of memory. 1564 * If an entry is invalid then that logical range of 32M is 1565 * invalid and references to that range of memory (when the MMU 1566 * is enabled) will fault. If the entry is valid, then it does 1567 * one of two things. On 040/060 class machines, it points to 1568 * a pointer table which then describes more finely the memory 1569 * within that 32M range. On 020/030 class machines, a technique 1570 * called "early terminating descriptors" are used. This technique 1571 * allows an entire 32Meg to be described by a single entry in the 1572 * root table. Thus, this entry in the root table, contains the 1573 * physical address of the memory or I/O at the logical address 1574 * which the entry represents and it also contains the necessary 1575 * cache bits for this region. 1576 * 1577 * Pointer Tables 1578 * Per the Root Table, there will be one or more 1579 * pointer tables. Each pointer table defines a 32M range. 1580 * Not all of the 32M range need be defined. Again, the next 1581 * seven bits of the logical address are used an index into 1582 * the pointer table to point to page tables (if the pointer 1583 * is valid). There will undoubtedly be more than one 1584 * pointer table for the kernel because each pointer table 1585 * defines a range of only 32M. Valid pointer table entries 1586 * point to page tables, or are early terminating entries 1587 * themselves. 1588 * 1589 * Page Tables 1590 * Per the Pointer Tables, each page table entry points 1591 * to the physical page in memory that supports the logical 1592 * address that translates to the particular index. 1593 * 1594 * In short, the Logical Address gets translated as follows: 1595 * bits 31..26 - index into the Root Table 1596 * bits 25..18 - index into the Pointer Table 1597 * bits 17..12 - index into the Page Table 1598 * bits 11..0 - offset into a particular 4K page 1599 * 1600 * The algorithms which follow do one thing: they abstract 1601 * the MMU hardware. For example, there are three kinds of 1602 * cache settings that are relevant. Either, memory is 1603 * being mapped in which case it is either Kernel Code (or 1604 * the RamDisk) or it is MMU data. On the 030, the MMU data 1605 * option also describes the kernel. Or, I/O is being mapped 1606 * in which case it has its own kind of cache bits. There 1607 * are constants which abstract these notions from the code that 1608 * actually makes the call to map some range of memory. 1609 * 1610 * 1611 * 1612 */ 1613 1614#ifdef MMU_PRINT 1615/* 1616 * mmu_print 1617 * 1618 * This algorithm will print out the current MMU mappings. 1619 * 1620 * Input: 1621 * %a5 points to the root table. Everything else is calculated 1622 * from this. 1623 */ 1624 1625#define mmu_next_valid 0 1626#define mmu_start_logical 4 1627#define mmu_next_logical 8 1628#define mmu_start_physical 12 1629#define mmu_next_physical 16 1630 1631#define MMU_PRINT_INVALID -1 1632#define MMU_PRINT_VALID 1 1633#define MMU_PRINT_UNINITED 0 1634 1635#define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2: 1636 1637func_start mmu_print,%a0-%a6/%d0-%d7 1638 1639 movel %pc@(L(kernel_pgdir_ptr)),%a5 1640 lea %pc@(L(mmu_print_data)),%a0 1641 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid) 1642 1643 is_not_040_or_060(mmu_030_print) 1644 1645mmu_040_print: 1646 puts "\nMMU040\n" 1647 puts "rp:" 1648 putn %a5 1649 putc '\n' 1650#if 0 1651 /* 1652 * The following #if/#endif block is a tight algorithm for dumping the 040 1653 * MMU Map in gory detail. It really isn't that practical unless the 1654 * MMU Map algorithm appears to go awry and you need to debug it at the 1655 * entry per entry level. 1656 */ 1657 movel #ROOT_TABLE_SIZE,%d5 1658#if 0 1659 movel %a5@+,%d7 | Burn an entry to skip the kernel mappings, 1660 subql #1,%d5 | they (might) work 1661#endif 16621: tstl %d5 1663 jbeq mmu_print_done 1664 subq #1,%d5 1665 movel %a5@+,%d7 1666 btst #1,%d7 1667 jbeq 1b 1668 16692: putn %d7 1670 andil #0xFFFFFE00,%d7 1671 movel %d7,%a4 1672 movel #PTR_TABLE_SIZE,%d4 1673 putc ' ' 16743: tstl %d4 1675 jbeq 11f 1676 subq #1,%d4 1677 movel %a4@+,%d7 1678 btst #1,%d7 1679 jbeq 3b 1680 16814: putn %d7 1682 andil #0xFFFFFF00,%d7 1683 movel %d7,%a3 1684 movel #PAGE_TABLE_SIZE,%d3 16855: movel #8,%d2 16866: tstl %d3 1687 jbeq 31f 1688 subq #1,%d3 1689 movel %a3@+,%d6 1690 btst #0,%d6 1691 jbeq 6b 16927: tstl %d2 1693 jbeq 8f 1694 subq #1,%d2 1695 putc ' ' 1696 jbra 91f 16978: putc '\n' 1698 movel #8+1+8+1+1,%d2 16999: putc ' ' 1700 dbra %d2,9b 1701 movel #7,%d2 170291: putn %d6 1703 jbra 6b 1704 170531: putc '\n' 1706 movel #8+1,%d2 170732: putc ' ' 1708 dbra %d2,32b 1709 jbra 3b 1710 171111: putc '\n' 1712 jbra 1b 1713#endif /* MMU 040 Dumping code that's gory and detailed */ 1714 1715 lea %pc@(kernel_pg_dir),%a5 1716 movel %a5,%a0 /* a0 has the address of the root table ptr */ 1717 movel #0x00000000,%a4 /* logical address */ 1718 moveql #0,%d0 171940: 1720 /* Increment the logical address and preserve in d5 */ 1721 movel %a4,%d5 1722 addil #PAGESIZE<<13,%d5 1723 movel %a0@+,%d6 1724 btst #1,%d6 1725 jbne 41f 1726 jbsr mmu_print_tuple_invalidate 1727 jbra 48f 172841: 1729 movel #0,%d1 1730 andil #0xfffffe00,%d6 1731 movel %d6,%a1 173242: 1733 movel %a4,%d5 1734 addil #PAGESIZE<<6,%d5 1735 movel %a1@+,%d6 1736 btst #1,%d6 1737 jbne 43f 1738 jbsr mmu_print_tuple_invalidate 1739 jbra 47f 174043: 1741 movel #0,%d2 1742 andil #0xffffff00,%d6 1743 movel %d6,%a2 174444: 1745 movel %a4,%d5 1746 addil #PAGESIZE,%d5 1747 movel %a2@+,%d6 1748 btst #0,%d6 1749 jbne 45f 1750 jbsr mmu_print_tuple_invalidate 1751 jbra 46f 175245: 1753 moveml %d0-%d1,%sp@- 1754 movel %a4,%d0 1755 movel %d6,%d1 1756 andil #0xfffff4e0,%d1 1757 lea %pc@(mmu_040_print_flags),%a6 1758 jbsr mmu_print_tuple 1759 moveml %sp@+,%d0-%d1 176046: 1761 movel %d5,%a4 1762 addq #1,%d2 1763 cmpib #64,%d2 1764 jbne 44b 176547: 1766 movel %d5,%a4 1767 addq #1,%d1 1768 cmpib #128,%d1 1769 jbne 42b 177048: 1771 movel %d5,%a4 /* move to the next logical address */ 1772 addq #1,%d0 1773 cmpib #128,%d0 1774 jbne 40b 1775 1776 .chip 68040 1777 movec %dtt1,%d0 1778 movel %d0,%d1 1779 andiw #0x8000,%d1 /* is it valid ? */ 1780 jbeq 1f /* No, bail out */ 1781 1782 movel %d0,%d1 1783 andil #0xff000000,%d1 /* Get the address */ 1784 putn %d1 1785 puts "==" 1786 putn %d1 1787 1788 movel %d0,%d6 1789 jbsr mmu_040_print_flags_tt 17901: 1791 movec %dtt0,%d0 1792 movel %d0,%d1 1793 andiw #0x8000,%d1 /* is it valid ? */ 1794 jbeq 1f /* No, bail out */ 1795 1796 movel %d0,%d1 1797 andil #0xff000000,%d1 /* Get the address */ 1798 putn %d1 1799 puts "==" 1800 putn %d1 1801 1802 movel %d0,%d6 1803 jbsr mmu_040_print_flags_tt 18041: 1805 .chip 68k 1806 1807 jbra mmu_print_done 1808 1809mmu_040_print_flags: 1810 btstl #10,%d6 1811 putZc(' ','G') /* global bit */ 1812 btstl #7,%d6 1813 putZc(' ','S') /* supervisor bit */ 1814mmu_040_print_flags_tt: 1815 btstl #6,%d6 1816 jbne 3f 1817 putc 'C' 1818 btstl #5,%d6 1819 putZc('w','c') /* write through or copy-back */ 1820 jbra 4f 18213: 1822 putc 'N' 1823 btstl #5,%d6 1824 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */ 18254: 1826 rts 1827 1828mmu_030_print_flags: 1829 btstl #6,%d6 1830 putZc('C','I') /* write through or copy-back */ 1831 rts 1832 1833mmu_030_print: 1834 puts "\nMMU030\n" 1835 puts "\nrp:" 1836 putn %a5 1837 putc '\n' 1838 movel %a5,%d0 1839 andil #0xfffffff0,%d0 1840 movel %d0,%a0 1841 movel #0x00000000,%a4 /* logical address */ 1842 movel #0,%d0 184330: 1844 movel %a4,%d5 1845 addil #PAGESIZE<<13,%d5 1846 movel %a0@+,%d6 1847 btst #1,%d6 /* is it a table ptr? */ 1848 jbne 31f /* yes */ 1849 btst #0,%d6 /* is it early terminating? */ 1850 jbeq 1f /* no */ 1851 jbsr mmu_030_print_helper 1852 jbra 38f 18531: 1854 jbsr mmu_print_tuple_invalidate 1855 jbra 38f 185631: 1857 movel #0,%d1 1858 andil #0xfffffff0,%d6 1859 movel %d6,%a1 186032: 1861 movel %a4,%d5 1862 addil #PAGESIZE<<6,%d5 1863 movel %a1@+,%d6 1864 btst #1,%d6 /* is it a table ptr? */ 1865 jbne 33f /* yes */ 1866 btst #0,%d6 /* is it a page descriptor? */ 1867 jbeq 1f /* no */ 1868 jbsr mmu_030_print_helper 1869 jbra 37f 18701: 1871 jbsr mmu_print_tuple_invalidate 1872 jbra 37f 187333: 1874 movel #0,%d2 1875 andil #0xfffffff0,%d6 1876 movel %d6,%a2 187734: 1878 movel %a4,%d5 1879 addil #PAGESIZE,%d5 1880 movel %a2@+,%d6 1881 btst #0,%d6 1882 jbne 35f 1883 jbsr mmu_print_tuple_invalidate 1884 jbra 36f 188535: 1886 jbsr mmu_030_print_helper 188736: 1888 movel %d5,%a4 1889 addq #1,%d2 1890 cmpib #64,%d2 1891 jbne 34b 189237: 1893 movel %d5,%a4 1894 addq #1,%d1 1895 cmpib #128,%d1 1896 jbne 32b 189738: 1898 movel %d5,%a4 /* move to the next logical address */ 1899 addq #1,%d0 1900 cmpib #128,%d0 1901 jbne 30b 1902 1903mmu_print_done: 1904 puts "\n" 1905 1906func_return mmu_print 1907 1908 1909mmu_030_print_helper: 1910 moveml %d0-%d1,%sp@- 1911 movel %a4,%d0 1912 movel %d6,%d1 1913 lea %pc@(mmu_030_print_flags),%a6 1914 jbsr mmu_print_tuple 1915 moveml %sp@+,%d0-%d1 1916 rts 1917 1918mmu_print_tuple_invalidate: 1919 moveml %a0/%d7,%sp@- 1920 1921 lea %pc@(L(mmu_print_data)),%a0 1922 tstl %a0@(mmu_next_valid) 1923 jbmi mmu_print_tuple_invalidate_exit 1924 1925 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid) 1926 1927 putn %a4 1928 1929 puts "##\n" 1930 1931mmu_print_tuple_invalidate_exit: 1932 moveml %sp@+,%a0/%d7 1933 rts 1934 1935 1936mmu_print_tuple: 1937 moveml %d0-%d7/%a0,%sp@- 1938 1939 lea %pc@(L(mmu_print_data)),%a0 1940 1941 tstl %a0@(mmu_next_valid) 1942 jble mmu_print_tuple_print 1943 1944 cmpl %a0@(mmu_next_physical),%d1 1945 jbeq mmu_print_tuple_increment 1946 1947mmu_print_tuple_print: 1948 putn %d0 1949 puts "->" 1950 putn %d1 1951 1952 movel %d1,%d6 1953 jbsr %a6@ 1954 1955mmu_print_tuple_record: 1956 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid) 1957 1958 movel %d1,%a0@(mmu_next_physical) 1959 1960mmu_print_tuple_increment: 1961 movel %d5,%d7 1962 subl %a4,%d7 1963 addl %d7,%a0@(mmu_next_physical) 1964 1965mmu_print_tuple_exit: 1966 moveml %sp@+,%d0-%d7/%a0 1967 rts 1968 1969mmu_print_machine_cpu_types: 1970 puts "machine: " 1971 1972 is_not_amiga(1f) 1973 puts "amiga" 1974 jbra 9f 19751: 1976 is_not_atari(2f) 1977 puts "atari" 1978 jbra 9f 19792: 1980 is_not_mac(3f) 1981 puts "macintosh" 1982 jbra 9f 19833: puts "unknown" 19849: putc '\n' 1985 1986 puts "cputype: 0" 1987 is_not_060(1f) 1988 putc '6' 1989 jbra 9f 19901: 1991 is_not_040_or_060(2f) 1992 putc '4' 1993 jbra 9f 19942: putc '3' 19959: putc '0' 1996 putc '\n' 1997 1998 rts 1999#endif /* MMU_PRINT */ 2000 2001/* 2002 * mmu_map_tt 2003 * 2004 * This is a specific function which works on all 680x0 machines. 2005 * On 030, 040 & 060 it will attempt to use Transparent Translation 2006 * registers (tt1). 2007 * On 020 it will call the standard mmu_map which will use early 2008 * terminating descriptors. 2009 */ 2010func_start mmu_map_tt,%d0/%d1/%a0,4 2011 2012 dputs "mmu_map_tt:" 2013 dputn ARG1 2014 dputn ARG2 2015 dputn ARG3 2016 dputn ARG4 2017 dputc '\n' 2018 2019 is_020(L(do_map)) 2020 2021 /* Extract the highest bit set 2022 */ 2023 bfffo ARG3{#0,#32},%d1 2024 cmpw #8,%d1 2025 jcc L(do_map) 2026 2027 /* And get the mask 2028 */ 2029 moveq #-1,%d0 2030 lsrl %d1,%d0 2031 lsrl #1,%d0 2032 2033 /* Mask the address 2034 */ 2035 movel %d0,%d1 2036 notl %d1 2037 andl ARG2,%d1 2038 2039 /* Generate the upper 16bit of the tt register 2040 */ 2041 lsrl #8,%d0 2042 orl %d0,%d1 2043 clrw %d1 2044 2045 is_040_or_060(L(mmu_map_tt_040)) 2046 2047 /* set 030 specific bits (read/write access for supervisor mode 2048 * (highest function code set, lower two bits masked)) 2049 */ 2050 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1 2051 movel ARG4,%d0 2052 btst #6,%d0 2053 jeq 1f 2054 orw #TTR_CI,%d1 2055 20561: lea STACK,%a0 2057 dputn %d1 2058 movel %d1,%a0@ 2059 .chip 68030 2060 tstl ARG1 2061 jne 1f 2062 pmove %a0@,%tt0 2063 jra 2f 20641: pmove %a0@,%tt1 20652: .chip 68k 2066 jra L(mmu_map_tt_done) 2067 2068 /* set 040 specific bits 2069 */ 2070L(mmu_map_tt_040): 2071 orw #TTR_ENABLE+TTR_KERNELMODE,%d1 2072 orl ARG4,%d1 2073 dputn %d1 2074 2075 .chip 68040 2076 tstl ARG1 2077 jne 1f 2078 movec %d1,%itt0 2079 movec %d1,%dtt0 2080 jra 2f 20811: movec %d1,%itt1 2082 movec %d1,%dtt1 20832: .chip 68k 2084 2085 jra L(mmu_map_tt_done) 2086 2087L(do_map): 2088 mmu_map_eq ARG2,ARG3,ARG4 2089 2090L(mmu_map_tt_done): 2091 2092func_return mmu_map_tt 2093 2094/* 2095 * mmu_map 2096 * 2097 * This routine will map a range of memory using a pointer 2098 * table and allocate the pages on the fly from the kernel. 2099 * The pointer table does not have to be already linked into 2100 * the root table, this routine will do that if necessary. 2101 * 2102 * NOTE 2103 * This routine will assert failure and use the serial_putc 2104 * routines in the case of a run-time error. For example, 2105 * if the address is already mapped. 2106 * 2107 * NOTE-2 2108 * This routine will use early terminating descriptors 2109 * where possible for the 68020+68851 and 68030 type 2110 * processors. 2111 */ 2112func_start mmu_map,%d0-%d4/%a0-%a4 2113 2114 dputs "\nmmu_map:" 2115 dputn ARG1 2116 dputn ARG2 2117 dputn ARG3 2118 dputn ARG4 2119 dputc '\n' 2120 2121 /* Get logical address and round it down to 256KB 2122 */ 2123 movel ARG1,%d0 2124 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0 2125 movel %d0,%a3 2126 2127 /* Get the end address 2128 */ 2129 movel ARG1,%a4 2130 addl ARG3,%a4 2131 subql #1,%a4 2132 2133 /* Get physical address and round it down to 256KB 2134 */ 2135 movel ARG2,%d0 2136 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0 2137 movel %d0,%a2 2138 2139 /* Add page attributes to the physical address 2140 */ 2141 movel ARG4,%d0 2142 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0 2143 addw %d0,%a2 2144 2145 dputn %a2 2146 dputn %a3 2147 dputn %a4 2148 2149 is_not_040_or_060(L(mmu_map_030)) 2150 2151 addw #_PAGE_GLOBAL040,%a2 2152/* 2153 * MMU 040 & 060 Support 2154 * 2155 * The MMU usage for the 040 and 060 is different enough from 2156 * the 030 and 68851 that there is separate code. This comment 2157 * block describes the data structures and algorithms built by 2158 * this code. 2159 * 2160 * The 040 does not support early terminating descriptors, as 2161 * the 030 does. Therefore, a third level of table is needed 2162 * for the 040, and that would be the page table. In Linux, 2163 * page tables are allocated directly from the memory above the 2164 * kernel. 2165 * 2166 */ 2167 2168L(mmu_map_040): 2169 /* Calculate the offset into the root table 2170 */ 2171 movel %a3,%d0 2172 moveq #ROOT_INDEX_SHIFT,%d1 2173 lsrl %d1,%d0 2174 mmu_get_root_table_entry %d0 2175 2176 /* Calculate the offset into the pointer table 2177 */ 2178 movel %a3,%d0 2179 moveq #PTR_INDEX_SHIFT,%d1 2180 lsrl %d1,%d0 2181 andl #PTR_TABLE_SIZE-1,%d0 2182 mmu_get_ptr_table_entry %a0,%d0 2183 2184 /* Calculate the offset into the page table 2185 */ 2186 movel %a3,%d0 2187 moveq #PAGE_INDEX_SHIFT,%d1 2188 lsrl %d1,%d0 2189 andl #PAGE_TABLE_SIZE-1,%d0 2190 mmu_get_page_table_entry %a0,%d0 2191 2192 /* The page table entry must not no be busy 2193 */ 2194 tstl %a0@ 2195 jne L(mmu_map_error) 2196 2197 /* Do the mapping and advance the pointers 2198 */ 2199 movel %a2,%a0@ 22002: 2201 addw #PAGESIZE,%a2 2202 addw #PAGESIZE,%a3 2203 2204 /* Ready with mapping? 2205 */ 2206 lea %a3@(-1),%a0 2207 cmpl %a0,%a4 2208 jhi L(mmu_map_040) 2209 jra L(mmu_map_done) 2210 2211L(mmu_map_030): 2212 /* Calculate the offset into the root table 2213 */ 2214 movel %a3,%d0 2215 moveq #ROOT_INDEX_SHIFT,%d1 2216 lsrl %d1,%d0 2217 mmu_get_root_table_entry %d0 2218 2219 /* Check if logical address 32MB aligned, 2220 * so we can try to map it once 2221 */ 2222 movel %a3,%d0 2223 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0 2224 jne 1f 2225 2226 /* Is there enough to map for 32MB at once 2227 */ 2228 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1 2229 cmpl %a1,%a4 2230 jcs 1f 2231 2232 addql #1,%a1 2233 2234 /* The root table entry must not no be busy 2235 */ 2236 tstl %a0@ 2237 jne L(mmu_map_error) 2238 2239 /* Do the mapping and advance the pointers 2240 */ 2241 dputs "early term1" 2242 dputn %a2 2243 dputn %a3 2244 dputn %a1 2245 dputc '\n' 2246 movel %a2,%a0@ 2247 2248 movel %a1,%a3 2249 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2 2250 jra L(mmu_mapnext_030) 22511: 2252 /* Calculate the offset into the pointer table 2253 */ 2254 movel %a3,%d0 2255 moveq #PTR_INDEX_SHIFT,%d1 2256 lsrl %d1,%d0 2257 andl #PTR_TABLE_SIZE-1,%d0 2258 mmu_get_ptr_table_entry %a0,%d0 2259 2260 /* The pointer table entry must not no be busy 2261 */ 2262 tstl %a0@ 2263 jne L(mmu_map_error) 2264 2265 /* Do the mapping and advance the pointers 2266 */ 2267 dputs "early term2" 2268 dputn %a2 2269 dputn %a3 2270 dputc '\n' 2271 movel %a2,%a0@ 2272 2273 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2 2274 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3 2275 2276L(mmu_mapnext_030): 2277 /* Ready with mapping? 2278 */ 2279 lea %a3@(-1),%a0 2280 cmpl %a0,%a4 2281 jhi L(mmu_map_030) 2282 jra L(mmu_map_done) 2283 2284L(mmu_map_error): 2285 2286 dputs "mmu_map error:" 2287 dputn %a2 2288 dputn %a3 2289 dputc '\n' 2290 2291L(mmu_map_done): 2292 2293func_return mmu_map 2294 2295/* 2296 * mmu_fixup 2297 * 2298 * On the 040 class machines, all pages that are used for the 2299 * mmu have to be fixed up. 2300 */ 2301 2302func_start mmu_fixup_page_mmu_cache,%d0/%a0 2303 2304 dputs "mmu_fixup_page_mmu_cache" 2305 dputn ARG1 2306 2307 /* Calculate the offset into the root table 2308 */ 2309 movel ARG1,%d0 2310 moveq #ROOT_INDEX_SHIFT,%d1 2311 lsrl %d1,%d0 2312 mmu_get_root_table_entry %d0 2313 2314 /* Calculate the offset into the pointer table 2315 */ 2316 movel ARG1,%d0 2317 moveq #PTR_INDEX_SHIFT,%d1 2318 lsrl %d1,%d0 2319 andl #PTR_TABLE_SIZE-1,%d0 2320 mmu_get_ptr_table_entry %a0,%d0 2321 2322 /* Calculate the offset into the page table 2323 */ 2324 movel ARG1,%d0 2325 moveq #PAGE_INDEX_SHIFT,%d1 2326 lsrl %d1,%d0 2327 andl #PAGE_TABLE_SIZE-1,%d0 2328 mmu_get_page_table_entry %a0,%d0 2329 2330 movel %a0@,%d0 2331 andil #_CACHEMASK040,%d0 2332 orl %pc@(m68k_pgtable_cachemode),%d0 2333 movel %d0,%a0@ 2334 2335 dputc '\n' 2336 2337func_return mmu_fixup_page_mmu_cache 2338 2339/* 2340 * mmu_temp_map 2341 * 2342 * create a temporary mapping to enable the mmu, 2343 * this we don't need any transparation translation tricks. 2344 */ 2345 2346func_start mmu_temp_map,%d0/%d1/%a0/%a1 2347 2348 dputs "mmu_temp_map" 2349 dputn ARG1 2350 dputn ARG2 2351 dputc '\n' 2352 2353 lea %pc@(L(temp_mmap_mem)),%a1 2354 2355 /* Calculate the offset in the root table 2356 */ 2357 movel ARG2,%d0 2358 moveq #ROOT_INDEX_SHIFT,%d1 2359 lsrl %d1,%d0 2360 mmu_get_root_table_entry %d0 2361 2362 /* Check if the table is temporary allocated, so we have to reuse it 2363 */ 2364 movel %a0@,%d0 2365 cmpl %pc@(L(memory_start)),%d0 2366 jcc 1f 2367 2368 /* Temporary allocate a ptr table and insert it into the root table 2369 */ 2370 movel %a1@,%d0 2371 addl #PTR_TABLE_SIZE*4,%a1@ 2372 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0 2373 movel %d0,%a0@ 2374 dputs " (new)" 23751: 2376 dputn %d0 2377 /* Mask the root table entry for the ptr table 2378 */ 2379 andw #-ROOT_TABLE_SIZE,%d0 2380 movel %d0,%a0 2381 2382 /* Calculate the offset into the pointer table 2383 */ 2384 movel ARG2,%d0 2385 moveq #PTR_INDEX_SHIFT,%d1 2386 lsrl %d1,%d0 2387 andl #PTR_TABLE_SIZE-1,%d0 2388 lea %a0@(%d0*4),%a0 2389 dputn %a0 2390 2391 /* Check if a temporary page table is already allocated 2392 */ 2393 movel %a0@,%d0 2394 jne 1f 2395 2396 /* Temporary allocate a page table and insert it into the ptr table 2397 */ 2398 movel %a1@,%d0 2399 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the 2400 alignment restriction for pointer tables on the '0[46]0. */ 2401 addl #512,%a1@ 2402 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0 2403 movel %d0,%a0@ 2404 dputs " (new)" 24051: 2406 dputn %d0 2407 /* Mask the ptr table entry for the page table 2408 */ 2409 andw #-PTR_TABLE_SIZE,%d0 2410 movel %d0,%a0 2411 2412 /* Calculate the offset into the page table 2413 */ 2414 movel ARG2,%d0 2415 moveq #PAGE_INDEX_SHIFT,%d1 2416 lsrl %d1,%d0 2417 andl #PAGE_TABLE_SIZE-1,%d0 2418 lea %a0@(%d0*4),%a0 2419 dputn %a0 2420 2421 /* Insert the address into the page table 2422 */ 2423 movel ARG1,%d0 2424 andw #-PAGESIZE,%d0 2425 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0 2426 movel %d0,%a0@ 2427 dputn %d0 2428 2429 dputc '\n' 2430 2431func_return mmu_temp_map 2432 2433func_start mmu_engage,%d0-%d2/%a0-%a3 2434 2435 moveq #ROOT_TABLE_SIZE-1,%d0 2436 /* Temporarily use a different root table. */ 2437 lea %pc@(L(kernel_pgdir_ptr)),%a0 2438 movel %a0@,%a2 2439 movel %pc@(L(memory_start)),%a1 2440 movel %a1,%a0@ 2441 movel %a2,%a0 24421: 2443 movel %a0@+,%a1@+ 2444 dbra %d0,1b 2445 2446 lea %pc@(L(temp_mmap_mem)),%a0 2447 movel %a1,%a0@ 2448 2449 movew #PAGESIZE-1,%d0 24501: 2451 clrl %a1@+ 2452 dbra %d0,1b 2453 2454 lea %pc@(1b),%a0 2455 movel #1b,%a1 2456 /* Skip temp mappings if phys == virt */ 2457 cmpl %a0,%a1 2458 jeq 1f 2459 2460 mmu_temp_map %a0,%a0 2461 mmu_temp_map %a0,%a1 2462 2463 addw #PAGESIZE,%a0 2464 addw #PAGESIZE,%a1 2465 mmu_temp_map %a0,%a0 2466 mmu_temp_map %a0,%a1 24671: 2468 movel %pc@(L(memory_start)),%a3 2469 movel %pc@(L(phys_kernel_start)),%d2 2470 2471 is_not_040_or_060(L(mmu_engage_030)) 2472 2473L(mmu_engage_040): 2474 .chip 68040 2475 nop 2476 cinva %bc 2477 nop 2478 pflusha 2479 nop 2480 movec %a3,%srp 2481 movel #TC_ENABLE+TC_PAGE4K,%d0 2482 movec %d0,%tc /* enable the MMU */ 2483 jmp 1f:l 24841: nop 2485 movec %a2,%srp 2486 nop 2487 cinva %bc 2488 nop 2489 pflusha 2490 .chip 68k 2491 jra L(mmu_engage_cleanup) 2492 2493L(mmu_engage_030_temp): 2494 .space 12 2495L(mmu_engage_030): 2496 .chip 68030 2497 lea %pc@(L(mmu_engage_030_temp)),%a0 2498 movel #0x80000002,%a0@ 2499 movel %a3,%a0@(4) 2500 movel #0x0808,%d0 2501 movec %d0,%cacr 2502 pmove %a0@,%srp 2503 pflusha 2504 /* 2505 * enable,super root enable,4096 byte pages,7 bit root index, 2506 * 7 bit pointer index, 6 bit page table index. 2507 */ 2508 movel #0x82c07760,%a0@(8) 2509 pmove %a0@(8),%tc /* enable the MMU */ 2510 jmp 1f:l 25111: movel %a2,%a0@(4) 2512 movel #0x0808,%d0 2513 movec %d0,%cacr 2514 pmove %a0@,%srp 2515 pflusha 2516 .chip 68k 2517 2518L(mmu_engage_cleanup): 2519 subl #PAGE_OFFSET,%d2 2520 subl %d2,%a2 2521 movel %a2,L(kernel_pgdir_ptr) 2522 subl %d2,%fp 2523 subl %d2,%sp 2524 subl %d2,ARG0 2525 2526func_return mmu_engage 2527 2528func_start mmu_get_root_table_entry,%d0/%a1 2529 2530#if 0 2531 dputs "mmu_get_root_table_entry:" 2532 dputn ARG1 2533 dputs " =" 2534#endif 2535 2536 movel %pc@(L(kernel_pgdir_ptr)),%a0 2537 tstl %a0 2538 jne 2f 2539 2540 dputs "\nmmu_init:" 2541 2542 /* Find the start of free memory, get_bi_record does this for us, 2543 * as the bootinfo structure is located directly behind the kernel 2544 * we simply search for the last entry. 2545 */ 2546 get_bi_record BI_LAST 2547 addw #PAGESIZE-1,%a0 2548 movel %a0,%d0 2549 andw #-PAGESIZE,%d0 2550 2551 dputn %d0 2552 2553 lea %pc@(L(memory_start)),%a0 2554 movel %d0,%a0@ 2555 lea %pc@(L(kernel_end)),%a0 2556 movel %d0,%a0@ 2557 2558 /* we have to return the first page at _stext since the init code 2559 * in mm/init.c simply expects kernel_pg_dir there, the rest of 2560 * page is used for further ptr tables in get_ptr_table. 2561 */ 2562 lea %pc@(_stext),%a0 2563 lea %pc@(L(mmu_cached_pointer_tables)),%a1 2564 movel %a0,%a1@ 2565 addl #ROOT_TABLE_SIZE*4,%a1@ 2566 2567 lea %pc@(L(mmu_num_pointer_tables)),%a1 2568 addql #1,%a1@ 2569 2570 /* clear the page 2571 */ 2572 movel %a0,%a1 2573 movew #PAGESIZE/4-1,%d0 25741: 2575 clrl %a1@+ 2576 dbra %d0,1b 2577 2578 lea %pc@(L(kernel_pgdir_ptr)),%a1 2579 movel %a0,%a1@ 2580 2581 dputn %a0 2582 dputc '\n' 25832: 2584 movel ARG1,%d0 2585 lea %a0@(%d0*4),%a0 2586 2587#if 0 2588 dputn %a0 2589 dputc '\n' 2590#endif 2591 2592func_return mmu_get_root_table_entry 2593 2594 2595 2596func_start mmu_get_ptr_table_entry,%d0/%a1 2597 2598#if 0 2599 dputs "mmu_get_ptr_table_entry:" 2600 dputn ARG1 2601 dputn ARG2 2602 dputs " =" 2603#endif 2604 2605 movel ARG1,%a0 2606 movel %a0@,%d0 2607 jne 2f 2608 2609 /* Keep track of the number of pointer tables we use 2610 */ 2611 dputs "\nmmu_get_new_ptr_table:" 2612 lea %pc@(L(mmu_num_pointer_tables)),%a0 2613 movel %a0@,%d0 2614 addql #1,%a0@ 2615 2616 /* See if there is a free pointer table in our cache of pointer tables 2617 */ 2618 lea %pc@(L(mmu_cached_pointer_tables)),%a1 2619 andw #7,%d0 2620 jne 1f 2621 2622 /* Get a new pointer table page from above the kernel memory 2623 */ 2624 get_new_page 2625 movel %a0,%a1@ 26261: 2627 /* There is an unused pointer table in our cache... use it 2628 */ 2629 movel %a1@,%d0 2630 addl #PTR_TABLE_SIZE*4,%a1@ 2631 2632 dputn %d0 2633 dputc '\n' 2634 2635 /* Insert the new pointer table into the root table 2636 */ 2637 movel ARG1,%a0 2638 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0 2639 movel %d0,%a0@ 26402: 2641 /* Extract the pointer table entry 2642 */ 2643 andw #-PTR_TABLE_SIZE,%d0 2644 movel %d0,%a0 2645 movel ARG2,%d0 2646 lea %a0@(%d0*4),%a0 2647 2648#if 0 2649 dputn %a0 2650 dputc '\n' 2651#endif 2652 2653func_return mmu_get_ptr_table_entry 2654 2655 2656func_start mmu_get_page_table_entry,%d0/%a1 2657 2658#if 0 2659 dputs "mmu_get_page_table_entry:" 2660 dputn ARG1 2661 dputn ARG2 2662 dputs " =" 2663#endif 2664 2665 movel ARG1,%a0 2666 movel %a0@,%d0 2667 jne 2f 2668 2669 /* If the page table entry doesn't exist, we allocate a complete new 2670 * page and use it as one continuous big page table which can cover 2671 * 4MB of memory, nearly almost all mappings have that alignment. 2672 */ 2673 get_new_page 2674 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0 2675 2676 /* align pointer table entry for a page of page tables 2677 */ 2678 movel ARG1,%d0 2679 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0 2680 movel %d0,%a1 2681 2682 /* Insert the page tables into the pointer entries 2683 */ 2684 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0 26851: 2686 movel %a0,%a1@+ 2687 lea %a0@(PAGE_TABLE_SIZE*4),%a0 2688 dbra %d0,1b 2689 2690 /* Now we can get the initialized pointer table entry 2691 */ 2692 movel ARG1,%a0 2693 movel %a0@,%d0 26942: 2695 /* Extract the page table entry 2696 */ 2697 andw #-PAGE_TABLE_SIZE,%d0 2698 movel %d0,%a0 2699 movel ARG2,%d0 2700 lea %a0@(%d0*4),%a0 2701 2702#if 0 2703 dputn %a0 2704 dputc '\n' 2705#endif 2706 2707func_return mmu_get_page_table_entry 2708 2709/* 2710 * get_new_page 2711 * 2712 * Return a new page from the memory start and clear it. 2713 */ 2714func_start get_new_page,%d0/%a1 2715 2716 dputs "\nget_new_page:" 2717 2718 /* allocate the page and adjust memory_start 2719 */ 2720 lea %pc@(L(memory_start)),%a0 2721 movel %a0@,%a1 2722 addl #PAGESIZE,%a0@ 2723 2724 /* clear the new page 2725 */ 2726 movel %a1,%a0 2727 movew #PAGESIZE/4-1,%d0 27281: 2729 clrl %a1@+ 2730 dbra %d0,1b 2731 2732 dputn %a0 2733 dputc '\n' 2734 2735func_return get_new_page 2736 2737 2738 2739/* 2740 * Debug output support 2741 * Atarians have a choice between the parallel port, the serial port 2742 * from the MFP or a serial port of the SCC 2743 */ 2744 2745#ifdef CONFIG_MAC 2746/* You may define either or both of these. */ 2747#define MAC_USE_SCC_A /* Modem port */ 2748#define MAC_USE_SCC_B /* Printer port */ 2749 2750#if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B) 2751/* Initialisation table for SCC with 3.6864 MHz PCLK */ 2752L(scc_initable_mac): 2753 .byte 4,0x44 /* x16, 1 stopbit, no parity */ 2754 .byte 3,0xc0 /* receiver: 8 bpc */ 2755 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */ 2756 .byte 10,0 /* NRZ */ 2757 .byte 11,0x50 /* use baud rate generator */ 2758 .byte 12,1,13,0 /* 38400 baud */ 2759 .byte 14,1 /* Baud rate generator enable */ 2760 .byte 3,0xc1 /* enable receiver */ 2761 .byte 5,0xea /* enable transmitter */ 2762 .byte -1 2763 .even 2764#endif 2765#endif /* CONFIG_MAC */ 2766 2767#ifdef CONFIG_ATARI 2768/* #define USE_PRINTER */ 2769/* #define USE_SCC_B */ 2770/* #define USE_SCC_A */ 2771#define USE_MFP 2772 2773#if defined(USE_SCC_A) || defined(USE_SCC_B) 2774/* Initialisation table for SCC with 7.9872 MHz PCLK */ 2775/* PCLK == 8.0539 gives baud == 9680.1 */ 2776L(scc_initable_atari): 2777 .byte 4,0x44 /* x16, 1 stopbit, no parity */ 2778 .byte 3,0xc0 /* receiver: 8 bpc */ 2779 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */ 2780 .byte 10,0 /* NRZ */ 2781 .byte 11,0x50 /* use baud rate generator */ 2782 .byte 12,24,13,0 /* 9600 baud */ 2783 .byte 14,2,14,3 /* use master clock for BRG, enable */ 2784 .byte 3,0xc1 /* enable receiver */ 2785 .byte 5,0xea /* enable transmitter */ 2786 .byte -1 2787 .even 2788#endif 2789 2790#ifdef USE_PRINTER 2791 2792LPSG_SELECT = 0xff8800 2793LPSG_READ = 0xff8800 2794LPSG_WRITE = 0xff8802 2795LPSG_IO_A = 14 2796LPSG_IO_B = 15 2797LPSG_CONTROL = 7 2798LSTMFP_GPIP = 0xfffa01 2799LSTMFP_DDR = 0xfffa05 2800LSTMFP_IERB = 0xfffa09 2801 2802#elif defined(USE_SCC_B) 2803 2804LSCC_CTRL = 0xff8c85 2805LSCC_DATA = 0xff8c87 2806 2807#elif defined(USE_SCC_A) 2808 2809LSCC_CTRL = 0xff8c81 2810LSCC_DATA = 0xff8c83 2811 2812#elif defined(USE_MFP) 2813 2814LMFP_UCR = 0xfffa29 2815LMFP_TDCDR = 0xfffa1d 2816LMFP_TDDR = 0xfffa25 2817LMFP_TSR = 0xfffa2d 2818LMFP_UDR = 0xfffa2f 2819 2820#endif 2821#endif /* CONFIG_ATARI */ 2822 2823/* 2824 * Serial port output support. 2825 */ 2826 2827/* 2828 * Initialize serial port hardware 2829 */ 2830func_start serial_init,%d0/%d1/%a0/%a1 2831 /* 2832 * Some of the register usage that follows 2833 * CONFIG_AMIGA 2834 * a0 = pointer to boot info record 2835 * d0 = boot info offset 2836 * CONFIG_ATARI 2837 * a0 = address of SCC 2838 * a1 = Liobase address/address of scc_initable_atari 2839 * d0 = init data for serial port 2840 * CONFIG_MAC 2841 * a0 = address of SCC 2842 * a1 = address of scc_initable_mac 2843 * d0 = init data for serial port 2844 */ 2845 2846#ifdef CONFIG_AMIGA 2847#define SERIAL_DTR 7 2848#define SERIAL_CNTRL CIABBASE+C_PRA 2849 2850 is_not_amiga(1f) 2851 lea %pc@(L(custom)),%a0 2852 movel #-ZTWOBASE,%a0@ 2853 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE 2854 get_bi_record BI_AMIGA_SERPER 2855 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE 2856| movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE 28571: 2858#endif 2859 2860#ifdef CONFIG_ATARI 2861 is_not_atari(4f) 2862 movel %pc@(L(iobase)),%a1 2863#if defined(USE_PRINTER) 2864 bclr #0,%a1@(LSTMFP_IERB) 2865 bclr #0,%a1@(LSTMFP_DDR) 2866 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT) 2867 moveb #0xff,%a1@(LPSG_WRITE) 2868 moveb #LPSG_IO_B,%a1@(LPSG_SELECT) 2869 clrb %a1@(LPSG_WRITE) 2870 moveb #LPSG_IO_A,%a1@(LPSG_SELECT) 2871 moveb %a1@(LPSG_READ),%d0 2872 bset #5,%d0 2873 moveb %d0,%a1@(LPSG_WRITE) 2874#elif defined(USE_SCC_A) || defined(USE_SCC_B) 2875 lea %a1@(LSCC_CTRL),%a0 2876 /* Reset SCC register pointer */ 2877 moveb %a0@,%d0 2878 /* Reset SCC device: write register pointer then register value */ 2879 moveb #9,%a0@ 2880 moveb #0xc0,%a0@ 2881 /* Wait for 5 PCLK cycles, which is about 63 CPU cycles */ 2882 /* 5 / 7.9872 MHz = approx. 0.63 us = 63 / 100 MHz */ 2883 movel #32,%d0 28842: 2885 subq #1,%d0 2886 jne 2b 2887 /* Initialize channel */ 2888 lea %pc@(L(scc_initable_atari)),%a1 28892: moveb %a1@+,%d0 2890 jmi 3f 2891 moveb %d0,%a0@ 2892 moveb %a1@+,%a0@ 2893 jra 2b 28943: clrb %a0@ 2895#elif defined(USE_MFP) 2896 bclr #1,%a1@(LMFP_TSR) 2897 moveb #0x88,%a1@(LMFP_UCR) 2898 andb #0x70,%a1@(LMFP_TDCDR) 2899 moveb #2,%a1@(LMFP_TDDR) 2900 orb #1,%a1@(LMFP_TDCDR) 2901 bset #1,%a1@(LMFP_TSR) 2902#endif 2903 jra L(serial_init_done) 29044: 2905#endif 2906 2907#ifdef CONFIG_MAC 2908 is_not_mac(L(serial_init_not_mac)) 2909#if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B) 2910#define mac_scc_cha_b_ctrl_offset 0x0 2911#define mac_scc_cha_a_ctrl_offset 0x2 2912#define mac_scc_cha_b_data_offset 0x4 2913#define mac_scc_cha_a_data_offset 0x6 2914 movel %pc@(L(mac_sccbase)),%a0 2915 /* Reset SCC register pointer */ 2916 moveb %a0@(mac_scc_cha_a_ctrl_offset),%d0 2917 /* Reset SCC device: write register pointer then register value */ 2918 moveb #9,%a0@(mac_scc_cha_a_ctrl_offset) 2919 moveb #0xc0,%a0@(mac_scc_cha_a_ctrl_offset) 2920 /* Wait for 5 PCLK cycles, which is about 68 CPU cycles */ 2921 /* 5 / 3.6864 MHz = approx. 1.36 us = 68 / 50 MHz */ 2922 movel #35,%d0 29235: 2924 subq #1,%d0 2925 jne 5b 2926#endif 2927#ifdef MAC_USE_SCC_A 2928 /* Initialize channel A */ 2929 lea %pc@(L(scc_initable_mac)),%a1 29305: moveb %a1@+,%d0 2931 jmi 6f 2932 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset) 2933 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset) 2934 jra 5b 29356: 2936#endif /* MAC_USE_SCC_A */ 2937#ifdef MAC_USE_SCC_B 2938 /* Initialize channel B */ 2939 lea %pc@(L(scc_initable_mac)),%a1 29407: moveb %a1@+,%d0 2941 jmi 8f 2942 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset) 2943 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset) 2944 jra 7b 29458: 2946#endif /* MAC_USE_SCC_B */ 2947 jra L(serial_init_done) 2948L(serial_init_not_mac): 2949#endif /* CONFIG_MAC */ 2950 2951#ifdef CONFIG_Q40 2952 is_not_q40(2f) 2953/* debug output goes into SRAM, so we don't do it unless requested 2954 - check for '%LX$' signature in SRAM */ 2955 lea %pc@(q40_mem_cptr),%a1 2956 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */ 2957 move.l #0xff020000,%a1 2958 cmp.b #'%',%a1@ 2959 bne 2f /*nodbg*/ 2960 addq.w #4,%a1 2961 cmp.b #'L',%a1@ 2962 bne 2f /*nodbg*/ 2963 addq.w #4,%a1 2964 cmp.b #'X',%a1@ 2965 bne 2f /*nodbg*/ 2966 addq.w #4,%a1 2967 cmp.b #'$',%a1@ 2968 bne 2f /*nodbg*/ 2969 /* signature OK */ 2970 lea %pc@(L(q40_do_debug)),%a1 2971 tas %a1@ 2972/*nodbg: q40_do_debug is 0 by default*/ 29732: 2974#endif 2975 2976#ifdef CONFIG_MVME16x 2977 is_not_mvme16x(L(serial_init_not_mvme16x)) 2978 moveb #0x10,M167_PCSCCMICR 2979 moveb #0x10,M167_PCSCCTICR 2980 moveb #0x10,M167_PCSCCRICR 2981 jra L(serial_init_done) 2982L(serial_init_not_mvme16x): 2983#endif 2984 2985#ifdef CONFIG_APOLLO 2986/* We count on the PROM initializing SIO1 */ 2987#endif 2988 2989#ifdef CONFIG_HP300 2990/* We count on the boot loader initialising the UART */ 2991#endif 2992 2993L(serial_init_done): 2994func_return serial_init 2995 2996/* 2997 * Output character on serial port. 2998 */ 2999func_start serial_putc,%d0/%d1/%a0/%a1 3000 3001 movel ARG1,%d0 3002 cmpib #'\n',%d0 3003 jbne 1f 3004 3005 /* A little safe recursion is good for the soul */ 3006 serial_putc #'\r' 30071: 3008 3009#ifdef CONFIG_AMIGA 3010 is_not_amiga(2f) 3011 andw #0x00ff,%d0 3012 oriw #0x0100,%d0 3013 movel %pc@(L(custom)),%a0 3014 movew %d0,%a0@(CUSTOMBASE+C_SERDAT) 30151: movew %a0@(CUSTOMBASE+C_SERDATR),%d0 3016 andw #0x2000,%d0 3017 jeq 1b 3018 jra L(serial_putc_done) 30192: 3020#endif 3021 3022#ifdef CONFIG_MAC 3023 is_not_mac(5f) 3024#if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B) 3025 movel %pc@(L(mac_sccbase)),%a1 3026#endif 3027#ifdef MAC_USE_SCC_A 30283: btst #2,%a1@(mac_scc_cha_a_ctrl_offset) 3029 jeq 3b 3030 moveb %d0,%a1@(mac_scc_cha_a_data_offset) 3031#endif /* MAC_USE_SCC_A */ 3032#ifdef MAC_USE_SCC_B 30334: btst #2,%a1@(mac_scc_cha_b_ctrl_offset) 3034 jeq 4b 3035 moveb %d0,%a1@(mac_scc_cha_b_data_offset) 3036#endif /* MAC_USE_SCC_B */ 3037 jra L(serial_putc_done) 30385: 3039#endif /* CONFIG_MAC */ 3040 3041#ifdef CONFIG_ATARI 3042 is_not_atari(4f) 3043 movel %pc@(L(iobase)),%a1 3044#if defined(USE_PRINTER) 30453: btst #0,%a1@(LSTMFP_GPIP) 3046 jne 3b 3047 moveb #LPSG_IO_B,%a1@(LPSG_SELECT) 3048 moveb %d0,%a1@(LPSG_WRITE) 3049 moveb #LPSG_IO_A,%a1@(LPSG_SELECT) 3050 moveb %a1@(LPSG_READ),%d0 3051 bclr #5,%d0 3052 moveb %d0,%a1@(LPSG_WRITE) 3053 nop 3054 nop 3055 bset #5,%d0 3056 moveb %d0,%a1@(LPSG_WRITE) 3057#elif defined(USE_SCC_A) || defined(USE_SCC_B) 30583: btst #2,%a1@(LSCC_CTRL) 3059 jeq 3b 3060 moveb %d0,%a1@(LSCC_DATA) 3061#elif defined(USE_MFP) 30623: btst #7,%a1@(LMFP_TSR) 3063 jeq 3b 3064 moveb %d0,%a1@(LMFP_UDR) 3065#endif 3066 jra L(serial_putc_done) 30674: 3068#endif /* CONFIG_ATARI */ 3069 3070#ifdef CONFIG_MVME147 3071 is_not_mvme147(2f) 30721: btst #2,M147_SCC_CTRL_A 3073 jeq 1b 3074 moveb %d0,M147_SCC_DATA_A 3075 jbra L(serial_putc_done) 30762: 3077#endif 3078 3079#ifdef CONFIG_MVME16x 3080 is_not_mvme16x(2f) 3081 /* 3082 * If the loader gave us a board type then we can use that to 3083 * select an appropriate output routine; otherwise we just use 3084 * the Bug code. If we have to use the Bug that means the Bug 3085 * workspace has to be valid, which means the Bug has to use 3086 * the SRAM, which is non-standard. 3087 */ 3088 moveml %d0-%d7/%a2-%a6,%sp@- 3089 movel vme_brdtype,%d1 3090 jeq 1f | No tag - use the Bug 3091 cmpi #VME_TYPE_MVME162,%d1 3092 jeq 6f 3093 cmpi #VME_TYPE_MVME172,%d1 3094 jne 5f 3095 /* 162/172; it's an SCC */ 30966: btst #2,M162_SCC_CTRL_A 3097 nop 3098 nop 3099 nop 3100 jeq 6b 3101 moveb #8,M162_SCC_CTRL_A 3102 nop 3103 nop 3104 nop 3105 moveb %d0,M162_SCC_CTRL_A 3106 jra 3f 31075: 3108 /* 166/167/177; it's a CD2401 */ 3109 moveb #0,M167_CYCAR 3110 moveb M167_CYIER,%d2 3111 moveb #0x02,M167_CYIER 31127: 3113 btst #5,M167_PCSCCTICR 3114 jeq 7b 3115 moveb M167_PCTPIACKR,%d1 3116 moveb M167_CYLICR,%d1 3117 jeq 8f 3118 moveb #0x08,M167_CYTEOIR 3119 jra 7b 31208: 3121 moveb %d0,M167_CYTDR 3122 moveb #0,M167_CYTEOIR 3123 moveb %d2,M167_CYIER 3124 jra 3f 31251: 3126 moveb %d0,%sp@- 3127 trap #15 3128 .word 0x0020 /* TRAP 0x020 */ 31293: 3130 moveml %sp@+,%d0-%d7/%a2-%a6 3131 jbra L(serial_putc_done) 31322: 3133#endif /* CONFIG_MVME16x */ 3134 3135#ifdef CONFIG_BVME6000 3136 is_not_bvme6000(2f) 3137 /* 3138 * The BVME6000 machine has a serial port ... 3139 */ 31401: btst #2,BVME_SCC_CTRL_A 3141 jeq 1b 3142 moveb %d0,BVME_SCC_DATA_A 3143 jbra L(serial_putc_done) 31442: 3145#endif 3146 3147#ifdef CONFIG_SUN3X 3148 is_not_sun3x(2f) 3149 movel %d0,-(%sp) 3150 movel 0xFEFE0018,%a1 3151 jbsr (%a1) 3152 addq #4,%sp 3153 jbra L(serial_putc_done) 31542: 3155#endif 3156 3157#ifdef CONFIG_Q40 3158 is_not_q40(2f) 3159 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */ 3160 beq 2f 3161 lea %pc@(q40_mem_cptr),%a1 3162 move.l %a1@,%a0 3163 move.b %d0,%a0@ 3164 addq.l #4,%a0 3165 move.l %a0,%a1@ 3166 jbra L(serial_putc_done) 31672: 3168#endif 3169 3170#ifdef CONFIG_APOLLO 3171 is_not_apollo(2f) 3172 movl %pc@(L(iobase)),%a1 3173 moveb %d0,%a1@(LTHRB0) 31741: moveb %a1@(LSRB0),%d0 3175 andb #0x4,%d0 3176 beq 1b 3177 jbra L(serial_putc_done) 31782: 3179#endif 3180 3181#ifdef CONFIG_HP300 3182 is_not_hp300(3f) 3183 movl %pc@(L(iobase)),%a1 3184 addl %pc@(L(uartbase)),%a1 3185 movel %pc@(L(uart_scode)),%d1 /* Check the scode */ 3186 jmi 3f /* Unset? Exit */ 3187 cmpi #256,%d1 /* APCI scode? */ 3188 jeq 2f 31891: moveb %a1@(DCALSR),%d1 /* Output to DCA */ 3190 andb #0x20,%d1 3191 beq 1b 3192 moveb %d0,%a1@(DCADATA) 3193 jbra L(serial_putc_done) 31942: moveb %a1@(APCILSR),%d1 /* Output to APCI */ 3195 andb #0x20,%d1 3196 beq 2b 3197 moveb %d0,%a1@(APCIDATA) 3198 jbra L(serial_putc_done) 31993: 3200#endif 3201 3202#ifdef CONFIG_VIRT 3203 is_not_virt(1f) 3204 3205 movel L(virt_gf_tty_base),%a1 3206 movel %d0,%a1@(GF_PUT_CHAR) 32071: 3208#endif 3209 3210L(serial_putc_done): 3211func_return serial_putc 3212 3213/* 3214 * Output a string. 3215 */ 3216func_start puts,%d0/%a0 3217 3218 movel ARG1,%a0 3219 jra 2f 32201: 3221#ifdef CONSOLE_DEBUG 3222 console_putc %d0 3223#endif 3224#ifdef SERIAL_DEBUG 3225 serial_putc %d0 3226#endif 32272: moveb %a0@+,%d0 3228 jne 1b 3229 3230func_return puts 3231 3232/* 3233 * Output number in hex notation. 3234 */ 3235 3236func_start putn,%d0-%d2 3237 3238 putc ' ' 3239 3240 movel ARG1,%d0 3241 moveq #7,%d1 32421: roll #4,%d0 3243 move %d0,%d2 3244 andb #0x0f,%d2 3245 addb #'0',%d2 3246 cmpb #'9',%d2 3247 jls 2f 3248 addb #'A'-('9'+1),%d2 32492: 3250#ifdef CONSOLE_DEBUG 3251 console_putc %d2 3252#endif 3253#ifdef SERIAL_DEBUG 3254 serial_putc %d2 3255#endif 3256 dbra %d1,1b 3257 3258func_return putn 3259 3260#ifdef CONFIG_EARLY_PRINTK 3261/* 3262 * This routine takes its parameters on the stack. It then 3263 * turns around and calls the internal routines. This routine 3264 * is used by the boot console. 3265 * 3266 * The calling parameters are: 3267 * void debug_cons_nputs(const char *str, unsigned length) 3268 * 3269 * This routine does NOT understand variable arguments only 3270 * simple strings! 3271 */ 3272ENTRY(debug_cons_nputs) 3273 moveml %d0/%d1/%a0,%sp@- 3274 movew %sr,%sp@- 3275 ori #0x0700,%sr 3276 movel %sp@(18),%a0 /* fetch parameter */ 3277 movel %sp@(22),%d1 /* fetch parameter */ 3278 jra 2f 32791: 3280#ifdef CONSOLE_DEBUG 3281 console_putc %d0 3282#endif 3283#ifdef SERIAL_DEBUG 3284 serial_putc %d0 3285#endif 3286 subq #1,%d1 32872: jeq 3f 3288 moveb %a0@+,%d0 3289 jne 1b 32903: 3291 movew %sp@+,%sr 3292 moveml %sp@+,%d0/%d1/%a0 3293 rts 3294#endif /* CONFIG_EARLY_PRINTK */ 3295 3296#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO) 3297func_start set_leds,%d0/%a0 3298 movel ARG1,%d0 3299#ifdef CONFIG_HP300 3300 is_not_hp300(1f) 3301 movel %pc@(L(iobase)),%a0 3302 moveb %d0,%a0@(0x1ffff) 3303 jra 2f 3304#endif 33051: 3306#ifdef CONFIG_APOLLO 3307 movel %pc@(L(iobase)),%a0 3308 lsll #8,%d0 3309 eorw #0xff00,%d0 3310 moveb %d0,%a0@(LCPUCTRL) 3311#endif 33122: 3313func_return set_leds 3314#endif 3315 3316#ifdef CONSOLE_DEBUG 3317/* 3318 * For continuity, see the data alignment 3319 * to which this structure is tied. 3320 */ 3321#define Lconsole_struct_cur_column 0 3322#define Lconsole_struct_cur_row 4 3323#define Lconsole_struct_num_columns 8 3324#define Lconsole_struct_num_rows 12 3325#define Lconsole_struct_left_edge 16 3326 3327func_start console_init,%a0-%a4/%d0-%d7 3328 /* 3329 * Some of the register usage that follows 3330 * a0 = pointer to boot_info 3331 * a1 = pointer to screen 3332 * a2 = pointer to console_globals 3333 * d3 = pixel width of screen 3334 * d4 = pixel height of screen 3335 * (d3,d4) ~= (x,y) of a point just below 3336 * and to the right of the screen 3337 * NOT on the screen! 3338 * d5 = number of bytes per scan line 3339 * d6 = number of bytes on the entire screen 3340 */ 3341 3342 lea %pc@(L(console_globals)),%a2 3343 movel %pc@(L(mac_videobase)),%a1 3344 movel %pc@(L(mac_rowbytes)),%d5 3345 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */ 3346 movel %d3,%d4 3347 swap %d4 /* -> high byte */ 3348 andl #0xffff,%d3 /* d3 = screen width in pixels */ 3349 andl #0xffff,%d4 /* d4 = screen height in pixels */ 3350 3351 movel %d5,%d6 3352| subl #20,%d6 3353 mulul %d4,%d6 /* scan line bytes x num scan lines */ 3354 divul #8,%d6 /* we'll clear 8 bytes at a time */ 3355 moveq #-1,%d0 /* Mac_black */ 3356 subq #1,%d6 3357 3358L(console_clear_loop): 3359 movel %d0,%a1@+ 3360 movel %d0,%a1@+ 3361 dbra %d6,L(console_clear_loop) 3362 3363 /* Calculate font size */ 3364 3365#if defined(FONT_8x8) && defined(CONFIG_FONT_8x8) 3366 lea %pc@(font_vga_8x8),%a0 3367#elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16) 3368 lea %pc@(font_vga_8x16),%a0 3369#elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11) 3370 lea %pc@(font_vga_6x11),%a0 3371#elif defined(CONFIG_FONT_8x8) /* default */ 3372 lea %pc@(font_vga_8x8),%a0 3373#else /* no compiled-in font */ 3374 lea 0,%a0 3375#endif 3376 3377 /* 3378 * At this point we make a shift in register usage 3379 * a1 = address of console_font pointer 3380 */ 3381 lea %pc@(L(console_font)),%a1 3382 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */ 3383 tstl %a0 3384 jeq 1f 3385 lea %pc@(L(console_font_data)),%a4 3386 movel %a0@(FONT_DESC_DATA),%d0 3387 subl #L(console_font),%a1 3388 addl %a1,%d0 3389 movel %d0,%a4@ 3390 3391 /* 3392 * Calculate global maxs 3393 * Note - we can use either an 3394 * 8 x 16 or 8 x 8 character font 3395 * 6 x 11 also supported 3396 */ 3397 /* ASSERT: a0 = contents of Lconsole_font */ 3398 movel %d3,%d0 /* screen width in pixels */ 3399 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */ 3400 3401 movel %d4,%d1 /* screen height in pixels */ 3402 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */ 3403 3404 movel %d0,%a2@(Lconsole_struct_num_columns) 3405 movel %d1,%a2@(Lconsole_struct_num_rows) 3406 3407 /* 3408 * Clear the current row and column 3409 */ 3410 clrl %a2@(Lconsole_struct_cur_column) 3411 clrl %a2@(Lconsole_struct_cur_row) 3412 clrl %a2@(Lconsole_struct_left_edge) 3413 3414 /* 3415 * Initialization is complete 3416 */ 34171: 3418func_return console_init 3419 3420#ifdef CONFIG_LOGO 3421func_start console_put_penguin,%a0-%a1/%d0-%d7 3422 /* 3423 * Get 'that_penguin' onto the screen in the upper right corner 3424 * penguin is 64 x 74 pixels, align against right edge of screen 3425 */ 3426 lea %pc@(L(mac_dimensions)),%a0 3427 movel %a0@,%d0 3428 andil #0xffff,%d0 3429 subil #64,%d0 /* snug up against the right edge */ 3430 clrl %d1 /* start at the top */ 3431 movel #73,%d7 3432 lea %pc@(L(that_penguin)),%a1 3433L(console_penguin_row): 3434 movel #31,%d6 3435L(console_penguin_pixel_pair): 3436 moveb %a1@,%d2 3437 lsrb #4,%d2 3438 console_plot_pixel %d0,%d1,%d2 3439 addq #1,%d0 3440 moveb %a1@+,%d2 3441 console_plot_pixel %d0,%d1,%d2 3442 addq #1,%d0 3443 dbra %d6,L(console_penguin_pixel_pair) 3444 3445 subil #64,%d0 3446 addq #1,%d1 3447 dbra %d7,L(console_penguin_row) 3448 3449func_return console_put_penguin 3450 3451/* include penguin bitmap */ 3452L(that_penguin): 3453#include "../mac/mac_penguin.S" 3454#endif 3455 3456 /* 3457 * Calculate source and destination addresses 3458 * output a1 = dest 3459 * a2 = source 3460 */ 3461 3462func_start console_scroll,%a0-%a4/%d0-%d7 3463 lea %pc@(L(mac_videobase)),%a0 3464 movel %a0@,%a1 3465 movel %a1,%a2 3466 lea %pc@(L(mac_rowbytes)),%a0 3467 movel %a0@,%d5 3468 movel %pc@(L(console_font)),%a0 3469 tstl %a0 3470 jeq 1f 3471 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */ 3472 addal %d5,%a2 3473 3474 /* 3475 * Get dimensions 3476 */ 3477 lea %pc@(L(mac_dimensions)),%a0 3478 movel %a0@,%d3 3479 movel %d3,%d4 3480 swap %d4 3481 andl #0xffff,%d3 /* d3 = screen width in pixels */ 3482 andl #0xffff,%d4 /* d4 = screen height in pixels */ 3483 3484 /* 3485 * Calculate number of bytes to move 3486 */ 3487 lea %pc@(L(mac_rowbytes)),%a0 3488 movel %a0@,%d6 3489 movel %pc@(L(console_font)),%a0 3490 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */ 3491 mulul %d4,%d6 /* scan line bytes x num scan lines */ 3492 divul #32,%d6 /* we'll move 8 longs at a time */ 3493 subq #1,%d6 3494 3495L(console_scroll_loop): 3496 movel %a2@+,%a1@+ 3497 movel %a2@+,%a1@+ 3498 movel %a2@+,%a1@+ 3499 movel %a2@+,%a1@+ 3500 movel %a2@+,%a1@+ 3501 movel %a2@+,%a1@+ 3502 movel %a2@+,%a1@+ 3503 movel %a2@+,%a1@+ 3504 dbra %d6,L(console_scroll_loop) 3505 3506 lea %pc@(L(mac_rowbytes)),%a0 3507 movel %a0@,%d6 3508 movel %pc@(L(console_font)),%a0 3509 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */ 3510 divul #32,%d6 /* we'll move 8 words at a time */ 3511 subq #1,%d6 3512 3513 moveq #-1,%d0 3514L(console_scroll_clear_loop): 3515 movel %d0,%a1@+ 3516 movel %d0,%a1@+ 3517 movel %d0,%a1@+ 3518 movel %d0,%a1@+ 3519 movel %d0,%a1@+ 3520 movel %d0,%a1@+ 3521 movel %d0,%a1@+ 3522 movel %d0,%a1@+ 3523 dbra %d6,L(console_scroll_clear_loop) 3524 35251: 3526func_return console_scroll 3527 3528 3529func_start console_putc,%a0/%a1/%d0-%d7 3530 3531 is_not_mac(L(console_exit)) 3532 tstl %pc@(L(console_font)) 3533 jeq L(console_exit) 3534 3535 /* Output character in d7 on console. 3536 */ 3537 movel ARG1,%d7 3538 cmpib #'\n',%d7 3539 jbne 1f 3540 3541 /* A little safe recursion is good for the soul */ 3542 console_putc #'\r' 35431: 3544 lea %pc@(L(console_globals)),%a0 3545 3546 cmpib #10,%d7 3547 jne L(console_not_lf) 3548 movel %a0@(Lconsole_struct_cur_row),%d0 3549 addil #1,%d0 3550 movel %d0,%a0@(Lconsole_struct_cur_row) 3551 movel %a0@(Lconsole_struct_num_rows),%d1 3552 cmpl %d1,%d0 3553 jcs 1f 3554 subil #1,%d0 3555 movel %d0,%a0@(Lconsole_struct_cur_row) 3556 console_scroll 35571: 3558 jra L(console_exit) 3559 3560L(console_not_lf): 3561 cmpib #13,%d7 3562 jne L(console_not_cr) 3563 clrl %a0@(Lconsole_struct_cur_column) 3564 jra L(console_exit) 3565 3566L(console_not_cr): 3567 cmpib #1,%d7 3568 jne L(console_not_home) 3569 clrl %a0@(Lconsole_struct_cur_row) 3570 clrl %a0@(Lconsole_struct_cur_column) 3571 jra L(console_exit) 3572 3573/* 3574 * At this point we know that the %d7 character is going to be 3575 * rendered on the screen. Register usage is - 3576 * a0 = pointer to console globals 3577 * a1 = font data 3578 * d0 = cursor column 3579 * d1 = cursor row to draw the character 3580 * d7 = character number 3581 */ 3582L(console_not_home): 3583 movel %a0@(Lconsole_struct_cur_column),%d0 3584 addql #1,%a0@(Lconsole_struct_cur_column) 3585 movel %a0@(Lconsole_struct_num_columns),%d1 3586 cmpl %d1,%d0 3587 jcs 1f 3588 console_putc #'\n' /* recursion is OK! */ 35891: 3590 movel %a0@(Lconsole_struct_cur_row),%d1 3591 3592 /* 3593 * At this point we make a shift in register usage 3594 * a0 = address of pointer to font data (fbcon_font_desc) 3595 */ 3596 movel %pc@(L(console_font)),%a0 3597 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */ 3598 andl #0x000000ff,%d7 3599 /* ASSERT: a0 = contents of Lconsole_font */ 3600 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */ 3601 addl %d7,%a1 /* a1 = points to char image */ 3602 3603 /* 3604 * At this point we make a shift in register usage 3605 * d0 = pixel coordinate, x 3606 * d1 = pixel coordinate, y 3607 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen 3608 * d3 = font scan line data (8 pixels) 3609 * d6 = count down for the font's pixel width (8) 3610 * d7 = count down for the font's pixel count in height 3611 */ 3612 /* ASSERT: a0 = contents of Lconsole_font */ 3613 mulul %a0@(FONT_DESC_WIDTH),%d0 3614 mulul %a0@(FONT_DESC_HEIGHT),%d1 3615 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */ 3616 subq #1,%d7 3617L(console_read_char_scanline): 3618 moveb %a1@+,%d3 3619 3620 /* ASSERT: a0 = contents of Lconsole_font */ 3621 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */ 3622 subql #1,%d6 3623 3624L(console_do_font_scanline): 3625 lslb #1,%d3 3626 scsb %d2 /* convert 1 bit into a byte */ 3627 console_plot_pixel %d0,%d1,%d2 3628 addq #1,%d0 3629 dbra %d6,L(console_do_font_scanline) 3630 3631 /* ASSERT: a0 = contents of Lconsole_font */ 3632 subl %a0@(FONT_DESC_WIDTH),%d0 3633 addq #1,%d1 3634 dbra %d7,L(console_read_char_scanline) 3635 3636L(console_exit): 3637func_return console_putc 3638 3639 /* 3640 * Input: 3641 * d0 = x coordinate 3642 * d1 = y coordinate 3643 * d2 = (bit 0) 1/0 for white/black (!) 3644 * All registers are preserved 3645 */ 3646func_start console_plot_pixel,%a0-%a1/%d0-%d4 3647 3648 movel %pc@(L(mac_videobase)),%a1 3649 movel %pc@(L(mac_videodepth)),%d3 3650 movel ARG1,%d0 3651 movel ARG2,%d1 3652 mulul %pc@(L(mac_rowbytes)),%d1 3653 movel ARG3,%d2 3654 3655 /* 3656 * Register usage: 3657 * d0 = x coord becomes byte offset into frame buffer 3658 * d1 = y coord 3659 * d2 = black or white (0/1) 3660 * d3 = video depth 3661 * d4 = temp of x (d0) for many bit depths 3662 */ 3663L(test_1bit): 3664 cmpb #1,%d3 3665 jbne L(test_2bit) 3666 movel %d0,%d4 /* we need the low order 3 bits! */ 3667 divul #8,%d0 3668 addal %d0,%a1 3669 addal %d1,%a1 3670 andb #7,%d4 3671 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */ 3672 andb #1,%d2 3673 jbne L(white_1) 3674 bsetb %d4,%a1@ 3675 jbra L(console_plot_pixel_exit) 3676L(white_1): 3677 bclrb %d4,%a1@ 3678 jbra L(console_plot_pixel_exit) 3679 3680L(test_2bit): 3681 cmpb #2,%d3 3682 jbne L(test_4bit) 3683 movel %d0,%d4 /* we need the low order 2 bits! */ 3684 divul #4,%d0 3685 addal %d0,%a1 3686 addal %d1,%a1 3687 andb #3,%d4 3688 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */ 3689 lsll #1,%d4 /* ! */ 3690 andb #1,%d2 3691 jbne L(white_2) 3692 bsetb %d4,%a1@ 3693 addq #1,%d4 3694 bsetb %d4,%a1@ 3695 jbra L(console_plot_pixel_exit) 3696L(white_2): 3697 bclrb %d4,%a1@ 3698 addq #1,%d4 3699 bclrb %d4,%a1@ 3700 jbra L(console_plot_pixel_exit) 3701 3702L(test_4bit): 3703 cmpb #4,%d3 3704 jbne L(test_8bit) 3705 movel %d0,%d4 /* we need the low order bit! */ 3706 divul #2,%d0 3707 addal %d0,%a1 3708 addal %d1,%a1 3709 andb #1,%d4 3710 eorb #1,%d4 3711 lsll #2,%d4 /* ! */ 3712 andb #1,%d2 3713 jbne L(white_4) 3714 bsetb %d4,%a1@ 3715 addq #1,%d4 3716 bsetb %d4,%a1@ 3717 addq #1,%d4 3718 bsetb %d4,%a1@ 3719 addq #1,%d4 3720 bsetb %d4,%a1@ 3721 jbra L(console_plot_pixel_exit) 3722L(white_4): 3723 bclrb %d4,%a1@ 3724 addq #1,%d4 3725 bclrb %d4,%a1@ 3726 addq #1,%d4 3727 bclrb %d4,%a1@ 3728 addq #1,%d4 3729 bclrb %d4,%a1@ 3730 jbra L(console_plot_pixel_exit) 3731 3732L(test_8bit): 3733 cmpb #8,%d3 3734 jbne L(test_16bit) 3735 addal %d0,%a1 3736 addal %d1,%a1 3737 andb #1,%d2 3738 jbne L(white_8) 3739 moveb #0xff,%a1@ 3740 jbra L(console_plot_pixel_exit) 3741L(white_8): 3742 clrb %a1@ 3743 jbra L(console_plot_pixel_exit) 3744 3745L(test_16bit): 3746 cmpb #16,%d3 3747 jbne L(console_plot_pixel_exit) 3748 addal %d0,%a1 3749 addal %d0,%a1 3750 addal %d1,%a1 3751 andb #1,%d2 3752 jbne L(white_16) 3753 clrw %a1@ 3754 jbra L(console_plot_pixel_exit) 3755L(white_16): 3756 movew #0x0fff,%a1@ 3757 jbra L(console_plot_pixel_exit) 3758 3759L(console_plot_pixel_exit): 3760func_return console_plot_pixel 3761#endif /* CONSOLE_DEBUG */ 3762 3763 3764__INITDATA 3765 .align 4 3766 3767m68k_init_mapped_size: 3768 .long 0 3769 3770#if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \ 3771 defined(CONFIG_HP300) || defined(CONFIG_APOLLO) 3772L(custom): 3773L(iobase): 3774 .long 0 3775#endif 3776 3777#ifdef CONSOLE_DEBUG 3778L(console_globals): 3779 .long 0 /* cursor column */ 3780 .long 0 /* cursor row */ 3781 .long 0 /* max num columns */ 3782 .long 0 /* max num rows */ 3783 .long 0 /* left edge */ 3784L(console_font): 3785 .long 0 /* pointer to console font (struct font_desc) */ 3786L(console_font_data): 3787 .long 0 /* pointer to console font data */ 3788#endif /* CONSOLE_DEBUG */ 3789 3790#if defined(MMU_PRINT) 3791L(mmu_print_data): 3792 .long 0 /* valid flag */ 3793 .long 0 /* start logical */ 3794 .long 0 /* next logical */ 3795 .long 0 /* start physical */ 3796 .long 0 /* next physical */ 3797#endif /* MMU_PRINT */ 3798 3799L(cputype): 3800 .long 0 3801L(mmu_cached_pointer_tables): 3802 .long 0 3803L(mmu_num_pointer_tables): 3804 .long 0 3805L(phys_kernel_start): 3806 .long 0 3807L(kernel_end): 3808 .long 0 3809L(memory_start): 3810 .long 0 3811L(kernel_pgdir_ptr): 3812 .long 0 3813L(temp_mmap_mem): 3814 .long 0 3815 3816#if defined (CONFIG_MVME147) 3817M147_SCC_CTRL_A = 0xfffe3002 3818M147_SCC_DATA_A = 0xfffe3003 3819#endif 3820 3821#if defined (CONFIG_MVME16x) 3822M162_SCC_CTRL_A = 0xfff45005 3823M167_CYCAR = 0xfff450ee 3824M167_CYIER = 0xfff45011 3825M167_CYLICR = 0xfff45026 3826M167_CYTEOIR = 0xfff45085 3827M167_CYTDR = 0xfff450f8 3828M167_PCSCCMICR = 0xfff4201d 3829M167_PCSCCTICR = 0xfff4201e 3830M167_PCSCCRICR = 0xfff4201f 3831M167_PCTPIACKR = 0xfff42025 3832#endif 3833 3834#if defined (CONFIG_BVME6000) 3835BVME_SCC_CTRL_A = 0xffb0000b 3836BVME_SCC_DATA_A = 0xffb0000f 3837#endif 3838 3839#if defined(CONFIG_MAC) 3840L(mac_videobase): 3841 .long 0 3842L(mac_videodepth): 3843 .long 0 3844L(mac_dimensions): 3845 .long 0 3846L(mac_rowbytes): 3847 .long 0 3848L(mac_sccbase): 3849 .long 0 3850#endif /* CONFIG_MAC */ 3851 3852#if defined (CONFIG_APOLLO) 3853LSRB0 = 0x10412 3854LTHRB0 = 0x10416 3855LCPUCTRL = 0x10100 3856#endif 3857 3858#if defined(CONFIG_HP300) 3859DCADATA = 0x11 3860DCALSR = 0x1b 3861APCIDATA = 0x00 3862APCILSR = 0x14 3863L(uartbase): 3864 .long 0 3865L(uart_scode): 3866 .long -1 3867#endif 3868 3869__FINIT 3870 .data 3871 .align 4 3872 3873availmem: 3874 .long 0 3875m68k_pgtable_cachemode: 3876 .long 0 3877m68k_supervisor_cachemode: 3878 .long 0 3879#if defined(CONFIG_MVME16x) 3880mvme_bdid: 3881 .long 0,0,0,0,0,0,0,0 3882#endif 3883#if defined(CONFIG_Q40) 3884q40_mem_cptr: 3885 .long 0 3886L(q40_do_debug): 3887 .long 0 3888#endif 3889 3890#if defined(CONFIG_VIRT) 3891GF_PUT_CHAR = 0x00 3892L(virt_gf_tty_base): 3893 .long 0 3894#endif /* CONFIG_VIRT */ 3895