1 /* 2 * File: m54xxgpt.h 3 * Purpose: Register and bit definitions for the MCF54XX 4 * 5 * Notes: 6 * 7 */ 8 9 #ifndef m54xxgpt_h 10 #define m54xxgpt_h 11 12 /********************************************************************* 13 * 14 * General Purpose Timers (GPT) 15 * 16 *********************************************************************/ 17 18 /* Register read/write macros */ 19 #define MCF_GPT_GMS0 (MCF_MBAR + 0x000800) 20 #define MCF_GPT_GCIR0 (MCF_MBAR + 0x000804) 21 #define MCF_GPT_GPWM0 (MCF_MBAR + 0x000808) 22 #define MCF_GPT_GSR0 (MCF_MBAR + 0x00080C) 23 #define MCF_GPT_GMS1 (MCF_MBAR + 0x000810) 24 #define MCF_GPT_GCIR1 (MCF_MBAR + 0x000814) 25 #define MCF_GPT_GPWM1 (MCF_MBAR + 0x000818) 26 #define MCF_GPT_GSR1 (MCF_MBAR + 0x00081C) 27 #define MCF_GPT_GMS2 (MCF_MBAR + 0x000820) 28 #define MCF_GPT_GCIR2 (MCF_MBAR + 0x000824) 29 #define MCF_GPT_GPWM2 (MCF_MBAR + 0x000828) 30 #define MCF_GPT_GSR2 (MCF_MBAR + 0x00082C) 31 #define MCF_GPT_GMS3 (MCF_MBAR + 0x000830) 32 #define MCF_GPT_GCIR3 (MCF_MBAR + 0x000834) 33 #define MCF_GPT_GPWM3 (MCF_MBAR + 0x000838) 34 #define MCF_GPT_GSR3 (MCF_MBAR + 0x00083C) 35 #define MCF_GPT_GMS(x) (MCF_MBAR + 0x000800 + ((x) * 0x010)) 36 #define MCF_GPT_GCIR(x) (MCF_MBAR + 0x000804 + ((x) * 0x010)) 37 #define MCF_GPT_GPWM(x) (MCF_MBAR + 0x000808 + ((x) * 0x010)) 38 #define MCF_GPT_GSR(x) (MCF_MBAR + 0x00080C + ((x) * 0x010)) 39 40 /* Bit definitions and macros for MCF_GPT_GMS */ 41 #define MCF_GPT_GMS_TMS(x) (((x)&0x00000007)<<0) 42 #define MCF_GPT_GMS_GPIO(x) (((x)&0x00000003)<<4) 43 #define MCF_GPT_GMS_IEN (0x00000100) 44 #define MCF_GPT_GMS_OD (0x00000200) 45 #define MCF_GPT_GMS_SC (0x00000400) 46 #define MCF_GPT_GMS_CE (0x00001000) 47 #define MCF_GPT_GMS_WDEN (0x00008000) 48 #define MCF_GPT_GMS_ICT(x) (((x)&0x00000003)<<16) 49 #define MCF_GPT_GMS_OCT(x) (((x)&0x00000003)<<20) 50 #define MCF_GPT_GMS_OCPW(x) (((x)&0x000000FF)<<24) 51 #define MCF_GPT_GMS_OCT_FRCLOW (0x00000000) 52 #define MCF_GPT_GMS_OCT_PULSEHI (0x00100000) 53 #define MCF_GPT_GMS_OCT_PULSELO (0x00200000) 54 #define MCF_GPT_GMS_OCT_TOGGLE (0x00300000) 55 #define MCF_GPT_GMS_ICT_ANY (0x00000000) 56 #define MCF_GPT_GMS_ICT_RISE (0x00010000) 57 #define MCF_GPT_GMS_ICT_FALL (0x00020000) 58 #define MCF_GPT_GMS_ICT_PULSE (0x00030000) 59 #define MCF_GPT_GMS_GPIO_INPUT (0x00000000) 60 #define MCF_GPT_GMS_GPIO_OUTLO (0x00000020) 61 #define MCF_GPT_GMS_GPIO_OUTHI (0x00000030) 62 #define MCF_GPT_GMS_GPIO_MASK (0x00000030) 63 #define MCF_GPT_GMS_TMS_DISABLE (0x00000000) 64 #define MCF_GPT_GMS_TMS_INCAPT (0x00000001) 65 #define MCF_GPT_GMS_TMS_OUTCAPT (0x00000002) 66 #define MCF_GPT_GMS_TMS_PWM (0x00000003) 67 #define MCF_GPT_GMS_TMS_GPIO (0x00000004) 68 #define MCF_GPT_GMS_TMS_MASK (0x00000007) 69 70 /* Bit definitions and macros for MCF_GPT_GCIR */ 71 #define MCF_GPT_GCIR_CNT(x) (((x)&0x0000FFFF)<<0) 72 #define MCF_GPT_GCIR_PRE(x) (((x)&0x0000FFFF)<<16) 73 74 /* Bit definitions and macros for MCF_GPT_GPWM */ 75 #define MCF_GPT_GPWM_LOAD (0x00000001) 76 #define MCF_GPT_GPWM_PWMOP (0x00000100) 77 #define MCF_GPT_GPWM_WIDTH(x) (((x)&0x0000FFFF)<<16) 78 79 /* Bit definitions and macros for MCF_GPT_GSR */ 80 #define MCF_GPT_GSR_CAPT (0x00000001) 81 #define MCF_GPT_GSR_COMP (0x00000002) 82 #define MCF_GPT_GSR_PWMP (0x00000004) 83 #define MCF_GPT_GSR_TEXP (0x00000008) 84 #define MCF_GPT_GSR_PIN (0x00000100) 85 #define MCF_GPT_GSR_OVF(x) (((x)&0x00000007)<<12) 86 #define MCF_GPT_GSR_CAPTURE(x) (((x)&0x0000FFFF)<<16) 87 88 /********************************************************************/ 89 90 #endif /* m54xxgpt_h */ 91