xref: /linux/arch/m68k/include/asm/m54xxgpt.h (revision 5b2e6555ac3eb58a4e5eb5020471df08f0c42c01)
1*5b2e6555SGreg Ungerer /*
2*5b2e6555SGreg Ungerer  * File:	m54xxgpt.h
3*5b2e6555SGreg Ungerer  * Purpose:	Register and bit definitions for the MCF54XX
4*5b2e6555SGreg Ungerer  *
5*5b2e6555SGreg Ungerer  * Notes:
6*5b2e6555SGreg Ungerer  *
7*5b2e6555SGreg Ungerer  */
8*5b2e6555SGreg Ungerer 
9*5b2e6555SGreg Ungerer #ifndef m54xxgpt_h
10*5b2e6555SGreg Ungerer #define m54xxgpt_h
11*5b2e6555SGreg Ungerer 
12*5b2e6555SGreg Ungerer /*********************************************************************
13*5b2e6555SGreg Ungerer *
14*5b2e6555SGreg Ungerer * General Purpose Timers (GPT)
15*5b2e6555SGreg Ungerer *
16*5b2e6555SGreg Ungerer *********************************************************************/
17*5b2e6555SGreg Ungerer 
18*5b2e6555SGreg Ungerer /* Register read/write macros */
19*5b2e6555SGreg Ungerer #define MCF_GPT_GMS0       0x000800
20*5b2e6555SGreg Ungerer #define MCF_GPT_GCIR0      0x000804
21*5b2e6555SGreg Ungerer #define MCF_GPT_GPWM0      0x000808
22*5b2e6555SGreg Ungerer #define MCF_GPT_GSR0       0x00080C
23*5b2e6555SGreg Ungerer #define MCF_GPT_GMS1       0x000810
24*5b2e6555SGreg Ungerer #define MCF_GPT_GCIR1      0x000814
25*5b2e6555SGreg Ungerer #define MCF_GPT_GPWM1      0x000818
26*5b2e6555SGreg Ungerer #define MCF_GPT_GSR1       0x00081C
27*5b2e6555SGreg Ungerer #define MCF_GPT_GMS2       0x000820
28*5b2e6555SGreg Ungerer #define MCF_GPT_GCIR2      0x000824
29*5b2e6555SGreg Ungerer #define MCF_GPT_GPWM2      0x000828
30*5b2e6555SGreg Ungerer #define MCF_GPT_GSR2       0x00082C
31*5b2e6555SGreg Ungerer #define MCF_GPT_GMS3       0x000830
32*5b2e6555SGreg Ungerer #define MCF_GPT_GCIR3      0x000834
33*5b2e6555SGreg Ungerer #define MCF_GPT_GPWM3      0x000838
34*5b2e6555SGreg Ungerer #define MCF_GPT_GSR3       0x00083C
35*5b2e6555SGreg Ungerer #define MCF_GPT_GMS(x)     (0x000800+((x)*0x010))
36*5b2e6555SGreg Ungerer #define MCF_GPT_GCIR(x)    (0x000804+((x)*0x010))
37*5b2e6555SGreg Ungerer #define MCF_GPT_GPWM(x)    (0x000808+((x)*0x010))
38*5b2e6555SGreg Ungerer #define MCF_GPT_GSR(x)     (0x00080C+((x)*0x010))
39*5b2e6555SGreg Ungerer 
40*5b2e6555SGreg Ungerer /* Bit definitions and macros for MCF_GPT_GMS */
41*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_TMS(x)         (((x)&0x00000007)<<0)
42*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_GPIO(x)        (((x)&0x00000003)<<4)
43*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_IEN            (0x00000100)
44*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_OD             (0x00000200)
45*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_SC             (0x00000400)
46*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_CE             (0x00001000)
47*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_WDEN           (0x00008000)
48*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_ICT(x)         (((x)&0x00000003)<<16)
49*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_OCT(x)         (((x)&0x00000003)<<20)
50*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_OCPW(x)        (((x)&0x000000FF)<<24)
51*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_OCT_FRCLOW     (0x00000000)
52*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_OCT_PULSEHI    (0x00100000)
53*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_OCT_PULSELO    (0x00200000)
54*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_OCT_TOGGLE     (0x00300000)
55*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_ICT_ANY        (0x00000000)
56*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_ICT_RISE       (0x00010000)
57*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_ICT_FALL       (0x00020000)
58*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_ICT_PULSE      (0x00030000)
59*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_GPIO_INPUT     (0x00000000)
60*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_GPIO_OUTLO     (0x00000020)
61*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_GPIO_OUTHI     (0x00000030)
62*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_TMS_DISABLE    (0x00000000)
63*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_TMS_INCAPT     (0x00000001)
64*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_TMS_OUTCAPT    (0x00000002)
65*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_TMS_PWM        (0x00000003)
66*5b2e6555SGreg Ungerer #define MCF_GPT_GMS_TMS_GPIO       (0x00000004)
67*5b2e6555SGreg Ungerer 
68*5b2e6555SGreg Ungerer /* Bit definitions and macros for MCF_GPT_GCIR */
69*5b2e6555SGreg Ungerer #define MCF_GPT_GCIR_CNT(x)        (((x)&0x0000FFFF)<<0)
70*5b2e6555SGreg Ungerer #define MCF_GPT_GCIR_PRE(x)        (((x)&0x0000FFFF)<<16)
71*5b2e6555SGreg Ungerer 
72*5b2e6555SGreg Ungerer /* Bit definitions and macros for MCF_GPT_GPWM */
73*5b2e6555SGreg Ungerer #define MCF_GPT_GPWM_LOAD          (0x00000001)
74*5b2e6555SGreg Ungerer #define MCF_GPT_GPWM_PWMOP         (0x00000100)
75*5b2e6555SGreg Ungerer #define MCF_GPT_GPWM_WIDTH(x)      (((x)&0x0000FFFF)<<16)
76*5b2e6555SGreg Ungerer 
77*5b2e6555SGreg Ungerer /* Bit definitions and macros for MCF_GPT_GSR */
78*5b2e6555SGreg Ungerer #define MCF_GPT_GSR_CAPT           (0x00000001)
79*5b2e6555SGreg Ungerer #define MCF_GPT_GSR_COMP           (0x00000002)
80*5b2e6555SGreg Ungerer #define MCF_GPT_GSR_PWMP           (0x00000004)
81*5b2e6555SGreg Ungerer #define MCF_GPT_GSR_TEXP           (0x00000008)
82*5b2e6555SGreg Ungerer #define MCF_GPT_GSR_PIN            (0x00000100)
83*5b2e6555SGreg Ungerer #define MCF_GPT_GSR_OVF(x)         (((x)&0x00000007)<<12)
84*5b2e6555SGreg Ungerer #define MCF_GPT_GSR_CAPTURE(x)     (((x)&0x0000FFFF)<<16)
85*5b2e6555SGreg Ungerer 
86*5b2e6555SGreg Ungerer /********************************************************************/
87*5b2e6555SGreg Ungerer 
88*5b2e6555SGreg Ungerer #endif /* m54xxgpt_h */
89