1 #ifndef _M68K_BITOPS_H 2 #define _M68K_BITOPS_H 3 /* 4 * Copyright 1992, Linus Torvalds. 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file COPYING in the main directory of this archive 8 * for more details. 9 */ 10 11 #ifndef _LINUX_BITOPS_H 12 #error only <linux/bitops.h> can be included directly 13 #endif 14 15 #include <linux/compiler.h> 16 #include <asm/barrier.h> 17 18 /* 19 * Bit access functions vary across the ColdFire and 68k families. 20 * So we will break them out here, and then macro in the ones we want. 21 * 22 * ColdFire - supports standard bset/bclr/bchg with register operand only 23 * 68000 - supports standard bset/bclr/bchg with memory operand 24 * >= 68020 - also supports the bfset/bfclr/bfchg instructions 25 * 26 * Although it is possible to use only the bset/bclr/bchg with register 27 * operands on all platforms you end up with larger generated code. 28 * So we use the best form possible on a given platform. 29 */ 30 31 static inline void bset_reg_set_bit(int nr, volatile unsigned long *vaddr) 32 { 33 char *p = (char *)vaddr + (nr ^ 31) / 8; 34 35 __asm__ __volatile__ ("bset %1,(%0)" 36 : 37 : "a" (p), "di" (nr & 7) 38 : "memory"); 39 } 40 41 static inline void bset_mem_set_bit(int nr, volatile unsigned long *vaddr) 42 { 43 char *p = (char *)vaddr + (nr ^ 31) / 8; 44 45 __asm__ __volatile__ ("bset %1,%0" 46 : "+m" (*p) 47 : "di" (nr & 7)); 48 } 49 50 static inline void bfset_mem_set_bit(int nr, volatile unsigned long *vaddr) 51 { 52 __asm__ __volatile__ ("bfset %1{%0:#1}" 53 : 54 : "d" (nr ^ 31), "o" (*vaddr) 55 : "memory"); 56 } 57 58 #if defined(CONFIG_COLDFIRE) 59 #define set_bit(nr, vaddr) bset_reg_set_bit(nr, vaddr) 60 #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) 61 #define set_bit(nr, vaddr) bset_mem_set_bit(nr, vaddr) 62 #else 63 #define set_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ 64 bset_mem_set_bit(nr, vaddr) : \ 65 bfset_mem_set_bit(nr, vaddr)) 66 #endif 67 68 static __always_inline void 69 arch___set_bit(unsigned long nr, volatile unsigned long *addr) 70 { 71 set_bit(nr, addr); 72 } 73 74 static inline void bclr_reg_clear_bit(int nr, volatile unsigned long *vaddr) 75 { 76 char *p = (char *)vaddr + (nr ^ 31) / 8; 77 78 __asm__ __volatile__ ("bclr %1,(%0)" 79 : 80 : "a" (p), "di" (nr & 7) 81 : "memory"); 82 } 83 84 static inline void bclr_mem_clear_bit(int nr, volatile unsigned long *vaddr) 85 { 86 char *p = (char *)vaddr + (nr ^ 31) / 8; 87 88 __asm__ __volatile__ ("bclr %1,%0" 89 : "+m" (*p) 90 : "di" (nr & 7)); 91 } 92 93 static inline void bfclr_mem_clear_bit(int nr, volatile unsigned long *vaddr) 94 { 95 __asm__ __volatile__ ("bfclr %1{%0:#1}" 96 : 97 : "d" (nr ^ 31), "o" (*vaddr) 98 : "memory"); 99 } 100 101 #if defined(CONFIG_COLDFIRE) 102 #define clear_bit(nr, vaddr) bclr_reg_clear_bit(nr, vaddr) 103 #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) 104 #define clear_bit(nr, vaddr) bclr_mem_clear_bit(nr, vaddr) 105 #else 106 #define clear_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ 107 bclr_mem_clear_bit(nr, vaddr) : \ 108 bfclr_mem_clear_bit(nr, vaddr)) 109 #endif 110 111 static __always_inline void 112 arch___clear_bit(unsigned long nr, volatile unsigned long *addr) 113 { 114 clear_bit(nr, addr); 115 } 116 117 static inline void bchg_reg_change_bit(int nr, volatile unsigned long *vaddr) 118 { 119 char *p = (char *)vaddr + (nr ^ 31) / 8; 120 121 __asm__ __volatile__ ("bchg %1,(%0)" 122 : 123 : "a" (p), "di" (nr & 7) 124 : "memory"); 125 } 126 127 static inline void bchg_mem_change_bit(int nr, volatile unsigned long *vaddr) 128 { 129 char *p = (char *)vaddr + (nr ^ 31) / 8; 130 131 __asm__ __volatile__ ("bchg %1,%0" 132 : "+m" (*p) 133 : "di" (nr & 7)); 134 } 135 136 static inline void bfchg_mem_change_bit(int nr, volatile unsigned long *vaddr) 137 { 138 __asm__ __volatile__ ("bfchg %1{%0:#1}" 139 : 140 : "d" (nr ^ 31), "o" (*vaddr) 141 : "memory"); 142 } 143 144 #if defined(CONFIG_COLDFIRE) 145 #define change_bit(nr, vaddr) bchg_reg_change_bit(nr, vaddr) 146 #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) 147 #define change_bit(nr, vaddr) bchg_mem_change_bit(nr, vaddr) 148 #else 149 #define change_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ 150 bchg_mem_change_bit(nr, vaddr) : \ 151 bfchg_mem_change_bit(nr, vaddr)) 152 #endif 153 154 static __always_inline void 155 arch___change_bit(unsigned long nr, volatile unsigned long *addr) 156 { 157 change_bit(nr, addr); 158 } 159 160 #define arch_test_bit generic_test_bit 161 #define arch_test_bit_acquire generic_test_bit_acquire 162 163 static inline int bset_reg_test_and_set_bit(int nr, 164 volatile unsigned long *vaddr) 165 { 166 char *p = (char *)vaddr + (nr ^ 31) / 8; 167 char retval; 168 169 __asm__ __volatile__ ("bset %2,(%1); sne %0" 170 : "=d" (retval) 171 : "a" (p), "di" (nr & 7) 172 : "memory"); 173 return retval; 174 } 175 176 static inline int bset_mem_test_and_set_bit(int nr, 177 volatile unsigned long *vaddr) 178 { 179 char *p = (char *)vaddr + (nr ^ 31) / 8; 180 char retval; 181 182 __asm__ __volatile__ ("bset %2,%1; sne %0" 183 : "=d" (retval), "+m" (*p) 184 : "di" (nr & 7)); 185 return retval; 186 } 187 188 static inline int bfset_mem_test_and_set_bit(int nr, 189 volatile unsigned long *vaddr) 190 { 191 char retval; 192 193 __asm__ __volatile__ ("bfset %2{%1:#1}; sne %0" 194 : "=d" (retval) 195 : "d" (nr ^ 31), "o" (*vaddr) 196 : "memory"); 197 return retval; 198 } 199 200 #if defined(CONFIG_COLDFIRE) 201 #define test_and_set_bit(nr, vaddr) bset_reg_test_and_set_bit(nr, vaddr) 202 #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) 203 #define test_and_set_bit(nr, vaddr) bset_mem_test_and_set_bit(nr, vaddr) 204 #else 205 #define test_and_set_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ 206 bset_mem_test_and_set_bit(nr, vaddr) : \ 207 bfset_mem_test_and_set_bit(nr, vaddr)) 208 #endif 209 210 static __always_inline bool 211 arch___test_and_set_bit(unsigned long nr, volatile unsigned long *addr) 212 { 213 return test_and_set_bit(nr, addr); 214 } 215 216 static inline int bclr_reg_test_and_clear_bit(int nr, 217 volatile unsigned long *vaddr) 218 { 219 char *p = (char *)vaddr + (nr ^ 31) / 8; 220 char retval; 221 222 __asm__ __volatile__ ("bclr %2,(%1); sne %0" 223 : "=d" (retval) 224 : "a" (p), "di" (nr & 7) 225 : "memory"); 226 return retval; 227 } 228 229 static inline int bclr_mem_test_and_clear_bit(int nr, 230 volatile unsigned long *vaddr) 231 { 232 char *p = (char *)vaddr + (nr ^ 31) / 8; 233 char retval; 234 235 __asm__ __volatile__ ("bclr %2,%1; sne %0" 236 : "=d" (retval), "+m" (*p) 237 : "di" (nr & 7)); 238 return retval; 239 } 240 241 static inline int bfclr_mem_test_and_clear_bit(int nr, 242 volatile unsigned long *vaddr) 243 { 244 char retval; 245 246 __asm__ __volatile__ ("bfclr %2{%1:#1}; sne %0" 247 : "=d" (retval) 248 : "d" (nr ^ 31), "o" (*vaddr) 249 : "memory"); 250 return retval; 251 } 252 253 #if defined(CONFIG_COLDFIRE) 254 #define test_and_clear_bit(nr, vaddr) bclr_reg_test_and_clear_bit(nr, vaddr) 255 #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) 256 #define test_and_clear_bit(nr, vaddr) bclr_mem_test_and_clear_bit(nr, vaddr) 257 #else 258 #define test_and_clear_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ 259 bclr_mem_test_and_clear_bit(nr, vaddr) : \ 260 bfclr_mem_test_and_clear_bit(nr, vaddr)) 261 #endif 262 263 static __always_inline bool 264 arch___test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) 265 { 266 return test_and_clear_bit(nr, addr); 267 } 268 269 static inline int bchg_reg_test_and_change_bit(int nr, 270 volatile unsigned long *vaddr) 271 { 272 char *p = (char *)vaddr + (nr ^ 31) / 8; 273 char retval; 274 275 __asm__ __volatile__ ("bchg %2,(%1); sne %0" 276 : "=d" (retval) 277 : "a" (p), "di" (nr & 7) 278 : "memory"); 279 return retval; 280 } 281 282 static inline int bchg_mem_test_and_change_bit(int nr, 283 volatile unsigned long *vaddr) 284 { 285 char *p = (char *)vaddr + (nr ^ 31) / 8; 286 char retval; 287 288 __asm__ __volatile__ ("bchg %2,%1; sne %0" 289 : "=d" (retval), "+m" (*p) 290 : "di" (nr & 7)); 291 return retval; 292 } 293 294 static inline int bfchg_mem_test_and_change_bit(int nr, 295 volatile unsigned long *vaddr) 296 { 297 char retval; 298 299 __asm__ __volatile__ ("bfchg %2{%1:#1}; sne %0" 300 : "=d" (retval) 301 : "d" (nr ^ 31), "o" (*vaddr) 302 : "memory"); 303 return retval; 304 } 305 306 #if defined(CONFIG_COLDFIRE) 307 #define test_and_change_bit(nr, vaddr) bchg_reg_test_and_change_bit(nr, vaddr) 308 #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) 309 #define test_and_change_bit(nr, vaddr) bchg_mem_test_and_change_bit(nr, vaddr) 310 #else 311 #define test_and_change_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ 312 bchg_mem_test_and_change_bit(nr, vaddr) : \ 313 bfchg_mem_test_and_change_bit(nr, vaddr)) 314 #endif 315 316 static __always_inline bool 317 arch___test_and_change_bit(unsigned long nr, volatile unsigned long *addr) 318 { 319 return test_and_change_bit(nr, addr); 320 } 321 322 static inline bool xor_unlock_is_negative_byte(unsigned long mask, 323 volatile unsigned long *p) 324 { 325 #ifdef CONFIG_COLDFIRE 326 __asm__ __volatile__ ("eorl %1, %0" 327 : "+m" (*p) 328 : "d" (mask) 329 : "memory"); 330 return *p & (1 << 7); 331 #else 332 char result; 333 char *cp = (char *)p + 3; /* m68k is big-endian */ 334 335 __asm__ __volatile__ ("eor.b %1, %2; smi %0" 336 : "=d" (result) 337 : "di" (mask), "o" (*cp) 338 : "memory"); 339 return result; 340 #endif 341 } 342 343 /* 344 * The true 68020 and more advanced processors support the "bfffo" 345 * instruction for finding bits. ColdFire and simple 68000 parts 346 * (including CPU32) do not support this. They simply use the generic 347 * functions. 348 */ 349 #if defined(CONFIG_CPU_HAS_NO_BITFIELDS) 350 #include <asm-generic/bitops/ffz.h> 351 #else 352 353 static inline unsigned long find_first_zero_bit(const unsigned long *vaddr, 354 unsigned long size) 355 { 356 const unsigned long *p = vaddr; 357 unsigned long res = 32; 358 unsigned long words; 359 unsigned long num; 360 361 if (!size) 362 return 0; 363 364 words = (size + 31) >> 5; 365 while (!(num = ~*p++)) { 366 if (!--words) 367 goto out; 368 } 369 370 __asm__ __volatile__ ("bfffo %1{#0,#0},%0" 371 : "=d" (res) : "d" (num & -num)); 372 res ^= 31; 373 out: 374 res += ((long)p - (long)vaddr - 4) * 8; 375 return res < size ? res : size; 376 } 377 #define find_first_zero_bit find_first_zero_bit 378 379 static inline unsigned long find_next_zero_bit(const unsigned long *vaddr, 380 unsigned long size, 381 unsigned long offset) 382 { 383 const unsigned long *p = vaddr + (offset >> 5); 384 int bit = offset & 31UL, res; 385 386 if (offset >= size) 387 return size; 388 389 if (bit) { 390 unsigned long num = ~*p++ & (~0UL << bit); 391 offset -= bit; 392 393 /* Look for zero in first longword */ 394 __asm__ __volatile__ ("bfffo %1{#0,#0},%0" 395 : "=d" (res) : "d" (num & -num)); 396 if (res < 32) { 397 offset += res ^ 31; 398 return offset < size ? offset : size; 399 } 400 offset += 32; 401 402 if (offset >= size) 403 return size; 404 } 405 /* No zero yet, search remaining full bytes for a zero */ 406 return offset + find_first_zero_bit(p, size - offset); 407 } 408 #define find_next_zero_bit find_next_zero_bit 409 410 static inline unsigned long find_first_bit(const unsigned long *vaddr, 411 unsigned long size) 412 { 413 const unsigned long *p = vaddr; 414 unsigned long res = 32; 415 unsigned long words; 416 unsigned long num; 417 418 if (!size) 419 return 0; 420 421 words = (size + 31) >> 5; 422 while (!(num = *p++)) { 423 if (!--words) 424 goto out; 425 } 426 427 __asm__ __volatile__ ("bfffo %1{#0,#0},%0" 428 : "=d" (res) : "d" (num & -num)); 429 res ^= 31; 430 out: 431 res += ((long)p - (long)vaddr - 4) * 8; 432 return res < size ? res : size; 433 } 434 #define find_first_bit find_first_bit 435 436 static inline unsigned long find_next_bit(const unsigned long *vaddr, 437 unsigned long size, 438 unsigned long offset) 439 { 440 const unsigned long *p = vaddr + (offset >> 5); 441 int bit = offset & 31UL, res; 442 443 if (offset >= size) 444 return size; 445 446 if (bit) { 447 unsigned long num = *p++ & (~0UL << bit); 448 offset -= bit; 449 450 /* Look for one in first longword */ 451 __asm__ __volatile__ ("bfffo %1{#0,#0},%0" 452 : "=d" (res) : "d" (num & -num)); 453 if (res < 32) { 454 offset += res ^ 31; 455 return offset < size ? offset : size; 456 } 457 offset += 32; 458 459 if (offset >= size) 460 return size; 461 } 462 /* No one yet, search remaining full bytes for a one */ 463 return offset + find_first_bit(p, size - offset); 464 } 465 #define find_next_bit find_next_bit 466 467 /* 468 * ffz = Find First Zero in word. Undefined if no zero exists, 469 * so code should check against ~0UL first.. 470 */ 471 static inline unsigned long __attribute_const__ ffz(unsigned long word) 472 { 473 int res; 474 475 __asm__ __volatile__ ("bfffo %1{#0,#0},%0" 476 : "=d" (res) : "d" (~word & -~word)); 477 return res ^ 31; 478 } 479 480 #endif 481 482 #ifdef __KERNEL__ 483 484 #if defined(CONFIG_CPU_HAS_NO_BITFIELDS) 485 486 /* 487 * The newer ColdFire family members support a "bitrev" instruction 488 * and we can use that to implement a fast ffs. Older Coldfire parts, 489 * and normal 68000 parts don't have anything special, so we use the 490 * generic functions for those. 491 */ 492 #if (defined(__mcfisaaplus__) || defined(__mcfisac__)) && \ 493 !defined(CONFIG_M68000) 494 static inline __attribute_const__ unsigned long __ffs(unsigned long x) 495 { 496 __asm__ __volatile__ ("bitrev %0; ff1 %0" 497 : "=d" (x) 498 : "0" (x)); 499 return x; 500 } 501 502 static inline __attribute_const__ int ffs(int x) 503 { 504 if (!x) 505 return 0; 506 return __ffs(x) + 1; 507 } 508 509 #else 510 #include <asm-generic/bitops/ffs.h> 511 #include <asm-generic/bitops/__ffs.h> 512 #endif 513 514 #include <asm-generic/bitops/fls.h> 515 #include <asm-generic/bitops/__fls.h> 516 517 #else 518 519 /* 520 * ffs: find first bit set. This is defined the same way as 521 * the libc and compiler builtin ffs routines, therefore 522 * differs in spirit from the above ffz (man ffs). 523 */ 524 static inline __attribute_const__ int ffs(int x) 525 { 526 int cnt; 527 528 __asm__ ("bfffo %1{#0:#0},%0" 529 : "=d" (cnt) 530 : "dm" (x & -x)); 531 return 32 - cnt; 532 } 533 534 static inline __attribute_const__ unsigned long __ffs(unsigned long x) 535 { 536 return ffs(x) - 1; 537 } 538 539 /* 540 * fls: find last bit set. 541 */ 542 static inline __attribute_const__ int fls(unsigned int x) 543 { 544 int cnt; 545 546 __asm__ ("bfffo %1{#0,#0},%0" 547 : "=d" (cnt) 548 : "dm" (x)); 549 return 32 - cnt; 550 } 551 552 static inline __attribute_const__ unsigned long __fls(unsigned long x) 553 { 554 return fls(x) - 1; 555 } 556 557 #endif 558 559 /* Simple test-and-set bit locks */ 560 #define test_and_set_bit_lock test_and_set_bit 561 #define clear_bit_unlock clear_bit 562 #define __clear_bit_unlock clear_bit_unlock 563 564 #include <asm-generic/bitops/non-instrumented-non-atomic.h> 565 #include <asm-generic/bitops/ext2-atomic.h> 566 #include <asm-generic/bitops/fls64.h> 567 #include <asm-generic/bitops/sched.h> 568 #include <asm-generic/bitops/hweight.h> 569 #include <asm-generic/bitops/le.h> 570 #endif /* __KERNEL__ */ 571 572 #endif /* _M68K_BITOPS_H */ 573