1*49148020SSam Ravnborg /* 2*49148020SSam Ravnborg ** asm-m68k/pcmcia.h -- Amiga Linux PCMCIA Definitions 3*49148020SSam Ravnborg ** 4*49148020SSam Ravnborg ** Copyright 1997 by Alain Malek 5*49148020SSam Ravnborg ** 6*49148020SSam Ravnborg ** This file is subject to the terms and conditions of the GNU General Public 7*49148020SSam Ravnborg ** License. See the file COPYING in the main directory of this archive 8*49148020SSam Ravnborg ** for more details. 9*49148020SSam Ravnborg ** 10*49148020SSam Ravnborg ** Created: 12/10/97 by Alain Malek 11*49148020SSam Ravnborg */ 12*49148020SSam Ravnborg 13*49148020SSam Ravnborg #ifndef __AMIGA_PCMCIA_H__ 14*49148020SSam Ravnborg #define __AMIGA_PCMCIA_H__ 15*49148020SSam Ravnborg 16*49148020SSam Ravnborg #include <asm/amigayle.h> 17*49148020SSam Ravnborg 18*49148020SSam Ravnborg /* prototypes */ 19*49148020SSam Ravnborg 20*49148020SSam Ravnborg void pcmcia_reset(void); 21*49148020SSam Ravnborg int pcmcia_copy_tuple(unsigned char tuple_id, void *tuple, int max_len); 22*49148020SSam Ravnborg void pcmcia_program_voltage(int voltage); 23*49148020SSam Ravnborg void pcmcia_access_speed(int speed); 24*49148020SSam Ravnborg void pcmcia_write_enable(void); 25*49148020SSam Ravnborg void pcmcia_write_disable(void); 26*49148020SSam Ravnborg pcmcia_read_status(void)27*49148020SSam Ravnborgstatic inline u_char pcmcia_read_status(void) 28*49148020SSam Ravnborg { 29*49148020SSam Ravnborg return (gayle.cardstatus & 0x7c); 30*49148020SSam Ravnborg } 31*49148020SSam Ravnborg pcmcia_get_intreq(void)32*49148020SSam Ravnborgstatic inline u_char pcmcia_get_intreq(void) 33*49148020SSam Ravnborg { 34*49148020SSam Ravnborg return (gayle.intreq); 35*49148020SSam Ravnborg } 36*49148020SSam Ravnborg pcmcia_ack_int(u_char intreq)37*49148020SSam Ravnborgstatic inline void pcmcia_ack_int(u_char intreq) 38*49148020SSam Ravnborg { 39*49148020SSam Ravnborg gayle.intreq = 0xf8; 40*49148020SSam Ravnborg } 41*49148020SSam Ravnborg pcmcia_enable_irq(void)42*49148020SSam Ravnborgstatic inline void pcmcia_enable_irq(void) 43*49148020SSam Ravnborg { 44*49148020SSam Ravnborg gayle.inten |= GAYLE_IRQ_IRQ; 45*49148020SSam Ravnborg } 46*49148020SSam Ravnborg pcmcia_disable_irq(void)47*49148020SSam Ravnborgstatic inline void pcmcia_disable_irq(void) 48*49148020SSam Ravnborg { 49*49148020SSam Ravnborg gayle.inten &= ~GAYLE_IRQ_IRQ; 50*49148020SSam Ravnborg } 51*49148020SSam Ravnborg 52*49148020SSam Ravnborg #define PCMCIA_INSERTED (gayle.cardstatus & GAYLE_CS_CCDET) 53*49148020SSam Ravnborg 54*49148020SSam Ravnborg /* valid voltages for pcmcia_ProgramVoltage */ 55*49148020SSam Ravnborg 56*49148020SSam Ravnborg #define PCMCIA_0V 0 57*49148020SSam Ravnborg #define PCMCIA_5V 5 58*49148020SSam Ravnborg #define PCMCIA_12V 12 59*49148020SSam Ravnborg 60*49148020SSam Ravnborg /* valid speeds for pcmcia_AccessSpeed */ 61*49148020SSam Ravnborg 62*49148020SSam Ravnborg #define PCMCIA_SPEED_100NS 100 63*49148020SSam Ravnborg #define PCMCIA_SPEED_150NS 150 64*49148020SSam Ravnborg #define PCMCIA_SPEED_250NS 250 65*49148020SSam Ravnborg #define PCMCIA_SPEED_720NS 720 66*49148020SSam Ravnborg 67*49148020SSam Ravnborg /* PCMCIA Tuple codes */ 68*49148020SSam Ravnborg 69*49148020SSam Ravnborg #define CISTPL_NULL 0x00 70*49148020SSam Ravnborg #define CISTPL_DEVICE 0x01 71*49148020SSam Ravnborg #define CISTPL_LONGLINK_CB 0x02 72*49148020SSam Ravnborg #define CISTPL_CONFIG_CB 0x04 73*49148020SSam Ravnborg #define CISTPL_CFTABLE_ENTRY_CB 0x05 74*49148020SSam Ravnborg #define CISTPL_LONGLINK_MFC 0x06 75*49148020SSam Ravnborg #define CISTPL_BAR 0x07 76*49148020SSam Ravnborg #define CISTPL_CHECKSUM 0x10 77*49148020SSam Ravnborg #define CISTPL_LONGLINK_A 0x11 78*49148020SSam Ravnborg #define CISTPL_LONGLINK_C 0x12 79*49148020SSam Ravnborg #define CISTPL_LINKTARGET 0x13 80*49148020SSam Ravnborg #define CISTPL_NO_LINK 0x14 81*49148020SSam Ravnborg #define CISTPL_VERS_1 0x15 82*49148020SSam Ravnborg #define CISTPL_ALTSTR 0x16 83*49148020SSam Ravnborg #define CISTPL_DEVICE_A 0x17 84*49148020SSam Ravnborg #define CISTPL_JEDEC_C 0x18 85*49148020SSam Ravnborg #define CISTPL_JEDEC_A 0x19 86*49148020SSam Ravnborg #define CISTPL_CONFIG 0x1a 87*49148020SSam Ravnborg #define CISTPL_CFTABLE_ENTRY 0x1b 88*49148020SSam Ravnborg #define CISTPL_DEVICE_OC 0x1c 89*49148020SSam Ravnborg #define CISTPL_DEVICE_OA 0x1d 90*49148020SSam Ravnborg #define CISTPL_DEVICE_GEO 0x1e 91*49148020SSam Ravnborg #define CISTPL_DEVICE_GEO_A 0x1f 92*49148020SSam Ravnborg #define CISTPL_MANFID 0x20 93*49148020SSam Ravnborg #define CISTPL_FUNCID 0x21 94*49148020SSam Ravnborg #define CISTPL_FUNCE 0x22 95*49148020SSam Ravnborg #define CISTPL_SWIL 0x23 96*49148020SSam Ravnborg #define CISTPL_END 0xff 97*49148020SSam Ravnborg 98*49148020SSam Ravnborg /* FUNCID */ 99*49148020SSam Ravnborg 100*49148020SSam Ravnborg #define CISTPL_FUNCID_MULTI 0x00 101*49148020SSam Ravnborg #define CISTPL_FUNCID_MEMORY 0x01 102*49148020SSam Ravnborg #define CISTPL_FUNCID_SERIAL 0x02 103*49148020SSam Ravnborg #define CISTPL_FUNCID_PARALLEL 0x03 104*49148020SSam Ravnborg #define CISTPL_FUNCID_FIXED 0x04 105*49148020SSam Ravnborg #define CISTPL_FUNCID_VIDEO 0x05 106*49148020SSam Ravnborg #define CISTPL_FUNCID_NETWORK 0x06 107*49148020SSam Ravnborg #define CISTPL_FUNCID_AIMS 0x07 108*49148020SSam Ravnborg #define CISTPL_FUNCID_SCSI 0x08 109*49148020SSam Ravnborg 110*49148020SSam Ravnborg #endif 111