xref: /linux/arch/m68k/fpsp040/sto_res.S (revision 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2)
1*1da177e4SLinus Torvalds|
2*1da177e4SLinus Torvalds|	sto_res.sa 3.1 12/10/90
3*1da177e4SLinus Torvalds|
4*1da177e4SLinus Torvalds|	Takes the result and puts it in where the user expects it.
5*1da177e4SLinus Torvalds|	Library functions return result in fp0.	If fp0 is not the
6*1da177e4SLinus Torvalds|	users destination register then fp0 is moved to the
7*1da177e4SLinus Torvalds|	correct floating-point destination register.  fp0 and fp1
8*1da177e4SLinus Torvalds|	are then restored to the original contents.
9*1da177e4SLinus Torvalds|
10*1da177e4SLinus Torvalds|	Input:	result in fp0,fp1
11*1da177e4SLinus Torvalds|
12*1da177e4SLinus Torvalds|		d2 & a0 should be kept unmodified
13*1da177e4SLinus Torvalds|
14*1da177e4SLinus Torvalds|	Output:	moves the result to the true destination reg or mem
15*1da177e4SLinus Torvalds|
16*1da177e4SLinus Torvalds|	Modifies: destination floating point register
17*1da177e4SLinus Torvalds|
18*1da177e4SLinus Torvalds
19*1da177e4SLinus Torvalds|		Copyright (C) Motorola, Inc. 1990
20*1da177e4SLinus Torvalds|			All Rights Reserved
21*1da177e4SLinus Torvalds|
22*1da177e4SLinus Torvalds|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
23*1da177e4SLinus Torvalds|	The copyright notice above does not evidence any
24*1da177e4SLinus Torvalds|	actual or intended publication of such source code.
25*1da177e4SLinus Torvalds
26*1da177e4SLinus TorvaldsSTO_RES:	|idnt	2,1 | Motorola 040 Floating Point Software Package
27*1da177e4SLinus Torvalds
28*1da177e4SLinus Torvalds
29*1da177e4SLinus Torvalds	|section	8
30*1da177e4SLinus Torvalds
31*1da177e4SLinus Torvalds#include "fpsp.h"
32*1da177e4SLinus Torvalds
33*1da177e4SLinus Torvalds	.global	sto_cos
34*1da177e4SLinus Torvaldssto_cos:
35*1da177e4SLinus Torvalds	bfextu		CMDREG1B(%a6){#13:#3},%d0	|extract cos destination
36*1da177e4SLinus Torvalds	cmpib		#3,%d0		|check for fp0/fp1 cases
37*1da177e4SLinus Torvalds	bles		c_fp0123
38*1da177e4SLinus Torvalds	fmovemx	%fp1-%fp1,-(%a7)
39*1da177e4SLinus Torvalds	moveql		#7,%d1
40*1da177e4SLinus Torvalds	subl		%d0,%d1		|d1 = 7- (dest. reg. no.)
41*1da177e4SLinus Torvalds	clrl		%d0
42*1da177e4SLinus Torvalds	bsetl		%d1,%d0		|d0 is dynamic register mask
43*1da177e4SLinus Torvalds	fmovemx	(%a7)+,%d0
44*1da177e4SLinus Torvalds	rts
45*1da177e4SLinus Torvaldsc_fp0123:
46*1da177e4SLinus Torvalds	cmpib		#0,%d0
47*1da177e4SLinus Torvalds	beqs		c_is_fp0
48*1da177e4SLinus Torvalds	cmpib		#1,%d0
49*1da177e4SLinus Torvalds	beqs		c_is_fp1
50*1da177e4SLinus Torvalds	cmpib		#2,%d0
51*1da177e4SLinus Torvalds	beqs		c_is_fp2
52*1da177e4SLinus Torvaldsc_is_fp3:
53*1da177e4SLinus Torvalds	fmovemx	%fp1-%fp1,USER_FP3(%a6)
54*1da177e4SLinus Torvalds	rts
55*1da177e4SLinus Torvaldsc_is_fp2:
56*1da177e4SLinus Torvalds	fmovemx	%fp1-%fp1,USER_FP2(%a6)
57*1da177e4SLinus Torvalds	rts
58*1da177e4SLinus Torvaldsc_is_fp1:
59*1da177e4SLinus Torvalds	fmovemx	%fp1-%fp1,USER_FP1(%a6)
60*1da177e4SLinus Torvalds	rts
61*1da177e4SLinus Torvaldsc_is_fp0:
62*1da177e4SLinus Torvalds	fmovemx	%fp1-%fp1,USER_FP0(%a6)
63*1da177e4SLinus Torvalds	rts
64*1da177e4SLinus Torvalds
65*1da177e4SLinus Torvalds
66*1da177e4SLinus Torvalds	.global	sto_res
67*1da177e4SLinus Torvaldssto_res:
68*1da177e4SLinus Torvalds	bfextu		CMDREG1B(%a6){#6:#3},%d0	|extract destination register
69*1da177e4SLinus Torvalds	cmpib		#3,%d0		|check for fp0/fp1 cases
70*1da177e4SLinus Torvalds	bles		fp0123
71*1da177e4SLinus Torvalds	fmovemx	%fp0-%fp0,-(%a7)
72*1da177e4SLinus Torvalds	moveql		#7,%d1
73*1da177e4SLinus Torvalds	subl		%d0,%d1		|d1 = 7- (dest. reg. no.)
74*1da177e4SLinus Torvalds	clrl		%d0
75*1da177e4SLinus Torvalds	bsetl		%d1,%d0		|d0 is dynamic register mask
76*1da177e4SLinus Torvalds	fmovemx	(%a7)+,%d0
77*1da177e4SLinus Torvalds	rts
78*1da177e4SLinus Torvaldsfp0123:
79*1da177e4SLinus Torvalds	cmpib		#0,%d0
80*1da177e4SLinus Torvalds	beqs		is_fp0
81*1da177e4SLinus Torvalds	cmpib		#1,%d0
82*1da177e4SLinus Torvalds	beqs		is_fp1
83*1da177e4SLinus Torvalds	cmpib		#2,%d0
84*1da177e4SLinus Torvalds	beqs		is_fp2
85*1da177e4SLinus Torvaldsis_fp3:
86*1da177e4SLinus Torvalds	fmovemx	%fp0-%fp0,USER_FP3(%a6)
87*1da177e4SLinus Torvalds	rts
88*1da177e4SLinus Torvaldsis_fp2:
89*1da177e4SLinus Torvalds	fmovemx	%fp0-%fp0,USER_FP2(%a6)
90*1da177e4SLinus Torvalds	rts
91*1da177e4SLinus Torvaldsis_fp1:
92*1da177e4SLinus Torvalds	fmovemx	%fp0-%fp0,USER_FP1(%a6)
93*1da177e4SLinus Torvalds	rts
94*1da177e4SLinus Torvaldsis_fp0:
95*1da177e4SLinus Torvalds	fmovemx	%fp0-%fp0,USER_FP0(%a6)
96*1da177e4SLinus Torvalds	rts
97*1da177e4SLinus Torvalds
98*1da177e4SLinus Torvalds	|end
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