xref: /linux/arch/m68k/coldfire/m54xx.c (revision f71160655d1efda10081482c486481f2108abca5)
1 /***************************************************************************/
2 
3 /*
4  *	m54xx.c  -- platform support for ColdFire 54xx based boards
5  *
6  *	Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
7  */
8 
9 /***************************************************************************/
10 
11 #include <linux/kernel.h>
12 #include <linux/param.h>
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/io.h>
16 #include <linux/mm.h>
17 #include <linux/clk.h>
18 #include <linux/bootmem.h>
19 #include <asm/pgalloc.h>
20 #include <asm/machdep.h>
21 #include <asm/coldfire.h>
22 #include <asm/m54xxsim.h>
23 #include <asm/mcfuart.h>
24 #include <asm/mcfclk.h>
25 #include <asm/m54xxgpt.h>
26 #ifdef CONFIG_MMU
27 #include <asm/mmu_context.h>
28 #endif
29 
30 /***************************************************************************/
31 
32 DEFINE_CLK(pll, "pll.0", MCF_CLK);
33 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
34 DEFINE_CLK(mcfslt0, "mcfslt.0", MCF_BUSCLK);
35 DEFINE_CLK(mcfslt1, "mcfslt.1", MCF_BUSCLK);
36 DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
37 DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
38 DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK);
39 DEFINE_CLK(mcfuart3, "mcfuart.3", MCF_BUSCLK);
40 
41 struct clk *mcf_clks[] = {
42 	&clk_pll,
43 	&clk_sys,
44 	&clk_mcfslt0,
45 	&clk_mcfslt1,
46 	&clk_mcfuart0,
47 	&clk_mcfuart1,
48 	&clk_mcfuart2,
49 	&clk_mcfuart3,
50 	NULL
51 };
52 
53 /***************************************************************************/
54 
55 static void __init m54xx_uarts_init(void)
56 {
57 	/* enable io pins */
58 	__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, MCFGPIO_PAR_PSC0);
59 	__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS,
60 		MCFGPIO_PAR_PSC1);
61 	__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS |
62 		MCF_PAR_PSC_CTS_CTS, MCFGPIO_PAR_PSC2);
63 	__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, MCFGPIO_PAR_PSC3);
64 }
65 
66 /***************************************************************************/
67 
68 static void mcf54xx_reset(void)
69 {
70 	/* disable interrupts and enable the watchdog */
71 	asm("movew #0x2700, %sr\n");
72 	__raw_writel(0, MCF_GPT_GMS0);
73 	__raw_writel(MCF_GPT_GCIR_CNT(1), MCF_GPT_GCIR0);
74 	__raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4),
75 		MCF_GPT_GMS0);
76 }
77 
78 /***************************************************************************/
79 
80 void __init config_BSP(char *commandp, int size)
81 {
82 #ifdef CONFIG_MMU
83 	cf_bootmem_alloc();
84 	mmu_context_init();
85 #endif
86 	mach_reset = mcf54xx_reset;
87 	mach_sched_init = hw_timer_init;
88 	m54xx_uarts_init();
89 }
90 
91 /***************************************************************************/
92