1*f86b9e03SGreg Ungerer /***************************************************************************/ 2*f86b9e03SGreg Ungerer 3*f86b9e03SGreg Ungerer /* 4*f86b9e03SGreg Ungerer * linux/arch/m68knommu/platform/5249/config.c 5*f86b9e03SGreg Ungerer * 6*f86b9e03SGreg Ungerer * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com) 7*f86b9e03SGreg Ungerer */ 8*f86b9e03SGreg Ungerer 9*f86b9e03SGreg Ungerer /***************************************************************************/ 10*f86b9e03SGreg Ungerer 11*f86b9e03SGreg Ungerer #include <linux/kernel.h> 12*f86b9e03SGreg Ungerer #include <linux/param.h> 13*f86b9e03SGreg Ungerer #include <linux/init.h> 14*f86b9e03SGreg Ungerer #include <linux/io.h> 15*f86b9e03SGreg Ungerer #include <linux/platform_device.h> 16*f86b9e03SGreg Ungerer #include <asm/machdep.h> 17*f86b9e03SGreg Ungerer #include <asm/coldfire.h> 18*f86b9e03SGreg Ungerer #include <asm/mcfsim.h> 19*f86b9e03SGreg Ungerer #include <asm/mcfclk.h> 20*f86b9e03SGreg Ungerer 21*f86b9e03SGreg Ungerer /***************************************************************************/ 22*f86b9e03SGreg Ungerer 23*f86b9e03SGreg Ungerer DEFINE_CLK(pll, "pll.0", MCF_CLK); 24*f86b9e03SGreg Ungerer DEFINE_CLK(sys, "sys.0", MCF_BUSCLK); 25*f86b9e03SGreg Ungerer DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK); 26*f86b9e03SGreg Ungerer DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK); 27*f86b9e03SGreg Ungerer DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); 28*f86b9e03SGreg Ungerer DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); 29*f86b9e03SGreg Ungerer DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); 30*f86b9e03SGreg Ungerer 31*f86b9e03SGreg Ungerer struct clk *mcf_clks[] = { 32*f86b9e03SGreg Ungerer &clk_pll, 33*f86b9e03SGreg Ungerer &clk_sys, 34*f86b9e03SGreg Ungerer &clk_mcftmr0, 35*f86b9e03SGreg Ungerer &clk_mcftmr1, 36*f86b9e03SGreg Ungerer &clk_mcfuart0, 37*f86b9e03SGreg Ungerer &clk_mcfuart1, 38*f86b9e03SGreg Ungerer &clk_mcfqspi0, 39*f86b9e03SGreg Ungerer NULL 40*f86b9e03SGreg Ungerer }; 41*f86b9e03SGreg Ungerer 42*f86b9e03SGreg Ungerer /***************************************************************************/ 43*f86b9e03SGreg Ungerer 44*f86b9e03SGreg Ungerer #ifdef CONFIG_M5249C3 45*f86b9e03SGreg Ungerer 46*f86b9e03SGreg Ungerer static struct resource m5249_smc91x_resources[] = { 47*f86b9e03SGreg Ungerer { 48*f86b9e03SGreg Ungerer .start = 0xe0000300, 49*f86b9e03SGreg Ungerer .end = 0xe0000300 + 0x100, 50*f86b9e03SGreg Ungerer .flags = IORESOURCE_MEM, 51*f86b9e03SGreg Ungerer }, 52*f86b9e03SGreg Ungerer { 53*f86b9e03SGreg Ungerer .start = MCF_IRQ_GPIO6, 54*f86b9e03SGreg Ungerer .end = MCF_IRQ_GPIO6, 55*f86b9e03SGreg Ungerer .flags = IORESOURCE_IRQ, 56*f86b9e03SGreg Ungerer }, 57*f86b9e03SGreg Ungerer }; 58*f86b9e03SGreg Ungerer 59*f86b9e03SGreg Ungerer static struct platform_device m5249_smc91x = { 60*f86b9e03SGreg Ungerer .name = "smc91x", 61*f86b9e03SGreg Ungerer .id = 0, 62*f86b9e03SGreg Ungerer .num_resources = ARRAY_SIZE(m5249_smc91x_resources), 63*f86b9e03SGreg Ungerer .resource = m5249_smc91x_resources, 64*f86b9e03SGreg Ungerer }; 65*f86b9e03SGreg Ungerer 66*f86b9e03SGreg Ungerer #endif /* CONFIG_M5249C3 */ 67*f86b9e03SGreg Ungerer 68*f86b9e03SGreg Ungerer static struct platform_device *m5249_devices[] __initdata = { 69*f86b9e03SGreg Ungerer #ifdef CONFIG_M5249C3 70*f86b9e03SGreg Ungerer &m5249_smc91x, 71*f86b9e03SGreg Ungerer #endif 72*f86b9e03SGreg Ungerer }; 73*f86b9e03SGreg Ungerer 74*f86b9e03SGreg Ungerer /***************************************************************************/ 75*f86b9e03SGreg Ungerer 76*f86b9e03SGreg Ungerer static void __init m5249_qspi_init(void) 77*f86b9e03SGreg Ungerer { 78*f86b9e03SGreg Ungerer #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) 79*f86b9e03SGreg Ungerer /* QSPI irq setup */ 80*f86b9e03SGreg Ungerer writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, 81*f86b9e03SGreg Ungerer MCFSIM_QSPIICR); 82*f86b9e03SGreg Ungerer mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); 83*f86b9e03SGreg Ungerer #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ 84*f86b9e03SGreg Ungerer } 85*f86b9e03SGreg Ungerer 86*f86b9e03SGreg Ungerer /***************************************************************************/ 87*f86b9e03SGreg Ungerer 88*f86b9e03SGreg Ungerer #ifdef CONFIG_M5249C3 89*f86b9e03SGreg Ungerer 90*f86b9e03SGreg Ungerer static void __init m5249_smc91x_init(void) 91*f86b9e03SGreg Ungerer { 92*f86b9e03SGreg Ungerer u32 gpio; 93*f86b9e03SGreg Ungerer 94*f86b9e03SGreg Ungerer /* Set the GPIO line as interrupt source for smc91x device */ 95*f86b9e03SGreg Ungerer gpio = readl(MCFSIM2_GPIOINTENABLE); 96*f86b9e03SGreg Ungerer writel(gpio | 0x40, MCFSIM2_GPIOINTENABLE); 97*f86b9e03SGreg Ungerer 98*f86b9e03SGreg Ungerer gpio = readl(MCFINTC2_INTPRI5); 99*f86b9e03SGreg Ungerer writel(gpio | 0x04000000, MCFINTC2_INTPRI5); 100*f86b9e03SGreg Ungerer } 101*f86b9e03SGreg Ungerer 102*f86b9e03SGreg Ungerer #endif /* CONFIG_M5249C3 */ 103*f86b9e03SGreg Ungerer 104*f86b9e03SGreg Ungerer /***************************************************************************/ 105*f86b9e03SGreg Ungerer 106*f86b9e03SGreg Ungerer void __init config_BSP(char *commandp, int size) 107*f86b9e03SGreg Ungerer { 108*f86b9e03SGreg Ungerer mach_sched_init = hw_timer_init; 109*f86b9e03SGreg Ungerer 110*f86b9e03SGreg Ungerer #ifdef CONFIG_M5249C3 111*f86b9e03SGreg Ungerer m5249_smc91x_init(); 112*f86b9e03SGreg Ungerer #endif 113*f86b9e03SGreg Ungerer m5249_qspi_init(); 114*f86b9e03SGreg Ungerer } 115*f86b9e03SGreg Ungerer 116*f86b9e03SGreg Ungerer /***************************************************************************/ 117*f86b9e03SGreg Ungerer 118*f86b9e03SGreg Ungerer static int __init init_BSP(void) 119*f86b9e03SGreg Ungerer { 120*f86b9e03SGreg Ungerer platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices)); 121*f86b9e03SGreg Ungerer return 0; 122*f86b9e03SGreg Ungerer } 123*f86b9e03SGreg Ungerer 124*f86b9e03SGreg Ungerer arch_initcall(init_BSP); 125*f86b9e03SGreg Ungerer 126*f86b9e03SGreg Ungerer /***************************************************************************/ 127