1*f86b9e03SGreg Ungerer /*
2*f86b9e03SGreg Ungerer * intc2.c -- support for the 2nd INTC controller of the 5249
3*f86b9e03SGreg Ungerer *
4*f86b9e03SGreg Ungerer * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
5*f86b9e03SGreg Ungerer *
6*f86b9e03SGreg Ungerer * This file is subject to the terms and conditions of the GNU General Public
7*f86b9e03SGreg Ungerer * License. See the file COPYING in the main directory of this archive
8*f86b9e03SGreg Ungerer * for more details.
9*f86b9e03SGreg Ungerer */
10*f86b9e03SGreg Ungerer
11*f86b9e03SGreg Ungerer #include <linux/types.h>
12*f86b9e03SGreg Ungerer #include <linux/init.h>
13*f86b9e03SGreg Ungerer #include <linux/kernel.h>
14*f86b9e03SGreg Ungerer #include <linux/interrupt.h>
15*f86b9e03SGreg Ungerer #include <linux/irq.h>
16*f86b9e03SGreg Ungerer #include <linux/io.h>
17*f86b9e03SGreg Ungerer #include <asm/coldfire.h>
18*f86b9e03SGreg Ungerer #include <asm/mcfsim.h>
19*f86b9e03SGreg Ungerer
intc2_irq_gpio_mask(struct irq_data * d)20*f86b9e03SGreg Ungerer static void intc2_irq_gpio_mask(struct irq_data *d)
21*f86b9e03SGreg Ungerer {
22*f86b9e03SGreg Ungerer u32 imr;
23*f86b9e03SGreg Ungerer imr = readl(MCFSIM2_GPIOINTENABLE);
24*f86b9e03SGreg Ungerer imr &= ~(0x1 << (d->irq - MCF_IRQ_GPIO0));
25*f86b9e03SGreg Ungerer writel(imr, MCFSIM2_GPIOINTENABLE);
26*f86b9e03SGreg Ungerer }
27*f86b9e03SGreg Ungerer
intc2_irq_gpio_unmask(struct irq_data * d)28*f86b9e03SGreg Ungerer static void intc2_irq_gpio_unmask(struct irq_data *d)
29*f86b9e03SGreg Ungerer {
30*f86b9e03SGreg Ungerer u32 imr;
31*f86b9e03SGreg Ungerer imr = readl(MCFSIM2_GPIOINTENABLE);
32*f86b9e03SGreg Ungerer imr |= (0x1 << (d->irq - MCF_IRQ_GPIO0));
33*f86b9e03SGreg Ungerer writel(imr, MCFSIM2_GPIOINTENABLE);
34*f86b9e03SGreg Ungerer }
35*f86b9e03SGreg Ungerer
intc2_irq_gpio_ack(struct irq_data * d)36*f86b9e03SGreg Ungerer static void intc2_irq_gpio_ack(struct irq_data *d)
37*f86b9e03SGreg Ungerer {
38*f86b9e03SGreg Ungerer writel(0x1 << (d->irq - MCF_IRQ_GPIO0), MCFSIM2_GPIOINTCLEAR);
39*f86b9e03SGreg Ungerer }
40*f86b9e03SGreg Ungerer
41*f86b9e03SGreg Ungerer static struct irq_chip intc2_irq_gpio_chip = {
42*f86b9e03SGreg Ungerer .name = "CF-INTC2",
43*f86b9e03SGreg Ungerer .irq_mask = intc2_irq_gpio_mask,
44*f86b9e03SGreg Ungerer .irq_unmask = intc2_irq_gpio_unmask,
45*f86b9e03SGreg Ungerer .irq_ack = intc2_irq_gpio_ack,
46*f86b9e03SGreg Ungerer };
47*f86b9e03SGreg Ungerer
mcf_intc2_init(void)48*f86b9e03SGreg Ungerer static int __init mcf_intc2_init(void)
49*f86b9e03SGreg Ungerer {
50*f86b9e03SGreg Ungerer int irq;
51*f86b9e03SGreg Ungerer
52*f86b9e03SGreg Ungerer /* GPIO interrupt sources */
53*f86b9e03SGreg Ungerer for (irq = MCF_IRQ_GPIO0; (irq <= MCF_IRQ_GPIO7); irq++) {
54*f86b9e03SGreg Ungerer irq_set_chip(irq, &intc2_irq_gpio_chip);
55*f86b9e03SGreg Ungerer irq_set_handler(irq, handle_edge_irq);
56*f86b9e03SGreg Ungerer }
57*f86b9e03SGreg Ungerer
58*f86b9e03SGreg Ungerer return 0;
59*f86b9e03SGreg Ungerer }
60*f86b9e03SGreg Ungerer
61*f86b9e03SGreg Ungerer arch_initcall(mcf_intc2_init);
62