xref: /linux/arch/m68k/coldfire/dma_timer.c (revision ca55b2fef3a9373fcfc30f82fd26bc7fccbda732)
1 /*
2  * dma_timer.c -- Freescale ColdFire DMA Timer.
3  *
4  * Copyright (C) 2007, Benedikt Spranger <b.spranger@linutronix.de>
5  * Copyright (C) 2008. Sebastian Siewior, Linutronix
6  *
7  */
8 
9 #include <linux/clocksource.h>
10 #include <linux/io.h>
11 
12 #include <asm/machdep.h>
13 #include <asm/coldfire.h>
14 #include <asm/mcfpit.h>
15 #include <asm/mcfsim.h>
16 
17 #define DMA_TIMER_0	(0x00)
18 #define DMA_TIMER_1	(0x40)
19 #define DMA_TIMER_2	(0x80)
20 #define DMA_TIMER_3	(0xc0)
21 
22 #define DTMR0	(MCF_IPSBAR + DMA_TIMER_0 + 0x400)
23 #define DTXMR0	(MCF_IPSBAR + DMA_TIMER_0 + 0x402)
24 #define DTER0	(MCF_IPSBAR + DMA_TIMER_0 + 0x403)
25 #define DTRR0	(MCF_IPSBAR + DMA_TIMER_0 + 0x404)
26 #define DTCR0	(MCF_IPSBAR + DMA_TIMER_0 + 0x408)
27 #define DTCN0	(MCF_IPSBAR + DMA_TIMER_0 + 0x40c)
28 
29 #define DMA_FREQ    ((MCF_CLK / 2) / 16)
30 
31 /* DTMR */
32 #define DMA_DTMR_RESTART	(1 << 3)
33 #define DMA_DTMR_CLK_DIV_1	(1 << 1)
34 #define DMA_DTMR_CLK_DIV_16	(2 << 1)
35 #define DMA_DTMR_ENABLE		(1 << 0)
36 
37 static cycle_t cf_dt_get_cycles(struct clocksource *cs)
38 {
39 	return __raw_readl(DTCN0);
40 }
41 
42 static struct clocksource clocksource_cf_dt = {
43 	.name		= "coldfire_dma_timer",
44 	.rating		= 200,
45 	.read		= cf_dt_get_cycles,
46 	.mask		= CLOCKSOURCE_MASK(32),
47 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
48 };
49 
50 static int __init  init_cf_dt_clocksource(void)
51 {
52 	/*
53 	 * We setup DMA timer 0 in free run mode. This incrementing counter is
54 	 * used as a highly precious clock source. With MCF_CLOCK = 150 MHz we
55 	 * get a ~213 ns resolution and the 32bit register will overflow almost
56 	 * every 15 minutes.
57 	 */
58 	__raw_writeb(0x00, DTXMR0);
59 	__raw_writeb(0x00, DTER0);
60 	__raw_writel(0x00000000, DTRR0);
61 	__raw_writew(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0);
62 	return clocksource_register_hz(&clocksource_cf_dt, DMA_FREQ);
63 }
64 
65 arch_initcall(init_cf_dt_clocksource);
66 
67 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
68 #define CYC2NS_SCALE	((1000000 << CYC2NS_SCALE_FACTOR) / (DMA_FREQ / 1000))
69 
70 static unsigned long long cycles2ns(unsigned long cycl)
71 {
72 	return (unsigned long long) ((unsigned long long)cycl *
73 			CYC2NS_SCALE) >> CYC2NS_SCALE_FACTOR;
74 }
75 
76 unsigned long long sched_clock(void)
77 {
78 	unsigned long cycl = __raw_readl(DTCN0);
79 
80 	return cycles2ns(cycl);
81 }
82