1comment "Processor Type" 2 3choice 4 prompt "CPU family support" 5 default M68KCLASSIC if MMU 6 default COLDFIRE if !MMU 7 help 8 The Freescale (was Motorola) M68K family of processors implements 9 the full 68000 processor instruction set. 10 The Freescale ColdFire family of processors is a modern derivative 11 of the 68000 processor family. They are mainly targeted at embedded 12 applications, and are all System-On-Chip (SOC) devices, as opposed 13 to stand alone CPUs. They implement a subset of the original 68000 14 processor instruction set. 15 If you anticipate running this kernel on a computer with a classic 16 MC68xxx processor, select M68KCLASSIC. 17 If you anticipate running this kernel on a computer with a ColdFire 18 processor, select COLDFIRE. 19 20config M68KCLASSIC 21 bool "Classic M68K CPU family support" 22 23config COLDFIRE 24 bool "Coldfire CPU family support" 25 select ARCH_REQUIRE_GPIOLIB 26 select ARCH_HAVE_CUSTOM_GPIO_H 27 select CPU_HAS_NO_BITFIELDS 28 select CPU_HAS_NO_MULDIV64 29 select GENERIC_CSUM 30 select HAVE_CLK 31 32endchoice 33 34if M68KCLASSIC 35 36config M68000 37 bool "MC68000" 38 depends on !MMU 39 select CPU_HAS_NO_BITFIELDS 40 select CPU_HAS_NO_MULDIV64 41 select CPU_HAS_NO_UNALIGNED 42 select GENERIC_CSUM 43 help 44 The Freescale (was Motorola) 68000 CPU is the first generation of 45 the well known M68K family of processors. The CPU core as well as 46 being available as a stand alone CPU was also used in many 47 System-On-Chip devices (eg 68328, 68302, etc). It does not contain 48 a paging MMU. 49 50config MCPU32 51 bool 52 select CPU_HAS_NO_BITFIELDS 53 select CPU_HAS_NO_UNALIGNED 54 help 55 The Freescale (was then Motorola) CPU32 is a CPU core that is 56 based on the 68020 processor. For the most part it is used in 57 System-On-Chip parts, and does not contain a paging MMU. 58 59config M68020 60 bool "68020 support" 61 depends on MMU 62 select CPU_HAS_ADDRESS_SPACES 63 help 64 If you anticipate running this kernel on a computer with a MC68020 65 processor, say Y. Otherwise, say N. Note that the 68020 requires a 66 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the 67 Sun 3, which provides its own version. 68 69config M68030 70 bool "68030 support" 71 depends on MMU && !MMU_SUN3 72 select CPU_HAS_ADDRESS_SPACES 73 help 74 If you anticipate running this kernel on a computer with a MC68030 75 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not 76 work, as it does not include an MMU (Memory Management Unit). 77 78config M68040 79 bool "68040 support" 80 depends on MMU && !MMU_SUN3 81 select CPU_HAS_ADDRESS_SPACES 82 help 83 If you anticipate running this kernel on a computer with a MC68LC040 84 or MC68040 processor, say Y. Otherwise, say N. Note that an 85 MC68EC040 will not work, as it does not include an MMU (Memory 86 Management Unit). 87 88config M68060 89 bool "68060 support" 90 depends on MMU && !MMU_SUN3 91 select CPU_HAS_ADDRESS_SPACES 92 help 93 If you anticipate running this kernel on a computer with a MC68060 94 processor, say Y. Otherwise, say N. 95 96config M68328 97 bool "MC68328" 98 depends on !MMU 99 select M68000 100 help 101 Motorola 68328 processor support. 102 103config M68EZ328 104 bool "MC68EZ328" 105 depends on !MMU 106 select M68000 107 help 108 Motorola 68EX328 processor support. 109 110config M68VZ328 111 bool "MC68VZ328" 112 depends on !MMU 113 select M68000 114 help 115 Motorola 68VZ328 processor support. 116 117config M68360 118 bool "MC68360" 119 depends on !MMU 120 select MCPU32 121 help 122 Motorola 68360 processor support. 123 124endif # M68KCLASSIC 125 126if COLDFIRE 127 128choice 129 prompt "ColdFire SoC type" 130 default M520x 131 help 132 Select the type of ColdFire System-on-Chip (SoC) that you want 133 to build for. 134 135config M5206 136 bool "MCF5206" 137 depends on !MMU 138 select COLDFIRE_SW_A7 139 select HAVE_MBAR 140 help 141 Motorola ColdFire 5206 processor support. 142 143config M5206e 144 bool "MCF5206e" 145 depends on !MMU 146 select COLDFIRE_SW_A7 147 select HAVE_MBAR 148 help 149 Motorola ColdFire 5206e processor support. 150 151config M520x 152 bool "MCF520x" 153 depends on !MMU 154 select GENERIC_CLOCKEVENTS 155 select HAVE_CACHE_SPLIT 156 help 157 Freescale Coldfire 5207/5208 processor support. 158 159config M523x 160 bool "MCF523x" 161 depends on !MMU 162 select GENERIC_CLOCKEVENTS 163 select HAVE_CACHE_SPLIT 164 select HAVE_IPSBAR 165 help 166 Freescale Coldfire 5230/1/2/4/5 processor support 167 168config M5249 169 bool "MCF5249" 170 depends on !MMU 171 select COLDFIRE_SW_A7 172 select HAVE_MBAR 173 help 174 Motorola ColdFire 5249 processor support. 175 176config M525x 177 bool "MCF525x" 178 depends on !MMU 179 select COLDFIRE_SW_A7 180 select HAVE_MBAR 181 help 182 Freescale (Motorola) Coldfire 5251/5253 processor support. 183 184config M5271 185 bool "MCF5271" 186 depends on !MMU 187 select M527x 188 select HAVE_CACHE_SPLIT 189 select HAVE_IPSBAR 190 select GENERIC_CLOCKEVENTS 191 help 192 Freescale (Motorola) ColdFire 5270/5271 processor support. 193 194config M5272 195 bool "MCF5272" 196 depends on !MMU 197 select COLDFIRE_SW_A7 198 select HAVE_MBAR 199 help 200 Motorola ColdFire 5272 processor support. 201 202config M5275 203 bool "MCF5275" 204 depends on !MMU 205 select M527x 206 select HAVE_CACHE_SPLIT 207 select HAVE_IPSBAR 208 select GENERIC_CLOCKEVENTS 209 help 210 Freescale (Motorola) ColdFire 5274/5275 processor support. 211 212config M528x 213 bool "MCF528x" 214 depends on !MMU 215 select GENERIC_CLOCKEVENTS 216 select HAVE_CACHE_SPLIT 217 select HAVE_IPSBAR 218 help 219 Motorola ColdFire 5280/5282 processor support. 220 221config M5307 222 bool "MCF5307" 223 depends on !MMU 224 select COLDFIRE_SW_A7 225 select HAVE_CACHE_CB 226 select HAVE_MBAR 227 help 228 Motorola ColdFire 5307 processor support. 229 230config M532x 231 bool "MCF532x" 232 depends on !MMU 233 select M53xx 234 select HAVE_CACHE_CB 235 help 236 Freescale (Motorola) ColdFire 532x processor support. 237 238config M537x 239 bool "MCF537x" 240 depends on !MMU 241 select M53xx 242 select HAVE_CACHE_CB 243 help 244 Freescale ColdFire 537x processor support. 245 246config M5407 247 bool "MCF5407" 248 depends on !MMU 249 select COLDFIRE_SW_A7 250 select HAVE_CACHE_CB 251 select HAVE_MBAR 252 help 253 Motorola ColdFire 5407 processor support. 254 255config M547x 256 bool "MCF547x" 257 select M54xx 258 select MMU_COLDFIRE if MMU 259 select HAVE_CACHE_CB 260 select HAVE_MBAR 261 help 262 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. 263 264config M548x 265 bool "MCF548x" 266 select MMU_COLDFIRE if MMU 267 select M54xx 268 select HAVE_CACHE_CB 269 select HAVE_MBAR 270 help 271 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. 272 273config M5441x 274 bool "MCF5441x" 275 depends on !MMU 276 select GENERIC_CLOCKEVENTS 277 select HAVE_CACHE_CB 278 help 279 Freescale Coldfire 54410/54415/54416/54417/54418 processor support. 280 281endchoice 282 283config M527x 284 bool 285 286config M53xx 287 bool 288 289config M54xx 290 bool 291 292endif # COLDFIRE 293 294 295comment "Processor Specific Options" 296 297config M68KFPU_EMU 298 bool "Math emulation support" 299 depends on MMU 300 help 301 At some point in the future, this will cause floating-point math 302 instructions to be emulated by the kernel on machines that lack a 303 floating-point math coprocessor. Thrill-seekers and chronically 304 sleep-deprived psychotic hacker types can say Y now, everyone else 305 should probably wait a while. 306 307config M68KFPU_EMU_EXTRAPREC 308 bool "Math emulation extra precision" 309 depends on M68KFPU_EMU 310 help 311 The fpu uses normally a few bit more during calculations for 312 correct rounding, the emulator can (often) do the same but this 313 extra calculation can cost quite some time, so you can disable 314 it here. The emulator will then "only" calculate with a 64 bit 315 mantissa and round slightly incorrect, what is more than enough 316 for normal usage. 317 318config M68KFPU_EMU_ONLY 319 bool "Math emulation only kernel" 320 depends on M68KFPU_EMU 321 help 322 This option prevents any floating-point instructions from being 323 compiled into the kernel, thereby the kernel doesn't save any 324 floating point context anymore during task switches, so this 325 kernel will only be usable on machines without a floating-point 326 math coprocessor. This makes the kernel a bit faster as no tests 327 needs to be executed whether a floating-point instruction in the 328 kernel should be executed or not. 329 330config ADVANCED 331 bool "Advanced configuration options" 332 depends on MMU 333 ---help--- 334 This gives you access to some advanced options for the CPU. The 335 defaults should be fine for most users, but these options may make 336 it possible for you to improve performance somewhat if you know what 337 you are doing. 338 339 Note that the answer to this question won't directly affect the 340 kernel: saying N will just cause the configurator to skip all 341 the questions about these options. 342 343 Most users should say N to this question. 344 345config RMW_INSNS 346 bool "Use read-modify-write instructions" 347 depends on ADVANCED 348 ---help--- 349 This allows to use certain instructions that work with indivisible 350 read-modify-write bus cycles. While this is faster than the 351 workaround of disabling interrupts, it can conflict with DMA 352 ( = direct memory access) on many Amiga systems, and it is also said 353 to destabilize other machines. It is very likely that this will 354 cause serious problems on any Amiga or Atari Medusa if set. The only 355 configuration where it should work are 68030-based Ataris, where it 356 apparently improves performance. But you've been warned! Unless you 357 really know what you are doing, say N. Try Y only if you're quite 358 adventurous. 359 360config SINGLE_MEMORY_CHUNK 361 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 362 depends on MMU 363 default y if SUN3 364 select NEED_MULTIPLE_NODES 365 help 366 Ignore all but the first contiguous chunk of physical memory for VM 367 purposes. This will save a few bytes kernel size and may speed up 368 some operations. Say N if not sure. 369 370config ARCH_DISCONTIGMEM_ENABLE 371 def_bool MMU && !SINGLE_MEMORY_CHUNK 372 373config 060_WRITETHROUGH 374 bool "Use write-through caching for 68060 supervisor accesses" 375 depends on ADVANCED && M68060 376 ---help--- 377 The 68060 generally uses copyback caching of recently accessed data. 378 Copyback caching means that memory writes will be held in an on-chip 379 cache and only written back to memory some time later. Saying Y 380 here will force supervisor (kernel) accesses to use writethrough 381 caching. Writethrough caching means that data is written to memory 382 straight away, so that cache and memory data always agree. 383 Writethrough caching is less efficient, but is needed for some 384 drivers on 68060 based systems where the 68060 bus snooping signal 385 is hardwired on. The 53c710 SCSI driver is known to suffer from 386 this problem. 387 388config M68K_L2_CACHE 389 bool 390 depends on MAC 391 default y 392 393config NODES_SHIFT 394 int 395 default "3" 396 depends on !SINGLE_MEMORY_CHUNK 397 398config CPU_HAS_NO_BITFIELDS 399 bool 400 401config CPU_HAS_NO_MULDIV64 402 bool 403 404config CPU_HAS_NO_UNALIGNED 405 bool 406 407config CPU_HAS_ADDRESS_SPACES 408 bool 409 410config FPU 411 bool 412 413config COLDFIRE_SW_A7 414 bool 415 416config HAVE_CACHE_SPLIT 417 bool 418 419config HAVE_CACHE_CB 420 bool 421 422config HAVE_MBAR 423 bool 424 425config HAVE_IPSBAR 426 bool 427 428config CLOCK_FREQ 429 int "Set the core clock frequency" 430 default "25000000" if M5206 431 default "54000000" if M5206e 432 default "166666666" if M520x 433 default "140000000" if M5249 434 default "150000000" if M527x || M523x 435 default "90000000" if M5307 436 default "50000000" if M5407 437 default "266000000" if M54xx 438 default "66666666" 439 depends on COLDFIRE 440 help 441 Define the CPU clock frequency in use. This is the core clock 442 frequency, it may or may not be the same as the external clock 443 crystal fitted to your board. Some processors have an internal 444 PLL and can have their frequency programmed at run time, others 445 use internal dividers. In general the kernel won't setup a PLL 446 if it is fitted (there are some exceptions). This value will be 447 specific to the exact CPU that you are using. 448 449config OLDMASK 450 bool "Old mask 5307 (1H55J) silicon" 451 depends on M5307 452 help 453 Build support for the older revision ColdFire 5307 silicon. 454 Specifically this is the 1H55J mask revision. 455 456if HAVE_CACHE_SPLIT 457choice 458 prompt "Split Cache Configuration" 459 default CACHE_I 460 461config CACHE_I 462 bool "Instruction" 463 help 464 Use all of the ColdFire CPU cache memory as an instruction cache. 465 466config CACHE_D 467 bool "Data" 468 help 469 Use all of the ColdFire CPU cache memory as a data cache. 470 471config CACHE_BOTH 472 bool "Both" 473 help 474 Split the ColdFire CPU cache, and use half as an instruction cache 475 and half as a data cache. 476endchoice 477endif 478 479if HAVE_CACHE_CB 480choice 481 prompt "Data cache mode" 482 default CACHE_WRITETHRU 483 484config CACHE_WRITETHRU 485 bool "Write-through" 486 help 487 The ColdFire CPU cache is set into Write-through mode. 488 489config CACHE_COPYBACK 490 bool "Copy-back" 491 help 492 The ColdFire CPU cache is set into Copy-back mode. 493endchoice 494endif 495 496