1# SPDX-License-Identifier: GPL-2.0 2comment "Processor Type" 3 4choice 5 prompt "CPU/machine family support" 6 default M68KCLASSIC if MMU 7 default COLDFIRE if !MMU 8 help 9 The Freescale (was Motorola) M68K family of processors implements 10 the full 68000 processor instruction set. 11 The Freescale ColdFire family of processors is a modern derivative 12 of the 68000 processor family. They are mainly targeted at embedded 13 applications, and are all System-On-Chip (SOC) devices, as opposed 14 to stand alone CPUs. They implement a subset of the original 68000 15 processor instruction set. 16 If you anticipate running this kernel on a computer with a classic 17 MC68xxx processor, select M68KCLASSIC. 18 If you anticipate running this kernel on a computer with a ColdFire 19 processor, select COLDFIRE. 20 21config M68KCLASSIC 22 bool "Classic M68K CPU/machine family support" 23 select HAVE_ARCH_PFN_VALID 24 select M68020 if MMU && !(M68030 || M68040 || M68060) 25 26config COLDFIRE 27 bool "Coldfire CPU family support" 28 select CPU_HAS_NO_BITFIELDS 29 select CPU_HAS_NO_CAS 30 select CPU_HAS_NO_MULDIV64 31 select GENERIC_CSUM 32 select GPIOLIB 33 select GPIOLIB_LEGACY if SPI_COLDFIRE_QSPI 34 select HAVE_LEGACY_CLK 35 select HAVE_PAGE_SIZE_8KB if !MMU 36 37config SUN3 38 bool "Sun3 machine support" 39 depends on MMU 40 select HAVE_ARCH_PFN_VALID 41 select LEGACY_TIMER_TICK 42 select NO_DMA 43 select M68020 44 help 45 This option enables support for the Sun 3 series of workstations 46 (3/50, 3/60, 3/1xx, 3/2xx systems). These use a classic 68020 CPU 47 but the custom memory management unit makes them incompatible with 48 all other classic m68k machines, including Sun 3x. 49 50endchoice 51 52config M68000 53 def_bool M68KCLASSIC && !MMU 54 select CPU_HAS_NO_BITFIELDS 55 select CPU_HAS_NO_CAS 56 select CPU_HAS_NO_MULDIV64 57 select CPU_HAS_NO_UNALIGNED 58 select GENERIC_CSUM 59 select CPU_NO_EFFICIENT_FFS 60 select HAVE_ARCH_HASH 61 select HAVE_PAGE_SIZE_4KB 62 select LEGACY_TIMER_TICK 63 help 64 The Freescale (was Motorola) 68000 CPU is the first generation of 65 the well known M68K family of processors. The CPU core as well as 66 being available as a stand alone CPU was also used in many 67 System-On-Chip devices (eg 68328, 68302, etc). It does not contain 68 a paging MMU. 69 70config M68020 71 bool "68020 support" if M68KCLASSIC 72 depends on MMU 73 select FPU 74 select CPU_HAS_ADDRESS_SPACES 75 help 76 If you anticipate running this kernel on a computer with a MC68020 77 processor, say Y. Otherwise, say N. Note that the 68020 requires a 78 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the 79 Sun 3, which provides its own version. 80 81if M68KCLASSIC && MMU 82 83config M68030 84 bool "68030 support" 85 select FPU 86 select CPU_HAS_ADDRESS_SPACES 87 help 88 If you anticipate running this kernel on a computer with a MC68030 89 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not 90 work, as it does not include an MMU (Memory Management Unit). 91 92config M68040 93 bool "68040 support" 94 select FPU 95 select CPU_HAS_ADDRESS_SPACES 96 help 97 If you anticipate running this kernel on a computer with a MC68LC040 98 or MC68040 processor, say Y. Otherwise, say N. Note that an 99 MC68EC040 will not work, as it does not include an MMU (Memory 100 Management Unit). 101 102config M68060 103 bool "68060 support" 104 select FPU 105 select CPU_HAS_ADDRESS_SPACES 106 help 107 If you anticipate running this kernel on a computer with a MC68060 108 processor, say Y. Otherwise, say N. 109 110endif # M68KCLASSIC 111 112config M68328 113 bool 114 depends on !MMU 115 select M68000 116 help 117 Motorola 68328 processor support. 118 119config M68EZ328 120 bool 121 depends on !MMU 122 select M68000 123 help 124 Motorola 68EX328 processor support. 125 126config M68VZ328 127 bool 128 depends on !MMU 129 select M68000 130 help 131 Motorola 68VZ328 processor support. 132 133if COLDFIRE 134 135choice 136 prompt "ColdFire SoC type" 137 default M520x 138 help 139 Select the type of ColdFire System-on-Chip (SoC) that you want 140 to build for. 141 142config M5206 143 bool "MCF5206" 144 depends on !MMU 145 select COLDFIRE_SW_A7 146 select COLDFIRE_TIMERS 147 select HAVE_MBAR 148 select CPU_NO_EFFICIENT_FFS 149 help 150 Motorola ColdFire 5206 processor support. 151 152config M5206e 153 bool "MCF5206e" 154 depends on !MMU 155 select COLDFIRE_SW_A7 156 select COLDFIRE_TIMERS 157 select HAVE_MBAR 158 select CPU_NO_EFFICIENT_FFS 159 help 160 Motorola ColdFire 5206e processor support. 161 162config M520x 163 bool "MCF520x" 164 depends on !MMU 165 select COLDFIRE_PIT_TIMER 166 select HAVE_CACHE_SPLIT 167 help 168 Freescale Coldfire 5207/5208 processor support. 169 170config M523x 171 bool "MCF523x" 172 depends on !MMU 173 select COLDFIRE_PIT_TIMER 174 select HAVE_CACHE_SPLIT 175 select HAVE_IPSBAR 176 help 177 Freescale Coldfire 5230/1/2/4/5 processor support 178 179config M5249 180 bool "MCF5249" 181 depends on !MMU 182 select COLDFIRE_SW_A7 183 select COLDFIRE_TIMERS 184 select HAVE_MBAR 185 select CPU_NO_EFFICIENT_FFS 186 help 187 Motorola ColdFire 5249 processor support. 188 189config M525x 190 bool "MCF525x" 191 depends on !MMU 192 select COLDFIRE_SW_A7 193 select COLDFIRE_TIMERS 194 select HAVE_MBAR 195 select CPU_NO_EFFICIENT_FFS 196 help 197 Freescale (Motorola) Coldfire 5251/5253 processor support. 198 199config M5271 200 bool "MCF5271" 201 depends on !MMU 202 select COLDFIRE_PIT_TIMER 203 select M527x 204 select HAVE_CACHE_SPLIT 205 select HAVE_IPSBAR 206 help 207 Freescale (Motorola) ColdFire 5270/5271 processor support. 208 209config M5272 210 bool "MCF5272" 211 depends on !MMU 212 select COLDFIRE_SW_A7 213 select COLDFIRE_TIMERS 214 select HAVE_MBAR 215 select CPU_NO_EFFICIENT_FFS 216 help 217 Motorola ColdFire 5272 processor support. 218 219config M5275 220 bool "MCF5275" 221 depends on !MMU 222 select COLDFIRE_PIT_TIMER 223 select M527x 224 select HAVE_CACHE_SPLIT 225 select HAVE_IPSBAR 226 help 227 Freescale (Motorola) ColdFire 5274/5275 processor support. 228 229config M528x 230 bool "MCF528x" 231 depends on !MMU 232 select COLDFIRE_PIT_TIMER 233 select HAVE_CACHE_SPLIT 234 select HAVE_IPSBAR 235 help 236 Motorola ColdFire 5280/5282 processor support. 237 238config M5307 239 bool "MCF5307" 240 depends on !MMU 241 select COLDFIRE_TIMERS 242 select COLDFIRE_SW_A7 243 select HAVE_CACHE_CB 244 select HAVE_MBAR 245 select CPU_NO_EFFICIENT_FFS 246 help 247 Motorola ColdFire 5307 processor support. 248 249config M532x 250 bool "MCF532x" 251 depends on !MMU 252 select COLDFIRE_TIMERS 253 select M53xx 254 select HAVE_CACHE_CB 255 help 256 Freescale (Motorola) ColdFire 532x processor support. 257 258config M537x 259 bool "MCF537x" 260 depends on !MMU 261 select COLDFIRE_TIMERS 262 select M53xx 263 select HAVE_CACHE_CB 264 help 265 Freescale ColdFire 537x processor support. 266 267config M5407 268 bool "MCF5407" 269 depends on !MMU 270 select COLDFIRE_SW_A7 271 select COLDFIRE_TIMERS 272 select HAVE_CACHE_CB 273 select HAVE_MBAR 274 select CPU_NO_EFFICIENT_FFS 275 help 276 Motorola ColdFire 5407 processor support. 277 278config M547x 279 bool "MCF547x" 280 select M54xx 281 select COLDFIRE_SLTIMERS 282 select MMU_COLDFIRE if MMU 283 select FPU if MMU 284 select HAVE_CACHE_CB 285 select HAVE_MBAR 286 select CPU_NO_EFFICIENT_FFS 287 help 288 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. 289 290config M548x 291 bool "MCF548x" 292 select COLDFIRE_SLTIMERS 293 select MMU_COLDFIRE if MMU 294 select FPU if MMU 295 select M54xx 296 select HAVE_CACHE_CB 297 select HAVE_MBAR 298 select CPU_NO_EFFICIENT_FFS 299 help 300 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. 301 302config M5441x 303 bool "MCF5441x" 304 select COLDFIRE_PIT_TIMER 305 select MMU_COLDFIRE if MMU 306 select HAVE_CACHE_CB 307 help 308 Freescale Coldfire 54410/54415/54416/54417/54418 processor support. 309 310endchoice 311 312config M527x 313 bool 314 315config M53xx 316 bool 317 318config M54xx 319 select HAVE_PCI 320 bool 321 322config COLDFIRE_PIT_TIMER 323 bool 324 325config COLDFIRE_TIMERS 326 bool 327 select LEGACY_TIMER_TICK 328 329config COLDFIRE_SLTIMERS 330 bool 331 select LEGACY_TIMER_TICK 332 333endif # COLDFIRE 334 335comment "Processor Specific Options" 336 337config M68KFPU_EMU 338 bool "Math emulation support" 339 depends on (M68KCLASSIC || SUN3) && FPU 340 help 341 At some point in the future, this will cause floating-point math 342 instructions to be emulated by the kernel on machines that lack a 343 floating-point math coprocessor. Thrill-seekers and chronically 344 sleep-deprived psychotic hacker types can say Y now, everyone else 345 should probably wait a while. 346 347config M68KFPU_EMU_EXTRAPREC 348 bool "Math emulation extra precision" 349 depends on M68KFPU_EMU 350 help 351 The fpu uses normally a few bit more during calculations for 352 correct rounding, the emulator can (often) do the same but this 353 extra calculation can cost quite some time, so you can disable 354 it here. The emulator will then "only" calculate with a 64 bit 355 mantissa and round slightly incorrect, what is more than enough 356 for normal usage. 357 358config M68KFPU_EMU_ONLY 359 bool "Math emulation only kernel" 360 depends on M68KFPU_EMU 361 help 362 This option prevents any floating-point instructions from being 363 compiled into the kernel, thereby the kernel doesn't save any 364 floating point context anymore during task switches, so this 365 kernel will only be usable on machines without a floating-point 366 math coprocessor. This makes the kernel a bit faster as no tests 367 needs to be executed whether a floating-point instruction in the 368 kernel should be executed or not. 369 370config ADVANCED 371 bool "Advanced configuration options" 372 depends on MMU 373 help 374 This gives you access to some advanced options for the CPU. The 375 defaults should be fine for most users, but these options may make 376 it possible for you to improve performance somewhat if you know what 377 you are doing. 378 379 Note that the answer to this question won't directly affect the 380 kernel: saying N will just cause the configurator to skip all 381 the questions about these options. 382 383 Most users should say N to this question. 384 385config RMW_INSNS 386 bool "Use read-modify-write instructions" 387 depends on ADVANCED && !CPU_HAS_NO_CAS 388 help 389 This allows to use certain instructions that work with indivisible 390 read-modify-write bus cycles. While this is faster than the 391 workaround of disabling interrupts, it can conflict with DMA 392 ( = direct memory access) on many Amiga systems, and it is also said 393 to destabilize other machines. It is very likely that this will 394 cause serious problems on any Amiga or Atari Medusa if set. The only 395 configuration where it should work are 68030-based Ataris, where it 396 apparently improves performance. But you've been warned! Unless you 397 really know what you are doing, say N. Try Y only if you're quite 398 adventurous. 399 400config SINGLE_MEMORY_CHUNK 401 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 402 depends on MMU 403 default y if SUN3 || MMU_COLDFIRE 404 help 405 Ignore all but the first contiguous chunk of physical memory for VM 406 purposes. This will save a few bytes kernel size and may speed up 407 some operations. 408 When this option os set to N, you may want to lower "Maximum zone 409 order" to save memory that could be wasted for unused memory map. 410 Say N if not sure. 411 412config ARCH_FORCE_MAX_ORDER 413 int "Order of maximal physically contiguous allocations" if ADVANCED 414 depends on !SINGLE_MEMORY_CHUNK 415 default "10" 416 help 417 The kernel page allocator limits the size of maximal physically 418 contiguous allocations. The limit is called MAX_PAGE_ORDER and it 419 defines the maximal power of two of number of pages that can be 420 allocated as a single contiguous block. This option allows 421 overriding the default setting when ability to allocate very 422 large blocks of physically contiguous memory is required. 423 424 For systems that have holes in their physical address space this 425 value also defines the minimal size of the hole that allows 426 freeing unused memory map. 427 428 Don't change if unsure. 429 430config 060_WRITETHROUGH 431 bool "Use write-through caching for 68060 supervisor accesses" 432 depends on ADVANCED && M68060 433 help 434 The 68060 generally uses copyback caching of recently accessed data. 435 Copyback caching means that memory writes will be held in an on-chip 436 cache and only written back to memory some time later. Saying Y 437 here will force supervisor (kernel) accesses to use writethrough 438 caching. Writethrough caching means that data is written to memory 439 straight away, so that cache and memory data always agree. 440 Writethrough caching is less efficient, but is needed for some 441 drivers on 68060 based systems where the 68060 bus snooping signal 442 is hardwired on. The 53c710 SCSI driver is known to suffer from 443 this problem. 444 445config M68K_L2_CACHE 446 bool 447 depends on MAC 448 default y 449 450config CPU_HAS_NO_BITFIELDS 451 bool 452 453config CPU_HAS_NO_CAS 454 bool 455 456config CPU_HAS_NO_MULDIV64 457 bool 458 459config CPU_HAS_NO_UNALIGNED 460 bool 461 462config CPU_HAS_ADDRESS_SPACES 463 bool 464 select ALTERNATE_USER_ADDRESS_SPACE 465 466config FPU 467 bool 468 469config COLDFIRE_SW_A7 470 bool 471 472config HAVE_CACHE_SPLIT 473 bool 474 475config HAVE_CACHE_CB 476 bool 477 478config HAVE_MBAR 479 bool 480 481config HAVE_IPSBAR 482 bool 483 484config CLOCK_FREQ 485 int "Set the core clock frequency" 486 default "25000000" if M5206 487 default "54000000" if M5206e 488 default "166666666" if M520x 489 default "140000000" if M5249 490 default "150000000" if M527x || M523x 491 default "90000000" if M5307 492 default "50000000" if M5407 493 default "266000000" if M54xx 494 default "66666666" 495 depends on COLDFIRE 496 help 497 Define the CPU clock frequency in use. This is the core clock 498 frequency, it may or may not be the same as the external clock 499 crystal fitted to your board. Some processors have an internal 500 PLL and can have their frequency programmed at run time, others 501 use internal dividers. In general the kernel won't setup a PLL 502 if it is fitted (there are some exceptions). This value will be 503 specific to the exact CPU that you are using. 504 505config OLDMASK 506 bool "Old mask 5307 (1H55J) silicon" 507 depends on M5307 508 help 509 Build support for the older revision ColdFire 5307 silicon. 510 Specifically this is the 1H55J mask revision. 511 512if HAVE_CACHE_SPLIT 513choice 514 prompt "Split Cache Configuration" 515 default CACHE_I 516 517config CACHE_I 518 bool "Instruction" 519 help 520 Use all of the ColdFire CPU cache memory as an instruction cache. 521 522config CACHE_D 523 bool "Data" 524 help 525 Use all of the ColdFire CPU cache memory as a data cache. 526 527config CACHE_BOTH 528 bool "Both" 529 help 530 Split the ColdFire CPU cache, and use half as an instruction cache 531 and half as a data cache. 532endchoice 533endif # HAVE_CACHE_SPLIT 534 535if HAVE_CACHE_CB 536choice 537 prompt "Data cache mode" 538 default CACHE_WRITETHRU 539 540config CACHE_WRITETHRU 541 bool "Write-through" 542 help 543 The ColdFire CPU cache is set into Write-through mode. 544 545config CACHE_COPYBACK 546 bool "Copy-back" 547 help 548 The ColdFire CPU cache is set into Copy-back mode. 549endchoice 550endif # HAVE_CACHE_CB 551 552# Coldfire cores that do not have a data cache configured can do coherent DMA. 553config COLDFIRE_COHERENT_DMA 554 bool 555 default y 556 depends on COLDFIRE 557 depends on !HAVE_CACHE_CB && !CACHE_D && !CACHE_BOTH 558 559config M68K_NONCOHERENT_DMA 560 bool 561 default y 562 depends on HAS_DMA && !COLDFIRE_COHERENT_DMA 563