xref: /linux/arch/m68k/Kconfig.cpu (revision a67ff6a54095e27093ea501fb143fefe51a536c2)
1comment "Processor Type"
2
3config M68000
4	bool
5	select CPU_HAS_NO_BITFIELDS
6	help
7	  The Freescale (was Motorola) 68000 CPU is the first generation of
8	  the well known M68K family of processors. The CPU core as well as
9	  being available as a stand alone CPU was also used in many
10	  System-On-Chip devices (eg 68328, 68302, etc). It does not contain
11	  a paging MMU.
12
13config MCPU32
14	bool
15	select CPU_HAS_NO_BITFIELDS
16	help
17	  The Freescale (was then Motorola) CPU32 is a CPU core that is
18	  based on the 68020 processor. For the most part it is used in
19	  System-On-Chip parts, and does not contain a paging MMU.
20
21config COLDFIRE
22	bool
23	select GENERIC_GPIO
24	select ARCH_REQUIRE_GPIOLIB
25	select CPU_HAS_NO_BITFIELDS
26	help
27	  The Freescale ColdFire family of processors is a modern derivitive
28	  of the 68000 processor family. They are mainly targeted at embedded
29	  applications, and are all System-On-Chip (SOC) devices, as opposed
30	  to stand alone CPUs. They implement a subset of the original 68000
31	  processor instruction set.
32
33config M68020
34	bool "68020 support"
35	depends on MMU
36	help
37	  If you anticipate running this kernel on a computer with a MC68020
38	  processor, say Y. Otherwise, say N. Note that the 68020 requires a
39	  68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
40	  Sun 3, which provides its own version.
41
42config M68030
43	bool "68030 support"
44	depends on MMU && !MMU_SUN3
45	help
46	  If you anticipate running this kernel on a computer with a MC68030
47	  processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
48	  work, as it does not include an MMU (Memory Management Unit).
49
50config M68040
51	bool "68040 support"
52	depends on MMU && !MMU_SUN3
53	help
54	  If you anticipate running this kernel on a computer with a MC68LC040
55	  or MC68040 processor, say Y. Otherwise, say N. Note that an
56	  MC68EC040 will not work, as it does not include an MMU (Memory
57	  Management Unit).
58
59config M68060
60	bool "68060 support"
61	depends on MMU && !MMU_SUN3
62	help
63	  If you anticipate running this kernel on a computer with a MC68060
64	  processor, say Y. Otherwise, say N.
65
66config M68328
67	bool "MC68328"
68	depends on !MMU
69	select M68000
70	help
71	  Motorola 68328 processor support.
72
73config M68EZ328
74	bool "MC68EZ328"
75	depends on !MMU
76	select M68000
77	help
78	  Motorola 68EX328 processor support.
79
80config M68VZ328
81	bool "MC68VZ328"
82	depends on !MMU
83	select M68000
84	help
85	  Motorola 68VZ328 processor support.
86
87config M68360
88	bool "MC68360"
89	depends on !MMU
90	select MCPU32
91	help
92	  Motorola 68360 processor support.
93
94config M5206
95	bool "MCF5206"
96	depends on !MMU
97	select COLDFIRE
98	select COLDFIRE_SW_A7
99	select HAVE_MBAR
100	help
101	  Motorola ColdFire 5206 processor support.
102
103config M5206e
104	bool "MCF5206e"
105	depends on !MMU
106	select COLDFIRE
107	select COLDFIRE_SW_A7
108	select HAVE_MBAR
109	help
110	  Motorola ColdFire 5206e processor support.
111
112config M520x
113	bool "MCF520x"
114	depends on !MMU
115	select COLDFIRE
116	select GENERIC_CLOCKEVENTS
117	select HAVE_CACHE_SPLIT
118	help
119	   Freescale Coldfire 5207/5208 processor support.
120
121config M523x
122	bool "MCF523x"
123	depends on !MMU
124	select COLDFIRE
125	select GENERIC_CLOCKEVENTS
126	select HAVE_CACHE_SPLIT
127	select HAVE_IPSBAR
128	help
129	  Freescale Coldfire 5230/1/2/4/5 processor support
130
131config M5249
132	bool "MCF5249"
133	depends on !MMU
134	select COLDFIRE
135	select COLDFIRE_SW_A7
136	select HAVE_MBAR
137	help
138	  Motorola ColdFire 5249 processor support.
139
140config M527x
141	bool
142
143config M5271
144	bool "MCF5271"
145	depends on !MMU
146	select COLDFIRE
147	select M527x
148	select HAVE_CACHE_SPLIT
149	select HAVE_IPSBAR
150	select GENERIC_CLOCKEVENTS
151	help
152	  Freescale (Motorola) ColdFire 5270/5271 processor support.
153
154config M5272
155	bool "MCF5272"
156	depends on !MMU
157	select COLDFIRE
158	select COLDFIRE_SW_A7
159	select HAVE_MBAR
160	help
161	  Motorola ColdFire 5272 processor support.
162
163config M5275
164	bool "MCF5275"
165	depends on !MMU
166	select COLDFIRE
167	select M527x
168	select HAVE_CACHE_SPLIT
169	select HAVE_IPSBAR
170	select GENERIC_CLOCKEVENTS
171	help
172	  Freescale (Motorola) ColdFire 5274/5275 processor support.
173
174config M528x
175	bool "MCF528x"
176	depends on !MMU
177	select COLDFIRE
178	select GENERIC_CLOCKEVENTS
179	select HAVE_CACHE_SPLIT
180	select HAVE_IPSBAR
181	help
182	  Motorola ColdFire 5280/5282 processor support.
183
184config M5307
185	bool "MCF5307"
186	depends on !MMU
187	select COLDFIRE
188	select COLDFIRE_SW_A7
189	select HAVE_CACHE_CB
190	select HAVE_MBAR
191	help
192	  Motorola ColdFire 5307 processor support.
193
194config M532x
195	bool "MCF532x"
196	depends on !MMU
197	select COLDFIRE
198	select HAVE_CACHE_CB
199	help
200	  Freescale (Motorola) ColdFire 532x processor support.
201
202config M5407
203	bool "MCF5407"
204	depends on !MMU
205	select COLDFIRE
206	select COLDFIRE_SW_A7
207	select HAVE_CACHE_CB
208	select HAVE_MBAR
209	help
210	  Motorola ColdFire 5407 processor support.
211
212config M54xx
213	bool
214
215config M547x
216	bool "MCF547x"
217	depends on !MMU
218	select COLDFIRE
219	select M54xx
220	select HAVE_CACHE_CB
221	select HAVE_MBAR
222	help
223	  Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
224
225config M548x
226	bool "MCF548x"
227	depends on !MMU
228	select COLDFIRE
229	select M54xx
230	select HAVE_CACHE_CB
231	select HAVE_MBAR
232	help
233	  Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
234
235
236comment "Processor Specific Options"
237
238config M68KFPU_EMU
239	bool "Math emulation support (EXPERIMENTAL)"
240	depends on MMU
241	depends on EXPERIMENTAL
242	help
243	  At some point in the future, this will cause floating-point math
244	  instructions to be emulated by the kernel on machines that lack a
245	  floating-point math coprocessor.  Thrill-seekers and chronically
246	  sleep-deprived psychotic hacker types can say Y now, everyone else
247	  should probably wait a while.
248
249config M68KFPU_EMU_EXTRAPREC
250	bool "Math emulation extra precision"
251	depends on M68KFPU_EMU
252	help
253	  The fpu uses normally a few bit more during calculations for
254	  correct rounding, the emulator can (often) do the same but this
255	  extra calculation can cost quite some time, so you can disable
256	  it here. The emulator will then "only" calculate with a 64 bit
257	  mantissa and round slightly incorrect, what is more than enough
258	  for normal usage.
259
260config M68KFPU_EMU_ONLY
261	bool "Math emulation only kernel"
262	depends on M68KFPU_EMU
263	help
264	  This option prevents any floating-point instructions from being
265	  compiled into the kernel, thereby the kernel doesn't save any
266	  floating point context anymore during task switches, so this
267	  kernel will only be usable on machines without a floating-point
268	  math coprocessor. This makes the kernel a bit faster as no tests
269	  needs to be executed whether a floating-point instruction in the
270	  kernel should be executed or not.
271
272config ADVANCED
273	bool "Advanced configuration options"
274	depends on MMU
275	---help---
276	  This gives you access to some advanced options for the CPU. The
277	  defaults should be fine for most users, but these options may make
278	  it possible for you to improve performance somewhat if you know what
279	  you are doing.
280
281	  Note that the answer to this question won't directly affect the
282	  kernel: saying N will just cause the configurator to skip all
283	  the questions about these options.
284
285	  Most users should say N to this question.
286
287config RMW_INSNS
288	bool "Use read-modify-write instructions"
289	depends on ADVANCED
290	---help---
291	  This allows to use certain instructions that work with indivisible
292	  read-modify-write bus cycles. While this is faster than the
293	  workaround of disabling interrupts, it can conflict with DMA
294	  ( = direct memory access) on many Amiga systems, and it is also said
295	  to destabilize other machines. It is very likely that this will
296	  cause serious problems on any Amiga or Atari Medusa if set. The only
297	  configuration where it should work are 68030-based Ataris, where it
298	  apparently improves performance. But you've been warned! Unless you
299	  really know what you are doing, say N. Try Y only if you're quite
300	  adventurous.
301
302config SINGLE_MEMORY_CHUNK
303	bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
304	depends on MMU
305	default y if SUN3
306	select NEED_MULTIPLE_NODES
307	help
308	  Ignore all but the first contiguous chunk of physical memory for VM
309	  purposes.  This will save a few bytes kernel size and may speed up
310	  some operations.  Say N if not sure.
311
312config ARCH_DISCONTIGMEM_ENABLE
313	def_bool MMU && !SINGLE_MEMORY_CHUNK
314
315config 060_WRITETHROUGH
316	bool "Use write-through caching for 68060 supervisor accesses"
317	depends on ADVANCED && M68060
318	---help---
319	  The 68060 generally uses copyback caching of recently accessed data.
320	  Copyback caching means that memory writes will be held in an on-chip
321	  cache and only written back to memory some time later.  Saying Y
322	  here will force supervisor (kernel) accesses to use writethrough
323	  caching.  Writethrough caching means that data is written to memory
324	  straight away, so that cache and memory data always agree.
325	  Writethrough caching is less efficient, but is needed for some
326	  drivers on 68060 based systems where the 68060 bus snooping signal
327	  is hardwired on.  The 53c710 SCSI driver is known to suffer from
328	  this problem.
329
330config M68K_L2_CACHE
331	bool
332	depends on MAC
333	default y
334
335config NODES_SHIFT
336	int
337	default "3"
338	depends on !SINGLE_MEMORY_CHUNK
339
340config FPU
341	bool
342
343config COLDFIRE_SW_A7
344	bool
345
346config HAVE_CACHE_SPLIT
347	bool
348
349config HAVE_CACHE_CB
350	bool
351
352config HAVE_MBAR
353	bool
354
355config HAVE_IPSBAR
356	bool
357
358config CLOCK_SET
359	bool "Enable setting the CPU clock frequency"
360	depends on COLDFIRE
361	default n
362	help
363	  On some CPU's you do not need to know what the core CPU clock
364	  frequency is. On these you can disable clock setting. On some
365	  traditional 68K parts, and on all ColdFire parts you need to set
366	  the appropriate CPU clock frequency. On these devices many of the
367	  onboard peripherals derive their timing from the master CPU clock
368	  frequency.
369
370config CLOCK_FREQ
371	int "Set the core clock frequency"
372	default "66666666"
373	depends on CLOCK_SET
374	help
375	  Define the CPU clock frequency in use. This is the core clock
376	  frequency, it may or may not be the same as the external clock
377	  crystal fitted to your board. Some processors have an internal
378	  PLL and can have their frequency programmed at run time, others
379	  use internal dividers. In general the kernel won't setup a PLL
380	  if it is fitted (there are some exceptions). This value will be
381	  specific to the exact CPU that you are using.
382
383config OLDMASK
384	bool "Old mask 5307 (1H55J) silicon"
385	depends on M5307
386	help
387	  Build support for the older revision ColdFire 5307 silicon.
388	  Specifically this is the 1H55J mask revision.
389
390if HAVE_CACHE_SPLIT
391choice
392	prompt "Split Cache Configuration"
393	default CACHE_I
394
395config CACHE_I
396	bool "Instruction"
397	help
398	  Use all of the ColdFire CPU cache memory as an instruction cache.
399
400config CACHE_D
401	bool "Data"
402	help
403	  Use all of the ColdFire CPU cache memory as a data cache.
404
405config CACHE_BOTH
406	bool "Both"
407	help
408	  Split the ColdFire CPU cache, and use half as an instruction cache
409	  and half as a data cache.
410endchoice
411endif
412
413if HAVE_CACHE_CB
414choice
415	prompt "Data cache mode"
416	default CACHE_WRITETHRU
417
418config CACHE_WRITETHRU
419	bool "Write-through"
420	help
421	  The ColdFire CPU cache is set into Write-through mode.
422
423config CACHE_COPYBACK
424	bool "Copy-back"
425	help
426	  The ColdFire CPU cache is set into Copy-back mode.
427endchoice
428endif
429
430